From: Matthias Klose Date: Fri, 19 Jan 2024 11:01:10 +0000 (+0100) Subject: gcc-12 (12.3.0-14) unstable; urgency=medium X-Git-Tag: archive/raspbian/12.3.0-14+rpi1^2~1 X-Git-Url: https://dgit.raspbian.org/%22http:/www.example.com/cgi/%22https:/%22bookmarks:///%22http:/www.example.com/cgi/%22https:/%22bookmarks:/?a=commitdiff_plain;h=16cc470afce0e82f669444c38294c84d6e3a5b13;p=gcc-12.git gcc-12 (12.3.0-14) unstable; urgency=medium * Update to git 20240119 from the gcc-12 branch. - Fix PR target/107201 (AVR), PR target/113156 (AVR), PR target/112952 (AVR), PR target/112816 (x86), PR middle-end/112733, PR tree-optimization/113013, PR target/112845 (x86), PR target/112837 (x86), PR target/112816 (x86), PR target/111408 (x86), PR tree-optimization/111967, PR c/112339, PR tree-optimization/110731, PR debug/111080, PR tree-optimization/111137, PR ada/104354, PR middle-end/111253, PR c++/109899, PR c++/111485, PR c++/108975, PR sanitizer/112727, PR c++/112795, PR libstdc++/113200, PR libstdc++/113250, PR testsuite/113175. * Update the testsuite-hardening patches, and apply them again. [dgit import unpatched gcc-12 12.3.0-14] --- 16cc470afce0e82f669444c38294c84d6e3a5b13 diff --cc debian/NEWS.gcc index 0000000,0000000..52380c1 new file mode 100644 --- /dev/null +++ b/debian/NEWS.gcc @@@ -1,0 -1,0 +1,614 @@@ ++ ++GCC 12 Release Series ++Changes, New Features, and Fixes ++ ++This page is a "brief" summary of some of the huge number of improvements in ++GCC 12. You may also want to check out our Porting_to_GCC_12 page and the full ++GCC_documentation. ++ ++Caveats ++ ++ * An ABI incompatibility between C and C++ when passing or returning by ++ value certain aggregates containing zero width bit-fields has been ++ discovered on various targets. As mentioned in PR102024, since the ++ PR42217 fix in GCC 4.5 the C++ front-end has been removing zero width ++ bit-fields from the internal representation of the aggregates after the ++ layout of those aggregates, but the C front-end kept them, so passing ++ e.g. struct S { float a; int : 0; float b; } or struct T { float c; int : ++ 0; } by value could differ between C and C++. Starting with GCC 12 the ++ C++ front-end no longer removes those bit-fields from the internal ++ representation and per clarified psABI some targets have been changed, so ++ that they either ignore those bit-fields in the argument passing by value ++ decisions in both C and C++, or they always take them into account. x86- ++ 64, ARM and AArch64 will always ignore them (so there is a C ABI ++ incompatibility between GCC 11 and earlier with GCC 12 or later), ++ PowerPC64 ELFv2 and S/390 always take them into account (so there is a ++ C++ ABI incompatibility, GCC 4.4 and earlier compatible with GCC 12 or ++ later, incompatible with GCC 4.5 through GCC 11). RISC-V has changed the ++ handling of these already starting with GCC 10. As the ABI requires, MIPS ++ takes them into account handling function return values so there is a C++ ++ ABI incompatibility with GCC 4.5 through 11. For function arguments on ++ MIPS, refer to the_MIPS_specific_entry. GCC 12 on the above targets will ++ report such incompatibilities as warnings or other diagnostics unless - ++ Wno-psabi is used. ++ * C: Computed gotos require a pointer type now. ++ * C++: Two non-standard std::pair constructors have been deprecated. These ++ allowed the use of an rvalue and a literal 0 to construct a pair ++ containing a move-only type and a pointer. The nullptr keyword should be ++ used to initialize the pointer member instead of a literal 0, as this is ++ portable to other C++ implementations. ++ * The configuration option --enable-libstdcxx-allocator no longer supports ++ the bitmap, mt, and pool arguments. Those configurations had been broken ++ for some time. ++ * Fortran: OpenMP code using the omp_lib.h include file can no longer be ++ compiled with -std=f95 but now requires at least -std=f2003. ++ Alternatively, use the omp_lib module, which still supports -std=f95 and ++ is recommended to be used instead in general. ++ * OpenMP offloading to Intel MIC has been deprecated and will be removed in ++ a future release. ++ * The cr16 target with the cr16-*-* configuration has been obsoleted and ++ will be removed in a future release. ++ * The hppa[12]*-*-hpux10* and hppa[12]*-*-hpux11* configurations targeting ++ 32-bit PA-RISC with HP-UX have been obsoleted and will be removed in a ++ future release. ++ * The m32c*-*-rtems* configuration has been obsoleted and will be removed ++ in a future release. ++ * The support for the m32r-*-linux*, m32rle-*-linux*, m68k*-*-openbsd* and ++ vax-*-openbsd* configurations has been removed. ++ * STABS: Support for emitting the STABS debugging format is deprecated and ++ will be removed in the next release. All ports now default to emit DWARF ++ (version 2 or later) debugging info or are obsoleted. ++ * The optimization level -Ofast now implies -fno-semantic-interposition. ++ ++ ++General Improvements ++ ++ * Vectorization is enabled at -O2 which is now equivalent to the original - ++ O2 -ftree-vectorize -fvect-cost-model=very-cheap. Note that default ++ vectorizer cost model has been changed which used to behave as -fvect- ++ cost-model=cheap were specified. ++ * GCC now supports the ShadowCallStack sanitizer, which can be enabled ++ using the command-line option -fsanitize=shadow-call-stack. This ++ sanitizer currently only works on AArch64 targets and it requires an ++ environment in which all code has been compiled with -ffixed-r18. Its ++ primary initial user is the Linux kernel. ++ ++ ++New Languages and Language specific improvements ++ ++ * OpenMP ++ o OpenMP 5.0 support has been extended: The close map modifier and ++ the affinity clause are now supported. In addition Fortran gained ++ additionally the following features which were available in C and ++ C++ before: declare variant is now available, depobj, mutexinoutset ++ and iterator can now also be used with the depend clause, ++ defaultmap has been updated for OpenMP 5.0, and the loop directive ++ and combined directives involving the master directive have been ++ added. ++ o The following OpenMP 5.1 features have been added: support for ++ expressing OpenMP directives as C++ 11 attributes, the masked and ++ scope construct, the nothing and error directives, and using ++ primary with the proc_bind clause and OMP_PROC_BIND environment ++ variable, the reproducible and unconstrained modifiers to the order ++ clause, and, for C/C++ only, the align and allocator modifiers to ++ the allocate clause and the atomic extensions are now available. ++ The OMP_PLACE environment variable supports the OpenMP 5.1 ++ features. In addition the OMP_NUM_TEAMS and OMP_TEAMS_THREAD_LIMIT ++ environment variables and their associated API routines are now ++ supported as well as the memory-allocation routines added for ++ Fortran and extended for C/C++ in OpenMP 5.1. In Fortran code, ++ strictly structured blocks can be used. ++ o The OpenMP_Implementation_Status can be found in the libgomp ++ manual. ++ ++ * Version 2.6 of the OpenACC specification continues to be maintained and ++ improved in the C, C++ and Fortran compilers. See the implementation ++ status section on the OpenACC wiki page and the run-time_library ++ documentation for further information. In addition to general performance ++ tuning and bug fixing, new features include: ++ o OpenACC worker parallelism for AMD_GPUs (already for a long time ++ supported for Nvidia_GPUs). ++ o Data privatization/sharing at the OpenACC gang level. ++ o Considerable improvements for the experimental OpenACC 'kernels' ++ decomposition (--param_openacc-kernels=decompose). ++ o A new warning flag -Wopenacc-parallelism to warn about potentially ++ suboptimal choices related to OpenACC parallelism. ++ * The offload target code generation for OpenMP and OpenACC can now be ++ better adjusted using the new -foffload-options= flag and the pre- ++ existing but now documented -foffload= flag. ++ ++ ++Ada ++ ++ * Ada 2022 ++ o Added the -gnat2022 flag to indicate strict Ada 2022 compliance. ++ The old -gnat2020 flag is now deprecated. ++ o Support for Big Numbers (Annex G) has seen continuous improvements. ++ It is now considered complete. It is compatible with SPARK, i.e. ++ can be used from SPARK code. ++ o Continuous improvements to the Ada 2022 standard since GCC 11. ++ o Greatly improved compile time support. More functions can now have ++ the with Static aspect and can be used in more contexts. ++ * Ada 2022 extensions. The use of the -gnatX flag is necessary to access ++ these features as they are not considered stable or standard. ++ o Fixed lower bound for unconstrained arrays. ++ # type Matrix is array (Natural range 0 .. <>, Natural range 0 ++ .. <>) of Integer; is now valid. ++ # Subtypes can also specify a lower bound: subtype String_1 is ++ String (1 .. <>);. Boundaries from slices will "slide" to the ++ correct lower bound of the subtype. ++ o Generalized Object.Operand notation. The follwing code is now valid ++ V.Add_Element(42);, with V being a vector, for example. ++ o Additional when constructs. Keywords return, goto and raise can now ++ use when in addition to the existing exit when. The following ++ expression is therefore now valid raise Constraint_Error with ++ "Element is null" when Element = null; ++ o Pattern matching ++ # The case statement has been extended to cover records and ++ arrays as well as finer grained casing on scalar types. In ++ the future it is expected to provide more compile time ++ guarantees when accessing discriminated fields. Case ++ exhaustion is supported for pattern matching. An example ++ would be ++ type Sign is (Neg, Zero, Pos); ++ ++ function Multiply (S1, S2 : Sign) return Sign is ++ (case (S1, S2) is ++ when (Neg, Neg) | (Pos, Pos) => Pos, ++ when (Zero, <>) | (<>, Zero) => Zero, ++ when (Neg, Pos) | (Pos, Neg) => Neg); ++ * gnatfind and gnatxref, which were already deprecated, have been removed. ++ * Greatly expanded code covered by contracts. Thanks to this work, there ++ are now several Ada standard libraries fully proven in SPARK which means ++ they have no runtime nor logical errors. They are mostly numeric and ++ string handling libraries. ++ * Enable return-slot optimization for Pure functions. ++ * General optimizations, improvements and additions to the standard ++ library. Performance, correctness and in some cases stability was ++ improved. Memory pools have also seen some minor enhancements. ++ * Improvements to embedded-RTOS targets such as RTEMS, VxWorks and QNX. ++ Older targets were removed or cleaned. ++ * Added some hardening_features. ++ ++ ++C family ++ ++ * Support for __builtin_shufflevector compatible with the clang language ++ extension was added. ++ * Support for attribute unavailable was added. ++ * A new built-in function, __builtin_assoc_barrier, was added. It can be ++ used to inhibit re-association of floating-point expressions. ++ * Support for __builtin_dynamic_object_size compatible with the clang ++ language extension was added. ++ * New warnings: ++ o -Wbidi-chars warns about potentially misleading UTF-8 bidirectional ++ control characters. The default is -Wbidi-chars=unpaired (PR103026) ++ o -Warray-compare warns about comparisons between two operands of ++ array type (PR97573) ++ * Enhancements to existing warnings: ++ o -Wattributes has been extended so that it's possible to use -Wno- ++ attributes=ns::attr or -Wno-attributes=ns:: to suppress warnings ++ about unknown scoped attributes (in C++11 and C2X). Similarly, ++ #pragma GCC diagnostic ignored_attributes "vendor::attr" can be ++ used to achieve the same effect (PR101940) ++ ++C ++ ++ * Some new features from the upcoming C2X revision of the ISO C standard ++ are supported with -std=c2x and -std=gnu2x. Some of these features are ++ also supported as extensions when compiling for older language versions. ++ In addition to the features listed, some features previously supported as ++ extensions and now added to the C standard are enabled by default in C2X ++ mode and not diagnosed with -std=c2x -Wpedantic. ++ o Digit separators (as in C++) are supported for C2X. ++ o The #elifdef and #elifndef preprocessing directives are now ++ supported. ++ o The printf and scanf format checking with -Wformat now supports the ++ %b format specified by C2X for binary integers, and the %B format ++ recommended by C2X for printf. ++ ++C++ ++ ++ * Several C++23 features have been implemented: ++ o P1938R3, if consteval (PR100974) ++ o P0849R8, auto(x): decay-copy in the language (PR103049) ++ o P2242R3, Non-literal variables (and labels and gotos) in constexpr ++ functions (PR102612) ++ o P2334R1, Support for preprocessing directives elifdef and elifndef ++ (PR102616) ++ o P2360R0, Extend init-statement to allow alias-declaration ++ (PR102617) ++ o P2128R6, Multidimensional subscript operator ++ o DR_2397, auto specifier for pointers and references to arrays ++ (PR100975) ++ * Several C++ Defect Reports have been resolved, e.g.: ++ o DR_960, Covariant functions and lvalue/rvalue references ++ o DR_1227, Mixing immediate and non-immediate contexts in deduction ++ failure ++ o DR_1315, Restrictions on non-type template arguments in partial ++ specializations ++ o DR_2082, Referring to parameters in unevaluated operands of default ++ arguments ++ o DR_2351, void{} ++ o DR_2374, Overly permissive specification of enum direct-list- ++ initialization ++ o DR_2397, auto specifier for pointers and references to arrays ++ o DR_2446, Questionable type-dependency of concept-ids ++ * New command-line option -fimplicit-constexpr can be used to make inline ++ functions implicitly constexpr (git) ++ * New command-line option -ffold-simple-inlines can be used to fold calls ++ to certain trivial inline functions (currently std::move, std::forward, ++ std::addressof and std::as_const). In contrast to inlining such calls, ++ folding means that no intermediate code or debug information will be ++ generated for them; this minimizes the abstraction penalty incurred for ++ using these functions versus using the fundamental operations from which ++ they're defined (e.g. std::move versus static_cast). This flag is enabled ++ by default when -fno-inline is not active. ++ * Deduction guides can be declared at class scope (PR79501) ++ * -Wuninitialized warns about using uninitialized variables in member ++ initializer lists (PR19808) ++ * -Wint-in-bool-context is now disabled when instantiating a template (git) ++ * Stricter checking of attributes on friend declarations: if a friend ++ declaration has an attribute, that declaration must be a definition. ++ Moreover, a C++11 attribute cannot appear in the middle of the decl- ++ specifier-seq. (PR99032) ++ * New warning options for C++ language mismatches: -Wc++11-extensions, - ++ Wc++14-extensions, -Wc++17-extensions, -Wc++20-extensions, and -Wc++23- ++ extensions. They are enabled by default and can be used to control ++ existing pedwarns about occurrences of new C++ constructs in code using ++ an old C++ standard dialect. ++ * New warning -Wmissing-requires warns about missing requires (git) ++ * The existing std::is_constant_evaluated in if warning was extended to ++ warn in more cases (PR100995) ++ * -Waddress has been enhanced so that it now warns about, for instance, ++ comparing the address of a nonstatic member function to null (PR102103) ++ * Errors about narrowing are no longer hidden if they occur in system ++ headers ++ * Ordered comparison of null pointers is now rejected (PR99701) ++ * Anonymous structs with bases are now rejected (git) ++ * The compiler rejects taking the address of an immediate member function ++ (PR102753) ++ * The compiler has support for C++20 __cpp_lib_is_pointer_interconvertible ++ and __cpp_lib_is_layout_compatible to help the C++ library implement ++ P0466, Layout-compatibility and Pointer-interconvertibility Traits ++ (PR101539) ++ * Memory usage of constraint subsumption has been improved (PR100828) ++ * constinit thread_local variables are optimized better (PR101786) ++ * Support for C++17 std::hardware_destructive_interference_size was added, ++ along with the -Winterference-size warning (git) ++ * Many bugs in the CTAD handling have been fixed (PR101344, PR101883, ++ PR89062, PR101233, PR88252, PR86439, PR98832, PR102933 ...) ++ * Two-stage name lookup for dependent operator expressions has been ++ corrected (PR51577) ++ * Several issues with constrained variable templates have been fixed ++ (PR98486) ++ * The compiler performs less instantiating when doing speculative constant ++ evaluation (git) ++ * Various diagnostic improvements; e.g., a more precise caret location for ++ pointer-to-member expressions ++ * The new -fconstexpr-fp-except flag allows IEC559 floating point ++ exceptions in constant-expressions. ++ ++ ++Runtime Library (libstdc++) ++ ++ * Improved experimental C++20 support, including: ++ o std::vector, std::basic_string, std::optional, and std::variant can ++ be used in constexpr functions. ++ o std::make_shared for arrays with default initialization, and std:: ++ atomic>. ++ o Layout-compatibility and pointer-interconvertibility traits. ++ * Improved experimental C++23 support, including: ++ o Monadic operations for std::optional. ++ o std::move_only_function ++ o ++ o std::basic_string::resize_and_overwrite ++ o std::unique_ptr can be used in constexpr functions. ++ o (not built by default, requires linking to an extra ++ library). ++ o ++ o std::invoke_r ++ o constexpr std::type_info::operator== ++ ++Fortran ++ ++ * WG5/N1942, "TS 29113 Further Interoperability of Fortran with C", is now ++ fully supported. In addition to implementing previously missing ++ functionality, such as support for character arguments of length greater ++ than one in functions marked bind(c) and gaps in the handling for ++ assumed-rank arrays, numerous other bugs have been fixed, and an ++ extensive set of new conformance test cases has been added. ++ * GCC 12 now uses OPERATION as the name of the function to the CO_REDUCE ++ intrinsic for the pairwise reduction, thus conforming to the Fortran 2018 ++ standard. Previous versions used OPERATOR which conforms to TS 18508. ++ * On POWER systems which support it, the -mabi=ieeelongdouble option now ++ selects the IEEE 128-bit floating point format for REAL(KIND=16). R16_IBM ++ and R16_IEEE have been added to the -fconvert option, the CONVERT ++ specifyer of the OPEN statement and the GFORTRAN_CONVERT_UNIT environment ++ variable. ++ ++ ++libgccjit ++ ++ * The libgccjit API gained 30 new entry points: ++ o 17 new "reflection" entrypoints for querying functions and types ++ (LIBGCCJIT_ABI_16) ++ o gcc_jit_lvalue_set_tls_model for supporting thread-local variables ++ (LIBGCCJIT_ABI_17) ++ o gcc_jit_lvalue_set_link_section for setting the link section of ++ global variables, analogous to __attribute__((section(".section"))) ++ (LIBGCCJIT_ABI_18) ++ o 4 new entrypoints for initializing global variables and creating ++ constructors for rvalues (LIBGCCJIT_ABI_19) ++ o Support for sized integer types, including 128-bit integers and ++ helper functions for such types (LIBGCCJIT_ABI_20) ++ o gcc_jit_context_new_bitcast for reinterpreting the bits of an ++ rvalue as a different type (LIBGCCJIT_ABI_21) ++ o gcc_jit_lvalue_set_register_name for setting a specific register ++ for a variable (LIBGCCJIT_ABI_22) ++ o gcc_jit_context_set_bool_print_errors_to_stderr (LIBGCCJIT_ABI_23) ++ o 2 new entrypoints for setting the alignment of a variable ++ (LIBGCCJIT_ABI_24) ++ * libgccjit has gained support for the use of various atomic builtins ++ (PR96066, PR96067) ++ * gcc_jit_context_new_cast is now able to handle truncation and extension ++ between different integer types (PR95498) ++ ++ ++New Targets and Target Specific Improvements ++ ++AArch64 & arm ++ ++ * Newer revisions of the Arm Architecture are supported as arguments to the ++ -march option: armv8.7-a, armv8.8-a, armv9-a. ++ * The Arm Cortex-A510 CPU is now supported through the cortex-a510 argument ++ to the -mcpu and -mtune options. ++ * GCC can now auto-vectorize operations performing sign-differing dot- ++ product operations, taking advantage of instructions in the Advanced SIMD ++ (AArch64/AArch32) and SVE (AArch64) instruction sets. ++ ++ ++AArch64 ++ * A number of new CPUs are supported through the -mcpu and -mtune options ++ (GCC identifiers in parentheses). ++ o Ampere-1 (ampere1). ++ o Arm Cortex-A710 (cortex-a710). ++ o Arm Cortex-X2 (cortex-x2). ++ * The 64-byte atomic load/store intrinsics to accelerator memory from the ++ 2020_Arm_Architecture_extensions are supported through the +ls64 option ++ extension. ++ * Initial code generation support is supported for hardware instructions ++ used to accelerate the memcpy,memmove and memset standard functions. ++ These instructions can be generated when compiling with the +mopsoption ++ extension. ++ * The ACLE Advanced SIMD intrinsics accessible through the arm_neon.h ++ header have been significantly reimplemented and generate higher- ++ performing code than previous GCC versions. ++ * The option -mtune=neoverse-512tvb is added to tune for Arm Neoverse cores ++ that have a total vector bandwidth of 512 bits. Please refer to the ++ documentation for more details. ++ ++AMD Radeon (GCN) ++ ++ * Debug experience with ROCGDB has been improved. ++ * Support for the type __int128_t/integer(kind=16) was added. ++ * For offloading, the limitation of using only one wavefront per compute ++ unit (CU) has been lifted. Up to 40 workgroups per CU and 16 wavefronts ++ per workgroup are supported (up to a limit of 40 wavefronts in total, per ++ CU). Additionally, the number of used wavefronts and workgroups was tuned ++ for performance. ++ ++arm ++ ++ * Support is added for accessing the stack canary value via the TLS ++ register through the -fstack-protector-guard=tls and -mstack-protector- ++ guard-offset= options. This intended for use in Linux kernel development. ++ Please refer to the documentation for more details. ++ ++BPF ++ ++ * Support for CO-RE (compile-once, run-everywhere) has been added to the ++ BPF backend. CO-RE allows to compile portable BPF programs that are able ++ to run among different versions of the Linux kernel. ++ ++IA-32/x86-64 ++ ++ * New ISA extension support for Intel AVX512-FP16 was added. AVX512FP16 ++ intrinsics are available via the -mavx512fp16 compiler switch. ++ * For both C and C++ the _Float16 type is supported on x86 systems with ++ SSE2 enabled. Without {-mavx512fp16}, all operations will be emulated in ++ software and float instructions. ++ * Mitigation against straight line speculation (SLS) for function return ++ and indirect jump is supported via -mharden-sls= ++ [none|all|return|indirect-jmp]. ++ * Add CS prefix to call and jmp to indirect thunk with branch target in r8- ++ r15 registers via -mindirect-branch-cs-prefix. ++ * Always use global offset table (GOT) to access external data and function ++ symbols when the new -mno-direct-extern-access command-line option is ++ specified. ++ ++LoongArch ++ ++ * Support for the LoongArch architecture instruction set has been added. ++ * The Loongson CPU codename LA464 and LoongArch 64-bit generic CPU codename ++ loongarch64 are supported through the -march= and -mtune= options (GCC ++ identifiers in parentheses). ++ o Loongson LA464 core (la464). ++ o LoongArch 64-bit generic core (loongarch64). ++ ++MIPS ++ ++ * The ABI passing arguments containing zero-width fields (for example, C/ ++ C++ zero-width bit-fields, GNU C/C++ zero-length arrays, and GNU C empty ++ structs) has changed. Now a zero-width field will not prevent an aligned ++ 64-bit floating-point field next to it from being passed through FPR. ++ This is compatible with LLVM, but incompatible with previous GCC ++ releases. GCC 12 on MIPS will report such incompatibilities as an inform ++ unless -Wno-psabi is used. ++ * The ABI returning values containing C++17 empty bases has changed. Now an ++ empty base will not prevent an aggregate containing only one or two ++ floating-point fields from being returned through FPR. This is compatible ++ with GCC 6 and earlier, but incompatible with GCC 7 through 11. GCC 12 on ++ MIPS will report such incompatibilities as an inform unless -Wno-psabi is ++ used. ++ ++NVPTX ++ ++ * The -march flag has been added. The -misa flag is now considered an alias ++ of the -march flag. ++ * Support for PTX ISA target architectures sm_53, sm_70, sm_75 and sm_80 ++ has been added. These can be specified using the -march flag. ++ * The default PTX ISA target architecture has been set back to sm_30, to ++ fix support for sm_30 boards. ++ * The -march-map flag has been added. The -march-map value will be mapped ++ to an valid -march flag value. For instance, -march-map=sm_50 maps to - ++ march=sm_35. This can be used to specify that generated code is to be ++ executed on a board with at least some specific compute capability, ++ without having to know the valid values for the -march flag. ++ * The -mptx flag has been added to specify the PTX ISA version for the ++ generated code; permitted values are 3.1 (matches previous GCC versions), ++ 6.0, 6.3, and 7.0. If not specified, the used version is the minimal ++ version required for -march but at least 6.0. ++ * An mptx-3.1 multilib was added. This allows using older drivers which do ++ not support PTX ISA version 6.0. ++ * The new __PTX_SM__ predefined macro allows code to check the PTX ISA ++ target architecture being targeted by the compiler. ++ * The new __PTX_ISA_VERSION_MAJOR__ and __PTX_ISA_VERSION_MINOR__ ++ predefined macros allows code to check the PTX ISA version being targeted ++ by the compiler. ++ ++PowerPC / PowerPC64 / RS6000 ++ ++ * The internal implementation of Power's target-specific built-in functions ++ has been rewritten to be easier and less error-prone to maintain. Every ++ attempt has been made to ensure that the new behavior matches the old ++ behavior, but inevitably some bugs can be expected. Please report any ++ problems via GCC_Bugzilla. ++ * The built-in functions __builtin_get_texasr, __builtin_get_texasru, ++ __builtin_get_tfhar, __builtin_get_tfiar, __builtin_set_texasr, ++ __builtin_set_texasru, __builtin_set_tfhar, and __builtin_set_tfiar now ++ behave as documented in all supported configurations. On prior releases, ++ the arguments and return values of these functions were treated as ++ unsigned long long instead of as unsigned long, when the options -m32 - ++ mpowerpc64 were in effect. ++ * The overloaded built-in functions vec_cntlz_lsbb and vec_cnttz_lsbb now ++ behave as documented. On prior releases, these built-in functions had ++ incorrect semantics on little-endian targets. ++ ++PRU ++ ++ * The __regio_symbol variable qualifier has been added. It allows easier ++ access in C programs to the __R30 and __R31 CPU I/O registers. ++ ++RISC-V ++ ++ * Default ISA spec version was bump to 20191213, more detail see this ++ announcement ++ * New ISA extension support for zba, zbb, zbc, zbs was added. ++ * New ISA extension support for vector and scalar crypto was added, only ++ support architecture testing marco and -march= parsing. ++ * The option -mtune=thead-c906 is added to tune for T-HEAD c906 cores. ++ ++ ++Operating Systems ++ ++Improvements to Static Analyzer ++ ++ * The analyzer has gained a -Wanalyzer-use-of-uninitialized-value warning, ++ similar to -Wuninitialized and -Wmaybe-uninitialized, but based on an ++ interprocedural path-sensitive analysis (PR95006). ++ Such warnings are not disabled by the new -ftrivial-auto-var-init (see ++ below), as the latter is considered a mitigation option. ++ * -Wanalyzer-write-to-const and -Wanalyzer-write-to-string-literal will now ++ check for __attribute___((access,_....)) on calls to externally-defined ++ functions, and complain about read-only regions pointed to by arguments ++ marked with a write_only or read_write attribute (PR104793). ++ * The analyzer's "taint" mode, activated by -fanalyzer-checker=taint (in ++ addition to -fanalyzer), has gained four new taint-based warnings: ++ o -Wanalyzer-tainted-allocation-size for e.g. attacker-controlled ++ malloc and alloca, ++ o -Wanalyzer-tainted-divisor for detecting where an attacker can ++ inject a divide-by-zero, ++ o -Wanalyzer-tainted-offset for attacker-controlled pointer offsets, ++ o -Wanalyzer-tainted-size for attacker-controlled values being used ++ as a size parameter to calls to memset or to functions marked with ++ __attribute___((access,_....)). ++ The existing -Wanalyzer-tainted-array-index has been reworded to talk ++ about "attacker-controlled" rather than "tainted" values, for consistency ++ with the new warnings. ++ A new __attribute___((tainted_args)) has been added to the C and C++ ++ frontends, usable on functions, and on function pointer callback fields ++ in structs. The analyzer's taint mode will treat all parameters and ++ buffers pointed to by parameters of such functions as being attacked- ++ controlled, such as for annotating system calls in an operating system ++ kernel as being an "attack surface". ++ * The analyzer now respects __attribute__((const)): it will treat such ++ functions as returning the same value when given the same inputs ++ (PR104434), and as having no side effects (PR104576). ++ * The analyzer is now able to split its analysis into multiple execution ++ paths in places where there isn't a split in the control flow graph. For ++ example, it now handles realloc calls by splitting the execution path ++ into three possible outcomes for the call: ++ o failure, returning NULL ++ o success, growing the buffer in-place without moving it ++ o success, allocating a new buffer, copying the content of the old ++ buffer to it, and freeing the old buffer ++ * The analyzer's interprocedural path exploration logic is now able to ++ track calls through function pointers. ++ * The analyzer now makes the assumption that if we know PTR is non-NULL, ++ then (PTR + OFFSET) is also non-NULL. This isn't strictly true, but ++ eliminates false positives in practice (PR101962). ++ * The analyzer has gained some initial support for inline assembler code. ++ This is extremely limited, and is purely to help suppress false positives ++ when analyzing the Linux kernel, which makes heavy use of inline ++ assembler (PR101570). ++ * The way the analyzer tracks the state of memory along an execution path ++ has been improved in various ways for GCC 12: ++ o An optimization for representing bulk updates to memory (e.g. zero ++ fills) has been removed as it never worked well. In GCC 12 it has ++ been replaced with a simpler and more accurate approach, ++ eliminating many false positives (PR95006). ++ o Various optimizations have been added, speeding up the analysis on ++ a particularly problematic source file from 4 minutes down to 17 ++ seconds (PR104943, PR104954, and PR104955). ++ o The analyzer now tracks the sizes of dynamically-allocated regions, ++ both on the heap (via malloc etc) and stack (via alloca), though ++ none of the analyzer warnings make use of this yet in GCC 12. ++ * The analyzer's handling of switch statements has been rewritten, fixing ++ various bugs. ++ ++ ++Other significant improvements ++ ++Eliminating uninitialized variables ++ ++ * GCC can now initialize_all_stack_variables_implicitly, including padding. ++ This is intended to eliminate all classes of uninitialized stack variable ++ flaws. Lack of explicit initialization will still warn when - ++ Wuninitialized is active. For best debugging, use of the new command-line ++ option -ftrivial-auto-var-init=pattern can be used to fill variables with ++ a repeated 0xFE pattern, which tends to illuminate many bugs (e.g. ++ pointers receive invalid addresses, sizes and indices are very large). ++ For best production results, the new command-line option -ftrivial-auto- ++ var-init=zero can be used to fill variables with 0x00, which tends to ++ provide a safer state for bugs (e.g. pointers are NULL, strings are NUL ++ filled, and sizes and indices are 0). ++ ++Debugging formats ++ * GCC can now generate debugging information in CTF, a lightweight ++ debugging format that provides information about C types and the ++ association between functions and data symbols and types. This format is ++ designed to be embedded in ELF files and to be very compact and simple. A ++ new command-line option -gctf enables the generation of CTF. ++ * GCC can now generate debugging information in BTF. This is a debugging ++ format mainly used in BPF programs and the Linux kernel. The compiler can ++ generate BTF for any target, when enabled with the command-line option - ++ gbtf ++ ++GCC 12.1 ++ ++This is the list_of_problem_reports_(PRs) from GCC's bug tracking system that ++are known to be fixed in the 12.1 release. This list might not be complete ++(that is, it is possible that some PRs that have been fixed are not listed ++here). ++https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=12.0 diff --cc debian/NEWS.html index 0000000,0000000..46011f2 new file mode 100644 --- /dev/null +++ b/debian/NEWS.html @@@ -1,0 -1,0 +1,1037 @@@ ++ ++ ++ ++ ++ ++ ++ ++GCC 12 Release Series — Changes, New Features, and Fixes ++- GNU Project ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++

GCC 12 Release Series
Changes, New Features, and Fixes

++ ++

++This page is a "brief" summary of some of the huge number of improvements ++in GCC 12. ++You may also want to check out our ++Porting to GCC 12 page and the ++full GCC documentation. ++

++ ++ ++

Caveats

++
    ++
  • ++ An ABI incompatibility between C and ++ C++ when passing or returning by value certain aggregates containing zero ++ width bit-fields has been discovered on various targets. ++ As mentioned in PR102024, ++ since the PR42217 fix in ++ GCC 4.5 the C++ front-end has been removing zero width bit-fields ++ from the internal representation of the aggregates after the layout of those ++ aggregates, but the C front-end kept them, so passing e.g. ++ struct S { float a; int : 0; float b; } or ++ struct T { float c; int : 0; } by value could differ ++ between C and C++. Starting with GCC 12 the C++ front-end no longer ++ removes those bit-fields from the internal representation and ++ per clarified psABI some targets have been changed, so that they ++ either ignore those bit-fields in the argument passing by value ++ decisions in both C and C++, or they always take them into account. ++ x86-64, ARM and AArch64 will always ignore them (so there is ++ a C ABI incompatibility between GCC 11 and earlier with GCC 12 or ++ later), PowerPC64 ELFv2 and S/390 always take them into account ++ (so there is a C++ ABI incompatibility, GCC 4.4 and earlier compatible ++ with GCC 12 or later, incompatible with GCC 4.5 through GCC 11). ++ RISC-V has changed the handling of these already starting with GCC 10. ++ As the ABI requires, MIPS takes them into account handling function ++ return values so there is a C++ ABI incompatibility with GCC 4.5 ++ through 11. For function arguments on MIPS, refer to ++ the MIPS specific entry. ++ GCC 12 on the above targets will report such incompatibilities as ++ warnings or other diagnostics unless -Wno-psabi is used. ++
    • ++
  • ++ C: ++ Computed gotos require a pointer type now. ++
    • ++
  • ++ C++: ++ Two non-standard std::pair constructors have been deprecated. ++ These allowed the use of an rvalue and a literal 0 to ++ construct a pair containing a move-only type and a pointer. ++ The nullptr keyword should be used to initialize the pointer ++ member instead of a literal 0, as this is portable to other ++ C++ implementations. ++
    • ++
  • The configuration option --enable-libstdcxx-allocator ++ no longer supports the bitmap, mt, and ++ pool arguments. Those configurations had been broken for ++ some time. ++
    • ++
  • ++ Fortran: ++ OpenMP code using the omp_lib.h include file can no longer be ++ compiled with -std=f95 but now requires at least ++ -std=f2003. Alternatively, use the omp_lib module, ++ which still supports -std=f95 and is recommended to be used ++ instead in general. ++
    • ++
  • ++ OpenMP offloading to Intel MIC has been deprecated and will be removed ++ in a future release. ++
    • ++
  • ++ The cr16 target with the cr16-*-* configuration ++ has been obsoleted and will be removed in a future release. ++
    • ++
  • ++ The hppa[12]*-*-hpux10* and hppa[12]*-*-hpux11* ++ configurations targeting 32-bit PA-RISC with HP-UX have been obsoleted and ++ will be removed in a future release. ++
    • ++
  • ++ The m32c*-*-rtems* configuration has been obsoleted and will ++ be removed in a future release. ++
  • ++ The support for the m32r-*-linux*, m32rle-*-linux*, ++ m68k*-*-openbsd* and vax-*-openbsd* configurations ++ has been removed. ++
    • ++
  • ++ STABS: ++ Support for emitting the STABS debugging format is deprecated and will ++ be removed in the next release. All ports now default to emit DWARF ++ (version 2 or later) debugging info or are obsoleted. ++
    • ++
  • The optimization level -Ofast now implies ++ -fno-semantic-interposition. ++
    • ++
++ ++ ++ ++

General Improvements

++ ++
    ++
  • Vectorization is enabled at -O2 which is now equivalent to the ++ original -O2 -ftree-vectorize -fvect-cost-model=very-cheap. ++ Note that default vectorizer cost model has been changed which used to behave ++ as -fvect-cost-model=cheap were specified. ++
    • ++
  • ++ GCC now supports the ++ ++ ShadowCallStack sanitizer, which can be enabled using the ++ command-line option ++ ++ -fsanitize=shadow-call-stack. This sanitizer currently ++ only works on AArch64 targets and it requires an environment in ++ which all code has been compiled with -ffixed-r18. ++ Its primary initial user is the Linux kernel. ++
    • ++
++ ++ ++

New Languages and Language specific improvements

++ ++
    ++
  • OpenMP ++
      ++
    • OpenMP 5.0 support has been extended: The close map ++ modifier and the affinity clause are now supported. ++ In addition Fortran gained additionally the following features which were ++ available in C and C++ before: declare variant is now ++ available, depobj, mutexinoutset and ++ iterator can now also be used with the depend ++ clause, defaultmap has been updated for OpenMP 5.0, and the ++ loop directive and combined directives involving the ++ master directive have been added.
      • ++
    • The following OpenMP 5.1 features have been added: support for ++ expressing OpenMP directives as C++ 11 attributes, the masked ++ and scope construct, the nothing and ++ error directives, and using primary with the ++ proc_bind clause and OMP_PROC_BIND environment ++ variable, the reproducible and unconstrained ++ modifiers to the order clause, and, for C/C++ only, the ++ align and allocator modifiers to the ++ allocate clause and the atomic extensions are ++ now available. The OMP_PLACE environment variable supports ++ the OpenMP 5.1 features. In addition the OMP_NUM_TEAMS and ++ OMP_TEAMS_THREAD_LIMIT environment variables and their ++ associated API routines are now supported as well as the memory-allocation ++ routines added for Fortran and extended for C/C++ in OpenMP 5.1. In ++ Fortran code, strictly structured blocks can be used.
      • ++
    • The OpenMP Implementation Status can be found in the libgomp manual.
      • ++
    ++
    • ++
  • ++ Version 2.6 of the OpenACC ++ specification continues to be maintained and improved in the C, C++ and ++ Fortran compilers. ++ See the implementation ++ status section on the OpenACC wiki page and the ++ ++ run-time library documentation for further information. ++ In addition to general performance tuning and bug fixing, new features ++ include: ++
      ++
    • ++ OpenACC worker parallelism for AMD GPUs ++ (already for a long time supported for Nvidia ++ GPUs). ++
      • ++
    • ++ Data privatization/sharing at the OpenACC gang level. ++
      • ++
    • ++ Considerable improvements for the experimental OpenACC 'kernels' ++ decomposition ++ (--param ++ openacc-kernels=decompose). ++
      • ++
    • ++ A new warning ++ flag -Wopenacc-parallelism ++ to warn about potentially suboptimal choices related to OpenACC ++ parallelism. ++
      • ++
    ++
    • ++
  • The offload target code generation for OpenMP and OpenACC can now ++ be better adjusted using the new -foffload-options= flag and the pre-existing but now ++ documented -foffload= flag. ++
    • ++
++ ++

Ada

++
    ++
  • Ada 2022 ++
      ++
    • Added the -gnat2022 flag to indicate strict Ada ++ 2022 compliance. The old -gnat2020 flag is now ++ deprecated.
      • ++
    • Support for Big Numbers (Annex G) has seen continuous ++ improvements. It is now considered complete. It is compatible with ++ SPARK, i.e. can be used from SPARK code.
      • ++
    • Continuous improvements to the Ada 2022 standard since GCC 11.
      • ++
    • Greatly improved compile time support. More functions can now ++ have the with Static aspect and can be used in more ++ contexts.
      • ++
    ++
    • ++
  • Ada 2022 extensions. The use of the -gnatX flag is ++ necessary to access these features as they are not considered ++ stable or standard. ++
      ++
    • Fixed lower bound for unconstrained arrays. ++
        ++
      • type Matrix is array (Natural range 0 .. <>, ++ Natural range 0 .. <>) of Integer; is now valid.
        • ++
      • Subtypes can also specify a lower bound: subtype ++ String_1 is String (1 .. <>);. Boundaries from slices ++ will "slide" to the correct lower bound of the subtype.
        • ++
      ++
      • ++
    • Generalized Object.Operand notation. The follwing ++ code is now valid V.Add_Element(42);, ++ with V being a vector, for example.
      • ++
    • Additional when constructs. Keywords ++ return, goto and raise ++ can now use when in addition to the existing ++ exit when. The following expression is therefore ++ now valid raise Constraint_Error with "Element is null" ++ when Element = null;
      • ++
    • Pattern matching ++
        ++
      • The case statement has been extended to cover ++ records and arrays as well as finer grained casing on scalar ++ types. In the future it is expected to provide more compile ++ time guarantees when accessing discriminated fields. Case ++ exhaustion is supported for pattern matching. An example would ++ be 
        ++type Sign is (Neg, Zero, Pos);
++
++function Multiply (S1, S2 : Sign) return Sign is
++  (case (S1, S2) is
++     when (Neg, Neg) | (Pos, Pos) => Pos,
++     when (Zero, <>) | (<>, Zero) => Zero,
++     when (Neg, Pos) | (Pos, Neg) => Neg);
++
        • ++
      ++
      • ++
    ++
    • ++
  • gnatfind and gnatxref, which were ++ already deprecated, have been removed.
    • ++
  • Greatly expanded code covered by contracts. Thanks to this work, ++ there are now several Ada standard libraries fully proven in SPARK ++ which means they have no runtime nor logical errors. They are ++ mostly numeric and string handling libraries.
    • ++
  • Enable return-slot optimization for Pure ++ functions.
    • ++
  • General optimizations, improvements and additions to the ++ standard library. Performance, correctness and in some cases ++ stability was improved. Memory pools have also seen some minor ++ enhancements.
    • ++
  • Improvements to embedded-RTOS targets such as RTEMS, VxWorks and ++ QNX. Older targets were removed or cleaned.
    • ++
  • Added some hardening features.
    • ++
++ ++

C family

++
    ++
  • Support for __builtin_shufflevector compatible with ++ the clang language extension was added.
    • ++
  • Support for attribute unavailable was added.
    • ++
  • A new built-in function, __builtin_assoc_barrier, was added. ++ It can be used to inhibit re-association of floating-point ++ expressions.
    • ++
  • Support for __builtin_dynamic_object_size compatible with ++ the clang language extension was added.
    • ++
  • New warnings: ++
      ++
    • -Wbidi-chars ++ warns about potentially misleading UTF-8 ++ bidirectional control characters. The default is ++ -Wbidi-chars=unpaired ++ (PR103026)
      • ++
    • -Warray-compare ++ warns about comparisons between two operands of ++ array type (PR97573)
      • ++
    ++
    • ++
  • Enhancements to existing warnings: ++
      ++
    • -Wattributes ++ has been extended so that it's ++ possible to use -Wno-attributes=ns::attr or ++ -Wno-attributes=ns:: to suppress warnings about unknown scoped ++ attributes (in C++11 and C2X). Similarly, ++ #pragma GCC diagnostic ignored_attributes "vendor::attr" can ++ be used to achieve the same effect ++ (PR101940)
      • ++
    ++
    • ++
++ ++

C

++
    ++
  • Some new features from the upcoming C2X revision of the ISO C ++ standard are supported with -std=c2x ++ and -std=gnu2x. Some of these features are also ++ supported as extensions when compiling for older language versions. ++ In addition to the features listed, some features previously ++ supported as extensions and now added to the C standard are enabled ++ by default in C2X mode and not diagnosed with -std=c2x ++ -Wpedantic. ++
      ++
    • Digit separators (as in C++) are supported for C2X.
      • ++
    • The #elifdef and #elifndef ++ preprocessing directives are now supported.
      • ++
    • The printf and scanf format checking ++ with -Wformat ++ now supports the %b format ++ specified by C2X for binary integers, and the %B ++ format recommended by C2X for printf. ++
    • ++
++ ++

C++

++
    ++
  • Several C++23 features have been implemented: ++
      ++
    • P1938R3, if consteval ++ (PR100974)
      • ++
    • P0849R8, auto(x): ++ decay-copy in the language ++ (PR103049)
      • ++
    • P2242R3, Non-literal variables (and ++ labels and gotos) in constexpr functions ++ (PR102612)
      • ++
    • P2334R1, Support for preprocessing ++ directives elifdef and elifndef ++ (PR102616)
      • ++
    • P2360R0, Extend init-statement ++ to allow alias-declaration ++ (PR102617)
      • ++
    • P2128R6, Multidimensional subscript ++ operator
      • ++
    • DR 2397, auto specifier ++ for pointers and references to arrays ++ (PR100975)
      • ++
    ++
    • ++
  • Several C++ Defect Reports have been resolved, e.g.: ++
      ++
    • DR 960, Covariant functions and ++ lvalue/rvalue references
      • ++
    • DR 1227, Mixing immediate and ++ non-immediate contexts in deduction failure
      • ++
    • DR 1315, Restrictions on non-type ++ template arguments in partial specializations
      • ++
    • DR 2082, Referring to parameters ++ in unevaluated operands of default arguments
      • ++
    • DR 2351, void{}
      • ++
    • DR 2374, Overly permissive ++ specification of enum direct-list-initialization
      • ++
    • DR 2397, auto specifier ++ for pointers and references to arrays
      • ++
    • DR 2446, Questionable type-dependency ++ of concept-ids
      • ++
    ++
    • ++
  • New command-line option -fimplicit-constexpr can be used to ++ make inline functions implicitly constexpr ++ (git)
    • ++
  • New command-line option -ffold-simple-inlines can be used ++ to fold calls to certain trivial inline functions (currently ++ std::move, std::forward, ++ std::addressof and std::as_const). In contrast ++ to inlining such calls, folding means that no intermediate code or debug ++ information will be generated for them; this minimizes the abstraction ++ penalty incurred for using these functions versus using the fundamental ++ operations from which they're defined (e.g. std::move versus ++ static_cast). This flag is enabled by default when ++ -fno-inline is not active.
    • ++
  • Deduction guides can be declared at class scope ++ (PR79501)
    • ++
  • -Wuninitialized ++ warns about using uninitialized variables in ++ member initializer lists (PR19808) ++
    • ++
  • -Wint-in-bool-context ++ is now disabled when instantiating ++ a template (git)
    • ++
  • Stricter checking of attributes on friend declarations: if a friend ++ declaration has an attribute, that declaration must be a definition. ++ Moreover, a C++11 attribute cannot appear in the middle of the ++ decl-specifier-seq. ++ (PR99032)
    • ++
  • New warning options for C++ language mismatches: ++ -Wc++11-extensions, -Wc++14-extensions, ++ -Wc++17-extensions, -Wc++20-extensions, ++ and -Wc++23-extensions. They are enabled by default ++ and can be used to control existing pedwarns about occurrences of ++ new C++ constructs in code using an old C++ standard dialect.
    • ++
  • New warning ++ -Wmissing-requires ++ warns about missing requires ++ (git)
    • ++
  • The existing std::is_constant_evaluated in if ++ warning was extended to warn in more cases ++ (PR100995)
    • ++
  • -Waddress ++ has been enhanced so that it now warns about, for ++ instance, comparing the address of a nonstatic member function to null ++ (PR102103)
    • ++
  • Errors about narrowing are no longer hidden if they occur in system ++ headers
    • ++
  • Ordered comparison of null pointers is now rejected ++ (PR99701)
    • ++
  • Anonymous structs with bases are now rejected ++ (git)
    • ++
  • The compiler rejects taking the address of an immediate member function ++ (PR102753)
    • ++
  • The compiler has support for C++20 ++ __cpp_lib_is_pointer_interconvertible and ++ __cpp_lib_is_layout_compatible to help the C++ ++ library implement P0466, ++ Layout-compatibility and Pointer-interconvertibility Traits ++ (PR101539)
    • ++
  • Memory usage of constraint subsumption has been improved ++ (PR100828)
    • ++
  • constinit thread_local variables are optimized better ++ (PR101786)
    • ++
  • Support for C++17 std::hardware_destructive_interference_size ++ was added, along with the ++ -Winterference-size ++ warning ++ (git)
    • ++
  • Many bugs in the CTAD handling have been fixed ++ (PR101344, ++ PR101883, ++ PR89062, ++ PR101233, ++ PR88252, ++ PR86439, ++ PR98832, ++ PR102933 ...)
    • ++
  • Two-stage name lookup for dependent operator expressions has been ++ corrected (PR51577)
    • ++
  • Several issues with constrained variable templates have been fixed ++ (PR98486)
    • ++
  • The compiler performs less instantiating when doing speculative constant ++ evaluation ++ (git)
    • ++
  • Various diagnostic improvements; e.g., a more precise caret location for ++ pointer-to-member expressions
    • ++
  • The new -fconstexpr-fp-except flag allows IEC559 floating point ++ exceptions in constant-expressions.
    • ++
++ ++

Runtime Library (libstdc++)

++ ++
    ++
  • Improved experimental C++20 support, including: ++
      ++
    • std::vector, std::basic_string, ++ std::optional, and std::variant ++ can be used in constexpr functions.
      • ++
    • std::make_shared for arrays with default initialization, ++ and std::atomic<std::shared_ptr<T>>.
      • ++
    • Layout-compatibility and pointer-interconvertibility traits.
      • ++
    ++
    • ++
  • Improved experimental C++23 support, including: ++
      ++
    • Monadic operations for std::optional.
      • ++
    • std::move_only_function
      • ++
    • <spanstream>
      • ++
    • std::basic_string::resize_and_overwrite
      • ++
    • std::unique_ptr ++ can be used in constexpr functions.
      • ++
    • <stacktrace> ++ (not built by default, requires linking to an extra library).
      • ++
    • <stdatomic.h>
      • ++
    • std::invoke_r
      • ++
    • constexpr std::type_info::operator==
      • ++
    ++
    • ++
++ ++ ++ ++

Fortran

++
    ++
  • WG5/N1942, "TS 29113 Further Interoperability of Fortran with C", ++ is now fully supported. In addition to implementing previously ++ missing functionality, such as support for character arguments of ++ length greater than one in functions marked bind(c) ++ and gaps in the handling for assumed-rank arrays, numerous other bugs ++ have been fixed, and an extensive set of new conformance test cases ++ has been added. ++
    • ++
  • ++ GCC 12 now uses OPERATION as the name of the function to ++ the CO_REDUCE intrinsic for the pairwise reduction, thus ++ conforming to the Fortran 2018 standard. Previous versions ++ used OPERATOR which conforms to TS 18508. ++
    • ++
  • ++ On POWER systems which support it, the -mabi=ieeelongdouble ++ option now selects the IEEE 128-bit floating point format ++ for REAL(KIND=16). ++ R16_IBM and R16_IEEE have been added to the ++ -fconvert option, the CONVERT specifyer of ++ the OPEN statement and the GFORTRAN_CONVERT_UNIT ++ environment variable. ++
    • ++
++ ++ ++ ++ ++

libgccjit

++ ++ ++ ++ ++

New Targets and Target Specific Improvements

++ ++

AArch64 & arm

++
    ++
  • Newer revisions of the Arm Architecture are supported as arguments to the ++ -march option: armv8.7-a, armv8.8-a, armv9-a.
    • ++
  • The Arm Cortex-A510 CPU is now supported through the cortex-a510 ++ argument to the -mcpu and -mtune options. ++
    • ++
  • GCC can now auto-vectorize operations performing sign-differing ++ dot-product operations, taking advantage of instructions in the Advanced SIMD ++ (AArch64/AArch32) and SVE (AArch64) instruction sets. ++
    • ++
++ ++

AArch64

++
    ++
  • A number of new CPUs are supported through the -mcpu and ++ -mtune options (GCC identifiers in parentheses). ++
      ++
    • Ampere-1 (ampere1).
      • ++
    • Arm Cortex-A710 (cortex-a710).
      • ++
    • Arm Cortex-X2 (cortex-x2).
      • ++
    ++
    • ++
  • The 64-byte atomic load/store intrinsics to accelerator memory from the ++ ++ 2020 Arm Architecture extensions are supported through the ++ +ls64 option extension.
    • ++
  • Initial code generation support is supported for hardware instructions ++ used to accelerate the memcpy,memmove and ++ memset standard functions. These instructions can be generated ++ when compiling with the +mopsoption extension.
    • ++
  • The ACLE Advanced SIMD intrinsics accessible through the ++ arm_neon.h header have been significantly reimplemented and ++ generate higher-performing code than previous GCC versions.
    • ++
  • The option -mtune=neoverse-512tvb is added to tune for Arm ++ Neoverse cores that have a total vector bandwidth of 512 bits. Please refer ++ to the documentation for more details.
    • ++
++ ++

AMD Radeon (GCN)

++
    ++
  • Debug experience with ROCGDB has been improved.
    • ++
  • Support for the type __int128_t/integer(kind=16) ++ was added.
    • ++
  • For offloading, the limitation of using only one wavefront per compute ++ unit (CU) has been lifted. Up to 40 workgroups per CU and 16 wavefronts ++ per workgroup are supported (up to a limit of 40 wavefronts in total, ++ per CU). Additionally, the number of used wavefronts and workgroups was ++ tuned for performance.
    • ++
++ ++ ++ ++

arm

++
    ++
  • Support is added for accessing the stack canary value via the TLS register ++ through the -fstack-protector-guard=tls and ++ -mstack-protector-guard-offset= options. This intended for use ++ in Linux kernel development. Please refer to the documentation for more ++ details.
    • ++
++ ++ ++ ++

BPF

++
    ++
  • Support for CO-RE (compile-once, run-everywhere) has been added ++ to the BPF backend. CO-RE allows to compile portable BPF ++ programs that are able to run among different versions of the ++ Linux kernel. ++
    • ++
++ ++

IA-32/x86-64

++
    ++
  • New ISA extension support for Intel AVX512-FP16 was added. ++ AVX512FP16 intrinsics are available via the -mavx512fp16 ++ compiler switch. ++
    • ++
  • For both C and C++ the _Float16 type is supported on ++ x86 systems with SSE2 enabled. Without {-mavx512fp16}, ++ all operations will be emulated in software and float ++ instructions. ++
  • Mitigation against straight line speculation (SLS) for function ++ return and indirect jump is supported via ++ -mharden-sls=[none|all|return|indirect-jmp]. ++
    • ++
  • Add CS prefix to call and jmp to indirect thunk with branch target ++ in r8-r15 registers via -mindirect-branch-cs-prefix. ++
    • ++
  • Always use global offset table (GOT) to access external data and ++ function symbols when the new -mno-direct-extern-access ++ command-line option is specified. ++
    • ++
++ ++

LoongArch

++
    ++
  • Support for the LoongArch architecture instruction set has been added.
    • ++
  • The Loongson CPU codename LA464 and LoongArch 64-bit generic CPU codename loongarch64 ++ are supported through the -march= and -mtune= options ++ (GCC identifiers in parentheses).
    • ++
      ++
    • Loongson LA464 core (la464).
      • ++
    • LoongArch 64-bit generic core (loongarch64).
      • ++
    ++
++ ++

MIPS

++
    ++
  • The ABI passing arguments ++ containing zero-width fields (for example, C/C++ zero-width ++ bit-fields, GNU C/C++ zero-length arrays, and GNU C empty structs) ++ has changed. Now a zero-width field will not prevent an aligned ++ 64-bit floating-point field next to it from being passed through ++ FPR. This is compatible with LLVM, but incompatible with previous ++ GCC releases. GCC 12 on MIPS will report such incompatibilities as ++ an inform unless -Wno-psabi is used. ++
    • ++
  • The ABI returning values ++ containing C++17 empty bases has changed. Now an empty base will ++ not prevent an aggregate containing only one or two floating-point ++ fields from being returned through FPR. This is compatible with ++ GCC 6 and earlier, but incompatible with GCC 7 through 11. GCC 12 on ++ MIPS will report such incompatibilities as an inform unless ++ -Wno-psabi is used. ++
    • ++
++ ++ ++ ++ ++ ++ ++ ++ ++ ++

NVPTX

++
    ++
  • The -march flag has been added. The -misa ++ flag is now considered an alias of the -march flag.
    • ++
  • Support for PTX ISA target architectures sm_53, ++ sm_70, sm_75 and sm_80 has been ++ added. These can be specified using the -march flag.
    • ++
  • The default PTX ISA target architecture has been set back ++ to sm_30, to fix support for sm_30 boards.
    • ++
  • The -march-map flag has been added. The ++ -march-map value will be mapped to an valid ++ -march flag value. For instance, ++ -march-map=sm_50 maps to -march=sm_35. ++ This can be used to specify that generated code is to be executed on a ++ board with at least some specific compute capability, without having to ++ know the valid values for the -march flag.
    • ++
  • The -mptx flag has been added to specify the PTX ISA version ++ for the generated code; permitted values are 3.1 ++ (matches previous GCC versions), 6.0, 6.3, ++ and 7.0. If not specified, the used version is the minimal ++ version required for -march but at least 6.0. ++
    • ++
  • An mptx-3.1 multilib was added. This allows using older ++ drivers which do not support PTX ISA version 6.0.
    • ++
  • The new __PTX_SM__ predefined macro allows code to check the ++ PTX ISA target architecture being targeted by the compiler.
    • ++
  • The new __PTX_ISA_VERSION_MAJOR__ ++ and __PTX_ISA_VERSION_MINOR__ predefined macros allows code ++ to check the PTX ISA version being targeted by the compiler.
    • ++
++ ++ ++

PowerPC / PowerPC64 / RS6000

++
    ++
  • ++ The internal implementation of Power's target-specific built-in functions ++ has been rewritten to be easier and less error-prone to maintain. Every ++ attempt has been made to ensure that the new behavior matches the old ++ behavior, but inevitably some bugs can be expected. Please report any ++ problems via GCC Bugzilla. ++
    • ++
  • ++ The built-in functions __builtin_get_texasr, ++ __builtin_get_texasru, __builtin_get_tfhar, ++ __builtin_get_tfiar, __builtin_set_texasr, ++ __builtin_set_texasru, __builtin_set_tfhar, and ++ __builtin_set_tfiar now behave as documented in all ++ supported configurations. On prior releases, the arguments and return ++ values of these functions were treated as unsigned long long ++ instead of as unsigned long, when the options -m32 ++ -mpowerpc64 were in effect. ++
    • ++
  • ++ The overloaded built-in functions vec_cntlz_lsbb and ++ vec_cnttz_lsbb now behave as documented. On prior releases, ++ these built-in functions had incorrect semantics on little-endian targets. ++
    • ++
++ ++

PRU

++
    ++
  • The __regio_symbol variable qualifier has been added. ++ It allows easier access in C programs to the __R30 and ++ __R31 CPU I/O registers. ++
    • ++
++ ++ ++

RISC-V

++
    ++
  • Default ISA spec version was bump to 20191213, more detail see this ++ announcement
    • ++
  • New ISA extension support for zba, zbb, zbc, zbs was added.
    • ++
  • New ISA extension support for vector and scalar crypto was added, only ++ support architecture testing marco and -march= parsing.
    • ++
  • The option -mtune=thead-c906 is added to tune for T-HEAD ++ c906 cores.
    • ++ ++
++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++

Operating Systems

++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++

Improvements to Static Analyzer

++
    ++
  • The analyzer has gained a -Wanalyzer-use-of-uninitialized-value ++ warning, similar to ++ -Wuninitialized ++ and ++ -Wmaybe-uninitialized, ++ but based on an interprocedural path-sensitive analysis ++ (PR95006). ++

    Such warnings are not disabled by the new ++ -ftrivial-auto-var-init ++ (see below), as the latter is considered a mitigation option.

    ++
    • ++
  • -Wanalyzer-write-to-const ++ and ++ -Wanalyzer-write-to-string-literal ++ will now check for ++ __attribute__ ((access, ....)) ++ on calls to externally-defined functions, and complain about read-only ++ regions pointed to by arguments marked with a write_only ++ or read_write attribute ++ (PR104793). ++
    • ++
  • The analyzer's "taint" mode, activated by ++ -fanalyzer-checker=taint ++ (in addition to -fanalyzer), ++ has gained four new taint-based warnings: ++ ++

    The existing ++ -Wanalyzer-tainted-array-index ++ has been reworded to talk about "attacker-controlled" rather than ++ "tainted" values, for consistency with the new warnings. ++

    ++

    A new __attribute__ ((tainted_args)) has been ++ added to the C and C++ frontends, usable on functions, and on ++ function pointer callback fields in structs. The analyzer's taint ++ mode will treat all parameters and buffers pointed to by parameters ++ of such functions as being attacked-controlled, such as for ++ annotating system calls in an operating system kernel as being an ++ "attack surface". ++

    ++
    • ++
  • The analyzer now respects ++ __attribute__((const)): ++ it will treat such functions as returning the same value when given ++ the same inputs (PR104434), ++ and as having no side effects (PR104576). ++
    • ++
  • The analyzer is now able to split its analysis into multiple ++ execution paths in places where there isn't a split in the control ++ flow graph. For example, it now handles realloc calls by ++ splitting the execution path into three possible outcomes for the ++ call: ++
      ++
    • failure, returning NULL
      • ++
    • success, growing the buffer in-place without moving it
      • ++
    • success, allocating a new buffer, copying the content of the old ++ buffer to it, and freeing the old buffer
      • ++
    ++
    • ++
  • The analyzer's interprocedural path exploration logic is now able to ++ track calls through function pointers. ++
    • ++
  • The analyzer now makes the assumption that if we know PTR is non-NULL, ++ then (PTR + OFFSET) is also non-NULL. This isn't strictly true, but ++ eliminates false positives in practice ++ (PR101962). ++
    • ++
  • The analyzer has gained some initial support for inline assembler ++ code. This is extremely limited, and is purely to help suppress ++ false positives when analyzing the Linux kernel, which makes heavy ++ use of inline assembler (PR101570). ++
    • ++
  • The way the analyzer tracks the state of memory along an execution ++ path has been improved in various ways for GCC 12: ++
      ++
    • An optimization for representing bulk updates to memory (e.g. ++ zero fills) has been removed as it never worked well. In GCC 12 ++ it has been replaced with a simpler and more accurate approach, ++ eliminating many false positives ++ (PR95006). ++
      • ++
    • Various optimizations have been added, speeding up the analysis ++ on a particularly problematic source file from 4 minutes down to ++ 17 seconds ++ (PR104943, ++ PR104954, and ++ PR104955). ++
      • ++
    • The analyzer now tracks the sizes of dynamically-allocated regions, ++ both on the heap (via malloc etc) and stack ++ (via alloca), though none of the analyzer warnings make ++ use of this yet in GCC 12.
      • ++
    ++
    • ++
  • The analyzer's handling of switch statements has been rewritten, ++ fixing various bugs. ++
    • ++
++ ++ ++ ++ ++ ++

Other significant improvements

++ ++

Eliminating uninitialized variables

++ ++
    ++
  • GCC can now initialize all stack variables implicitly, including ++ padding. This is intended to eliminate all classes of uninitialized ++ stack variable flaws. Lack of explicit initialization will still ++ warn when ++ -Wuninitialized ++ is active. For best debugging, use of the new command-line option ++ -ftrivial-auto-var-init=pattern ++ can be used to fill variables with a repeated 0xFE pattern, which tends to ++ illuminate many bugs (e.g. pointers receive invalid addresses, sizes ++ and indices are very large). For best production results, the new ++ command-line option ++ -ftrivial-auto-var-init=zero ++ can be ++ used to fill variables with 0x00, which tends to provide ++ a safer state for bugs (e.g. pointers are NULL, strings ++ are NUL filled, and sizes and indices are 0). ++
    • ++
++ ++

Debugging formats

++ ++
    ++
  • GCC can now generate debugging information ++ in CTF, a lightweight debugging ++ format that provides information about C types and the ++ association between functions and data symbols and types. This ++ format is designed to be embedded in ELF files and to be very ++ compact and simple. A new command-line ++ option -gctf enables the generation of CTF. ++
    • ++
  • GCC can now generate debugging information in BTF. This is a ++ debugging format mainly used in BPF programs and the Linux ++ kernel. The compiler can generate BTF for any target, when ++ enabled with the command-line option -gbtf ++
    • ++
++ ++ ++ ++

GCC 12.1

++ ++

This is the list ++of problem reports (PRs) from GCC's bug tracking system that are ++known to be fixed in the 12.1 release. This list might not be ++complete (that is, it is possible that some PRs that have been fixed ++are not listed here).

++ ++ ++ ++ ++ diff --cc debian/README.Bugs.m4 index 0000000,0000000..a2d1606 new file mode 100644 --- /dev/null +++ b/debian/README.Bugs.m4 @@@ -1,0 -1,0 +1,333 @@@ ++Reporting Bugs in the GNU Compiler Collection for DIST ++======================================================== ++ ++Before reporting a bug, please ++------------------------------ ++ ++- Check that the behaviour really is a bug. Have a look into some ++ ANSI standards document. ++ ++- Check the list of well known bugs: http://gcc.gnu.org/bugs.html#known ++ ++- Try to reproduce the bug with a current GCC development snapshot. You ++ usually can get a recent development snapshot from the gcc-snapshot ++ifelse(DIST,`Debian',`dnl ++ package in the unstable (or experimental) distribution. ++ ++ See: http://packages.debian.org/gcc-snapshot ++', DIST, `Ubuntu',`dnl ++ package in the current development distribution. ++ ++ See: http://archive.ubuntu.com/ubuntu/pool/universe/g/gcc-snapshot/ ++')dnl ++ ++- Try to find out if the bug is a regression (an older GCC version does ++ not show the bug). ++ ++- Check if the bug is already reported in the bug tracking systems. ++ ++ifelse(DIST,`Debian',`dnl ++ Debian: http://bugs.debian.org/debian-gcc@lists.debian.org ++', DIST, `Ubuntu',`dnl ++ Ubuntu: https://bugs.launchpad.net/~ubuntu-toolchain/+packagebugs ++ Debian: http://bugs.debian.org/debian-gcc@lists.debian.org ++')dnl ++ Upstream: http://gcc.gnu.org/bugzilla/ ++ ++ ++Where to report a bug ++--------------------- ++ ++ifelse(DIST,`Debian',`dnl ++Please report bugs found in the packaging of GCC to the Debian bug tracking ++system. See http://www.debian.org/Bugs/ for instructions (or use the ++reportbug script). ++', DIST, `Ubuntu',`dnl ++Please report bugs found in the packaging of GCC to Launchpad. See below ++how issues should be reported. ++')dnl ++ ++DIST's current policy is to closely follow the upstream development and ++only apply a minimal set of patches (which are summarized in the README.Debian ++document). ++ ++ifelse(DIST,`Debian',`dnl ++If you think you have found an upstream bug, you did check the section ++above ("Before reporting a bug") and are able to provide a complete bug ++report (see below "How to report a bug"), then you may help the Debian ++GCC package maintainers, if you report the bug upstream and then submit ++a bug report to the Debian BTS and tell us the upstream report number. ++This way you are able to follow the upstream bug handling as well. If in ++doubt, report the bug to the Debian BTS (but read "How to report a bug" ++below). ++', DIST, `Ubuntu',`dnl ++If you think you have found an upstream bug, you did check the section ++above ("Before reporting a bug") and are able to provide a complete bug ++report (see below "How to report a bug"), then you may help the Ubuntu ++GCC package maintainers, if you report the bug upstream and then submit ++a bug report to Launchpad and tell us the upstream report number. ++This way you are able to follow the upstream bug handling as well. If in ++doubt, report the bug to Launchpad (but read "How to report a bug" below). ++ ++Report the issue to https://bugs.launchpad.net/ubuntu/+source/SRCNAME. ++')dnl ++ ++ ++How to report a bug ++------------------- ++ ++There are complete instructions in the gcc info manual (found in the ++gcc-doc package), section Bugs. ++ ++The manual can be read using `M-x info' in Emacs, or if the GNU info ++program is installed on your system by `info --node "(gcc)Bugs"'. Or see ++the file BUGS included with the gcc source code. ++ ++Online bug reporting instructions can be found at ++ ++ http://gcc.gnu.org/bugs.html ++ ++[Some paragraphs taken from the above URL] ++ ++The main purpose of a bug report is to enable us to fix the bug. The ++most important prerequisite for this is that the report must be ++complete and self-contained, which we explain in detail below. ++ ++Before you report a bug, please check the list of well-known bugs and, ++if possible in any way, try a current development snapshot. ++ ++Summarized bug reporting instructions ++------------------------------------- ++ ++What we need ++ ++Please include in your bug report all of the following items, the ++first three of which can be obtained from the output of gcc -v: ++ ++ * the exact version of GCC; ++ * the system type; ++ * the options given when GCC was configured/built; ++ * the complete command line that triggers the bug; ++ * the compiler output (error messages, warnings, etc.); and ++ * the preprocessed file (*.i*) that triggers the bug, generated by ++ adding -save-temps to the complete compilation command, or, in ++ the case of a bug report for the GNAT front end, a complete set ++ of source files (see below). ++ ++What we do not want ++ ++ * A source file that #includes header files that are left out ++ of the bug report (see above) ++ * That source file and a collection of header files. ++ * An attached archive (tar, zip, shar, whatever) containing all ++ (or some :-) of the above. ++ * A code snippet that won't cause the compiler to produce the ++ exact output mentioned in the bug report (e.g., a snippet with ++ just a few lines around the one that apparently triggers the ++ bug, with some pieces replaced with ellipses or comments for ++ extra obfuscation :-) ++ * The location (URL) of the package that failed to build (we won't ++ download it, anyway, since you've already given us what we need ++ to duplicate the bug, haven't you? :-) ++ * An error that occurs only some of the times a certain file is ++ compiled, such that retrying a sufficient number of times ++ results in a successful compilation; this is a symptom of a ++ hardware problem, not of a compiler bug (sorry) ++ * E-mail messages that complement previous, incomplete bug ++ reports. Post a new, self-contained, full bug report instead, if ++ possible as a follow-up to the original bug report ++ * Assembly files (*.s) produced by the compiler, or any binary files, ++ such as object files, executables, core files, or precompiled ++ header files ++ * Duplicate bug reports, or reports of bugs already fixed in the ++ development tree, especially those that have already been ++ reported as fixed last week :-) ++ * Bugs in the assembler, the linker or the C library. These are ++ separate projects, with separate mailing lists and different bug ++ reporting procedures ++ * Bugs in releases or snapshots of GCC not issued by the GNU ++ Project. Report them to whoever provided you with the release ++ * Questions about the correctness or the expected behavior of ++ certain constructs that are not GCC extensions. Ask them in ++ forums dedicated to the discussion of the programming language ++ ++ ++Known Bugs and Non-Bugs ++----------------------- ++ ++[Please see /usr/share/doc/gcc/FAQ or http://gcc.gnu.org/faq.html first] ++ ++ ++C++ exceptions don't work with C libraries ++------------------------------------------ ++ ++[Taken from the closed bug report #22769] C++ exceptions don't work ++with C libraries, if the C code wasn't designed to be thrown through. ++A solution could be to translate all C libraries with -fexceptions. ++Mostly trying to throw an exception in a callback function (qsort, ++Tcl command callbacks, etc ...). Example: ++ ++ #include ++ #include ++ ++ class A {}; ++ ++ static ++ int SortCondition(void const*, void const*) ++ { ++ printf("throwing 'sortcondition' exception\n"); ++ throw A(); ++ } ++ ++ int main(int argc, char *argv[]) ++ { ++ int list[2]; ++ ++ try { ++ SortCondition(NULL,NULL); ++ } catch (A) { ++ printf("caught test-sortcondition exception\n"); ++ } ++ try { ++ qsort(&list, sizeof(list)/sizeof(list[0]),sizeof(list[0]), ++ &SortCondition); ++ } catch (A) { ++ printf("caught real-sortcondition exception\n"); ++ } ++ return 0; ++} ++ ++Andrew Macleod responded: ++ ++When compiled with the table driven exception handling, exception can only ++be thrown through functions which have been compiled with the table driven EH. ++If a function isn't compiled that way, then we do not have the frame ++unwinding information required to restore the registers when unwinding. ++ ++I believe the setjmp/longjmp mechanism will throw through things like this, ++but its produces much messier code. (-fsjlj-exceptions) ++ ++The C compiler does support exceptions, you just have to turn them on ++with -fexceptions. ++ ++Your main options are to: ++ a) Don't use callbacks, or at least don't throw through them. ++ b) Get the source and compile the library with -fexceptions (You have to ++ explicitly turn on exceptions in the C compiler) ++ c) always use -fsjlj-exceptions (boo, bad choice :-) ++ ++ ++g++: "undefined reference" to static const array in class ++--------------------------------------------------------- ++ ++The following code compiles under GNU C++ 2.7.2 with correct results, ++but produces the same linker error with GNU C++ 2.95.2. ++Alexandre Oliva responded: ++ ++All of them are correct. A static data member *must* be defined ++outside the class body even if it is initialized within the class ++body, but no diagnostic is required if the definition is missing. It ++turns out that some releases do emit references to the missing symbol, ++while others optimize it away. ++ ++#include ++ ++class Test ++{ ++ public: ++ Test(const char *q); ++ protected: ++ static const unsigned char Jam_signature[4] = "JAM"; ++}; ++ ++Test::Test(const char *q) ++{ ++ if (memcmp(q, Jam_signature, sizeof(Jam_signature)) != 0) ++ cerr << "Hello world!\n"; ++} ++ ++int main(void) ++{ ++ Test::Test("JAM"); ++ return 0; ++} ++ ++g++: g++ causes passing non const ptr to ptr to a func with const arg ++ to cause an error (not a bug) ++--------------------------------------------------------------------- ++ ++Example: ++ ++#include ++void test(const char **b){ ++ printf ("%s\n",*b); ++} ++int main(void){ ++ char *test1="aoeu"; ++ test(&test1); ++} ++ ++make const ++g++ const.cc -o const ++const.cc: In function `int main()': ++const.cc:7: passing `char **' as argument 1 of `test(const char **)' adds cv-quals without intervening `const' ++make: *** [const] Error 1 ++ ++Answer from "Martin v. Loewis" : ++ ++> ok... maybe I missed something.. I haven't really kept up with the latest in ++> C++ news. But I've never heard anything even remotly close to passing a non ++> const var into a const arg being an error before. ++ ++Thanks for your bug report. This is a not a bug in the compiler, but ++in your code. The standard, in 4.4/4, puts it that way ++ ++# A conversion can add cv-qualifiers at levels other than the first in ++# multi-level pointers, subject to the following rules: ++# Two pointer types T1 and T2 are similar if there exists a type T and ++# integer n > 0 such that: ++# T1 is cv(1,0) pointer to cv(1,1) pointer to ... cv(1,n-1) ++# pointer to cv(1,n) T ++# and ++# T2 is cv(2,0) pointer to cv(2,1) pointer to ... cv(2,n-1) ++# pointer to cv(2,n) T ++# where each cv(i,j) is const, volatile, const volatile, or ++# nothing. The n-tuple of cv-qualifiers after the first in a pointer ++# type, e.g., cv(1,1) , cv(1,2) , ... , cv(1,n) in the pointer type ++# T1, is called the cv-qualification signature of the pointer type. An ++# expression of type T1 can be converted to type T2 if and only if the ++# following conditions are satisfied: ++# - the pointer types are similar. ++# - for every j > 0, if const is in cv(1,j) then const is in cv(2,j) , ++# and similarly for volatile. ++# - if the cv(1,j) and cv(2,j) are different, then const is in every ++# cv(2,k) for 0 < k < j. ++ ++It is the last rule that your code violates. The standard gives then ++the following example as a rationale: ++ ++# [Note: if a program could assign a pointer of type T** to a pointer ++# of type const T** (that is, if line //1 below was allowed), a ++# program could inadvertently modify a const object (as it is done on ++# line //2). For example, ++# int main() { ++# const char c = 'c'; ++# char* pc; ++# const char** pcc = &pc; //1: not allowed ++# *pcc = &c; ++# *pc = 'C'; //2: modifies a const object ++# } ++# - end note] ++ ++If you question this line of reasoning, please discuss it in one of ++the public C++ fora first, eg. comp.lang.c++.moderated, or ++comp.std.c++. ++ ++ ++cpp removes blank lines ++----------------------- ++ ++With the new cpp, you need to add -traditional to the "cpp -P" args, else ++blank lines get removed. ++ ++[EDIT ME: scan Debian bug reports and write some nice summaries ...] diff --cc debian/README.C++ index 0000000,0000000..8cc40f8 new file mode 100644 --- /dev/null +++ b/debian/README.C++ @@@ -1,0 -1,0 +1,35 @@@ ++libstdc++ is an implementation of the Standard C++ Library, including the ++Standard Template Library (i.e. as specified by ANSI and ISO). ++ ++Some notes on porting applications from libstdc++-2.90 (or earlier versions) ++to libstdc++-v3 can be found in the libstdc++6-4.3-doc package. After the ++installation of the package, look at: ++ ++ file:///usr/share/doc/gcc-4.3-base/libstdc++/html/17_intro/porting-howto.html ++ ++On Debian GNU/Linux you find additional documentation in the ++libstdc++6-4.3-doc package. After installing these packages, ++point your browser to ++ ++ file:///usr/share/doc/libstdc++6-4.3-doc/libstdc++/html/index.html ++ ++Other documentation can be found: ++ ++ http://www.sgi.com/tech/stl/ ++ ++with a good, recent, book on C++. ++ ++A great deal of useful C++ documentation can be found in the C++ FAQ-Lite, ++maintained by Marshall Cline . It can be found at the ++mirror sites linked from the following URL (this was last updated on ++2010/09/11): ++ ++ http://www.parashift.com/c++-faq/ ++ ++or use some search engin site to find it, e.g.: ++ ++ http://www.google.com/search?q=c%2B%2B+faq+lite ++ ++Be careful not to use outdated mirors. ++ ++Please send updates to this list as bug report for the g++ package. diff --cc debian/README.Debian index 0000000,0000000..b2275d4 new file mode 100644 --- /dev/null +++ b/debian/README.Debian @@@ -1,0 -1,0 +1,45 @@@ ++ The Debian GNU Compiler Collection setup ++ ======================================== ++ ++Please see the README.Debian in /usr/share/doc/gcc, contained in the ++gcc package for a description of the setup of the different compiler ++versions. ++ ++For general discussion about the Debian toolchain (GCC, glibc, binutils) ++please use the mailing list debian-toolchain@lists.debian.org; for GCC ++specific things, please use debian-gcc@lists.debian.org. When in doubt ++use the debian-toolchain ML. ++ ++ ++Maintainers of these packages ++----------------------------- ++ ++Matthias Klose ++Ludovic Brenta (gnat) ++Iain Buclaw (gdc) ++Aurelien Jarno (mips*-linux) ++Aurelien Jarno (s390X*-linux) ++ ++The following ports lack maintenance in Debian: powerpc, ppc64, ++sparc, sparc64 (unmentioned ports are usually handled by the Debian ++porters). ++ ++Former and/or inactive maintainers of these packages ++---------------------------------------------------- ++ ++Falk Hueffner (alpha-linux) ++Ray Dassen ++Jeff Bailey (hurd-i386) ++Joel Baker (netbsd-i386) ++Randolph Chung (ia64-linux) ++Philip Blundell (arm-linux) ++Ben Collins (sparc-linux) ++Dan Jacobowitz (powerpc-linux) ++Thiemo Seufer (mips*-linux) ++Matt Taggart (hppa-linux) ++Gerhard Tonn (s390-linux) ++Roman Zippel (m68k-linux) ++Arthur Loiret (gdc) ++ ++=============================================================================== ++ diff --cc debian/README.cross index 0000000,0000000..ccf245b new file mode 100644 --- /dev/null +++ b/debian/README.cross @@@ -1,0 -1,0 +1,22 @@@ ++Building cross-compiler Debian packages ++--------------------------------------- ++ ++The packaging for cross toolchains is now in the archive, including ++all frontends, and targeting all release and ports architectures. ++ ++Cross toolchains are built from the following source packages: ++ ++ - binutils ++ - cross-toolchain-base ++ - cross-toolchain-base-ports ++ - gcc-7-cross ++ - gcc-7-cross-ports ++ - gcc-8-cross ++ - gcc-8-cross-ports ++ - gcc-9-cross ++ - gcc-9-cross-ports ++ - gcc-defaults ++ - gcc-defaults-ports ++ ++Issues about the cross toolchains should be filed for one of the ++above source packages. diff --cc debian/README.gnat index 0000000,0000000..a87e680 new file mode 100644 --- /dev/null +++ b/debian/README.gnat @@@ -1,0 -1,0 +1,35 @@@ ++If you want to develop Ada programs and libraries on Debian, please ++read the Debian Policy for Ada: ++ ++http://people.debian.org/~lbrenta/debian-ada-policy.html ++ ++The default Ada compiler is and always will be the package `gnat'. ++Debian contains many programs and libraries compiled with it, which ++are all ABI-compatible. ++ ++Starting with gnat-4.2, Debian provides both zero-cost and ++setjump/longjump versions of the run-time library. The zero-cost ++exception handling mechanism is the default as it provides the best ++performance. The setjump/longjump exception handling mechanism is new ++and only provided as a static library. It is necessary to use this ++exception handling mechanism in distributed (annex E) programs. If ++you wish to use the new sjlj library: ++ ++1) call gnatmake with --RTS=sjlj ++2) call gnatbind with -static ++ ++Do NOT link your programs with libgnat-4.2.so, because it uses the ZCX ++mechanism. ++ ++ ++This package also includes small tools covering specific needs. ++ ++* When linking objects compiled from both Ada and C sources, you need ++ to use compatible versions of the Ada and C compilers. The ++ /usr/bin/gnatgcc symbolic link targets a version of the C compiler ++ compatible with the default Ada compiler, and may differ from the ++ default C compiler /usr/bin/gcc. ++ ++* When packaging Ada sources for Debian, you may want to read the ++ /usr/share/ada/debian_packaging.mk Makefile snippet from the gnat ++ package. diff --cc debian/README.libstdc++-baseline.in index 0000000,0000000..e771c16 new file mode 100644 --- /dev/null +++ b/debian/README.libstdc++-baseline.in @@@ -1,0 -1,0 +1,2 @@@ ++The libstdc++ baseline file is a list of symbols exported by the ++libstdc++ library. diff --cc debian/README.maintainers index 0000000,0000000..9240455 new file mode 100644 --- /dev/null +++ b/debian/README.maintainers @@@ -1,0 -1,0 +1,190 @@@ ++-*- Outline -*- ++ ++Read this file if you are a Debian Developer or would like to become ++one, or if you would like to create your own binary packages of GCC. ++ ++* Overview ++ ++From the GCC sources, Debian currently builds 3 source packages and ++almost 100 binary packages, using a single set of build scripts. The ++3 source packages are: ++ ++gcc-x.y: C, C++, Fortran, Objective-C and Objective-C++, plus many ++ common libraries like libssp and libgcc. ++gnat-x.y: Ada. ++ ++The way we do this is quite peculiar, so listen up :) ++ ++When we build from the gcc-x.y source package, we produce, among many ++others, a gcc-x.y-source binary package that contains the pristine ++upstream tarball and some Debian-specific patches. Any user can then ++install this package on their Debian system, and will have the full ++souces in /usr/src/gcc-x.y/gcc-.tar.bz2, along with the ++Makefile snippets that unpack and patch them. ++ ++The intended use for this package is twofold: (a) allow users to build ++their own cross-compilers, and (b) build the other packages like ++gnat-x.y. ++ ++- gcc-x.y requires only a C compiler to build and produces C, C++, ++ Fortran, Go and Objective-C compilers and libraries. It also ++ produces the binary package gcc-x.y-source containing all the ++ sources and patches in a tarball. ++ ++- gnat-x.y build-depends on gcc-x.y-source and an Ada compiler. It ++ does not even have an .orig.tar.bz2 package; it is a Debian native ++ package. ++ ++The benefits of this split are many: ++ ++- bootstrapping a subset of languages is much faster than ++ bootstrapping all languages and libraries (which can take a full ++ week on slow architectures like mips or arm) ++ ++- the language maintainers don't have to wait for each other ++ ++- for new ports, the absence of a port of, say, gnat-x.y does not ++ block the porting of gcc-x.y. ++ ++gcc-x.y-source is also intended for interested users to build ++cross-compiler packages. Debian cannot provide all possible ++cross-compiler packages (i.e. all possible host, target, language and ++library combinations), so instead tries to facilitate building them. ++ ++* The build sequence ++ ++As for all other Debian packages, you build GCC by calling ++debian/rules. ++ ++The first thing debian/rules does it to look at the top-most entry in ++debian/changelog: this tells it which source package it is building. ++For example, if the first entry in debian/changelog reads: ++ ++gnat-6 (6.2.0-1) unstable; urgency=low ++ ++ * Upload as gnat-6. ++ ++ -- Ludovic Brenta Tue, 26 Jun 2007 00:26:42 +0200 ++ ++then, debian/rules will build only the gnat binary packages. ++ ++The second step is to build debian/control from debian/control.m4 and ++a complex set of rules specified in debian/rules.conf. The resulting ++control file contains only the binary packages to be built. ++ ++The third step is to select which patches to apply (this is done in ++debian/rules.defs), and then to apply the selected patches (see ++debian/rules.patch). The result of this step is a generated ++debian/patches/series file for use by quilt. ++ ++The fourth step is to unpack the GCC source tarball. This tarball is ++either in the build directory (when building gcc-x.y), or in ++/usr/src/gcc-x.y/gcc-x.y.z.tar.xz (when building the other source ++packages). ++ ++The fifth step is to apply all patches to the unpacked sources with ++quilt. ++ ++The sixth step is to create a "build" directory, cd into it, call ++../src/configure, and bootstrap the compiler and libraries selected. ++This is in debian/rules2. ++ ++The seventh step is to call "make install" in the build directory: ++this installs the compiler and libraries into debian/tmp ++(i.e. debian/tmp/usr/bin/gcc, etc.) ++ ++The eighth step is to run the GCC test suite. This actually takes at ++least as much time as bootstrapping, and you can disable it by setting ++WITHOUT_CHECK to "yes" in the environment. ++ ++The ninth step is to build the binary packages, i.e. the .debs. This ++is done by a set of language- and architecture-dependent Makefile ++snippets in the debian/rules.d/ directory, which move files from the ++debian/tmp tree to the debian/ trees. ++ ++* Making your own packages ++ ++In this example, we will build our own gnat-x.y package. ++ ++1) Install gcc-x.y-source, which contains the real sources: ++ ++# aptitude install gcc-x.y-source ++ ++2) Create a build directory: ++ ++$ mkdir gnat-x.y-x.y.z; cd gnat-x.y-x.y.z ++ ++3) Checkout from Subversion: ++ ++$ svn checkout svn://svn.debian.org/gcccvs/branches/sid/gcc-x.y/debian ++ ++4) Edit the debian/changelog file, adding a new entry at the top that ++ starts with "gnat-x.y". ++ ++5) Generate the debian/control file, adjusted for gnat: ++ ++$ debian/rules control ++ ++8) Build: ++ ++$ dpkg-buildpackage ++ ++* Hints ++ ++You need a powerful machine to build GCC. The larger, the better. ++The build scripts take advantage of as many CPU threads as are ++available in your box (for example: 2 threads on a dual-core amd64; 4 ++threads on a dual-core POWER5; 32 threads on an 8-core UltraSPARC T1, ++etc.). ++ ++If you have 2 GB or more of physical RAM, you can achieve maximum ++performance by building in a tmpfs, like this: ++ ++1) as root, create the new tmpfs: ++ ++# mount -t tmpfs -o size=1280m none /home/lbrenta/src/debian/ram ++ ++By default, the tmpfs will be limited to half your physical RAM. The ++beauty of it is that it only consumes as much physical RAM as ++necessary to hold the files in it; deleting files frees up RAM. ++ ++2) As your regular user, create the working directory in the tmpfs ++ ++$ cp --archive ~/src/debian/gcc-x.y-x.y.z ~/src/debian/ram ++ ++3) Build in there. On my dual-core, 2 GHz amd64, it takes 34 minutes ++ to build gnat, and the tmpfs takes 992 MiB of physical RAM but ++ exceeds 1 GiB during the build. ++ ++Note that the build process uses a lot of temporary files. Your $TEMP ++directory should therefore also be in a ram disk. You can achieve ++that either by mounting it as tmpfs, or by setting TEMP to point to ++~/src/debian/ram. ++ ++Also note that each thread in your processor(s) will run a compiler in ++it and use up RAM. Therefore your physical memory should be: ++ ++Physical_RAM >= 1.2 + 0.4 * Threads (in GiB) ++ ++(this is an estimate; your mileage may vary). If you have less ++physical RAM than recommended, reduce the number of threads allocated ++to the build process, or do not use a tmpfs to build. ++ ++* Patching GCC ++ ++Debian applies a large number of patches to GCC as part of the build ++process. It uses quilt but the necessary debian/patches/series is not ++part of the packaging scripts; instead, "debian/rules patch" generates ++this file by looking at debian/control (which is itself generated!), ++debian/changelog and other files. Then it applies all the patches. ++At this point, you can use quilt as usual: ++ ++$ cd ~/src/debian/gcc-x.y ++$ export QUILT_PATCHES=$PWD/debian/patches ++$ quilt series ++ ++If you add new patches, remember to add them to the version control ++system too. ++ ++-- ++Ludovic Brenta, 2012-04-02. diff --cc debian/README.snapshot index 0000000,0000000..e2a6601 new file mode 100644 --- /dev/null +++ b/debian/README.snapshot @@@ -1,0 -1,0 +1,46 @@@ ++Debian gcc-snapshot package ++=========================== ++ ++This package contains a recent development SNAPSHOT of all files ++contained in the GNU Compiler Collection (GCC). ++ ++DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES! ++ ++This package will NEVER hit the testing distribution. It's used for ++tracking gcc bugs submitted to the Debian BTS in recent development ++versions of gcc. ++ ++To use this snapshot, you should set the following environment variables: ++ ++ LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH ++ PATH=/usr/lib/gcc-snapshot/bin:$PATH ++ ++You might also like to use a shell script to wrap up this ++funcationality, e.g. ++ ++place in /usr/local/bin/gcc-snapshot and chmod +x it ++ ++----------- snip ---------- ++#!/bin/sh ++LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH ++PATH=/usr/lib/gcc-snapshot/bin:$PATH ++rpath="" ++OLD_IFS="$IFS" ++IFS=: ++for i in $LD_RUN_PATH ++do ++ rpath="$rpath -Wl,-rpath -Wl,$i" ++done ++IFS="$OLD_IFS" ++exec gcc -Wl,-rpath -Wl,/usr/lib/gcc-snapshot/lib \ ++ -Wl,-rpath -Wl,/usr/lib/gcc-snapshot/lib32 \ ++ -Wl,-rpath -Wl,/usr/lib/gcc-snapshot/libx32 $rpath "$@" ++----------- snip ---------- ++ ++Make the same for g++, g77, cpp, ... ++ ++Don't forget the quotes around the $@ or gcc will not parse it's ++command line correctly! ++ ++Unset these variables before building Debian packages destined for an ++upload to ftp-master.debian.org. diff --cc debian/README.source index 0000000,0000000..8eed2f0 new file mode 100644 --- /dev/null +++ b/debian/README.source @@@ -1,0 -1,0 +1,29 @@@ ++Patches applied to the Debian version of GCC ++-------------------------------------------- ++ ++Debian specific patches can be found in the debian/patches directory. ++Quilt is used as the patch system. See /usr/share/doc/quilt/README.source ++for details about quilt. ++ ++Patches are applied by calling `debian/rules patch'. The `series' ++file is constructed on the fly based on the files found in the to ++debian/rules.patch "debian_patches" variable, configure scripts are ++regenerated in the `patch' target. The gcc source is unpacked under ++src/ this needs to be reflected in the patch header. ++ ++Running a single dejagnu test ++----------------------------- ++ ++ - Find out the test suite containing the test, and the associated ++ target (e.g. check-gcc in /gcc, or check in /. ++ ++ - Find out the dejagnu test suite, e.g. guality.exp ++ - If you have a log of the original testsuite run, search back for the ++ .exp file before the fail. ++ - Find the directory with the test and then the .exp in the nearest ++ enclosing directory. ++ ++ - Set RUNTESTFLAGS to the testsuite name and the test name to run, e.g ++ RUNTESTFLAGS="guality.exp=pr54519-2.c" make -e check-gcc ++ The test name is just the base name, but might be the path relative ++ from gcc/testsuite for C++ tests. diff --cc debian/README.ssp index 0000000,0000000..9facca7 new file mode 100644 --- /dev/null +++ b/debian/README.ssp @@@ -1,0 -1,0 +1,28 @@@ ++Stack smashing protection is a feature of GCC that enables a program to ++detect buffer overflows and immediately terminate execution, rather than ++continuing execution with corrupt internal data structures. It uses ++"canaries" and local variable reordering to reduce the likelihood of ++stack corruption through buffer overflows. ++ ++Options that affect stack smashing protection: ++ ++-fstack-protector ++ Enables protection for functions that are vulnerable to stack ++ smashing, such as those that call alloca() or use pointers. ++ ++-fstack-protector-all ++ Enables protection for all functions. ++ ++-Wstack-protector ++ Warns about functions that will not be protected. Only active when ++ -fstack-protector has been used. ++ ++Applications built with stack smashing protection should link with the ++ssp library by using the option "-lssp" for systems with glibc-2.3.x or ++older; glibc-2.4 and newer versions provide this functionality in libc. ++ ++The Debian architectures alpha, hppa, ia64, m68k, mips, mipsel do not ++have support for stack smashing protection. ++ ++More documentation can be found at the project's website: ++http://researchweb.watson.ibm.com/trl/projects/security/ssp/ diff --cc debian/TODO index 0000000,0000000..05c8bf5 new file mode 100644 --- /dev/null +++ b/debian/TODO @@@ -1,0 -1,0 +1,58 @@@ ++(It is recommended to edit this file with emacs' todoo mode) ++Last updated: 2020-05-12 ++ ++* General ++ ++- Clean up the sprawl of debian/rules. I'm sure there are neater ++ ways to do some of it; perhaps split it up into some more files? ++ Partly done. ++ ++- Make debian/rules control build the control file without unpacking ++ the sources or applying patches. Currently, it unpacks the sources, ++ patches them, creates the control file, and a subsequent ++ dpkg-buildpackage deletes the sources, re-unpacks them, and ++ re-patches them. ++ ++ This would require hard-coding things like soversions in some ++ places. Is it worth it? ++ ++- Reorganise debian/rules.defs to decide which packages to build in a ++ more straightforward and less error-prone fashion: (1) start with ++ all languages; override the list of languages depending on the name ++ of the source package (gcc-4.3, gnat-4.3, gdc-4.3). (2) ++ filter the list of languages depending on the target platform; (3) ++ depending on the languages to build, decide on which libraries to ++ build. ++ ++ Now that we build all languages from one source package, should that ++ be changed? Building from separate packages makes building the ++ cross compilers more complicated. ++ ++o [Ludovic Brenta] Ada ++ ++- Done: Build both the zero-cost and setjump/longjump exceptions ++ versions of libgnat. In particular, gnat-glade (distributed systems) ++ works best with SJLJ. ++ This is disabled now in GCC 10. ++ ++- Add support for multilib (not yet supported upstream). ++ ++ ++* Testsuite ++ ++- Only run libgo/x32, if the kernel is prepared to execute the x32 ++ executables. ++ ++- PR target/94278: segfaults running the amdgcn target tools, based ++ on LLVM 9 and LLVM 10. https://bugs.llvm.org/show_bug.cgi?id=45887 ++ ++- Investigate regressions for test failures, seen when turning on the ++ hardening flags by default. ++ ++- Fix gm2 link errors when running the tests. ++ ++- Fix asan test errors in g++. Seen when run locally, e.g. alloca_big_alignment.c ++ ==1453818==ASan runtime does not come first in initial library list; you should either link runtime to your application or manually preload it with LD_PRELOAD. ++ ++- libstdc++ locale related test failures with recent glibc versions: ++ https://gcc.gnu.org/PR71367 diff --cc debian/acats-killer.sh index 0000000,0000000..29a2550 new file mode 100755 --- /dev/null +++ b/debian/acats-killer.sh @@@ -1,0 -1,0 +1,62 @@@ ++#! /bin/sh ++ ++# on ia64 systems, the acats hangs in unaligned memory accesses. ++# kill these testcases. ++ ++pidfile=acats-killer.pid ++ ++usage() ++{ ++ echo >&2 "usage: `basename $0` [-p ] " ++ exit 1 ++} ++ ++while [ $# -gt 0 ]; do ++ case $1 in ++ -p) ++ pidfile=$2 ++ shift ++ shift ++ ;; ++ -*) ++ usage ++ ;; ++ *) ++ break ++ esac ++done ++ ++[ $# -eq 2 ] || usage ++ ++logfile=$1 ++stopfile=$2 ++interval=30 ++ ++echo $$ > $pidfile ++ ++while true; do ++ if [ -f "$stopfile" ]; then ++ echo "`basename $0`: finished." ++ rm -f $pidfile ++ exit 0 ++ fi ++ sleep $interval ++ if [ ! -f "$logfile" ]; then ++ continue ++ fi ++ pids=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') ++ if [ -n "$pids" ]; then ++ sleep $interval ++ pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') ++ if [ "$pids" = "$pids2" ]; then ++ #echo kill: $pids ++ kill $pids ++ sleep 1 ++ pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') ++ if [ "$pids" = "$pids2" ]; then ++ #echo kill -9: $pids ++ kill -9 $pids ++ fi ++ fi ++ fi ++done diff --cc debian/ada/check_ali_update.sh index 0000000,0000000..95f2d5c new file mode 100644 --- /dev/null +++ b/debian/ada/check_ali_update.sh @@@ -1,0 -1,0 +1,73 @@@ ++#!/bin/sh ++ ++# Helper for debian/rules2. ++ ++# Please 'sh test_check_ali_update.sh' after any change. ++ ++# A modification of libgnat sources invalidates the .ali checksums in ++# reverse dependencies as described in the Debian Policy for Ada. GCC ++# cannot afford the recommended passage through NEW, but this check at ++# least reports the issue before causing random FTBFS. ++ ++set -Ceu ++ ++[ $# = 2 ] ++# Argument 1: dir with Ada runtime from build-dependencies, ++# usually under $gcc_lib_dir, ++# containing adainclude/*.ad[bs] adalib/*.ali from build-dependencies ++# Argument 2: dir with freshly built *.ad[bs] *.ali ++ ++# $1 includes the built major version, so a missing $1/adainclude ++# means that we are building gnat-X with gnat-Y. ++# A check is probably unneeded, and would require network access. ++[ -d "$1"/adainclude ] || exit 0 ++ ++vanished= ++changed= ++ ++for ali1 in "$1"/adalib/*.ali; do ++ unit=`basename "$ali1" .ali` ++ ali2="$2/$unit.ali" ++ ++ if [ ! -r "$ali2" ]; then ++ vanished="$vanished $unit.ali" ++ continue ++ fi ++ ++ # Strip the timestamp field, we are only interested in checksums. ++ lines1=`sed -En "s/^D $unit[.]ad[bs]\t+[0-9]{14} //p" "$ali1"` ++ lines2=`sed -En "s/^D $unit[.]ad[bs]\t+[0-9]{14} //p" "$ali2"` ++ if [ "$lines1" != "$lines2" ]; then ++ changed="$changed $unit.ali" ++ fi ++done ++ ++if [ -n "$vanished$changed" ]; then ++ echo 'error: changes in Ada Library Information files.' ++ echo 'You are seeing this because' ++ echo ' * build and host GCC major versions match.' ++ echo ' * build_type=build-native and with_libgnat=yes in debian/rules.defs.' ++ echo "" ++ if [ -n "$vanished" ]; then ++ echo " * vanished files :$vanished" ++ fi ++ if [ -n "$changed" ]; then ++ echo " * differing files:$changed" ++ fi ++ echo "" ++ # A change in a single source file invalidates all depending ++ # .ali files, so a diff of all sources is probably more useful. ++ # Report changes in modified or vanished sources (.adb .ads or ++ # both), ignore new or unrelated files in $2. ++ diff -Nu "$1"/adainclude/* --to-file="$2" 2>&1 | sed '/^\(\+\+\+\|---\)/s/\t.*//' ++ echo ++ echo 'This may break Ada packages, see https://people.debian.org/~lbrenta/debian-ada-policy.html.' ++ echo 'If you are uploading to Debian, please contact debian-ada@lists.debian.org.' ++ if [ -n "$DEB_FAIL_ON_ADA_LIB_INFO_CHANGE" ]; then ++ echo ++ echo 'Build interrupted by DEB_FAIL_ON_ADA_LIB_INFO_CHANGE (from env or rules.defs).' ++ exit 1 ++ fi ++fi ++ ++exit 0 diff --cc debian/ada/confirm_debian_bugs.py index 0000000,0000000..2b8c6e1 new file mode 100644 --- /dev/null +++ b/debian/ada/confirm_debian_bugs.py @@@ -1,0 -1,0 +1,901 @@@ ++#!/usr/bin/python3 ++ ++# Helper when migrating bugs from a gnat version to another. ++ ++# Attempt to reproduce each known GNAT bug with version BV. ++# Reports results as control@bugs.debian.org commands. ++# Only remove temporary subdirectories when the bug is reproduced. ++ ++# python3 confirm_debian_bugs.py same BV -> found | fixed ++# python3 confirm_debian_bugs.py new BV -> reassign | retitle ++ ++from __future__ import print_function ++import os.path ++import re ++import shutil ++import subprocess ++import sys ++import tempfile ++ ++os.environ ['LC_ALL'] = 'C' ++ ++assert len (sys.argv) == 3 ++assert sys.argv [1] in ("same", "new") ++same_gcc_base_version = sys.argv [1] == "same" ++new_version = sys.argv [2] ++ ++for line in subprocess.check_output (("dpkg", "--status", "gnat-" + new_version)).decode ().split ("\n"): ++ if line.startswith ("Version: "): ++ deb_version = line [len ("Version: "):] ++ break ++# Will cause an error later if deb_version is not defined. ++ ++# Each bug has its own subdirectory in WORKSPACE. ++# Every bug subdir is removed if the bug is confirmed, ++# and WORKSPACE is removed if empty. ++workspace = tempfile.mkdtemp (suffix = "-gnat-" + deb_version + "-bugs") ++ ++def attempt_to_reproduce (bug, make, sources): ++ tmp_dir = os.path.join (workspace, "bug{}".format (bug)) ++ os.mkdir (tmp_dir) ++ ++ for (name, contents) in sources: ++ with open (os.path.join (tmp_dir, name), "w") as f: ++ f.write (contents) ++ ++ path = os.path.join (tmp_dir, "stderr.log") ++ with open (path, "w") as e: ++ status = subprocess.call (make, stderr=e, cwd=tmp_dir) ++ with open (path, "r") as e: ++ stderr = e.read () ++ return tmp_dir, status, stderr ++ ++def reassign_and_remove_dir (bug, tmp_dir): ++ if same_gcc_base_version: ++ print ("found {} {}".format (bug, deb_version)) ++ else: ++ print ("reassign {} {} {}".format (bug, "gnat-" + new_version, deb_version)) ++ shutil.rmtree (tmp_dir) ++ ++def report (bug, message, output): ++ print ("# {}: {}.".format (bug, message)) ++ for line in output.split ("\n"): ++ print ("# " + line) ++ ++def report_and_retitle (bug, message, output): ++ report (bug, message, output) ++ if same_gcc_base_version: ++ print ("fixed {} {}".format (bug, deb_version)) ++ else: ++ print ("retitle {} [Fixed in {}] ".format (bug, new_version)) ++ ++def check_compiles_but_should_not (bug, make, sources): ++ tmp_dir, status, stderr = attempt_to_reproduce (bug, make, sources) ++ if status == 0: ++ reassign_and_remove_dir (bug, tmp_dir) ++ else: ++ report_and_retitle (bug, "now fails to compile (bug is fixed?)", stderr) ++ ++def check_reports_an_error_but_should_not (bug, make, sources, regex): ++ tmp_dir, status, stderr = attempt_to_reproduce (bug, make, sources) ++ if status == 0: ++ report_and_retitle (bug, "now compiles (bug is fixed?)", stderr) ++ elif re.search (regex, stderr): ++ reassign_and_remove_dir (bug, tmp_dir) ++ else: ++ report (bug, "still fails to compile, but with a new stderr", stderr) ++ ++def check_reports_error_but_forgets_one (bug, make, sources, regex): ++ tmp_dir, status, stderr = attempt_to_reproduce (bug, make, sources) ++ if status == 0: ++ report (bug, "now compiles (?)", stderr); ++ elif re.search (regex, stderr): ++ report_and_retitle (bug, "now reports the error (bug is fixed ?)", stderr) ++ else: ++ reassign_and_remove_dir (bug, tmp_dir) ++ ++def check_produces_a_faulty_executable (bug, make, sources, regex, trigger): ++ tmp_dir, status, stderr = attempt_to_reproduce (bug, make, sources) ++ if status != 0: ++ report (bug, "cannot compile the trigger anymore", stderr) ++ else: ++ output = subprocess.check_output ((os.path.join (tmp_dir, trigger),), cwd=tmp_dir).decode () ++ if re.search (regex, output): ++ reassign_and_remove_dir (bug, tmp_dir) ++ else: ++ report_and_retitle (bug, "output of the trigger changed (bug fixed?)", output) ++ ++###################################################################### ++ ++check_reports_an_error_but_should_not ( ++ bug = 244936, ++ make = ("gnatmake", "p"), ++ regex = 'p\.ads:3:25: error: "foo" is hidden within declaration of instance', ++ sources = ( ++ ("foo.ads", """generic ++procedure foo; ++"""), ++ ("foo.adb", """procedure foo is ++begin ++ null; ++end foo; ++"""), ("p.ads", """with foo; ++package p is ++ procedure FOO is new foo; -- OK ++end p; ++"""))) ++ ++check_compiles_but_should_not ( ++ bug = 244970, ++ make = ("gnatmake", "pak5"), ++ sources = ( ++ ("pak1.ads", """generic ++package pak1 is ++end pak1; ++"""), ++ ("pak1-pak2.ads", """generic ++package pak1.pak2 is ++end pak1.pak2; ++"""), ++ ("pak5.ads", """with pak1.pak2; ++generic ++ with package new_pak2 is new pak1.pak2; -- ERROR: illegal use of pak1 ++package pak5 is ++end pak5; ++"""))) ++ ++check_reports_an_error_but_should_not ( ++ bug = 246187, ++ make = ("gnatmake", "test_43"), ++ regex = "Error detected at test_43.ads:11:4", ++ sources = ( ++ ("test_43.ads", """package Test_43 is ++ type T1 is private; ++ ++private ++ ++ type T2 is record ++ a: T1; ++ end record; ++ type T2_Ptr is access T2; ++ ++ type T1 is record ++ n: T2_Ptr := new T2; ++ end record; ++ ++end Test_43; ++"""),)) ++ ++check_compiles_but_should_not ( ++ bug = 247013, ++ make = ("gnatmake", "test_53"), ++ sources = ( ++ ("test_53.ads", """generic ++ type T1 is private; ++package Test_53 is ++ type T2 (x: integer) is new T1; -- ERROR: x not used ++end Test_53; ++"""),)) ++ ++check_compiles_but_should_not ( ++ bug = 247017, ++ make = ("gnatmake", "test_59"), ++ sources = ( ++ ("test_59.adb", """procedure Test_59 is ++ ++ generic ++ type T1 (<>) is private; ++ procedure p1(x: out T1); ++ ++ procedure p1 (x: out T1) is ++ b: boolean := x'constrained; --ERROR: not a discriminated type ++ begin ++ null; ++ end p1; ++ ++begin ++ null; ++end Test_59; ++"""),)) ++ ++check_compiles_but_should_not ( ++ bug = 247018, ++ make = ("gnatmake", "test_60"), ++ sources = ( ++ ("pak1.ads", """package pak1 is ++ generic ++ package pak2 is ++ end pak2; ++end pak1; ++"""), ++ ("test_60.ads", """with pak1; ++package Test_60 is ++ package PAK1 is new pak1.pak2; --ERROR: illegal reference to pak1 ++end Test_60; ++"""))) ++ ++check_compiles_but_should_not ( ++ bug = 247019, ++ make = ("gnatmake", "test_61"), ++ sources = ( ++ ("test_61.adb", """procedure Test_61 is ++ procedure p1; ++ ++ generic ++ package pak1 is ++ procedure p2 renames p1; ++ end pak1; ++ ++ package new_pak1 is new pak1; ++ procedure p1 renames new_pak1.p2; --ERROR: circular renames ++begin ++ p1; ++end Test_61; ++"""),)) ++ ++check_produces_a_faulty_executable ( ++ bug = 247569, ++ make = ("gnatmake", "test_75"), ++ trigger = "test_75", ++ regex = "failed: wrong p1 called", ++ sources = ( ++ ("test_75.adb", """with text_io; ++procedure Test_75 is ++ generic ++ package pak1 is ++ type T1 is null record; ++ end pak1; ++ ++ generic ++ with package A is new pak1(<>); ++ with package B is new pak1(<>); ++ package pak2 is ++ procedure p1(x: B.T1); ++ procedure p1(x: A.T1); ++ end pak2; ++ ++ package body pak2 is ++ ++ procedure p1(x: B.T1) is ++ begin ++ text_io.put_line("failed: wrong p1 called"); ++ end p1; ++ ++ procedure p1(x: A.T1) is ++ begin ++ text_io.put_line("passed"); ++ end p1; ++ ++ x: A.T1; ++ begin ++ p1(x); ++ end pak2; ++ ++ package new_pak1 is new pak1; ++ package new_pak2 is new pak2(new_pak1, new_pak1); -- (1) ++ ++begin ++ null; ++end Test_75; ++"""),)) ++ ++check_compiles_but_should_not ( ++ bug = 247570, ++ make = ("gnatmake", "test_76"), ++ sources = ( ++ ("test_76.adb", """procedure Test_76 is ++ ++ generic ++ procedure p1; ++ ++ pragma Convention (Ada, p1); ++ ++ procedure p1 is ++ begin ++ null; ++ end p1; ++ ++ procedure new_p1 is new p1; ++ pragma Convention (Ada, new_p1); --ERROR: new_p1 already frozen ++ ++begin ++ null; ++end Test_76; ++"""),)) ++ ++check_produces_a_faulty_executable ( ++ bug = 247571, ++ make = ("gnatmake", "test_77"), ++ trigger = "test_77", ++ regex = "failed: wrong p1 called", ++ sources = ( ++ ("pak.ads", """package pak is ++ procedure p1; ++ procedure p1(x: integer); ++ pragma export(ada, p1); ++end pak; ++"""), ++ ("pak.adb", """with text_io; use text_io; ++package body pak is ++ procedure p1 is ++ begin ++ put_line("passed"); ++ end; ++ ++ procedure p1(x: integer) is ++ begin ++ put_line("failed: wrong p1 called"); ++ end; ++end pak; ++"""), ++ ("test_77.adb", """with pak; ++procedure Test_77 is ++ procedure p1; ++ pragma import(ada, p1); ++begin ++ p1; ++end Test_77; ++"""))) ++ ++check_compiles_but_should_not ( ++ bug = 248166, ++ make = ("gnatmake", "test_82"), ++ sources = ( ++ ("test_82.adb", """procedure Test_82 is ++ package pak1 is ++ type T1 is tagged null record; ++ end pak1; ++ ++ package body pak1 is ++ -- type T1 is tagged null record; -- line 7 ++ ++ function "=" (x, y : T1'class) return boolean is -- line 9 ++ begin ++ return true; ++ end "="; ++ ++ procedure proc (x, y : T1'class) is ++ b : boolean; ++ begin ++ b := x = y; --ERROR: ambiguous "=" ++ end proc; ++ ++ end pak1; ++ ++begin ++ null; ++end Test_82; ++"""),)) ++ ++check_compiles_but_should_not ( ++ bug = 248168, ++ make = ("gnatmake", "test_84"), ++ sources = ( ++ ("test_84.adb", """procedure Test_84 is ++ package pak1 is ++ type T1 is abstract tagged null record; ++ procedure p1(x: in out T1) is abstract; ++ end pak1; ++ ++ type T2 is new pak1.T1 with null record; ++ ++ protected type T3 is ++ end T3; ++ ++ protected body T3 is ++ end T3; ++ ++ procedure p1(x: in out T2) is --ERROR: declared after body of T3 ++ begin ++ null; ++ end p1; ++ ++begin ++ null; ++end Test_84; ++"""),)) ++ ++check_compiles_but_should_not ( ++ bug = 248678, ++ make = ("gnatmake", "test_80"), ++ sources = ( ++ ("test_80.ads", """package Test_80 is ++ generic ++ type T1(<>) is private; ++ with function "=" (Left, Right : T1) return Boolean is <>; ++ package pak1 is ++ end pak1; ++ ++ package pak2 is ++ type T2 is abstract tagged null record; ++ package new_pak1 is new pak1 (T2'Class); --ERROR: no matching "=" ++ end pak2; ++end Test_80; ++"""),)) ++ ++check_compiles_but_should_not ( ++ bug = 248681, ++ make = ("gnatmake", "test_91"), ++ sources = ( ++ ("test_91.adb", """-- RM 8.5.4(5) ++-- ...the convention of the renamed subprogram shall not be ++-- Intrinsic. ++with unchecked_deallocation; ++procedure Test_91 is ++ generic -- when non generic, we get the expected error ++ package pak1 is ++ type int_ptr is access integer; ++ procedure free(x: in out int_ptr); ++ end pak1; ++ ++ package body pak1 is ++ procedure deallocate is new ++ unchecked_deallocation(integer, int_ptr); ++ procedure free(x: in out int_ptr) renames ++ deallocate; --ERROR: renaming as body can't rename intrinsic ++ end pak1; ++begin ++ null; ++end Test_91; ++"""),)) ++ ++check_compiles_but_should_not ( ++ bug = 248682, ++ make = ("gnatmake", "main"), ++ sources = ( ++ ("main.adb", """-- RM 6.3.1(9) ++-- The default calling convention is Intrinsic for ... an attribute ++-- that is a subprogram; ++ ++-- RM 8.5.4(5) ++-- ...the convention of the renamed subprogram shall not be ++-- Intrinsic. ++procedure main is ++ package pak1 is ++ function f1(x: integer'base) return integer'base; ++ end pak1; ++ ++ package body pak1 is ++ function f1(x: integer'base) return integer'base renames ++ integer'succ; --ERROR: renaming as body can't rename intrinsic ++ end pak1; ++begin ++ null; ++end; ++"""),)) ++ ++check_reports_an_error_but_should_not ( ++ bug = 253737, ++ make = ("gnatmake", "test_4"), ++ regex = 'test_4\.ads:3:01: error: "pak2" not declared in "pak1"', ++ sources = ( ++ ("parent.ads", """generic ++package parent is ++end parent; ++"""), ++ ("parent-pak2.ads", """generic ++package parent.pak2 is ++end parent.pak2; ++"""), ++ ("parent-pak2-pak3.ads", """generic ++package parent.pak2.pak3 is ++end parent.pak2.pak3; ++"""), ++ ("parent-pak2-pak4.ads", """with parent.pak2.pak3; ++generic ++package parent.pak2.pak4 is ++ package pak3 is new parent.pak2.pak3; ++end parent.pak2.pak4; ++"""), ++ ("pak1.ads", """with parent; ++package pak1 is new parent; ++"""), ++ ("pak6.ads", """with parent.pak2; ++with pak1; ++package pak6 is new pak1.pak2; ++"""), ++ ("test_4.ads", """with parent.pak2.pak4; ++with pak6; ++package Test_4 is new pak6.pak4; ++"""))) ++ ++check_compiles_but_should_not ( ++ bug = 269948, ++ make = ("gnatmake", "test_119"), ++ sources = ( ++ ("test_119.ads", """-- RM 3.9.3/11 A generic actual subprogram shall not be an abstract ++-- subprogram. works OK if unrelated line (A) is commented out. ++package Test_119 is ++ generic ++ with function "=" (X, Y : integer) return Boolean is <>; -- Removing this allows GCC to detect the problem. ++ package pak1 is ++ function "=" (X, Y: float) return Boolean is abstract; ++ generic ++ with function Equal (X, Y : float) return Boolean is "="; --ERROR: ++ package pak2 is ++ end pak2; ++ end pak1; ++ ++ package new_pak1 is new pak1; ++ package new_pak2 is new new_pak1.pak2; ++end Test_119; ++"""),)) ++ ++check_compiles_but_should_not ( ++ bug = 269951, ++ make = ("gnatmake", "test_118"), ++ sources = ( ++ ("pak1.ads", """generic ++package pak1 is ++end pak1; ++"""), ++ ("pak1-foo.ads", """generic ++package pak1.foo is ++end pak1.foo; ++"""), ++ ("test_118.ads", """with pak1.foo; ++package Test_118 is ++ package pak3 is ++ foo: integer; ++ end pak3; ++ use pak3; ++ ++ package new_pak1 is new pak1; ++ use new_pak1; ++ ++ x: integer := foo; -- ERROR: foo hidden by use clauses ++end Test_118; ++"""),)) ++ ++# As long as 24:14 is detected, it inhibits detection of 25:21. ++check_reports_error_but_forgets_one ( ++ bug = 276224, ++ make = ("gnatmake", "test_121"), ++ regex = "test_121\.adb:25:21: dynamically tagged expression not allowed", ++ sources = ( ++ ("test_121.adb", """-- If the expected type for an expression or name is some specific ++-- tagged type, then the expression or name shall not be dynamically ++-- tagged unless it is a controlling operand in a call on a ++-- dispatching operation. ++procedure Test_121 is ++ package pak1 is ++ type T1 is tagged null record; ++ function f1 (x1: T1) return T1; ++ end pak1; ++ ++ package body pak1 is ++ function f1 (x1: T1) return T1 is ++ begin ++ return x1; ++ end; ++ end pak1; ++ use pak1; ++ ++ type T2 is record ++ a1: T1; ++ end record; ++ ++ z0: T1'class := T1'(null record); ++ z1: T1 := f1(z0); -- ERROR: gnat correctly rejects ++ z2: T2 := (a1 => f1(z0)); -- ERROR: gnat mistakenly allows ++begin ++ null; ++end Test_121; ++"""),)) ++ ++check_reports_an_error_but_should_not ( ++ bug = 276227, ++ make = ("gnatmake", "test_124"), ++ regex = 'test_124\.ads:6:35: error: size for "T_arr_constrained" too small, minimum allowed is 256', ++ sources = ( ++ ("test_124.ads", """package Test_124 is ++ type T is range 1 .. 32; ++ type T_arr_unconstrained is array (T range <>) of boolean; ++ type T_arr_constrained is new T_arr_unconstrained (T); ++ pragma pack (T_arr_unconstrained); ++ for T_arr_constrained'size use 32; ++end Test_124; ++"""),)) ++ ++check_reports_an_error_but_should_not ( ++ bug = 278687, ++ make = ("gnatmake", "test_127"), ++ regex = 'test_127\.adb:10:21: error: expected type "T2" defined at line 4', ++ sources = ( ++ ("test_127.ads", """-- The second parameter of T2'Class'Read is of type T2'Class, ++-- which should match an object of type T3, which is derived ++-- from T2. ++package test_127 is ++ pragma elaborate_body; ++end test_127; ++"""), ++ ("test_127.adb", """with ada.streams; ++package body test_127 is ++ type T1 is access all ada.streams.root_stream_type'class; ++ type T2 is tagged null record; ++ type T3 is new T2 with null record; ++ ++ x: T1; ++ y: T3; ++begin ++ T2'class'read(x, y); ++end test_127; ++"""))) ++ ++check_compiles_but_should_not ( ++ bug = 278831, ++ make = ("gnatmake", "test_128"), ++ sources = ( ++ ("test_128.ads", """package Test_128 is ++ package inner is ++ private ++ type T1; ++ end inner; ++ type T1_ptr is access inner.T1; -- line 9 ERROR: gnat mistakenly accepts ++end Test_128; ++"""), ++ ("test_128.adb", """package body test_128 is ++ package body inner is ++ type T1 is new Integer; ++ end inner; ++end Test_128; ++"""))) ++ ++# Note that we also check the absence of the next inhibited message. ++check_reports_an_error_but_should_not ( ++ bug = 279893, ++ make = ("gnatmake", "test_129"), ++ regex = 'test_129\.ads:13:49: error: designated type of actual does not match that of formal "T2"', ++ sources = ( ++ ("pak1.ads", """-- legal instantiation rejected; illegal instantiation accepted ++-- adapted from John Woodruff c.l.a. post ++ ++generic ++ type T1 is private; ++package pak1 is ++ subtype T3 is T1; ++end pak1; ++"""), ++ ("pak2.ads", """with pak1; ++generic ++ type T2 is private; ++package pak2 is ++ package the_pak1 is new pak1 (T1 => T2); ++end pak2; ++"""), ++ ("pak2-pak3.ads", """generic ++ type T2 is access the_pak1.T3; ++package pak2.pak3 is ++end pak2.pak3; ++"""), ++ ("test_129.ads", """with pak1; ++with pak2.pak3; ++package Test_129 is ++ ++ type T4 is null record; ++ type T5 is null record; ++ subtype T3 is T5; -- line 9: triggers the bug at line 16 ++ ++ type T4_ptr is access T4; ++ type T5_ptr is access T5; ++ ++ package new_pak2 is new pak2 (T2 => T4); ++ package new_pak3a is new new_pak2.pak3(T2 => T4_ptr); -- line 15: Legal ++ package new_pak3b is new new_pak2.pak3(T2 => T5_ptr); -- line 16: Illegal ++end Test_129; ++"""))) ++ ++print ("# Please ignore the gnatlink message.") ++check_reports_an_error_but_should_not ( ++ bug = 280939, ++ make = ("gnatmake", "test_130"), ++ regex = "test_130\.adb:.*: undefined reference to \`p2\'", ++ sources = ( ++ ("pak1.ads", """-- RM 10.1.5(4) "the pragma shall have an argument that is a name ++-- denoting that declaration." ++-- RM 8.1(16) "The children of a parent library unit are inside the ++-- parent's declarative region." ++ ++package pak1 is ++ pragma Pure; ++end pak1; ++"""), ++ ("pak1-p2.ads", """procedure pak1.p2; ++pragma Pure (p2); -- ERROR: need expanded name ++pragma Import (ada, p2); -- ERROR: need expanded name ++pragma Inline (p2); -- ERROR: need expanded name ++"""), ++ ("test_130.adb", """with Pak1.P2; ++procedure Test_130 is ++begin ++ Pak1.P2; ++end Test_130; ++"""))) ++ ++check_compiles_but_should_not ( ++ bug = 283833, ++ make = ("gnatmake", "test_132"), ++ sources = ( ++ ("pak1.ads", """-- RM 8.5.4(5) the convention of the renamed subprogram shall not ++-- be Intrinsic, if the renaming-as-body completes that declaration ++-- after the subprogram it declares is frozen. ++ ++-- RM 13.14(3) the end of the declaration of a library package ++-- causes freezing of each entity declared within it. ++ ++-- RM 6.3.1(7) the default calling convention is Intrinsic for ++-- any other implicitly declared subprogram unless it is a ++-- dispatching operation of a tagged type. ++ ++package pak1 is ++ type T1 is null record; ++ procedure p1 (x1: T1); ++ type T2 is new T1; ++end pak1; ++"""), ++ ("pak1.adb", """package body Pak1 is ++ procedure P1 (X1 : T1) is begin null; end P1; ++end Pak1; ++"""), ++ ("test_132.ads", """with pak1; ++package Test_132 is ++ procedure p2 (x2: pak1.T2); ++end Test_132; ++"""), ++ ("test_132.adb", """package body Test_132 is ++ procedure p2 (x2: pak1.T2) renames pak1.p1; --ERROR: can't rename intrinsic ++end Test_132; ++"""))) ++ ++check_compiles_but_should_not ( ++ bug = 283835, ++ make = ("gnatmake", "test_133"), ++ sources = ( ++ ("test_133.ads", """package Test_133 is ++ package pak1 is ++ type T1 is null record; ++ end pak1; ++ ++ package pak2 is ++ subtype boolean is standard.boolean; ++ function "=" (x, y: pak1.T1) return boolean; ++ end pak2; ++ ++ use pak1, pak2; ++ ++ x1: pak1.T1; ++ b1: boolean := x1 /= x1; -- ERROR: ambigous (gnat misses) ++ -- b2: boolean := x1 = x1; -- ERROR: ambigous ++end Test_133; ++"""), ++ ("test_133.adb", """package body test_133 is ++ package body pak2 is ++ function "=" (x, y: pak1.T1) return boolean is ++ begin ++ return true; ++ end "="; ++ end pak2; ++end test_133; ++"""))) ++ ++check_compiles_but_should_not ( ++ bug = 416979, ++ make = ("gnatmake", "pak1"), ++ sources = ( ++ ("pak1.ads", """package pak1 is ++ -- RM 7.3(13), 4.9.1(1) ++ -- check that discriminants statically match ++ type T1(x1: integer) is tagged null record; ++ x2: integer := 2; ++ x3: constant integer := x2; ++ type T2 is new T1 (x2) with private; ++ type T3 is new T1 (x3) with private; ++private ++ type T2 is new T1 (x2) with null record; --ERROR: nonstatic discriminant ++ type T3 is new T1 (x3) with null record; --ERROR: nonstatic discriminant ++end pak1; ++"""),)) ++ ++check_reports_an_error_but_should_not ( ++ bug = 660698, ++ make = ("gnatmake", "proc.adb"), ++ regex = 'proc\.adb:17:28: error: there is no applicable operator "And" for type "Standard\.Integer"', ++ sources = ( ++ ("proc.adb", """procedure Proc is ++ package P1 is ++ type T is new Integer; ++ function "and" (L, R : in Integer) return T; ++ end P1; ++ package body P1 is ++ function "and" (L, R : in Integer) return T is ++ pragma Unreferenced (L, R); ++ begin ++ return 0; ++ end "and"; ++ end P1; ++ use type P1.T; ++ package P2 is ++ use P1; ++ end P2; ++ G : P1.T := Integer'(1) and Integer'(2); ++begin ++ null; ++end Proc; ++"""), )) ++ ++# Even if an error is reported, the problem with the atomic variable ++# should be checked. ++check_reports_an_error_but_should_not ( ++ bug = 643663, ++ make = ("gnatmake", "test"), ++ regex = 'test\.adb:4:25: error: no value supplied for component "Reserved"', ++ sources = ( ++ ("pkg.ads", """package Pkg is ++ type Byte is mod 2**8; ++ type Reserved_24 is mod 2**24; ++ ++ type Data_Record is ++ record ++ Data : Byte; ++ Reserved : Reserved_24; ++ end record; ++ ++ for Data_Record use ++ record ++ Data at 0 range 0 .. 7; ++ Reserved at 0 range 8 .. 31; ++ end record; ++ ++ for Data_Record'Size use 32; ++ for Data_Record'Alignment use 4; ++ ++ Data_Register : Data_Record; ++ pragma Atomic (Data_Register); ++end Pkg; ++"""), ("test.adb", """with Pkg; ++procedure Test is ++begin ++ Pkg.Data_Register := ( ++ Data => 255, ++ others => <> -- expected error: no value supplied for component "Reserved" ++ ); ++end Test; ++"""))) ++ ++check_produces_a_faulty_executable ( ++ bug = 864969, ++ make = ("gnatmake", "main"), ++ trigger = "main", ++ regex = "ZZund", ++ sources = ( ++ ("main.adb", """with Ada.Locales, Ada.Text_IO; ++procedure Main is ++begin ++ Ada.Text_IO.Put_Line (String (Ada.Locales.Country) ++ & String (Ada.Locales.Language)); ++end Main; ++"""),)) ++ ++check_produces_a_faulty_executable ( ++ bug = 894225, ++ make = ("gnatmake", "main"), ++ trigger = "main", ++ sources = ( ++ ("main.adb", ++ """with Ada.Directories, Ada.Text_IO; ++procedure Main is ++begin ++ Ada.Text_IO.Put_Line (Ada.Directories.Containing_Directory ("/a/b/")); ++ Ada.Text_IO.Put_Line (Ada.Directories.Containing_Directory ("a/b/")); ++ Ada.Text_IO.Put_Line (Ada.Directories.Containing_Directory ("b/")); ++end Main; ++"""), ++ ), ++ regex = """^/a/b ++a/b ++b$""") ++ ++try: ++ os.rmdir (workspace) ++except: ++ print ("Some unconfirmed, not removing directory {}.".format (workspace)) diff --cc debian/ada/test_ada_source_date_epoch.sh index 0000000,0000000..5154341 new file mode 100644 --- /dev/null +++ b/debian/ada/test_ada_source_date_epoch.sh @@@ -1,0 -1,0 +1,97 @@@ ++#!/bin/sh ++# Basic checks for debian/patches/ada-lib-info-source-date-epoch.diff. ++ ++# Copyright (C) 2020 Nicolas Boulenguez ++ ++# Usage: ++# build GCC ++# sh debian/ada/test_ada_source_date_epoch.sh ++# rm -fr build/test_ada_source_data_epoch ++ ++set -C -e -u -x ++ ++# Inside the GCC tree: ++mkdir build/test_ada_source_data_epoch ++cd build/test_ada_source_data_epoch ++export LD_LIBRARY_PATH=../gcc/ada/rts:`echo ../*/libgnat_util/.libs` ++gnatmake="../gcc/gnatmake --RTS=`echo ../*/libada` --GCC=../gcc/xgcc -c -v" ++# For local tests: ++# gnatmake="gnatmake -c -v" ++ ++cat > lib.ads < main.adb < ++ ++set -Ceuvx ++ ++# Stop here if test_check_ali_update_tmp/ already exists. ++mkdir test_check_ali_update_tmp ++ ++cd test_check_ali_update_tmp ++mkdir d2 ++ ++check() { ++ status=0 ++ sh ../check_ali_update.sh d1 d2 > stdout 2> stderr || status=$? ++ test $status = $1 ++ diff -u expected_out stdout ++ echo -n | diff -u - stderr ++ rm expected_out stderr stdout ++} ++ ++mkdir d1 ++ ++echo -n > expected_out ++DEB_FAIL_ON_ADA_LIB_INFO_CHANGE= check 0 ++ ++echo -n > expected_out ++DEB_FAIL_ON_ADA_LIB_INFO_CHANGE=1 check 0 ++ ++mkdir d1/adainclude d1/adalib ++ ++echo 'normal spec' > d1/adainclude/normal.ads ++echo 'normal body' > d1/adainclude/normal.adb ++cat > d1/adalib/normal.ali < expected_out ++DEB_FAIL_ON_ADA_LIB_INFO_CHANGE= check 0 ++ ++echo -n > expected_out ++DEB_FAIL_ON_ADA_LIB_INFO_CHANGE=1 check 0 ++ ++echo 'new spec' > d2/news.ads ++cat > d2/new.ali < expected_out ++DEB_FAIL_ON_ADA_LIB_INFO_CHANGE= check 0 ++ ++echo -n > expected_out ++DEB_FAIL_ON_ADA_LIB_INFO_CHANGE=1 check 0 ++ ++echo 'vanished spec' > d1/adainclude/changed.ads ++cat > d1/adalib/changed.ali < expected_out < expected_out < d2/changed.ads ++sed s/02/03/ d1/adalib/changed.ali > d2/changed.ali ++ ++cat > expected_out < expected_out < Fri, 19 Jan 2024 12:01:10 +0100 ++ ++gcc-12 (12.3.0-13) unstable; urgency=medium ++ ++ * Update to git 20231215 from the gcc-12 branch. ++ - Fix PR target/112891 (x86), PR libstdc++/112314. ++ * Build again using GCC 11 to fix the bootstrap on riscv64. ++ * For Ubuntu 24.04 LTS and later, switch _FORTIFY_SOURCE to 3 by default ++ instead of 2 when optimization is enabled. ++ ++ -- Matthias Klose Fri, 15 Dec 2023 10:15:51 +0100 ++ ++gcc-12 (12.3.0-12) unstable; urgency=medium ++ ++ * Update to git 20231203 from the gcc-12 branch. ++ - Fix PR tree-optimization/111917, PR middle-end/111818, ++ PR tree-optimization/111614, PR tree-optimization/111764, ++ PR tree-optimization/111445, PR tree-optimization/111019, ++ PR tree-optimization/110702, PR tree-optimization/110556, ++ PR tree-optimization/110515, PR debug/110295, PR ipa/109983, ++ PR tree-optimization/109143, PR target/112672 (x86), ++ PR target/111815 (vax), PR target/111828 (PPC), PR target/112443 (x86), ++ PR c++/111703, PR c++/107939, PR c++/112269, PR c++/112301, ++ PR c++/102191, PR c++/33799, PR d/110712, PR d/112270, ++ PR fortran/111880, PR libstdc++/112491, PR libstdc++/112348, ++ PR libstdc++/112491, PR libbacktrace/111315, PR libbacktrace/112263. ++ * Add support to build from a combined binutils/GCC tree. ++ * Remove references to obsolete CPUs m32r and tilegx. Closes: #1056768. ++ ++ -- Matthias Klose Sun, 03 Dec 2023 15:44:44 +0100 ++ ++gcc-12 (12.3.0-11) unstable; urgency=medium ++ ++ * Update to git 20231028 from the gcc-12 branch. ++ - Fix PR target/111001 (SH), PR target/111367 (PPC), PR target/101177 (SH), ++ PR target/111528, PR target/111380 (PPC), PR target/111366 (PPC), ++ PR fortran/111837, PR target/110170 (x86), PR libstdc++/111936. ++ * Configure with --disable-s390-excess-float-precision for sid/trixie and ++ Ubuntu noble (24.04 LTS). ++ ++ -- Matthias Klose Sat, 28 Oct 2023 13:23:42 +0200 ++ ++gcc-12 (12.3.0-10) unstable; urgency=medium ++ ++ * Update to git 20231008 from the gcc-12 branch. ++ - Fix PR target/111411 (AArch64), PR c++/111357, PR middle-end/111699, ++ PR target/111121 (AArch64), PR libstdc++/108178, PR libstdc++/111050, ++ PR libstdc++/111511, PR c++/111512. ++ - Fix return register handling in untyped_call (AArch64). ++ * Update the libquadmath portions of the copyright file. Addresses: #1052314. ++ ++ -- Matthias Klose Sun, 08 Oct 2023 09:05:57 +0200 ++ ++gcc-12 (12.3.0-9) unstable; urgency=medium ++ ++ * Update to git 20230913 from the gcc-12 branch. ++ - Fix PR target/111340 (x86), PR target/96762 (PPC), ++ PR target/111306, PR target/111335, PR middle-end/111017, ++ PR target/110484 (loong64), PR tree-optimization/110914, ++ PR tree-optimization/111015. ++ - Address stack protector and stack clash protection weaknesses ++ on AArch64. CVE-2023-4039. ++ ++ -- Matthias Klose Wed, 13 Sep 2023 13:33:30 +0200 ++ ++gcc-12 (12.3.0-8) unstable; urgency=medium ++ ++ * Update to git 20230824 from the gcc-12 branch. ++ - Fix PR c++/106310, PR c++/106890, PR c++/109666, PR c++/108099, ++ PR c++/109761, PR d/110959, PR fortran/107397. ++ * Update sanitizer symbols files. ++ * Address some lintian warnings: ++ - Be quiet about libstdc++-doc manpages. ++ - Don't complain about unstripped sanitizer libraries. ++ * Update libgphobos symbols file. ++ * Remove test protocols in clean target. Closes: #1044154. ++ * Disable Ada, Go, D, Modula-2 frontends on loong64. ++ ++ -- Matthias Klose Thu, 24 Aug 2023 22:13:46 +0200 ++ ++gcc-12 (12.3.0-7) unstable; urgency=medium ++ ++ * Update to git 20230802 from the gcc-12 branch. ++ - Fix PR target/110741 (PPC), PR target/110206, PR target/101469 (SH), ++ PR target/106966 (alpha), PR c++/110468, PR fortran/95947, ++ PR fortran/110658, PR fortran/110288, PR libstdc++/95048. ++ * libgccjit-12-doc: Relax dependency on the gcc-12-base package. ++ * Fix some lintian warnings. ++ * gcc-12-doc: Fix installation of the libitm info file. LP: #1936394. ++ ++ -- Matthias Klose Wed, 02 Aug 2023 12:21:30 +0200 ++ ++gcc-12 (12.3.0-6) unstable; urgency=medium ++ ++ * Update to git 20230707 from the gcc-12 branch. ++ - Fix PR c++/110595, PR target/105325 (PPC), PR d/108842, PR d/110516, ++ PR d/110514, PR fortran/110585, PR libstdc++/104299. ++ * Apply proposed patch for PR target/106966. Addresses: #1019011. ++ ++ -- Matthias Klose Mon, 10 Jul 2023 17:11:56 +0200 ++ ++gcc-12 (12.3.0-5) unstable; urgency=medium ++ ++ * Update to git 20230630 from the gcc-12 branch. ++ - Fix PR tree-optimization/110298, PR middle-end/110182, ++ PR target/110132 (AArch64), PR target/110100 (AArch64), ++ PR target/110100 (AArch64), PR target/109932 (PPC), ++ PR target/110011 (PPC), PR tree-optimization/105651, ++ PR rtl-optimization/110237, PR target/110309 (x86), ++ PR testsuite/66005, PR middle-end/110420, PR middle-end/103979, ++ PR middle-end/98619, PR d/110359, PR d/110113. ++ ++ [ Nicolas Boulenguez ] ++ * ada/check_ali_update.sh: report checksum changes but ignore timestamps ++ ++ [ Matthias Klose ] ++ * Remove bad liblto_plugin.so symlink introduced in 12.3.0-4. ++ ++ -- Matthias Klose Fri, 30 Jun 2023 14:05:15 +0200 ++ ++gcc-12 (12.3.0-4) unstable; urgency=medium ++ ++ * Update to git 20230617 from the gcc-12 branch. ++ - Fix PR target/110136 (loongarch). ++ * Fix providing the liblto_plugin.so symlink in the new place. ++ ++ -- Matthias Klose Sat, 17 Jun 2023 11:56:50 +0200 ++ ++gcc-12 (12.3.0-3) unstable; urgency=high ++ ++ * Update to git 20230613 from the gcc-12 branch. ++ - Fix PR middle-end/110200. ++ * gcc-12-base: Bump the Breaks: gnat (<< 12) for smoother upgrades from ++ bullseye (Andreas Beckmann). Closes: #1036641. ++ * Remove obsolete gcn assembler patch. ++ ++ -- Matthias Klose Tue, 13 Jun 2023 12:57:17 +0200 ++ ++gcc-12 (12.3.0-2) unstable; urgency=medium ++ ++ * Update to git 20230611 from the gcc-12 branch. ++ - Fix PR tree-optimization/109778, PR target/108758 (PPC), ++ PR target/109069 (PPC), PR c/105660, PR c++/109160, ++ PR c++/106740, PR c++/105852, PR libffi/109447, PR target/109650 (AVR), ++ PR target/92729 (AVR), PR target/106907 (PPC), PR target/110044 (PPC), ++ PR target/110108 (X86), PR target/109800 (ARM), PR target/109939 (ARM), ++ PR target/110088 (AVR), PR target/109954 (AVR), PR target/110036 (RISCV), ++ PR target/104327 (AVR), PR target/82931 (AVR), PR target/70243 (PPC), ++ PR tree-optimization/109505, PR target/105753 (AVR), ++ PR target/108442 (ARM), PR target/108177 (ARM), PR target/96795 (ARM), ++ PR target/107515 (ARM), PR target/107515 (ARM), PR target/96795 (ARM), ++ PR target/96795 (ARM), PR c++/109868, PR c++/109241, PR c++/109160, ++ PR c++/106740, PR c++/105852, PR fortran/96024, PR fortran/100607, ++ PR fortran/109846, PR libffi/109447, PR libstdc++/109822, ++ PR libstdc++/109949, PR libstdc++/109261, PR libstdc++/109261, ++ PR libstdc++/109261, PR libstdc++/108030, PR libstdc++/108856, ++ PR libstdc++/108030, PR libstdc++/108030, PR libstdc++/107801. ++ * Configure --with-cpu=ev56 for alpha. Closes: #1036158. ++ * Also provide the liblto_plugin.so symlink in the new place. ++ Addresses: #1036566. ++ ++ -- Matthias Klose Sun, 11 Jun 2023 14:06:02 +0200 ++ ++gcc-12 (12.3.0-1) experimental; urgency=medium ++ ++ * GCC 12.3.0 release. ++ * Update newlib to 4.3.0. ++ * Refresh patches. ++ ++ -- Matthias Klose Wed, 10 May 2023 08:59:00 +0200 ++ ++gcc-12 (12.2.0-18) experimental; urgency=medium ++ ++ * Update to git 20230502 from the gcc-12 branch (12.3 release candidate). ++ - Fix PR other/109293, PR tree-optimization/109392, ++ PR tree-optimization/108791, PR rtl-optimization/106421, ++ PR target/105980 (x86), PR middle-end/106057, PR ipa/107769, ++ PR ipa/109318, PR target/109566 (PPC), PR tree-optimization/109609, ++ PR rtl-optimization/109585, PR tree-optimization/109573, ++ PR target/109478 (PARISC), PR target/108812 (PPC), ++ PR tree-optimization/109410, PR middle-end/106190, PR target/109276 (x86), ++ PR ipa/105685, PR tree-optimization/109176, PR target/108589 (AArch64), ++ PR target/108910 (AArch64), PR tree-optimization/109434, ++ PR tree-optimization/109502, PR tree-optimization/109491, ++ PR tree-optimization/109473, PR tree-optimization/109469, PR lto/109263, ++ PR tree-optimization/109219, PR ipa/106124, PR ipa/105676, ++ PR target/108699 (PPC), PR target/108807 (PPC), PR target/109137 (x86), ++ PR target/109067 (PPC), PR tree-optimization/109427, ++ PR tree-optimization/96373, PR tree-optimization/108979, ++ PR target/109072 (AArch64), PR rtl-optimization/108681, ++ PR tree-optimization/108608, PR tree-optimization/108603, ++ PR rtl-optimization/108508, PR tree-optimization/108430, ++ PR rtl-optimization/108086, PR target/109140 (SPARC), PR ipa/107925, ++ PR target/109178 (PPC), PR target/105554, PR middle-end/108685, ++ PR c/108079, PR testsuite/108973, PR c/108986, PR c++/108934, ++ PR debug/108967, PR middle-end/108854, PR target/108881 (x86), ++ PR tree-optimization/108819, PR target/100758 (x86), ++ PR tree-optimization/108950, PR tree-optimization/108821, ++ PR tree-optimization/108816, PR tree-optimization/108793, ++ PR tree-optimization/108724, PR middle-end/108625, PR middle-end/108500, ++ PR tree-optimization/107451, PR tree-optimization/106904, ++ PR target/108429 (x86), PR analyzer/109094, PR analyzer/108968, ++ PR analyzer/108733, PR analyzer/108704, PR analyzer/106325, ++ PR analyzer/107948, PR analyzer/105784, PR analyzer/107582, ++ PR analyzer/107345, PR analyzer/106573, PR analyzer/106573, ++ PR c++/107163, PR c/109151, PR c/107465, PR c/107465, PR sanitizer/108060, ++ PR sanitizer/109050, PR c/108079, PR c++/101118, PR c++/107768, ++ PR c++/106969, PR c++/108219, PR c++/108218, PR c++/108795, ++ PR c++/109357, PR c++/105481, PR c++/105996, PR c++/106890, ++ PR c++/108975, PR c++/69410, PR c++/105809, PR c++/108242, ++ PR c++/101869, PR c++/105406, PR c++/103871, PR c++/98056, ++ PR c++/108468, PR c++/107310, PR c++/108566, PR c++/107154, ++ PR c++/108099, PR c++/109319, PR c++/109164, PR c++/109096, ++ PR c++/107558, PR c++/109039, PR c/108079, PR debug/108716, ++ PR c++/107280, PR d/109144, PR d/109108, PR fortran/61615, ++ PR fortran/99982, PR fortran/108010, PR fortran/109511, PR fortran/106856, ++ PR fortran/108025, PR fortran/102331, PR fortran/103506, ++ PR fortran/99036, PR fortran/109186, PR fortran/85877, PR fortran/87127, ++ PR fortran/106945, PR fortran/104332, PR target/108910, PR other/109306, ++ PR libquadmath/87204, PR libquadmath/94756, PR libstdc++/108362, ++ PR libstdc++/107850, PR libstdc++/108952, PR libstdc++/109339, ++ PR libstdc++/107466, PR libstdc++/103755, PR libstdc++/107852, ++ PR libstdc++/106199, PR libstdc++/100366, PR libstdc++/103387, ++ PR libstdc++/109242, PR libstdc++/108118, PR libstdc++/108554, ++ PR libstdc++/109299, PR libstdc++/108413, PR libstdc++/109064, ++ PR libstdc++/109182, PR libstdc++/109165. ++ * Refresh patches. ++ ++ -- Matthias Klose Tue, 02 May 2023 10:09:03 +0200 ++ ++gcc-12 (12.2.0-17) experimental; urgency=medium ++ ++ * Update to git 20230314 from the gcc-12 branch. ++ - Fix PR tree-optimization/105532, PR tree-optimization/108684, ++ PR c++/106188, PR c++/106713, PR fortran/108923, PR fortran/108923, ++ PR libstdc++/103934. ++ * Drop gdc build dependency on unsupported architectures. Closes: #1026201. ++ ++ -- Matthias Klose Tue, 14 Mar 2023 10:32:48 +0100 ++ ++gcc-12 (12.2.0-16) experimental; urgency=medium ++ ++ * Update to git 20230309 from the gcc-12 branch. ++ - Fix PR middle-end/108546, PR target/109000 (loongarch), PR c++/107079, ++ PR c++/107939, PR c++/108998, PR c++/108116, PR c++/107853, ++ PR c++/107864, PR c++/107179. ++ * Pass GM2_FOR_TARGET for cross builds (Helmut Grohne). Closes: #1032161. ++ * Don't add libhwasan0 in the control file when not building common libs. ++ ++ -- Matthias Klose Thu, 09 Mar 2023 10:32:27 +0100 ++ ++gcc-12 (12.2.0-15) experimental; urgency=medium ++ ++ * Update to git 20230305 from the gcc-12 branch. ++ - Fix PR target/108396 (PPC), PR target/108348 (PPC), ++ PR target/108272 (PPC), PR c++/105593, PR c++/105593, ++ PR tree-optimization/108440, PR tree-optimization/106523, ++ PR tree-optimization/108688, PR tree-optimization/108692, ++ PR middle-end/108435, PR debug/108573, PR target/108599 (x86), ++ PR rtl-optimization/108596, PR other/108560, PR bootstrap/90543, ++ PR tree-optimization/108498, PR middle-end/108459, PR middle-end/108237, ++ PR middle-end/108264, PR tree-optimization/108068, ++ PR tree-optimization/108166, PR rtl-optimization/108193, ++ PR rtl-optimization/106751, PR tree-optimization/108095, ++ PR tree-optimization/107997, PR debug/106719, PR target/106875 (x86), ++ PR middle-end/107317, PR tree-optimization/108582, ++ PR tree-optimization/108522, PR tree-optimization/108522, ++ PR ipa/107944, PR tree-optimization/108306, PR target/107987 (ARM), ++ PR middle-end/108543, PR tree-optimization/108164, PR middle-end/107994, ++ PR tree-optimization/108076, PR tree-optimization/107554, ++ PR driver/106624, PR target/106101 (S390), PR tree-optimization/108199, ++ PR tree-optimization/108137, PR target/107714 (ARM), ++ PR target/108140 (AArch64), PR middle-end/102633, PR c/107127, ++ PR c++/107593, PR c++/108597, PR c++/105593, PR middle-end/102633, ++ PR c/105972, PR c++/107593, PR c++/108597, PR c++/106675, PR c++/105593, ++ PR middle-end/102633, PR c++/108474, PR c++/108365, PR c++/108607, ++ PR c++/53932, PR c++/108286, PR c++/108206, PR c++/108180, ++ PR c++/107065, PR c++/107461, PR c++/107461, PR c++/107755, ++ PR c++/107593, PR c++/108597, PR fortran/108451, PR fortran/108349, ++ PR fortran/103259, PR fortran/95107, PR fortran/108450, ++ PR fortran/108609, PR fortran/108527, PR fortran/108453, ++ PR fortran/108558, PR fortran/108529, PR fortran/106209, ++ PR fortran/108421, PR fortran/108420, PR fortran/108501, ++ PR fortran/108502, PR fortran/108434, PR fortran/106731, ++ PR middle-end/108459, PR c++/108286, PR c++/108180, PR fortran/108558, ++ PR libstdc++/103934, PR libstdc++/107468, PR libstdc++/107468, ++ PR libstdc++/105730, PR libstdc++/106183. ++ - Fix PR sanitizer/108834, PR target/104921 (AArch64), PR target/90458 (x86), ++ PR middle-end/106080, PR c/108880, PR c++/107938, PR c++/108550, ++ PR c++/106259, PR c++/107574, PR c++/108829, PR d/108877, PR fortran/108937, ++ PR fortran/96024, PR fortran/96025, PR fortran/104554, PR libstdc++/108030, ++ PR libstdc++/108636. ++ - Add support for AMD Family 19h Zen version 4. ++ * Stop building packages built by GCC 13. ++ ++ -- Matthias Klose Sun, 05 Mar 2023 09:52:16 +0100 ++ ++gcc-12 (12.2.0-14) unstable; urgency=medium ++ ++ * Update to git 20230108 from the gcc-12 branch. ++ - Fix PR target/106736 (PPC), PR c++/108282, PR libstdc++/108265. ++ * Bump standards version. ++ ++ -- Matthias Klose Sun, 08 Jan 2023 10:12:42 +0100 ++ ++gcc-12 (12.2.0-13) unstable; urgency=medium ++ ++ * Fix libstdc++ symbols file, not distinguishing versions for some ++ symbols. ++ * Build-depend on gnat-12 instead of gnat-11. Closes: #1023695. ++ ++ -- Matthias Klose Mon, 02 Jan 2023 22:28:39 +0100 ++ ++gcc-12 (12.2.0-12) unstable; urgency=medium ++ ++ * Update to git 20221231 from the gcc-12 branch. ++ - Fix PR fortran/108131. ++ * Update multiarch patch for looongson. Closes: #1027278. ++ ++ -- Matthias Klose Sat, 31 Dec 2022 12:30:21 +0100 ++ ++gcc-12 (12.2.0-11) unstable; urgency=medium ++ ++ * Update to git 20221226 from the gcc-12 branch. ++ - Fix PR bootstrap/106482, PR d/104749, PR target/98776 (AArch64), ++ PR tree-optimization/107898, PR tree-optimization/107865, ++ PR tree-optimization/107833, PR tree-optimization/107839, ++ PR tree-optimization/107686, PR tree-optimization/107766, ++ PR tree-optimization/107647, PR tree-optimization/107407, ++ PR tree-optimization/106868, PR libstdc++/107814, PR libstdc++/108097. ++ * Install versioned gm2 doc files. Closes: #1026245. ++ * Backport PR driver/93371 from the trunk. Closes: #1025948. ++ ++ -- Matthias Klose Mon, 26 Dec 2022 16:39:09 +0100 ++ ++gcc-12 (12.2.0-10) unstable; urgency=medium ++ ++ * Update to git 20221211 from the gcc-12 branch. ++ - Fix PR tree-optimization/107956, PR target/107863 (x86), ++ PR d/105659, PR rtl-optimization/107482, PR target/107748 (x86), ++ PR target/107183, PR target/107713, PR tree-optimization/107206, ++ PR target/107304 (x86), PR c/41041, PR target/107404 (x86), ++ PR tree-optimization/107121, PR c/107001, PR c++/107358, PR c/106981, ++ PR c++/104066, PR c++/105774, PR c++/106829, PR d/107592, ++ PR fortran/107576, PR target/104688 (x86), PR libstdc++/91456, ++ PR libstdc++/106201, PR libstdc++/107801, PR libstdc++/95048, ++ PR libstdc++/103295. ++ * Add multiarch support for loongarch (Dandan Zhang). Closes: #1023785. ++ ++ -- Matthias Klose Sun, 11 Dec 2022 18:52:56 +0100 ++ ++gcc-12 (12.2.0-9) unstable; urgency=medium ++ ++ * Update to git 20221103 from the gcc-12 branch. ++ - Fix PR c++/107358, PR c++/105774, PR tree-optimization/107121, ++ PR c/107001, PR c/106981, PR c++/106829. ++ * Fix PR ada/107475, proposed patch. ++ * gm2-12-doc: Add missing Breaks+Replaces to gm2-12. Closes: #1023324. ++ * Remove the armel specific libstdc++ symbols file. Closes: #1022935. ++ * Build libatomic in the rtlibs stage (Helmut Grohne). Closes: #1009286. ++ ++ -- Matthias Klose Thu, 03 Nov 2022 09:40:42 +0100 ++ ++gcc-12 (12.2.0-8) experimental; urgency=medium ++ ++ * Update to git 20221030 from the gcc-12 branch. ++ - Fix PR middle-end/90115, PR target/106355 (S390), PR target/107364 (x86), ++ PR target/105421 (GCN), PR tree-optimization/107323, PR fortran/100097, ++ PR fortran/100098, PR fortran/103413, PR fortran/105633, PR lto/107418, ++ PR middle-end/90115, PR target/105421. ++ * Split out a gm2-12-doc package. ++ * Update VCS attributes. ++ * Bump standards version. ++ ++ -- Matthias Klose Mon, 31 Oct 2022 10:31:17 +0100 ++ ++gcc-12 (12.2.0-7) unstable; urgency=medium ++ ++ * Update to git 20221021 from the gcc-12 branch. ++ - Fix PR middle-end/100400, PR target/96072 (PPC), PR target/100645 (PPC). ++ * Fix the binary-arch only build. ++ ++ -- Matthias Klose Fri, 21 Oct 2022 10:19:56 +0200 ++ ++gcc-12 (12.2.0-6) unstable; urgency=medium ++ ++ * Update to git 20221019 from the gcc-12 branch. ++ - Fix PR tree-optimization/106934, PR tree-optimization/106922, ++ PR tree-optimization/106892, PR tree-optimization/105937, ++ PR target/107064 (x86), PR fortran/106817, PR fortran/105012, ++ PR fortran/100040, PR fortran/100029, PR fortran/106579, ++ PR middle-end/106548, PR libstdc++/106320, PR libstdc++/106695, ++ PR libstdc++/106607, PR libstdc++/106589, PR libstdc++/105678, ++ PR target/99685 (PPC), PR tree-optimization/107254, ++ PR tree-optimization/107212, PR tree-optimization/107160, ++ PR tree-optimization/107107, PR tree-optimization/106922, ++ PR tree-optimization/106922, PR target/107248 (SPARC), PR c++/106925. ++ * Fix libstdc++ build on the Hurd. Closes: #1021357. ++ * gobjc: drop obsolete sparc-only conflict (Helmut Grohne). Closes: #1020599. ++ * gobjc: remove unused binary-without-manpage lintian overrides (Helmut ++ Grohne). Closes: #1020600. ++ * Include the Modula-2 documentation into the gm2-12 package. ++ * Handle the "bookworm" release name instead of "sid". ++ * Backport two newlib patches for the nvptx target. ++ ++ -- Matthias Klose Wed, 19 Oct 2022 07:38:40 +0200 ++ ++gcc-12 (12.2.0-5) unstable; urgency=medium ++ ++ * Update libgcc symbols file for arc. ++ * Work around building libobjc on arc. ++ * Don't build Ada, D and Go on arc. ++ ++ -- Matthias Klose Mon, 03 Oct 2022 10:47:38 +0200 ++ ++gcc-12 (12.2.0-4) unstable; urgency=medium ++ ++ * Update to git 20221004 from the gcc-12 branch. ++ - Fix PR target/107061 (x86), PR middle-end/106982, ++ PR target/106491 (AArch64), PR target/104482 (PPC), ++ PR target/105485 (PPC), PR fortran/100103, PR fortran/100132, ++ PR fortran/107054, PR fortran/82868, PR fortran/106985, ++ PR fortran/106986. ++ * Add multiarch patch for arc-linux-gnu. Closes: #989453. ++ ++ -- Matthias Klose Sun, 02 Oct 2022 12:12:08 +0200 ++ ++gcc-12 (12.2.0-3) unstable; urgency=medium ++ ++ * Update to git 20220920 from the gcc-12 branch. ++ - Fix PR tree-optimization/106860, PR tree-optimization/106841, ++ PR tree-optimization/106809, PR c++/93259, PR c++/106893, PR c++/90451, ++ PR fortran/106857, PR fortran/100245, PR libstdc++/106320. ++ ++ -- Matthias Klose Tue, 20 Sep 2022 10:02:11 +0200 ++ ++gcc-12 (12.2.0-2) unstable; urgency=medium ++ ++ * Update to git 20220908 from the gcc-12 branch. ++ - Fix PR target/101322 (PPC), PR rtl-optimization/106187, ++ PR target/105463 (ARM), PR other/106782, PR other/106782, ++ PR target/106524 (AArch64), PR target/106017 (PPC), ++ PR target/106714 (x86), PR target/106721 (x86), PR target/106704 (x86), ++ PR rtl-optimization/106590, PR target/106459 (loongarch), ++ PR tree-optimization/106322, PR target/103353 (PPC), PR middle-end/106548, ++ PR c++/106759, PR fortran/100136, PR fortran/106579, PR fortran/106579, ++ PR fortran/103694, PR fortran/106566, PR libstdc++/106695, ++ PR libstdc++/106607, PR libstdc++/106589, PR libstdc++/105678. ++ ++ -- Matthias Klose Thu, 08 Sep 2022 15:52:13 +0200 ++ ++gcc-12 (12.2.0-1) unstable; urgency=medium ++ ++ * GCC 12.2.0 release. ++ * Strip the cc* executables again. Closes: #1015185. ++ * cpp-12: Suggest cpp-12-doc. Closes: #1016930. ++ * Refresh patches. ++ ++ -- Matthias Klose Mon, 22 Aug 2022 09:38:01 +0200 ++ ++gcc-12 (12.1.0-8) unstable; urgency=medium ++ ++ * Update to git 20220809 from the gcc-12 branch. ++ - Fix PR testsuite/106345, PR target/106091 (PPC), PR middle-end/106449, ++ PR debug/106261, PR middle-end/106144, PR tree-optimization/106189, ++ PR lto/106129, PR tree-optimization/106087, PR tree-optimization/106063, ++ PR tree-optimization/105665, PR tree-optimization/100810, ++ PR middle-end/106331, PR tree-optimization/106131, PR middle-end/106027, ++ PR tree-optimization/106112, PR tree-optimization/105971, ++ PR tree-optimization/105969, PR middle-end/105965, PR target/105459, ++ PR tree-optimization/105946, PR analyzer/106225, PR analyzer/106204, ++ PR analyzer/105285, PR preprocessor/97498, PR c++/106311, PR c++/106230, ++ PR c++/105912, PR c++/105842, PR c++/53164, PR c++/105848, ++ PR c++/105637, PR c++/100374, PR c++/105758, PR c++/96363, ++ PR fortran/103504, PR fortran/101330, PR libfortran/106079, ++ PR libstdc++/104443, PR libstdc++/106248, PR libstdc++/105995, ++ PR libstdc++/105957, PR libstdc++/105844, PR libstdc++/100823, ++ PR libstdc++/88881, PR libstdc++/105880, PR d/106555 (closes: #1016701). ++ * Update watch file. ++ ++ -- Matthias Klose Tue, 09 Aug 2022 21:22:04 +0200 ++ ++gcc-12 (12.1.0-7) unstable; urgency=medium ++ ++ * Remove the libphobos test forkgc2.d, hangs. See PR d/103944. ++ ++ -- Matthias Klose Mon, 18 Jul 2022 18:35:43 +0200 ++ ++gcc-12 (12.1.0-6) unstable; urgency=medium ++ ++ * Update to git 20220717 from the gcc-12 branch. ++ - Fix PR rtl-optimization/105041, PR tree-optimization/105860, ++ PR target/105930 (x86), PR tree-optimization/106114, ++ PR target/105991 (PPC), PR target/106122 (x86), PR c++/106102, ++ PR target/103722 (SH), PR bootstrap/105551, PR target/106097, ++ PR c++/105626, PR c++/106024, PR c++/105541, PR c++/105779, ++ PR c++/106024, PR d/106139, PR fortran/104313, PR fortran/103137, ++ PR fortran/103138, PR fortran/103693, PR fortran/105243, ++ PR fortran/106121, PR fortran/105954, PR fortran/105691, ++ PR fortran/105813. ++ * Apply a hack to build libgo on the Hurd. Closes: #1005297. ++ ++ -- Matthias Klose Sun, 17 Jul 2022 11:18:47 +0200 ++ ++gcc-12 (12.1.0-5) unstable; urgency=medium ++ ++ * Update to git 20220629 from the gcc-12 branch. ++ - Fix PR bootstrap/105551, PR rtl-optimization/106032, PR ipa/105600, ++ PR middle-end/106030, PR target/106096, PR tree-optimization/105736, ++ PR tree-optimization/105254, PR tree-optimization/105940, ++ PR tree-optimization/105940, PR target/105960 (x86), PR ipa/105739, ++ PR target/105209 (alpha), PR target/105970 (x86), PR middle-end/105998, ++ PR middle-end/105951, PR target/105981 (ARM), PR target/104871 (Darwin), ++ PR target/105599 (Darwin), PR target/105953 (x86), PR c++/105931, ++ PR c++/105925, PR c++/105885, PR c++/105964, PR c++/105908, ++ PR c++/106001, PR c++/105871, PR libgomp/106045. ++ ++ [ Matthias Klose ] ++ * Fix PR bootstrap/105551, taken from the trunk. ++ ++ [ Nicolas Boulenguez ] ++ * ada: move ada/debian_packaging.mk from the gcc-BV source package ++ back to gnat. ++ ++ -- Matthias Klose Wed, 29 Jun 2022 15:42:10 +0200 ++ ++gcc-12 (12.1.0-4) unstable; urgency=medium ++ ++ * Update to git 20210616 from the gcc-12 branch. ++ - Fix PR target/105953 (x86). ++ * Fix PR bootstrap/105551, taken from the trunk. ++ ++ -- Matthias Klose Thu, 16 Jun 2022 07:16:59 +0200 ++ ++gcc-12 (12.1.0-3) unstable; urgency=medium ++ ++ * Update to git 20220612 from the gcc-12 branch. ++ - Fix PR target/105879 (xtensa), PR target/105854 (x86), ++ PR tree-optimization/105786, PR tree-optimization/105726, ++ PR middle-end/105711, PR middle-end/105604, PR ipa/105639, ++ PR sanitizer/105729, PR sanitizer/105714, PR c/105635, PR target/101891, ++ PR other/105527, PR target/105556 (PPC), PR tree-optimization/103116, ++ PR tree-optimization/105618, PR rtl-optimization/105577, ++ PR tree-optimization/105562, PR rtl-optimization/105559, ++ PR middle-end/105537, PR tree-optimization/105431, ++ PR tree-optimization/105458, PR target/105162 (AArch64), ++ PR rtl-optimization/105455, PR c++/105756, PR c++/105852, PR c++/105761, ++ PR c++/105761, PR c++/105795, PR c++/105734, PR c++/105779, ++ PR c++/105491, PR c++/105652, PR c++/105655, PR c++/105623, ++ PR c++/102307, PR c++/105725, PR c++/105589, PR c++/105191, ++ PR c++/92385, PR c++/104470, PR c++/102651, PR c++/49387, ++ PR d/105544, PR fortran/105230, PR preprocessor/105732, ++ PR gcov-profile/105535, PR libgomp/105745, PR libstdc++/105671, ++ PR libstdc++/105681. ++ * Reenable the jit build on m68k. Closes: #1009026. ++ ++ -- Matthias Klose Sun, 12 Jun 2022 19:19:41 +0200 ++ ++gcc-12 (12.1.0-2) unstable; urgency=medium ++ ++ * Update to git 20220513 from the gcc-12 branch. ++ - Fix PR ipa/100413, PR tree-optimization/105528, PR target/105292 (SPARC), ++ PR c++/105476, PR libstdc++/105284, PR libstdc++/105284, ++ PR libstdc++/104731. ++ * Refresh the cross-fixes patch. ++ * Update NEWS files for GCC 12.1. ++ ++ -- Matthias Klose Fri, 13 May 2022 12:55:15 +0200 ++ ++gcc-12 (12.1.0-1) unstable; urgency=medium ++ ++ * GCC 12.1.0 release. ++ * Refresh patches. ++ ++ -- Matthias Klose Sun, 08 May 2022 15:44:36 +0200 ++ ++gcc-12 (12-20220428-1) unstable; urgency=medium ++ ++ * New upstream snapshot, taken from the gcc-12 branch. ++ ++ [ Matthias Klose ] ++ * Don't enable -fcf-protection with -m16. LP: #1940029. ++ * Update libgccjit and libgphobos symbols files. ++ ++ [ Nicolas Boulenguez ] ++ * ada/confirm_debian_bugs.py: trivial update. ++ ++ -- Matthias Klose Thu, 28 Apr 2022 20:10:12 +0200 ++ ++gcc-12 (12-20220319-1) unstable; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ - Import go 1.18.0. ++ * Disable the Ada ALI check before GCC 12 is released. ++ ++ -- Matthias Klose Sat, 19 Mar 2022 08:39:27 +0100 ++ ++gcc-12 (12-20220313-1) unstable; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Use again GCC 11 for the bootstrap, and GCC 12 on alpha and m68k. ++ * Fix PR target/104890, applying proposed patch. ++ * Update libgphobos symbols file. ++ ++ -- Matthias Klose Mon, 14 Mar 2022 06:02:13 +0100 ++ ++gcc-12 (12-20220302-1) unstable; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Reenable Ada on m68k; build using gcc-10 for the Ada bootstrap. ++ * Update libgphobos symbols file. ++ ++ -- Matthias Klose Wed, 02 Mar 2022 14:52:13 +0100 ++ ++gcc-12 (12-20220222-1) unstable; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Reenable Ada on alpha. See PR target/98724. ++ * Don't apply Ada patches when not building Ada. ++ * Update the alpha-ieee patch for GCC 12. ++ * Follow-up patch for PR go/104290 (Hurd) (Svante Signell). ++ * Disable gnat on x32 with glibc << 2.35. ++ ++ -- Matthias Klose Tue, 22 Feb 2022 12:15:48 +0100 ++ ++gcc-12 (12-20220214-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Bump libgo soname, golang-1.18 import. ++ ++ -- Matthias Klose Mon, 14 Feb 2022 04:01:08 +0100 ++ ++gcc-12 (12-20220206-2) experimental; urgency=medium ++ ++ [ Matthias Klose ] ++ * New upstream snapshot, taken from the trunk. ++ * Update cross-build patches. ++ ++ [ Aurelien Jarno ] ++ * For riscv64, change --with-arch to rv64gc (from rv64imafd). ++ ++ -- Matthias Klose Sun, 06 Feb 2022 13:20:19 +0100 ++ ++gcc-12 (12-20220126-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ ++ -- Matthias Klose Wed, 26 Jan 2022 11:49:18 +0100 ++ ++gcc-12 (12-20220119-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Disable D on ia64, m68k, sh4 and sparc64. ++ * Disable D on KFreeBSD and the Hurd. ++ * Revert the PR ada/79724 patch, conflicting with the local ada-gcc-name ++ patch. ++ * Apply proposed patch for PR ada/103538 for x32. ++ ++ -- Matthias Klose Wed, 19 Jan 2022 10:31:16 +0100 ++ ++gcc-12 (12-20220116-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Remove the gdc-driver-nophobos patch. ++ * Configure instead with --with-libphobos-druntime-only=yes. ++ ++ -- Matthias Klose Sun, 16 Jan 2022 16:43:31 +0100 ++ ++gcc-12 (12-20220106-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Update symbols file for libgphobos. ++ ++ -- Matthias Klose Thu, 06 Jan 2022 11:30:02 +0100 ++ ++gcc-12 (12-20211217-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Bump libgphobos soversion. ++ * Update libgccjit and libgphobos symbols files. ++ ++ -- Matthias Klose Fri, 17 Dec 2021 04:55:01 +0100 ++ ++gcc-12 (12-20211211-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Use gnat-11/gdc-11 as bootstrap compilers for recent releases. ++ ++ -- Matthias Klose Sat, 11 Dec 2021 13:49:46 +0100 ++ ++gcc-12 (12-20211206-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Add gdc as a build dependency for native builds. ++ * Update symbols files for libgcc-s, libgccjit, libgphobos. ++ ++ -- Matthias Klose Mon, 06 Dec 2021 11:03:14 +0100 ++ ++gcc-12 (12-20211127-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ ++ -- Matthias Klose Sat, 27 Nov 2021 08:51:55 +0100 ++ ++gcc-12 (12-20211126-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Lower severity of the gcc-N-base packages. Addresses: #997826. ++ * Fix gcc-12-locales build. Closes: #999764. ++ * Fix the gcc-12 cross builds (Helmut Grohne). Closes: #1000459. ++ * Configure --with-cpu=power9 on ppc64el on the Ubuntu development ++ release. ++ ++ -- Matthias Klose Fri, 26 Nov 2021 10:00:23 +0100 ++ ++gcc-12 (12-20211117-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Drop brig/libhsail packaging bits. ++ * Update breaks/replaces, update textdomain. Closes: #999764. ++ * Move libtsan_preinit.o into libgcc-12-dev. Closes: #999752. ++ * Bump standards version. ++ ++ -- Matthias Klose Wed, 17 Nov 2021 22:08:35 +0100 ++ ++gcc-12 (12-20211113-1) experimental; urgency=medium ++ ++ * New upstream snapshot, taken from the trunk. ++ * Configure with --enable-offload-defaulted. ++ ++ -- Matthias Klose Sat, 13 Nov 2021 15:13:11 +0100 ++ ++gcc-11 (11.2.0-10) unstable; urgency=medium ++ ++ * Update to git 20211021 from the gcc-11 branch. ++ - Fix PR rtl-optimization/102627, PR target/100340 (Darwin), ++ PR target/102588 (SPARC), PR debug/102441, PR libstdc++/101583, ++ PR libstdc++/102592, PR libstdc++/100187, PR libstdc++/100237, ++ PR libstdc++/100249, PR libstdc++/100287, PR libstdc++/100285, ++ PR libstdc++/100863, PR libstdc++/100863, PR libstdc++/65816, ++ PR libstdc++/102048, PR libstdc++/90787, PR libstdc++/101599, ++ PR libstdc++/101589, PR libstdc++/101483, PR libstdc++/100606, ++ PR libstdc++/101960, PR c++/102535, PR libstdc++/101960, ++ PR libstdc++/101870, PR libstdc++/101923, PR libstdc++/102425, ++ PR libstdc++/101761, PR libstdc++/99876, PR libstdc++/102074, ++ PR libstdc++/102270, PR libstdc++/102270, PR libstdc++/102280, ++ PR libstdc++/102667, PR target/102761 (x86), PR target/100316 (RISCV), ++ PR target/100208 (GCN), PR ada/100486, PR c++/102642, PR fortran/102745, ++ PR fortran/102716. ++ ++ [ Nicolas Boulenguez ] ++ * ada/check_ali_update: add tests, print changed sources with changed .ali ++ files, always report, interrupt when DEB_CHECK_ALI_UPDATE. ++ * ada/debian_packaging.mk: drop BUILDER_JOBS now redundant with ++ dpkg/buildopts.mk. ++ * ada/debian_packaging.mk: update comments. ++ * ada: avoid -L for local links with freshly built objects. ++ * ada/confirm_debian_bugs.py: remove bugs fixed in gnat-11. ++ * libgnat: strip unreproducible build flags from libgnat-dev .ali files. ++ ++ [ Matthias Klose ] ++ * Backport amdgcn changes from the trunk: ++ - Fix register issue for global_load assembler functions. ++ - amdgcn: Add -mxnack and -msram-ecc [PR 100208]. ++ - amdgcn: Fix attributes for LLVM-12 [PR 100208]. ++ - Support LLVM 13 assembler syntax. ++ ++ -- Matthias Klose Thu, 21 Oct 2021 10:17:22 +0200 ++ ++gcc-11 (11.2.0-9) unstable; urgency=medium ++ ++ * Update to git 20211010 from the gcc-11 branch. ++ - Fix PR debug/102441, PR c++/98216, PR c++/91292, PR debug/102373, ++ PR c++/64697, PR target/102498 (x86), PR tree-optimization/102400, ++ PR tree-optimization/102451, PR sanitizer/102515, PR c++/102640, ++ PR c++/99904, PR c++/102547, PR c++/102535, PR c++/95567, PR c++/102412, ++ PR c++/98486, PR c++/102163, PR c++/101344, PR c++/101803, ++ PR c++/101883, PR c++/102548, PR c++/102496, PR c++/102454, ++ PR d/102574, PR fortran/102458, PR fortran/102458, PR fortran/102520, ++ PR libgomp/96661. ++ ++ -- Matthias Klose Sun, 10 Oct 2021 18:52:10 +0200 ++ ++gcc-11 (11.2.0-8) unstable; urgency=medium ++ ++ * Update to git 20210924 from the gcc-11 branch. ++ - Fix PR target/102107 (PPC), PR target/102107 (PPC), PR fortran/102366, ++ PR fortran/102287, PR fortran/102311, PR target/102222 (S390), ++ PR tree-optimization/102400, PR tree-optimization/102451. ++ * ARM: pass architecture extensions to assembler if supported. Backported ++ from the trunk. ++ ++ -- Matthias Klose Fri, 24 Sep 2021 08:44:25 +0200 ++ ++gcc-11 (11.2.0-7) unstable; urgency=medium ++ ++ * Update to git 20210918 from the gcc-11 branch. ++ - Fix PR rtl-optimization/102306, PR target/101934 (AArch64), PR c++/88578, ++ PR c++/102295, PR target/97142 (PPC), PR ada/101970, PR c++/102305, ++ PR d/102185, PR fortran/85130, PR fortran/82314, PR fortran/98490, ++ PR fortran/101327. ++ * Fix libgcc-s1 symbols file for alpha. ++ * Don't build libjit on kfreebsd. See #994035. ++ ++ -- Matthias Klose Sun, 19 Sep 2021 10:08:56 +0200 ++ ++gcc-11 (11.2.0-5) unstable; urgency=medium ++ ++ * Update to git 20210909 from the gcc-11 branch. ++ - Fix PR c++/60318, PR target/102224 (x86), PR target/102115 (xtensa), ++ PR tree-optimization/102046, PR tree-optimization/101925, ++ PR middle-end/101824, PR target/102166 (x86), PR target/101849 (PPC), ++ PR c++/100495, PR fortran/100950, PR fortran/100950, PR fortran/102113. ++ * Configure again with --enable-cet, amd64 and x32 only. Closes: #993626. ++ ++ -- Matthias Klose Thu, 09 Sep 2021 13:48:13 +0200 ++ ++gcc-11 (11.2.0-4) unstable; urgency=medium ++ ++ * Update to git 20210902 from the gcc-11 branch. ++ - Fix PR target/101472 (x86), PR target/99744 (x86), PR target/101492 (x86), ++ PR target/101549 (x86), PR target/101471 (x86), PR target/102035 (ARM), ++ PR target/102035 (ARM), PR middle-end/101949, PR ipa/97565, ++ PR debug/101905, PR gcov-profile/89961, PR fortran/87737, ++ PR fortran/46691, PR fortran/99819, PR fortran/98411, PR libstdc++/101965, ++ PR libstdc++/100682, PR libstdc++/100285, PR libstdc++/100180, ++ PR libstdc++/100286, PR libstdc++/100351, PR libstdc++/100286, ++ PR libstdc++/100285, PR libstdc++/100180, PR c++/101592, ++ PR tree-optimization/102124, PR target/101472 (x86), ++ PR target/99744 (x86), PR target/101492 (x86), PR target/101549 (x86), ++ PR target/101471 (x86), PR target/102035 (ARM), PR target/102035 (ARM), ++ PR middle-end/101949, PR ipa/97565, PR debug/101905, ++ PR gcov-profile/89961, PR fortran/87737, PR fortran/46691, ++ PR fortran/99819, PR fortran/98411, PR libstdc++/101965, ++ PR libstdc++/100682, PR libstdc++/100285, PR libstdc++/100180, ++ PR libstdc++/100286, PR libstdc++/100351, PR libstdc++/100286, ++ PR libstdc++/100285, PR libstdc++/100180. ++ * Again, for armhf configure --with-arch=+fp, dropping the --with-fpu= ++ option; keep the old configure options for backports. ++ * Update libgcc-s1 symbols file for sh4. ++ * Remove trailing spaces in symbols files. ++ * Don't configure with --enable-cet on x86 for Debian (old hardware is more ++ valued than recent security features). Closes: #993162, #993172. ++ * Don't run the tests with the installed libstdc++ on slow buildds. ++ * Build again for mipsel and mips64el, too much hassle with separate sources. ++ * Disable the lto build on sparc64, memory issues on the buildd. ++ ++ -- Matthias Klose Thu, 02 Sep 2021 12:23:43 +0200 ++ ++gcc-11 (11.2.0-3) unstable; urgency=high ++ ++ * Update to git 20210823 from the gcc-11 branch. ++ - Fix PR target/101723 (ARM), PR tree-optimization/101373, ++ PR tree-optimization/101868, PR ipa/100600, PR ipa/101261, ++ PR ipa/101726, PR c/100150, PR fortran/99351, PR libstdc++/100139. ++ ++ -- Matthias Klose Mon, 23 Aug 2021 12:15:54 +0200 ++ ++gcc-11 (11.2.0-2) unstable; urgency=medium ++ ++ * Update to git 20210815 from the gcc-11 branch. ++ - Fix PR middle-end/101586, PR rtl-optimization/101562, PR d/101640, ++ PR d/101490, PR d/101441, PR d/101127, PR d/101619, PR d/96435, ++ PR d/101664, PR target/101531 (PPC), PR fortran/101536, ++ PR fortran/101514, PR fortran/101084, PR tree-optimization/101505, ++ PR target/100952 (PPC), PR target/94780 (MIPS), PR target/101132 (MIPS), ++ PR c/101512, PR sanitizer/101749, PR c++/101725, PR c++/100828, ++ PR fortran/101564, PR libstdc++/101866, PR libstdc++/101510, ++ PR libstdc++/101510, PR libstdc++/101056, PR libstdc++/101258, ++ PR gcov-profile/100788, PR middle-end/101624, PR c++/101759, ++ PR c++/101663, PR preprocessor/101638. ++ * Again, configure explicitly --with-fpu=vfpv3-d16 on armhf. ++ * Stop building the native compilers for mipsen targets from this source ++ package. See https://lists.debian.org/debian-gcc/2021/05/msg00011.html. ++ * Update binutils version requirements. ++ ++ -- Matthias Klose Sun, 15 Aug 2021 23:09:35 +0200 ++ ++gcc-11 (11.2.0-1) experimental; urgency=medium ++ ++ * GCC 11.2.0 release. ++ * Update gm2 from the gm2 gcc-11 branch. ++ * Refresh patches. ++ * Update libgfortran symbols file. ++ * Update libgphobos symbols file. ++ ++ -- Matthias Klose Wed, 28 Jul 2021 15:36:39 +0200 ++ ++gcc-11 (11.1.0-4) experimental; urgency=medium ++ ++ * Update to git 20210714 from the gcc-11 branch. ++ - Fix PR middle-end/101291, PR tree-optimization/101394, PR ipa/101066, ++ PR middle-end/101423, PR tree-optimization/100778, PR target/101377, ++ PR tree-optimization/100778, PR tree-optimization/101229, ++ PR tree-optimization/101173, PR tree-optimization/101280, ++ PR middle-end/101156, PR tree-optimization/100923, ++ PR tree-optimization/101088, PR tree-optimization/101025, ++ PR tree-optimization/101158, PR tree-optimization/101151, ++ PR tree-optimization/101105, PR middle-end/100672, PR target/101175, ++ PR middle-end/101167, PR inline-asm/100785, PR target/100310 (x86), ++ PR target/100856 (ARM), PR target/101016 (ARM), PR middle-end/101062, ++ PR middle-end/101062, PR target/100777 (PPC), PR target/99842 (PPC), ++ PR middle-end/100876, PR c++/100876, PR middle-end/100732, ++ PR middle-end/100684, PR middle-end/100574, PR middle-end/100307, ++ PR middle-end/100250, PR target/100871 (S390), PR target/101046, ++ PR rtl-optimization/101008, PR debug/100852, PR target/100887, ++ PR middle-end/100898, PR target/100887 (x86), PR middle-end/101009, ++ PR tree-optimization/100981, PR tree-optimization/100934, PR ipa/100791, ++ PR analyzer/99212, PR analyzer/101082, PR analyzer/99212, ++ PR analyzer/100615, PR analyzer/100244, PR c++/100879, PR c/100783, ++ PR c/100619, PR inline-asm/100785, PR c/100902, PR c++/101181, ++ PR c++/101247, PR c++/101247, PR c++/101194, PR c++/98832, ++ PR c++/101182, PR c++/100918, PR c++/97420, PR c++/101098, PR c++/100838, ++ PR c++/86355, PR c++/101087, PR c++/101040, PR c++/97566, PR c++/100752, ++ PR c++/101106, PR c/100902, PR c++/101078, PR c++/101029, PR c++/100946, ++ PR d/101273, PR d/101282, PR d/100999, PR d/100967, PR fortran/100227, ++ PR fortran/100283, PR fortran/101123, PR fortran/95501, ++ PR fortran/95502, PR fortran/100965, PR c++/100796, PR preprocessor/96391, ++ PR target/101235 (PPC), PR target/99939 (ARM), PR fortran/93524, ++ PR middle-end/101167, PR libstdc++/91488, PR d/100999, ++ PR libstdc++/100387, PR libstdc++/100806, PR libstdc++/95833, ++ PR libstdc++/91488, PR libstdc++/100940, PR libstdc++/100940, ++ PR libstdc++/100894, PR libstdc++/101034, PR libstdc++/101055, ++ PR libstdc++/100475, PR libstdc++/100982, PR libstdc++/98842, ++ PR libstdc++/100824, PR libstdc++/100824, PR libstdc++/100824, ++ PR libstdc++/100577, PR libstdc++/100770, PR libstdc++/100690, ++ PR libstdc++/100631, PR libstdc++/100631, PR libstdc++/100639. ++ * Fix -fstack-protector on musl (Helmut Grohne). Closes: #989521. ++ * Drop gdb build dependency on mipsel and mips64el for now. ++ Addresses: #990842. ++ ++ -- Matthias Klose Wed, 14 Jul 2021 10:19:29 +0200 ++ ++gcc-11 (11.1.0-3) experimental; urgency=medium ++ ++ * Update to git 20210610 from the gcc-11 branch. ++ - Fix PR bootstrap/100731, PR c++/91859, PR middle-end/100576, ++ PR rtl-optimization/100590, PR c++/100580, PR rtl-optimization/100342, ++ PR target/94177 (PPC), PR target/100767 (ARM), PR target/99725 (ARM), ++ PR target/100626 (x86), PR tree-optimization/100519, PR ipa/100513, ++ PR middle-end/100509, PR tree-optimization/100492, PR target/99960 (ARM), ++ PR c++/100281, PR target/99977 (ARM), PR bootstrap/100552, ++ PR target/100419 (ARM), PR target/100563 (ARM), ++ PR tree-optimization/100566, PR middle-end/100508, PR middle-end/100471, ++ PR target/99988 (AArch64), PR c/100550, PR c++/91859, PR c++/100797, ++ PR c++/95719, PR c++/100666, PR c++/100502, PR c++/100489, ++ PR c++/100281, PR c++/100634, PR c++/100659, PR c++/100367, ++ PR c++/96299, PR c++/100261, PR c++/100372, PR c++/100644, ++ PR c++/100205, PR c++/93314, PR fortran/98411, PR fortran/100656, ++ PR fortran/100602, PR fortran/100551, PR fortran/100633, ++ PR preprocessor/100646, PR preprocessor/100392, PR middle-end/100471, ++ PR sanitizer/100379, PR libstdc++/100676, PR libstdc++/100833, ++ PR libstdc++/100768, PR libstdc++/99453, PR libstdc++/100479, ++ PR libstdc++/100361, PR libstdc++/100630, PR libstdc++/99006, ++ PR libstdc++/99453, PR target/100885 (x86), PR ipa/99122, ++ PR target/100333 (ARM), PR c/100920, PR c++/100065, PR c++/100963, ++ PR c++/91706, PR c++/100862, PR c++/100102, PR d/100964, PR d/100935, ++ PR d/100882, PR fortran/98301, PR fortran/99839, PR libstdc++/100889, ++ PR libstdc++/100900. ++ * gcc-snapshot: Remove compiler provides. Addresses: #921877. ++ * Update libasan6 symbols for riscv64 (Helmut Grohne). Closes: #989205. ++ ++ -- Matthias Klose Thu, 10 Jun 2021 10:05:34 +0200 ++ ++gcc-11 (11.1.0-2) experimental; urgency=medium ++ ++ * Update to git 20210508 from the gcc-11 branch. ++ - Fix PR target/100200 (AArch64), PR target/100200 (AArch64), ++ PR tree-optimization/100239, PR rtl-optimization/100254, PR debug/100255, ++ PR rtl-optimization/100148, PR c++/89565, PR c++/93383, PR c++/95291, ++ PR c++/99200, PR c++/99683, PR c++/100161, PR c++/96380, ++ PR fortran/100218, PR fortran/100154, PR target/98952 (PPC), ++ PR libstdc++/100290, PR rtl-optimization/100225, PR target/100402 (x86), ++ PR rtl-optimization/84878, PR target/100217 (S390), PR target/100232, ++ PR rtl-optimization/100263, PR rtl-optimization/100411, ++ PR tree-optimization/100253, PR tree-optimization/100278, PR ipa/100308, ++ PR tree-optimization/100414, PR tree-optimization/100329, ++ PR target/100375 (nvptx), PR rtl-optimization/100230, ++ PR target/100311 (ARM), PR target/100302 (AArch64), ++ PR target/100305 (AArch64), PR target/100270 (AArch64), ++ PR target/100236 (ARM), PR target/100182 (x86), PR c++/100362, ++ PR c++/100319, PR fortran/100274, PR c/100450, PR target/98952 (PPC), ++ PR libgomp/100352, PR libstdc++/100384, PR libstdc++/100259, ++ PR libstdc++/100298, PR libstdc++/100290. ++ * Don't revert the PR 85678 patch anymore for backports (defaulting ++ to -fcommon everywhere). ++ * Remove obsolete verbose-lto-linker patch. ++ * Remove obsolete libgomp-no-werror patch. ++ * Remove the obsolete Linaro build support and patches. ++ * Fix building the libhwasan0-dbg package. ++ * Remove some obsolete breaks, conflicts, replaces. ++ * Fix running the libstdc++-v3 tests against the installed libstdc++6, ++ when the libstdc++6 package is not built from this source. ++ * README.source: Document how to run a single test. ++ * Don't run some tests from the guality test suite on armhf. These fail ++ on every target, but seem to hang on the buildds occasionally on armhf. ++ * Don't apply the arm-multilib-soft patch when building without ++ armhf/armsf multilib packages. ++ * Lower the dejagnu timeout on armhf from 600 to 300. ++ * For armhf configure --with-arch=+fp, dropping the --with-fpu= option. ++ * Explicitly call autoconf2.69 where necessary. ++ * Remove packaging support for oldish backports. Last supported releases ++ are Debian 8 (jessie) and Ubuntu 12.04 LTS (precise). ++ * Fix building the gcn offload compiler without the nvptx offload compiler. ++ * README.snapshot: Update wrapper script. Addresses: #862176. ++ ++ -- Matthias Klose Sat, 08 May 2021 13:50:11 +0200 ++ ++gcc-11 (11.1.0-1) experimental; urgency=medium ++ ++ * GCC 11.1.0 release. ++ * Refresh patches. ++ * Update gm2 from the gm2 trunk. ++ * gm2: Ignore gm2version.o stage diff, needed at least on some ++ archtectures (m68k, riscv64) ++ * Only apply the gm2-texinfo patch for dfsg builds. ++ * Configure with --enable-checking=release. ++ * Disable usage stats for release builds. ++ * Update and re-apply the gcc-foffload-default patch. ++ * Update NEWS.html and gcc.css, remove fav.ico, and use the local gcc.css. ++ * html2text -ascii -style pretty debian/NEWS.html > debian/NEWS.gcc. ++ * Enable the address sanitizer for riscv64. ++ ++ -- Matthias Klose Tue, 27 Apr 2021 13:50:54 +0200 ++ ++gcc-11 (11-20210424-1) experimental; urgency=medium ++ ++ * GCC 11 release candidate 2, taken from the gcc-11 branch (20210424) ++ ++ -- Matthias Klose Sat, 24 Apr 2021 08:00:02 +0200 ++ ++gcc-11 (11-20210420-1) experimental; urgency=medium ++ ++ * GCC 11 release candidate 1, taken from the gcc-11 branch (20210420) ++ * Update gm2 from the gm2 trunk. ++ * Revert the fix for PR target/100067, breaking the ARM multilib build. ++ * Update watch file. ++ * Stop building sf/hf multilibs on upcoming Ubuntu releases. ++ * Update libgphobos symbols file. ++ ++ -- Matthias Klose Tue, 20 Apr 2021 15:31:57 +0200 ++ ++gcc-11 (11-20210417-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210417) ++ * Use explicit autoconf version for bullseye. ++ * Update libgphobos symbols file. ++ ++ -- Matthias Klose Sat, 17 Apr 2021 11:29:15 +0200 ++ ++gcc-11 (11-20210412-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210412) ++ * Update libgphobos symbols file. ++ ++ -- Matthias Klose Sun, 11 Apr 2021 13:46:08 +0200 ++ ++gcc-11 (11-20210404-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210404) ++ * Update libgphobos symbols file. ++ ++ -- Matthias Klose Sun, 04 Apr 2021 13:42:51 +0200 ++ ++gcc-11 (11-20210327-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210327) ++ - Fix bootstrap on s390x. ++ - Fix PR target/99422. Closes: #984870. ++ - Fix PR sanitizer/98920. Closes: #949192. ++ * Fix packaging of snapshot builds, really include the jit build in ++ the snapshot build. ++ ++ -- Matthias Klose Sat, 27 Mar 2021 13:19:03 +0100 ++ ++gcc-11 (11-20210319-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210319) ++ * Fix --as-needed specs for -fsanitize=* options for backports. ++ * Export DEB_CHECK_ALI_UPDATE=1 (currently commented out). This should be ++ checked after the gnat transition has been prepared in experimental, and ++ just before doing the gnat's defaults change in unstable. ++ * debian/ada/check_ali_update.sh: Fix syntax errors. ++ Always run the script. ++ * Disable building gnat on alpha, see PR ada/98724. ++ * Also build unstripped frontends on mipsel/mips64el. ++ * Update libgphobos symbols file. ++ * Don't remove files in debian/tmp-{nvptx,gcn} when building the binary ++ targets. The installed offload compilers are needed to run the tests. ++ * Allow to save some disk space for the build, by ++ - saving the files needed for the hppa64 and jit builds, and removing ++ the build directories. ++ - saving the results from the check runs, and removing files created ++ during the check runs. ++ * Fix installation of the jit header files. ++ ++ -- Matthias Klose Fri, 19 Mar 2021 09:57:02 +0100 ++ ++gcc-11 (11-20210310-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210310) ++ * Work around dwz issue on mips64el stripping go1. ++ * Replace @tie{} string with a space in the man pages. LP: #1405685. ++ * Don't run the memory usage stats on m68k. ++ ++ -- Matthias Klose Wed, 10 Mar 2021 11:46:55 +0100 ++ ++gcc-11 (11-20210306-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210306) ++ * Update libgphobos symbols file. ++ * Fix unstripped gcc-snapshot builds. ++ ++ -- Matthias Klose Sat, 06 Mar 2021 11:55:56 +0100 ++ ++gcc-11 (11-20210227-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210227) ++ * Build gnat/alpha again in snapshot and cross builds. ++ ++ -- Matthias Klose Sat, 27 Feb 2021 09:46:52 +0100 ++ ++gcc-11 (11-20210220-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210220) ++ * Apply proposed patch for PR ada/98996. ++ * Update libgphobos symbols file. ++ * Update usage-wrapper script. ++ ++ -- Matthias Klose Sat, 20 Feb 2021 17:21:38 +0100 ++ ++gcc-11 (11-20210207-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210207) ++ * Fix packaging logic to build libgphobos. ++ * Update libstdc++ symbols for ppc64 and ppc64el. ++ * Explicitly configure with --enable-s390-excess-float-precision on s390x ++ to match the behaviour of the default GCC (gcc-10). ++ * Update libgphobos symbols file. ++ * Don't build the gnat alpha cross compiler for now. PR ada/98724. ++ ++ -- Matthias Klose Sun, 07 Feb 2021 14:55:47 +0100 ++ ++gcc-11 (11-20210130-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210130) ++ - libgo 1.16 release candidate 1. ++ * Remove the work around for PR ada/98228, fixed. ++ * Disable profiled bootstrap on powerpc as a test ... ++ * Disable lto build on ia64 as a test ... ++ * Don't turn on DWARF 5 by default, where GCC 11 is not the default.. ++ * Require binutils 2.25.2 when defaulting to DWARF 5. ++ * Update libgphobos symbols file. ++ * Bump standards version. ++ ++ -- Matthias Klose Sat, 30 Jan 2021 13:00:42 +0100 ++ ++gcc-11 (11-20210123-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210123) ++ * Update gm2 from the gm2 trunk. ++ * Explicitly use autoconf2.69 where necessary. ++ * Use the same breaks relations for libgcc-s2 and libgcc-s4 as for ++ libgcc-s1. Addresses: #980770. ++ ++ -- Matthias Klose Sat, 23 Jan 2021 13:12:36 +0100 ++ ++gcc-11 (11-20210116-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210116) ++ * Fix --enable-link-serialization=1, and enable LTO builds on ppc64el again. ++ * Update libgphobos symbols file. ++ * gcc: Prefix LLINKER with /usr/bin/time -v. ++ * Don't build runtime libraries for the jit build. ++ * Apply proposed fix for PR go/98496 (Svante Signell). ++ * Work around PR ada/98228, not using lto for gnat1 on s390x. ++ * PR sanitizer/98699: Don't enable --as-needed with -fsanitize=* options. ++ * Use --push-state/--pop-state for gold everywhere. ++ * Fix parallel linking of cc1gm2. ++ * Allow to build with some memory usage statistics. ++ ++ -- Matthias Klose Sat, 16 Jan 2021 15:49:18 +0100 ++ ++gcc-11 (11-20210110-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210110) ++ * Build the gcn offload compiler based on amdgcn-tools (based on LLVM 9), ++ remove the conflict with gcc-10-offload-amdgcn. ++ * Limit lto links on sparc64. ++ ++ -- Matthias Klose Sun, 10 Jan 2021 13:01:43 +0100 ++ ++gcc-11 (11-20210109-2) experimental; urgency=medium ++ ++ * Support link serialization for m2. ++ * Fix -Wformat-diag warnings for power*-linux builds. ++ ++ -- Matthias Klose Sat, 09 Jan 2021 20:27:49 +0100 ++ ++gcc-11 (11-20210109-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210109) ++ * Provide timing and resource information for all builds. ++ * Build the offload compilers using newlib 4.1.0. ++ * gcc-11-source: Depend on time. ++ * Disable the lto build on s390x, PR ada/98228. ++ ++ -- Matthias Klose Sat, 09 Jan 2021 18:48:15 +0100 ++ ++gcc-11 (11-20210102-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20210102) ++ * Bump libgo soname. ++ * Fix libgo build failures. ++ ++ -- Matthias Klose Sat, 02 Jan 2021 15:59:18 +0100 ++ ++gcc-11 (11-20201228-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20201228) ++ * Build the gcn offload compiler based on amdgcn-tools (based on LLVM 9). ++ * Fix hppa64 snapshot builds. ++ * Fix cross installation of g++-mapper-server. ++ * Update libgcc-s1 symbols file for arm64. ++ ++ -- Matthias Klose Mon, 28 Dec 2020 20:02:27 +0100 ++ ++gcc-11 (11-20201222-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20201222) ++ * Fix installation of g++-mapper-server. ++ * Apply proposed patch for PR bootstrap/98324. enable LTO builds again. ++ * Disable LTO build on s390x, see PR 976846. ++ ++ -- Matthias Klose Tue, 22 Dec 2020 14:41:42 +0100 ++ ++gcc-11 (11-20201216-2) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20201216) ++ * Rely on the upstream GNU versioned symbols for libstdc++6. ++ * Bump phobos soname for GCC 11. ++ * Add an autopkg test for linking libphobos. ++ * Build gnat again, without building libgnat_util. ++ * Build the gcn offload compiler using LLVM 11, and work around the ++ broken as in LLVM 11. See also LLVM Bug 48201 for this issue and ++ https://reviews.llvm.org/D73999 for the patch causing the issue. ++ * Remove hsa offload packaging bits. ++ * For LTO builds, configure with --enable-link-serialization instead of ++ --enable-link-mutex. ++ * Package additional gnat files. ++ * Update the gm2 packaging. ++ * Add conflicts with binary packages built from gcc-10. ++ * Build libhwasan (AArch64 only). ++ * Don't strip the sanitizer libraries, these are only used for debugging. ++ LP: #1894166. ++ * Explicitly configure with --disable-cet when building for older releases. ++ * Don't run the libgphobos-link test on powerpc architectures. ++ * Install libstdc++6 gdb pretty printer files in /usr/share/gcc (unversioned). ++ * Don't mark the libgcc-sN cross packages with XB-Important/Protected: yes. ++ * Relax the libc-dev dependencies for kfreebsd. ++ * Limit checking when configuring with --enable-checking=extra,rtl. ++ * Apply proposed patch for PR bootstrap/95582. ++ * Enable profiled builds, LTO build for 64bit architectures. ++ * Add -doc conflicts with GCC 10. Closes: #977408. ++ * Don't install the lto-dump binary in the hppa64 package. Closes: #977461. ++ * Let the gcn offload compilers conflict, both shipping the linker tools, ++ which should be split out into a separate package. Addresses: #977461. ++ * Regenerate libgm2/configure. Closes: #977409. ++ * Install hwasan lib in libgcc-dev (arm64 only). ++ ++ -- Matthias Klose Wed, 16 Dec 2020 21:28:34 +0100 ++ ++gcc-10 (10.2.0-17) unstable; urgency=medium ++ ++ * Update to git 20201111 from the gcc-10 branch. ++ - Fix PR tree-optimization/97764, PR target/97685 (x86), ++ PR target/97360 (PPC), PR lto/97508, PR c++/97412, PR fortran/97652, ++ PR fortran/92793, PR fortran/92793, PR target/85486, PR libstdc++/96269, ++ PR libstdc++/97731, PR libstdc++/97362, PR libstdc++/92285. ++ ++ -- Matthias Klose Wed, 11 Nov 2020 17:50:04 +0100 ++ ++gcc-10 (10.2.0-16) unstable; urgency=medium ++ ++ * Update to git 20201029 from the gcc-10 branch. ++ - Fix PR rtl-optimization/97439, PR target/96759 (RISCV), ++ PR target/97506 (x86), PR target/97327 (ARM), PR target/96914 (ARM), ++ PR target/96914 (ARM), PR target/96914 (ARM), PR rtl-optimization/97386, ++ PR sanitizer/97294, PR target/97291 (ARM), PR ipa/96394, PR ipa/97404, ++ PR ipa/97295, PR target/97251 (ARM), PR target/97349 (AArch64), ++ PR tree-optimization/97357, PR tree-optimization/97255, PR c++/97197, ++ PR c++/97328, PR c++/97010, PR c++/97197, PR c++/96229, PR fortran/95979, ++ PR libstdc++/95322, PR libstdc++/97132, PR libstdc++/95788, ++ PR tree-optimization/97081, PR tree-optimization/97456, ++ PR c++/95132, PR c++/96241. ++ * Also enable the extra checking on amd64, arm64, ppc64el, s390x, and don't ++ strip the executables. This will be reverted within a few weeks, please ++ don't send bug reports about that. ++ * Mark libgcc-sN with XB-Important/Protected: yes. Addresses: #972936. ++ ++ -- Matthias Klose Thu, 29 Oct 2020 16:36:48 +0100 ++ ++gcc-10 (10.2.0-15) unstable; urgency=medium ++ ++ * Update to git 20201011 from the gcc-10 branch. ++ - Fix PR target/97302, PR rtl-optimization/97313, PR middle-end/95189, ++ PR middle-end/95886, PR target/97150 (AArch64), PR target/96313 (AArch64), ++ PR tree-optimization/97236, PR target/96456 (S390), PR gcov-profile/97193, ++ PR c++/88115, PR libstdc++/97273, PR c++/96994, PR c++/97195, ++ PR c++/97145, PR fortran/97272, PR bootstrap/97163, PR gcov-profile/96913. ++ * On armel, armhf, configure with --enable-checking=yes,extra,rtl, and don't ++ strip the executables for now. ++ ++ -- Matthias Klose Sun, 11 Oct 2020 12:40:50 +0200 ++ ++gcc-10 (10.2.0-14) experimental; urgency=medium ++ ++ * Update to git 20201002 from the gcc-10 branch. ++ - Fix PR gcov-profile/64636, PR tree-optimization/96979, ++ PR gcov-profile/97069, PR target/96795 (ARM), PR target/96827 (ARM), ++ PR bootstrap/97183, PR target/97184 (x86). ++ * Fix PR tree-optimization/97236, taken from the trunk. Stop reverting the ++ fixes for PR tree-optimization/97043, PR tree-optimization/96522. ++ Closes: #971027. ++ * Enable gnat on m68k again (Adrian Glaubitz). Closes: #971551. ++ ++ -- Matthias Klose Fri, 02 Oct 2020 14:12:39 +0200 ++ ++gcc-10 (10.2.0-13) unstable; urgency=medium ++ ++ * Update to git 20200930 from the gcc-10 branch. ++ - Fix PR target/97247 (x86), PR target/97231 (x86), PR middle-end/97054. ++ - Backport SVE ACLE and stack-protector patches (ARM, AArch64). ++ * Revert the fix for PR tree-optimization/96522. See #971027. ++ ++ -- Matthias Klose Wed, 30 Sep 2020 12:29:35 +0200 ++ ++gcc-10 (10.2.0-12) unstable; urgency=medium ++ ++ * Update to git 20200927 from the gcc-10 branch. ++ - Fix PR target/71233 (AArch64), PR middle-end/97073. ++ * Revert the fix for PR tree-optimization/97043. Addresses: #971027. ++ ++ -- Matthias Klose Tue, 29 Sep 2020 12:37:37 +0200 ++ ++gcc-10 (10.2.0-11) unstable; urgency=medium ++ ++ * Update to git 20200927 from the gcc-10 branch. ++ - Fix PR middle-end/95464, PR target/96683 (ARM), PR target/97032, ++ PR target/97166 (PPC), PR fortran/96041, PR fortran/93423, ++ PR fortran/93423, PR libstdc++/97167, PR libstdc++/96803, ++ PR libstdc++/96803, PR libstdc++/94681, PR libstdc++/94681, ++ PR libstdc++/97101, PR libstdc++/94160. ++ - libgo: don't put golang.org packages in zstdpkglist.go. Closes: #970604. ++ ++ [ Samuel Thibault ] ++ * Limit systemtap-sdt-dev build dependency to linux architectures. ++ Closes: #970614. ++ ++ -- Matthias Klose Sun, 27 Sep 2020 12:19:01 +0200 ++ ++gcc-10 (10.2.0-9) unstable; urgency=high ++ ++ * Update to git 20200918 from the gcc-10 branch. ++ - Fix PR preprocessor/96935, PR tree-optimization/97053, ++ PR target/97028 (x86), PR debug/96690, PR tree-optimization/96522, ++ PR tree-optimization/97043. ++ ++ -- Matthias Klose Fri, 18 Sep 2020 20:23:58 +0200 ++ ++gcc-10 (10.2.0-8) unstable; urgency=medium ++ ++ * Update to git 20200914 from the gcc-10 branch. ++ - Fix PR tree-optimization/96579, PR tree-optimization/96370, ++ PR tree-optimization/96514, PR middle-end/96369, PR lto/96385, ++ PR tree-optimization/96349, PR bootstrap/96203, PR lto/95604, ++ PR debug/93865, PR debug/94235, PR c++/96901, PR lto/94311, ++ PR debug/96729, PR c++/96901, PR c++/96862, PR fortran/96859. ++ * Fix libstdc++ symbols file for armel, no pretty formatting allowed ++ in symbols files. ++ ++ -- Matthias Klose Mon, 14 Sep 2020 11:30:32 +0200 ++ ++gcc-10 (10.2.0-7) unstable; urgency=medium ++ ++ * Update to git 20200910 from the gcc-10 branch. ++ - Fix PR c++/95164, PR target/85830 (PPC), PR tree-optimization/96820, ++ PR target/96808 (PPC), PR tree-optimization/96597, ++ PR tree-optimization/88240, PR tree-optimization/96854, ++ PR target/96551 (x86), PR d/96924, PR fortran/95398, PR fortran/94672, ++ PR libstdc++/92978, PR libstdc++/96851, PR target/96357 (AArch64), ++ PR fortran/95109, PR fortran/94690. ++ * Update libasan and libgfortran symbols files. ++ * Replace the libstdc++ symbols file on armel with one based on ++ symbol versions (versions different than for other architectures). ++ Closes: #954954. ++ ++ -- Matthias Klose Thu, 10 Sep 2020 17:24:36 +0200 ++ ++gcc-10 (10.2.0-6) unstable; urgency=medium ++ ++ * Update to git 20200831 from the gcc-10 branch. ++ - Fix PR target/96744 (x86), PR target/94538 (ARM), PR middle-end/87256, ++ PR tree-optimization/96722, PR tree-optimization/96758, ++ PR target/95450, PR tree-optimization/96535, PR c/96549, PR fortran/93553, ++ PR middle-end/96459, PR tree-optimization/96730, PR ipa/95320, ++ PR target/96682 (ARM), PR target/96506 (PPC), PR target/96536 (x86), ++ PR target/96562 (x86), PR target/93897 (x86), PR lto/95362, ++ PR lto/95548, PR c/96545, PR c++/96497, PR c++/95428, PR c++/96199, ++ PR c++/96106, PR c++/96164, PR d/96157, PR d/96250, PR d/96254, ++ PR d/96301, PR fortran/95882, PR fortran/96486, PR fortran/93553, ++ PR middle-end/96459, PR libstdc++/71960, PR libstdc++/96766, ++ PR libstdc++/96718, PR target/96493 (PPC), PR ipa/96482, PR ipa/96291, ++ PR target/96243 (x86), PR target/96530 (PPC), PR target/96446 (PPC), ++ PR c++/96106, PR c++/96164, PR fortran/96312, PR libstdc++/89760, ++ PR libstdc++/95749. ++ * Disable go on sh4. Closes: #969221. ++ * Update patch for CUDA and __float128. Closes: #968672. ++ ++ -- Matthias Klose Mon, 31 Aug 2020 12:27:30 +0200 ++ ++gcc-10 (10.2.0-5) unstable; urgency=medium ++ ++ * Update to git 20200808 from the gcc-10 branch. ++ - Fix PR target/96191 (ARM), PR target/96191 (AArch64), ++ PR tree-optimization/96483, PR middle-end/96426, PR debug/96354, ++ PR target/95435 (x86), PR tree-optimization/96058, PR middle-end/96335, ++ PR lto/45375, PR c/96377, PR c++/96082, PR c++/95591, PR c++/95599, ++ PR c++/95823, PR c++/95824, PR c++/95895, PR d/96140, ++ PR fortran/96319, PR fortran/95612, PR fortran/95585. ++ ++ -- Matthias Klose Sat, 08 Aug 2020 13:31:03 +0200 ++ ++gcc-10 (10.2.0-3) unstable; urgency=medium ++ ++ * Update to git 20200725 from the gcc-10 branch. ++ - Fix PR target/96190 (SPARC), PR target/96236 (PPC), PR target/96260, ++ PR fortran/95980, PR fortran/95980, PR fortran/96086, PR fortran/89574, ++ PR fortran/96220, PR fortran/96018. ++ * Re-enable gm2, disabled by accident in 10.2.0-1. ++ * Refresh gm2 patches. ++ * Apply proposed gdc patch (Iain Buclaw). Closes: #966026. ++ * Apply proposed patch for PR bootstrap/96203, add -fcf-protection=check. ++ ++ -- Matthias Klose Sat, 25 Jul 2020 14:52:31 +0200 ++ ++gcc-10 (10.2.0-1) unstable; urgency=medium ++ ++ * GCC 10.2.0 release. ++ - Fix PR target/95726 (AArch64), PR target/96174 (x86), PR middle-end/95114, ++ PR tree-optimization/96146, PR middle-end/96194, PR c++/95789, ++ PR c++/96104, PR c++/96179. ++ - Fix missing dependencies for selftests which occasionally causes ++ failed builds. Closes: #960913. ++ * Update gm2 from the gm2 gcc-10 branch. ++ * Update the patch for PR lto/95604, replacing the error with a warning. ++ * Build the GC enabled libobjc on arm64, mips and mipsel as well. ++ * libgo: Merge the 1.14.6 changes, taken from the trunk. ++ * Fix ASAN_INTERCEPT_VFORK related symbols. (Helmut Grohne). Closes: #965246. ++ ++ -- Matthias Klose Thu, 23 Jul 2020 12:15:54 +0200 ++ ++gcc-10 (10.1.0-6) unstable; urgency=medium ++ ++ * Update to git 20200714 from the gcc-10 branch. ++ - Fix PR lto/95604, PR target/94891 (AArch64), PR target/94791 (AArch64), ++ PR ipa/96130, PR middle-end/94600, PR middle-end/95270, PR c++/96063, ++ PR c++/96077. ++ * Also package the nvptx offload compiler on arm64. ++ ++ -- Matthias Klose Tue, 14 Jul 2020 12:07:51 +0200 ++ ++gcc-10 (10.1.0-5) unstable; urgency=medium ++ ++ * Update to git 20200713 from the gcc-10 branch. ++ - Fix PR bootstrap/94998, PR tree-optimization/94969, PR target/95018 (PPC), ++ PR target/95347 (PPC), PR target/95347 (PPC), PR target/95713, ++ PR target/94735 (ARM), PR target/94959 (ARM), PR c++/95505, PR c++/95508, ++ PR fortran/95707, PR fortran/95688, PR fortran/95687, PR fortran/95689, ++ PR fortran/95587, PR fortran/95088, PR lto/94848, PR c/95141, PR c++/95711, ++ PR c++/95736, PR c++/95519, PR c++/95518, PR c++/95813, PR c++/95477, ++ PR c++/95719, PR d/95250, PR fortran/95978, PR fortran/71706, ++ PR fortran/95743, PR fortran/95340, PR fortran/95880, PR fortran/95881, ++ PR fortran/95826, PR fortran/95828, PR fortran/95827, PR fortran/95812, ++ PR fortran/95708, PR target/95105 (AArch64), PR tree-optimization/96075, ++ PR ipa/96040, PR debug/95343, PR fortran/95709, PR fortran/93337, ++ PR fortran/95366, PR fortran/88379, PR fortran/9582 libstdc++/91807, ++ PR libstdc++/91153, PR target/93224, PR libstdc++/95282, PR libstdc++/94627, ++ PR tree-optimization/95857, PR target/95581 (PPC), PR target/96125 (PPC), ++ PR tree-optimization/96133, PR tree-optimization/95804, ++ PR tree-optimization/95638, PR target/95683 (RISCV), PR c++/96105, ++ PR c++/96052, PR c++/95976, PR libstdc++/95322, PR libstdc++/94936, ++ PR libstdc++/94087. ++ * distro-defaults.h: Don't define for offload compilers. ++ * Build the nvptx offload compiler on arm64. ++ * Update the patch for PR lto/95604. ++ ++ -- Matthias Klose Mon, 13 Jul 2020 13:12:42 +0200 ++ ++gcc-10 (10.1.0-4) unstable; urgency=medium ++ ++ * Update to git 20200616 from the gcc-10 branch. ++ - Fix PR ipa/95113, PR target/95525 (x86), PR target/95420 (ARM), ++ PR target/94591 (ARM), PR gcov-profile/95332, PR testsuite/95361, ++ PR target/95355 (x86), PR web/95380, PR c++/95346, PR c++/95562, ++ PR c++/95345, PR c++/95050, PR c++/94817, PR c++/94829, PR c++/95087, ++ PR c++/93310, PR c++/95158, PR c++/92103, PR c++/92633, PR c++/92838, ++ PR c++/95020, PR c++/95386, PR c++/92652, PR c++/93698, PR c++/94128, ++ PR c++/95241, PR c++/95181, PR c++/95371, PR c++/95319, PR c++/95222, ++ PR c++/90212, PR c++/90479, PR c++/91529, PR c++/93822, ++ PR libfortran/95390, PR libfortran/95104, PR libfortran/95104, ++ PR libfortran/95191, PR libgomp/92854, PR libgomp/92854, ++ PR libstdc++/95322, PR libstdc++/77691, PR lto/94848, PR middle-end/95551, ++ PR target/95528, PR c++/95197, PR middle-end/95108, PR debug/95080, ++ PR sanitizer/95634, PR sanitizer/94910, PR c/95580, PR c++/95328, ++ PR c++/95197, PR c++/95440, PR c++/93467, PR c++/95350, PR c++/95560, ++ PR c++/95066, PR c++/94937, PR c++/95344, PR c++/94955, PR c++/90915, ++ PR c++/90915, PR c++/95137, PR fortran/95544, PR fortran/93366, ++ PR fortran/95503, PR fortran/94109, PR fortran/95611, PR fortran/95091, ++ PR libstdc++/95578. ++ * Fix PR lto/95604, proposed patch. ++ * Reorganize the distro defaults patches. ++ ++ -- Matthias Klose Tue, 16 Jun 2020 13:09:42 +0200 ++ ++gcc-10 (10.1.0-3) unstable; urgency=medium ++ ++ * Update to git 20200525 from the gcc-10 branch. ++ - Fix PR target/95255 (x86), PR target/95258 (x86), PR lto/95190, ++ PR target/95169 (x86), PR target/95212 (x86), PR middle-end/94635, ++ PR middle-end/94940, PR d/94970, PR fortran/39695, PR libfortran/95119, ++ PR libstdc++/95289, PR libstdc++/93983. ++ * Configure --with-arch=i686 for the Hurd. Closes: #960929. ++ * Remove the last powerpcspe packaging bits, it's finally gone. ++ * Update watch file. ++ ++ -- Matthias Klose Mon, 25 May 2020 22:55:26 +0200 ++ ++gcc-10 (10.1.0-2) unstable; urgency=medium ++ ++ * Update to git 20200515 from the gcc-10 branch. ++ - Fix PR ipa/94947, PR c/95040, PR middle-end/94724, ++ PR target/94950 (RISCV), PR target/94942 (x86), PR c/94968, PR c/94842, ++ PR c++/95003, PR c++/94885, PR c++/94938, PR c++/94951, PR c++/94907, ++ PR fortran/93497, PR fortran/94672, PR fortran/59107, PR libstdc++/94906, ++ PR libstdc++/94933, PR libstdc++/92894. ++ ++ [ Matthias Klose ] ++ * Remove the unmaintained neon packaging bits. ++ * Add build dependency on unzip to fix libphobos test failures. ++ * libphobos: Fix issue 19861 - core.cpuid reports the wrong number of ++ threads. Closes: #960150. ++ * Build using GCC 10 on recent distro versions. ++ * Fix gnat tests to find the libgnat_utils shared library. Closes: #960270. ++ * Run the testsuite with the offload compilers installed into the temporary ++ install location. ++ * Don't require root for the temp installation of the offload compilers. ++ * Use LLVM 10 for the amdgcn assembler and linker tools. ++ * Don't override the libstdc++ test results when running the libstdc++ abi ++ check. ++ * Update debian/TODO, remove obsolete items, add some testsuite items. ++ * Override some lintian warnings for snapshot builds. ++ * Include jit test results into the summary and the gcc-test-results package. ++ * Fix some lintian warnings. ++ * Don't strip the target object files for the amdgcn offload build. ++ * Stop building the libgcc compat packages for bullseye/sid. ++ ++ [ Nicolas Boulenguez ] ++ * Enable gnat autopkg tests. ++ ++ -- Matthias Klose Fri, 15 May 2020 17:11:03 +0200 ++ ++gcc-10 (10.1.0-1) unstable; urgency=medium ++ ++ * GCC 10.1.0 release. ++ * lib*stdc++6: Depend on lib*gcc-sN instead of lib*gccN. ++ * Build libphobos on hppa-linux-gnu. ++ * Update NEWS files for GCC 10. ++ * Refresh patches. ++ ++ -- Matthias Klose Thu, 07 May 2020 13:44:26 +0200 ++ ++gcc-10 (10-20200502-1) unstable; urgency=medium ++ ++ * GCC 10.1 release candidate. ++ * GCC snapshot, taken from the gcc-10 branch (20200502, 0118d0397f9). ++ - Fix PR objc/94637, @selector() broken for selectors containing repeated ++ colons. Closes: #959127. ++ * Increase the testsuite timeout on riscv64. ++ * Fix sparc64 multilib cross build (Helmut Grohne). Closes: #958909. ++ * Fix GDC Issue 19367 - std.net.curl does not understand HTTP/2 status lines. ++ LP: #1876293. ++ * Update libgphobos symbols files. ++ ++ -- Matthias Klose Sat, 02 May 2020 14:09:59 +0200 ++ ++gcc-10 (10-20200425-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200425, cf3f7b309ffd). ++ - Fix PR middle-end/94647. Closes: #958062. ++ * Fix local patch for PR jit/87808. Closes: #954898. ++ * gcc-snapshot: Depend on nvptx-tools with the nvptx offload compiler. ++ * Provide symlinks for the offload target tools in /accel/. ++ * Don't include lib*gomp1 and libgcc4 in the control file, when not building ++ the common libraries. ++ * Build libphobos on powerpc*, libdruntime only. ++ ++ -- Matthias Klose Sat, 25 Apr 2020 18:07:48 +0200 ++ ++gcc-10 (10-20200418-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200418, c5bac7d127f2). ++ - Fix PR lto/94612, offloading support. ++ - Fix PR rtl-optimization/93974, ICE on ppc64el with -O3. ++ ++ [ Nicolas Boulenguez ] ++ * Remove ada-lib-info-file-prefix-map.diff (see #87972). ++ ++ [ Matthias Klose ] ++ * libgcc-sN: Don't add the libgcc-N-dev breaks for backports. ++ * Include the complete offload compilers in the gcc-snapshot builds. ++ ++ -- Matthias Klose Sat, 18 Apr 2020 11:56:38 +0200 ++ ++gcc-10 (10-20200411-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200411, f883c46b487). ++ * Fix gnat cross builds. ++ * Strip again the compiler executables. ++ ++ -- Matthias Klose Sun, 12 Apr 2020 15:12:15 +0200 ++ ++gcc-10 (10-20200410-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200410, 7478addd84a). ++ ++ [ Matthias Klose ] ++ * Update libgccjit and libgphobos symbols files. ++ * Remove the libgcc-sN provides from the last upload. ++ * Don't install the empty gcc_lib_dir in gcc-N-base. ++ * Configure with -enable-libphobos-checking=release. ++ ++ [ Nicolas Boulenguez ] ++ * Remove some dependencies older than oldoldstable. ++ * Build gnat. Remove obsolete no_install option for libgnat. ++ * ada-lib-info-file-source-date-epoch.diff: port fix from gcc-9. ++ * ada: install libgnat-BV.so without adding a .1 suffix. ++ * Rename libgnatvsn to libgnat_util (following upstream). ++ Make the compatibility project abstract instead of generating twice. ++ * ada-changes-in-autogen-output.diff: keep more upstream default values in ++ order to reduce the diff noise. ++ ++ -- Matthias Klose Fri, 10 Apr 2020 14:45:04 +0200 ++ ++gcc-10 (10-20200402-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200402, 86c92411320). ++ * Fix PR target/94254 (PPC), proposed patch. ++ * Update libstdc++6 symbols file for armel. Closes: #954954. ++ * libgcc-sN: Provide libgcc-sN with an epoch version to rebuild gcc-8. ++ Closes: #954826. ++ ++ -- Matthias Klose Thu, 02 Apr 2020 15:01:48 +0200 ++ ++gcc-10 (10-20200324-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200324, 906b3eb9df6). ++ * libgcc-N-dev: Include sanitizer headers again. Closes: #954751. ++ * gm2: Define lang_register_spec_functions for jit. Closes: #954438. ++ ++ -- Matthias Klose Tue, 24 Mar 2020 13:38:16 +0100 ++ ++gcc-10 (10-20200321-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200321, 497498c878d). ++ * Update gm2 from the gm2 trunk. ++ * Move limits.h and syslimits.h into /include, and remove ++ /include-fixed. ++ * Update libgphobos symbols file. ++ ++ -- Matthias Klose Sat, 21 Mar 2020 13:14:07 +0100 ++ ++gcc-10 (10-20200312-2) unstable; urgency=medium ++ ++ * Ship the include-fixed directory again, for a working #include . ++ ++ -- Matthias Klose Fri, 13 Mar 2020 09:42:15 +0100 ++ ++gcc-10 (10-20200312-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200312, daf2852b883). ++ * For all runtime libraries, generate dependencies on libgcc-sN instead ++ on libgccN. ++ * Use llvm 10 for the amdgcn offload compiler, when available. ++ * Update newlib to 3.3.0. ++ * Stop shipping the include-fixed directory. ++ * Build the snapshot package with the offload compilers included. ++ * Tighten dependency on libc6 for this upload. ++ ++ -- Matthias Klose Thu, 12 Mar 2020 21:41:07 +0100 ++ ++gcc-10 (10-20200304-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200304, 94f7d7ec6eb). ++ * Update the autopkg tests to run GCC 10. ++ ++ -- Matthias Klose Wed, 04 Mar 2020 16:38:16 +0100 ++ ++gcc-10 (10-20200222-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200222, e99b18cf710). ++ * Don't create doc directories for -dbg packages when not building those. ++ * Update libgphobos symbols file for amd64. ++ * Don't try to strip the target libs for the amdgcn offload compiler. ++ ++ -- Matthias Klose Sat, 22 Feb 2020 13:39:51 +0100 ++ ++gcc-10 (10-20200211-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200211, a6ee556c765). ++ ++ [ Matthias Klose ] ++ * Let the libgcc-sN multilib cross packages provide libgccN. ++ * libgcc-sN: Move library back to /lib from /usr/lib, and add ++ a replaces to libgccN. Closes: #950624. ++ * libgcc-sN: Add break on cryptsetup-initramfs. Closes: #950551. ++ ++ [ Aurelien Jarno ] ++ * debian/libgcc-s.symbols: add mipsn32el to the list of architectures ++ with GCC_3.3.4, GCC_4.4.0 and CC_4.5.0 symbols. ++ * debian/rules.conf: libgcc-s1 and corresponding multilib packages are ++ epochless. Adjust DEB_LIBGCC_VERSION accordingly. ++ ++ -- Matthias Klose Tue, 11 Feb 2020 07:20:23 +0100 ++ ++gcc-10 (10-20200204-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200204, 0303907ea5d). ++ * On architectures where libgcc_s.so is a symlink, replace the symlink with ++ a simple linker script. ++ * Add breaks on libgcc-N-dev packages on arm64, s390x and sparc64. ++ Closes: #950550, #950579. ++ ++ -- Matthias Klose Tue, 04 Feb 2020 15:52:16 +0100 ++ ++gcc-10 (10-20200202-1) unstable; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200202, 0303907ea5d). ++ ++ -- Matthias Klose Sun, 02 Feb 2020 11:43:57 +0100 ++ ++gcc-10 (10-20200129-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200129, 87c3fcfa6bb). ++ * Update gm2 from the gm2 trunk. ++ * Fix libgomp-plugin-amdgcn1 package description. ++ * Bump libgo soversion. ++ * Reset libgphobos version to 1. ++ * Apply proposed patch for PR bootstrap/93409. ++ * Fix building the amdgcn offload compiler with llvm 9. ++ * Bump standards version. ++ ++ -- Matthias Klose Wed, 29 Jan 2020 12:34:27 +0100 ++ ++gcc-10 (10-20200117-2) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200117, 507de5ee23e). ++ * Update gm2 from the gm2 trunk. ++ ++ [ Matthias Klose ] ++ * Update libgomp symbols files. ++ * Build-depend on libzstd-dev. ++ * Revert the fix for PR c/85678, not making -fno-common the default for ++ current releases and backports. ++ * Update libstdc++ symbols file. ++ * Install more AArch64 intrinsic headers. ++ * Prepare for git updates from a release branch. ++ * Allow retrying of a native build in case of unreproducible ICEs. ++ ++ [YunQiang Su] ++ * Fix buffer overflow in the gcc-search-prefixed-as-ld patch when ++ strlen(DEFAULT_REAL_TARGET_MACHINE) < multiarch_len. Addresses: #915194. ++ ++ -- Matthias Klose Fri, 17 Jan 2020 15:56:29 +0100 ++ ++gcc-10 (10-20200104-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20200104, r279880). ++ * Update newlib to newlib-3.2.0. ++ * Update gm2 from the gm2 trunk. ++ ++ -- Matthias Klose Sat, 04 Jan 2020 11:26:06 +0100 ++ ++gcc-10 (10-20191217-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20191217, r279456). ++ * Update newlib to a snapshot from trunk. ++ * Update gm2 from the gm2 trunk. ++ * Update symbols files. ++ * Build without gnat for a first build. ++ * Build an amdgcn offload compiler. ++ * Update debian/copyright for gm2, compiler is now GPL-3+, the runtime ++ libraries GPL-3+ plus GCC Runtime Library Exception, version 3.1. ++ * Fix libgo build on arm-linux-gnueabi*. ++ * Update debian/copyright for contrib/unicode. ++ * libgomp-plugin-nvptx1: Update cuda suggestions. Addresses: #946487. ++ * Fix buffer overflow in the gcc-search-prefixed-as-ld patch. ++ Addresses: #946792. ++ * Don't strip frontends for debugging purposes. ++ ++ -- Matthias Klose Tue, 17 Dec 2019 12:31:04 +0100 ++ ++gcc-9 (9.2.1-21) unstable; urgency=medium ++ ++ * Update to SVN 20191130 (r278870) from the gcc-9-branch. ++ - Fix PR fortran/92100, PR tree-optimization/92222, PR ada/92489, ++ PR fortran/92629. ++ * Stop building -dbg packages, keep building the libstc++6-9-dbg package ++ containing just the libstdc++ debug build. ++ ++ -- Matthias Klose Sat, 30 Nov 2019 09:17:04 +0100 ++ ++gcc-9 (9.2.1-20) unstable; urgency=medium ++ ++ * Update to SVN 20191126 (r278718) from the gcc-9-branch. ++ - Fix PR libstdc++/92267, PR tree-optimization/91355, PR other/92090, ++ PR middle-end/90796, PR middle-end/90840, PR target/90867 (x86), ++ PR c/90898, PR middle-end/91450, PR rtl-optimization/92430, ++ PR target/92389 (x86), PR tree-optimization/90930, PR target/87833 (x86), ++ PR c++/90767, PR c++/92504, PR fortran/92113, PR fortran/92321, ++ PR fortran/92470, PR fortran/92470, PR fortran/92569, PR fortran/92050, ++ PR ada/92362, PR ada/92575. ++ * Add a libgphobos symbols file. ++ * Enable LTO builds again. ++ ++ -- Matthias Klose Tue, 26 Nov 2019 08:16:37 +0100 ++ ++gcc-9 (9.2.1-19) unstable; urgency=medium ++ ++ * Update to SVN 20191109 (r278002) from the gcc-9-branch. ++ - Fix PR sanitizer/92154, PR c++/92384, PR middle-end/92231, PR c++/90947, ++ PR c++/90998, PR c++/92343, PR c++/90947, PR tree-optimization/85887, ++ PR c++/92015, PR middle-end/92231, PR preprocessor/92296. ++ * Fix once more the gnat armel cross build. ++ ++ -- Matthias Klose Sat, 09 Nov 2019 15:47:17 +0100 ++ ++gcc-9 (9.2.1-18) unstable; urgency=medium ++ ++ * Update to SVN 20191108 (r277978) from the gcc-9-branch. ++ - Fix PR target/91289 (PPC), PR fortran/92208, PR fortran/92277, ++ PR fortran/92208, PR fortran/92284, PR target/92095 (SPARC), ++ PR fortran/91253. ++ ++ [ Matthias Klose ] ++ * Update gm2 from the gcc_9_2_0_gm2 branch 20191107, more parallel ++ build issues and cross build fixes. ++ * Bump standards version. ++ * ada-libgnatvsn.diff: ++ - Regenerate with upstream automake 1.15.1 and autoconf 2.69. ++ ++ [ Nicolas Boulenguez ] ++ * Copy ada-lib-info-file-prefix-map.diff from gcc-8. ++ * ada-tools-move-ldflag.diff is obsolete with --as-needed as default. ++ * Enable all non-default linker checks for Ada. ++ ++ -- Matthias Klose Fri, 08 Nov 2019 17:51:22 +0100 ++ ++gcc-9 (9.2.1-17) unstable; urgency=medium ++ ++ * Update to SVN 20191102 (r277743) from the gcc-9-branch. ++ * Update gm2 from the gcc_9_2_0_gm2 branch 20191031, more parallel ++ build issues. ++ * ada-libgnatvsn.diff: ++ - Copy some of configure.ac's common stuff from libatomic/libgomp. ++ - Regenerate with automake 1.15.1 and autoconf 2.69. ++ ++ -- Matthias Klose Sun, 03 Nov 2019 10:37:13 +0100 ++ ++gcc-9 (9.2.1-16) unstable; urgency=medium ++ ++ * Update to SVN 20191030 (r277619) from the gcc-9-branch. ++ - Fix PR target/92225 (x86), PR rtl-optimization/92007, ++ PR target/70010 (PPC), PR target/65342 (PPC), PR target/67183, ++ PR fortran/91926, PR fortran/91863, PR fortran/86248, PR c++/92201. ++ * Use a proper configure check when linking with libatomic in libgnatvsn. ++ Closes: #943796. ++ * Enable gm2 on x32. ++ * Update gm2 from the gcc_9_2_0_gm2 branch 20191030, parallel build issues. ++ * Fix PR libstdc++/92267, taken from the trunk. ++ ++ -- Matthias Klose Wed, 30 Oct 2019 13:13:31 +0100 ++ ++gcc-9 (9.2.1-15) unstable; urgency=medium ++ ++ * Update to SVN 20191027 (r277486) from the gcc-9-branch. ++ - Fix PR c++/85254. ++ * Update gm2 from the gcc_9_2_0_gm2 branch 20191026. ++ * Link libgnatvsn against libatomic. ++ ++ -- Matthias Klose Sun, 27 Oct 2019 18:08:50 +0100 ++ ++gcc-9 (9.2.1-14) unstable; urgency=medium ++ ++ * Update to SVN 20191025 (r277460) from the gcc-9-branch. ++ - Fix PR libstdc++/90682, PR libstdc++/61761, PR libstdc++/89164, ++ PR libstdc++/92143, PR libstdc++/91456, PR libstdc++/92059, ++ PR libstdc++/91748, PR tree-optimization/91885, PR debug/91887, ++ PR tree-optimization/92131, PR c++/92062, PR fortran/92174, ++ PR target/88167 (ARM), PR middle-end/92153. ++ * Configure again with --enable-objc-gc=auto, somehow dropped in gcc-9. ++ Closes: #942049. ++ * Revert the libgnatvsn changes from 9.2.1-9. ++ ++ -- Matthias Klose Fri, 25 Oct 2019 19:31:48 +0200 ++ ++gcc-9 (9.2.1-12) unstable; urgency=medium ++ ++ * Update to SVN 20191022 (r277294) from the gcc-9-branch. ++ - Fix PR c++/91925, PR c++/88203, PR c/91401, PR tree-optimization/92056, ++ PR tree-optimization/91734, PR bootstrap/90543, PR middle-end/91920, ++ PR tree-optimization/91723, PR tree-optimization/91665, ++ PR middle-end/91001, PR middle-end/91105, PR middle-end/91106, ++ PR go/91617, PR middle-end/91623, PR lto/91572, ++ PR tree-optimization/91351. PR target/86040 (AVR), PR target/59888, ++ PR target/89400 (ARM), PR target/87243, PR c++/92106, PR c++/91974, ++ PR c++/88203, PR c/91401, PR fortran/69455, PR fortran/91586, ++ PR fortran/83113, PR fortran/89943. ++ ++ [Nicolas Boulenguez] ++ * Fix race condition in libgnatvsn/Makefile. ++ ++ [ Matthias Klose ] ++ * Configure for s390x Ubuntu focal --with-arch=z13 --with-mtune=z15. ++ ++ -- Matthias Klose Tue, 22 Oct 2019 21:35:13 +0200 ++ ++gcc-9 (9.2.1-11) unstable; urgency=medium ++ ++ [Nicolas Boulenguez] ++ * Fix diff index in libgnatvsn patch. Closes: #942442. ++ ++ -- Matthias Klose Thu, 17 Oct 2019 10:32:53 +0200 ++ ++gcc-9 (9.2.1-10) unstable; urgency=medium ++ ++ * Update to SVN 20191016 (r277058) from the gcc-9-branch. ++ - Fix PR lto/91968, PR tree-optimization/91812, PR debug/91772, ++ PR tree-optimization/91790, PR target/92022 (ALPHA), ++ PR target/88630 (SH), PR c++/91606, PR c++/91740, PR ada/91995, ++ PR fortran/91715, PR fortran/91649, PR fortran/91801. ++ ++ [Nicolas Boulenguez] ++ * Rewrite libgnatvsn support with autotools. Closes: #746689. ++ * Converge towards similar gnat_util library. ++ * Cherry-pick repinfo stuff for latest ASIS. ++ ++ [ Matthias Klose ] ++ * gm2: Fix a time_t cast, and enable gm2 on x32. Closes: #942059, ++ * Fix PR lto/91307, reproducible LTO builds, taken from the trunk. ++ ++ -- Matthias Klose Wed, 16 Oct 2019 12:29:50 +0200 ++ ++gcc-9 (9.2.1-9) unstable; urgency=medium ++ ++ * Update to SVN 20191008 (r276687) from the gcc-9-branch. ++ - Fix PR libstdc++/91748, PR rtl-optimization/89795, PR c++/91705, ++ PR target/86805 (SH), PR target/80672 (SH), PR rtl-optimization/88751, ++ PR target/91683 (riscv), PR target/91269 (SPARC), ++ PR target/91635 (riscv), PR c++/91923, PR fortran/91557, ++ PR fortran/91553, PR fortran/91566, PR fortran/91642, PR fortran/91588, ++ PR fortran/91727, PR fortran/91550, PR target/91275 (PPC), ++ PR target/91769 (MIPS), PR fortran/91716, PR target/88562 (SH), ++ PR driver/69471, PR fortran/84487, PR fortran/47054, PR fortran/91942, ++ PR fortran/91785, PR fortran/91864, PR fortran/91802, PR fortran/91714, ++ PR fortran/91641. ++ - Fix ICE on MIPS. Closes: #941263. ++ * Disable gm2 on hurd-i386, mc hangs there (Samuel Thibault). Closes: #940600. ++ * Apply proposed patch for PR target/92022. Addresses: #931815. ++ ++ [ Nicolas Boulenguez ] ++ * Update ada local patches. ++ ++ -- Matthias Klose Tue, 08 Oct 2019 10:21:22 +0200 ++ ++gcc-9 (9.2.1-8) unstable; urgency=medium ++ ++ * Update to SVN 20190909 (r275519) from the gcc-9-branch. ++ - Fix PR fortran/91496, PR fortran/91496, PR fortran/91660, ++ PR fortran/91589, PR target/87853 (x86), PR target/91704 (x86). ++ * libstdc++: Fix GCC_LINUX_FUTEX to work with C99 compilers, taken from ++ the trunk. ++ * Make LTO link pick up compile-time -g (proposed patch). ++ ++ -- Matthias Klose Mon, 09 Sep 2019 17:18:48 +0200 ++ ++gcc-9 (9.2.1-7) unstable; urgency=medium ++ ++ * Update to SVN 20190905 (r275396) from the gcc-9-branch. ++ - Fix PR libstdc++/91067, PR target/91481 (PPC), ++ PR tree-optimization/90278, PR tree-optimization/91568, ++ PR tree-optimization/90637, PR fortran/91565, PR fortran/91564, ++ PR fortran/91551, PR fortran/91587, PR pch/61250, PR c++/91155, ++ PR tree-optimization/91597, PR gcov-profile/91601, ++ PR target/91472 (SPARC), PR c++/91129, PR fortran/91552, ++ PR target/81800 (AArch64). ++ * Drop the gcc-alpha-bs-ignore patch, apparently not necessary anymore. ++ * For the omp.h header, use the configured OMP_NEST_LOCK_SIZE and ++ OMP_NEST_LOCK_ALIGN values for some non-multilib architectures. ++ Closes: #935750. ++ * Use Python3 to build the gm2 frontend. Closes: #936586. ++ * libgphobos76: Add breaks: dub (<< 1.16.0-1~). Addresses: #935275. ++ ++ -- Matthias Klose Thu, 05 Sep 2019 06:45:00 +0200 ++ ++gcc-9 (9.2.1-6) unstable; urgency=medium ++ ++ * Update to SVN 20190827 (r274974) from the gcc-9-branch. ++ - Fix PR ipa/91508, PR ipa/91438, PR ipa/91404, PR lto/91287, ++ PR target/91533 (x86), PR ipa/91508, PR ipa/91438, PR ipa/91404, ++ PR c++/91521. ++ * Backport LTO jobserver support (-flto=auto). ++ * any_archs: Remove mips and powerpcspe, add riscv64. ++ ++ -- Matthias Klose Wed, 28 Aug 2019 01:01:47 +0200 ++ ++gcc-9 (9.2.1-4) unstable; urgency=medium ++ ++ * Fix typo for gm2 enablement. ++ * Disable gm2 on powerpc, ppc64, sh4, kfreebsd-i386, kfreebsd-amd64. ++ See the build logs of 9.2.1-3 for the various issues. ++ ++ -- Matthias Klose Thu, 22 Aug 2019 12:12:07 +0200 ++ ++gcc-9 (9.2.1-3) unstable; urgency=medium ++ ++ * Update to SVN 20190821 (r274792) from the gcc-9-branch. ++ - Fix PR rtl-optimization/91347, PR target/91386 (AArch64). ++ ++ [ Aurelien Jarno ] ++ * Enable Ada on riscv64. ++ ++ [ Matthias Klose ] ++ * Build the gm2 packages except on powerpc and x32. ++ * Update gm2 cross build dependencies. ++ * Fix gm2 build with -j32. ++ * Configure with --enable-libpth-m2 for gm2 cross builds. ++ * Configure --without-target-system-zlib for gdc cross builds. ++ * Remove not needed libpth-dev dependency for gm2 packages. ++ * Ignore M2Version.o for gm2 bootstrap comparison. ++ * Update gm2 from the gcc_9_2_0_gm2 branch 20190820. ++ ++ -- Matthias Klose Wed, 21 Aug 2019 12:15:27 +0200 ++ ++gcc-9 (9.2.1-2) unstable; urgency=medium ++ ++ [ Matthias Klose ] ++ * Update to SVN 20190819 (r274667) from the gcc-9-branch. ++ - Fix PR c++/90947, PR c++/91436, PR fortran/87991, PR fortran/90563, ++ PR fortran/88072, PR fortran/90561, PR fortran/89647, PR fortran/87993, ++ PR tree-optimization/91109, PR tree-optimization/91109, ++ PR tree-optimization/91445, PR tree-optimization/91091, ++ PR c++/90393, PR c++/81429, PR c++/87519, PR c++/90473, PR c++/90884, ++ PR libsanitizer/87880, PR fortran/91485, PR fortran/91471, ++ PR fortran/78739, PR fortran/78719, PR fortran/82992. ++ * More gm2/libgm2 packaging fixes. ++ * Disable lto build on sparc64 (if porters would only test that before ++ making a request to enable it ...). ++ * Bootstrap using gnat-9 on development distributions. ++ ++ [ Aurelien Jarno ] ++ * Fix libstdc++6.symbols.riscv64. ++ ++ [ Nicolas Boulenguez ] ++ * ada: update packaging Makefile snippet for gcc-9. ++ ++ -- Matthias Klose Mon, 19 Aug 2019 13:01:37 +0200 ++ ++gcc-9 (9.2.1-1) unstable; urgency=medium ++ ++ * Update to SVN 20190813 (r274380) from the gcc-9-branch. ++ - Fix PR fortran/91422, PR lto/91375, PR driver/91130, PR driver/91130, ++ PR c++/91378, PR c++/90538, PR fortran/91424, PR fortran/91359, ++ PR fortran/42546, PR fortran/91414, PR libstdc++/90361. ++ * Minor updates to debian/copyright for GCC 9. ++ * Include a snapshot of the gm2 tarball. ++ * Add copyright information for gcc/gm2, gcc/testsuite/gm2 and libgm2. ++ ++ -- Matthias Klose Tue, 13 Aug 2019 15:43:49 +0200 ++ ++gcc-9 (9.2.0-1) unstable; urgency=medium ++ ++ * GCC 9.2.0 release. ++ ++ [ Matthias Klose ] ++ * Enable pgo/lto build on sparc64 (ok, when done on landau buildd). ++ * Add initial gm2 packaging bits. ++ * Bump standards version. ++ ++ [ James Clarke ] ++ * ada-kfreebsd.diff: Fix fatal unreferenced formal parameter warnings. ++ ++ [ Aurelien Jarno ] ++ * Add libstdc++6.symbols.riscv64. ++ * Update debian/libgcc.symbols for riscv64. ++ ++ -- Matthias Klose Tue, 13 Aug 2019 12:24:04 +0200 ++ ++gcc-9 (9.1.0-10) unstable; urgency=medium ++ ++ * Fix typo in libstdc++ symbols file. ++ ++ -- Matthias Klose Wed, 17 Jul 2019 21:56:07 +0200 ++ ++gcc-9 (9.1.0-9) unstable; urgency=medium ++ ++ * Update to SVN 20190717 (r273554) from the gcc-9-branch. ++ - Fix PR c++/91125, PR c/91149, PR driver/90684, PR middle-end/78884, ++ PR rtl-optimization/90756, PR tree-optimization/91063, PR ipa/91062, ++ PR ipa/90982, PR tree-optimization/90972, PR debug/90914, PR debug/90900, ++ PR lto/90369, PR rtl-optimization/91136, PR tree-optimization/91108, ++ PR fortran/91077. ++ ++ [ Matthias Klose ] ++ * Make the lto-verbose-linker patch more robust for hppa (Dave Anglin). ++ * Avoid building stuff which is not needed for architecture independent ++ packages. Addresses: #900554. ++ * lib32gphobos-dev, libn32gphobos-dev: Remove dependency on non-existing ++ libz-dev multilib packages. ++ * Update libgfortran symbols files. ++ * Update libstdc++ symbols files. ++ ++ [ Nicolas Boulenguez ] ++ * Ada: update confirm_debian_bugs.py. ++ * Ada: fully port 50b8286b from the gcc-8 branch to gcc-9. ++ ++ -- Matthias Klose Wed, 17 Jul 2019 21:53:24 +0200 ++ ++gcc-9 (9.1.0-8) unstable; urgency=medium ++ ++ * Update to SVN 20190707 (r273175) from the gcc-9-branch. ++ * Re-add a lost hunk to the add-kfreebsd patch (James Clarke). ++ * Dump config files on failed jit and nvptx builds. ++ * Disable the LTO builds on architectures where the buildds can't keep up. ++ ++ -- Matthias Klose Sun, 07 Jul 2019 12:10:25 +0200 ++ ++gcc-9 (9.1.0-7) experimental; urgency=medium ++ ++ * Update to SVN 20190704 (r273081) from the gcc-9-branch. ++ - Fix PR libstdc++/91067, PR tree-optimization/90892, PR middle-end/90899. ++ - Fix gnat build failure on kfreebsd-* (James Clarke). Closes: #922496. ++ * Add ppc64el as architecture for the nvptx offload packages. ++ * Increase the timeouts for the LTO link builds. ++ * Fix PR rtl-optimization/90756, taken from the trunk. Addresses: #930012. ++ ++ -- Matthias Klose Thu, 04 Jul 2019 22:44:41 +0200 ++ ++gcc-9 (9.1.0-6) experimental; urgency=medium ++ ++ * Update to SVN 20190703 (r273015) from the gcc-9-branch. ++ - Fix PR sanitizer/90954, PR c++/91024, PR target/90991 (x86), PR c/90760, ++ PR tree-optimization/90949, PR c++/90950, PR middle-end/64242, ++ PR c++/60223, PR c++/90490. ++ * Disable LTO builds for snapshot builds. ++ * Don't use --push-state/--pop-state options for old linkers. ++ * Fix explicit autoconf version for backport packages. ++ * Allow to build with the locales package instead of locales-all. ++ * Disable LTO and profiled builds for older binutils versions. ++ * Try to enable the LTO builds everywhere. ++ * Make the LTO link step a bit more verbose to avoid timeouts on ++ the buildds. ++ ++ -- Matthias Klose Wed, 03 Jul 2019 20:21:23 +0200 ++ ++gcc-9 (9.1.0-5) experimental; urgency=medium ++ ++ * Update to SVN 20190628 (r272781) from the gcc-9-branch. ++ - Fix PR libstdc++/85494, PR libstdc++/91012, R libstdc++/90920, ++ PR libstdc++/90281, PR libstdc++/88881, PR libstdc++/90770, ++ PR libstdc++/90252, PR ipa/90939, PR tree-optimization/90930, ++ PR tree-optimization/90930, PR tree-optimization/90316, ++ PR middle-end/64242, PR c++/90825, PR c++/90832, PR c++/90736, ++ PR fortran/90937, PR fortran/90290, PR fortran/90002, PR fortran/89344, ++ PR fortran/87907, PR fortran/86587, PR fortran/77632, PR fortran/69499, ++ PR fortran/69398, PR fortran/68544, PR fortran/90577, PR fortran/90578. ++ * Fix cross building gdc (Iain Buclaw). ++ * Apply proposed fix for PR libgcc/90714 (ia64 only). Addresses: #930119. ++ ++ -- Matthias Klose Fri, 28 Jun 2019 13:13:25 +0200 ++ ++gcc-9 (9.1.0-4) experimental; urgency=medium ++ ++ * Update to SVN 20190612 (r272183) from the gcc-9-branch. ++ - Fix PR target/90811 (nvidia), PR libgomp/90641, PR libgomp/90585, ++ PR c++/90598, PR libstdc++/90700, PR libstdc++/90686, PR libstdc++/90634, ++ PR c/90474, PR d/90778, PR target/90751 (PARISC), ++ PR tree-optimization/90450, PR tree-optimization/90402, ++ PR tree-optimization/90328, PR debug/90733, PR target/82920 (x86), ++ PR fortran/90329, PR fortran/90329, PR bootstrap/90543, ++ PR c++/90810, PR c++/90598, PR c++/90548, PR fortran/90744, ++ PR fortran/90329. ++ * Update the watch file. ++ ++ -- Matthias Klose Wed, 12 Jun 2019 17:56:59 +0200 ++ ++gcc-9 (9.1.0-3) experimental; urgency=medium ++ ++ * Update to SVN 20190526 (r271629) from the gcc-9-branch. ++ - Fix PR libgomp/90527, PR c++/90532, PR libstdc++/90299, ++ PR libstdc++/90454, PR debug/90197, PR pch/90326, PR c++/90484, ++ PR tree-optimization/90385, PR c++/90383, PR tree-optimization/90303, ++ PR tree-optimization/90316, PR tree-optimization/90316, ++ PR libstdc++/90220, PR libstdc++/90557, PR sanitizer/90570, ++ PR target/90547 (x86), PR libfortran/90038, PR fortran/90498, ++ PR libfortran/90038, PR libfortran/90038, PR fortran/54613, ++ PR fortran/54613, PR libstdc++/85965, PR target/90530 (PARISC), ++ PR c++/90572. ++ * Turn on -fstack-clash-protection and -fcf-protection in Ubuntu 19.10 on ++ supported architectures. ++ * Fix PR bootstrap/87338 on ia64 (James Clarke). Addresses: #927976. ++ * Enable LTO builds on 64bit architectures. ++ * Update libstdc++ symbols files for gcc-4-compatible builds. ++ * Build the nvptx offload compiler on ppc64el. ++ * Build the libgomp-hsa plugin. ++ ++ -- Matthias Klose Sun, 26 May 2019 17:59:59 +0200 ++ ++gcc-9 (9.1.0-2) experimental; urgency=medium ++ ++ * Update to SVN 20190514 (r271161) from the gcc-9-branch. ++ - Fix PR target/89424 (PPC), PR sanitizer/90312, PR c++/90265, ++ PR c++/90173, PR target/87835, PR libstdc++/81266, PR libstdc++/90397, ++ PR libstdc++/90239, PR tree-optimization/90416, PR gcov-profile/90380, ++ PR gcov-profile/90380, PR target/90357 (MIPS), PR target/89765 (PPC), ++ PR c++/78010, PR c++/90265, PR c++/90173, PR fortran/90093, ++ PR fortran/90352, PR fortran/90355, PR fortran/90351, PR fortran/90329, ++ PR target/90379, PR bootstrap/89864. ++ * Update the cross installation patch. ++ * Enable Go on sh4. ++ * Adjust some regex patterns used in the packaging for GCC 10. ++ * Drop the build dependency on binutils-multiarch (libgo-9-dev is now split ++ out into its own package). Closes: #804190. ++ * Ignore any distro default flags for the hppa64 cross build. ++ ++ -- Matthias Klose Tue, 14 May 2019 13:38:03 +0200 ++ ++gcc-9 (9.1.0-1) experimental; urgency=medium ++ ++ * GCC 9.1.0 release. ++ * Update to SVN 20190504 (r270874) from the gcc-9-branch. ++ - Fix PR tree-optimization/90316. ++ * Merge some hardening defaults patches into one patch set. ++ * Turn on -fasynchronous-unwind-tables by default on supported architectures. ++ * Refresh patches. ++ ++ -- Matthias Klose Sat, 04 May 2019 17:17:23 +0200 ++ ++gcc-9 (9-20190428-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the gcc-9 branch (20190428, r270630). ++ * Build the phobos and D runtime on s390x and riscv64. ++ ++ -- Matthias Klose Sun, 28 Apr 2019 09:15:08 +0200 ++ ++gcc-9 (9-20190420-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190420, r270466). ++ ++ -- Matthias Klose Sat, 20 Apr 2019 08:30:33 +0200 ++ ++gcc-9 (9-20190402-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190402, r270074). ++ * Mark gcc-9-source as M-A: foreign. ++ ++ -- Matthias Klose Tue, 02 Apr 2019 08:22:27 +0200 ++ ++gcc-9 (9-20190321-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190321, r269832). ++ * Split out lib*go-dev packages. ++ * Fix PR jit/87808: Don't rely on the gcc driver. Let libgccjit0 ++ depend on binutils and libgcc-dev. Addresses: #911668. ++ * Fix stripping the gcc-hppa64 package. ++ * Update libstdc++ and libgccjit symbols files. ++ ++ -- Matthias Klose Thu, 21 Mar 2019 12:39:47 +0100 ++ ++gcc-9 (9-20190311-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190311, r269597). ++ ++ -- Matthias Klose Mon, 11 Mar 2019 23:23:20 +0100 ++ ++gcc-9 (9-20190305-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190305, r269387). ++ ++ [ Aurelien Jarno ] ++ * Run the tests in parallel again on Debian/s390x, the libgo bug is ++ fixed. ++ ++ [ Matthias Klose ] ++ * Fix test dependencies for the Hurd and KFreeBSD. ++ ++ -- Matthias Klose Tue, 05 Mar 2019 10:51:09 +0100 ++ ++gcc-9 (9-20190223-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190223, r269152). ++ ++ -- Matthias Klose Sat, 23 Feb 2019 11:00:00 +0100 ++ ++gcc-9 (9-20190216-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190216, r268955). ++ * Fix libgo s390x biarch build. ++ * Run test suite on the Hurd and KFreeBSD. ++ * Fix linking libgphobos with the system zlib. ++ ++ -- Matthias Klose Sat, 16 Feb 2019 14:28:15 +0100 ++ ++gcc-9 (9-20190215-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190215, r268943). ++ * Build libphobos on all mips variants. ++ * Build-depend on locales-all instead of locales, don't generate locales ++ during the build, and attribute test dependencies with . ++ * Don't run the tests on Debian/s390x in parallel, memory constraints on ++ the buildds. ++ * gdc-9: Include again the libgphobos spec file. ++ ++ -- Matthias Klose Fri, 15 Feb 2019 19:13:42 +0100 ++ ++gcc-9 (9-20190208-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190208, r268704). ++ * Update the support to build without packages being built by the next GCC ++ version. ++ * Fix ISO_Fortran_binding.h installation for cross builds. ++ ++ -- Matthias Klose Fri, 08 Feb 2019 18:17:45 +0100 ++ ++gcc-9 (9-20190202-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190202, r268474). ++ ++ -- Matthias Klose Sat, 02 Feb 2019 12:19:53 +0100 ++ ++gcc-9 (9-20190125-2) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190125, r268260). ++ ++ [ Matthias Klose ] ++ * Turn on ld --as-needed by default on Debian development versions. ++ * Turn on profiled bootstrap on x86, AArch64, PPC64 and s390x ++ architectures for native builds. ++ * Relax the shlibs dependency for libgnat-8. Addresses: #920246. ++ ++ [ Nicolas Boulenguez ] ++ * Update the ada-kfreebsd patch. Closes: #919996. ++ ++ -- Matthias Klose Fri, 25 Jan 2019 11:58:44 +0100 ++ ++gcc-9 (9-20190120-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190120, r268102). ++ - Updates to Go 1.12 beta2. ++ * Build libphobos on hppa. ++ * Drop libgo patch for the Hurd. ++ * Refresh patches. ++ * Update newlib to newlib-3.1.0.20181231. ++ ++ -- Matthias Klose Sun, 20 Jan 2019 11:28:26 +0100 ++ ++gcc-9 (9-20190116-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190116, r267965). ++ * libgccjit-9-doc: Breaks libgccjit-8-doc. Closes: #918445. ++ * Update libstdc++6 symbols files. ++ * Override some libasan and gccgo lintian warnings. ++ * Build the Ada packages except for gnat-9-sjlj. ++ * Bump standards version. ++ ++ -- Matthias Klose Wed, 16 Jan 2019 09:42:19 +0100 ++ ++gcc-9 (9-20190103-1) experimental; urgency=medium ++ ++ * GCC snapshot, taken from the trunk (20190103). ++ ++ [ Matthias Klose ] ++ * Update packaging, patches and symbols files. ++ * Remove libmpx packaging, removed upstream. ++ * Update newlib to the newlib-3.0.0.20180831 snapshot. ++ * Disable building Ada for now. ++ * Build D and libphobos from the now integrated upstream sources. ++ * gcc-9-base: Break gnat (<< 7). Addresses: #911633. ++ * gdc: Dynamically link the phobos library. ++ * Adopt gcc-snapshot build for the current trunk. ++ * Don't apply gcc-as-needed patch for snapshot builds. ++ * Fix control file generation for gphobos n32 multilibs. ++ * Disable gnat build on alpha. See PR ada/88200. ++ * powerpcspe support removed upstream. Remove the powerpcspe packaging ++ references and powerpcspe patches. ++ * gcc-9-source: Depend on lsb-release. ++ * Disable broken selective scheduling on ia64 (Adrian Glaubitz). ++ See PR rtl-optimization/85412. Addresses: #916591. ++ * Fix perl shebang for the gnathtml binary. ++ * Lower priority of libgcc[124] and libstdc++6 packages. ++ * Stop building the fixincludes package, never used by lintian. ++ * Remove the libstdc++6 breaks for the stretch release. ++ * libgccjit-doc: Install image files. ++ * Don't provide -compiler names for cross compiler packages. ++ Addresses: #916376. Not a final solution. ++ * Disable the gnat build for now, ftbfs in the sjlj variant. ++ * Bump the libgo soname. ++ ++ [ Nicolas Boulenguez ] ++ * Update Ada patches. ++ ++ -- Matthias Klose Thu, 03 Jan 2019 13:35:00 +0100 ++ ++gcc-8 (8.2.0-8.1) UNRELEASED; urgency=medium ++ ++ * Update to SVN 20181020 (r265339) from the gcc-8-branch. ++ - Fix PR middle-end/87087, PR middle-end/87623, PR libstdc++/87641, ++ PR middle-end/87645. ++ * Update VCS attributes in the control file. ++ * Don't configure native builds with --with-sysroot. Apparently this cannot ++ be completely overridden with the command line option --sysroot. ++ ++ -- Matthias Klose Sat, 20 Oct 2018 09:25:48 +0200 ++ ++gcc-8 (8.2.0-8) unstable; urgency=medium ++ ++ * Update to SVN 20181017 (r265234) from the gcc-8-branch. ++ - Fix PR libstdc++/86751, PR libstdc++/78595, PR libstdc++/87061, ++ PR libstdc++/70966, PR libstdc++/77854, PR libstdc++/87538, ++ PR libgcc/85334, PR middle-end/63155, PR target/87511 (AArch64), ++ PR middle-end/87610, PR tree-optimization/87465, PR target/87550 (x86), ++ PR target/87414 (x86), PR tree-optimization/86844, PR target/86731 (PPC), ++ PR target/87370 (x86), PR target/87517 (x86), PR target/87522 (x86), ++ PR other/87353, PR gcov-profile/86109, PR target/82699 (x86), ++ PR target/87467 (x86), PR target/87033 (PPC), PR sanitizer/85774, ++ PR rtl-optimization/86882, PR gcov-profile/85871, PR c++/87582, ++ PR c++/84940, PR gcov-profile/86109, PR c++/85070, PR c++/86881, ++ PR fortran/83999, PR fortran/86372, PR fortran/86111, PR fortran/85395, ++ PR fortran/86830, PR fortran/85954. ++ ++ -- Matthias Klose Wed, 17 Oct 2018 09:45:31 +0200 ++ ++gcc-8 (8.2.0-7) unstable; urgency=medium ++ ++ * Update to SVN 20180917 (r264370) from the gcc-8-branch. ++ - Fix PR libstdc++/87278, PR target/85666 (mmix), PR middle-end/87188, ++ PR target/87224 (PPC), PR target/86989 (PPC), PR rtl-optimization/86771, ++ PR middle-end/87248, PR c++/87093, PR fortran/87284, PR fortran/87277. ++ ++ -- Matthias Klose Mon, 17 Sep 2018 17:46:50 +0200 ++ ++gcc-8 (8.2.0-6) unstable; urgency=medium ++ ++ * Update to SVN 20180908 (r264168) from the gcc-8-branch. ++ - Fix PR c++/87137, PR bootstrap/87225, PR target/87198 (x86), ++ PR middle-end/87138, PR tree-optimization/86835, PR c++/87185, ++ PR c++/87095, PR c++/86836, PR c++/86738, PR c++/86706, PR fortran/86116. ++ * Apply proposed patch for PR go/87260. ++ * Apply proposed patch for PR tree-optimization/87188. Closes: #907586. ++ * Fix PR target/86731 (PPC), taken from the trunk. Closes: #905868. ++ ++ -- Matthias Klose Sun, 09 Sep 2018 14:43:43 +0200 ++ ++gcc-8 (8.2.0-5) unstable; urgency=medium ++ ++ * Update to SVN 20180904 (r264075) from the gcc-8-branch. ++ - Fix PR sanitizer/86022, PR libstdc++/87116, PR other/86992, ++ PR tree-optimization/86914, PR middle-end/87099, ++ PR rtl-optimization/87065, PR target/86662, PR target/87014, ++ PR target/86640, PR gcov-profile/86817, PR tree-optimization/86871, ++ PR c++/86763, PR fortran/86837, PR libfortran/86704, ++ PR tree-optimization/85859, PR tree-optimization/87074, ++ PR tree-optimization/86927, PR middle-end/87024, PR middle-end/86505, ++ PR tree-optimization/86945, PR tree-optimization/86816, ++ PR lto/86456, PR c++/87155, PR c++/84707, PR c++/87122, ++ PR fortran/86328, PR fortran/86760. ++ * Remove ia64 boostrap work around (Jason Duerstock). Closes: #906675. ++ ++ -- Matthias Klose Tue, 04 Sep 2018 09:04:17 +0200 ++ ++gcc-8 (8.2.0-4) unstable; urgency=medium ++ ++ * Update to SVN 20180814 (r263527) from the gcc-8-branch. ++ - Fix PR libstdc++/86597, PR libstdc++/84535, PR libstdc++/60555, ++ PR libstdc++/86874, PR libstdc++/86861, PR target/86386 (x86), ++ PR c++/86728, PR c++/86767, PR fortran/86906. ++ ++ [ Nicolas Boulenguez ] ++ * gnat: set ld_library_path for tested gnat tools. ++ * In the gnat autopkg test, tell gnatmake to report progress on stdout. ++ * gnat: Improve the ada-gcc-name patch. ++ * Update ada/debian_packaging.mk. ++ ++ -- Matthias Klose Tue, 14 Aug 2018 11:45:55 +0200 ++ ++gcc-8 (8.2.0-3) unstable; urgency=medium ++ ++ * Update to SVN 20180803 (r263086) from the gcc-8-branch. ++ - Fix PR middle-end/86705, PR target/86820 (m68k). ++ * Build using ISL 0.20. ++ * Fix some autopkg tests (allow stderr, explicitly depend on libc-dev). ++ ++ -- Matthias Klose Fri, 03 Aug 2018 12:32:31 +0200 ++ ++gcc-8 (8.2.0-2) unstable; urgency=medium ++ ++ * Update to SVN 20180802 (r263045) from the gcc-8-branch. ++ - Fix PR middle-end/86542, PR middle-end/86539, PR middle-end/86660, ++ PR middle-end/86627, PR target/86511, PR sanitizer/86759, PR c/85704, ++ PR libstdc++/86734, PR bootstrap/86724, PR target/86651, PR c/86617, ++ PR c++/86190. ++ - Fix PR libstdc++/84654, PR libstdc++/85672. LP: #1783705. ++ * Update cross-build patches for GCC 8.2. ++ * Refresh patches. ++ * Add some basic autopkg tests for Ada, C, C++, Go, OpenMP and Fortran. ++ * Backport r262835 to fix a wrong-code generation on m68k (Adrian Glaubits). ++ ++ -- Matthias Klose Thu, 02 Aug 2018 05:59:26 +0200 ++ ++gcc-8 (8.2.0-1) unstable; urgency=medium ++ ++ * GCC 8.2.0 release. ++ * Update GDC to 20180726 from the gdc-8-stable branch.. ++ ++ -- Matthias Klose Thu, 26 Jul 2018 13:28:20 +0200 ++ ++gcc-8 (8.1.0-12) unstable; urgency=medium ++ ++ * GCC 8.2.0 release candidate. ++ * Update to SVN 20180719 (r262861) from the gcc-8-branch. ++ - Fix PR middle-end/85602, PR c++/86480. ++ ++ [ Nicolas Boulenguez ] ++ * ada-verbose patch: Make the ada build more verbose. ++ * Update the ada-gcc-name patch again. See #856274. Closes: #903694. ++ ++ [ Matthias Klose ] ++ * Rewrite debian/README.cross. ++ ++ -- Matthias Klose Thu, 19 Jul 2018 17:39:39 +0200 ++ ++gcc-8 (8.1.0-11) unstable; urgency=medium ++ ++ * Update to SVN 20180717 (r262818) from the gcc-8-branch. ++ - Fix PR c/86453, PR debug/86452, PR debug/86457, PR middle-end/85974, ++ PR middle-end/86076, PR tree-optimization/85935, ++ PR tree-optimization/86514, PR tree-optimization/86274, ++ PR target/84413 (x86), PR middle-end/86202, PR target/84829, ++ PR c++/3698, PR c++/86208, PR c++/86374, PR sanitizer/86406, ++ PR fortran/83184, PR fortran/86417, PR fortran/83183, ++ PR fortran/86325. ++ ++ [ Nicolas Boulenguez ] ++ * Update the ada-gcc-name patch, not appending the suffix twice. ++ Addresses: #856274. ++ ++ -- Matthias Klose Tue, 17 Jul 2018 14:09:13 +0200 ++ ++gcc-8 (8.1.0-10) unstable; urgency=medium ++ ++ * Update to SVN 20180712 (r262577) from the gcc-8-branch. ++ - Fix PR libstdc++/86272, PR libstdc++/86127, PR target/85904, ++ PR libstdc++/85098, PR libstdc++/85671, PR libstdc++/83982, ++ PR libstdc++/86292, PR libstdc++/86138, PR libstdc++/84087, ++ PR libstdc++/86398, PR hsa/86371, PR tree-optimization/86492, ++ PR c++/86400, PR target/86285 (PPC), PR debug/86064, ++ PR target/86222 (PPC), PR rtl-optimization/85645, ++ PR rtl-optimization/85645, PR target/86314 (x86), PR sanitizer/86406, ++ PR c++/86398, PR c++/86378, PR c++/86320, PR c++/80290, ++ PR fortran/82969, PR fortran/86242, PR fortran/82865. ++ * Enable decimal float support on kfreebsd-amd64. Closes: #897416. ++ ++ -- Matthias Klose Thu, 12 Jul 2018 10:07:17 +0200 ++ ++gcc-8 (8.1.0-9) unstable; urgency=medium ++ ++ * Update to SVN 20180626 (r262138) from the gcc-8-branch. ++ - Fix PR libstdc++/86138, PR libstdc++/82644, PR libgcc/86213, ++ PR c++/86210, PR c/86093, PR target/86197 (PPC), PR target/85358 (PPC), ++ PR tree-optimization/85989, PR target/85657 (PPC), PR target/85657 (PPC), ++ PR target/85994, PR rtl-optimization/86108, PR debug/86194, ++ PR tree-optimization/86231, PR c/82063, PR c++/86219, PR c++/86182, ++ PR c++/85634, PR c++/86200, PR c++/81060, PR fortran/83118, ++ PR libstdc++/86112, PR libstdc++/81092, PR fortran/82972, ++ PR fortran/83088, PR fortran/85851, PR c++/86291. ++ ++ [ Nicolas Boulenguez ] ++ * Remove Ludovic Brenta's work to let Ada build tools link with freshly ++ built libgnat.so, this is now handled by upstream testsuite. ++ ++ [ Iain Buclaw ] ++ * gdc: Explicitly set test action as compile in all dg tests. ++ ++ [ Matthias Klose ] ++ * Build using gnat-8. ++ ++ -- Matthias Klose Tue, 26 Jun 2018 10:45:36 +0200 ++ ++gcc-8 (8.1.0-8) unstable; urgency=medium ++ ++ * Update to SVN 20180617 (r261686) from the gcc-8-branch. ++ - Fix PR libstdc++/86169, PR middle-end/86095, PR middle-end/85878, ++ PR middle-end/86123, PR middle-end/86122, PR c++/86147, PR c++/82882, ++ PR fortran/85703, PR fortran/85702, PR fortran/85701. ++ * Fix applying the powerpcspe patches. ++ ++ -- Matthias Klose Sun, 17 Jun 2018 12:56:15 +0200 ++ ++gcc-8 (8.1.0-6) unstable; urgency=medium ++ ++ * Update to SVN 20180614 (r261597) from the gcc-8-branch. ++ - Fix PR libstdc++/86008, PR libstdc++/85930, PR libstdc++/85951, ++ PR target/85591 (x86), PR c++/85710, PR c++/80485, PR target/85755 (PPC), ++ PR target/85755 (PPC), PR target/81497 (ARM), PR target/85684 (x86), ++ PR target/63177 (PPC), PR tree-optimization/86038, ++ PR tree-optimization/85964, PR tree-optimization/85934, PR c++/86025, ++ PR tree-optimization/85863, PR c/85623, PR target/86003 (ARM), ++ PR tree-optimization/85712, PR target/85950 (x86), PR target/85984, ++ PR target/85829 (x86), PR c++/85792, PR c++/85963, PR c++/61806, ++ PR c++/85765, PR c++/85764, PR c++/85807, PR c++/85815, PR c++/86094, ++ PR c++/86060, PR c++/85847, PR c++/85976, PR c++/85731, PR c++/85739, ++ PR c++/85761, PR c++/85873, PR fortran/44491, PR fortran/85138, ++ PR fortran/85996, PR fortran/86051, PR fortran/86059, PR fortran/63514, ++ PR fortran/78278, PR fortran/38351, PR fortran/78571, PR fortran/85631, ++ PR fortran/86045, PR fortran/85641, PR fortran/85816, PR fortran/85975, ++ PR libgfortran/85840, PR target/85945, PR middle-end/86139, ++ PR other/77609, PR tree-optimization/86114, PR target/86048 (x86), ++ PR fortran/86110. ++ - libgo: update to Go 1.10.3 release. ++ ++ -- Matthias Klose Thu, 14 Jun 2018 16:57:14 +0200 ++ ++gcc-8 (8.1.0-5) unstable; urgency=medium ++ ++ * Update to SVN 20180531 (r260992) from the gcc-8-branch. ++ - Fix PR sanitizer/86012, PR c/85696, PR c++/85662, PR target/85756 (x86), ++ PR target/85683 (x86), PR c++/85952, PR c/85696, PR c++/85662. ++ - Fix libsanitizer build on sparc64. ++ * libgo: Make the vet tool work with gccgo (taken from the trunk). ++ ++ -- Matthias Klose Thu, 31 May 2018 15:18:52 +0200 ++ ++gcc-8 (8.1.0-4) unstable; urgency=medium ++ ++ * Update to SVN 20180529 (r260895) from the gcc-8-branch. ++ - Fix PR c++/85782, PR sanitizer/85835, PR libstdc++/85818, ++ PR libstdc++/85818, PR libstdc++/83891, PR libstdc++/84159, ++ PR libstdc++/67554, PR libstdc++/82966, PR bootstrap/85921, ++ PR sanitizer/85556, PR target/85900 (x86), PR target/85345 (x86), ++ PR c++/85912, PR target/85903 (x86), PR tree-optimization/85793, ++ PR middle-end/85874, PR tree-optimization/85822, PR middle-end/85643, ++ PR tree-optimization/85814, PR target/85698 (PPC), PR c++/85842, ++ PR c++/85864, PR c++/81420, PR c++/85866, PR c++/85782, PR fortran/85786, ++ PR fortran/85895, PR fortran/85780, PR fortran/85779, PR fortran/85543, ++ PR fortran/80657, PR fortran/49636, PR fortran/82275, PR fortran/82923, ++ PR fortran/66694, PR fortran/82617, PR fortran/85742, PR fortran/85542, ++ PR libgfortran/85906, PR libgfortran/85840. ++ ++ [ Nicolas Boulenguez ] ++ * Update ada/confirm_debian_bugs to gcc-8 and python3. ++ ++ [ Matthias Klose ] ++ * gnat-*: Don't search the target dirs when calling dh_shlibdeps. ++ * Stop shipping unstripped binaries with the final release. Closes: #894014. ++ ++ -- Matthias Klose Tue, 29 May 2018 14:34:37 +0200 ++ ++gcc-8 (8.1.0-3) unstable; urgency=medium ++ ++ * Update to SVN 20180512 (r260194) from the gcc-8-branch. ++ - Fix PR ipa/85655, PR target/85733 (ARM), PR target/85606 (ARM), ++ PR fortran/70870, PR fortran/85521, PR fortran/85687, PR fortran/68846, ++ PR fortran/70864. ++ * Fix name of the g++ multiarch include directory. Closes: #898323. ++ * Fix PR sanitizer/85556, attribute no_sanitize does not accept multiple ++ options; taken from the trunk. Closes: #891489. ++ ++ -- Matthias Klose Sat, 12 May 2018 10:36:05 -0400 ++ ++gcc-8 (8.1.0-2) unstable; urgency=medium ++ ++ * Update to SVN 20180510 (r260147) from the gcc-8-branch. ++ - Fix PR go/85630, PR target/85519 (nvptx), PR libstdc++/85642, ++ PR libstdc++/84769, PR libstdc++/85632, PR libstdc++/80506, ++ PR target/85512 (AArch64), PR c++/85305, PR ada/85635, PR ada/85540, ++ PR rtl-optimization/85638, PR middle-end/85588, PR middle-end/85588, ++ PR tree-optimization/85615, PR middle-end/85567, PR target/85658 (ARM), ++ PR tree-optimization/85597, PR middle-end/85627, PR c++/85659, ++ PR c++/85706, PR c++/85695, PR c++/85646, PR c++/85618, PR fortran/85507. ++ * Don't configure with --with-as and --with-ld, but search the triplet ++ prefixed as and ld in the same places as as/ld. Closes: #896057, #897896. ++ * Enable decimal float support on kfreebsd-amd64. Closes: #897416. ++ ++ -- Matthias Klose Thu, 10 May 2018 20:43:42 -0400 ++ ++gcc-8 (8.1.0-1) unstable; urgency=medium ++ ++ * GCC 8.1.0 release. ++ * Stop providing the 8.x.y symlinks in gcc_lib_dir and incluce/c++. ++ * Configure powerpcspe with --enable-obsolete, will be gone with GCC 9. ++ * Build libmpx libraries when not building the common libs. ++ * Update NEWS files for GCC 8.1. ++ ++ -- Matthias Klose Wed, 02 May 2018 11:43:46 +0200 ++ ++gcc-8 (8-20180425-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180425 (r259628). ++ ++ [ Matthias Klose ] ++ * Update nvptx-newlib to 20180424. ++ * Use the binutils in the build chroot if present. ++ * Don't use dwz for GCC backports. ++ * Install the movdirintrin.h header file. ++ ++ [ Aurelien Jarno ] ++ * Enable logwatch on riscv64. ++ ++ -- Matthias Klose Wed, 25 Apr 2018 06:56:58 +0200 ++ ++gcc-8 (8-20180414-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180414 (r259383). ++ ++ [ Matthias Klose ] ++ * Update GDC to 20180410. ++ * Don't install i586 symlinks anymore for i386 builds in sid. ++ * Fix zlib-dev dependencies for the libphobos cross multilib packages. ++ * Fix dependency generation for libatomic and libquadmath cross packages. ++ * Use triplet-prefixed as and ld (Helmut Grohne). Closes: #895251. ++ * Link libasan, liblsan, libubsan always with --no-as-needed. LP: #1762683. ++ * Use --push-state --as-needed and --pop-state instead of --as-needed and ++ --no-as-needed for linking libgcc. ++ * Update the gcc-foffload-default patch. LP: #1721355. ++ ++ [ Svante Signell ] ++ * Reintroduce libgo patches for hurd-i386. Closes: #894080. ++ ++ -- Matthias Klose Sat, 14 Apr 2018 07:10:01 +0200 ++ ++gcc-8 (8-20180402-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180402 (r259004). ++ * Build a native compiler with a cross directory layout using the ++ FORCE_CROSS_LAYOUT environment variable. ++ ++ -- Matthias Klose Mon, 02 Apr 2018 10:09:27 +0200 ++ ++gcc-8 (8-20180331-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180331 (r258989). ++ - Fix PR/libstdc++/85040, std::less fails when operator< is ++ overloaded. Closes: #893517. ++ - Fix PR/target 84148, CET shouldn't be enabled in 32-bit run-time ++ libraries by default. Closes: #890092. ++ ++ [ Samuel Thibault ] ++ * Fix disabling go on hurd-i386 for now. ++ ++ [ Matthias Klose ] ++ * gdc: Link with the shared libphobos library by default. ++ * Fix control file generation for nolang=biarch builds (Helmut Grohne). ++ Closes: #891289. ++ * Simplify architecture to gnu-type mapping (Helmut Grohne). Closes: #893493. ++ ++ -- Matthias Klose Sat, 31 Mar 2018 15:14:44 +0800 ++ ++gcc-8 (8-20180321-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180321 (r258712). ++ - Fix PR sanitizer/84761. Addresses: #892096. ++ * Update GDC to 20180320. ++ * Reenable building gdc. ++ ++ -- Matthias Klose Wed, 21 Mar 2018 19:47:27 +0800 ++ ++gcc-8 (8-20180319-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180319 (r258631). ++ ++ [ Aurelien Jarno ] ++ * Default to PIE on riscv64. ++ * Temporarily do not build-depend on gdb on riscv64. ++ ++ -- Matthias Klose Mon, 19 Mar 2018 02:18:29 +0800 ++ ++gcc-8 (8-20180312-2) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180312 (r258445). ++ * Update GDC to 20180311. ++ ++ [ Matthias Klose ] ++ * Fix typo in libasan and lib32asan symbols files for s390x. ++ ++ [ Aurelien Jarno ] ++ * Disable gnat on riscv64. ++ * Backport RISC-V libffi support from upstream. ++ ++ -- Matthias Klose Mon, 12 Mar 2018 12:33:10 +0100 ++ ++gcc-8 (8-20180310-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180310 (r258410). ++ * Build libasan and libubsan packages on s390x. ++ * Update libasan symbols files for s390x. ++ ++ -- Matthias Klose Sat, 10 Mar 2018 10:54:02 +0700 ++ ++gcc-8 (8-20180308-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180308 (r258348). ++ * Update GDC to 20180304. ++ ++ [ Matthias Klose ] ++ * Fix cross builds building without "common" libraries. ++ * Fix cross-building libgnat on armel, when not building the common libraries. ++ * Remove the go patches for the Hurd. Unmaintained. ++ * Update libcc1 symbols file. ++ * Install more intrinsic header files. ++ ++ [ Aurelien Jarno ] ++ * Configure s390x build with --with-arch=z196 on Debian. ++ * Drop libgo-s390x-default-isa.diff patch. ++ * Disable multilib on riscv64. ++ * Update gcc-as-needed.diff, gcc-hash-style-both.diff and ++ gcc-hash-style-gnu.diff for riscv64. ++ * Update gcc-multiarch.diff for riscv64. ++ ++ [ Karsten Merker ] ++ * Force the riscv64 ISA to rv64imafdc and ABI to lp64d. ++ ++ -- Matthias Klose Thu, 08 Mar 2018 14:17:37 +0700 ++ ++gcc-8 (8-20180218-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180208 (r257477). ++ * Update GDC to 20180211. ++ * Store basename only in gfortran .mod files. Addresses: #889133. ++ * Disable go on the hurd, patches are out of date. ++ * Configure with --disable-libquadmath-support when not explicitly enabled. ++ * For armel multilib builds, explicitly set architecture and cpu for the ++ hard-float multilib. ++ ++ -- Matthias Klose Sun, 18 Feb 2018 16:11:11 +0700 ++ ++gcc-8 (8-20180207-2) unstable; urgency=medium ++ ++ * Revert the fix for PR target/84145. ++ * Override patch-file-present-but-not-mentioned-in-series lintian warning. ++ ++ -- Matthias Klose Wed, 07 Feb 2018 13:09:23 +0100 ++ ++gcc-8 (8-20180207-1) unstable; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180207 (r257435). ++ * Update GDC to 20180204. ++ * Refresh patches. ++ * Disable go on m68k again. Closes: #886103. ++ * Ignore bootstrap comparison failures in gcc/d on alpha. Addresses: #888951. ++ * Include amo.h header for Power architectures. ++ * Include arm_cmse.h header for ARM32 architectures. ++ * Update tsan symbols file arm64. ++ ++ -- Matthias Klose Wed, 07 Feb 2018 01:34:14 +0100 ++ ++gcc-8 (8-20180130-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180130 (r257194). ++ * Update GDC to 20180130. ++ ++ -- Matthias Klose Tue, 30 Jan 2018 18:49:51 +0100 ++ ++gcc-8 (8-20180123-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180123 (r257004). ++ * Update GDC to 20180123. ++ * Install the msa.h header for mips targets (YunQiang Su). Addresses: #887066. ++ * Fix mipsen r6 biarch configs (YunQiang Su). Closes: #886976. ++ ++ -- Matthias Klose Tue, 23 Jan 2018 23:10:51 +0100 ++ ++gcc-8 (8-20180110-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20180110 (r256425). ++ - Go 1.10 beta1 merged, bumping libgo soname. ++ * Update GDC to 20180108. ++ * debian/rules2: Fix typo for N32 conditions (YunQiang Su). Closes: #886459. ++ * More libffi mips r6 updates (YunQiang Su). Addresses: #886201. ++ * Default to PIE on the hurd (Samuel Thibault). Addresses: #885056. ++ * Use internal libunwind for ia64 cross-builds. Addresses: #885931. ++ * Strip -z,defs from linker options for internal libunwind (James Clarke). ++ Addresses: #885937. ++ * Fix rtlibs stage build with debhelper 10.9.1 (Helmut Grohne). ++ Closes: #879054. ++ ++ -- Matthias Klose Wed, 10 Jan 2018 12:23:12 +0100 ++ ++gcc-8 (8-20171229-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171229. ++ * Update GDC to 20171227. ++ * Build the nvptx offload compiler again. ++ ++ -- Matthias Klose Fri, 29 Dec 2017 22:16:04 +0100 ++ ++gcc-8 (8-20171223-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171223. ++ * Update GDC to 20171223. ++ * Don't build the nvptx offload compiler for now, see PR target/83524. ++ ++ -- Matthias Klose Sat, 23 Dec 2017 13:08:14 +0100 ++ ++gcc-8 (8-20171215-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171215. ++ * Update GDC to 20171213. ++ * Move the .gox files into the gccgo packages. Addresses: #883136. ++ * libffi: mips/n32.S: disable .set mips4 on mips r6 (YunQiang Su). ++ * Fix shlibs search path for mips64 cross targets. Addresses: #883988. ++ * Set the armel port baseline to armv5te. Closes: #882174. ++ ++ -- Matthias Klose Fri, 15 Dec 2017 18:30:46 +0100 ++ ++gcc-8 (8-20171209-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171209. ++ * Add more header files for builtins. Closes: #883423. ++ * Re-enable gccgo on m68k. Addresses: #883794. ++ ++ -- Matthias Klose Sat, 09 Dec 2017 21:23:08 +0100 ++ ++gcc-8 (8-20171128-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171128. ++ ++ [ Matthias Klose ] ++ * Don't revert the fix for PR target/55947, fixed for GCC 8. ++ * Update libgfortran symbol versioning. ++ ++ [ Nicolas Boulenguez ] ++ * Fix the gnat bootstrap. ++ ++ -- Matthias Klose Tue, 28 Nov 2017 07:40:23 +0100 ++ ++gcc-8 (8-20171122-1) experimental; urgency=medium ++ ++ [ Matthias Klose ] ++ * GCC 8 snapshot, taken from the trunk 20171122. ++ * Update GDC to 20171118. ++ * Port libgo to the Hurd (Svante Signell). ++ * Add support for a plethora of mips r6 packages (YunQiang Su). ++ * Remove the libcilkrts packaging bits. ++ * Remove libgphobos symbols files. ++ ++ [ Svante Signell ] ++ * Do not enable go on GNU/kFreeBSD. ++ ++ -- Matthias Klose Wed, 22 Nov 2017 14:02:35 +0100 ++ ++gcc-8 (8-20171108-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171108. ++ * Update GDC to 20171106. Closes: #880548. ++ * libgcc-dev: Install the liblsan_preinit.o file. ++ * Compress debug symbols for compiler binaries with dwz. ++ ++ -- Matthias Klose Wed, 08 Nov 2017 20:00:30 +0100 ++ ++gcc-8 (8-20171102-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171102. ++ * Bump libunwind (build-)dependency for ia64. Addresses: #879959. ++ * Drop the autogen build dependency. ++ * Install the gfniintrin.h header file. ++ * libgcc and libstdc++ symbols files updates for mipsn32. ++ * Remove the gcc-mips64-stack-spilling patch, applied upstream. ++ * Update libasan symbols files. ++ ++ -- Matthias Klose Thu, 02 Nov 2017 01:43:34 +0100 ++ ++gcc-8 (8-20171031-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171031. ++ * Install cetintrin.h header. Closes: #879740. ++ * Update gnat patches (YunQiang Su). Closes: #879985. ++ * Build libphobos runtime library on x86 architectures again. ++ * Fix typo in libx32stdc++6-8-dbg conflicts. Closes: #879883. ++ ++ -- Matthias Klose Tue, 31 Oct 2017 02:22:07 +0100 ++ ++gcc-8 (8-20171023-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171023. ++ * Mask __float128 from CUDA compilers. LP: #1717257. ++ * Update the gdc build support. ++ * Don't use quadmath on powerpc and ppc64. ++ * Bump asan and ubsan sonames. ++ * Adjust sanitizer symbols for the libsanitizer upstream merge. ++ * Install the gcov.h header file. ++ * Do the extra/optional dance ... ++ * Override hardening-no-pie lintian warnings for compiler executables. ++ ++ -- Matthias Klose Mon, 23 Oct 2017 10:57:54 +0200 ++ ++gcc-8 (8-20171016-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot, taken from the trunk 20171016. ++ * Update nvptx-newlib to 20171010. ++ * Fix lsan/tsan symbols files for arm64 and ppc64el. ++ * Add missing conflicts with GCC 7 packages. Closes: #877441. ++ * Fix builds without hppa64 cross compiler and new debhelper. See: #877589. ++ * Fix build dependency on realpath. ++ * Build the nvptx offload compiler again. ++ * Update symbols files. ++ * Fix build dependency on realpath. ++ * Set QUILT_PATCH_OPTS='-E' for applying patches. ++ ++ -- Matthias Klose Mon, 16 Oct 2017 14:56:04 +0200 ++ ++gcc-8 (8-20170923-1) experimental; urgency=medium ++ ++ * GCC 8 snapshot. ++ * Disable Ada and D for a first build. ++ ++ -- Matthias Klose Tue, 26 Sep 2017 23:44:57 +0200 ++ ++gcc-7 (7.2.0-7) unstable; urgency=medium ++ ++ * Update to SVN 20170923 (r253114) from the gcc-7-branch. ++ - Fix PR libstdc++/79162, PR libstdc++/79162, PR libstdc++/82262, ++ PR libstdc++/82254, PR target/81996 (PPC), PR target/71951 (AArch64), ++ PR sanitizer/81929. ++ * Fix PR go/82284, taken from the trunk. Closes: #876353. ++ ++ -- Matthias Klose Sat, 23 Sep 2017 11:31:21 +0200 ++ ++gcc-7 (7.2.0-6) unstable; urgency=medium ++ ++ * Update to SVN 20170920 (r253002) from the gcc-7-branch. ++ - Fix PR target/82112 (PPC), PR c++/81355, PR tree-optimization/82084, ++ PR tree-optimization/82108, PR target/81325 (PPC), PR c++/81236, ++ PR c++/80767, PR c++/82030, PR c++/80935, PR c++/81671, PR c++/81525, ++ PR c++/81314, PR libgfortran/78387. ++ * Fix fortran cross compiler build with debhelper 10.9. Closes: #876246. ++ * Strip the compiler binaries again. Closes: #872672. ++ * Bump binutils dependency to 2.29.1 for sid/buster. ++ ++ -- Matthias Klose Wed, 20 Sep 2017 11:13:31 +0200 ++ ++gcc-7 (7.2.0-5) unstable; urgency=medium ++ ++ * Update to SVN 20170915 (r252791) from the gcc-7-branch. ++ - Fix PR c/81687, PR c/45784, PR c++/81852, PR target/82181 (xtensa), ++ PR target/80695 (PPC), PR target/81988 (SPARC), PR middle-end/81768, ++ PR sanitizer/81923, PR target/81621, PR driver/81650, ++ PR middle-end/81052, PR tree-optimization/81987, PR bootstrap/81926, ++ PR libstdc++/79162, PR libstdc++/81468, PR libstdc++/81835, ++ PR libstdc++/70483, PR libstdc++/70483, PR target/81833 (PPC), ++ PR other/39851, PR ipa/81128, PR inline-asm/82001, PR c++/81355, ++ PR tree-opt/81696. ++ * Enable libgo tests and rebuilds with make -C (Svante Signell). ++ Closes: #873929. ++ * Fix PR sanitizer/77631, support separate debug info in libbacktrace. ++ * Update the Linaro support to the 7-2017.09 snapshot. ++ ++ -- Matthias Klose Fri, 15 Sep 2017 12:15:21 +0200 ++ ++gcc-7 (7.2.0-4) unstable; urgency=medium ++ ++ * Update to SVN 20170906 (r251753) from the gcc-7-branch. ++ - Fix PR c++/82039, PR libstdc++/81912, PR libstdc++/81891, ++ PR libstdc++/81599, PR libstdc++/81338, PR tree-optimization/81503, ++ PR ada/79542, PR ada/62235, PR fortran/81770. ++ * Fix PR target/81833 (PPC), taken from the trunk. Closes: #871565. ++ ++ -- Matthias Klose Wed, 06 Sep 2017 10:38:05 +0200 ++ ++gcc-7 (7.2.0-3) unstable; urgency=high ++ ++ * Update to SVN 20170901 (r251583) from the gcc-7-branch. ++ - Fix PR target/81504 (PPC), PR c++/82040. ++ * Apply proposed patch for PR target/81803 (James Cowgill), conditionally ++ for mips* targets. Closes: #871514. ++ * Bump standards version. ++ ++ -- Matthias Klose Sat, 02 Sep 2017 13:55:18 +0200 ++ ++gcc-7 (7.2.0-2) unstable; urgency=medium ++ ++ * Update to SVN 20170830 (r251446) from the gcc-7-branch. ++ - Fix PR target/72804 (PPC), PR target/80210 (PPC), PR target/81910 (AVR), ++ PR target/79883 (AVR), PR fortran/81296, PR fortran/80164, ++ PR target/81593 (PPC), PR target/81170 (PPC), PR target/81295 (PPC), ++ PR tree-optimization/81977, PR debug/81993 (closes: #873609), ++ PR middle-end/81088, PR middle-end/81065, PR sanitizer/80932, ++ PR middle-end/81884, PR tree-optimization/81181, ++ PR tree-optimization/81723, PR target/81921 (x86), PR c++/81607. ++ * Update the Linaro support to the 7-2017.08 snapshot. ++ * Restore configuring with --with-mode=thumb on armhf. Closes: #873584. ++ * Default to PIE on powerpc again, now that PR target/81170 and ++ PR target/81295 are fixed. Closes: #856224. ++ ++ -- Matthias Klose Wed, 30 Aug 2017 11:47:42 +0200 ++ ++gcc-7 (7.2.0-1) unstable; urgency=medium ++ ++ * GCC 7.2.0 release. ++ * Update libgcc1 symbols file for s390x. ++ * Apply proposed patch for PR driver/81829. Closes: #853537. ++ ++ -- Matthias Klose Fri, 18 Aug 2017 18:34:45 +0200 ++ ++gcc-7 (7.1.0-13) unstable; urgency=medium ++ ++ * GCC 7.2 release candidate 2. ++ * Don't build the gc enabled libobjc for cross compilers. Closes: #870895. ++ * Configure cross-build-native builds with --program-prefix (Adrian ++ Glaubitz). Closes: #871034. ++ * Update build dependencies for powerpcspe. Closes: #868186. ++ * Fix PR tree-optimization/81723, taken from the trunk. Closes: #853345. ++ ++ -- Matthias Klose Tue, 08 Aug 2017 11:12:56 -0400 ++ ++gcc-7 (7.1.0-12) unstable; urgency=medium ++ ++ * GCC 7.2 release candidate 1. ++ * Update to SVN 20170803 (r250853) from the gcc-7-branch. ++ ++ -- Matthias Klose Thu, 03 Aug 2017 09:20:48 -0400 ++ ++gcc-7 (7.1.0-11) unstable; urgency=medium ++ ++ * Update to SVN 20170731 (r250749) from the gcc-7-branch. ++ ++ [ Matthias Klose ] ++ * Update sanitizer symbols for ppc64 and sparc64. ++ ++ [ Nicolas Boulenguez ] ++ * Only build gnatvsn as a native library. ++ ++ -- Matthias Klose Mon, 24 Jul 2017 13:41:34 +0200 ++ ++gcc-7 (7.1.0-10) unstable; urgency=medium ++ ++ * Update to SVN 20170722 (r250453) from the gcc-7-branch. ++ ++ [ Nicolas Boulenguez ] ++ * libgnatvsn: embed xutil rident for version 2017 of asis package. ++ ++ [ Matthias Klose ] ++ * Fix gnat cross build on m68k (Adrian Glaubitz). Closes: #862927. ++ * Enable gnat cross build on m68k. Closes: #868365. ++ * Update the Linaro support to the 7-2017.07 snapshot. ++ * Stop ignoring symbol mismatches for runtime libraries. ++ ++ [ Aurelien Jarno ] ++ * libgo-s390x-default-isa.diff: do not build libgo with -march=z196, ++ use the default ISA instead. ++ ++ -- Matthias Klose Sat, 22 Jul 2017 15:06:36 +0200 ++ ++gcc-7 (7.1.0-9) unstable; urgency=medium ++ ++ * Update to SVN 20170705 (r250006) from the gcc-7-branch. ++ ++ [ Matthias Klose ] ++ * gcc-linaro-revert-r49596.diff: fix build for the linaro branch. ++ * Don't configure powerpc with --enable-default-pie, fails to build. ++ See #856224, PR target/81295. ++ ++ [ Nicolas Boulenguez ] ++ * ada-gcc-name.diff: unpatch gnatchop. Addresses: #856274. ++ * Link libgnat with libatomic on armel. Closes: #861734. ++ * libgnat-dev: use multiarch paths in project and to install .ali files. ++ * Build Ada on armel, kfreebsd-*, hurd-i386; #86173[457] are closed. ++ ++ -- Matthias Klose Wed, 05 Jul 2017 19:21:55 +0200 ++ ++gcc-7 (7.1.0-8) unstable; urgency=medium ++ ++ * Update to SVN 20170629 (r249793) from the gcc-7-branch. ++ ++ [ Matthias Klose ] ++ * Move the liblto_plugin from the cpp to the gcc package. ++ * libstdc++6: Add more Breaks to smoothen upgrades from jessie to stretch. ++ Addresses: #863845, #863745. ++ * Don't provide libobjc_gc symlinks for the libobjc multilib packages. ++ * Configure with --enable-default-pie on ppc64 (Adrian Glaubitz) and ++ powerpc (Mathieu Malaterre). Addresses: #856224. ++ ++ [ Nicolas Boulenguez ] ++ * Update ada/confirm_debian_bugs.py for gcc-7. ++ * Drop ada-driver-check.diff, the problem is unreproducible. ++ * Stop symlinking gcc-7-7 -> gcc-7. See #856274 and #814977. ++ * gnatmake: compile once even with SOURCE_DATE_EPOCH. Closes: #866029. ++ ++ -- Matthias Klose Thu, 29 Jun 2017 17:36:03 +0200 ++ ++gcc-7 (7.1.0-7) unstable; urgency=medium ++ ++ * Update to SVN 20170618 (r249347) from the gcc-7-branch. ++ ++ [ Matthias Klose ] ++ * Don't build libada with -O3 (ftbfs on ppc64el). ++ * Update sanitizer symbol files (Helmut Grohne). Closes: #864835. ++ ++ [ Aurelien Jarno ] ++ * Remove proposed patch for PR65618, the issue has been fixed upstream ++ another way. ++ ++ [ Nicolas Boulenguez ] ++ * Ada: link system.ads to system-freebsd.ads on hurd and *freebsd ++ system-freebsd-x86.ads does not exist anymore. Closes: #861735, #861737. ++ * Ada: prevent parallel gnatmake invokations for gnattools. Closes: #857831. ++ * Drop generated and obsolete debian/source.lintian-overrides. ++ * Drop debian/relink, never executed and redundant with ada patches. ++ * Ada: Drop dpkg-buildflags usage in patches. Closes: #863289. ++ * ada: Drop references to obsolete termio-h.diff. Closes: #845159. ++ * ada-749574.diff: replace work-around with fix and forward it. ++ * ada-kfreebsd.diff: reduce a lot thanks to Ada2012 syntax. ++ * ada-link-lib.diff: remove dubious parts. ++ ++ -- Matthias Klose Sun, 18 Jun 2017 15:31:39 +0200 ++ ++gcc-7 (7.1.0-6) experimental; urgency=medium ++ ++ * Update to SVN 20170522 (r248347) from the gcc-7-branch. ++ - Fix PR libstdc++/80796, PR libstdc++/80478, PR libstdc++/80761, ++ PR target/80799 (x86), PR ada/80784, PR fortran/78659, PR fortran/80752, ++ PR libgfortran/80727. ++ ++ [ Matthias Klose ] ++ * Re-add unwind support on kfreebsd-amd64 (James Clarke). ++ * Work around #814977 (gnat calling gcc-7-7) by providing a gcc-7-7 ++ symlink. ++ * Fix gnat build dependencies on x32. ++ * Build gnat on mips64 and powerpcspe. ++ * Update the Linaro support to the 7-2017.05 snapshot. ++ * Fix libmpx dependency generation for cross builds. ++ * Build again gnat cross compilers on 32bit archs targeting 64bit targets. ++ ++ [ Nicolas Boulenguez ] ++ * Remove ada-gnattools-noparallel patch, apparently fixed. Closes: #857831. ++ * Reduce diff with upstream in ada-gnattools-cross patch. ++ * debian/rules2: Simplify build flags transmission. ++ * Append build flags from dpkg during Ada target builds. ++ ++ -- Matthias Klose Mon, 22 May 2017 12:43:09 -0700 ++ ++gcc-7 (7.1.0-5) experimental; urgency=medium ++ ++ * Update to SVN 20170514 (r248033) from the gcc-7-branch. ++ * Disable offload compilers for snapshot builds. ++ * Build libgo when not building common libs. ++ * Fix building libgfortran and libgphobos when building without common libs. ++ * Build gnat on x32. ++ ++ -- Matthias Klose Sun, 14 May 2017 08:50:34 -0700 ++ ++gcc-7 (7.1.0-4) experimental; urgency=medium ++ ++ * Update to SVN 20170505 (r247630) from the gcc-7-branch. ++ * Add sh3 support to gcc-multiarch patch. Closes: #861760. ++ * Remove libquadmath/gdtoa license from debian/copyright (files removed). ++ * Fix gdc build on sh4 (sh5 support was removed upstream). ++ * Disable gnat on KFreeBSD (see #861737) and the Hurd (see #861735) for now. ++ * Disable running the testsuite on KFreeBSD and the Hurd, hanging on ++ the buildds. ++ ++ -- Matthias Klose Fri, 05 May 2017 11:27:27 +0200 ++ ++gcc-7 (7.1.0-3) experimental; urgency=medium ++ ++ * Update to SVN 20170503 (r247549) from the gcc-7-branch. ++ * Fix gdc build on sparc. ++ * Update the gdc-cross-install-location patch for GCC 7. ++ * Bump libgphobos soname. ++ * dpkg-buildflags stopped fiddling around with spec files; remove ++ the code removing and warning about dpkg's specs. ++ * Don't build the native gnat on armel. See issue #861734. ++ ++ -- Matthias Klose Wed, 03 May 2017 16:51:15 +0200 ++ ++gcc-7 (7.1.0-2) experimental; urgency=medium ++ ++ * Update the disable-gdc-tests patch for GCC 7.1. ++ ++ -- Matthias Klose Tue, 02 May 2017 18:35:14 +0200 ++ ++gcc-7 (7.1.0-1) experimental; urgency=medium ++ ++ * GCC 7.1.0 release. ++ * Update NEWS.html and NEWS.gcc. ++ * Update gdc to the gdc-7 branch 20170502. ++ * Add multiarch bits for non-glibc architectures (musl, uclibc) (Helmut ++ Grohne). Closes: #861588. ++ * Fix dependency on gcc-base package for rtlibs stage build (Helmut Grohne). ++ Closes: #859938. ++ ++ -- Matthias Klose Tue, 02 May 2017 18:07:07 +0200 ++ ++gcc-7 (7-20170407-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20170407. ++ * Install gcov-dump and gcov-tool manual pages. ++ ++ -- Matthias Klose Fri, 07 Apr 2017 13:16:00 +0200 ++ ++gcc-7 (7-20170316-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20170316. ++ * Install the gcov-dump utility. ++ * Allow to use lld with -fuse-ld=ld.lld. ++ * Build gnattools sequentially (fails with parallel build). See #857831. ++ * Add profile to the autogen build dependency. ++ * Re-add the generated Makefile.in changes to the gdc-libphobos-build patch. ++ ++ -- Matthias Klose Thu, 16 Mar 2017 12:34:18 +0100 ++ ++gcc-7 (7-20170314-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20170314. ++ ++ [ Matthias Klose ] ++ * Bump binutils version requirement to 2.28. ++ * Fix libcc1.so symlink for cross compilers. Addresses: #856875. ++ * Fix base package name for rtlibs stage build (Helmut Grohne). ++ Closes: #857074. ++ * Update the cross-install-location patch (Helmut Grohne). Closes: #855565. ++ * Fix symlinks to man pages in the hppa64 package. Addresses: #857583. ++ * Don't ship the gnatgcc manpage symlink when building GFDL packages. ++ Addresses: #857384. ++ * Allow bootstrapping with libc headers installed in multiarch location. ++ (Helmut Grohne). Closes: #857535 ++ * gccbrig: Depend on hsail-tools. ++ ++ [ Nicolas Boulenguez ] ++ * Create the libgnatsvn packages again. Closes: #857606. ++ * Replace libgnat-BV.overrides with a fixed command. ++ * Install gnatvsn.gpr project into /u/s/gpr instead of ++ /u/s/ada/adainclude. Debian is migrating to GPRbuild's upstream layout. ++ * Avoid hardcoding the version in the ada-gcc-name patch. ++ * Reorganize Ada patches. See #857606 for details. ++ ++ -- Matthias Klose Tue, 14 Mar 2017 10:42:24 +0100 ++ ++gcc-7 (7-20170302-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20170302. ++ ++ [ Matthias Klose ] ++ * Update gdc to trunk 20170227. ++ * Update libcc1 symbols file. ++ * Bump binutils version requirement. ++ * Allow to disable brig in DEB_BUILD_OPTIONS. Closes: #856452. ++ * Build the nvptx offload compilers. ++ * Add the newlib copyright, used for the gcc-7-offload-nvptx package. ++ * Install the libcp1plugin. ++ * Fix the installation directory of the ada-sjlj includes and libraries. ++ ++ [ Nicolas Boulenguez ] ++ * Use SOURCE_DATE_EPOCH for reproducible ALI timestamps. Closes: #856042. ++ * Remove obsolete references to libgnatprj, but keep existing ++ references to libgnatvsn as it will be restored. Closes: #844367. ++ * Drop obsolete and unapplied ada-default-project-path.diff. ++ ++ -- Matthias Klose Thu, 02 Mar 2017 10:12:34 +0100 ++ ++gcc-7 (7-20170226-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20170226. ++ ++ -- Matthias Klose Sun, 26 Feb 2017 17:00:48 +0100 ++ ++gcc-7 (7-20170221-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20170221. ++ * Update gdc to trunk 20170221. ++ ++ [ Matthias Klose ] ++ * Fix some hppa64 related build issues. Addresses: #853023. ++ * Allow setting offload targets by OFFLOAD_TARGET_DEFAULT. ++ * Again, disable go on m68k. Closes: #853906. ++ * Configure with --enable-default-pie on sparc and sparc64 (James Clarke). ++ Addresses: #854090. ++ * Configure with --enable-default-pie on kfreebsd-* (Steven Chamberlain). ++ * Build gccbrig and the libhsail-rt library for i386. ++ * Configure staged builds with --disable-libmpx and --disable-libhsail-rt. ++ * Fix target architecture for sparc non-multilib builds (Adrian Glaubitz). ++ Addresses: #855197. ++ * Bump binutils version requirement. ++ ++ [ Aurelien Jarno ] ++ * Disable lxc1/sxc1 instruction on mips and mipsel. ++ * Disable madd4 instructions on mipsel, mips64el and mipsn32el. ++ ++ -- Matthias Klose Tue, 21 Feb 2017 14:54:12 +0100 ++ ++gcc-7 (7-20170129-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20170129. ++ * Fix removing the RUNPATH from the asan, tsan, ubsan, cilkrts, gfortran ++ and gphobos runtime libraries. ++ * Let the gnatgcc symlinks point to the versioned names. Addresses: #839209. ++ * Build the BRIG frontend on amd64. ++ * Install new intrinsics headers. Closes: #852551. ++ * libgo version bumped to 11. ++ * Package gccbrig and the libhsail-rt library. ++ ++ -- Matthias Klose Sun, 29 Jan 2017 13:51:35 +0100 ++ ++gcc-7 (7-20170121-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20170121. ++ * Configure --with-gcc-major-version-only, drop the gcc-base-version, ++ gccgo-version and gdc-base-version patches. ++ * Adjust the g++-multiarch-incdir patch for reverted upstream patch, ++ causing bootstrap regression (PR 78880). Closes: #852104. ++ ++ -- Matthias Klose Sat, 21 Jan 2017 21:57:22 +0100 ++ ++gcc-7 (7-20170118-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20170118. ++ * Always configure sparc builds --with-cpu-32=ultrasparc (James Clarke). ++ * Enable gccgo on m68k (John Paul Adrian Glaubitz). Addresses: #850749. ++ * Install the unprefixed man pages for gcc-ar, -nm and ranlib. ++ Closes: #851698. ++ ++ -- Matthias Klose Wed, 18 Jan 2017 22:41:11 +0100 ++ ++gcc-7 (7-20161230-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20161230. ++ * Update gdc to trunk 20161229. Closes: #844704. ++ * Build the cilk runtime on armel, armhf, sparc and sparc64. ++ * Use --push-state/--pop-state for gold as well when linking libtsan. ++ * In GCC ICE dumps, prefix each line with the PID of the driver. ++ * Apply proposed patch for PR target/78748. ++ * Apply proposed patch for PR libstdc++/64735. ++ * Don't mark libphobos multilib packages as M-A: same. ++ * Configure libphobos builds with --with-target-system-zlib. ++ * Ignore dpkg's pie specs when pie is not enabled. Addresses: #848129. ++ * Drop m68k specific ada patches. Closes: #846872. ++ ++ -- Matthias Klose Fri, 30 Dec 2016 05:19:15 +0100 ++ ++gcc-7 (7-20161201-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20161201. ++ ++ * Install missing vecintrin.h header on s390x. ++ * Install missing avx512 intrinsics headers on x86*. Closes: #846075. ++ ++ -- Matthias Klose Thu, 01 Dec 2016 14:38:26 +0100 ++ ++gcc-7 (7-20161125-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20161125. ++ ++ [ Matthias Klose ] ++ * Update libgphobos symbol files. ++ * libphobos: Fix ARM32 multilib detection for system zlib. ++ * Update libgphobos symbols files for ARM32 targets. ++ * Build the GC enabled libobjc using the system libgc when available ++ * Mark libgphobos symbols changing with the file location (sic!) as optional. ++ * Add pkg-config to the build dependencies. ++ * Drop the work around for PR libstdc++/65913. ++ * gdc: Link with the shared libgphobos runtime by default. ++ * Fix PR middle-end/78501, proposed patch. ++ * Fix dependency generation for libgphobos multilib builds. ++ * Drop the ada-revert-pr63225 patch, only needed for libgnatvsn. ++ * Always apply the ada patches. ++ ++ [ YunQiang Su ] ++ * Update gnat patches for GCC 7, stop building libgnatvsn and libgnatprj. ++ Addresses: #844367. ++ ++ -- Matthias Klose Fri, 25 Nov 2016 12:41:07 +0100 ++ ++gcc-7 (7-20161116-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20161116. ++ * Build shared phobos runtime libraries (not yet enabled by default). ++ * Add symbols for libobjc_gc library. ++ ++ -- Matthias Klose Wed, 16 Nov 2016 19:16:39 +0100 ++ ++gcc-7 (7-20161115-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20161115. ++ * More symbol files updates. ++ * Update gdc to the trunk 20161113. ++ * Update conflicts with GCC 6 packages. Closes: #844296. ++ ++ -- Matthias Klose Tue, 15 Nov 2016 13:02:02 +0100 ++ ++gcc-7 (7-20161112-1) experimental; urgency=medium ++ ++ * GCC 7 snapshot build, taken from the trunk 20161112. ++ * Remove gij/gcj packages, removed upstream. ++ * Don't build gdc and gnat for now. ++ ++ -- Matthias Klose Sat, 12 Nov 2016 11:17:17 +0100 ++ ++gcc-6 (6.2.0-13) unstable; urgency=medium ++ ++ * Update to SVN 20161109 (r241998, 6.2.1) from the gcc-6-branch. ++ - Fix PR c/71115, PR target/78229 (closes: #843379), ++ PR tree-optimization/77768, PR c++/78039 (closes: #841316), ++ PR libgcc/78064, PR driver/78206. ++ * Fix using the gcc-6-source package (Stephen Kitt). Closes: #843476. ++ * Fix PR target/77822 (AArch64), taken from the trunk. Closes: #839249. ++ * Fix PR target/77822 (s390x), proposed patch. ++ * Update libiberty to the trunk 20161108. Addresses security issues: ++ CVE-2016-6131, CVE-2016-4493, CVE-2016-4492, CVE-2016-4490, ++ CVE-2016-4489, CVE-2016-4488, CVE-2016-4487, CVE-2016-2226. ++ ++ -- Matthias Klose Wed, 09 Nov 2016 20:42:53 +0100 ++ ++gcc-6 (6.2.0-11) unstable; urgency=medium ++ ++ * Update to SVN 20161103 (r241817, 6.2.1) from the gcc-6-branch. ++ - Fix PR debug/77773, PR middle-end/72747, PR tree-optimization/78047, ++ PR tree-optimization/77879, PR tree-optimization/77839, ++ PR tree-optimization/77745, PR tree-optimization/77648, ++ PR target/78166 (PA), PR rtl-optimization/78038, PR middle-end/78128, ++ PR middle-end/71002, PR fortran/69544, PR fortran/78178, ++ PR fortran/71902, PR fortran/67219, PR fortran/71891, PR lto/78129, ++ PR libgfortran/78123. ++ * Fix symlinks for gcj manual pages. Closes: #842407. ++ * Fix ICE in tree_to_shwi, Linaro issue #2575. ++ ++ -- Matthias Klose Thu, 03 Nov 2016 14:10:24 +0100 ++ ++gcc-6 (6.2.0-10) unstable; urgency=medium ++ ++ * Update to SVN 20161027 (r241619, 6.2.1) from the gcc-6-branch. ++ - Fix PR libstdc++/77288, PR libstdc++/77727, PR libstdc++/78052, ++ PR tree-optimization/77550, PR tree-optimization/77916, ++ PR fortran/71895, PR fortran/77763, PR fortran/61420, PR fortran/78013, ++ PR fortran/78021, PR fortran/72832, PR fortran/78092, PR fortran/78108, ++ PR target/78057 (x86), PR target/78037 (x86). ++ * Include go-relocation-test-gcc620-sparc64.obj.uue to fix libgo's ++ debug/elf TestDWARFRelocations test case (James Clarke). ++ * Reapply fix for PR c++/71912, apply proposed fix for PR c++/78039. ++ Closes: #841292. ++ * Don't install alternatives for go and gofmt. The preferred way to do that ++ is to install the golang-any package. ++ * For Debian builds, don't enable bind now by default when linking with pie ++ by default. ++ ++ -- Matthias Klose Thu, 27 Oct 2016 15:27:07 +0200 ++ ++gcc-6 (6.2.0-9) unstable; urgency=medium ++ ++ * Regenerate the control file. ++ ++ -- Matthias Klose Thu, 20 Oct 2016 10:46:44 +0200 ++ ++gcc-6 (6.2.0-8) unstable; urgency=medium ++ ++ * Update to SVN 20161019 (r241346, 6.2.1) from the gcc-6-branch. ++ - Fix PR libstdc++/77990, PR target/77991 (x86). ++ * Install arm_fp16.h header on arm* architectures for Linaro builds. ++ * Backport upstream revisions from trunk (James Clarke). Closes: #840574. ++ - r240457 (add getrandom for MIPS/SPARC) ++ - r241051 (fix getrandom on sparc64 and clone on sparc*) ++ - r241072 (make rawClone no_split_stack) ++ - r241084 (don't use pt_regs; unnecessary, and seemingly not defined by ++ the included headers on arm64) ++ - r241171 (sparc64 relocations, e1fc2925 in go master, now also in ++ gofrontend/gccgo) ++ * Revert fix for PR c++/71912, causing PR c++/78039. Addresses: #841292. ++ ++ -- Matthias Klose Wed, 19 Oct 2016 08:57:23 +0200 ++ ++gcc-6 (6.2.0-7) unstable; urgency=medium ++ ++ * Update to SVN 20161018 (r241301, 6.2.1) from the gcc-6-branch. ++ - Fix PR libstdc++/77987, PR libstdc++/77322, PR libstdc++/72820, ++ PR libstdc++/77994, PR tree-optimization/77937, PR c++/71912, ++ PR tree-optimization/77937, PR tree-optimization/77943, ++ PR bootstrap/77995, PR fortran/77978, PR fortran/77915, PR fortran/77942. ++ ++ [ Matthias Klose ] ++ * Backport Mips go closure support, taken from libffi. Closes: #839132. ++ * Configure with --enable-default-pie and pass -z now when pie is enabled; ++ on amd64 arm64 armel armhf i386 mips mipsel mips64el ppc64el s390x. ++ Closes: #835148. ++ * Update the Linaro support to the 6-2016.10 snapshot. ++ ++ [ Aurelien Jarno ] ++ * Enable logwatch on mips64el. ++ ++ -- Matthias Klose Tue, 18 Oct 2016 13:53:00 +0200 ++ ++gcc-6 (6.2.0-6) unstable; urgency=medium ++ ++ * Update to SVN 20161010 (r240906, 6.2.1) from the gcc-6-branch. ++ - Fix PR libstdc++/68323, PR libstdc++/77794, PR libstdc++/77795, ++ PR libstdc++/77801, PR libgcc/77519, PR target/77756 (x86), ++ PR target/77670 (PPC), PR rtl-optimization/71709, PR c++/77804, ++ PR fortran/41922, PR fortran/60774, PR fortran/61318, PR fortran/68566, ++ PR fortran/69514, PR fortran/69867, PR fortran/69962, PR fortran/70006, ++ PR fortran/71067, PR fortran/71730, PR fortran/71799, PR fortran/71859, ++ PR fortran/71862, PR fortran/77260, PR fortran/77351, PR fortran/77372, ++ PR fortran/77380, PR fortran/77391, PR fortran/77420, PR fortran/77429, ++ PR fortran/77460, PR fortran/77506, PR fortran/77507, PR fortran/77612, ++ PR fortran/77694, PR libgfortran/77707, PR libstdc++/70101, ++ PR libstdc++/77864, PR libstdc++/70564, PR target/77874 (x86), ++ PR target/77759 (sparc), PR fortran/77406, PR fortran/58991, ++ PR fortran/58992. ++ * Really fix gij installation on hppa. Closes: #838111. ++ * Install alternatives for go and gofmt. Closes: #840190. ++ ++ -- Matthias Klose Mon, 10 Oct 2016 05:20:07 +0200 ++ ++gcc-6 (6.2.0-5) unstable; urgency=medium ++ ++ * Update to SVN 20160927 (r240553, 6.2.1) from the gcc-6-branch. ++ - Fix PR sanitizer/77396, PR libstdc++/77645, PR libstdc++/77645, ++ PR target/77326 (AVR), PR target/77349 (PPC), PR middle-end/77594, ++ PR sanitizer/68260, PR fortran/77516, PR target/69255 (x86), ++ PR c++/77553, PR c++/77539, PR fortran/77500, PR c/77450, ++ PR middle-end/77436, PR tree-optimization/77514, PR middle-end/77544, ++ PR tree-optimization/77514, PR middle-end/77605, PR middle-end/77679, ++ PR tree-optimization/77621, PR target/77621 (x86), PR c++/71979. ++ * Fix gij installation on hppa. Closes: #838111. ++ * Fix PR rtl-optimization/71709, taken from the trunk. LP: #1628207. ++ * Apply workaround for PR libstdc++/77686. Addresses: #838438. ++ ++ -- Matthias Klose Wed, 28 Sep 2016 15:53:28 +0200 ++ ++gcc-6 (6.2.0-4) unstable; urgency=medium ++ ++ * Update to SVN 20160914 (r240133, 6.2.1) from the gcc-6-branch. ++ - Fix PR rtl-optimization/77452, PR c++/77427. ++ * gcj: Depend on the ecj1 standalone binary. ++ * Configure native builds using --with-program-prefix. ++ * Fix ICE in gdc symbol mangling (Iain Buclaw). LP: #1620681. ++ * Backport from libffi trunk (Stefan Bühler): ++ - Always check for PaX MPROTECT on linux, make EMUTRAMP experimental. ++ - dlmmap_locked always needs locking as it always modifies execsize. ++ ++ -- Matthias Klose Thu, 15 Sep 2016 19:22:35 +0200 ++ ++gcc-6 (6.2.0-3) unstable; urgency=medium ++ ++ * Update to SVN 20160901 (r239944, 6.2.1) from the gcc-6-branch. ++ - Fix PR fortran/71014, PR libstdc++/77395, PR tree-optimization/72866, ++ PR debug/77363, PR middle-end/77377, PR middle-end/77259, ++ PR target/71910 (cygwin), PR target/77281 (ARM), ++ PR tree-optimization/71077, PR tree-optimization/68542, PR fortran/77352, ++ PR fortran/77374, PR fortran/71014, PR fortran/69281. ++ * Fix setting the stage1 C++ compiler. ++ * gdc: Always link with -ldl when linking with -lgphobos. ++ Closes: #835255, #835757. ++ * Fix building D code with external C++ references. ++ ++ -- Matthias Klose Sun, 04 Sep 2016 12:38:47 +0200 ++ ++gcc-6 (6.2.0-2) unstable; urgency=medium ++ ++ * Update to SVN 20160830 (r239868, 6.2.1) from the gcc-6-branch. ++ - Fix PR libstdc++/77334, PR tree-optimization/76783, ++ PR tree-optimization/72851, PR target/72867 (x86), PR middle-end/71700, ++ PR target/77403 (x86), PR target/77270 (x86), PR target/77270 (x86), ++ PR lto/70955, PR target/72863 (PPC), PR tree-optimization/76490, ++ PR fortran/77358. ++ * Call default_file_start from s390_asm_file_start, taken from the trunk. ++ * Update multiarch patches for mips* r6 (YunQiang Su). ++ * Fix install location of D header files for cross builds (YunQiang Su). ++ Closes: #835847. ++ * Fix PR c++/77379, taken from the trunk. ++ * Update the Linaro support to the 6-2016.08 snapshot. ++ ++ -- Matthias Klose Wed, 31 Aug 2016 12:28:38 +0200 ++ ++gcc-6 (6.2.0-1) unstable; urgency=medium ++ ++ * GCC 6.2 release. ++ * Update gdc to the gdc-6 branch 20160822. ++ ++ -- Matthias Klose Mon, 22 Aug 2016 14:15:21 +0200 ++ ++gcc-6 (6.1.1-12) unstable; urgency=medium ++ ++ * GCC 6.2 release candidate 1. ++ * Update to SVN 20160815 (r239482, 6.1.1) from the gcc-6-branch. ++ Fix PR target/71869 (PPC), PR target/72805 (x86), PR target/70677 (AVR), ++ PR c++/72415, PR sanitizer/71042, PR libstdc++/71964, PR libstdc++/70940, ++ PR c/67410, PR c/72816, PR driver/72765, PR debug/71906, ++ PR tree-optimization/73434, PR tree-optimization/72824, PR target/76342, ++ PR target/72843, PR c/71512, PR tree-optimization/71083, PR target/72819, ++ PR target/72853, PR tree-optimization/72824, PR ipa/71981, PR ipa/68273, ++ PR tree-optimization/71881, PR target/72802, PR target/72802, ++ PR rtl-optimization/71976, PR c++/71972, PR c++/72868, PR c++/73456, ++ PR c++/72800, PR c++/68724, PR debug/71906, PR fortran/71936, ++ PR fortran/72698, PR fortran/70524, PR fortran/71795, PR libgfortran/71123, ++ PR libgfortran/73142. ++ ++ [ Matthias Klose ] ++ * Fix running the libjava testsuite. ++ * Revert fix for PR target/55947, causing PR libstdc++/72813. LP: #1610220. ++ * Update the Linaro support to the 6-2016.07 snapshot. ++ ++ [ Aurelien Jarno ] ++ * Replace proposed fix for PR ipa/68273 by the corresponding patch taken ++ from trunk. ++ ++ -- Matthias Klose Mon, 15 Aug 2016 17:51:10 +0200 ++ ++gcc-6 (6.1.1-11) unstable; urgency=medium ++ ++ * Update to SVN 20160802 (r238981, 6.1.1) from the gcc-6-branch. ++ - Fix PR target/72767 (AVR), PR target/71151 (AVR), PR c/7652, ++ PR target/71216 (PPC), PR target/72103 (PPC), PR c++/72457, PR c++/71576, ++ PR c++/71833, PR fortran/71883. ++ ++ [ Nicolas Boulenguez ] ++ * debian/ada/confirm_debian_bugs.py: Update for GCC 6. Closes: #832799. ++ ++ [ Matthias Klose ] ++ * Backport AArch64 Vulcan cost models (Dann Frazier). LP: #1603587. ++ ++ -- Matthias Klose Wed, 03 Aug 2016 21:53:37 +0200 ++ ++gcc-6 (6.1.1-10) unstable; urgency=medium ++ ++ * Update to SVN 20160724 (r238695, 6.1.1) from the gcc-6-branch. ++ - Fix PR libstdc++/71856, PR libstdc++/71320, PR c++/71214, ++ PR sanitizer/71953, PR fortran/71688, PR rtl-optimization/71916, ++ PR debug/71855, PR middle-end/71874, PR target/71493 (PPC), ++ PR rtl-optimization/71634, PR target/71733 (PPC), PR ipa/71624, ++ PR target/71805 (PPC), PR target/70098 (PPC), PR target/71763 (PPC), ++ PR middle-end/71758, PR tree-optimization/71823, PR middle-end/71606, ++ PR tree-optimization/71518, PR target/71806 (PPC), PR target/71720 (PPC), ++ PR middle-end/64516, PR tree-optimization/71264, PR middle-end/71423, ++ PR tree-optimization/71521, PR tree-optimization/71452, PR target/50739, ++ PR tree-optimization/71522, PR c++/55922, PR c++/63151, PR c++/70709, ++ PR c++/70778, PR c++/71738, PR c++/71350, PR c++/71748, PR c++/52746, ++ PR c++/69223, PR c++/71630, PR c++/71913, PR c++/71728, PR c++/71941, ++ PR c++/70822, PR c++/70106, PR c++/67565, PR c++/67579, PR c++/71843, ++ PR c++/70781, PR c++/71896, PR c++/71092, PR c++/71117, PR c++/71495, ++ PR c++/71511, PR c++/71513, PR c++/71604, PR c++/54430, PR c++/71711, ++ PR c++/71814, PR c++/71718, PR c++/70824, PR c++/71909, PR c++/71835, ++ PR c++/71828, PR c++/71822, PR c++/71871, PR c++/70869, PR c++/71054, ++ PR fortran/71807, PR fortran/70842, PR fortran/71764, PR fortran/71623, ++ PR fortran/71783. ++ ++ [ Matthias Klose ] ++ * Build-depend on gnat-6 instead of gnat-5 on development distros. ++ ++ [ Aurelien Jarno ] ++ * Replace libjava-mips64el-proposed.diff by the corresponding patch ++ taken from trunk. ++ ++ -- Matthias Klose Sun, 24 Jul 2016 19:42:10 +0200 ++ ++gcc-6 (6.1.1-9) unstable; urgency=medium ++ ++ * Update to SVN 20160705 (r237999, 6.1.1) from the gcc-6-branch. ++ - Fix PR fortran/71717, PR libstdc++/71313, PR c/71685, PR c++/71739, ++ PR target/71670 (PPC), PR middle-end/71626, PR target/71559 (x86), ++ PR target/71656 (PPC), PR target/71698 (PPC), PR driver/71651, ++ PR fortran/71687, PR fortran/71704, PR fortran/71705. ++ * Mark cross compilers as M-A: foreign. Addresses: #827136. ++ * On sparc64, configure with --with-cpu-32=ultrasparc, drop the ++ sparc-force-cpu patch. Closes: #809509. ++ ++ -- Matthias Klose Tue, 05 Jul 2016 11:19:50 +0200 ++ ++gcc-6 (6.1.1-8) unstable; urgency=medium ++ ++ * Update to SVN 20160630 (r237878, 6.1.1) from the gcc-6-branch. ++ - Fix PR tree-optimization/71647, PR target/30417 (AVR), ++ PR target/71103 (AVR), PR tree-optimization/71588, PR middle-end/71581, ++ PR c++/71528, PR fortran/70673, PR middle-end/71693. ++ ++ [ Aurelien Jarno ] ++ * Apply proposed patch from Matthew Fortune to fix libjava on mips64el. ++ ++ [ Matthias Klose ] ++ * Add AArch64 Vulcan cpu support (Dann Frazier). LP: #1594452. ++ * gfortran: Suggest libcoarrays-dev. Closes: #827995. ++ * cpp: Breaks libmagics++-dev (<< 2.28.0-4). Closes: #825278. ++ * Optimize for mips32r2 for o32 (YunQiang Su). Closes: #827801. ++ ++ -- Matthias Klose Thu, 30 Jun 2016 14:12:55 +0200 ++ ++gcc-6 (6.1.1-7) unstable; urgency=medium ++ ++ * Update to SVN 20160620 (r237590, 6.1.1) from the gcc-6-branch. ++ - Fix PR middle-end/71373, PR c/71381, PR libstdc++/71545, PR c/68657, ++ PR sanitizer/71498, PR middle-end/71529, PR target/71103 (AVR), ++ PR target/71554 (x86), PR middle-end/71494, PR c++/71448, ++ PR tree-optimization/71405, PR tree-optimization/71505, ++ PR target/71379 (s390), PR target/71186 (PPC), PR target/70915 (PPC), ++ PR c++/70572, PR c++/71516, PR c/71381. ++ * Fix libgnatprj build to avoid undefined symbols (YunQiang Su). ++ Closes: #826503. ++ * Add build support for tilegx (Helmut Grohne). Closes: #827578. ++ * Drop support for loongson 2f (YunQiang Su). Closes: #827554. ++ ++ -- Matthias Klose Mon, 20 Jun 2016 13:41:44 +0200 ++ ++gcc-6 (6.1.1-6) unstable; urgency=medium ++ ++ * Update to SVN 20160609 (r237267, 6.1.1) from the gcc-6-branch. ++ - Fix PR target/71389 (x86), PR tree-optimization/71259, ++ PR target/70830 (ARM), PR target/67310 (x86), PR c++/71442, ++ PR c++/70847, PR c++/71330, PR c++/71393, PR fortran/69659. ++ * gdc: Fix linking the runtime library. Addresses: #826645. ++ * Fix building libgnatprj on powerpc, and on PIE enabled builds (YunQiang Su). ++ Closes: #826365. ++ ++ -- Matthias Klose Thu, 09 Jun 2016 18:19:42 +0200 ++ ++gcc-6 (6.1.1-5) unstable; urgency=medium ++ ++ * Update to SVN 20160603 (r237075, 6.1.1) from the gcc-6-branch. ++ - Fix PR libstdc++/70762, PR libstdc++/69703, PR libstdc++/69703, ++ PR libstdc++/71038, PR libstdc++/71036, PR libstdc++/71037, ++ PR libstdc++/71005, PR libstdc++/71004, PR libstdc++/70609, PR c/71171, ++ PR middle-end/71279, PR c++/71147, PR c++/71257, ++ PR tree-optimization/70884, PR c++/71210, PR tree-optimization/71031, ++ PR c++/69872, PR c++/71257, PR c++/70344, PR c++/71184, PR fortran/66461, ++ PR fortran/71204, PR libffi/65567, PR c++/71349, PR target/71201, ++ PR middle-end/71371, PR debug/71057, PR target/71056 (ARM32), ++ PR tree-optimization/69068, PR middle-end/71002, PR bootstrap/71071, ++ PR c++/71372, PR c++/70972, PR c++/71166, PR c++/71227, PR c++/60095, ++ PR c++/69515, PR c++/69009, PR c++/71173, PR c++/70522, PR c++/70584, ++ PR c++/70735, PR c++/71306, PR c++/71349, PR c++/71105, PR c++/71147, ++ PR ada/71358, PR ada/71317, PR fortran/71156, PR middle-end/71387. ++ * Fix cross building libgnatprj on i386 targeting 64bit archs (YunQiang Su). ++ Closes: #823126. ++ * Detect hard float for non-linux or non-glibc arm-*-*eabihf builds (Helmut ++ Grohne). Closes: #823894. ++ * Update embedded timestamp setting patch, backported from the trunk. ++ * gccgo: Combine combine gccgo's ld() and ldShared() methods ++ in cmd/go (Michael Hudson-Doyle). LP: #1586872. ++ ++ -- Matthias Klose Fri, 03 Jun 2016 18:58:40 +0200 ++ ++gcc-6 (6.1.1-4) unstable; urgency=medium ++ ++ * Update to SVN 20160519 (r236478, 6.1.1) from the gcc-6-branch. ++ - Fix PR sanitizer/71160, PR c++/70498, PR target/71161 (x86), ++ PR fortran/70856, PR c++/71100, PR target/71145 (alpha), PR c++/70466, ++ PR target/70860 (nvptx), PR target/70809 (AArch64), PR hsa/70857, ++ PR driver/68463, PR target/70947 (PPC), PR ipa/70760, PR middle-end/70931, ++ PR middle-end/70941, PR tree-optimization/71006, PR target/70830 (ARM), ++ PR fortran/69603, PR fortran/71047, PR fortran/56226, PR ipa/70646. ++ * libgnat{prj,svn}-dev: Don't recommend gnat when building cross compiler ++ packages. ++ ++ -- Matthias Klose Thu, 19 May 2016 18:40:49 +0200 ++ ++gcc-6 (6.1.1-3) unstable; urgency=medium ++ ++ * Update to SVN 20160511 (r236071, 6.1.1) from the gcc-6-branch. ++ - Fix PR libstdc++/71049, PR middle-end/70877, PR tree-optimization/70876, ++ PR target/70963, PR tree-optimization/70916, PR debug/70935. ++ * Enable gdc for sh4. ++ ++ -- Matthias Klose Wed, 11 May 2016 22:35:33 +0200 ++ ++gcc-6 (6.1.1-2) unstable; urgency=medium ++ ++ * Update to SVN 20160510 (r236071, 6.1.1) from the gcc-6-branch. ++ - Fix PR tree-optimization/70956, PR sanitizer/70875, PR sanitizer/70342, ++ PR ada/70969, PR ada/70900. ++ ++ [ Matthias Klose ] ++ * Call dh_makeshlibs with the --noscripts option when building a ++ cross compiler. ++ * Fix building cross gnat libs when not building the common libs. ++ * Fix building cross mips* multilibs when not building the common libs. ++ * Re-enable gnat build on some architectures for snapshot builds. ++ * Don't build gnat cross compilers on 32bit archs targeting 64bit targets. ++ Addresses: #823126. ++ * Avoid empty architecture lists in build dependencies. Closes: #823280. ++ * Tighten debhelper build dependency for cross build dependencies. ++ * Allow build dependencies for musl configurations (Helmut Grohne). ++ Closes: #823769. ++ * Fix dependency resolution for libraries not built anymore from ++ this source package. ++ ++ [ Samuel Thibault ] ++ * patches/ada-hurd.diff: Fix Get_Page_Size type. ++ ++ -- Matthias Klose Tue, 10 May 2016 13:34:49 +0200 ++ ++gcc-6 (6.1.1-1) unstable; urgency=medium ++ ++ * GCC 6.1.0 release. ++ - Fix PR bootstrap/70704, PR tree-optimization/70780, PR libgfortran/70684, ++ PR middle-end/70626, PR java/70839, PR target/70858, PR ada/70759, ++ PR ada/70786, PR c++/70540, PR middle-end/70626. ++ * Update to SVN 20160430 (r235678, 6.1.1) from the gcc-6-branch. ++ - Fix PR middle-end/70680, PR target/70750 (x86), PR ipa/70785, ++ PR sanitizer/70712, PR target/70728 (x86). ++ - Don't encode the minor version in the gcj abi version. ++ ++ [ Aurelien Jarno ] ++ * Apply proposed patch for PR target/68273 (Wrong code on mips/mipsel due to ++ (invalid?) peeking at alignments in function_arg) on mips and mipsel. ++ ++ [ Matthias Klose ] ++ * Always configure with --enable-targets=powerpcle-linux on ppc64el. ++ * Stop building libcc1 and libgccjit0, when not building common libs. ++ * Rename libgccjit-5-dbg to libgccjit0-dbg. ++ * Fix libjava testsuite with dejagnu 1.6, taken from the trunk. ++ * Allow embedded timestamps by C/C++ macros to be set externally (Eduard ++ Sanou). ++ * Add missing libstdc++ symbol to symbols file. ++ * libstdc++-doc: Ignore warnings about formulas and long identifiers in ++ man pages. ++ * Default the 32bit x86 architectures to i686, keep i585 symlinks. ++ See https://lists.debian.org/debian-devel/2015/09/msg00589.html ++ * Build-depend on debhelper (>= 9) and dpkg-dev (>= 1.17.14). ++ * Update gdc to the gdc-6 branch 20160430. ++ ++ -- Matthias Klose Sat, 30 Apr 2016 13:31:12 +0200 ++ ++gcc-6 (6.0.1-2) unstable; urgency=medium ++ ++ * GCC 6.1 release candidate 2. ++ - Fix PR c++/68206, PR c++/70522, PR middle-end/70747, PR target/64971, ++ PR c++/66543, PR tree-optimization/70725, PR tree-optimization/70726, ++ PR target/70674 (s390x), PR tree-optimization/70724, PR c++/70690, ++ PR c++/70505, PR target/70711 (ARM32), PR c++/70685, ++ PR target/70662 (x86). ++ * Update gdc to the trunk 20160423. ++ ++ -- Matthias Klose Sat, 23 Apr 2016 17:56:52 +0200 ++ ++gcc-6 (6.0.1-1) experimental; urgency=medium ++ ++ * GCC 6.1 release candidate 1. ++ ++ [ Michael Hudson-Doyle ] ++ * cmd/go: deduplicate gccgo afiles by package path, not *Package. ++ LP: #1566552. ++ ++ -- Matthias Klose Fri, 15 Apr 2016 18:32:25 +0200 ++ ++gcc-6 (6-20160405-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160405. ++ ++ -- Matthias Klose Tue, 05 Apr 2016 16:39:49 +0200 ++ ++gcc-6 (6-20160319-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160319. ++ * Stop providing alternative for /usr/bin/go. (Michael Hudson-Doyle). ++ LP: #1555856. ++ * Disable gnat on powerpcspe. Closes: #816051. ++ ++ -- Matthias Klose Sat, 19 Mar 2016 11:54:57 +0100 ++ ++gcc-6 (6-20160312-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160312. ++ * Update gdc to the trunk 20160306. ++ * Remove powerpcspe specific patch, integrated upstream. Addresses: #816048. ++ * When configured to link with --as-needed by default, always link the ++ sanitizer libraries with --no-as-needed. ++ ++ -- Matthias Klose Sat, 12 Mar 2016 10:21:28 +0100 ++ ++gcc-6 (6-20160228-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160228. ++ ++ [ Matthias Klose ] ++ * libgo: Port syscall.SetsockoptUcred from golang (Michael Vogt). ++ ++ [ Svante Signell ] ++ * patches/ada-hurd.diff: Update. ++ ++ -- Matthias Klose Sun, 28 Feb 2016 13:28:41 +0100 ++ ++gcc-6 (6-20160225-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160225. ++ * Update gdc to the trunk 20160224. ++ * Install missing architecture specific plugin header files. ++ * Fix PR target/69885, bootstrap error on m68k. ++ ++ -- Matthias Klose Thu, 25 Feb 2016 02:00:57 +0100 ++ ++gcc-6 (6-20160220-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160220. ++ - Fix PR tree-optimization/68021. Closes: #812245. ++ - Fix PR ipa/69241. Closes: #812060. ++ - Fix PR libstdc++/56158. Closes: #789369. ++ * Update symbols files. ++ * libgccjit-6-doc: Really conflict with libgccjit-5-doc. Closes: #814527. ++ * Update conflict for gnat cross build packages. Closes: #810809. ++ * Disable the m68k gnat build, currently fails. See: #814221. ++ * Fix running the acats tests (Svante Signell): Addresses part of #814978. ++ ++ -- Matthias Klose Sat, 20 Feb 2016 16:58:47 +0100 ++ ++gcc-6 (6-20160205-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160205. ++ - Fix PR tree-optimization/69320. Closes: #811921. ++ - Fix PR c++/68782. Closes: #812287. ++ - Fix PR tree-optimization/69328. Closes: #812247. ++ - Fix PR target/69421. Closes: #812246. ++ - Fix PR c++/69379. Closes: #812068. ++ - Fix PR lto/69393. Closes: #812062. ++ - Fix PR tree-optimization/69166. Closes: #812061. ++ * Update gdc to the trunk 20160205. ++ - Fix data corruption bug when passing around longdoubles. ++ Closes: #812080. ++ * Add more conflicts to GCC 5's debug and doc packages. Closes: #813081. ++ * Fix dependency generation for armel/armhf multilib cross targets. ++ * Fix libc dependency generation for multilib cross targets. ++ * Build libitm on alpha, s390x, sh4, sparc64. ++ ++ -- Matthias Klose Fri, 05 Feb 2016 18:08:37 +0100 ++ ++gcc-6 (6-20160122-1) experimental; urgency=medium ++ ++ * Fix gnat build failure on KFreeBSD (Steven Chamberlain). Closes: #811372. ++ * Fix dependencies on target libraries which are not built anymore ++ from this source. ++ * Bump libmpx soname. Closes: #812084. ++ * Apply proposed patch for PR target/69129. Closes: #810081. ++ * Apply proposed patch for PR go/66904, pass linker flags from ++ "#cgo pkg-config:" directives (Michael Hudson). ++ * Configure with --enable-fix-cortex-a53-843419 on AArch64. ++ ++ -- Matthias Klose Fri, 22 Jan 2016 13:33:19 +0100 ++ ++gcc-6 (6-20160117-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160117. ++ * Update gdc to the trunk 20160115. ++ * Update libgnatvsn/libgnatprj conflicts. Closes: #810809. ++ * Fix gnat build failures on the Hurd and KFreeBSD (Svante Signell). ++ Closes: #811063. ++ * Build libstdc++-6-doc with a fixed doxygen. Closes: #810717. ++ ++ -- Matthias Klose Sun, 17 Jan 2016 12:14:39 +0100 ++ ++gcc-6 (6-20160109-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160109. ++ * Install new header file pkuintrin.h. Closes: #809807. ++ * Fix libcc1-0 dependency for cross compilers. ++ ++ -- Matthias Klose Sat, 09 Jan 2016 11:49:50 +0100 ++ ++gcc-6 (6-20160103-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160101. ++ ++ -- Matthias Klose Sun, 03 Jan 2016 12:47:13 +0100 ++ ++gcc-6 (6-20160101-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20160101. ++ * Build native gnat on sh4. Addresses: #809498. ++ ++ -- Matthias Klose Fri, 01 Jan 2016 21:18:38 +0100 ++ ++gcc-6 (6-20151220-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20151220. ++ * Update libstdc++-dbg conflicts. Closes: #807885. ++ * Set target tools and build dependencies for cross builds. ++ * Relax gcj-6-{jre,jre-headless,jdk} dependencies on libgcj16. ++ * Fix cross build issues. ++ ++ -- Matthias Klose Sun, 20 Dec 2015 13:46:12 +0100 ++ ++gcc-6 (6-20151213-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20151213. ++ * Update the ada-kfreebsd and ada-m68k patches. ++ * Fix cross-building without having the common cross libraries installed. ++ * Allow unstripped, non-optimized debug builds with setting DEB_BUILD_OPTIONS ++ including gccdebug. ++ * Remove obsolete libgccmath packaging support. ++ * Define SONAME macros whether the libraries are built or not. ++ ++ -- Matthias Klose Sun, 13 Dec 2015 16:04:56 +0100 ++ ++gcc-6 (6-20151211-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from the trunk 20151211. ++ * Update gnat and gdc patches, re-enable gnat and gdc. ++ ++ -- Matthias Klose Fri, 11 Dec 2015 12:35:03 +0100 ++ ++gcc-6 (6-20151210-1) experimental; urgency=medium ++ ++ * GCC 6 snapshot build, taken from 20151210. ++ ++ -- Matthias Klose Thu, 10 Dec 2015 22:09:13 +0100 ++ ++gcc-5 (5.3.1-3) unstable; urgency=medium ++ ++ * Update to SVN 20151207 (r231361, 5.3.1) from the gcc-5-branch. ++ * Remove upstreamed chunks from the ada-kfreebsd patch. ++ ++ -- Matthias Klose Tue, 08 Dec 2015 02:10:51 +0100 ++ ++gcc-5 (5.3.1-2) unstable; urgency=medium ++ ++ * Update to SVN 20151206 (r231339, 5.3.1) from the gcc-5-branch. ++ * Re-enable building gdc/libphobos, fixing the profiled build. ++ * Fix PR sanitizer/67899, build failure on sparc/sparc64. ++ ++ -- Matthias Klose Sun, 06 Dec 2015 19:15:46 +0100 ++ ++gcc-5 (5.3.1-1) unstable; urgency=medium ++ ++ * Update to SVN 20151205 (r231314, 5.3.1) from the gcc-5-branch. ++ ++ -- Matthias Klose Sat, 05 Dec 2015 20:45:53 +0100 ++ ++gcc-5 (5.3.0-3) unstable; urgency=medium ++ ++ * Update libgcc symbols file. ++ * Restore libgcc.symbols.aebi. ++ * Disabled profiled bootstraps for backports. ++ ++ -- Matthias Klose Sat, 05 Dec 2015 07:50:48 +0100 ++ ++gcc-5 (5.3.0-1) experimental; urgency=medium ++ ++ * GCC 5.3 release. ++ - Fix PR libstdc++/65142 (CVE-2015-5276). ++ * Update gdc to the gcc-5 branch 20151130. ++ * Enable the profiled bootstrap on amd64, arm64, armel armhf, i386, powerpc, ++ ppc64, ppc64el, s390x, x32 (excluding builds from the Linaro branch). ++ * Move test summary into the gcc-test-results package. ++ * Simplify libatomic, libcilkrts, libgcc, libgfortran, libgomp, libitm, ++ libmpx, libquadmath symbols files using versioned symbol references. ++ Closes: #806784. ++ * Only build the hppa64 cross compiler when either building the native compiler, ++ or when cross building the native compiler. Closes: #806479. ++ * Configure staged build with --enable-linker-build-id. ++ ++ -- Matthias Klose Fri, 04 Dec 2015 12:01:04 +0100 ++ ++gcc-5 (5.2.1-27) unstable; urgency=medium ++ ++ * Update to SVN 20151129 (r231053, 5.2.1) from the gcc-5-branch. ++ * Don't strip cc1plus when shipping with unstripped frontends. ++ * Relax libgnatvsn5-dev-*-cross and libgnatprj5-dev-*-cross dependencies ++ on gnat-5-*-linux-gnu. ++ * Fix setting the explicit libc dependency for cross builds. ++ * Don't build m4-nofpu multilibs on sh4, install the default multilib ++ into the standard location. ++ * Stop building gnat on mips64, see https://gcc.gnu.org/PR65337 (#806370). ++ * Update the patch for PR go/67508 and re-enable Go on sparc and sparc64. ++ * Fix gnat sparc/sparc64 architecture detection. ++ * Update libgcc and libstdc++ symbols files. ++ * Don't ship the gcov tools in the gcc-hppa64-linux-gnu package. ++ * Run the autoconf generation in parallel. ++ * Add --enable-default-pie option to GCC configure, taken from the trunk. ++ * Enable gnat for m68k cross builds. ++ * Link gnat tools, gnat libs and libgccjit with the defaults LDFLAGS. ++ * Skip non-default multilib and libstdc++-v3 debug builds in bootstrap builds. ++ * Ship an empty debian/rules.parameters in the gcc-5-source package. ++ ++ -- Matthias Klose Sun, 29 Nov 2015 23:48:58 +0100 ++ ++gcc-5 (5.2.1-26) unstable; urgency=medium ++ ++ * Update to SVN 20151125 (r230897, 5.2.1) from the gcc-5-branch. ++ * Fix the rtlibs stage build. Closes: #806186. ++ * Fix packaging the cross libphobos package. ++ * Build the hppa64 cross compiler on x86 architectures. ++ * gcc-5-hppa64-linux-gnu: Stop providing unversioned tools using ++ alternatives. Build a gcc-hppa64-linux-gnu package instead. ++ * Split out a gcc-5-test-results package from g++-5, allowing a post ++ build analysis, and reducing the size of the g++-5 package. ++ ++ -- Matthias Klose Wed, 25 Nov 2015 20:33:08 +0100 ++ ++gcc-5 (5.2.1-25) unstable; urgency=medium ++ ++ * Update to SVN 20151123 (r230734, 5.2.1) from the gcc-5-branch. ++ * Fix libgcc4-dbg dependency on libgcc4. Closes: #805839. ++ * Fix building epoch prefixed cross packages. ++ ++ -- Matthias Klose Mon, 23 Nov 2015 05:48:00 +0100 ++ ++gcc-5 (5.2.1-24) unstable; urgency=medium ++ ++ * Update to SVN 20151121 (r230703, 5.2.1) from the gcc-5-branch. ++ * Fix PR libstdc++/56158, taken from the trunk. Closes: #804521. LP: #1514309. ++ * Don't try to build a gnat cross compiler when there is no gnat compiler ++ for the build architecture. ++ * Update gnat build dependencies for backports. ++ * Parallelize building documentation and parallelize the packaging step. ++ * Update the Linaro support to the 5-2015.11 snapshot. ++ ++ -- Matthias Klose Sat, 21 Nov 2015 11:22:16 +0100 ++ ++gcc-5 (5.2.1-23) unstable; urgency=medium ++ ++ * Update to SVN 20151028 (r229478, 5.2.1) from the gcc-5-branch. ++ ++ [ Matthias Klose ] ++ * Update the Linaro support to the 5-2015.10 snapshot. ++ * gcj: On ppc64el, use the same jvm archdir name as for openjdk (ppc64le). ++ * gcj: Fix priority of java alternatives. Closes: #803055. ++ * gnat-5: Reintroduce the unversioned gnatgcc name. Closes: #802838. ++ ++ [ Aurelien Jarno ] ++ * Replace proposed patch for PR rtl-optimization/67736 by the one ++ committed on trunk. ++ ++ -- Matthias Klose Wed, 28 Oct 2015 10:36:54 +0100 ++ ++gcc-5 (5.2.1-22) unstable; urgency=medium ++ ++ * Update to SVN 20151010 (r228681, 5.2.1) from the gcc-5-branch. ++ - Fix PR libstdc++/65913, PR libstdc++/67173, PR libstdc++/67747, ++ PR c/67730, PR middle-end/67563, PR lto/67699, PR tree-optimization/67821, ++ PR debug/58315. ++ ++ [ Matthias Klose ] ++ * Restore the work around for PR libstdc++/65913, still needed at least ++ for powerpc. ++ * Rename gcc-5-hppa64 to gcc-5-hppa64-linux-gnu, update (build) dependency ++ on binutils. Closes: #800563. ++ * Adjust setting DH_COMPAT for dh_movefiles with updated debhelper supporting ++ globbing of arguments. Closes: #800250. ++ * Build-depend on gnat-5 instead of gnat-4.9. ++ ++ [ Aurelien Jarno ] ++ * Do not Use --with-mips-plt on mips and mipsel. Closes: #799811. ++ ++ -- Matthias Klose Sat, 10 Oct 2015 22:17:09 +0200 ++ ++gcc-5 (5.2.1-21) unstable; urgency=medium ++ ++ * Update to SVN 20151003 (r228449, 5.2.1) from the gcc-5-branch. ++ * Fix building gnat. Closes: #800781. ++ ++ -- Matthias Klose Sat, 03 Oct 2015 17:28:45 +0200 ++ ++gcc-5 (5.2.1-20) unstable; urgency=medium ++ ++ * Update to SVN 20151002 (r228373, 5.2.1) from the gcc-5-branch. ++ * Fix packaging the ada cross library packages. ++ ++ -- Matthias Klose Fri, 02 Oct 2015 10:24:38 +0200 ++ ++gcc-5 (5.2.1-19) unstable; urgency=medium ++ ++ * Update to SVN 20150930 (r228302, 5.2.1) from the gcc-5-branch. ++ - Fix PR ipa/66424. Closes: #800318. ++ ++ [ Matthias Klose ] ++ * Update the Linaro support to the 5-2015.09 snapshot. ++ * Fix PR libstdc++/67707, taken from the trunk. LP: #1499564. ++ * Ship libgcj.spec in gcj-5 instead of gcj-5-jdk. Closes: #800010. ++ * gcj-5: Suggest gcj-5-jdk. ++ * Fix base dependency for ada cross library packages. ++ * Add ${shlibs:Depends} for libgnatvsn and libgnatprj. ++ * Link lrealpath.o into libgnatprj. Closes: #800045. ++ * libgnat{svn,prj}-dev: For cross builds, move adainclude and adalib files ++ into the gcc libdir. ++ * Default to POWER8 on ppc64el. ++ * armv8: Fix slt lda missing conditional code (taken from the trunk). ++ * Fix lintian pre-depends-directly-on-multiarch-support warnings. ++ ++ [ Aurelien Jarno ] ++ * Apply proposed patch for PR rtl-optimization/67736 when building for ++ mips64 or mips64el. Closes: #800321. ++ ++ -- Matthias Klose Wed, 30 Sep 2015 20:36:50 +0200 ++ ++gcc-5 (5.2.1-18) unstable; urgency=medium ++ ++ * Update to SVN 20150922 (r228023, 5.2.1) from the gcc-5-branch. ++ ++ [ Matthias Klose ] ++ * gcc-5-plugin-dev: Depend on libmpc-dev. Closes: #798997. ++ * Fix PR libstdc++/65913, taken from the trunk. Closes: #797577. ++ ++ [ YunQiang Su ] ++ * Build again the gnat-5-sjlj package. Closes: #798782. ++ * Fix gnat cross builds, and cross building gnat. ++ ++ -- Matthias Klose Tue, 22 Sep 2015 23:15:17 +0200 ++ ++gcc-5 (5.2.1-17) unstable; urgency=medium ++ ++ * Update to SVN 20150911 (r227671, 5.2.1) from the gcc-5-branch. ++ - Fix PR c++/67369, ICE on valid code. LP: #1489173. ++ ++ [ Matthias Klose ] ++ * Build-depend on linux-libc-dev [m68k] for gcc and gcc-snapshot builds. ++ Closes: #796906. ++ * Don't ignore anymore bootstrap comparison failures on sh4. Closes: #796939. ++ * Fix stage1 cross build for KFreeBSD. Closes: #796901. ++ * libgo: Fix PR go/67508, rewrite lfstack packing/unpacking to look more ++ like that in Go (Michael Hudson). LP: #1472650. ++ * Fix PR target/67143 (AArch64), ICE on valid code. LP: #1481333. ++ ++ [ Aurelien Jarno ] ++ * Use --with-mips-plt on mips*. ++ * Build for R2 ISA on mips, mips64 and mips64el. ++ * Optimize for R2 ISA on mipsel. ++ * Only apply mips-fix-loongson2f-nop on mipsel. ++ ++ [ YunQiang Su ] ++ * Fix running the acats tests. Closes: #798531. ++ ++ -- Matthias Klose Fri, 11 Sep 2015 03:17:20 +0200 ++ ++gcc-5 (5.2.1-16) unstable; urgency=medium ++ ++ * Update to SVN 20150903 (r227431, 5.2.1) from the gcc-5-branch. ++ - Backport the filesystem TS library. ++ * libstdc++-dev: Install libstdc++fs.a. ++ * Again, configure with --enable-targets=powerpcle-linux on ppc64el. ++ * Apply proposed patch for PR target/67211 (ppc64el). ++ * libgo-dev: Install libgolibbegin.a. ++ * Apply proposed patch for PR target/67280 (ARM). LP: #1482320. ++ ++ -- Matthias Klose Thu, 03 Sep 2015 12:16:15 +0200 ++ ++gcc-5 (5.2.1-15) unstable; urgency=medium ++ ++ * Update to SVN 20150808 (r226731, 5.2.1) from the gcc-5-branch. ++ * Adjust libstdc++-breaks: Break libantlr-dev instead of antlr; ++ adjust libreoffice version (closes: #794203), drop xxsd break (see ++ #793289), remove cython breaks (closes: #794511), add breaks for ++ packages built using cython (chemps2, fiona, guiqwt, htseq, imposm, ++ pysph, pytaglib, python-scipy, python-sfml, rasterio). ++ * Ignore missing libstdc++ symbols on sparc64 (work around #792204). ++ ++ -- Matthias Klose Sat, 08 Aug 2015 11:18:24 +0200 ++ ++gcc-5 (5.2.1-14) unstable; urgency=high ++ ++ * Fix libstdc++6 breaks. ++ ++ -- Matthias Klose Fri, 31 Jul 2015 04:12:08 +0200 ++ ++gcc-5 (5.2.1-13) unstable; urgency=high ++ ++ * Upload to unstable (https://wiki.debian.org/GCC5). See also ++ https://lists.debian.org/debian-devel-announce/2015/07/msg00000.html ++ * Update to SVN 20150730 (r226411, 5.2.1) from the gcc-5-branch. ++ - Fix PR libstdc++/67015. Closes: #793784. ++ * Fix version macros in the plugin-header.h header. Closes: #793478. ++ * libstdc++6: Add breaks for issues tagged with gcc-pr66145. ++ * Add libcpprest2.4 to libstdc++6 breaks. Closes: #784655. ++ * Fix PR c++/66857, taken from the trunk. ++ * Ignore differences in gcc/real.o in the bootstrap build for ++ sh*-*linux-gnu targets. According to PR 67002, "A rare indeterminacy ++ of the register choice. Both codes are valid. It seems very hard to ++ find where has this indeterminacy come from". Suggested by Adrian ++ Glaubitz. ++ ++ -- Matthias Klose Thu, 30 Jul 2015 21:51:25 +0200 ++ ++gcc-5 (5.2.1-12) experimental; urgency=medium ++ ++ * Update to SVN 20150723 (r226105, 5.2.1) from the gcc-5-branch. ++ * Fix PR libstdc++/66145, std::ios_base::failure objects thrown from ++ libstdc++.so using the gcc4-compatible ABI. ++ Just build src/c++11/functexcept.cc using the new ABI. It will break ++ code, which will be handled in the archive by adding Breaks for the ++ affected packages. Third party code using such code will need a rebuild. ++ * Remove the work around to build with -O1 on sh4. ++ ++ -- Matthias Klose Thu, 23 Jul 2015 14:18:44 +0200 ++ ++gcc-5 (5.2.1-11) experimental; urgency=medium ++ ++ * Configure without --disable-libstdcxx-dual-abi. ++ * Configure with --with-default-libstdcxx-abi=c++11. ++ ++ -- Matthias Klose Fri, 17 Jul 2015 08:13:08 +0200 ++ ++gcc-5 (5.2.1-1) experimental; urgency=medium ++ ++ * GCC 5.2 release. ++ * Update to SVN 20150716 (r225880, 5.2.1) from the gcc-5-branch. ++ * Require version 5.2 for the libstdc++6 cxx symbols. ++ * Ignore missing libstdc++ symbols on sparc64 (work around #792204). ++ * Go escape analysis: analyze multiple result type assertions (taken ++ from the trunk). ++ ++ -- Matthias Klose Thu, 16 Jul 2015 15:35:44 +0200 ++ ++gcc-5 (5.1.1-14) unstable; urgency=medium ++ ++ * Update to SVN 20150711 (r225710, 5.1.1) from the gcc-5-branch. ++ ++ -- Matthias Klose Sat, 11 Jul 2015 11:57:19 +0200 ++ ++gcc-5 (5.1.1-13) unstable; urgency=medium ++ ++ * Update to SVN 20150706 (r225471, 5.1.1) from the gcc-5-branch. ++ * Update libasan symbol files. ++ * Configure --with-fp-32=xx on all mips targets, setting MIPS O32 default ++ to FPXX (YunQiang Su). Closes: #789612. ++ * Update libgccjit symbol file. ++ * Add x32 symbols files for libgcc1 and libstdc++6. ++ * libgccjit0: Add breaks for python-gccjit and python3-gccjit. ++ ++ -- Matthias Klose Mon, 06 Jul 2015 19:55:08 +0200 ++ ++gcc-5 (5.1.1-12) unstable; urgency=medium ++ ++ * Update to SVN 20150622 (r224724, 5.1.1) from the gcc-5-branch. ++ * Update symbols files for mips64 libatomic and libstdc++ (YunQiang Su). ++ Closes: #788990. ++ * Fix "empty-binary-package" lintian warnings. ++ ++ -- Matthias Klose Mon, 22 Jun 2015 14:37:49 +0200 ++ ++gcc-5 (5.1.1-11) unstable; urgency=medium ++ ++ * Update to SVN 20150616 (r224519, 5.1.1) from the gcc-5-branch. ++ * gccgo: escape: Analyze binary expressions (taken from the trunk). ++ * Explicitly build with -Wl,--no-relax on alpha again. ++ * Build with -O1 on sh4 (try to work around PR target/66358). ++ ++ -- Matthias Klose Tue, 16 Jun 2015 16:11:59 +0200 ++ ++gcc-5 (5.1.1-10) unstable; urgency=medium ++ ++ * Update to SVN 20150613 (r224454, 5.1.1) from the gcc-5-branch. ++ * Make removal of byte-compiled libstdc++ pretty printer files more ++ robust. Closes: #787630. ++ * Fix mips 32bit (o32) multilib builds (YunQiang Su). ++ * Build target libraries with -Wl,-z,relro. ++ * Build libstdc++6 when building the common libraries. ++ * Fix a bunch of lintian warnings. ++ ++ -- Matthias Klose Sat, 13 Jun 2015 12:59:17 +0200 ++ ++gcc-5 (5.1.1-9) unstable; urgency=medium ++ ++ * Update to SVN 20150602 (r224029, 5.1.1) from the gcc-5-branch. ++ * Remove byte-compiled libstdc++ pretty printer files on upgrade. ++ Closes: #785939. ++ * Fix dangling libgccjit.so symlink. ++ * Fix base dependency for rtlibs stage builds. ++ * Fix build failure of the hppa64 cross compiler, introduced by the ++ gnat cross patches. Closes: #786692. ++ * Update README.source (Michael Vogt). ++ * libgo: syscall.Sendfile(): Apply proposed patch for PR go/66378. ++ (Michael Vogt). LP: #1460530. ++ * Set CC and CXX matching the same GCC version for the stage1 build. ++ * Work around PR go/66368, build libgo with -fno-stack-protector. ++ LP: #1454183. ++ ++ -- Matthias Klose Wed, 03 Jun 2015 00:49:41 +0200 ++ ++gcc-5 (5.1.1-8) unstable; urgency=medium ++ ++ * Update to SVN 20150528 (r223816, 5.1.1) from the gcc-5-branch. ++ * Set the priorities of the *-dev-*-cross packages to extra. ++ * Prepare to change the base dependency for *-cross packages. ++ * Fix dependencies for stage1 and stage2 builds. ++ * Relax dependencies on binary indep *-dev-*-cross packages. ++ * Disable building gdc on sh4 (bootstrap comparison failure). ++ ++ -- Matthias Klose Thu, 28 May 2015 15:51:00 +0200 ++ ++gcc-5 (5.1.1-7) unstable; urgency=medium ++ ++ * Update to SVN 20150522 (r223579, 5.1.1) from the gcc-5-branch. ++ * Add description for the ada-gnattools-cross patch (YunQiang Su). ++ * Provide a rtlibs stage to build a subset of target library packages. ++ * Make symbols file symlinking for cross builds more robust. ++ * Prefer gnatgcc-5 over gnatgcc when building native packages. ++ * Various fixes to build a gnat cross compiler: ++ - Fix dependencies of packages. ++ - Fix building libgnatprj and libgnatvsn (still needed to figure ++ out if these are target or host libraries). ++ * Fix building cross compilers with dpkg 1.18. ++ ++ -- Matthias Klose Fri, 22 May 2015 18:20:01 +0200 ++ ++gcc-5 (5.1.1-6) unstable; urgency=medium ++ ++ * Update to SVN 20150519 (r223346, 5.1.1) from the gcc-5-branch. ++ * Don't build gdc-multilib on armel. ++ * Remove old CFLAGS/LDFLAGS settings to build gdc. ++ * Remove reference to .ico file in NEWS.html. ++ * Fix gcc's dependency on libcc1-0 for native builds. ++ * Fix stripping the rpath when cross-building cross compilers. ++ * Remove work arounds to build 64bit multilibs on 32bit targets, ++ now properly fixed upstream. ++ * Partially apply patches to build a gnat cross compiler (submitted ++ by YunQiang Su). ++ - gnatmake: Call the versioned gnatbind and gnatlink commands. ++ Closes: #782257. ++ - Allow libgnatprj and libgnatvsn to cross build. Addresses: #783372. ++ - New patch ada-gnattools-cross.diff (no documentation). ++ * Backport patch for gccgo: ++ - gccgo: If unary & does not escape, the var does not escape. ++ * Apply the backported patches for the go escape analysis. Need to ++ be enabled with -fgo-optimize-alloc (this option may go away again). ++ * Re-enable running the tests. ++ ++ -- Matthias Klose Tue, 19 May 2015 10:33:40 +0200 ++ ++gcc-5 (5.1.1-5) unstable; urgency=medium ++ ++ * Update to SVN 20150507 (r222873, 5.1.1) from the gcc-5-branch. ++ * Fix 32bit libstdc++ symbols files for kfreebsd-amd64. ++ * libx32phobos-dev: Don't depend on libx32z-dev, when not available. ++ * Fix gotools configury. ++ * Configure with ++ --disable-libstdcxx-dual-abi --with-default-libstdcxx-abi=c++98 ++ While libstdc++ provides a dual ABI to support both the c++98 and c++11 ++ ABI, there is no committment on compatibility of the old experimental ++ c++11 ABI from GCC 4.9 and the stable c++11 ABI in GCC 5. ++ Closes: #784655. ++ ++ -- Matthias Klose Fri, 08 May 2015 18:48:49 +0200 ++ ++gcc-5 (5.1.1-4) unstable; urgency=medium ++ ++ * Update to SVN 20150503 (r222751, 5.1.1) from the gcc-5-branch. ++ - Fix build failure on alpha. ++ * Fix applying the cross-biarch patch for stage1 builds. ++ * Fix libstdc++ symbols files for kfreebsd-amd64. ++ * Remove libn32phobos-5-dev from the control file. ++ * Really disable gnat on x32. ++ ++ -- Matthias Klose Sat, 02 May 2015 19:18:57 +0200 ++ ++gcc-5 (5.1.1-3) unstable; urgency=high ++ ++ * Update to SVN 20150430 (r222660, 5.1.1) from the gcc-5-branch. ++ * Fix libstdc++ symbols files for kfreebsd-i386. ++ * PR libstdc++/62258, fix for std::uncaught_exception, taken from the trunk. ++ LP: #1439451. ++ * Backport patches for gccgo (not yet applied): ++ - Consider multi-result calls in escape analysis. ++ - Propagate escape info from closures to enclosed variables. ++ - Analyze function values and conversions. ++ - Use backend interface for stack allocation. ++ * More libstdc++ symbols updates for the Hurd and KFreeBSD. ++ * config-ml.in: Add D support. ++ * Update cross-biarch.diff to support D and Go. ++ * Apply the cross-biarch patch for every cross build. ++ ++ -- Matthias Klose Thu, 30 Apr 2015 15:42:05 +0200 ++ ++gcc-5 (5.1.1-2) unstable; urgency=medium ++ ++ * Update to SVN 20150428 (r222550, 5.1.1) from the gcc-5-branch. ++ * Fix the gnat build dependency. ++ * Don't build go and gofmt for cross compilers. ++ ++ -- Matthias Klose Tue, 28 Apr 2015 23:57:14 +0200 ++ ++gcc-5 (5.1.1-1) unstable; urgency=medium ++ ++ * GCC 5.1.0 release. ++ * Update to SVN 20150424 (r222416, 5.1.1) from the gcc-5-branch. ++ * Update NEWS files. ++ * Apply the ada-bootstrap-compare patch for snapshot builds as well. ++ * Update libasan, libgomp and libstdc++ symbols files. ++ * Don't ignore errors in dh_makeshlibs and dh_shlibdeps anymore, symbols ++ files should be uptodate now. ++ * Split out the sjlj build related things from the ada-acats patch into ++ a new ada-acats-sjlj patch. ++ * Don't build libx32phobos-5-dev when not building x32 multilibs. ++ * Fix standard C++ include directory for cross builds. Closes: #783241. ++ * Ignore bootstrap comparison failure on ia64. Filed upstream as ++ PR middle-end/65874. ++ * gccgo: Add (don't yet apply) a patch to implement escape analysis (taken ++ from the trunk). Turned off by default, enable with -fgo-optimize-alloc. ++ ++ -- Matthias Klose Fri, 24 Apr 2015 18:42:39 +0200 ++ ++gcc-5 (5.1~rc1-1) experimental; urgency=medium ++ ++ * GCC 5.1 release candidate 1. ++ * Update to SVN 20150414 (r222066) from the gcc-5-branch. ++ * Update GDC to the gcc-5 branch, 20140414. ++ * Don't build libobjc, when not building the common libraries. ++ * Don't run the gccjit tests on KFreeBSD. Works around #782444:. ++ * Fix not building libs built by the next GCC version. ++ ++ -- Matthias Klose Tue, 14 Apr 2015 02:03:53 +0200 ++ ++gcc-5 (5-20150410-1) experimental; urgency=medium ++ ++ * Update to SVN 20150410 ++ ++ [ Matthias Klose ] ++ * Fix /usr/include/c++/5.0.0 symlink. ++ * Re-enable building the D frontend. Closes: #782254. ++ * gccgo: Install libnetgo. ++ ++ [ Samuel Thibault ] ++ * Fix ada builds on the Hurd and KFreeBSD. Closes: #781424. ++ ++ -- Matthias Klose Sat, 11 Apr 2015 02:24:08 +0200 ++ ++gcc-5 (5-20150404-1) experimental; urgency=medium ++ ++ * Update to SVN 20150404. ++ * Don't explicitly configure --with-gxx-include-dir and an absolute path, ++ so the toolchain remains relocatible. Instead, canonicalize the include ++ path names at runtime. ++ * Don't link libgnatprj using --no-allow-shlib-undefined on older releases. ++ * Don't build libmpx on older releases. ++ * Remove the work around to build libgccjit on arm64. ++ * Fix the libgccjit build using the just built compiler. ++ * Don't break other gcc, gcj, gnat -base packages for backports, only ++ needed for dist-upgrades. ++ * Don't add -gtoggle to STAGE3_CFLAGS (disabling the bootstrap comparison). ++ Instead, ignore the one differing file (gcc/ada/a-except.o) for now. ++ See #781457, PR ada/65618. ++ * Update libasan, libtsan, libgfortran and libstdc++ symbols files. ++ * Add symbols files for libmpx, libgccjit and libcc1. ++ ++ -- Matthias Klose Sat, 04 Apr 2015 21:53:45 +0200 ++ ++gcc-5 (5-20150329-1) experimental; urgency=medium ++ ++ * Update to SVN 20150329. ++ * Fix building the gnat-5-doc package. ++ * Fix gnat build dependencies. ++ * Fix installation of the gnat upstream ChangeLog. Closes: #781451. ++ * Restore the bootstrap-debug.mk patch to the ada-mips patch ++ for debugging purposes. See #781457. ++ ++ -- Matthias Klose Sun, 29 Mar 2015 18:53:29 +0200 ++ ++gcc-5 (5-20150327-1) experimental; urgency=medium ++ ++ * Update to SVN 20150327. ++ * Update libcc1 build support. ++ * Fix syntax in libstdc++ symbols file. Closes: #780991. ++ * Fix PR go/65417: Add support for PPC32 relocs to debug/elf. LP: #1431388. ++ * Fix PR go/65462: Fix go get dependencies. LP: #1432497. ++ * Limit the omp.h multilib fix to Linux. Closes: #778440. ++ * For ICEs, dump the preprocessed source file to stderr when in a ++ distro build environment. ++ * Remove the bootstrap-debug.mk patch from the ada-mips patch. ++ * gnat related work (partly based on #780640): ++ - Update patches for GCC 5. ++ - Build the gnat packages from the gcc-5 source package. ++ - Don't build a gnat-base package from the gcc-5 source. ++ - Stop building the gnat-5-sjlj package for now, patch needs an update. ++ - Fix the packaging when not building the gnat-5-sjlj package. ++ - Don't apply the ada-symbolic-tracebacks, patch needs an update. ++ - Fix the libgnatprj build, build with -DIN_GCC. ++ * Replace cloog/ppl build bits with isl build bits. ++ ++ -- Matthias Klose Fri, 27 Mar 2015 21:05:16 +0100 ++ ++gcc-5 (5-20150321-1) experimental; urgency=medium ++ ++ * Update to SVN 20150321. ++ * Move the libcc1plugin from the gcc-5-plugin-dev package into the ++ gcc-5 package. ++ ++ -- Matthias Klose Sat, 21 Mar 2015 15:01:15 +0100 ++ ++gcc-5 (5-20150316-1) experimental; urgency=medium ++ ++ * Update to SVN 20150316. ++ - Fix bootstrap failures on armel, armhh and arm64. ++ * Configure with --enable-checking=yes (instead of =release). ++ ++ -- Matthias Klose Tue, 17 Mar 2015 00:30:27 +0100 ++ ++gcc-5 (5-20150314-1) experimental; urgency=medium ++ ++ * Update to SVN 20150314. ++ - libgo: Add arm64 to the pointer size map (Michael Hudson). ++ - libgo: Add ppc to the pointer size map. ++ - PR go/65404, enable cgo on arm64 and powerpc. LP: #1431032. ++ - Fix PR/tree-optimization 65418. Closes: #778163. ++ - Fix PR c++/65370. Closes: #778073. ++ * Enable libmpx builds on amd64 and i386. ++ * Update the gcc-multiarch patch for mips64 (YunQiang Su). ++ Closes: #776402, #780271. ++ * Remove pr52306 and pr52714 patches, applied upstream. Closes: #780468. ++ ++ -- Matthias Klose Sat, 14 Mar 2015 14:48:19 +0100 ++ ++gcc-5 (5-20150307-1) experimental; urgency=medium ++ ++ * Update to SVN 20150307. ++ - Update gccgo to Go 1.4.2. ++ * Enable libsanitizer for AArch64 and POWERPC LE (asan, ubsan). ++ * Remove the support to build empty libsanitizer packages on powerpc ++ and ppc64; libsanitizer should be stable on these architectures. ++ * Fix libcc1.so symlink. Closes: #779341. ++ * Revert the fix for PR65150 on armel and armhf to restore bootstrap. ++ * Don't strip the libgo library, or some things won't work as documented, ++ like runtime.Callers. Still keep the -dbg packages and check if some ++ debug information can be stripped. ++ * gccgo-5: Install alternatives for go and gofmt. ++ ++ -- Matthias Klose Sat, 07 Mar 2015 12:20:59 +0100 ++ ++gcc-5 (5-20150226-1) experimental; urgency=medium ++ ++ * Update to SVN 20150226. ++ - Fix PR c/65040 (closes: #778514), PR tree-optimization/65053 ++ (closes: #778070, #778071), PR c++/64898 (closes: #778472). ++ * Allow not to strip the compiler executables to be able to print backtraces ++ for ICEs. ++ * Fix gnat build on mips64el (James Cowgill). Addresses: #779191. ++ * Fix the hppa64 cross build (John David Anglin). Closes: #778658. ++ * Fix libstdc++ pretty printers for Python3. Closes: #778436. ++ ++ -- Matthias Klose Thu, 26 Feb 2015 08:18:23 +0100 ++ ++gcc-5 (5-20150205-1) experimental; urgency=medium ++ ++ * Update to SVN 20150205. ++ * Update GDC for GCC 5. ++ * Build GDC multilib packages. ++ * Update cross-install-location.diff for gcc-5. Closes: #776100. ++ * Configure --with-default-libstdcxx-abi=c++11 for development, ++ --with-default-libstdcxx-abi=c++98 for backports. ++ * Apply proposed patch for PR target/64893 (AArch64), build using ++ 4.9 on AArch64 for now. ++ * Don't disable bootstrap mode for the jit build on arm64, gets ++ miscompiled. ++ * Allow one to build using gettext built with a newer GCC. ++ ++ -- Matthias Klose Thu, 05 Feb 2015 18:31:17 +0100 ++ ++gcc-5 (5-20150127-1) experimental; urgency=medium ++ ++ * Update to SVN 20150127. ++ * More symbol file updates. ++ * Fix libbacktrace and libsanitizer multilib builds. ++ * Fix libssp builds on 64bit architectures. ++ * Update hardening testsuite patches for GCC 5. ++ ++ -- Matthias Klose Tue, 27 Jan 2015 14:10:30 +0100 ++ ++gcc-5 (5-20150121-1) experimental; urgency=medium ++ ++ * GCC 5 (SVN trunk 20150121). ++ * Build new binary packages libcc1-0, libgccjit0, libgccjit-5-dev, ++ libgccjit-5-dbg, libgccjit-5-doc. ++ * Update symbols files (still incomplete). ++ ++ -- Matthias Klose Wed, 21 Jan 2015 21:02:05 +0100 ++ ++gcc-4.9 (4.9.2-10) UNRELEASED; urgency=medium ++ ++ * Update to SVN 20150120 (r219885) from the gcc-4_9-branch. ++ - Fix PR libstdc++/64476, PR libstdc++/60966, PR libstdc++/64239, ++ PR libstdc++/64649, PR libstdc++/64584, PR libstdc++/64585, ++ PR libstdc++/64646, ++ PR middle-end/63704 (ice on valid), PR target/64513 (x86), ++ PR rtl-optimization/64286 (wrong code), PR tree-optimization/64563 (ice), ++ PR middle-end/64391 (ice on valid), PR c++/54442 (ice on valid), ++ PR target/64358 (rs6000, wrong code), PR target/63424 (AArch64, ice on ++ valid), PR target/64479 (SH), PR rtl-optimization/64536, PR target/64505 ++ (rs6000), PR target/61413 (ARM, wrong code), PR target/64507 (SH), ++ PR target/64409 (x32, ice on valid), PR c++/64487 (ice on valid), ++ PR c++/64352, PR c++/64251 (rejects valid), PR c++/64297 (ice on valid), ++ PR c++/64029 (ice on valid), PR c++/63657 (diagnostic), PR c++/38958 ++ (diagnostic), PR c++/63658 (rejects valid), PR ada/64492 (build), ++ PR fortran/64528 (ice on valid), PR fortran/63733 (wrong code), ++ PR fortran/56867 (wrong code), PR fortran/64244 (ice on valid). ++ * Update the Linaro support to the 4.9-2015.01 release. ++ ++ -- Matthias Klose Tue, 20 Jan 2015 12:45:13 +0100 ++ ++gcc-4.9 (4.9.2-10) unstable; urgency=medium ++ ++ * Really add x32 multilib packages for i386 cross builds to the control file. ++ Closes: #773265. ++ * Use the final binutils 2.25 release. ++ * Tighten the gcc-4.9 dependency on libgcc-4.9-dev (YunQiang Su). ++ ++ -- Matthias Klose Thu, 25 Dec 2014 18:10:51 +0100 ++ ++gcc-4.9 (4.9.2-9) unstable; urgency=medium ++ ++ * Update to SVN 20141220 (r218987) from the gcc-4_9-branch. ++ - Fix PR libstdc++/64302, PR libstdc++/64303, PR c++/60955, ++ PR rtl-optimization/64010 (wrong code), PR sanitizer/64265 (wrong code). ++ * Add x32 multilib packages for i386 cross builds to the control file. ++ Closes: #773265. ++ * Fix mips64el multilib cross builds. Closes: #772665. ++ * libphobos-4.x-dev: Stop providing libphobos-dev, now a real package. ++ ++ -- Matthias Klose Sat, 20 Dec 2014 07:47:15 +0100 ++ ++gcc-4.9 (4.9.2-8) unstable; urgency=medium ++ ++ * Update to SVN 20141214 (r218721) from the gcc-4_9-branch. ++ - Fix PR tree-optimization/62021 (ice), PR middle-end/64225 (missed ++ optimization), PR libstdc++/64239, PR rtl-optimization/64037 (wrong ++ code), PR target/64200 (x86, ice), PR tree-optimization/64269 (ice). ++ * Don't build libphobos multilibs, there is no gdc-multilib build. ++ * Really disable the sanitizer libs on powerpc, ppc64 and ppc64el. ++ * Paste config.log files to stdout in case of build errors. ++ ++ -- Matthias Klose Sun, 14 Dec 2014 18:43:49 +0100 ++ ++gcc-4.9 (4.9.2-7) unstable; urgency=medium ++ ++ * Update to SVN 20141210 (r218575) from the gcc-4_9-branch. ++ - Fix PR libstdc++/64203, PR target/55351 (SH), PR tree-optimization/61686, ++ PR bootstrap/64213. ++ - libgcc hppa backports. ++ * Fix cross builds with dpkg-architecture unconditionally exporting ++ target variables. For now specify the target architecture ++ in debian/target. This still needs to work with older dpkg versions, ++ so don't "simplify" the packaging. Closes: #768167. ++ ++ -- Matthias Klose Wed, 10 Dec 2014 13:32:42 +0100 ++ ++gcc-4.9 (4.9.2-6) unstable; urgency=medium ++ ++ * Update to SVN 20141209 (r218510) from the gcc-4_9-branch. ++ - Fix PR libstdc++/63840, PR libstdc++/61947, PR libstdc++/64140, ++ PR target/50751 (SH), PR target/64108 (x86, ice), ++ PR rtl-optimization/64037 (wrong-code), PR c++/56493 (performance), ++ PR c/59708, PR ipa/64153, PR target/64167) (wrong code, ++ closes: #771974), PR target/59593 (ARM, wrong code), ++ PR middle-end/63762 (ARM. wrong code), PR target/63661 (x86, ++ wrong code), PR target/64113 (alpha, wrong code), PR c++/64191. ++ - Allow one to build with ISL 0.14. ++ ++ -- Matthias Klose Tue, 09 Dec 2014 11:00:08 +0100 ++ ++gcc-4.9 (4.9.2-5) unstable; urgency=medium ++ ++ * Update to SVN 20141202 (r218271) from the gcc-4_9-branch. ++ - Fix PR middle-end/64111 (ice), PR ipa/63551 (wrong code). ++ PR libstdc++/64102 (closes: #770843), PR target/64115 (powerpc). ++ * Move libphobos2.a into the gcc_lib_dir. Closes: #771647. ++ * Fix typo in last powerpcspe patch. Closes: #771654. ++ ++ -- Matthias Klose Tue, 02 Dec 2014 17:42:07 +0100 ++ ++gcc-4.9 (4.9.2-4) unstable; urgency=medium ++ ++ * Update to SVN 20141128 (r218142) from the gcc-4_9-branch. ++ -PR PR target/56846 (ARM), PR libstdc++/63497, ++ PR middle-end/63738 (wrong code), PR tree-optimization/62238 (ice), ++ PR tree-optimization/61927 (wrong code), ++ PR tree-optimization/63605 (wrong code), PR middle-end/63665 (wrong code), ++ PR fortran/63938 (OpenMP), PR middle-end/64067 (ice), ++ PR tree-optimization/63915 (wrong code), PR sanitizer/63913 (ice valid), ++ PR rtl-optimization/63659 (wrong code). ++ * Don't let stage1 multilib builds depend on the multilib libc-dev. ++ Closes: #771243. ++ * Fix an exception problem on powerpcspe (Roland Stigge). Closes: #771324. ++ * Remove unsupported with_deps_on_target_arch_pkgs configurations. ++ Closes: #760770, #766924, #770413. ++ ++ -- Matthias Klose Fri, 28 Nov 2014 15:26:23 +0100 ++ ++gcc-4.9 (4.9.2-3) unstable; urgency=medium ++ ++ * Update to SVN 20141125 (r218048) from the gcc-4_9-branch. ++ - PR target/53976 (SH), PR target/63783 (SH), PR target/51244 (SH), ++ PR target/60111 (SH), PR target/63673 (ppc), ++ PR tree-optimization/61750 (ice), PR target/63947 (x86, wrong code), ++ PR tree-optimization/62167 (wrong code), PR c++/63849 (ice), ++ PR ada/47500. ++ ++ [ Aurelien Jarno ] ++ * Always configure sh4-linux with --with-multilib-list=m4,m4-nofpu, ++ even with multilib disabled, as it doesn't produce additional ++ libraries. ++ ++ [ Matthias Klose ] ++ * gcc-4.9-base: Add Breaks: gcc-4.7-base (<< 4.7.3). Closes: #770025. ++ ++ -- Matthias Klose Tue, 25 Nov 2014 17:04:19 +0100 ++ ++gcc-4.9 (4.9.2-2) unstable; urgency=medium ++ ++ * Update to SVN 20141117 (r217768) from the gcc-4_9-branch. ++ - Fix PR rtl-optimization/63475, PR rtl-optimization/63483 (gfortran ++ aliasing fixes for alpha), PR target/63538 (x86), PR ipa/63838 (wrong ++ code), PR target/61535 (sparc), PR c++/63265 (diagnostic), PR ada/42978. ++ * Fix PR c/61553 (ice on illegal code), backported from the trunk. ++ Closes: #767668. ++ * Disable building the sanitizer libs on powerpc and ppc64. Not yet ++ completely ported, and causing kernel crashes running the tests. ++ * Update the Linaro support to the 4.9-2014.11 release. ++ ++ -- Matthias Klose Tue, 18 Nov 2014 00:34:01 +0100 ++ ++gcc-4.9 (4.9.2-1) unstable; urgency=medium ++ ++ * GCC 4.9.2 release. ++ * Update GDC from the 4.9 branch. ++ ++ [ Matthias Klose ] ++ * Allow one to build the gcc-base package only. ++ ++ [Ludovic Brenta] ++ Merge from gnat-4.9 (4.9.1-4) unstable; urgency=low. ++ * debian/patches/ada-libgnatvsn.diff: compile the version.o of ++ libgnatvsn.{a,so} with -DBASEVER=$(FULLVER) to align it with the ++ change made in gcc-base-version.diff, which is compiled into gcc and ++ gnat1. Fixes: #759038. ++ * debian/patches/ada-revert-pr63225.diff: new; preserve the aliversion ++ compatibility of libgnatvsn4.9-dev with -3. ++ ++ Merge from gnat-4.9 (4.9.1-3) unstable; urgency=low ++ Merge from gnat-4.9 (4.9.1-2) unstable; urgency=low ++ ++ [Svante Signell] ++ * debian/patches/ada-hurd.diff: update and bring up to par with ++ ada-kfreebsd.diff. ++ ++ [Ludovic Brenta] ++ * Rebuild with newer dpkg. Fixes: #761248. ++ ++ Merge from gnat-4.9 (4.9.1-1) unstable; urgency=low ++ ++ * New upstream release. Build-depend on gcc-4.9-source (>= 4.9.1). ++ Fixes: #755490. ++ * debian/rules.d/binary-ada.mk: install the test-summary file in package ++ gnat-4.9 instead of gnat-4.9-base. test-summary is actually ++ architecture-dependent. This change reflects what happens in gcc-4.9 ++ and gcc-4.9-base as well. Fixes: #749869. ++ ++ Merge from gnat-4.9 (4.9.0-2) unstable; urgency=low ++ ++ * Lintian warnings: ++ * debian/control.m4 (gnat-4.9-base): Multi-Arch: same. ++ * debian/patches/ada-749574.diff: new. Fixes: #749574. ++ ++ -- Matthias Klose Tue, 04 Nov 2014 02:58:33 +0100 ++ ++gcc-4.9 (4.9.1-19) unstable; urgency=medium ++ ++ * GCC 4.9.2 release candidate. ++ * Update to SVN 20141023 (r216594) from the gcc-4_9-branch. ++ * Install sanitizer header files. ++ * Apply patch for PR 60655, taken from the trunk. ++ * Fix typo in the libstdc++ HTML docs. Closes: #766498. ++ * Use doxygen's copy of jquery.js for the libstdc++ docs. Closes: #766499. ++ * Force self-contained cross builds. ++ * Don't build functionally non-equivalent cross compilers. ++ * Update the Linaro support to the 4.9-2014.10-1 release. ++ ++ -- Matthias Klose Fri, 24 Oct 2014 14:20:00 +0200 ++ ++gcc-4.9 (4.9.1-18) unstable; urgency=medium ++ ++ * Update to SVN 20141018 (r216426) from the gcc-4_9-branch. ++ ++ [ Matthias Klose ] ++ * Update libstdc++ symbols file for powerpcspe (Roland Stigge). ++ Closes: #765078. ++ ++ -- Matthias Klose Sat, 18 Oct 2014 16:28:09 +0200 ++ ++gcc-4.9 (4.9.1-17) unstable; urgency=medium ++ ++ * Update to SVN 20141015 (r216240) from the gcc-4_9-branch. ++ - Fix PR c++/63405 (ice) Closes: #761549. ++ - Fix PR ipa/61144 (wrong code). Closes: #748681. ++ ++ -- Matthias Klose Wed, 15 Oct 2014 10:29:23 +0200 ++ ++gcc-4.9 (4.9.1-16) unstable; urgency=medium ++ ++ * Update to SVN 20140930 (r215717) from the gcc-4_9-branch. ++ * Don't suggest libvtv and binutils-gold. Closes: #761612. ++ ++ -- Matthias Klose Tue, 30 Sep 2014 11:37:48 +0200 ++ ++gcc-4.9 (4.9.1-15) unstable; urgency=medium ++ ++ * Update to SVN 20140919 (r215401) from the gcc-4_9-branch. ++ ++ [ Matthias Klose ] ++ * Extend the fix for PR target/63190 (AArch64). Closes: #758964. ++ * Apply proposed fix for Linaro #331, LP: #1353729 (AArch64). ++ ++ [ Aurelien Jarno ] ++ * Default to mips64 ISA on mips64el, with tuning for mips64r2. ++ ++ -- Matthias Klose Fri, 19 Sep 2014 20:17:27 +0200 ++ ++gcc-4.9 (4.9.1-14) unstable; urgency=medium ++ ++ * Update to SVN 20140912 (r215228) from the gcc-4_9-branch. ++ * Update the Linaro support to the 4.9-2014.09 release. ++ * Fix installation of the libstdc++ documentation. Closes: #760872. ++ ++ -- Matthias Klose Fri, 12 Sep 2014 19:15:23 +0200 ++ ++gcc-4.9 (4.9.1-13) unstable; urgency=medium ++ ++ * Update to SVN 20140908 (r215008) from the gcc-4_9-branch. ++ * Enable cgo on AArch64 (Michael Hudson). LP: #1361940. ++ * Update the Linaro support from the Linaro/4.9 branch. ++ * Fix PR target/63190 (AArch64), taken from the trunk. Closes: #758964. ++ ++ -- Matthias Klose Mon, 08 Sep 2014 09:56:50 +0200 ++ ++gcc-4.9 (4.9.1-12) unstable; urgency=medium ++ ++ [ Samuel Thibault ] ++ * boehm-gc: use anonymous mmap instead of brk also on hurd-*. ++ Closes: #753791. ++ ++ -- Matthias Klose Sun, 31 Aug 2014 18:40:46 +0200 ++ ++gcc-4.9 (4.9.1-11) unstable; urgency=medium ++ ++ * Update to SVN 20140830 (r214759) from the gcc-4_9-branch. ++ * Update cross installation patches for the branch. ++ * Use the base version (4.9) when accessing files in gcc_lib_dir. ++ ++ -- Matthias Klose Sat, 30 Aug 2014 22:05:47 +0200 ++ ++gcc-4.9 (4.9.1-10) unstable; urgency=medium ++ ++ * Update to SVN 20140830 (r214751) from the gcc-4_9-branch. ++ * Fix jni symlinks in /usr/lib/jvm. Closes: #759558. ++ * Update the Linaro support from the Linaro/4.9 branch. ++ - Fixes Aarch64 cross build on i386. ++ ++ -- Matthias Klose Sat, 30 Aug 2014 04:47:19 +0200 ++ ++gcc-4.9 (4.9.1-9) unstable; urgency=medium ++ ++ * Update to SVN 20140824 (r214405) from the gcc-4_9-branch. ++ * Fix -dumpversion output to print the full version number. ++ Addresses: #759038. LP: #1360404. ++ Use the GCC base version for the D include dir name. ++ ++ -- Matthias Klose Sun, 24 Aug 2014 10:09:28 +0200 ++ ++gcc-4.9 (4.9.1-8) unstable; urgency=medium ++ ++ * Update to SVN 20140820 (r214215) from the gcc-4_9-branch. ++ * Fix PR middle-end/61294, -Wmemset-transposed-args, taken from the trunk. ++ LP: #1352836. ++ * Update the Linaro support to 4.9-2014.08. ++ * Fix PR tree-optimization/59586, graphite segfault, taken from the trunk. ++ LP: #1227789. ++ * Fix multilib castrated cross builds on mips64el (YunQiang Su, Helmut ++ Grohne). Closes: #758408. ++ * Apply Proposed patch for PR target/62040 (AArch64). LP: #1351227. ++ Closes: #757738. ++ ++ -- Matthias Klose Wed, 20 Aug 2014 11:36:40 +0200 ++ ++gcc-4.9 (4.9.1-7) unstable; urgency=medium ++ ++ * Build-depend on dpkg-dev (>= 1.17.11). ++ ++ -- Matthias Klose Thu, 14 Aug 2014 22:12:29 +0200 ++ ++gcc-4.9 (4.9.1-6) unstable; urgency=medium ++ ++ * Update to SVN 20140813 (r213955) from the gcc-4_9-branch. ++ * Really fix the GFDL build on AArch64. Closes: #757153. ++ * Disable Ada for snapshot builds on kfreebsd-i386, kfreebsd-amd64. ++ Local patch needs an update and upstreaming. ++ * Apply the local ada-mips patch for snapshot builds too. ++ * Disable Ada for snapshot builds on mips, mipsel. Bootstrap comparision ++ failure. Local patch needs upstreaming. ++ * Disable Ada for snapshot builds on hurd-i386, build dependencies are ++ not installable. ++ * Don't build the sanitizer libs for sparc snapshot builds. ++ * Proposed backport for PR libstdc++/61841. Closes: #749290. ++ ++ -- Matthias Klose Thu, 14 Aug 2014 17:53:43 +0200 ++ ++gcc-4.9 (4.9.1-5) unstable; urgency=medium ++ ++ * Update to SVN 20140808 (r213759) from the gcc-4_9-branch. ++ - Fix PR tree-optimization/61964. LP: #1347147. ++ * Fix libphobos cross build. ++ ++ -- Matthias Klose Fri, 08 Aug 2014 17:28:55 +0200 ++ ++gcc-4.9 (4.9.1-4) unstable; urgency=high ++ ++ * Update to SVN 20140731 (r213317) from the gcc-4_9-branch. ++ - CVE-2014-5044, fix integer overflows in array allocation in libgfortran. ++ Closes: #756325. ++ * Build libphobos on armel and armhf. Closes: #755390. ++ * Fix java.security symlink. Closes: #756484. ++ ++ -- Matthias Klose Thu, 31 Jul 2014 10:15:27 +0200 ++ ++gcc-4.9 (4.9.1-3) unstable; urgency=medium ++ ++ * Update to SVN 20140727 (r213100) from the gcc-4_9-branch. ++ * Fix the GFDL build on AArch64. ++ * Fix PR libobjc/61920, libobjc link failure on powerpc*. Closes: #756096. ++ ++ -- Matthias Klose Sun, 27 Jul 2014 15:25:24 +0200 ++ ++gcc-4.9 (4.9.1-2) unstable; urgency=medium ++ ++ * Update to SVN 20140724 (r213031) from the gcc-4_9-branch. ++ ++ * Fix installing test logs and summaries. ++ * Warn about ppc ELFv2 ABI issues, which will change in GCC 4.10. ++ * Don't gzip the xz compressed testsuite logs and summaries. ++ * Build libphobos on armel and armhf. Closes: #755390. ++ * Update the Linaro support to the 4.9-2014.07 release. ++ ++ -- Matthias Klose Thu, 24 Jul 2014 23:59:49 +0200 ++ ++gcc-4.9 (4.9.1-1) unstable; urgency=medium ++ ++ * GCC 4.9.1 release. ++ * Update GDC form the 4.9 branch (20140712). ++ ++ -- Matthias Klose Wed, 16 Jul 2014 17:15:14 +0200 ++ ++gcc-4.9 (4.9.0-11) unstable; urgency=medium ++ ++ * GCC 4.9.1 release candidate 1. ++ * Update to SVN 20140712 (r212479) from the gcc-4_9-branch. ++ - Fix PR middle-end/61725. Closes: #754548. ++ ++ * Add libstdc++ symbols files for mips64 and mips64el (Yunqiang Su). ++ Closes: #745372. ++ * Set java_cpu to ppc64 on ppc64el. ++ * Build AArch64 from the Linaro 4.9-2014.06 release. ++ * Re-enable running the testsuite on KFreeBSD and the Hurd. ++ * Re-enable running the libstdc++ testsuite on arm*, mips* and hppa. ++ ++ -- Matthias Klose Sat, 12 Jul 2014 13:10:46 +0200 ++ ++gcc-4.9 (4.9.0-10) unstable; urgency=medium ++ ++ * Update to SVN 20140704 (r212295) from the gcc-4_9-branch. ++ ++ * Explicitly set cpu_32 to ultrasparc for sparc64 builds. ++ * Fix --with-long-double-128 for sparc32 when defaulting to 64-bit. ++ * Ignore missing libstdc++ symbols on armel and hppa. The future and ++ exception_ptr implementation is incomplete. For more information see ++ https://gcc.gnu.org/ml/gcc/2014-07/msg00000.html. ++ ++ -- Matthias Klose Fri, 04 Jul 2014 15:55:09 +0200 ++ ++gcc-4.9 (4.9.0-9) unstable; urgency=medium ++ ++ * Update to SVN 20140701 (r212192) from the gcc-4_9-branch. ++ * Update libstdc++ symbols files for ARM. ++ * Configure --with-cpu-32=ultrasparc on sparc64. ++ ++ -- Matthias Klose Tue, 01 Jul 2014 10:47:11 +0200 ++ ++gcc-4.9 (4.9.0-8) unstable; urgency=medium ++ ++ * Update to SVN 20140624 (r211959) from the gcc-4_9-branch. ++ ++ * Don't ignore dpkg-shlibdeps errors for libstdc++6, left over from initial ++ 4.9 uploads. ++ * Update libgcc1 symbols for sh4. Closes: #751919. ++ * Stop building the libvtv packages. Not usable unless the build is ++ configured with --enable-vtable-verify, which comes with a performance ++ penalty just for the stubs in libstdc++. ++ * Update libstdc++ and libvtv symbols files for builds configured with ++ --enable-vtable-verify. ++ * Remove version requirement for dependency on make. Closes: #751891. ++ * Fix removal of python byte-code files in libstdc++6. Closes: #751435. ++ * Fix a segfault in the driver from calling free on non-malloc'd area. ++ * Drop versioned build dependency on gdb, and apply the pretty printer ++ patch for libstdc++ based on the release. ++ * Add support to build with isl-0.13. ++ ++ -- Matthias Klose Wed, 25 Jun 2014 20:08:09 +0200 ++ ++gcc-4.9 (4.9.0-7) unstable; urgency=medium ++ ++ * Update to SVN 20140616 (r211699) from the gcc-4_9-branch. ++ ++ [ Matthias Klose ] ++ * Fix patch application for powerpcspe (Helmit Grohne). Closes: #751001. ++ + Update context for powerpc_remove_many. ++ + Drop gcc-powerpcspe-ldbl-fix applied upstream. ++ ++ [ Aurelien Jarno ] ++ * Fix PR c++/61336, taken from the trunk. ++ ++ -- Matthias Klose Mon, 16 Jun 2014 10:59:16 +0200 ++ ++gcc-4.9 (4.9.0-6) unstable; urgency=medium ++ ++ * Update to SVN 20140608 (r211353) from the gcc-4_9-branch. ++ * Fix -Wno-format when -Wformat-security is the default (Steve Beattie). ++ LP: #1317305. ++ * Don't install the libstdc++ pretty printer file into the debug directory, ++ but into the gdb auto-load directory. ++ * Fix the removal of the libstdc++6 package, removing byte-compiled pretty ++ printer files and pycache directories. ++ * Fix PR c++/61046, taken from the trunk. LP: #1313102. ++ * Fix installation of gcc-{ar,nm,ranlib} man pages for snapshot builds. ++ Closes: #745906. ++ * Update patches for snapshot builds. ++ ++ -- Matthias Klose Sun, 08 Jun 2014 11:57:07 +0200 ++ ++gcc-4.9 (4.9.0-5) unstable; urgency=medium ++ ++ * Update to SVN 20140527 (r210956) from the gcc-4_9-branch. ++ * Limit systemtap-sdt-dev build dependency to enumerated linux architectures. ++ * Build libitm on AArch64, patch taken from the trunk. ++ * Update the testsuite to allow more testcases to pass with hardening options ++ turned on (Steve Beattie). LP: #1317307. ++ * Revert the fix for PR rtl-optimization/60969, causing bootstrap failure ++ on ppc64el. ++ * Fix PR other/61257, check for working sys/sdt.h. ++ * Drop the libstdc++-arm-wno-abi patch, not needed anymore in 4.9. ++ ++ -- Matthias Klose Tue, 27 May 2014 08:58:07 +0200 ++ ++gcc-4.9 (4.9.0-4) unstable; urgency=medium ++ ++ * Update to SVN 20140518 (r210592) from the gcc-4_9-branch. ++ * Update the local ada-libgnatprj patch for AArch64. Addresses: #748233. ++ * Update the libstdc++v-python3 patch. Closes: #748317, #738341, 747903. ++ * Build-depend on systemtap-sdt-dev, on every architecure, doesn't seem to hurt ++ on architectures where it is not supported. Closes: #748315. ++ * Update the gcc-default-format-security patch (Steve Beattie). LP: #1317305. ++ * Apply the proposed patch for PR c/57653. Closes: #734345. ++ ++ -- Matthias Klose Sun, 18 May 2014 23:29:43 +0200 ++ ++gcc-4.9 (4.9.0-3) unstable; urgency=medium ++ ++ * Update to SVN 20140512 (r210323) from the gcc-4_9-branch. ++ ++ [ Matthias Klose ] ++ * Update build dependencies for ada enabled snapshot builds. ++ * Fix PR tree-optimization/60902, taken from the trunk. Closes: #746944. ++ * Ensure that the common libs (built from the next GCC version) are ++ available when building without common libs. ++ * Fix java.security symlink in libgcj15. Addresses: #746786. ++ * Move the libstdc++ gdb pretty printers into libstdc++6, install the ++ -gdb.py files into /usr/share/gdb/auto-load. ++ * Set the 'Multi-Arch: same' attribute for packages, cross built with ++ with_deps_on_target_arch_pkgs=yes (Helmit Grohne). Closes: #716795. ++ * Build the gcc-X.Y-base package with with_deps_on_target_arch_pkgs=yes ++ (Helmit Grohne). Addresses: #744782. ++ * Apply the proposed patches for PR driver/61106, PR driver/61126. ++ Closes: #747345. ++ ++ [ Aurelien Jarno ] ++ * Fix libasan1 symbols file for sparc and sparc64. ++ ++ -- Matthias Klose Tue, 13 May 2014 02:15:27 +0200 ++ ++gcc-4.9 (4.9.0-2) unstable; urgency=medium ++ ++ * Update to SVN 20140503 (r210033) from the gcc-4_9-branch. ++ - Fix PR go/60931, garbage collector issue with non 4kB system page size. ++ LP: #1304754. ++ ++ [Matthias Klose] ++ * Fix libgcc-dev dependency on gcc, when not building libgcc. ++ * Fix gnat for snapshot builds on ppc64el. ++ * Update the libsanitizer build fix for sparc. ++ * Install only versioned gcc-ar gcc-nm gcc-ranlib binaries for the hppa64 ++ cross compiler. Install hppa64 alternatives. Addresses: #745967. ++ * Fix the as and ld symlinks for the hppa64 cross compiler. ++ * Add the gnat backport for AArch64. ++ * Update gnat patches not to use tabs and too long lines. ++ * libgnatvsn: Use CC and CXX passed from the toplevel makefile, drop gnat ++ build dependency on g++. Addresses: #746688. ++ ++ Merge from gnat-4.9 (4.9.0-1) unstable; urgency=low: ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-hurd.diff: refresh for new upstream version that ++ restores POSIX compliance in System.OS_Interface.timespec. ++ * debian/patches/ada-kfreebsd.diff: make System.OS_Interface.To_Timespec ++ consistent with s-osinte-posix.adb. ++ [Nicolas Boulenguez] ++ * rules.conf (Build-Depends): mention gnat before gnat-x.y so that ++ buildds can bootstrap 4.9 in unstable. Fixes: #744724. ++ ++ -- Matthias Klose Sat, 03 May 2014 14:00:41 +0200 ++ ++gcc-4.9 (4.9.0-1) unstable; urgency=medium ++ ++ * GCC 4.9.0 release. ++ * Update to SVN 20140423 (r209695) from the gcc-4_9-branch. ++ ++ [Matthias Klose] ++ * Fix PR target/59758 (sparc), libsanitizer build failure (proposed patch). ++ * Update gold architectures. ++ * Update NEWS files. ++ * Remove more mudflap left overs. Closes: #742606. ++ * Add new libraries src/libvtv and src/libcilkrts to ++ cross-ma-install-location.diff (Helmur Grohne). Closes: #745267. ++ * Let lib*gcc-dev depend on the corresponding libtsan packages. ++ * Build the liblsan packages (amd64 only). ++ * Install the libcilkrts spec file. ++ * Build the D frontend and libphobos from the gdc trunk. ++ ++ Merge from gnat-4.9 (4.9-20140411-1) unstable; urgency=medium ++ ++ [Nicolas Boulenguez] ++ * Revert g4.9-base to Architecture: all. Fixes: #743833. ++ * g4.9 Breaks/Replaces -base 4.6.4-2 and 4.9-20140330-1. Fixes: #743376. ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-symbolic-tracebacks.diff: refresh. ++ ++ Merge from gnat-4.9 (4.9-20140406-1) experimental; urgency=low ++ ++ * debian/patches/ada-arm.diff: new. Improve support for ZCX on this ++ architecture. ++ * debian/patches/rules.patch: apply architecture- and Ada-specific ++ patches before Debian-specific patches. ++ * debian/patches/ada-link-lib.diff, ++ debian/patches/ada-libgnatvsn.diff, ++ debian/patches/ada-libgnatprj.diff: refresh for the new upstream ++ sources. ++ ++ Merge from gnat-4.9 (4.9-20140330-3) experimental; urgency=low ++ ++ [Nicolas Boulenguez] ++ * Install debian_packaging.mk to gnat-x.y, not -base. Fixes: #743375. ++ * rules.conf (Build-Depends): gnatgcc symlink provided by gnat-4.9 | ++ gnat-4.6 (>= 4.6.4-2) | gnat (>= 4.1 and << 4.6.1). ++ ++ Merge from gnat-4.9 (4.9-20140330-2) experimental; urgency=medium ++ ++ * Uploading to unstable was a mistake. Upload to experimental. ++ ++ Merge from gnat-4.9 (4.9-20140330-1) unstable; urgency=medium ++ ++ [Nicolas Boulenguez] ++ * patches/ada-ppc64.diff: replace undefined variable arch with ++ target_cpu; this overrides the patch proposed by Ulrich Weigand as ++ it is more correct; approved by Ludovic Brenta. Fixes: #742590. ++ * control.m4: Break/Replace: dh-ada-library 5.9. Fixes: #743219. ++ ++ Merge from gnat-4.9 (4.9-20140322-1) experimental; urgency=low ++ ++ [Nicolas Boulenguez] ++ * debian/control.m4: ++ (Suggests): suggest the correct version of ada-reference-manual. ++ (Vcs-Svn): specify the publicly accessible repository. ++ * Receive debian_packaging.mk from dh-ada-library (not library specific). ++ * Receive gnatgcc symlink from gnat (useful outside default compiler). ++ * debian/source/local-options: new. ++ ++ [Ludovic Brenta] ++ * debian/control.m4: conflict with gnat-4.7, gnat-4.8. ++ * debian/patches/ada-default-project-path.diff: when passed options such ++ as -m32 or -march, do not look for the RTS in ++ /usr/share/ada/adainclude but in ++ /usr/lib/gcc/$target_triplet/$version/{,rts-}$arch. Still look ++ for project files in /usr/share/ada/adainclude. ++ * debian/rules.d/binary-ada.mk, debian/rules.defs, debian/rules.patch: ++ Switch to ZCX by default on arm, armel, armhf; built SJLJ as the ++ package gnat-4.9-sjlj like on all other architectures. This is made ++ possible by the new upstream version. ++ * debian/patches/ada-hurd.diff (s-osinte-gnu.ads): change the type of ++ timespec.tv_nsec from long to time_t, for compatibility with ++ s-osinte-posix.adb, even though this violates POSIX. Better solution ++ to come from upstream. Fixes: #740286. ++ ++ -- Matthias Klose Wed, 23 Apr 2014 13:35:43 +0200 ++ ++gcc-4.9 (4.9-20140411-2) unstable; urgency=medium ++ ++ * Disable running the testsuite on kfreebsd, hangs the buildds. ++ * Stop building the sanitizer libs on sparc, fails to build. No reaction ++ from the Debian port maintainers and upstream. See PR sanitize/59758. ++ ++ -- Matthias Klose Sat, 12 Apr 2014 15:42:34 +0200 ++ ++gcc-4.9 (4.9-20140411-1) unstable; urgency=medium ++ ++ * GCC 4.9.0 release candidate 1. ++ * Configure for i586-linux-gnu on i386. ++ ++ -- Matthias Klose Fri, 11 Apr 2014 19:57:07 +0200 ++ ++gcc-4.9 (4.9-20140406-1) experimental; urgency=medium ++ ++ [Matthias Klose] ++ * Include include and include-fixed header files into the stage1 ++ gcc-4.9 package. ++ * Explicitly configure with --disable-multilib on sparc64 when no ++ multilibs are requested (Helmut Grohne). Addresses: #743342. ++ * Drop mudflap from cross-install-location.diff since mudflap was removed ++ from gcc 4.9. Closes: #742606 ++ * Build gnat in ppc64el snapshot builds. ++ * Apply the ada-ppc64 patch for snapshot builds as well. ++ * Fix PR target/60609 (ARM), proposed patch (Charles Baylis). LP: #1295653. ++ * Include the gnu triplet prefixed gcov and gcc-{ar,nm,ranlib} binaries. ++ * Add replaces when upgrading from a standalone gccgo build. ++ ++ [Yunqiang Su] ++ * Lower default optimization for mips64/n32 to mips3/mips64(32). ++ Closes: #742617. ++ ++ -- Matthias Klose Sun, 06 Apr 2014 02:24:16 +0200 ++ ++gcc-4.9 (4.9-20140330-1) experimental; urgency=medium ++ ++ * Package GCC 4.9 snapshot 20140330. ++ ++ [Matthias Klose] ++ * Update symbols files. ++ * debian/patches/ada-ppc64.diff: Fix for ppc64el (Ulrich Weigand). ++ * Fix cross building targeting x32 (Helmut Grohne). Addresses: #742539. ++ ++ [Ludovic Brenta] ++ * debian/control.m4 (Build-Depends), debian/rules.conf: remove ++ AUTOGEN_BUILD_DEP and hardcode autogen. It is called by ++ fixincludes/genfixes during bootstrap and also when building gnat-*, ++ not just when running checks on gcc-*. ++ ++ -- Matthias Klose Sun, 30 Mar 2014 09:46:29 +0100 ++ ++gcc-4.9 (4.9-20140322-1) experimental; urgency=medium ++ ++ * Package GCC 4.9 snapshot 20140322. ++ - Fixes build error on the Hurd. Closes: #740153. ++ ++ [Matthias Klose] ++ * Re-apply lost patch for config.gcc for mips64el. Closes: #741543. ++ ++ Merge from gnat-4.9 (4.9-20140218-3) UNRELEASED; urgency=low ++ ++ [Nicolas Boulenguez] ++ * debian/control.m4: suggest the correct version of ++ ada-reference-manual. ++ ++ [Ludovic Brenta] ++ * debian/control.m4: conflict with gnat-4.7, gnat-4.8. ++ ++ Merge from gnat-4.9 (4.9-20140218-2) experimental; urgency=low ++ ++ * debian/patches/ada-hurd.diff (Makefile.in): match *86-pc-gnu but ++ not *86-linux-gnu, the target tripled used by GNU/Linux. ++ ++ Merge from gnat-4.9 (4.9-20140218-1) experimental; urgency=low ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-symbolic-tracebacks.diff: refresh and fix compiler ++ warnings. ++ * debian/patches/ada-link-lib.diff (.../ada/gcc-interface/Make-lang.in): ++ do not try to install the gnattools, this is the job of ++ gnattools/Makefile.in. ++ * debian/patches/ada-ajlj.diff: specify EH_MECHANISM to sub-makes even ++ when making install-gnatlib. ++ ++ [Xavier Grave] ++ * debian/patches/ada-kfreebsd.diff: refresh. ++ * debian/rules.patch: re-enable the above. ++ ++ -- Matthias Klose Sat, 22 Mar 2014 14:19:43 +0100 ++ ++gcc-4.9 (4.9-20140303-1) experimental; urgency=medium ++ ++ * Package GCC 4.9 snapshot 20140303. ++ ++ -- Matthias Klose Tue, 04 Mar 2014 02:13:20 +0100 ++ ++gcc-4.9 (4.9-20140218-1) experimental; urgency=medium ++ ++ * Fix gij wrapper script on hppa. Closes: #739224. ++ ++ -- Matthias Klose Tue, 18 Feb 2014 23:59:31 +0100 ++ ++gcc-4.9 (4.9-20140205-1) experimental; urgency=medium ++ ++ * Package GCC 4.9 snapshot 20140205. ++ * Install the libsanitizer spec file. ++ * Fix building standalone gccgo, including the libgcc packages. ++ * On AArch64, use "generic" target, if no other default. ++ ++ -- Matthias Klose Wed, 05 Feb 2014 12:53:52 +0100 ++ ++gcc-4.9 (4.9-20140122-1) experimental; urgency=medium ++ ++ * Package GCC 4.9 snapshot 20140122. ++ * Update libstdc++ -dbg and -doc conflicts. ++ * Link libstdc++ tests requiring libpthread symbols with --no-as-needed. ++ * armhf: Fix ffi_call_VFP with no VFP arguments (Will Newton). ++ * Apply proposed patch for PR target/59799, allow passing arrays in ++ registers on AArch64 (Michael Hudson). ++ ++ -- Matthias Klose Wed, 22 Jan 2014 21:28:56 +0100 ++ ++gcc-4.9 (4.9-20140116-1) experimental; urgency=medium ++ ++ * Package GCC 4.9 snapshot 20140116. ++ * Fix PR target/59588 (AArch64), backport proposed patch. LP: #1263576. ++ * Fix call frame information in ffi_closure_SYSV on AArch64. ++ ++ -- Matthias Klose Fri, 17 Jan 2014 00:31:19 +0100 ++ ++gcc-4.9 (4.9-20140111-1) experimental; urgency=medium ++ ++ * Package GCC 4.9 snapshot 20140111. ++ * Update libstdc++ -dbg and -doc conflicts. Closes: #734913. ++ * Disable libcilkrts on KFreeBSD and the Hurd. See #734973. ++ ++ -- Matthias Klose Sat, 11 Jan 2014 13:11:16 +0100 ++ ++gcc-4.9 (4.9-20140110-1) experimental; urgency=medium ++ ++ * Package GCC 4.9 snapshot 20140110. ++ ++ -- Matthias Klose Fri, 10 Jan 2014 18:03:07 +0100 ++ ++gcc-4.9 (4.9-20140109-1) experimental; urgency=medium ++ ++ * Package GCC 4.9 snapshot. ++ ++ -- Matthias Klose Thu, 09 Jan 2014 18:57:46 +0100 ++ ++gcc-4.8 (4.8.2-11) unstable; urgency=low ++ ++ * Update to SVN 20131230 (r206241) from the gcc-4_8-branch. ++ * Don't build x32 multilibs for wheezy backports. ++ * Set the goarch to arm64 for aarch64-linux-gnu. ++ * Fix statically linked gccgo binaries on AArch64 (Michael Hudson). ++ LP: #1261604. ++ * Merge accumulated Ada changes from gnat-4.8. ++ * Update gnat build dependencies when not built from a separate source. ++ * Default to -mieee on alpha again (Michael Cree). Closes: #733291. ++ * Prepare gnat package for cross builds. ++ ++ -- Matthias Klose Mon, 30 Dec 2013 08:52:29 +0100 ++ ++gcc-4.8 (4.8.2-10) unstable; urgency=low ++ ++ * Update to SVN 20131213 (r205948) from the gcc-4_8-branch. ++ * Add missing commit in libjava for gcc-linaro. ++ ++ -- Matthias Klose Fri, 13 Dec 2013 01:01:47 +0100 ++ ++gcc-4.8 (4.8.2-9) unstable; urgency=low ++ ++ * Update to SVN 20131212 (r205924) from the gcc-4_8-branch. ++ ++ [ Matthias Klose ] ++ * Fix libitm symbols files for ppc64. ++ * Update libatomic symbol file for arm64 and ppc64. ++ * libgcj-dev: Drop dependencies on gcj-jre-lib and gcj-jdk. ++ * Fix permissions of some override files. ++ * Let cross compilers conflict with gcc-multilib (providing ++ /usr/include/asm for the non-default multilib). ++ * Configure --with-long-double-128 on powerpcspe (Roland Stigge). ++ Closes: #731941. ++ * Update the Linaro support to the 4.8-2013.12 release. ++ * Update the ibm branch to 20131212. ++ ++ [ Aurelien Jarno ] ++ * patches/note-gnu-stack.diff: restore and rebase lost parts. ++ ++ -- Matthias Klose Thu, 12 Dec 2013 12:34:55 +0100 ++ ++gcc-4.8 (4.8.2-8) unstable; urgency=medium ++ ++ * Update to SVN 20131203 (r205647) from the gcc-4_8-branch. ++ * Fix PR libgcc/57363, taken from the trunk. ++ ++ -- Matthias Klose Wed, 04 Dec 2013 01:21:10 +0100 ++ ++gcc-4.8 (4.8.2-7) unstable; urgency=low ++ ++ * Update to SVN 20131129 (r205535) from the gcc-4_8-branch. ++ * Introduce aarch64 goarch. ++ * libgo: Backport fix for calling a function or method that takes or returns ++ an empty struct via reflection. ++ * go frontend: Backport fix for the generated hash functions of types that ++ are aliases for structures containing unexported fields. ++ * Skip Go testcase on AArch64 which hangs on the buildds. ++ * Fix freetype includes in libjava/classpath. ++ ++ -- Matthias Klose Fri, 29 Nov 2013 18:19:12 +0100 ++ ++gcc-4.8 (4.8.2-6) unstable; urgency=low ++ ++ * Update to SVN 20131128 (r205478) from the gcc-4_8-branch. ++ ++ [ Matthias Klose ] ++ * gcc-4.8-base: Breaks gcc-4.4-base (<< 4.4.7). Closes: #729963. ++ * Update the gcc-as-needed patch for mips*. Closes: #722067. ++ * Use dpkg-vendor information for distribution specific settings. ++ Closes: #697805. ++ * Check for the sys/auxv.h header file. ++ * On AArch64, make the frame grow downwards, taken from the trunk. ++ Enable ssp on AArch64. ++ * Pass -fuse-ld=gold to gccgo on targets supporting split-stack. ++ ++ [ Aurelien Jarno ] ++ * Update README.Debian for s390 and s390x. ++ ++ [ Thorsten Glaser ] ++ * m68k-ada.diff: Add gcc-4.8.0-m68k-ada-pr48835-2.patch and ++ gcc-4.8.0-m68k-ada-pr51483.patch by Mikael Pettersson, to ++ fix more CC0-specific and m68k/Ada-specific problems. ++ * m68k-picflag.diff: New, backport from trunk, by Andreas Schwab, ++ to avoid relocation errors when linking big shared objects. ++ * pr58369.diff: New, backport from trunk, by Jeffrey A. Law, ++ to fix ICE while building boost 1.54 on m68k. ++ * pr52306.diff: Disables -fauto-inc-dec by default on m68k to ++ work around ICE when building C++ code (e.g. Qt-related). ++ ++ -- Matthias Klose Thu, 28 Nov 2013 10:29:09 +0100 ++ ++gcc-4.8 (4.8.2-5) unstable; urgency=low ++ ++ * Update to SVN 20131115 (r204839) from the gcc-4_8-branch. ++ * Update the Linaro support to the 4.8-2013.11 release. ++ * Add missing replaces in libgcj14. Closes: #729022. ++ ++ -- Matthias Klose Sat, 16 Nov 2013 20:15:09 +0100 ++ ++gcc-4.8 (4.8.2-4) unstable; urgency=low ++ ++ * Really fix disabling the gdc tests. ++ ++ -- Matthias Klose Wed, 13 Nov 2013 00:44:35 +0100 ++ ++gcc-4.8 (4.8.2-3) unstable; urgency=low ++ ++ * Update to SVN 20131112 (r204704) from the gcc-4_8-branch. ++ * Don't ship java.security in both libgcj14 and gcj-4.8-headless. ++ Closes: #729022. ++ * Disable gdc tests on architectures without libphobos port. ++ ++ -- Matthias Klose Tue, 12 Nov 2013 18:08:44 +0100 ++ ++gcc-4.8 (4.8.2-2) unstable; urgency=low ++ ++ * Update to SVN 20131107 (r204496) from the gcc-4_8-branch. ++ * Build ObjC, Obj-C++ and Go for AArch64. ++ * Fix some gcj symlinks. Closes: #726792, #728403. ++ * Stop building libmudflap (removed in GCC 4.9). ++ ++ -- Matthias Klose Thu, 07 Nov 2013 01:40:15 +0100 ++ ++gcc-4.8 (4.8.2-1) unstable; urgency=low ++ ++ * GCC 4.8.2 release. ++ ++ * Update to SVN 20131017 (r203751) from the gcc-4_8-branch. ++ * Update the Linaro support to the 4.8-2013.10 release. ++ * Fix PR c++/57850, option -fdump-translation-unit not working. ++ * Don't run the testsuite on aarch64. ++ * Fix PR target/58578, wrong-code regression on ARM. LP: #1232017. ++ * [ARM] Fix bug in add patterns due to commutativity modifier, ++ backport from trunk. LP: #1234060. ++ * Build libatomic on AArch64. ++ * Fix dependency generation for the cross gcc-4.8 package. ++ * Make the libstdc++ pretty printers compatible with Python3, if ++ gdb is built with Python3 support. ++ * Fix loading of libstdc++ pretty printers. Closes: #701935. ++ * Don't let gcc-snapshot build-depend on gnat on AArch64. ++ ++ -- Matthias Klose Thu, 17 Oct 2013 14:37:55 +0200 ++ ++gcc-4.8 (4.8.1-10) unstable; urgency=low ++ ++ * Update to SVN 20130904 (r202243) from the gcc-4_8-branch. ++ ++ [ Matthias Klose ] ++ * Don't rely on the most recent Debian release name for configuration ++ of the package. Addresses: #720263. Closes: #711824. ++ * Fix a cross build issue without DEB_* env vars set (Eleanor Chen). ++ Closes: #718614. ++ * Add packaging support for mips64(el) and mipsn32(el) including multilib ++ configurations (YunQiang Su). Addresses: #708143. ++ * Fix gcc dependencies for stage1 builds (YunQiang Su). Closes: #710240. ++ * Fix boehm-gc test failures with a linker defaulting to ++ --no-copy-dt-needed-entries. ++ * Fix libstdc++ and libjava test failures with a linker defaulting ++ to --as-needed. ++ * Mark the libjava/sourcelocation test as expected to fail on amd64 cpus. ++ * Fix some gcc and g++ test failures for a compiler with hardening ++ defaults enabled. ++ * Fix gcc-default-format-security.diff for GCC 4.8. ++ * Run the testsuite again on armel and armhf. ++ * Disable running the testsuite on mips. Fails on the buildds, preventing ++ migration to testing for three months. No feedback from the mips porters. ++ ++ [ Thorsten Glaser ] ++ * Merge several old m68k-specific patches from gcc-4.6 package: ++ - libffi-m68k: Rebased against gcc-4.8 and libffi 3.0.13-4. ++ - m68k-revert-pr45144: Needed for Ada. ++ - pr52714: Revert optimisation that breaks CC0 arch. ++ * Fix PR49847 (Mikael Pettersson). Closes: #711558. ++ * Use -fno-auto-inc-dec for PR52306 (Mikael Pettersson). ++ ++ -- Matthias Klose Wed, 04 Sep 2013 21:30:07 +0200 ++ ++gcc-4.8 (4.8.1-9) unstable; urgency=low ++ ++ * Update to SVN 20130815 (r201764) from the gcc-4_8-branch. ++ * Enable gomp on AArch64. ++ * Update the Linaro support to the 4.8-2013.08 release. ++ ++ -- Matthias Klose Thu, 15 Aug 2013 10:47:38 +0200 ++ ++gcc-4.8 (4.8.1-8) unstable; urgency=low ++ ++ * Fix PR rtl-optimization/57878, taken from the 4.8 branch. ++ * Fix PR target/57909 (ARM), Linaro only. ++ ++ -- Matthias Klose Mon, 22 Jul 2013 13:03:57 +0200 ++ ++gcc-4.8 (4.8.1-7) unstable; urgency=low ++ ++ * Update to SVN 20130717 (r200995) from the gcc-4_8-branch. ++ - Go 1.1.1 updates. ++ * Define CPP_SPEC for aarch64. ++ * Don't include in libgcc/libgcc2.c, taken from the trunk. ++ Closes: #696267. ++ * boehm-gc: use mmap instead of brk also on kfreebsd-* (Petr Salinger). ++ Closes: #717024. ++ ++ -- Matthias Klose Thu, 18 Jul 2013 02:02:13 +0200 ++ ++gcc-4.8 (4.8.1-6) unstable; urgency=low ++ ++ * Update to SVN 20130709 (r200810) from the gcc-4_8-branch. ++ ++ [ Aurelien Jarno ] ++ * Add 32-bit biarch packages on sparc64. ++ ++ [ Matthias Klose ] ++ * Fix multiarch include path for aarch64. ++ * Update the Linaro support to the 4.8-2013.07 release. ++ * Revert the proposed fix for PR target/57637 (ARM only). ++ * Let gfortran-4.8 provide gfortran-mod-10. Addresses #714730. ++ ++ [ Iain Buclaw ] ++ * Avoid compiler warnings redefining D builtin macros. ++ ++ -- Matthias Klose Tue, 09 Jul 2013 16:18:16 +0200 ++ ++gcc-4.8 (4.8.1-5) unstable; urgency=low ++ ++ * Update to SVN 20130629 (r200565) from the gcc-4_8-branch. ++ ++ [ Aurelien Jarno ] ++ * Don't pass --with-mips-plt on mips/mipsel. ++ ++ [ Matthias Klose ] ++ * Fix documentation builds with texinfo-5.1. ++ * Update the ARM libsanitizer backport from the 4.8 Linaro branch. ++ * libphobos-4.8-dev provides libphobos-dev (Peter de Wachter). ++ * The gdc cross compiler doesn't depend on libphobos-4.8-dev. ++ * Work around libgo build failure on ia64. PR 57689. #714090. ++ * Apply proposed fix for PR target/57637 (ARM only). ++ ++ -- Matthias Klose Sat, 29 Jun 2013 14:59:45 +0200 ++ ++gcc-4.8 (4.8.1-4) unstable; urgency=low ++ ++ * Update to SVN 20130619 (r200219) from the gcc-4_8-branch. ++ - Bump the libgo soname (change in type layout for functions that take ++ function arguments). ++ - Fix finding the liblto_plugin.so without x permissions set (see ++ PR driver/57651). Closes: #712704. ++ * Update maintainer list. ++ * Fall back to the binutils version of the binutils build dependency ++ if the binutils version used for the build cannot be determined. ++ * For ARM multilib builds, use libsf/libhf system directories to lookup ++ files for the non-default multilib (for now, only for the cross compilers). ++ * Split out a gcj-4.8 package, allow to build a gcj cross compiler. ++ * Allow one to cross build gcj. ++ * Don't include object.di in the D cross compiler, but depend on gdc instead. ++ * Allow one to cross build gdc. ++ * Pass --hash-style=gnu instead of --hash-style=both to the linker. ++ ++ -- Matthias Klose Wed, 19 Jun 2013 23:48:02 +0200 ++ ++gcc-4.8 (4.8.1-3) unstable; urgency=low ++ ++ * Update to SVN 20130612 (r200018) from the gcc-4_8-branch. ++ ++ [ Matthias Klose ] ++ * Prepare gdc for cross builds, and multiarch installation. ++ * Prepare gnat to build out of the gcc-4.8 source package, not ++ building the gnat-4.8-base package anymore. ++ * Don't build a gcj cross compiler by default (not yet tested). ++ * Disable D on s390 (doesn't terminate the D testsuite). ++ * Build libphobos on x32. ++ * Fix build with DEB_BUILD_OPTIONS="nolang=d". ++ * Disable D for arm64. ++ * Update the Linaro support to the 4.8-2013.06 release. ++ * Fix cross building a native compiler. ++ * Work around dh_shlibdeps not working on target libraries (see #698881). ++ * Add build dependency on kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any]. ++ * Add handling for unwind inside signal trampoline for kfreebsd (Petr ++ Salinger). Closes: #712016. ++ * Let gcc depend on the binutils upstream version it was built with. ++ Addresses #710142. ++ * Force a build using binutils 2.23.52 in unstable. ++ ++ [ Iain Buclaw ] ++ * Update gdc to 20130610. ++ * Build libphobos on kFreeBSD. ++ ++ -- Matthias Klose Wed, 12 Jun 2013 16:47:25 +0200 ++ ++gcc-4.8 (4.8.1-2) unstable; urgency=low ++ ++ * Update to SVN 20130604 (r199596) from the gcc-4_8-branch. ++ * Force arm mode for libjava on armhf. ++ * Fix gdc build failure on kFreeBSD and the Hurd. ++ ++ -- Matthias Klose Tue, 04 Jun 2013 17:28:06 +0200 ++ ++gcc-4.8 (4.8.1-1) unstable; urgency=low ++ ++ * GCC 4.8.1 release. ++ Support for C++11 ref-qualifiers has been added to GCC 4.8.1, making G++ ++ the first C++ compiler to implement all the major language features of ++ the C++11 standard. ++ * Update to SVN 20130603 (r199596) from the gcc-4_8-branch. ++ * Build java packages from this source package. Works aroud ftp-master's ++ overly strict interpretation of the Built-Using attribute. ++ * Build D and libphobos packages from this source package. ++ * Disable the non-default multilib test runs for libjava and gnat. ++ ++ -- Matthias Klose Mon, 03 Jun 2013 09:28:11 +0200 ++ ++gcc-4.8 (4.8.0-9) unstable; urgency=low ++ ++ * Update to SVN 20130529 (r199410) from the gcc-4_8-branch. ++ * Drop build dependency on automake, not used anymore. ++ * Build with binutils from unstable (the 4.8.0-8 package was accidentally ++ built with binutils from experimental). Closes: #710142. ++ * Explicity configure with --disable-lib{atomic,quadmath,sanitizer} when ++ not building these libraries. Closes: #710224. ++ ++ -- Matthias Klose Wed, 29 May 2013 16:59:50 +0200 ++ ++gcc-4.8 (4.8.0-8) unstable; urgency=medium ++ ++ * Update to SVN 20130527 (r199350) from the gcc-4_8-branch (4.8.1 rc2). ++ - Fix PR tree-optimization/57230 (closes: #707118). ++ ++ * Remove gdc-doc.diff. ++ * libgo: Overwrite the setcontext_clobbers_tls check on mips*, fails ++ on some buildds. ++ * Update the Linaro support to the 4.8-2013.05 release. ++ * Use the %I spec when building the object file for the gcj main function. ++ * Fix PR c++/57211, don't warn about unused parameters of defaulted ++ functions. Taken from the trunk. Closes: #705066. ++ * Update symbols files for powerpcspe (Roland Stigge). Closes: #709383. ++ * Build zh_TW.UTF-8 locale to fix libstdc++ test failures. ++ * Keep prev-* symlinks to fix plugin.exp test failures. ++ ++ -- Matthias Klose Mon, 27 May 2013 15:43:08 +0200 ++ ++gcc-4.8 (4.8.0-7) unstable; urgency=medium ++ ++ * Update to SVN 20130512 (r198804) from the gcc-4_8-branch. ++ ++ [ Matthias Klose ] ++ * Revert the r195826 patch, backported for the 4.8 branch. ++ * Tighten build dependency on libmpc-dev to ensure using libmpc3. ++ * Re-add build dependency on locales. ++ * Enable multilib build for gdc. ++ * Add build-deps on libn32gcc1 and lib64gcc1 on mips/mipsel. ++ * Fix libgcc-dbg dependencies on hppa and m68k. Closes: #707745. ++ * Install host specific libstdc++ headers into the host include dir. ++ Closes: #707753. ++ * Enable Go for sparc64. ++ * Fix host specific c++ include dir on kfreebsd-amd64. Closes: #707957. ++ ++ [ Thorsten Glaser ] ++ * Regenerate m68k patches. Closes: #707766. ++ ++ [ Aurelien Jarno ] ++ * Fix libgcc1 symbols file for sparc64. ++ ++ -- Matthias Klose Sun, 12 May 2013 19:26:50 +0200 ++ ++gcc-4.8 (4.8.0-6) unstable; urgency=low ++ ++ * Update to SVN 20130507 (r198699) from the gcc-4_8-branch. ++ ++ [ Samuel Thibault ] ++ * Backport r195826 to fix gdb build on hurd-i386. ++ ++ [ Matthias Klose ] ++ * Drop build dependency on locales for this upload. ++ ++ -- Matthias Klose Wed, 08 May 2013 01:17:15 +0200 ++ ++gcc-4.8 (4.8.0-5) unstable; urgency=low ++ ++ * Update to SVN 20130506 (r198641) from the gcc-4_8-branch. ++ ++ [ Matthias Klose ] ++ * Stop building the spu cross compilers on powerpc and ppc64. ++ * Merge back changes from gnat-4.8 4.8.0-1~exp2. ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-libgnatprj.diff: do not include indepsw.o in the ++ library, it is used only in the gnattools. ++ ++ -- Matthias Klose Mon, 06 May 2013 21:49:44 +0200 ++ ++gcc-4.8 (4.8.0-4) experimental; urgency=low ++ ++ * Update to SVN 20130421 (r198115) from the gcc-4_8-branch. ++ * Ignore the return value for dh_shlibdeps for builds on precise/ARM. ++ * Use target specific names for libstdc++ baseline files. LP: #1168267. ++ * Update gcc-d-lang.diff for GDC port. ++ * Don't use extended libstdc++-doc build dependencies for older releases. ++ * In gnatlink, pass the options and libraries after objects to the ++ linker to avoid link failures with --as-needed. Addresses: #680292. ++ * Build gcj for aarch64-linux-gnu. ++ * Update the Linaro support to the 4.8-2013.04 release. ++ * Fix gdc build on architectures not providing libphobos. ++ ++ -- Matthias Klose Mon, 22 Apr 2013 01:36:19 +0200 ++ ++gcc-4.8 (4.8.0-3) experimental; urgency=low ++ ++ * Update to SVN 20130411 (r197813) from the gcc-4_8-branch. ++ ++ [ Iain Buclaw ] ++ * Port GDC to GCC 4.8.0 release. ++ ++ -- Matthias Klose Thu, 11 Apr 2013 19:18:24 +0200 ++ ++gcc-4.8 (4.8.0-2) experimental; urgency=low ++ ++ * Update to SVN 20130328 (r197185) from the gcc-4_8-branch. ++ * Update NEWS files. ++ * Apply proposed patch for PR c++/55951. Closes: #703945. ++ * Configure with --disable-libatomic for hppa64. Closes: #704020. ++ ++ -- Matthias Klose Thu, 28 Mar 2013 06:10:29 +0100 ++ ++gcc-4.8 (4.8.0-1) experimental; urgency=low ++ ++ * GCC 4.8.0 release. ++ * Fix build failure on powerpcspe (Roland Stigge). Closes: #703074. ++ ++ -- Matthias Klose Fri, 22 Mar 2013 07:47:12 -0700 ++ ++gcc-4.8 (4.8-20130318-1) experimental; urgency=low ++ ++ * GCC snapshot 20130318, taken from the trunk. ++ - Fix the build failures on ARM. ++ * Install the libasan_preinit.o files. Closes: #703229. ++ ++ -- Matthias Klose Mon, 18 Mar 2013 16:18:25 -0700 ++ ++gcc-4.8 (4.8-20130315-1) experimental; urgency=low ++ ++ * GCC snapshot 20130315, taken from the trunk. ++ ++ -- Matthias Klose Fri, 15 Mar 2013 18:51:15 -0700 ++ ++gcc-4.8 (4.8-20130308-1) experimental; urgency=low ++ ++ * GCC snapshot 20130308, taken from the trunk. ++ ++ -- Matthias Klose Fri, 08 Mar 2013 12:08:12 +0800 ++ ++gcc-4.8 (4.8-20130222-1) experimental; urgency=low ++ ++ * GCC snapshot 20130222, taken from the trunk. ++ * Update libasan symbols files. ++ ++ -- Matthias Klose Sat, 23 Feb 2013 04:47:15 +0100 ++ ++gcc-4.8 (4.8-20130217-1) experimental; urgency=low ++ ++ * GCC snapshot 20130217, taken from the trunk. ++ ++ * Update libasan symbols files. ++ * On alpha, link with --no-relax. Update libgcc1 symbols files (Michael ++ Cree). Closes: #699220. ++ ++ -- Matthias Klose Mon, 18 Feb 2013 03:12:31 +0100 ++ ++gcc-4.8 (4.8-20130209-1) experimental; urgency=low ++ ++ * GCC snapshot 20130209, taken from the trunk. ++ ++ [ Matthias Klose ] ++ * Add a Build-Using attribute for each binary package, which can be ++ built from the gcc-4.7-source package (patch derived from a proposal by ++ Ansgar Burchardt). ++ - Use it for cross-compiler packages. ++ - Not yet used when building gcj, gdc or gnat using the gcc-source package. ++ These packages don't require an exact version of the gcc-source package, ++ but just a versions which is specified by the build dependencies. ++ * Fix dh_shlibdeps calls for the libgo packages. ++ * libstdc-doc: Depend on libjs-jquery. ++ * Update libstdc++ symbols files. ++ * Downgrade the priority of the non-default multilib libasan packages. ++ ++ [ Thibaut Girka ] ++ * Fix dh_shlibdeps and dh_gencontrol cross-build mangling for ++ libgfortran-dev packages. ++ ++ -- Matthias Klose Sat, 09 Feb 2013 17:00:06 +0100 ++ ++gcc-4.8 (4.8-20130127-1) experimental; urgency=low ++ ++ * GCC snapshot 20130127, taken from the trunk. ++ ++ [ Matthias Klose ] ++ * Fix MULTILIB_OS_DIRNAME for the default multilib on x32. ++ ++ [ Thibaut Girka ] ++ * Fix installation path for libatomic and libsanitizer when building a ++ cross-compiler with with_deps_on_target_arch_pkgs. ++ * Fix regexp used to list patched autotools files. ++ ++ -- Matthias Klose Sun, 27 Jan 2013 21:02:34 +0100 ++ ++gcc-4.8 (4.8-20130113-1) experimental; urgency=low ++ ++ * GCC snapshot 20130113, taken from the trunk. ++ * Always configure --with-system-zlib. ++ * Search library dependencies in the build-sysroot too. ++ * Don't complain about missing .substvars files when trying to mangle ++ these files. ++ * Add ARM multilib packages to the control file for staged cross builds. ++ * Fix ARM multilib shlibs dependency generation for cross builds. ++ * Don't call dh_shlibdeps for staged cross builds. These packages ++ are never shipped, and the information is irrelevant. ++ * Build the libasan and libtsan packages before libstdc++. ++ * Bump build dependencies on isl and cloog. ++ * Don't ship libiberty.a in gcc-4.8-hppa64. Closes: #659556. ++ ++ -- Matthias Klose Sun, 13 Jan 2013 16:42:33 +0100 ++ ++gcc-4.8 (4.8-20130105-1) experimental; urgency=low ++ ++ * GCC snapshot 20130105, taken from the trunk. ++ * Keep the debug link for libstdc++6. Closes: #696854. ++ * Update libgfortran symbols file for the trunk. ++ * Fix libstdc++ symbols files for sparc 128bit symbols. ++ * Update libgcc and libstdc++ symbols files for s390. ++ * Keep the rt.jar symlink in the gcj-jre-headless package. ++ * Explicitly search multiarch and multilib system directories when ++ calling dh_shlibdeps. ++ * Let gjdoc accept -source 1.5|1.6|1.7. Addresses: #678945. ++ * Fix build configured with --enable-java-maintainer-mode. ++ * Don't ship .md5 files in the libstdc++-doc package. ++ ++ -- Matthias Klose Sat, 05 Jan 2013 13:47:51 +0100 ++ ++gcc-4.8 (4.8-20130102-1) experimental; urgency=low ++ ++ * GCC snapshot 20130102, taken from the trunk. ++ ++ [ Matthias Klose ] ++ * Resolve libgo dependencies with the built runtime libraries. ++ * Fix g++-4.8-multilib dependencies. ++ ++ [ Thibaut Girka ] ++ * Prepare for optional dependencies on the packages built on the ++ target architecture. ++ * When using the above, ++ - use the same settings for gcc_lib_dir, sysroot, header and C++ header ++ locations as for the native build. ++ - install libraries into the multiarch directories. ++ - use cpp-4.x- instead of gcc-4.x-base to collect doc files. ++ ++ -- Matthias Klose Wed, 02 Jan 2013 14:51:59 +0100 ++ ++gcc-4.8 (4.8-20121218-1) experimental; urgency=low ++ ++ * GCC snapshot 20121217, taken from the trunk. ++ * Fix dependency generation for asan and atomic multilibs. ++ * Fix libobjc-dbg dependencies on libgcc-dbg packages. ++ * Fix MULTIARCH_DIRNAME definition for powerpcspe (Roland Stigge). ++ Closes: #695661. ++ * Move .jar symlinks from the -jre-lib into the -jre-headless package. ++ ++ -- Matthias Klose Tue, 18 Dec 2012 16:44:42 +0100 ++ ++gcc-4.8 (4.8-20121217-1) experimental; urgency=low ++ ++ * GCC snapshot 20121217, taken from the trunk. ++ * Fix package builds with the common libraries provided by a newer ++ gcc-X.Y package. ++ * Drop build-dependency on libelf. ++ * Drop the g++-multilib build dependency, use the built compiler to ++ check which multilib variants can be run. Provide an asm symlink for ++ the build. ++ * Stop configuring cross compilers --with-headers --with-libs. ++ * Always call dh_shlibdeps with -l, pointing to the correct dependency ++ packages. ++ * Fix cross build stage1 package installation, only including the target ++ files in the gcc package. ++ * Explicitly configure with --enable-multiarch when doing builds ++ supporting the multiarch layout. ++ * Only configure --with-sysroot, --with-build-sysroot when values are set. ++ * Revert: For stage1 builds, include gcc_lib_dir files in the gcc package. ++ * Allow multilib enabled stage1 and stage2 cross builds. ++ * Don't check glibc version to configure --with-long-double-128. ++ * Don't auto-detect multilib osdirnames. ++ * Don't set a LD_LIBRARY_PATH when calling dh_shlibdeps in cross builds. ++ * Allow building a gcj cross compiler. ++ * Pretend that wheezy has x32 support (sid is now known as wheezy :-/). ++ ++ -- Matthias Klose Mon, 17 Dec 2012 18:37:14 +0100 ++ ++gcc-4.8 (4.8-20121211-1) experimental; urgency=low ++ ++ * GCC snapshot 20121211, taken from the trunk. ++ * Fix build failure on multilib configurations. ++ ++ -- Matthias Klose Tue, 11 Dec 2012 08:04:30 +0100 ++ ++gcc-4.8 (4.8-20121210-1) experimental; urgency=low ++ ++ * GCC snapshot 20121210, taken from the trunk. ++ * For cross builds, don't use the multiarch location for the C++ headers. ++ * For cross builds, fix multilib inter package dependencies. ++ * For cross builds, fix libc6 dependencies for non-default multilib packages. ++ * Build libasan packages on powerpc, ppc64. ++ * Only run the libgo testsuite for flags configured in RUNTESTFLAGS. ++ * Remove the cross-includes patch, not needed anymore with --with-sysroot=/. ++ * For cross builds, install into /usr/lib/gcc-cross to avoid file conflicts ++ with the native compiler for the target architecture. ++ * For cross builds, don't add /usr/local/include to the standard include ++ path, however /usr/local/include/ is still on the path. ++ * For cross builds, provide symbols files based on the symbols files for ++ the native build. Not picked up by dh_makeshlibs yet. ++ * Drop the g++-multilib build dependency, use the built compiler to ++ check which multilib variants can be run. ++ * Fix spu cross build on powerpc/ppc64. ++ * Make libgcj packages Multi-Arch: same, append the Debian architecture ++ name to the gcj java home. ++ * Don't encode versioned build dependencies on binutils and dpkg-dev in ++ the control file (makes the package cross-buildable). ++ * Only include gengtype for native builds. Needs upstream changes. ++ See #645018. ++ * Fix cross build failure with --enable-libstdcxx-debug. ++ * Only install libbacktrace if it is built. ++ * When cross building the native compiler, configure --with-sysroot=/ ++ and without --without-isl. ++ ++ -- Matthias Klose Mon, 10 Dec 2012 14:40:14 +0100 ++ ++gcc-4.8 (4.8-20121128-1) experimental; urgency=low ++ ++ [ Matthias Klose ] ++ * Update patches for GCC 4.8. ++ * Update debian/copyright for libatomic, libbacktrace, libsanitizer. ++ * Remove the soversion from the libstdc++*-dev packages. ++ * Build libatomic and libasan packages. ++ * Install the static libbacktrace library and header files. ++ * Update build-indep dependencies for building the libstdc++ docs. ++ * Fix build failure in libatomic with x32 multilibs, handle -mx32 like -m64. ++ * Apply proposed fix for PR fortran/55395, supposed to fix the build ++ failure on armhf and powerpc. ++ * For hardened builds, disable gcc-default-format-security for now, causing ++ build failure building the target libstdc++ library. ++ * Drop the gcc-no-add-needed patch, depend on binutils 2.22 instead. ++ * Fix gnat build failure on kfreebsd. ++ * Rename the gccgo info to gccgo-4.8 on installation. ++ * Install the libitm documentation (if built). ++ * Rename the gccgo info to gccgo-4.8 on installation, install into gccgo-4.8. ++ * Include libquadmath documentation in the gcc-4.8-doc package. ++ * Build libtsan packages. ++ * Add weak __aeabi symbols to the libgcc1 ARM symbol files. Closes: #677139. ++ * For stage1 builds, include gcc_lib_dir files in the gcc package. ++ * Point to gcc's README.Bugs when building gcj packages. Addresses: #623987. ++ ++ [ Thibaut Girka ] ++ * Fix libstdc++ multiarch include path for cross builds. ++ ++ -- Matthias Klose Sun, 28 Nov 2012 12:55:27 +0100 ++ ++gcc-4.7 (4.7.2-12) experimental; urgency=low ++ ++ * Update to SVN 20121127 (r193840) from the gcc-4_7-branch. ++ - Fix PR middle-end/55331 (ice on valid), PR tree-optimization/54976 (ice ++ on valid), PR tree-optimization/54894 (ice on valid), ++ PR middle-end/54735 (ice on valid), PR c++/55446 (wrong code), ++ PR fortran/55314 (rejects valid). ++ ++ [ Matthias Klose ] ++ * Fix x32 multiarch name (x86_64-linux-gnux32). ++ * gcc-4.7-base: Add break to gcc-4.4-base (<< 4.4.7). Closes: #690172. ++ * Add weak __aeabi symbols to the libgcc1 ARM symbol files. Closes: #677139. ++ * For stage1 builds, include gcc_lib_dir files in the gcc package. ++ ++ [ Thibaut Girka ] ++ * Fix libstdc++ multiarch include path for cross builds. ++ ++ -- Matthias Klose Tue, 27 Nov 2012 11:02:10 +0100 ++ ++gcc-4.7 (4.7.2-11) experimental; urgency=low ++ ++ * Update to SVN 20121124 (r193776) from the gcc-4_7-branch. ++ - Fix PR libgomp/55411, PR libstdc++/55413, PR middle-end/55142, ++ PR fortran/55352. ++ ++ * Update build-indep dependencies for building the libstdc++ docs. ++ * Drop the gcc-no-add-needed patch, depend on binutils 2.22 instead. ++ * Pass --hash-style=gnu instead of --hash-style=both. ++ * Link using --hash-style=gnu on arm64 by default. ++ * Split multiarch patches into local and upstreamed parts. ++ * Fix PR54974: Thumb literal pools don't handle PC rounding (Matthew ++ Gretton-Dann). LP: #1049614, #1065509. ++ * Rename the gccgo info to gccgo-4.7 on installation, install into gccgo-4.7. ++ * Include libquadmath documentation in the gcc-4.7-doc package. ++ * Don't pretend to understand .d files, no D frontend available for 4.7. ++ * Fix the multiarch c++ include path for multilib'd targets. LP: #1082344. ++ * Make explicit --{en,dis}able-multiarch options effecitive (Thorsten Glaser). ++ ++ -- Matthias Klose Sat, 24 Nov 2012 03:57:00 +0100 ++ ++gcc-4.7 (4.7.2-10) experimental; urgency=low ++ ++ * Update to SVN 20121118 (r193598) from the gcc-4_7-branch. ++ - Fix PR target/54892 (ARM, LP: #1065122), PR rtl-optimization/54870, ++ PR rtl-optimization/53701, PR target/53975 (ia64), ++ PR tree-optimization/54902 (LP: #1065559), PR middle-end/54945, ++ PR target/55019 (ARM), PR c++/54984, PR target/55175, ++ PR tree-optimization/53708, PR tree-optimization/54985, ++ PR libstdc++/55169, PR libstdc++/55047, PR libstdc++/55123, ++ PR libstdc++/54075, PR libstdc++/28811, PR libstdc++/54482, ++ PR libstdc++/55028, PR libstdc++/55215, PR middle-end/55219, ++ PR tree-optimization/54986, PR target/55204, PR debug/54828, ++ PR tree-optimization/54877, PR c++/54988, PR other/52438, ++ PR fortran/54917, PR libstdc++/55320, PR libstdc++/53841. ++ ++ [ Matthias Klose ] ++ * Update the Linaro support to the 4.7-2012.11 release. ++ * Define MULTIARCH_DIRNAME for arm64 (Wookey). ++ * Let the lib*objc-dev packages depend on the lib*gcc-dev packages. ++ * Let the libstdc++-dev package depend on the libgcc-dev package. ++ * Drop the dependency of the libstdc++-dev package on g++, make ++ libstdc++-dev and libstdc++-pic Multi-Arch: same. Closes: #678623. ++ * Install override files before calling dh_fixperms. ++ * Backport the libffi arm64 port. ++ * Build libx32gcc-dev, libx32objc-dev and libx32gfortran-dev packages. ++ * Allow conditional building of the x32 multilibs. ++ * Fix libmudflap build failure for x32 multilibs. ++ * Fix dependency on glibc for triarch builds. ++ * Add build-{arch,indep} targets. ++ * Fix libquadmath x32 multilib builds on kernels which don't support x32. ++ * Fix location of x32 specific C++ header files. ++ * Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++, ++ only if the optimization level is > 0. ++ * Keep the host alias when building multilib libraries which need to ++ be cross-built on some architectures/buildds. ++ * Update arm64 from the aarch64 branch 20121105. ++ * Fix PR other/54411, libiberty: objalloc_alloc integer overflows ++ (CVE-2012-3509). ++ * Use /usr/include//c++/4.x as the include directory ++ for host dependent c++ header files. ++ * Add alternative libelf-dev build dependency. Closes: #690952. ++ * Always build the aarch64-linux-gnu target from the Linaro branch. ++ * Add __gnu_* symbols to the libgcc1 symbols file for armel and armhf. ++ * For powerpcspe prevent floating point register handling when there ++ are none available (Roland Stigge). Closes: #693328. ++ * Don't apply hurd-pthread.diff for trunk builds, integrated ++ upstream (Samuel Thibault). Addresses: #692538. ++ * Again, suggest graphite runtime dependencies. ++ * Clean up libstdc++ man pages. Closes: #692445. ++ ++ [ Thibaut Girka ] ++ * Split out lib*gcc-dev packages. ++ * Split out lib*objc-dev packages. ++ * Split out lib*gfortran-dev packages. ++ ++ [ Daniel Schepler ] ++ * Add support for x32. Closes: #667005. ++ * New patch hjl-x32-gcc-4_7-branch.diff to incorporate changes from ++ that branch, including --with-abi=mx32 option. ++ * Split out lib*stdc++-dev packages. ++ ++ [ Marcin Juszkiewicz ] ++ * lib*-dev packages for cross builds are not Multi-Arch: same. LP: #1070694. ++ * Remove conflicts for armhf/armel cross packages. ++ ++ -- Matthias Klose Sun, 18 Nov 2012 17:54:15 +0100 ++ ++gcc-4.7 (4.7.2-4) unstable; urgency=low ++ ++ * Fix PR c++/54858 (ice on valid), taken from the branch. ++ * Build again Go on armel and armhf. ++ ++ -- Matthias Klose Tue, 09 Oct 2012 12:00:59 +0200 ++ ++gcc-4.7 (4.7.2-3) unstable; urgency=low ++ ++ * Revert the fix PR c/33763, and just disable the sorry message, ++ taken from the branch. Closes: #678589. LP: #1062343. ++ * Update libgo to 1.0.3. ++ * Go fixes: ++ - Fix a, b, c := b, a, 1 when a and b already exist. ++ - Fix some type reflection strings. ++ - Fix parse of (<- chan <- chan <- int)(x). ++ - Fix handling of omitted expression in switch. ++ - Better error for switch on non-comparable type. ++ * Fix PR debug/53135 (ice on valid), PR target/54703 (x86, wrong code), ++ PR c++/54777 (c++11, rejects valid), taken from the 4.7 branch. ++ * gcc-4.7-base: ensure smooth upgrades from squeeze by adding ++ Breaks: gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~) ++ as in gcc-4.4-base (multiarch patches re-worked in 4.6.1-8/4.4.6-9). ++ Fixes some squeeze->wheezy upgrade paths where apt chooses to hold back ++ gcc-4.4-base and keep gcj-4.4-base installed instead of upgrading ++ gcc-4.4-base and removing the obsolete gcj-4.4-base (Andreas Beckmann). ++ Closes: #677582. ++ * Add arm64 support, partly based on Wookey's patches (only applied for ++ arm64). Disabled for arm64 are ssp, gomp, mudflap, boehm-gc, Ada, ObjC, ++ Obj-C++ and Java). ++ ++ -- Matthias Klose Fri, 05 Oct 2012 20:00:30 +0200 ++ ++gcc-4.7 (4.7.2-2) unstable; urgency=low ++ ++ * Fix PR tree-optimization/54563 (ice on valid), PR target/54564 (fma builtin ++ fix), PR c/54552 (ice on valid), PR lto/54312 (memory hog), PR c/54103 (ice ++ on valid), PR middle-end/54638 (memory corruption), taken from the 4.7 ++ branch. ++ * Go fixes, taken from the 4.7 branch. ++ * On ARM, don't warn anymore that 4.4 has changed the `va_list' mangling, ++ taken from the trunk. ++ * Mention the NEWS changes for all uploads. Closes: #688278. ++ ++ -- Matthias Klose Fri, 21 Sep 2012 11:58:10 +0200 ++ ++gcc-4.7 (4.7.2-1) unstable; urgency=low ++ ++ * GCC 4.7.2 release. ++ * Issues addressed after the release candidate: ++ - PR c++/53661 (wrong warning), LTO backport from trunk, documentation fix. ++ * Update NEWS files. ++ ++ -- Matthias Klose Thu, 20 Sep 2012 12:19:07 +0200 ++ ++gcc-4.7 (4.7.1-9) unstable; urgency=low ++ ++ * GCC 4.7.2 release candidate 1. ++ * Update to SVN 20120914 (r191306) from the gcc-4_7-branch. ++ - Fix PR libstdc++/54388, PR libstdc++/54172, PR libstdc++/54172, ++ PR debug/54534, PR target/54536 (AVR), PR middle-end/54515 (ice on valid), ++ PR c++/54506 (rejects valid), PR c++/54341 (ice on valid), ++ PR c++/54253 (ice on valid), PR c/54559 (closes: #687496), ++ PR gcov-profile/54487, PR c++/53839, PR c++/54511, PR c++/53836, ++ PR fortran/54556. ++ * Update the Linaro support to the 4.7-2012.09 release. ++ - Adds support for the NEON vext instruction when shuffling. ++ - Backports improvements to scheduling transfers between VFP and core ++ registers. ++ - Backports support for the UBFX instruction on certain bit extract idioms. ++ ++ -- Matthias Klose Fri, 14 Sep 2012 19:12:47 +0200 ++ ++gcc-4.7 (4.7.1-8) unstable; urgency=low ++ ++ * Update to SVN 20120908 (r191092) from the gcc-4_7-branch. ++ - Fix PR libstdc++/54376, PR libstdc++/54297, PR libstdc++/54351, ++ PR libstdc++/54297, PR target/54461 (AVR), PR target/54476 (AVR), ++ PR target/54220 (AVR), PR fortran/54208 (rejects valid), ++ PR middle-end/53667 (wrong code), PR target/54252 (ARM, wrong code), ++ PR rtl-optimization/54455 (ice on valid), PR driver/54335 (docs), ++ PR tree-optimization/54498 (wrong code), PR target/45070 (wrong code), ++ PR tree-optimization/54494 (wrong code), PR target/54436 (x86), ++ PR c/54428 (ice on valid), PR c/54363 (ice on valid, closes: #684635), ++ PR rtl-optimization/54369 (mips, sparc, wrong code), PR middle-end/54146, ++ PR target/46254 (ice on valid), PR rtl-optimization/54088 (ice on valid), ++ PR target/54212 (ARM, wrong code), PR c++/54197 (wrong code), ++ PR lto/53572, PR tree-optimization/53922 (wrong code). ++ - Go fixes. ++ ++ [ Nobuhiro Iwamatsu ] ++ * Remove sh4-enable-ieee.diff, -mieee enabled by default. Closes: #685975. ++ ++ [ Matthias Klose ] ++ * Fix PR c++/54341, PR c++/54253, taken from the trunk. Closes: #685430. ++ * Update libitm package description. Closes: #686802. ++ ++ -- Matthias Klose Fri, 07 Sep 2012 22:16:55 +0200 ++ ++gcc-4.7 (4.7.1-7) unstable; urgency=low ++ ++ * Update to SVN 20120814 (r190380) from the gcc-4_7-branch. ++ - Fix PR libstdc++/54036, PR target/53961 (x86), PR libstdc++/54185, ++ PR rtl-optimization/53942, PR rtl-optimization/54157. ++ ++ [ Thibaut Girka ] ++ * Fix cross compilers for 64bit architectures when using ++ DEB_CROSS_NO_BIARCH. ++ * Fix glibc dependency for multiarch enabled builds for architectures ++ with a different libc-dev package name. ++ ++ [ Aurelien Jarno ] ++ * powerpc64: Fix non-multilib builds. ++ ++ [ Matthias Klose ] ++ * Fix syntax error generating the control file for cross builds. ++ Closes: #682104. ++ * spu build: Move static libraries to version specific directories. ++ Closes: #680022. ++ * Don't run the libstdc++ tests on mipsel, times out on the buildds. ++ * Update the Linaro support to the 4.7-2012.08 release. ++ ++ -- Matthias Klose Tue, 14 Aug 2012 13:58:03 +0200 ++ ++gcc-4.7 (4.7.1-6) unstable; urgency=low ++ ++ * Update to SVN 20120731 (r190015) from the gcc-4_7-branch. ++ - Fix PR libstdc++/54075, PR libstdc++/53270, PR libstdc++/53978, ++ PR target/33135 (SH), PR target/53877 (x86), PR rtl-optimization/52250, ++ PR middle-end/54017, PR target/54029, PR target/53961 (x86), ++ PR target/53110 (x86), PR rtl-optimization/53908, PR c++/54038, ++ PR c++/54026, PR c++/53995, PR c++/53989, PR c++/53549 (closes: #680931), ++ PR c++/53953. ++ ++ -- Matthias Klose Tue, 31 Jul 2012 20:00:56 +0200 ++ ++gcc-4.7 (4.7.1-5) unstable; urgency=high ++ ++ * Update to SVN 20120713 (r189464) from the gcc-4_7-branch. ++ - Fix PR libstdc++/53657, PR c++/53733 (DR 1402), PR target/53811, ++ PR target/53853. ++ ++ -- Matthias Klose Fri, 13 Jul 2012 16:59:59 +0200 ++ ++gcc-4.7 (4.7.1-4) unstable; urgency=medium ++ ++ * Update to SVN 20120709 (r189388) from the gcc-4_7-branch. ++ - Fix PR libstdc++/53872, PR libstdc++/53830, PR bootstrap/52947, ++ PR middle-end/52786, PR middle-end/50708, PR tree-optimization/53693, ++ PR middle-end/52621, PR middle-end/53433, PR fortran/53732, ++ PR libstdc++/53578, PR c++/53882 (closes: #680521), PR c++/53826. ++ * Update the Linaro support to the 4.7-2012.07 release. ++ * Fix build on pre-multiarch releases (based on a patch from Chip Salzenberg). ++ Closes: #680590. ++ ++ -- Matthias Klose Mon, 09 Jul 2012 18:58:47 +0200 ++ ++gcc-4.7 (4.7.1-3) unstable; urgency=low ++ ++ * Update to SVN 20120703 (r189219) from the gcc-4_7-branch. ++ - Fix PR preprocessor/37215, PR middle-end/38474, PR target/53595 (AVR), ++ PR middle-end/53790, PR debug/53682, PR target/53759 (x86), ++ PR c++/53816, PR c++/53821, PR c++/51214, PR c++/53498, PR c++/53305, ++ PR c++/52988 (wrong code), PR c++/53202 (wrong code), PR c++/53594. ++ - The change for PR libstdc++/49561 was reverted. The std::list size is ++ now the same again in c++98 and c++11 mode. ++ * Revert the local std::list work around. ++ * Build using isl instead of ppl for snapshot builds. ++ ++ -- Matthias Klose Tue, 03 Jul 2012 15:07:14 +0200 ++ ++gcc-4.7 (4.7.1-2) unstable; urgency=medium ++ ++ * Update to SVN 20120623 (r188906) from the gcc-4_7-branch. ++ - Fix PR rtl-optimization/53700 (closes: #677678), PR target/52908, ++ PR libstdc++/53270, PR libstdc++/53678, PR gcov-profile/53744, ++ PR c++/52637, PR middle-end/53470, PR c++/53651, PR c++/53137, ++ PR c++/53599, PR fortran/53691, PR fortran/53685, PR ada/53592. ++ * Update NEWS files for 4.7.1. ++ * Bump gcc/FULL-VERSION to 4.7.1. ++ * Update the Linaro support to the 4.7-2012.06 release. ++ * Restore std::list ABI compatibility in c++11 mode. The upstream behaviour ++ can be enabled defining __CXX0X_STD_LIST_ABI_INCOMPAT__. This work around ++ will be replaced with an upstream solution. ++ * Fix PR debug/53682, taken from the trunk. Closes: #677606. ++ * Use $(with_gccbase) and $(with_gccxbase) to determine whether to enable it ++ in the control file (Thibaut Girka). ++ * When building a cross-compiler, runtime libraries for the target ++ architecture may be cross-built. Tell debhelper/dpkg-dev those packages ++ are indeed for a foreign architecture (Thibaut Girka). ++ ++ -- Matthias Klose Sat, 23 Jun 2012 11:58:35 +0200 ++ ++gcc-4.7 (4.7.1-1) unstable; urgency=low ++ ++ * GCC 4.7.1 release. ++ ++ -- Matthias Klose Fri, 15 Jun 2012 00:38:27 +0200 ++ ++gcc-4.7 (4.7.0-13) unstable; urgency=low ++ ++ * Update to SVN 20120612 (r188457) from the gcc-4_7-branch. ++ - Fix PR c++/53602 (LP: #1007616). ++ ++ * Document the changed ssp-buffer-size default in Ubuntu 10.10 and ++ later (Kees Cook). LP: #990141. ++ * Fix PR c++/26155, ICE after error with namespace alias. LP: #321883. ++ * Fix PR c++/53599 (reverting the fix for PR c++/53137). ++ Closes: #676729. LP: #1010896. ++ * Fix manual page names for cross builds (Thibaut Girka). Closes: #675516. ++ * Remove dpkg-cross build dependency for cross builds (Thibaut Girka). ++ Closes: #675511. ++ ++ -- Matthias Klose Tue, 12 Jun 2012 15:47:57 +0200 ++ ++gcc-4.7 (4.7.0-12) unstable; urgency=low ++ ++ * Update to SVN 20120606 (r188261) from the gcc-4_7-branch (release ++ candidate 1 or 4.7.1). ++ - Fix PR libstdc++/52007, PR c++/53524, PR target/53559, ++ PR middle-end/47530, PR middle-end/53471, PR middle-end/52979, ++ PR target/46261, PR tree-optimization/53550, PR middle-end/52080, ++ PR middle-end/52097, PR middle-end/48124, PR middle-end/53501, ++ PR target/52667, PR target/52642, PR middle-end/48493, PR c++/53524, ++ PR c++/52973, PR c++/52725, PR c++/53137, PR c++/53484, PR c++/53500, ++ PR c++/52905, PR fortran/53521. ++ - Go and libgo updates. ++ * Include README.Debian in README.Debian.. ++ * Fix PR c/33763, proposed patch from the issue. Closes: #672411. ++ * Fix build failure in libgo with hardening defaults. ++ ++ -- Matthias Klose Wed, 06 Jun 2012 13:22:27 +0200 ++ ++gcc-4.7 (4.7.0-11) unstable; urgency=low ++ ++ * Update to SVN 20120530 (r188035) from the gcc-4_7-branch. ++ - Fix PR c++/53356, PR c++/53491, PR c++/53503, PR c++/53220, ++ PR middle-end/53501, PR rtl-optimization/53519, ++ PR tree-optimization/53516, PR tree-optimization/53438, ++ PR target/52999, PR middle-end/53008. ++ ++ [ Matthias Klose ] ++ * Build-depend on netbase when building Go. Closes: #674306. ++ ++ [ Marcin Juszkiewicz ] ++ * Use the multiarch default for staged builds. ++ ++ -- Matthias Klose Thu, 31 May 2012 08:25:08 +0800 ++ ++gcc-4.7 (4.7.0-10) unstable; urgency=low ++ ++ * Update to SVN 20120528 (r187927) from the gcc-4_7-branch. ++ - Fix PR rtl-optimization/52528, PR lto/52178, PR target/53435, ++ PR ada/52362, PR target/53385, PR middle-end/53460, ++ PR tree-optimization/53465, PR target/53448, PR tree-optimization/53408, ++ PR ada/52362, PR fortran/53389. ++ * Fix warning building libiberty/md5.c. PR other/53285. Closes: #674830. ++ ++ -- Matthias Klose Mon, 28 May 2012 11:30:36 +0800 ++ ++gcc-4.7 (4.7.0-9) unstable; urgency=low ++ ++ * Update to SVN 20120522 (r187756) from the gcc-4_7-branch. ++ - Fix PR bootstrap/53183, PR tree-optimization/53436, ++ PR tree-optimization/53366, PR tree-optimization/53409, ++ PR tree-optimization/53410, PR c/53418, PR target/53416, ++ PR middle-end/52584, PR debug/52727, PR tree-optimization/53364, ++ PR target/53358, PR rtl-optimization/52804, PR target/46098, ++ PR target/53256, PR c++/53209, PR c++/53301, PR ada/52494, ++ PR fortran/53310 ++ * Update the Linaro support to the 4.7-2012.05 release. ++ ++ -- Matthias Klose Tue, 22 May 2012 13:01:33 +0800 ++ ++gcc-4.7 (4.7.0-8) unstable; urgency=low ++ ++ * Update to SVN 20120509 (r187339) from the gcc-4_7-branch. ++ - Fix PR libstdc++/53193, PR target/53272, PR tree-optimization/53239, ++ PR tree-optimization/53195, PR target/52999, PR target/53228, ++ PR tree-optimization/52633, PR tree-optimization/52870, PR target/48496, ++ PR target/53199, PR target/52684, PR lto/52605, PR plugins/53126, ++ PR debug/53174, PR target/53187, PR tree-optimization/53144, ++ PR c++/53186, PR fortran/53255, PR fortran/53111, PR fortran/52864. ++ - Fix plugin check in gcc-{ar,nm,ranlib}-4.7. ++ * Install man pages for gcc-{ar,nm,ranlib}-4.7. ++ ++ -- Matthias Klose Mon, 07 May 2012 21:56:42 +0200 ++ ++gcc-4.7 (4.7.0-7) unstable; urgency=low ++ ++ * Update to SVN 20120502 (r187039) from the gcc-4_7-branch. ++ - Fix PR libstdc++/53115, PR tree-optimization/53163, ++ PR rtl-optimization/53160, PR middle-end/53136, PR fortran/53148. ++ - libgo fix for mips. ++ * Fix setting MULTILIB_DEFAULTS for ARM multilib builds. ++ * Build Go on mips. ++ * Revert: Don't build multilib gnat on armel and armhf. ++ * Fix multiarch patch for alpha (Michael Cree). Closes: #670571. ++ * Fix Go multilib packaging issue for mips and mipsel. ++ ++ -- Matthias Klose Wed, 02 May 2012 12:42:01 +0200 ++ ++gcc-4.7 (4.7.0-6) unstable; urgency=low ++ ++ * Update to SVN 20120430 (r186964) from the gcc-4_7-branch. ++ - Fix PR target/53138. ++ * Build Go on ARM. ++ * Treat wheezy the same as sid in more places (Peter Green). ++ Addresses: #670821. ++ ++ -- Matthias Klose Mon, 30 Apr 2012 13:06:21 +0200 ++ ++gcc-4.7 (4.7.0-5) unstable; urgency=medium ++ ++ * Update to SVN 20120428 (r186932) from the gcc-4_7-branch. ++ - Fix PR c/52880, PR target/53065, PR tree-optimization/53085, ++ PR c/51527, PR target/53120. ++ ++ [ Matthias Klose ] ++ * Don't build multilib gnat on armel and armhf. ++ * Don't try to run the libstdc++ testsuite if the C++ frontend isn't built. ++ * Install the unwind-arm-common.h header file. ++ * Fix ARM biarch package builds. ++ ++ [ Aurelien Jarno ] ++ * Reenable parallel builds on GNU/kFreeBSD. ++ * Fix libgcc building on MIPS N32/64. Closes: #669858. ++ * Add libn32gcc1 and lib64gcc1 symbols files on mips and mipsel. ++ ++ -- Matthias Klose Sat, 28 Apr 2012 11:59:36 +0200 ++ ++gcc-4.7 (4.7.0-4) unstable; urgency=low ++ ++ * Update to SVN 20120424 (r186746) from the gcc-4_7-branch. ++ - Fix PR libstdc++/52924, PR libstdc++/52591, PR middle-end/52894, ++ PR testsuite/53046, PR libstdc++/53067, PR libstdc++/53027, ++ PR libstdc++/52839, PR bootstrap/52840, PR libstdc++/52689, ++ PR libstdc++/52699, PR libstdc++/52822, PR libstdc++/52942, ++ PR middle-end/53084, PR middle-end/52999, PR c/53060, ++ PR tree-optimizations/52891, PR target/53033, PR target/53020, ++ PR target/52932, PR middle-end/52939, PR tree-optimization/52969, ++ PR c/52862, PR target/52775, PR tree-optimization/52943, PR c++/53003, ++ PR c++/38543, PR c++/50830, PR c++/50303, PR c++/52292, PR c++/52380, ++ PR c++/52465, PR c++/52824, PR c++/52906. ++ ++ [ Matthias Klose ] ++ * Update the Linaro support to the 4.7-2012.04 release. ++ * Set the ARM hard-float linker path according to the consensus: ++ http://lists.linaro.org/pipermail/cross-distro/2012-April/000261.html ++ * Reenable the spu build on ppc64. Closes: #668272. ++ * Update and reenable the gcc-cloog-dl patch. ++ ++ [ Samuel Thibault ] ++ * ada-s-osinte-gnu.adb.diff, ada-s-osinte-gnu.ads.diff, ++ ada-s-taprop-gnu.adb.diff, gcc_ada_gcc-interface_Makefile.in.diff: ++ Add ada support for GNU/Hurd, thanks Svante Signell for the patches ++ and bootstrap! (Closes: #668426). ++ ++ -- Matthias Klose Tue, 24 Apr 2012 08:44:15 +0200 ++ ++gcc-4.7 (4.7.0-3) unstable; urgency=low ++ ++ * Update to SVN 20120409 (r186249) from the gcc-4_7-branch. ++ - Fix PR libitm/52854, PR libstdc++/52476, PR target/52717, ++ PR tree-optimization/52406, PR c++/52596, PR c++/52796, ++ PR fortran/52893, PR fortran/52668. ++ ++ [ Matthias Klose ] ++ * Re-add missing dependency on libgcc in gcc-multilib. Closes: #667519. ++ * Add support for GNU locales for GNU/Hurd (Svante Signell). ++ Closes: #667662. ++ * Reenable the spu build on ppc64. Closes: #664617. ++ * Apply proposed patch for PR52894, stage1 bootstrap failure on hppa ++ (John David Anglin). Closes: #667969. ++ ++ [ Nobuhiro Iwamatsu ] ++ * Fix cross build targeting sh4. Closes: #663028. ++ * Enable -mieee by default on sh4. Closes: #665328. ++ ++ -- Matthias Klose Mon, 09 Apr 2012 22:24:14 +0200 ++ ++gcc-4.7 (4.7.0-2) unstable; urgency=low ++ ++ * Update to SVN 20120403 (r186107) from the gcc-4_7-branch. ++ - Fix PR middle-end/52547, PR libstdc++/52540, PR libstdc++/52433, ++ PR target/52507, PR target/52505, PR target/52461, PR target/52508, ++ PR c/52682, PR target/52610, PR middle-end/52640, PR target/50310, ++ PR target/48596, PR target/48806, PR middle-end/52547, R target/52496, ++ PR rtl-optimization/52543, PR target/52461, PR target/52488, ++ PR target/52499, PR target/52148, PR target/52496, PR target/52484, ++ PR target/52506, PR target/52505, PR target/52461, PR other/52545, ++ PR c/52577, PR c++/52487, PR c++/52671, PR c++/52582, PR c++/52521, ++ PR fortran/52452, PR target/52737, PR target/52698, PR middle-end/52693, ++ PR middle-end/52691, PR middle-end/52750, PR target/52692, ++ PR middle-end/51893, PR target/52737, PR target/52736, PR middle-end/52720, ++ PR c++/52672, PR c++/52718, PR c++/52685, PR c++/52759, PR c++/52743, ++ PR c++/52746, PR libstdc++/52799, PR libgfortran/52758, ++ PR middle-end/52580, PR middle-end/52493, PR tree-optimization/52678, ++ PR tree-optimization/52701, PR tree-optimization/52754, ++ PR tree-optimization/52835. ++ ++ [ Matthias Klose ] ++ * Update NEWS files for 4.7. ++ * Include -print-multiarch option in gcc --help output. Closes: #656998. ++ * Don't build Go on MIPS. ++ * Update alpha-ieee.diff for 4.7. ++ * Update gcc-multiarch.diff for sh4 (untested). Closes: #665935. ++ * Update gcc-multiarch.diff for hppa (untested). Closes: #666162. ++ * Re-add build dependency on doxygen. ++ ++ [ Samuel Thibault ] ++ * debian/patches/ada-bug564232.diff: Enable on hurd too. ++ * debian/patches/ada-libgnatprj.diff: Add hurd configuration. ++ ++ -- Matthias Klose Tue, 03 Apr 2012 16:30:58 +0200 ++ ++gcc-4.7 (4.7.0-1) unstable; urgency=low ++ ++ * GCC 4.7.0 release. ++ ++ -- Matthias Klose Fri, 23 Mar 2012 05:44:37 +0100 ++ ++gcc-4.7 (4.7.0~rc2-1) experimental; urgency=low ++ ++ * GCC-4.7 release candidate 2 (r185376). ++ * libgo: Work around parse error of struct timex_ on ARM. ++ * Update libstdc++6 symbols files. ++ * Allow building Go from a separate source package. ++ * Don't configure with --enable-gnu-unique-object on kfreebsd and hurd. ++ * Include -print-multiarch option in gcc --help output. Closes: #656998. ++ * Disable Go on mips* (PR go/52586). ++ ++ -- Matthias Klose Wed, 14 Mar 2012 15:49:39 +0100 ++ ++gcc-4.7 (4.7.0~rc1-2) experimental; urgency=low ++ ++ * Update to SVN 20120310 (r185183) from the gcc-4_6-branch. ++ * Always configure with --enable-gnu-unique-object. LP: #949805. ++ * Enable Go for ARM on releases with working getcontext/setcontext. ++ ++ -- Matthias Klose Sat, 10 Mar 2012 23:29:45 +0100 ++ ++gcc-4.7 (4.7.0~rc1-1) experimental; urgency=low ++ ++ * GCC-4.7 release candidate 1 (r184777). ++ ++ [ Marcin Juszkiewicz ] ++ * Fix ARM sf/hf multilib dpkg-shlibdeps dependency generation. ++ ++ [ Matthias Klose ] ++ * PR go/52218, don't build Go on ARM, getcontext/setcontext exists, ++ but return ENOSYS. ++ * Fix multiarch build on ia64. ++ * Fix path calculation for the libstdc++ -gdb.py file when installed into ++ multiarch locations. Closes: #661385. LP: #908163. ++ * Disable Go on sparc (libgo getcontext/setcontext check failing). ++ ++ [ Thorsten Glaser ] ++ * Apply patch from Alan Hourihane to fix err_bad_abi testcase on m68k. ++ ++ [ Jonathan Nieder ] ++ * libstdc++6: Depends on libc (>= 2.11) for STB_GNU_UNIQUE support ++ (Eugene V. Lyubimkin). Closes: #584572. ++ * libstdc++6, libobjc2, libgfortran3, libmudflap0, libgomp1: Breaks ++ pre-multiarch gcc. Closes: #651550. ++ * libstdc++6: Lower priority from required to important. Closes: #661118. ++ ++ [Samuel Thibault] ++ * Remove local patch, integrated upstream. Closes: ##661859. ++ ++ -- Matthias Klose Fri, 02 Mar 2012 18:42:56 +0100 ++ ++gcc-4.7 (4.7-20120210-1) experimental; urgency=low ++ ++ * GCC-4.7 snapshot build, taken from the trunk 20120210 (r184114). ++ * kbsd-gnu.diff: Remove, integrated upstream. ++ * Strip whitespace from with_libssp definition. Closes: #653255. ++ * Remove soft-float symbols from 64bit powerpc libgcc1 symbols files. ++ * Fix control file generation for cross packages. LP: #913734. ++ ++ -- Matthias Klose Fri, 10 Feb 2012 21:38:12 +0100 ++ ++gcc-4.7 (4.7-20120205-1) experimental; urgency=low ++ ++ * GCC-4.7 snapshot build, taken from the trunk 20120205 (r183903). ++ * Enable Go on arm*, ia64, mips*, powerpc, s390*, sparc*. ++ * libgo: Fix ioctl macro extracton. ++ * Fix PR middle-end/52074, ICE in libgo on powerpc. ++ * Revert: * Install static libc++{98,11} libraries. ++ * Don't strip a `/' sysroot from the C++ include directories. ++ Closes: #658442. ++ ++ -- Matthias Klose Sun, 05 Feb 2012 09:16:03 +0100 ++ ++gcc-4.7 (4.7-20120129-1) experimental; urgency=low ++ ++ * GCC-4.7 snapshot build, taken from the trunk 20120129 (r183674). ++ * Configure --with-sysroot for wheezy and sid. ++ * Install static libc++{98,11} libraries. ++ * Install libstdc++ gdb.py file into /usr/lib/debug. ++ * Just copy libstdc++convenience.a for the libstdc++_pic installation. ++ * Remove trailing dir separator from system root. ++ ++ -- Matthias Klose Sun, 29 Jan 2012 08:19:27 +0100 ++ ++gcc-4.7 (4.7-20120121-1) experimental; urgency=low ++ ++ * GCC-4.7 snapshot build, taken from the trunk 20120121 (r183370). ++ ++ [ Matthias Klose ] ++ * Fix C++ include paths when configured --with-system-root. ++ ++ [ Marcin Juszkiewicz ] ++ * Fix control file generation for ARM multiarch cross builds. ++ ++ -- Matthias Klose Sat, 21 Jan 2012 20:24:29 +0100 ++ ++gcc-4.7 (4.7-20120107-1) experimental; urgency=low ++ ++ * GCC-4.7 snapshot build, taken from the trunk 20120107 (r182981). ++ ++ * On armel/armhf, allow g*-multilib installation using the runtime ++ libraries of the corresponding multiarch architecture. ++ * Fix location of .jinfo files. Addresses: #654579. ++ * Replace Fortran 95 with Fortran in package descriptions. ++ ++ -- Matthias Klose Sat, 07 Jan 2012 21:24:56 +0100 ++ ++gcc-4.7 (4.7-20111231-1) experimental; urgency=low ++ ++ * GCC-4.7 snapshot build, taken from the trunk 20111231 (r182754). ++ ++ [ Aurelien Jarno ] ++ * Re-enable parallel builds on kfreebsd-i386, as the problem from bug ++ #637236 only affects kfreebsd-amd64. ++ ++ [ Matthias Klose ] ++ * Fix generating libphobos dependency for gdc. Addresses: #653078. ++ * Link libmudflapth.so with -lpthread. ++ ++ -- Matthias Klose Sat, 31 Dec 2011 09:42:13 +0100 ++ ++gcc-4.7 (4.7-20111222-1) experimental; urgency=low ++ ++ * Update to SVN 20111222 (r182617) from the trunk. ++ ++ [Matthias Klose] ++ * Remove obsolete ARM patch. ++ * Install loongson.h header. ++ * Update libgcc and libstdc++ symbols files. ++ ++ [Samuel Thibault] ++ * Update hurd patch for 4.7, fixing build failure. Closes: #652693. ++ ++ [Robert Millan] ++ * Update kbsd-gnu.diff for the trunk. ++ ++ -- Matthias Klose Thu, 22 Dec 2011 10:52:01 +0100 ++ ++gcc-4.7 (4.7-20111217-2) experimental; urgency=low ++ ++ * Don't provide 4.6.x symlinks. ++ * Disable multilib for armhf. ++ * Fix spu installation. ++ ++ -- Matthias Klose Sun, 18 Dec 2011 17:22:10 +0100 ++ ++gcc-4.7 (4.7-20111217-1) experimental; urgency=low ++ ++ * GCC-4.7 snapshot build. ++ - Including the GFDL documentation; will stay in experimental ++ until the 4.7.0 release sometime next year. ++ * Update patches for the trunk. ++ * Update symbols files. ++ * Build libitm packages. ++ ++ -- Matthias Klose Sat, 17 Dec 2011 23:19:46 +0100 ++ ++gcc-4.6 (4.6.2-9) unstable; urgency=medium ++ ++ * Update to SVN 20111217 (r182430) from the gcc-4_6-branch. ++ - Fix PR c++/51331. ++ * Fix build dependencies for armel/armhf. ++ ++ -- Matthias Klose Sat, 17 Dec 2011 10:40:26 +0100 ++ ++gcc-4.6 (4.6.2-8) unstable; urgency=low ++ ++ * Update to SVN 20111216 (r182407) from the gcc-4_6-branch. ++ - Fix PR tree-optimization/51485, PR tree-optimization/50569, PR c++/51248, ++ PR c++/51406, PR c++/51161, PR rtl-optimization/49720, PR fortran/50923, ++ PR fortran/51338, PR fortran/51550, PR fortran/47545, PR fortran/49050, ++ PR fortran/51075. ++ ++ [ Matthias Klose ] ++ * gdc-4.6: Provide -{gdc,gdmd}-4.6 symlinks. ++ ++ [Ludovic Brenta] ++ Merge from gnat-4.6 (4.6.2-2) unstable; urgency=low ++ [Євгеній Мещеряков] ++ * debian/patches/pr47818.diff: new. Fixes: #614402. ++ * debian/rules.patch: apply it. ++ ++ Merge from gnat-4.6 (4.6.2-1) unstable; urgency=low ++ [Ludovic Brenta] ++ * Suggest ada-reference-manual-{html,info,pdf,text} instead of just ++ ada-reference-manual which no longer exists. ++ * Do not suggest gnat-gdb, superseded by gdb. ++ * Downgrade libgnat{vsn,prj}4.6-dev to priority extra; they conflict ++ with their 4.4 counterparts and priority optional packages may not ++ conflict with one another, per Policy 2.5. ++ ++ -- Matthias Klose Fri, 16 Dec 2011 16:59:30 +0100 ++ ++gcc-4.6 (4.6.2-7) unstable; urgency=medium ++ ++ * Update to SVN 20111210 (r182189) from the gcc-4_6-branch. ++ - Fix PR rtl-optimization/51469, PR tree-optimization/51466, ++ PR tree-optimization/50078, PR target/51408, PR fortran/51310, ++ PR fortran/51448. ++ ++ -- Matthias Klose Sat, 10 Dec 2011 20:12:33 +0100 ++ ++gcc-4.6 (4.6.2-6) unstable; urgency=low ++ ++ * Update to SVN 20111208 (r182120) from the gcc-4_6-branch. ++ - Fix PR c++/51265, PR bootstrap/50888, PR target/51393 (ix86), ++ PR target/51002 (AVR), PR target/51345 (AVR), PR debug/48190, ++ PR fortran/50684, PR fortran/51218, PR target/50906 (closes: #650318), ++ PR tree-optimization/51315 (closes: #635126), PR tree-optimization/50622, ++ PR fortran/51435, PR debug/51410, PR c/51339, PR rtl-optimization/48721, ++ PR middle-end/51323 (LP: #897583), PR middle-end/50074, ++ PR middle-end/50074. ++ ++ [ Matthias Klose ] ++ * Run the libstdc++ testsuite on all architectures again. Closes: #622699. ++ * Apply proposed patch for PR target/50906 (powerpcspe only). Closes: #650318. ++ * Fix PR target/49030 (ARM), taken from Linaro. Closes: #633479. ++ * Fix PR target/50193 (ARM), taken from Linaro. Closes: #642127. ++ * Install the libstdc++.so-gdb.py file. LP: #883269. ++ * Fix PR c++/50114, backport from trunk. LP: #827806. ++ * Merge changes to allow gcc-snapshot cross builds, taken from Linaro. ++ * Update the Linaro support to the 4.6 branch. ++ ++ [ Marcin Juszkiewicz ] ++ * Fix issues with gcc-snapshot cross builds. ++ * Allow building Linaro binary packages in a single package. ++ * Apply hardening patches for cross builds when enabled for native builds. ++ ++ -- Matthias Klose Thu, 08 Dec 2011 17:14:35 +0100 ++ ++gcc-4.6 (4.6.2-5) unstable; urgency=low ++ ++ * Update to SVN 20111121 (r181596) from the gcc-4_6-branch. ++ - Fix PR c++/50870, PR c++/50608, PR target/47997, PR target/48108, ++ PR target/45233, PR middle-end/51077, PR target/30282, PR c++/50608, ++ PR target/50979, PR target/4810, PR rtl-optimization/51187, ++ PR target/50493, PR target/49992, PR target/49641, PR c++/51150, ++ PR target/50678, PR libstdc++/51142, PR libstdc++/51133. ++ ++ [ Matthias Klose ] ++ * Use the default gcc as stage1 compiler for all architectures. ++ ++ [ Marcin Juszkiewicz ] ++ * debian/control.m4: Use BASEDEP in more places. ++ * Work around debhelper not calling the correct strip for cross builds. ++ * Drop dpkg-cross build dependency for cross builds. ++ ++ -- Matthias Klose Mon, 21 Nov 2011 22:26:49 +0100 ++ ++gcc-4.6 (4.6.2-4) unstable; urgency=low ++ ++ * Update to SVN 20111103 (r180830) from the gcc-4_6-branch. ++ - Fix PR target/50691, PR c++/50901, PR target/50945, ++ PR rtl-optimization/47918, PR libstdc++/50880. ++ ++ * Configure the armel build by explicitly passing --with-arch=armv4t ++ --with-float=soft. ++ * libffi: Simplify PowerPC assembly and avoid CPU-specific string ++ instructions (Kyle Moffett). ++ * Fix MULTIARCH_DIRNAME on powerpcspe (Kyle Moffett). Closes: #647324. ++ ++ -- Matthias Klose Thu, 03 Nov 2011 12:03:41 -0400 ++ ++gcc-4.6 (4.6.2-3) unstable; urgency=low ++ ++ * disable parallel builds on kfreebsd-* even if DEB_BUILD_OPTIONS ++ enables them (continued investigation for #637236). ++ ++ -- Ludovic Brenta Sat, 29 Oct 2011 00:42:46 +0200 ++ ++gcc-4.6 (4.6.2-2) unstable; urgency=low ++ ++ * Update to SVN 20111028 (r180603) from the gcc-4_6-branch. ++ - Fix PR target/50875. ++ ++ * Fix gcj, gdc and gnat builds, broken by the stage1 cross-compiler ++ package dependency fixes. ++ * Update the Linaro support to the 4.6 branch. ++ * Fix gcc-4.6-hppa64 installation. Closes: #646805. ++ * For ARM hard float, set the dynamic linker to ++ /lib/arm-linux-gnueabihf/ld-linux.so.3. ++ * Don't use parallel builds on kfreebsd. ++ ++ -- Matthias Klose Fri, 28 Oct 2011 16:36:55 +0200 ++ ++gcc-4.6 (4.6.2-1) unstable; urgency=low ++ ++ * GCC 4.6.2 release. ++ ++ * Fix libgcc installation into /usr/lib/gcc//4.6. Closes: #645021. ++ * Fix stage1 cross-compiler package dependencies (Kyle Moffett). ++ Closes: #644439. ++ ++ -- Matthias Klose Wed, 26 Oct 2011 13:10:44 +0200 ++ ++gcc-4.6 (4.6.1-16) unstable; urgency=medium ++ ++ * Update to SVN 20111019 (r180208) from the gcc-4_6-branch. ++ - Fix PR target/49967 (ia64), PR tree-optimization/50189, PR fortran/50273, ++ PR tree-optimization/50700, PR c/50565 (closes: #642144), ++ PR target/49965 (sparc), PR middle-end/49801, PR c++/49216, ++ PR c++/49855, PR c++/49896, PR c++/44473, PR c++/50611, PR fortran/50659, ++ PR tree-optimization/50723, PR tree-optimization/50712, PR obj-c++/48275, ++ PR c++/50618, PR fortran/47023, PR fortran/50570, PR fortran/50718, ++ PR libobjc/49883, PR libobjc/50002, PR target/50350, PR middle-end/50386, ++ PR middle-end/50326, PR target/50737, PR c++/50787, PR c++/50531, ++ PR fortran/50016, PR target/50737. ++ ++ [ Matthias Klose ] ++ * Fix libjava installation into /usr/lib/gcc//4.6. ++ * Fix powerpc and ppc64 libffi builds (Kyle Moffett). ++ * Apply proposed patch for PR target/50350. Closes: #642313. ++ * Re-apply the fix for PR tree-optimization/49911 on ia64. ++ * Apply proposed patch for PR target/50106 (ARM). ++ ++ [Xavier Grave] ++ * debian/patches/address-clauses-timed-entry-calls.diff: new; backport ++ bug fix about address clauses and timed entry calls. ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-kfreebsd-gnu.diff: new; provide dummy ++ implementations of some optional POSIX Threads functions missing in ++ GNU/kFreeBSD. Closes: #642128. ++ ++ -- Matthias Klose Thu, 20 Oct 2011 00:24:13 +0200 ++ ++gcc-4.6 (4.6.1-15) unstable; urgency=low ++ ++ * Update to SVN 20111010 (r179753) from the gcc-4_6-branch. ++ - Fix PR target/50652. ++ * Update the Linaro support to the 4.6-2011.10-1 release. ++ * Fix gcc-spu installation. ++ * Restore symlink for subminor GCC version. Closes: #644849. ++ ++ -- Matthias Klose Mon, 10 Oct 2011 17:10:40 +0200 ++ ++gcc-4.6 (4.6.1-14) unstable; urgency=low ++ ++ * Update to SVN 20111008 (r179710) from the gcc-4_6-branch. ++ - Fix PR inline-asm/50571, PR c++/46105, PR c++/50508, PR libstdc++/50529, ++ PR libstdc++/49559, PR c++/40831, PR fortran/48706, PR target/49049, ++ PR tree-optimization/49279, PR fortran/50585, PR fortran/50625, ++ PR libstdc++/48698. ++ ++ [ Matthias Klose ] ++ * Configure and build to install into /usr/lib/gcc//4.6. ++ Closes: #643891. ++ * libgcc1: Versioned break to gcc-4.3. ++ * Fix gcc-multiarch for i386-linux-gnu with disabled multilibs. ++ * libffi: Fix PowerPC soft-floating-point support (Kyle Moffett). ++ ++ [ Marcin Juszkiewicz ] ++ * Enable gcc-snapshot cross builds. ++ ++ [ Iain Buclaw ] ++ * Port gdc to GCC-4.6. ++ ++ [ Aurelien Jarno ] ++ * Backport fix for PR target/49696 from the trunk (Closes: #633443). ++ ++ -- Matthias Klose Sat, 08 Oct 2011 14:40:49 +0200 ++ ++gcc-4.6 (4.6.1-13) unstable; urgency=low ++ ++ * Update to SVN 20110926 (r179207) from the gcc-4_6-branch. ++ - Fix PR tree-optimization/50472, PR tree-optimization/50413, ++ PR tree-optimization/50412, PR c++/20039, PR c++/42844, ++ PR libstdc++/50510, PR libstdc++/50509. ++ * Revert the fix for PR tree-optimization/49911, bootstrap error on ia64. ++ * libffi: Define FFI_MMAP_EXEC_WRIT on kfreebsd-* (Petr Salinger). ++ ++ -- Matthias Klose Mon, 26 Sep 2011 19:59:55 +0200 ++ ++gcc-4.6 (4.6.1-12) unstable; urgency=low ++ ++ * Update to SVN 20110924 (r179140) from the gcc-4_6-branch. ++ - Fix PR target/50464, PR target/50341, PR middle-end/49886, ++ PR target/50091, PR c++/50491, PR c++/50442 (Closes: #642176). ++ ++ -- Matthias Klose Sat, 24 Sep 2011 10:39:32 +0200 ++ ++gcc-4.6 (4.6.1-11) unstable; urgency=low ++ ++ * Update to SVN 20110917 (r178926) from the gcc-4_6-branch. ++ - Fix PR c++/50424, PR c++/48320, PR fortran/49479. ++ ++ [ Matthias Klose ] ++ * Update the Linaro support to the 4.6-2011.09-1 release. ++ ++ [ Aurelien Jarno ] ++ * gcc.c (for_each_path): Allocate memory for multiarch suffix. ++ ++ -- Matthias Klose Sat, 17 Sep 2011 10:53:36 +0200 ++ ++gcc-4.6 (4.6.1-10) unstable; urgency=medium ++ ++ * Update to SVN 20110910 (r178746) from the gcc-4_6-branch. ++ - Fix PR middle-end/50266, PR tree-optimization/49911, ++ PR tree-optimization/49518, PR tree-optimization/49628, ++ PR tree-optimization/49628, PR target/50310, PR target/50289, ++ PR c++/50255, PR c++/50309, PR c++/49267, PR libffi/49594. ++ - Revert fix for PR middle-end/49886, causing PR middle-end/50295. ++ ++ -- Matthias Klose Sat, 10 Sep 2011 03:38:48 +0200 ++ ++gcc-4.6 (4.6.1-9) unstable; urgency=low ++ ++ * Update to SVN 20110903 (r178501) from the gcc-4_6-branch. ++ - Fix PR target/50090, PR middle-end/50116, PR target/50202, PR c/50179, ++ PR c++/50157, PR fortran/50163, PR libfortran/50192, ++ PR middle-end/49886, PR tree-optimization/50178, PR c++/50207, ++ PR c++/50089, PR c++/50220, PR c++/50234, PR c++/50224, ++ PR libstdc++/50268. ++ ++ [ Matthias Klose ] ++ * Fix gcc --print-multilib-osdir for non-biarch architectures. ++ * Fix multiarch for non-biarch builds. Closes: #635860. ++ * Move the lto plugin to the cpp packge. Closes: #639531. ++ ++ [ Thorsten Glaser ] ++ * [m68k] Disable multilib. Closes: #639303. ++ ++ -- Matthias Klose Sat, 03 Sep 2011 20:11:50 +0200 ++ ++gcc-4.6 (4.6.1-8) unstable; urgency=low ++ ++ * Update to SVN 20110824 (r178027) from the gcc-4_6-branch. ++ Fix PR fortran/49792, PR tree-optimization/48739, PR target/50092, ++ PR c++/50086, PR c++/50054, PR fortran/50050, PR fortran/50130, ++ PR fortran/50129, PR fortran/49792, PR fortran/50109, PR c++/50024, ++ PR c++/46862. ++ ++ * Properly disable multilib builds for selected libraries on armel and armhf. ++ * Update and re-enable the gcc-ice patch. ++ * Update and re-enable the gcc-cloog-dl patch. ++ * Fix [ARM] PR target/50090: aliases in libgcc.a with default visibility, ++ taken from the trunk. ++ * Re-work the multiarch patches. ++ * Break older gcj-4.6 and gnat-4.6 versions, changed gcc_lib_dir. ++ * Omit the target alias from the go libdir. ++ * Linaro updates from the 4.6-2011.07-stable branch. ++ * Revert: ++ - libjava: Build with the system libffi PIC library. ++ * For native builds, gcc -print-file-name now resolve . and .., ++ and removes the subminor version number. ++ ++ -- Matthias Klose Wed, 24 Aug 2011 10:22:42 +0200 ++ ++gcc-4.6 (4.6.1-7) unstable; urgency=low ++ ++ * Update to SVN 20110816 (r177780) from the gcc-4_6-branch. ++ - Fix PR middle-end/49923. ++ ++ [ Matthias Klose ] ++ * gcc-4.6-multilib: Depend on biarch quadmath library. Closes: #637174. ++ * Don't hard-code build dependency on gcc-multilib. ++ * Build-depends on python when building java. ++ * Fix thinko in java::lang::Class::finalize (taken from the trunk). ++ * Add support for ARM 64bit sync intrinsics (David Gilbert). Only ++ enable for armv7 or better. ++ * libjava: Build with the system libffi PIC library. ++ * Disable gnat multilib builds on armel and armhf. ++ ++ Merge from gnat-4.6 (4.6.1-4) unstable; urgency=low ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-symbolic-tracebacks.diff ++ (src/gcc/ada/gcc-interface/Makefile.in): pass -iquote instead of -I- ++ to gnatgcc; fixes FTBFS on i386 and closes: #637418. ++ ++ Merge from gnat-4.6 (4.6.1-3) unstable; urgency=low ++ ++ [Євгеній Мещеряков] ++ * debian/patches/ada-mips.diff: do not use the alternate stack on mips, ++ as on mipsel. Closes: #566234. ++ ++ [Ludovic Brenta] ++ * debian/patches/pr49940.diff: new; copy the definition of function ++ lwp_self from s-osinte-freebsd.ads to s-osinte-kfreebsd-gnu.ads. ++ Closes: #636291. ++ * debian/patches/pr49944.diff: new. Closes: #636692. ++ * debian/patches/pr49819.diff: drop, merged upstream. ++ ++ -- Matthias Klose Tue, 16 Aug 2011 13:11:25 +0200 ++ ++gcc-4.6 (4.6.1-6) unstable; urgency=low ++ ++ * Update to SVN 20110807 (r177547) from the gcc-4_6-branch. ++ - Fix PR rtl-optimization/49799, PR debug/49871, PR target/47364, ++ PR target/49866, PR tree-optimization/49671, PR target/39386, ++ PR ada/4981, PR fortran/45586, PR fortran/49791, PR middle-end/49897, ++ PR middle-end/49898, PR target/49920, PR target/47908 (closes: #635919), ++ PR c++/43886, PR c++/49593, PR c++/49803, PR c++/49924, PR c++/49260, ++ PR fortran/49885, PR fortran/48876, PR libstdc++/49925, PR target/50001, ++ PR tree-optimization/49948, PR c++/48993, PR c++/49921, PR c++/49669, ++ PR c++/49988, PR fortran/49112. ++ ++ [ Aurelien Jarno ] ++ * Update patches/kbsd-gnu.diff for recent changes. Closes: #635195. ++ * Add s390x support. ++ ++ [ Marcin Juszkiewicz ] ++ * Fixes for multilib cross builds. LP: #816852, #819147. ++ ++ [ Matthias Klose ] ++ * Fix libgo installation for cross builds. ++ * Only apply arm-multilib when building for multilib. ++ ++ -- Matthias Klose Sun, 07 Aug 2011 18:20:00 +0200 ++ ++gcc-4.6 (4.6.1-5) unstable; urgency=low ++ ++ * Update to SVN 20110723 (r176672) from the gcc-4_6-branch. ++ - Fix PR target/49541, PR tree-optimization/49768, PR middle-end/49675, ++ PR target/49746, PR middle-end/49732, PR tree-optimization/49725, ++ PR target/49723, PR target/49541, PR tree-opt/49309, PR c++/49785, ++ PR ada/48711, PR ada/46350, PR fortran/49648, PR testsuite/49753, ++ PR tree-optimization/49309, PR tree-optimization/45819, PR target/49600, ++ PR fortran/49708, PR libstdc++/49293. ++ * Update the Linaro support to the 4.6-2011.07-0 release. ++ - Fix PR target/49335. LP: #791327. ++ * Update gcc-multiarch: ++ - Add -print-multiarch option. ++ - Fix library path for non-default multilib(s). ++ - Handle `.' in MULTILIB_DIRNAMES. ++ * Add support to build multilib on armel and armhf, only enable it for ++ Ubuntu/oneiric. LP: #810360. ++ * cpp-4.6: Add empty multiarch directories for the non-default multilibs, ++ needed for relative lookups from startfile_prefixes. ++ * Fix PR c++/49756, backport from trunk. LP: #721378. ++ * libgcc1: Add breaks to gcc-4.1 and gcc-4.3. Closes: #634821. ++ * Configure for DEB_TARGET_MULTIARCH defaults. ++ ++ -- Matthias Klose Sat, 23 Jul 2011 08:15:50 +0200 ++ ++gcc-4.6 (4.6.1-4) unstable; urgency=low ++ ++ * Update to SVN 20110714 (r176280) from the gcc-4_6-branch. ++ - Fix PR tree-optimization/49094, PR target/39633, PR c++/49672, ++ PR fortran/49698, PR fortran/49690, PR fortran/49562, PR libfortran/49296, ++ PR target/49487, PR tree-optimization/49651, PR ada/48711. ++ ++ [ Matthias Klose ] ++ * Build Go on alpha for gcc-snapshot builds. ++ * For multicore ARM, clear both caches, not just the dcache (proposed ++ patch by Andrew Haley). ++ * Fix for PR rtl-optimization/{48830,48808,48792}, taken from the trunk. ++ LP: #807573. ++ * Fix PR tree-optimization/49169, optimisations strip the Thumb/ARM mode bit ++ off function pointers (Richard Sandiford). LP: #721531. ++ ++ [ Marcin Juszkiewicz ] ++ * Define DEB_TARGET_MULTIARCH macro. ++ * debian/rules2: Macro and configuration consolidation. ++ ++ -- Matthias Klose Thu, 14 Jul 2011 19:38:49 +0200 ++ ++gcc-4.6 (4.6.1-3) unstable; urgency=medium ++ ++ * Update to SVN 20110709 (r176108) from the gcc-4_6-branch. ++ - Fix PR target/49335, PR tree-optimization/49618, PR c++/49598, ++ PR fortran/49479, PR target/49621, PR target/46779, PR target/49660, ++ PR c/49644, PR debug/49522, PR debug/49522, PR middle-end/49640, ++ PR c++/48157, PR c/49644, PR fortran/48926. ++ - Apparently fixes a boost issue. Closes: #632938. ++ * Apply proposed patch for PR fortran/49690. Closes: #631204. ++ ++ * README.Debian: New section 'Former and/or inactive maintainers'. ++ ++ -- Matthias Klose Sun, 10 Jul 2011 00:04:34 +0200 ++ ++gcc-4.6 (4.6.1-2) unstable; urgency=medium ++ ++ * Update to SVN 20110705 (r175840) from the gcc-4_6-branch. ++ - Fix PR target/47997, PR c++/49528, PR c++/49440, PR c++/49418, ++ PR target/44643, PR tree-optimization/49615, PR tree-optimization/49572, ++ PR target/34734, PR tree-optimization/49539, PR tree-optimizations/49516, ++ PR target/49089, PR rtl-optimization/49014, PR target/48273, ++ PR fortran/49466, PR libfortran/49296, PR libffi/46660, PR debug/49262, ++ PR rtl-optimization/49472, PR rtl-optimization/49619, PR fortran/49623, ++ PR fortran/49540. ++ ++ [Ludovic Brenta, Євгеній Мещеряков, Xavier Grave] ++ * Adjust patches to GCC 4.6. ++ * Remove patches merged upstream: ++ - debian/patches/ada-arm-eabi.diff ++ - debian/patches/ada-bug589164.diff ++ - debian/patches/ada-bug601133.diff ++ - debian/patches/ada-gnatvsn.diff ++ - debian/patches/ada-mips.diff ++ - debian/patches/ada-polyorb-dsa.diff ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-acats.diff: set LD_LIBRARY_PATH, ADA_INCLUDE_PATH ++ and ADA_OBJECTS_PATH so that the GNAT testsuite runs. ++ * debian/patches/adalibgnat{vsn,prj}.diff, ++ debian/rules.d/binary-ada.mk: install libgnat{vsn,prj}.so.* in the correct ++ multiarch directory. ++ * debian/control.m4, debian/rules.d/binary-ada.mk: move the SJLJ version ++ of the Ada run-time library to a new package, gnat-4.6-sjlj. ++ * debian/control.m4 (libgnatvsn4.6, libgnatvsn4.6-dbg, libgnatprj4.6, ++ libgnatprj4.6-dbg): pre-depend on multiarch-support and add ++ Multi-Arch: same. ++ ++ [Nicolas Boulenguez] ++ * debian/rules.d/binary-ada.mk: add gnathtml to the package gnat-4.6. ++ * debian/gnat.1: remove the version number of GCC. Mention gnathtml. ++ ++ [ Matthias Klose ] ++ * Do not install the spu and hppa64 cross compilers into the multiarch path. ++ * Update the Linaro support to 20110704. ++ ++ [ Thorsten Glaser ] ++ * Apply changes from src:gcc-4.4 for m68k support. Closes: #632380. ++ - debian/rules.defs: Remove m68k from locale_no_cpus. ++ - debian/patches/gcc-multiarch.diff: Add m68k multiarch_mappings. ++ - debian/patches/pr43804.diff: Fix backported from SVN. ++ - debian/rules.patch: Add pr43804. ++ ++ -- Matthias Klose Tue, 05 Jul 2011 10:45:56 +0200 ++ ++gcc-4.6 (4.6.1-1) unstable; urgency=low ++ ++ * GCC 4.6.1 release. ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-gnatvsn.diff, ++ debian/patches/ada-polyorb-dsa.diff: remove backports, no longer ++ needed. ++ ++ [ Matthias Klose ] ++ * Fix plugin header installation. Closes: #631082. ++ * Stop passing -Wno-error=unused-but-set-parameter and ++ -Wno-error=unused-but-set-variable if -Werror is present. ++ This was a temporary workaround introduced in 4.6.0~rc1-2. Closes: #615157. ++ * gcc-4.6-spu: Install the lto plugin. Closes: #631772. ++ ++ -- Matthias Klose Mon, 27 Jun 2011 13:54:04 +0200 ++ ++gcc-4.6 (4.6.0-14) unstable; urgency=low ++ ++ * Update to SVN 20110616 (r175102) from the gcc-4_6-branch. ++ - Fix PR debug/48459, PR fortran/49103, PR rtl-optimization/49390, ++ PR c++/49117, PR c++/49369, PR c++/49290, PR target/44618, ++ PR tree-optimization/49419 (closes: #630567). ++ * Update the Linaro support to the 4.6-2011.06-0 release. ++ ++ -- Matthias Klose Thu, 16 Jun 2011 16:10:33 +0200 ++ ++gcc-4.6 (4.6.0-13) unstable; urgency=low ++ ++ * Update to SVN 20110611 (r174958) from the gcc-4_6-branch. ++ * Extend multiarch support for mips/mipsel. ++ * Fix control files for gcj multiarch builds. ++ * Update libstdc++ symbols files. ++ ++ -- Matthias Klose Sat, 11 Jun 2011 20:49:42 +0200 ++ ++gcc-4.6 (4.6.0-12) unstable; urgency=medium ++ ++ * Update to SVN 20110608 (r174800) from the gcc-4_6-branch. ++ - PR target/49186, PR rtl-optimization/49235, PR tree-optimization/48702, ++ PR tree-optimization/49243, PR c++/49134, PR target/49238, ++ PR gcov-profile/49299, PR c++/48780, PR c++/49298, PR fortran/49268. ++ * Fix c++ biarch header installation on i386. LP: #793411. ++ * Enable multiarch. ++ * Add multiarch attributes for gnat and libgnat packages. ++ * Add multiarch attributes for libgcj* packages. ++ * Adjust build dependency on multiarch glibc. ++ ++ -- Matthias Klose Wed, 08 Jun 2011 11:26:52 +0200 ++ ++gcc-4.6 (4.6.0-11) unstable; urgency=low ++ ++ * Update to SVN 20110604 (r174637) from the gcc-4_6-branch. ++ - Fix PR c++/49165, PR tree-optimization/49218, PR target/45263, ++ PR target/43700, PR target/43995, PR tree-optimization/49217, ++ PR c++/49223, PR c++/47049, PR c++/47277, PR c++/48284, PR c++/48657, ++ PR c++/49176, PR fortran/48955, PR tree-optimization/49038, ++ PR tree-optimization/49093, PR middle-end/48985, PR middle-end/48953, ++ PR c++/49276, PR fortran/49265, PR fortran/45786. ++ * Configure the hppa64 and spu cross builds with --enable-plugin. ++ ++ -- Matthias Klose Sat, 04 Jun 2011 16:12:27 +0200 ++ ++gcc-4.6 (4.6.0-10) unstable; urgency=high ++ ++ * Update to SVN 20110526 (r174290) from the gcc-4_6-branch. ++ - Fix PR target/44643, PR c++/49165, PR tree-optimization/49161, ++ PR target/49128, PR tree-optimization/44897, PR target/49133, ++ PR c++/44994, PR c++/49156, PR c++/45401, PR c++/44311, PR c++/44311, ++ PR c++/45698, PR c++/46145, PR c++/46245, PR c++/46696, PR c++/47184, ++ PR c++/48935, PR c++/45418, PR c++/45080, PR c++/48292, PR c++/49136, ++ PR c++/49042, PR c++/48884, PR c++/49105, PR c++/47263, PR c++/47336, ++ PR c++/47544, PR c++/48617, PR c++/48424, PR libstdc++/49141, ++ PR libobjc/48177. ++ * Proposed fix for PR tree-optimization/48702, PR tree-optimization/49144. ++ Closes: #627795. ++ * Proposed fix for PR fortran/PR48955. ++ * Add some conditionals to build the package on older releases. ++ ++ -- Matthias Klose Thu, 26 May 2011 16:00:49 +0200 ++ ++gcc-4.6 (4.6.0-9) unstable; urgency=low ++ ++ * Update to SVN 20110524 (r174102) from the gcc-4_6-branch. ++ - Fix PR lto/49123, PR debug/49032, PR c/49120, PR middle-end/48973, ++ PR target/49104, PR middle-end/49029, PR c++/48647, PR c++/48945, ++ PR c++/48780, PR c++/49066, PR libstdc++/49058, PR target/49104. ++ * Use gcc-4.4 as the bootstrap compiler for kfreebsd to work around ++ a bootstrap issue. ++ ++ -- Matthias Klose Tue, 24 May 2011 09:41:35 +0200 ++ ++gcc-4.6 (4.6.0-8) unstable; urgency=low ++ ++ * Update to SVN 20110521 (r173994) from the gcc-4_6-branch. ++ - Fix PR target/48986, PR preprocessor/48677, PR tree-optimization/48975, ++ PR tree-optimization/48822, PR debug/48967, PR debug/48159, ++ PR target/48857, PR target/48495, PR tree-optimization/48837, ++ PR tree-optimization/48611, PR tree-optimization/48794, PR c++/48859, ++ PR c++/48574, PR fortran/48889, PR target/49002, PR lto/48207, ++ PR tree-optimization/49039, PR tree-optimization/49018, PR lto/48703, ++ PR tree-optimization/48172, PR tree-optimization/48172, PR c++/48873, ++ PR tree-optimization/49000, PR c++/48869, PR c++/49043, PR c++/49082, ++ PR c++/48948, PR c++/48745, PR c++/48736, PR bootstrap/49086, ++ PR tree-optimization/49079, PR tree-optimization/49073. ++ * Update the Linaro support to the 4.6-2011.05-0 release. ++ * pr45979.diff: Update to the version from the trunk. ++ ++ -- Matthias Klose Sat, 21 May 2011 12:19:10 +0200 ++ ++gcc-4.6 (4.6.0-7) unstable; urgency=low ++ ++ * Update to SVN 20110507 (r173528) from the gcc-4_6-branch. ++ - Fix PR middle-end/48597, PR c++/48656, PR fortran/48112, ++ PR fortran/48279, PR fortran/48788, PR tree-optimization/48809, ++ PR target/48262, PR fortran/48462, PR fortran/48746, ++ PR fortran/48810, PR fortran/48800, PR libstdc++/48760, ++ PR libgfortran/48030, PR preprocessor/48192, PR lto/48846, ++ PR target/48723, PR fortran/48894, PR target/48900, PR target/48252, ++ PR c++/40975, PR target/48252, PR target/48774, PR c++/48838, ++ PR c++/48749, PR ada/48844, PR fortran/48720, PR libstdc++/48750, ++ PR c++/48909, PR c++/48911, PR c++/48446, PR c++/48089. ++ ++ * Fix issue with volatile bitfields vs. inline asm memory constraints, ++ taken from the trunk, apply for ARM only. Addresses: #625825. ++ ++ -- Matthias Klose Sat, 07 May 2011 14:54:51 +0200 ++ ++gcc-4.6 (4.6.0-6) unstable; urgency=low ++ ++ * Update to SVN 20110428 (r173059) from the gcc-4_6-branch. ++ - Fix PR c/48685 (closes: #623161), PR tree-optimization/48717, PR c/48716, ++ PR c/48742, PR debug/48768, PR tree-optimization/48734, ++ PR tree-optimization/48731, PR other/48748, PR c++/42687, PR c++/48726, ++ PR c++/48707, PR fortran/48588, PR libstdc++/48521, PR c++/48046, ++ PR preprocessor/48740. ++ * Update the ibm/gcc-4_6-branch to 20110428. ++ * Use gcc-4.6 as bootstrap compiler on kfreebsd-*. ++ ++ -- Matthias Klose Thu, 28 Apr 2011 10:33:52 +0200 ++ ++gcc-4.6 (4.6.0-5) unstable; urgency=low ++ ++ * Update to SVN 20110421 (r172845) from the gcc-4_6-branch. ++ - Fix PR target/48288, PR tree-optimization/48611, PR lto/48148, ++ PR lto/48492, PR fortran/47976, PR c++/48594, PR c++/48657, ++ PR c++/46304, PR target/48708, PR middle-end/48695. ++ ++ * Update the Linaro support to the 4.6-2011.04-0 release. ++ ++ -- Matthias Klose Thu, 21 Apr 2011 22:50:25 +0200 ++ ++gcc-4.6 (4.6.0-4) unstable; urgency=medium ++ ++ * Update to SVN 20110419 (r172584) from the gcc-4_6-branch. ++ - Fix PR target/48678, PR middle-end/48661, PR tree-optimization/48616, ++ PR lto/48538, PR c++/48537, PR c++/48632, PR testsuite/48675, ++ PR libstdc++/48635, PR libfortran/47571. ++ ++ [ Aurelien Jarno ] ++ * Enable SSP on mips/mipsel. ++ ++ [ Matthias Klose ] ++ * (Build-)depend on binutils 2.21.51. ++ ++ -- Matthias Klose Tue, 19 Apr 2011 23:45:16 +0200 ++ ++gcc-4.6 (4.6.0-3) unstable; urgency=high ++ ++ * Update to SVN 20110416 (r172584) from the gcc-4_6-branch. ++ - Fix PR rtl-optimization/48143, PR target/48142, PR target/48349, ++ PR debug/48253, PR fortran/48291, PR target/16292, PR c++/48280, ++ PR c++/48212, PR c++/48369, PR c++/48281, PR c++/48265, PR lto/48246, ++ PR libstdc++/48398, PR bootstrap/48431, PR tree-optimization/48377, ++ PR debug/48343, PR rtl-optimization/48144, PR debug/48466, PR c/48517, ++ PR middle-end/48335, PR c++/48450, PR target/47829, PR c++/48534, ++ PR c++/48523, PR libstdc++/48566, PR libstdc++/48541, PR target/48366, ++ PR libstdc++/48465, PR middle-end/48591, PR target/48605, ++ PR middle-end/48591, PR target/48090, PR tree-optimization/48195, ++ PR rtl-optimization/48549, PR c++/48594, PR c++/48570, PR c++/48574, ++ PR fortran/48360, PR fortran/48456, PR libstdc++/48631, ++ PR libstdc++/48635, PR libstdc++/48476. ++ ++ [ Matthias Klose ] ++ * libjava-jnipath.diff: Add /usr/lib//jni as jnipath too. ++ * Add mudflap support for varargs (patch taken from the trunk). ++ * gcc-4.6-plugin-dev: Install gtype.state. ++ * Bootstrap with gcc-4.4 -g -O2 on armel. ++ * Fix linker plugin configuration. Closes: #620661. ++ * Update the Linaro support for GCC-4.6. ++ * gcc-snapshot builds: ++ - Fix build with multiarch changes. ++ - Use gcc-snapshot as the bootstrap compiler on armel. ++ - Re-enable building java in the gcc-snapshot package. ++ * Build supporting multiarch on wheezy/sid. ++ * Adjust (build)-dependency to new libgmp-dev name. ++ ++ [ Marcin Juszkiewicz ] ++ * Configure stage1 cross builds with --disable-libquadmath. ++ ++ -- Matthias Klose Sat, 16 Apr 2011 17:02:30 +0200 ++ ++gcc-4.6 (4.6.0-2) unstable; urgency=low ++ ++ * Update to SVN 20110329 (r171700) from the gcc-4_6-branch. ++ - Fix PR bootstrap/48135, PR target/47553, PR middle-end/48269, ++ PR tree-optimization/48228, PR middle-end/48134, PR middle-end/48031, ++ PR other/48179, PR other/48221, PR other/48234, PR target/48237, ++ PR debug/48204, PR c/42544, PR c/48197, PR rtl-optimization/48141, ++ PR rtl-optimization/48141, PR c++/48166, PR c++/48296, PR c++/48289, ++ PR c++/47999, PR c++/48313, Core 1232, Core 1148, PR c++/47504, ++ PR c++/47570, PR preprocessor/48248, PR c++/48319. ++ ++ [ Matthias Klose ] ++ * Update NEWS files. ++ * Configure the hppa64 cross build with --disable-libquadmath. ++ * Don't build armhf from the Linaro branch. ++ * Don't try to build Go on sh4. ++ ++ [ Marcin Juszkiewicz ] ++ * Fixes issues with staged cross builds. LP: #741855, #741853. ++ * Fix libdir setting for multiarch enabled cross builds. LP: #741846. ++ * Drop alternatives for cross builds. LP: #676454. ++ ++ -- Matthias Klose Tue, 29 Mar 2011 23:22:07 +0200 ++ ++gcc-4.6 (4.6.0-1) unstable; urgency=low ++ ++ * GCC 4.6.0 release. ++ ++ * Build the gold LTO plugin for ppc64 (Hiroyuki Yamamoto). Closes: #618865. ++ * Fix PR target/48226, Allow Iterator::vector vector on powerpc with VSX, ++ taken from the trunk. ++ * Fix PR target/47487 ICE building libgo, taken from the trunk. ++ * Merge multiarch changes from the gcc-4.5 package. ++ * Apply proposed patch to reduce the overhead of dwarf2 location tracking. ++ Addresses: #618748. ++ ++ -- Matthias Klose Sat, 26 Mar 2011 03:03:21 +0100 ++ ++gcc-4.6 (4.6.0~rc1-3) experimental; urgency=low ++ ++ * GCC 4.6.0 release candidate 2. ++ ++ -- Matthias Klose Tue, 22 Mar 2011 22:11:42 +0100 ++ ++gcc-4.6 (4.6.0~rc1-2) experimental; urgency=low ++ ++ [ Loic Minier ] ++ * Rework config/vxworks-dummy.h installation snippet to test ++ DEB_TARGET_GNU_CPU against patterns close to the upstream ones (arm% mips% ++ sh% sparc%) as to also install this header on other ports targetting the ++ relevant upstream CPUs such as armhf. Add a comment pointing at the ++ upstream bug. ++ * Update __aeabi symbol handling to test whether DEB_TARGET_GNU_TYPE matches ++ arm-linux-gnueabi% instead of testing whether DEB_TARGET_ARCH equals ++ armel. Add a comment pointing at the Debian bug and indicating that this ++ is only useful for older dpkg-dev versions. ++ * debian/rules.def: fix "armel" entry to "arm" in list of ++ DEB_TARGET_ARCH_CPUs for Debian experimental GCC 4.5/4.6 libraries. ++ * debian/rules2: drop commented out GCC #42509 workaround as this was fixed ++ upstream in 4.4+. ++ * Change bogus DEB_TARGET_GNU_CPU test on armel and armhf to just test for ++ arm as ths is what the Debian arm, armel and armhf port use. ++ * Rework snippet setting armv7 on Debian armhf / Ubuntu to avoid ++ duplication, as a comment called out for. ++ * Use "arm" instead of armel/armhf in DEB_TARGET_GNU_CPU test when deciding ++ whether to enable profiledbootstrap. ++ * Set DEJAGNU_TIMEOUT=600 on Ubuntu armhf as well. ++ * Fix a couple more uses of armel or armhf against DEB_TARGET_GNU_CPU. ++ * Patched a couple of comments mentioning armel to also mention armhf. ++ * Add patch armhf-triplet-backport, support for arm-linux-*eabi* backported ++ from a patch sent on the upstream mailing-list. ++ ++ [ Matthias Klose ] ++ * Update libstdc++ symbols files. ++ * Update libgfortran symbols files. ++ ++ -- Matthias Klose Sun, 20 Mar 2011 13:53:48 +0100 ++ ++gcc-4.6 (4.6.0~rc1-2) experimental; urgency=low ++ ++ * Update to SVN 20110320 (r171192) from the gcc-4_6-branch. ++ ++ [ Matthias Klose ] ++ * Update gcc-default-ssp* patches for the release candidate. ++ * Pass -Wno-error=unused-but-set-parameter if -Werror is present (temporary ++ for rebuild tests). ++ * Always configure --with-plugin-ld, always install liblto_plugin.so. ++ ++ [ Marcin Juszkiewicz ] ++ * Add conflicts with -4.5-*dev packages. Closes: #618450. ++ ++ [ Petr Salinger] ++ * Disable lock-2.c test on kfreebsd-*. Closes: #618988. ++ * Re-enable parallel builds on kfreebsd. ++ * Package lto_plugin for kfreebsd-* and Hurd. ++ ++ -- Matthias Klose Sun, 20 Mar 2011 13:53:48 +0100 ++ ++gcc-4.6 (4.6.0~rc1-1) experimental; urgency=low ++ ++ * Build from the GCC 4.6.0 release candidate tarball. ++ ++ [ Matthias Klose ] ++ * Disable Go on powerpc. Closes: #615827. ++ * Fix lintian errors for the -plugin-dev package. ++ * Update kbsd-gnu.diff (Petr Salinger). Closes: #615826. ++ * Disable parallel builds on kfreebsd (Petr Salinger). ++ * Update gmp (build) dependencies. ++ * Update GFDL compliant builds. Closes: #609161. ++ * For GFDL compliant builds, build a dummy s-tm-texi without access ++ to the texinfo sources. ++ ++ [ Aurelien Jarno ] ++ * Import symbol files for kfreebsd-amd64, kfreebsd-i386, sh4 and ++ sparc64 from gcc-4.5. ++ ++ -- Matthias Klose Mon, 14 Mar 2011 19:01:08 +0100 ++ ++gcc-4.6 (4.6-20110227-1) experimental; urgency=low ++ ++ [ Matthias Klose ] ++ * Update libquadmath symbols file. ++ * gcc-4.6-plugin-dev: Install gengtype. ++ ++ [ Sebastian Andrzej Siewior ] ++ * Remove -many on powerpcspe (__SPE__). ++ * Remove classic FPU opcodes from libgcc if target has no support for them ++ (powerpcspe). ++ ++ -- Matthias Klose Sun, 27 Feb 2011 22:33:45 +0100 ++ ++gcc-4.6 (4.6-20110216-1) experimental; urgency=low ++ ++ * GCC snapshot, taken from the trunk. ++ * Pass --no-add-needed by default to the linker. See ++ http://wiki.debian.org/ToolChain/DSOLinking, section "Not resolving symbols ++ in indirect dependent shared libraries" for more information. ++ ++ -- Matthias Klose Wed, 16 Feb 2011 23:55:32 +0100 ++ ++gcc-4.6 (4.6-20110125-1) experimental; urgency=low ++ ++ * debian/copyright: Add unicode copyright for ++ libjava/classpath/resource/gnu/java/locale/* files. Addresses: #609161. ++ ++ -- Matthias Klose Wed, 26 Jan 2011 03:42:10 +0100 ++ ++gcc-4.6 (4.6-20110123-1) experimental; urgency=low ++ ++ * GCC snapshot, taken from the trunk. ++ * Don't run the libstdc++ testsuite on mipsel, times out on the buildd. ++ ++ [ Marcin Juszkiewicz ] ++ * Fix biarch/triarch cross builds. ++ - dpkg-shlibdeps failed to find libraries for 64 or n32 builds ++ - LD_LIBRARY_PATH for dpkg-shlibdeps lacked host dirs. ++ ++ -- Matthias Klose Sun, 23 Jan 2011 12:14:49 +0100 ++ ++gcc-4.6 (4.6-20110116-1) experimental; urgency=low ++ ++ * GCC snapshot, taken from the trunk. ++ * Update patches for the trunk. ++ * Pass -Wno-error=unused-but-set-variable if -Werror is present (temporary ++ for rebuild tests). ++ * Work around PR libffi/47248, force a read only eh frame section. ++ ++ -- Matthias Klose Sun, 16 Jan 2011 23:28:28 +0100 ++ ++gcc-4.6 (4.6-20110105-1) experimental; urgency=low ++ ++ [ Matthias Klose ] ++ * Rename and update libobjc symbols files. ++ * Update cloog/ppl build dependencies. ++ * Adjust libstdc++ configure and paths for stylesheets and dtds. ++ * Update copyright for libquadmath, libgo, gcc/go/gofrontend. ++ * Enable Go for more architectures. ++ * DP: libgo: Fix GOARCH for i386 biarch, add GOARCH for powerpc ++ ++ [ Kees Cook ] ++ * Update hardening patches for GCC-4.6. LP: #696990. ++ ++ -- Matthias Klose Wed, 05 Jan 2011 22:29:57 +0100 ++ ++gcc-4.6 (4.6-20101220-1) maverick; urgency=low ++ ++ * GCC snapshot, taken from the trunk. ++ ++ -- Matthias Klose Tue, 21 Dec 2010 00:16:19 +0100 ++ ++gcc-4.5 (4.5.2-7) unstable; urgency=low ++ ++ * Update to SVN 20110323 (r171351) from the gcc-4_5-branch. ++ - Fix PR c++/47125, PR fortran/47348, PR libstdc++/48114, ++ PR libfortran/48066, PR target/48171, PR target/47862. ++ PR preprocessor/48192. ++ ++ [ Steve Langasek ] ++ * Make dpkg-dev versioned build-dependency conditional on whether we want ++ to build for multiarch. ++ * Add a new patch, gcc-multiarch+biarch.diff, used only when building for ++ multiarch to set our multilib paths to the correct relative directories. ++ * debian/rules.defs: support turning on multiarch build by architecture; ++ but don't enable this yet, we still need to wait for dpkg-dev. ++ * When DEB_HOST_MULTIARCH is available (i.e., with the next dpkg upload), ++ use it as our multiarch path. ++ * debian/rules.d/binary-java.mk: jvm-exports path is /usr/lib/jvm-exports, ++ not $(libdir)/jvm-exports. ++ * OTOH, libgcj_bc *is* in $(libdir). ++ * the spu build is not a multiarch build; look in the correct ++ non-multiarch directory. ++ * debian/rules2: pass --libdir also for stageX builds, needed in order to ++ successfully build for multiarch. ++ * debian/rules2: $(usr_lib) for a cross-build should not include the ++ multiarch dir as part of the path. ++ * debian/patches/gcc-multiarch+biarch.diff: restore the original intent of ++ the patch, namely, that the multilib dir for the default variant is ++ always equal to libdir (the multiarch dir), and we walk up the tree ++ to find lib for the secondary variant. ++ * debian/patches/gcc-multiarch+biarch32.diff: apply the same multilib ++ directory rewriting for biarch paths with multiarch as we do without; ++ still needed in the near term. ++ * Put our list of patches in README.Debian.$(DEB_TARGET_ARCH) instead of ++ in README.Debian, so that the individual files are architecture-neutral ++ and play nicely with multiarch. LP: #737846. ++ * Add a comment at the bottom of README.Debian with a pointer to the new ++ file listing the patches. ++ ++ [ Loic Minier ] ++ * Rework config/vxworks-dummy.h installation snippet to test ++ DEB_TARGET_GNU_CPU against patterns close to the upstream ones (arm% mips% ++ sh% sparc%) as to also install this header on other ports targetting the ++ relevant upstream CPUs such as armhf. Add a comment pointing at the ++ upstream bug. ++ * Update __aeabi symbol handling to test whether DEB_TARGET_GNU_TYPE matches ++ arm-linux-gnueabi% instead of testing whether DEB_TARGET_ARCH equals ++ armel. Add a comment pointing at the Debian bug and indicating that this ++ is only useful for older dpkg-dev versions. ++ * debian/rules.def: fix "armel" entry to "arm" in list of ++ DEB_TARGET_ARCH_CPUs for Debian experimental GCC 4.5/4.6 libraries. ++ * debian/rules2: drop commented out GCC #42509 workaround as this was fixed ++ upstream in 4.4+. ++ * Change bogus DEB_TARGET_GNU_CPU test on armel and armhf to just test for ++ arm as ths is what the Debian arm, armel and armhf port use. ++ * Rework snippet setting armv7 on Debian armhf / Ubuntu to avoid ++ duplication, as a comment called out for. ++ * Use "arm" instead of armel/armhf in DEB_TARGET_GNU_CPU test when deciding ++ whether to enable profiledbootstrap. ++ * Set DEJAGNU_TIMEOUT=600 on Ubuntu armhf as well. ++ * Fix a couple more uses of armel or armhf against DEB_TARGET_GNU_CPU. ++ * Patched a couple of comments mentioning armel to also mention armhf. ++ * Add patch armhf-triplet-backport, support for arm-linux-*eabi* backported ++ from a patch sent on the upstream mailing-list. ++ ++ [ Matthias Klose ] ++ * Fix PR target/48226, Allow Iterator::vector vector on powerpc with VSX, ++ taken from the trunk. ++ * Fix PR preprocessor/48192, make conditional macros not defined for ++ #ifdef, proposed patch. ++ * Build the gold LTO plugin for ppc64 (Hiroyuki Yamamoto). Closes: #618864. ++ * Fix issue with volatile bitfields, default to -fstrict-volatile-bitfields ++ again on armel for Linaro builds. LP: #675347. ++ ++ -- Matthias Klose Wed, 23 Mar 2011 15:44:01 +0100 ++ ++gcc-4.5 (4.5.2-6) unstable; urgency=low ++ ++ * Update to SVN 20110312 (r170895) from the gcc-4_5-branch. ++ - Fix PR tree-optimization/45967, PR tree-optimization/47278, ++ PR target/47862, PR c++/44629, PR c++/45651, PR c++/47289, PR c++/47705, ++ PR c++/47488, PR libgfortran/47778, PR c++/48029. ++ ++ [ Steve Langasek ] ++ * Make sure our libs Pre-Depend on 'multiarch-support' when building for ++ multiarch. ++ * debian/patches/gcc-multiarch*, debian/rules.patch: use i386 in the ++ multiarch path for amd64 / kfreebsd-amd64, not i486 or i686. This lets ++ us use a common set of paths on both Debian and Ubuntu, regardless of ++ the target default optimization level. ++ * debian/rules.conf: when building for multiarch, we need to be sure we ++ are building against a libc-dev that supports the corresponding paths. ++ (the referenced version number for this needs to be bumped once this is ++ officially in the archive.) ++ ++ [ Matthias Klose ] ++ * Don't run the libmudflap testsuite on hppa; times out on the buildd. ++ * Don't run the libstdc++ testsuite on mipsel; times out on the buildd. ++ * Post Linaro 4.5-2011.03-0 release changes (up to 20110313). ++ * Undefine LINK_EH_SPEC before redefining it to turn off warnings on ++ powerpc. ++ * Update gmp (build) dependencies. ++ ++ [ Aurelien Jarno ] ++ * Add symbol files on kfreebsd-i386. ++ * Add symbol files on kfreebsd-amd64. ++ * Add symbol files on sparc64. ++ * Add symbol files on sh4. ++ ++ -- Matthias Klose Sun, 13 Mar 2011 17:30:48 +0100 ++ ++gcc-4.5 (4.5.2-5) unstable; urgency=low ++ ++ * Update to SVN 20110305 (r170696) from the gcc-4_5-branch. ++ - Fix PR target/43810, PR fortran/47886, PR tree-optimization/47615, ++ PR middle-end/47639, PR tree-optimization/47890, PR libfortran/47830, ++ PR tree-optimization/46723, PR target/45261, PR target/45808, ++ PR c++/46159, PR c++/47904, PR fortran/47886, PR libstdc++/47433, ++ PR target/42240, PR fortran/47878, PR libfortran/47694. ++ * Update the Linaro support to the 4.5-2011.03-0 release. ++ - Fix LP: #705689, LP: #695302, LP: #710652, LP: #710623, LP: #721021, ++ LP: #721021, LP: #709453. ++ ++ -- Matthias Klose Sun, 06 Mar 2011 02:58:01 +0100 ++ ++gcc-4.5 (4.5.2-4) unstable; urgency=low ++ ++ * Update to SVN 20110222 (r170382) from the gcc-4_5-branch. ++ - Fix PR target/43653, PR fortran/47775, PR target/47840, ++ PR libfortran/47830. ++ ++ [ Matthias Klose ] ++ * Don't apply a patch twice. ++ * Build libgcc_s with -fno-stack-protector, when not building from the ++ Linaro branch. ++ * Backport proposed fix for PR tree-optimization/46723 from the trunk. ++ ++ [ Steve Langasek ] ++ * debian/control.m4: add missing Multi-Arch: same for libgcc4; make sure ++ Multi-Arch: same doesn't get set for libmudflap when building an ++ Architecture: all cross-compiler package. ++ * debian/rules2: use $libdir for libiberty.a. ++ * debian/patches/gcc-multiarch-*.diff: make sure we're using the same ++ set_multiarch_path definition for all variants. ++ ++ [ Sebastian Andrzej Siewior ] ++ * PR target/44364 ++ * Remove -many on powerpcspe (__SPE__) ++ * Remove classic FPU opcodes from libgcc if target has no support for them ++ (powerpcspe) ++ ++ -- Matthias Klose Wed, 23 Feb 2011 00:35:54 +0100 ++ ++gcc-4.5 (4.5.2-3) experimental; urgency=low ++ ++ * Update to SVN 20110215 (r170181) from the gcc-4_5-branch. ++ - Fix PR rtl-optimization/44469, PR tree-optimization/47411, ++ PR bootstrap/44699, PR target/44392, PR fortran/47331, PR fortran/47448, ++ PR pch/14940, PR rtl-optimization/47166, PR target/47272, PR target/47580, ++ PR tree-optimization/47541, PR target/44606, PR boehm-gc/34544, ++ PR fortran/47569, PR libstdc++/47709, PR libstdc++/46914, PR libffi/46661. ++ * Update the Linaro support to the 4.5 2011.02-0 release. ++ * Pass --no-add-needed by default to the linker. See ++ http://wiki.debian.org/ToolChain/DSOLinking, section "Not resolving symbols ++ in indirect dependent shared libraries" for more information. ++ ++ -- Matthias Klose Wed, 16 Feb 2011 15:29:26 +0100 ++ ++gcc-4.5 (4.5.2-2) experimental; urgency=low ++ ++ * Update to SVN 20110123 (r169142) from the gcc-4_5-branch. ++ - Fix PR target/46915, PR target/46729, PR libgcj/46774, PR target/47038, ++ PR target/46685, PR target/45447, PR tree-optimization/46758, ++ PR tree-optimization/45552, PR tree-optimization/43023, ++ PR middle-end/46734, PR fortran/45338, PR preprocessor/39213, ++ PR target/43309, PR fortran/46874, PR tree-optimization/47286, ++ PR tree-optimization/44592, PR target/47201, PR c/47150, PR target/46880, ++ PR middle-end/45852, PR tree-optimization/43655, PR debug/46893, ++ PR rtl-optimization/46804, PR rtl-optimization/46865, PR target/41082, ++ PR tree-optimization/46864, PR fortran/45777, PR tree-optimization/47365, ++ PR tree-optimization/47167, PR target/47318, PR target/46655, ++ PR fortran/47394, PR libstdc++/47354. ++ ++ [ Matthias Klose ] ++ * Update the Linaro support to the 4.5 2011.01-1 release. ++ * Don't build packages now built from the gcc-4.6 package for architectures ++ with a sucessful gcc-4.6 build. ++ ++ [ Kees Cook ] ++ * debian/patches/gcc-default-ssp.patch: do not ignore -fstack-protector-all ++ (LP: #691722). ++ ++ [ Marcin Juszkiewicz ] ++ * Fix biarch/triarch cross builds. ++ - dpkg-shlibdeps failed to find libraries for 64 or n32 builds ++ - LD_LIBRARY_PATH for dpkg-shlibdeps lacked host dirs. ++ ++ -- Matthias Klose Sun, 23 Jan 2011 11:54:52 +0100 ++ ++gcc-4.5 (4.5.2-1) experimental; urgency=low ++ ++ * GCC 4.5.2 release. ++ ++ -- Matthias Klose Sat, 18 Dec 2010 14:14:38 +0100 ++ ++gcc-4.5 (4.5.1-12) experimental; urgency=low ++ ++ * Update to SVN 20101129 (r167272) from the gcc-4_5-branch. ++ - Fix PR fortran/45742, PR tree-optimization/46498, PR target/45807, ++ PR target/44266, PR rtl-optimization/46315, PR tree-optimization/44545, ++ PR tree-optimization/46491, PR rtl-optimization/46571, PR target/31100, ++ PR c/46547, PR fortran/46638, PR tree-optimization/46675, PR debug/46258, ++ PR ada/40777. ++ ++ [ Matthias Klose ] ++ * Use lib instead of lib64 as the 64bit system dir on biarch ++ architectures defaulting to 64bit. Closes: #603597. ++ * Fix powerpc and s390 builds when biarch is disabled. ++ * Backport PR bootstrap/44768, miscompilation of dpkg on ARM ++ with -O2 (Chung-Lin Tang). LP: #674146. ++ * Update libgcc2 symbols file. Closes: #602099. ++ ++ [ Marcin Juszkiewicz ] ++ * Do not depend on target mpfr and zlib -dev packages for cross builds. ++ LP: #676027. ++ ++ [ Konstantinos Margaritis ] ++ * Add support for new target architecture `armhf'. Closes: #603948. ++ ++ -- Matthias Klose Mon, 22 Nov 2010 08:12:08 +0100 ++ ++gcc-4.5 (4.5.1-11) experimental; urgency=low ++ ++ * Update to SVN 20101114 (r166728) from the gcc-4_5-branch. ++ - Fix PR fortran/45742. ++ * Don't hardcode debian/patches when referencing patches. Closes: #600502. ++ ++ -- Matthias Klose Sun, 14 Nov 2010 08:36:27 +0100 ++ ++gcc-4.5 (4.5.1-10) experimental; urgency=low ++ ++ * Update to SVN 20101112 (r166653) from the gcc-4_5-branch. ++ - Fix PR rtl-optimization/44691, PR tree-optimization/46355, ++ PR tree-optimization/46177, PR c/44772, PR tree-optimization/46099, ++ PR middle-end/43690, PR tree-optimization/46165, PR middle-end/46419, ++ PR tree-optimization/46107, PR tree-optimization/45314, PR debug/45939, ++ PR rtl-optimization/46237, PR middle-end/44569, PR middle-end/44569, ++ PR tree-optimization/45902, PR target/46153, PR rtl-optimization/46226, ++ PR tree-optimization/46167, PR target/46098, PR target/45946, ++ PR fortran/42169, PR middle-end/46019, PR c/45969, PR c++/45894, ++ PR c++/46160, PR c++/45983, PR fortran/46152, PR fortran/46140, ++ PR libstdc++/45999, PR libgfortran/46373, PR libgfortran/46010, ++ PR fortran/46007, PR c++/46024. ++ * Update the Linaro support to the 4.5 2010.11 release. ++ * Update gcc-4.5 source dependencies. Closes: #600503. ++ * ARM: Fix Thumb-1 reload ICE with nested functions (Julian Brown), ++ taken from the trunk. ++ * Fix earlyclobbers on some arm.md DImode shifts (may miscompile "x >> 1"), ++ taken from the trunk. Closes: #600888. ++ ++ -- Matthias Klose Fri, 12 Nov 2010 18:34:47 +0100 ++ ++gcc-4.5 (4.5.1-9) experimental; urgency=low ++ ++ * Update to SVN 20101014 (r165474) from the gcc-4_5-branch. ++ - Fix PR target/45820, PR tree-optimization/45854, PR target/45843, ++ PR target/43764, PR rtl-optimization/43358, PR bootstrap/44621, ++ PR libffi/45677, PR middle-end/45869, PR middle-end/45569, ++ PR tree-optimization/45752, PR fortran/45748, PR libstdc++/45403, ++ PR libstdc++/45924, PR libfortran/45710, PR bootstrap/44455, ++ PR java/43839, PR debug/45656, PR debug/44832, PR libstdc++/45711, ++ PR tree-optimization/45982. ++ ++ [ Matthias Klose ] ++ * Update the Linaro support to the 4.5 2010.10 release. ++ * Just try to build java on mips/mipsel (was disabled in 4.5.0-9, when ++ java was built from the same source package). Addresses: #599976. ++ * Remove the gpc packaging support. ++ * Fix libmudflap.so symlink. Addresses: #600161. ++ * Fix pch test failures with heap randomization on armel (PR pch/45979). ++ ++ [ Kees Cook ] ++ * Don't enable -fstack-protector with -ffreestanding. ++ ++ -- Matthias Klose Thu, 14 Oct 2010 19:17:41 +0200 ++ ++gcc-4.5 (4.5.1-8) experimental; urgency=low ++ ++ * Update to SVN 20100925 (r164618) from the gcc-4_5-branch. ++ - Fix PR middle-end/44763, PR java/44095, PR target/35664, ++ PR rtl-optimization/41085, PR rtl-optimization/45051, ++ PR target/45694, PR middle-end/45678, PR middle-end/45678, ++ PR middle-end/45704, PR rtl-optimization/45728, PR libfortran/45532, ++ PR rtl-optimization/45695, PR rtl-optimization/42775, PR target/45726, ++ PR tree-optimization/45623, PR tree-optimization/45709, PR debug/43628, ++ PR tree-optimization/45709, PR rtl-optimization/45593, PR fortran/45081, ++ * Find 32bit system libraries on sparc64, s390x. ++ * Remove README.Debian from the source package to avoid confusion for ++ readers of the packaging. ++ * Don't include info files and man pages in hppa64 and spu builds. ++ Closes: #597435. ++ * Apply proposed patch for PR mudflap/24619 (instrumentation of dlopen) ++ (Brian M. Carlson) Closes: #507514. ++ ++ -- Matthias Klose Sat, 25 Sep 2010 14:11:39 +0200 ++ ++gcc-4.5 (4.5.1-7) experimental; urgency=low ++ ++ * Update to SVN 20100914 (r164279) from the gcc-4_5-branch. ++ - Fix PR target/40959, PR middle-end/45567, PR debug/45660, ++ PR rtl-optimization/41087, PR rtl-optimization/44919, PR target/36502, ++ PR target/42313, PR target/44651. ++ * Add support to build from the Linaro 4.5 2010.09 release. ++ * gcc-4.5-plugin-dev: Install config/arm/arm-cores.def. ++ * Remove non-existing URL's in README.c++ (Osamu Aoki). Closes: #596406. ++ * Don't provide c++abi2-dev for g++ cross builds. ++ * Don't pass -mimplicit-it=thumb if -mthumb to as on ARM, rejected upstream. ++ ++ -- Matthias Klose Tue, 14 Sep 2010 12:52:34 +0200 ++ ++gcc-4.5 (4.5.1-6) experimental; urgency=low ++ ++ * Update to SVN 20100909 (r164132) from the gcc-4_5-branch. ++ - Fix PR middle-end/45312, PR bootstrap/43847, PR middle-end/44554, ++ PR middle-end/40386, PR other/45443, PR c++/45200, PR c++/45293, ++ PR c++/45558, PR fortran/45595, PR fortran/45530, PR fortran/45489, ++ PR fortran/45019, PR libstdc++/45398. ++ ++ [ Matthias Klose ] ++ * Tighten binutils dependencies to 2.20.1-14. ++ ++ [ Marcin Juszkiewicz ] ++ * Fix the gcc-4.5-plugin-dev package name for cross builds. LP: #631474. ++ * Build the gcc-4.5-plugin-dev for stage1 cross builds. ++ * Fix priorities and sections for some cross packages. ++ ++ [ Al Viro ] ++ * Fix installation of libgcc_s.so as a linker script for biarch builds. ++ ++ [ Kees Cook ] ++ * Push glibc stack traces into stderr when building the package. ++ * debian/patches/gcc-default-ssp.patch: Lower ssp-buffer-size to 4. ++ ++ -- Matthias Klose Fri, 10 Sep 2010 21:25:37 +0200 ++ ++gcc-4.5 (4.5.1-5) experimental; urgency=low ++ ++ * Always add dependencies on multilib library packages in *-multilib ++ packages. ++ * Fix installation of libgcc_s.so on architectures when libgcc_s.so is ++ a linker script, not a symlink (Steve Langasek). Closes: #595474. ++ * Remove the lib32gcc1 preinst script. Closes: #595495. ++ ++ -- Matthias Klose Sat, 04 Sep 2010 12:41:40 +0200 ++ ++gcc-4.5 (4.5.1-4) experimental; urgency=low ++ ++ * Update to SVN 20100903 (r163833) from the gcc-4_5-branch. ++ - Fix PR target/45070, PR middle-end/45458, PR rtl-optimization/45353, ++ PR middle-end/45423, PR c/45079, PR tree-optimization/45393, ++ PR c++/44991, PR middle-end/45484, PR debug/45500, PR lto/45496. ++ ++ [ Matthias Klose ] ++ * Install config/vxworks-dummy.h in the gcc-4.5-plugin-dev package ++ on armel, mipsel and sparc64 too. ++ * Cleanup packaging files in gcc-source package. ++ * [ARM] Provide __builtin_expect() hints in linux-atomic.c (backport). ++ ++ [ Al Viro ] ++ * Fix builds with disabled biarch library packages. ++ * New variables {usr_lib,gcc_lib_dir,libgcc_dir}{,32,64,n32}, and switch ++ to using them in rules.d/*; as the result, most of the explicit pathnames ++ in there are gone _and_ we get uniformity across different flavours. ++ * New variables {usr_lib,gcc_lib_dir,libgcc_dir}{,32,64,n32}, and switch ++ to using them in rules.d/*; as the result, most of the explicit pathnames ++ in there are gone _and_ we get uniformity across different flavours. ++ * Merge bi-/tri-arch stuff in binary-gcc.mk. ++ * Merge rules for libgcc biarch variants. ++ * Merge rules for libstdc++ biarch variants. Fix n32 variant of ++ libstdc++-dbg removing _pic.a from the wrong place. ++ * Merge libgfortran rules. ++ * Merge rules for cxx-multi and objc-multi packages. ++ * Enable gcc-hppa64 in cross-gcc-to-hppa build. ++ ++ [ Marcin Juszkiewicz ] ++ * Create libgcc1 and gcc-*-base packages for stage2 cross builds. ++ LP: #628855. ++ ++ -- Matthias Klose Fri, 03 Sep 2010 18:09:40 +0200 ++ ++gcc-4.5 (4.5.1-3) experimental; urgency=low ++ ++ * Update to SVN 20100829 (r163627) from the gcc-4_5-branch. ++ - Fix PR target/45327, PR middle-end/45292, PR fortran/45344, ++ PR target/41484, PR rtl-optimization/44858, PR rtl-optimization/45400, ++ PR tree-optimization/45260, PR c++/45315. ++ ++ [ Matthias Klose ] ++ * Don't run the libstdc++ testsuite on armel on the buildds. ++ * Integrate and extend bi/tri-arch cross builds patches. ++ * Fix dependencies for mips* triarch library packages depend on *both* lib64* ++ and libn32* packages. Closes: #594540. ++ * Tighten binutils dependencies to 2.20.1-13. ++ * Update LAST_UPDATED file when applying upstream updates. ++ ++ [ Al Viro ] ++ * Bi/tri-arch cross builds patches. ++ * Fix installation paths in bi/tri-arch libobjc and libmudflap packages. ++ * Merge rules for all flavours of libgomp, libmudflap, libobjc. ++ * Crossbuild fix for lib32gomp (use $(PFL)/lib32 instead of $(lib32)). ++ * gcc-4.5: libgcc_s.so.1 symlink creation on cross-builds. ++ * Enable gcc-multilib for cross-builds and fix what needs fixing. ++ * Enable g++-multilib for cross-builds, fix pathnames. ++ * Enable gobjc/gobjc++ multilib for cross-builds, fixes. ++ * Enable gfortran multilib for cross-builds, fix paths. ++ * Multilib dependency fixes for cross-builds. ++ ++ -- Matthias Klose Sun, 29 Aug 2010 18:24:37 +0200 ++ ++gcc-4.5 (4.5.1-2) experimental; urgency=low ++ ++ * Update to SVN 20100818 (r163323) from the gcc-4_5-branch. ++ - Fix PR target/41089, PR tree-optimization/44914, PR c++/45112, ++ PR fortran/44929, PR middle-end/45262, PR debug/45259, PR debug/45055, ++ PR target/44805, PR middle-end/45034, PR tree-optimization/45109, ++ PR target/44942, PR fortran/31588, PR fortran/43954, PR fortran/44660, ++ PR fortran/42051, PR fortran/44064, PR fortran/45151, PR libstdc++/44963, ++ PR tree-optimization/45241, PR middle-end/44632 (closes: #585925), ++ PR libstdc++/45283, PR target/45296. ++ ++ [ Matthias Klose ] ++ * Allow overwriting of the PF macro used in the build from the environment ++ (Jim Heck). Closes: #588381. ++ * Fix libc-dbg build dependency for java enabled builds. Addresses: #591424. ++ * gcj: Align data in .rodata.jutf8.* sections, patch taken from the trunk. ++ * Configure with --enable-checking+release. LP: #612822. ++ * Add the complete packaging to the -source package. LP: #608650. ++ * Drop the gcc-ix86-asm-generic32.diff patch. ++ * Tighten (build-) dependency on cloog-ppl (>= 0.15.9-2). ++ * Apply proposed patch for PR middle-end/45292. ++ * Re-enable running the libstdc++ testsuite on armel and ia64 on the buildds. ++ ++ [ Steve Langasek ] ++ * s,/lib/,/$(libdir)/, throughout debian/rules*; a no-op in the current ++ case, but required for us to find the libraries when building for ++ multiarch ++ * Don't append multiarch paths to any multilib paths except for the default; ++ our biarch (multilib) builds need to remain independent of multiarch in ++ the near term, so we want to make sure we can find /usr/lib32 without ++ /usr/lib/i486-linux-gnu being available. ++ * debian/control.m4, debian/rules.conf: conditionally set packages to be ++ Multi-Arch: yes when MULTIARCH is defined. ++ ++ [ Marcin Juszkiewicz ] ++ * Allow building intermediate stages for cross builds. LP: #603497. ++ ++ -- Matthias Klose Wed, 18 Aug 2010 07:00:12 +0200 ++ ++gcc-4.5 (4.5.1-1) experimental; urgency=low ++ ++ * GCC-4.5.1 release. ++ * Update to SVN 20100731 (r162781) from the gcc-4_5-branch. ++ - Fix PR tree-optimization/45052, PR target/43698. ++ * Apply proposed fixes for PR c++/45112, PR c/45079. ++ * Install config/vxworks-dummy.h in the gcc-4.5-plugin-dev package ++ on armel, mips, mipsel, sh4, sparc, sparc64. Closes: #590054. ++ * Link executables statically when `static' is passed in DEB_BUILD_OPTIONS ++ (Jim Heck). Closes: #590102. ++ * Stop building java packages from the gcc-4.5 source package. ++ ++ -- Matthias Klose Sat, 31 Jul 2010 16:30:20 +0200 ++ ++gcc-4.5 (4.5.0-10) experimental; urgency=low ++ ++ * Update to SVN 20100725 (r162508) from the gcc-4_5-branch. ++ - Fix PR tree-optimization/45047, PR c++/43016, PR c++/45008. ++ * Disable building gcj/libjava on mips/mipsel (fails to link libgcj). ++ * Update libstdc++6 symbols files. ++ ++ -- Matthias Klose Sun, 25 Jul 2010 16:39:11 +0200 ++ ++gcc-4.5 (4.5.0-9) experimental; urgency=low ++ ++ * Update to SVN 20100723 (r162448) from the gcc-4_5-branch (post ++ GCC-4.5.1 release candidate 1). ++ - Fix PR debug/45015, PR target/44942, PR tree-optimization/44900, ++ PR tree-optimization/44977, PR c++/44996, PR fortran/44929, ++ PR fortran/30668, PR fortran/31346, PR fortran/34260, ++ PR fortran/40011. ++ ++ [ Marcin Juszkiewicz ] ++ * Fix dependencies on cross library packages. ++ * Copy all debian/rules* files to the -source package. ++ ++ [ Matthias Klose ] ++ * Fix versioned build dependency on gcc-4.x-source package for cross builds. ++ LP: #609060. ++ * Set Vcs attributes in control file. ++ ++ -- Matthias Klose Fri, 23 Jul 2010 13:08:07 +0200 ++ ++gcc-4.5 (4.5.0-8) experimental; urgency=low ++ ++ * Update to SVN 20100718 (r161892) from the gcc-4_5-branch. ++ - Fixes: PR target/44531, PR bootstrap/44820, PR target/44597, ++ PR target/44705, PR middle-end/44777, PR debug/44694, PR c++/44039, ++ PR tree-optimization/43801, PR target/44575, PR debug/44104, ++ PR middle-end/44671, PR middle-end/44686, PR tree-optimization/44357, ++ PR debug/44694, PR middle-end/43866, PR debug/42278, PR c++/44059, ++ PR tree-optimization/43905, PR middle-end/44133, PR tree-optimize/44063, ++ PR tree-optimization/44683, PR rtl-optimization/43332, PR debug/44610, ++ PR middle-end/44684, PR tree-optimization/44393, PR middle-end/44674, ++ PR c++/44628, PR c++/44587, PR fortran/44582, PR fortran/43841, ++ PR fortran/43843, PR libstdc++/44708, PR tree-optimization/44886, ++ PR target/43888, PR tree-optimization/44284, PR middle-end/44828, ++ PR middle-end/41355, PR c++/44703, PR ada/43731, PR fortran/44773, ++ PR fortran/44847. ++ ++ [ Marcin Juszkiewicz ] ++ * debian/rules2: Merge rules.d includes. ++ * Properly -name -dbg packages for cross builds. ++ * Various cross build fixes. ++ * Build libmudflap packages for cross builds. ++ * Fix generation of maintainer scripts for cross packages. ++ * Build a gcc-base package for cross builds. ++ ++ [ Kees Cook ] ++ * Fix additional libstdc++ testsuite failures for hardening defaults. ++ ++ [ Samuel Thibault ] ++ * Update hurd patch for 4.5, fixing build failure. Closes: #584819. ++ ++ [ Matthias Klose ] ++ * gcc-arm-implicit-it.diff: Only pass -mimplicit-it=thumb when in ++ thumb mode (Andrew Stubbs). ++ ++ -- Matthias Klose Sun, 18 Jul 2010 10:53:51 +0200 ++ ++gcc-4.5 (4.5.0-7) experimental; urgency=low ++ ++ * Update to SVN 20100625 (r161383) from the gcc-4_5-branch. ++ - Fixes: PR bootstrap/44426, PR target/44546, PR target/44261, ++ PR target/43740, PR libstdc++/44630 (closes: #577458), ++ PR c++/44627 (LP: #503668), PR target/39690, PR target/44615, ++ PR fortran/44556, PR c/44555. ++ - Update libstdc++'s pretty printer for python2.6. Closes: #585202. ++ ++ [ Matthias Klose ] ++ * Fix libstdc++ symbols files for powerpc and sparc. ++ * Add maintainer scripts for cross packages. ++ ++ [ Samuel Thibault ] ++ * Update hurd patch for 4.5, fixing build failure. Closes: #584454, ++ #584819. ++ ++ [ Marcin Juszkiewicz ] ++ * Merge the rules.d/binary-*-cross.mk files into rules.d/binary-*.mk. ++ ++ -- Matthias Klose Fri, 25 Jun 2010 15:57:38 +0200 ++ ++gcc-4.5 (4.5.0-6) experimental; urgency=low ++ ++ [ Matthias Klose ] ++ ++ * Update to SVN 20100617 (r161901) from the gcc-4_5-branch. Fixes: ++ PR target/44169, PR bootstrap/43170, PR objc/35996, PR objc++/32052, ++ PR objc++/23716, PR lto/44464, PR rtl-optimization/42461, PR fortran/44536, ++ PR tree-optimization/44258, PR tree-optimization/44423, PR target/44534, ++ PR bootstrap/44426, PR tree-optimization/44508, PR tree-optimization/44507, ++ PR lto/42776, PR target/44481, PR debug/41371, PR bootstrap/37304, ++ PR target/44067, PR debug/41371, PR debug/41371, PR target/44075, ++ PR c++/44366, PR c++/44401, PR fortran/44347, PR fortran/44430, ++ PR lto/42776, PR libstdc++/44487, PR other/43838, PR libgcj/44216. ++ * debian/patches/cross-fixes.diff: Update for 4.5 (Marcin Juszkiewicz). ++ * debian/patches/libstdc++-pic.diff: Fix installation for cross builds. ++ * Fix PR bootstrap/43847, --enable-plugin for cross builds. ++ * Export long double versions of "C" math library for arm-linux-gnueabi, ++ m68k-linux-gnu (ColdFire), mips*-linux-gnu (o32 ABI), sh*-linux-gnu ++ (not 32 bit). Merge the libstdc++-*-ldbl-compat.diff patches. ++ * Merge binary-libgcc.mk packaging changes into binary-libgcc-cross.mk ++ (Loic Minier). ++ * Update libgcc and libstdc++ symbols files. ++ ++ [ Aurelien Jarno ] ++ ++ * libstdc++-mips-ldbl-compat.diff: On MIPS provide the long double ++ versions of "C" math functions in libstdc++ as we need to keep the ++ ABI. Closes: #584610. ++ ++ -- Matthias Klose Thu, 17 Jun 2010 14:56:14 +0200 ++ ++gcc-4.5 (4.5.0-5) experimental; urgency=low ++ ++ * Update to SVN 20100602 (r160097) from the gcc-4_5-branch. Fixes: ++ PR target/44338, PR middle-end/44337, PR tree-optimization/44182, ++ PR target/44161, PR c++/44358, PR fortran/44360, PR lto/44385. ++ * Fix PR target/44261, taken from the trunk. Closes: #582787. ++ * Fix passing the expanded -iplugindir option. ++ * Disable broken profiled bootstrap on alpha. ++ * On ix86, pass -mtune=generic32 in 32bit mode to the assembler, when ++ configured for i586-linux-gnu or i686-linux-gnu. ++ ++ -- Matthias Klose Thu, 03 Jun 2010 00:44:37 +0200 ++ ++gcc-4.5 (4.5.0-4) experimental; urgency=low ++ ++ * Update to SVN 20100527 (r160047) from the gcc-4_5-branch. Fixes: ++ PR rtl-optimization/44164, PR middle-end/44069, PR target/44199, ++ PR lto/44196, PR target/43733, PR target/44245, PR target/43869, ++ PR debug/44223, PR tree-optimization/44038, PR tree-optimization/43949, ++ PR debug/44205, PR debug/44178, PR bootstrap/43870, PR target/44202, ++ PR target/44074, PR lto/43455, PR lto/42653, PR lto/42425, PR lto/43080, ++ PR lto/43946, PR c++/43382, PR c++/41510, PR c++/44193, PR c++/44157, ++ PR c++/44158, PR lto/44256, PR libstdc++/44190, PR lto/44312, ++ PR target/43636, PR target/43726, PR c++/43555PR libstdc++/40497. ++ ++ [ Matthias Klose ] ++ ++ * Enable multilibs again on powerpcspe. Closes: #579780. ++ * Fix setting CC for REVERSE_CROSS build (host == target,host != build). ++ Closes: #579779. ++ * Fix setting biarch_cpu macro. ++ * Don't bother with un-normalized paths in .la files, just remove them. ++ * debian/locale-gen: Update locales needed for the libstdc++-v3 testsuite. ++ * If libstdc++6 is built from newer gcc-4.x source, run the libstdc++-v3 ++ testsuite against the installed lib too. ++ * Configure with --enable-secureplt on powerpcspe. ++ ++ [ Aurelien Jarno ] ++ ++ * Fix $(distrelease) on non-official archives. Fix powerpcspe, sh4 and ++ sparc64 builds. ++ ++ -- Matthias Klose Sun, 30 May 2010 12:52:02 +0200 ++ ++gcc-4.5 (4.5.0-3) experimental; urgency=low ++ ++ * Update to SVN 20100519 (r159556) from the gcc-4_5-branch. Fixes: ++ PR c++/43704, PR fortran/43339, PR middle-end/43337, PR target/43635, ++ PR tree-optimization/43783, PR tree-optimization/43796, PR middle-end/43570, ++ PR libgomp/43706, PR libgomp/43569, PR middle-end/43835, PR c/43893, ++ PR tree-optimization/43572, PR tree-optimization/43845, PR libgcj/40860, ++ PR target/43744, PR debug/43370, PR c++/43880, PR middle-end/43671, ++ PR debug/43972, PR target/43921, PR c++/38064, PR c++/43953, ++ PR fortran/43985, PR fortran/43592, PR fortran/40539, PR c++/43787, ++ PR middle-end/44085, PR middle-end/44071, PR middle-end/43812, ++ PR debug/44028, PR rtl-optimization/44012, PR target/44046, ++ PR documentation/44016, PR fortran/44036, PR fortran/40728, ++ PR libstdc++/44014, PR lto/44184, PR bootstrap/42347, PR middle-end/44102, ++ PR c++/44127, PR debug/44136, PR target/44088, PR tree-optimization/44124, ++ PR fortran/43591, PR fortran/44135, PR libstdc++/43259. ++ ++ [ Matthias Klose ] ++ * Revert gcj-arm-no-merge-exidx-entries patch, fixed by PR libgcj/40860. ++ * Don't run the libstdc++-v3 testsuite on the ia64 buildds. Timeouts. ++ * Backport two libjava fixes from the trunk to run josm with gcj. ++ * Ubuntu only: ++ - Pass --hash-style=gnu instead of --hash-style=both to the linker. ++ * Preliminary architecture port for powerpcspe (Kyle Moffett). ++ Closes: #579780. ++ * Update configury to be able to target i686 instead of i486 on i386. ++ ++ [ Aurelien Jarno] ++ * Don't link with --hash-style=both on mips/mipsel as GNU hash is not ++ compatible with the MIPS ABI. ++ * Default to -mplt on mips(el), -march=mips2 and -mtune=mips32 on 32-bit ++ mips(el), -march=mips3 and -mtune=mips64 on 64-bit mips(el). ++ ++ -- Matthias Klose Wed, 19 May 2010 09:48:20 +0200 ++ ++gcc-4.5 (4.5.0-2) experimental; urgency=low ++ ++ * Update to SVN 20100419 from the gcc-4_5-branch. ++ - Fix PR tree-optimization/43627, c++/43641, PR c++/43621, PR c++/43611, ++ PR fortran/31538, PR fortran/30073, PR target/43662, ++ PR tree-optimization/43572, PR tree-optimization/43771. ++ * Install the linker plugin. ++ * Search the linker plugin as a readable, not an executable file. ++ * Link with --hash-style=both on mips/mipsel. ++ * On mips, pass -mfix-loongson2f-nop to as, if -mno-fix-loongson2f-nop ++ is not passed. ++ * Sequel to PR40521, fix -g to generate .eh_frame on ARM. ++ * On ARM, let gcj pass --no-merge-exidx-entries to the linker. ++ * Build-depend/depend on binutils snapshot. ++ * Update NEWS.html and NEWS.gcc. ++ ++ -- Matthias Klose Mon, 19 Apr 2010 15:22:55 +0200 ++ ++gcc-4.5 (4.5.0-1) experimental; urgency=low ++ ++ * GCC 4.5.0 release. ++ * Always apply biarch patches. ++ * Build the lto-linker plugin again. Closes: #575448. ++ * Run the libstdc++v3 testsuite on armel again. ++ * Fix --enable-libstdcxx-time documentation, show configure result. ++ * On linux targets always pass --no-add-needed to the linker. ++ * Update the patch to search for plugins in a default plugin directory. ++ * Fix java installations in snapshot builds. ++ * Configure --with-plugin-ld=ld.gold. ++ * Linker selection: ld is used by default, to use the gold linker, ++ pass -fuse-linker-plugin (no other side effects if -flto/-fwhopr ++ is not passed). To force ld.bfd or ld.gold, pass -B/usr/lib/compat-ld ++ for ld.bfd or /usr/lib/gold-ld for ld.gold. ++ * Don't apply the gold-and-ld patch for now. ++ * Stop building the documentation for dfsg compliant builds. Closes: #571759. ++ ++ -- Matthias Klose Wed, 14 Apr 2010 13:29:20 +0200 ++ ++gcc-4.5 (4.5-20100404-1) experimental; urgency=low ++ ++ * Update to SVN 20100404 from the trunk. ++ * Fix build failures building cross compilers configure --with-ld. ++ * lib32gcc1: Set priority to `extra'. ++ * Apply proposed patch to search for plugins in a default plugin directory. ++ * In snapshot builds, use for javac/ecj1 the jvm provided by the package. ++ * libstdc++-arm-ldbl-compat.diff: On ARM provide the long double versions ++ of "C" math functions in libstdc++; these are dropped when built ++ against glibc-2.11. ++ ++ -- Matthias Klose Sun, 04 Apr 2010 15:51:25 +0200 ++ ++gcc-4.5 (4.5-20100321-1) experimental; urgency=low ++ ++ * Update to SVN 20100321 from the trunk. ++ * gcj-4.5-jre-headless: Stop providing java-virtual-machine. ++ * gcj-4.5-plugin-dev: Don't suggest mudflap packages. ++ * Apply proposed patch to enable both gold and ld in a single toolchain. ++ New option -fuse-ld=ld.bfd, -fuse-ld=gold. ++ ++ -- Matthias Klose Sun, 21 Mar 2010 11:45:48 +0100 ++ ++gcc-4.5 (4.5-20100227-1) experimental; urgency=low ++ ++ * Update to SVN 20100227 from the trunk. ++ * Don't run the libstdc++-v3 testsuite on arm*-*-linux-gnueabi, when ++ defaulting to thumb mode (Timeouts on the Ubuntu buildd). ++ ++ -- Matthias Klose Sat, 27 Feb 2010 08:29:55 +0100 ++ ++gcc-4.5 (4.5-20100222-1) experimental; urgency=low ++ ++ * Update to SVN 20100222 from the trunk. ++ - Install additional header files needed by plugins. Closes: #562881. ++ * gcc-4.5-plugin-dev: Should depend on libgmp3-dev. Closes: #566366. ++ * Update libstdc++6 symbols files. ++ ++ -- Matthias Klose Tue, 23 Feb 2010 02:16:22 +0100 ++ ++gcc-4.5 (4.5-20100216-0ubuntu1~ppa1) lucid; urgency=low ++ ++ * Update to SVN 20100216 from the trunk. ++ * Don't call dh_makeshlibs with -V for shared libraries with ++ symbol files. ++ * Don't run the libstdc++-v3 testsuite in thumb mode on armel ++ to work around buildd timeout (see PR target/42509). ++ ++ -- Matthias Klose Wed, 17 Feb 2010 02:06:02 +0100 ++ ++gcc-4.5 (4.5-20100204-1) experimental; urgency=low ++ ++ * Update to SVN 20100204 from the trunk. ++ ++ -- Matthias Klose Thu, 04 Feb 2010 19:44:19 +0100 ++ ++gcc-4.5 (4.5-20100202-1) experimental; urgency=low ++ ++ * Update to SVN 20100202 from the trunk. ++ - gcc-stack_chk_fail-check.diff: Remove, applied upstream. ++ * Update libstdc++6 symbol files. ++ * Build gnat in snapshot builds on arm. ++ * Configure with --enable-checking=yes for snapshot builds, and for ++ 4.5 builds before the release. ++ * Temporary workaround: On arm-linux-gnueabi run the libstdc++v3 testsuite ++ with -Wno-abi. ++ * When building the hppa64 cross compiler, add $(builddir)/gcc to ++ LD_LIBRARY_PATH to find the just built libgcc6. Closes: #565862. ++ * On sh4-linux, use sh as java architecture name instead of sh4. ++ * On armel, build gnat-4.5 using gcc-snapshot. ++ * Revert the bump of the libgcc soversion on hppa (6 -> 4). ++ ++ -- Matthias Klose Tue, 02 Feb 2010 19:35:25 +0100 ++ ++gcc-4.5 (4.5-20100107-1) experimental; urgency=low ++ ++ [ Matthias Klose ] ++ * Update to SVN 20100107 from the trunk. ++ * Revert the workaround for the alpha build (PR bootstrap/42511 is fixed). ++ * testsuite-hardening-format.diff: Add a fix for the libstdc++ testsuite. ++ * Build-depend again on autogen. ++ * Work around PR lto/41569 (installation bug when configured with ++ --enabled-gold). ++ * On armel run the testsuite both in arm and thumb mode, when the ++ distribution is supporthing tumb processors. ++ * Work around PR target/42509 (armel), not setting BOOT_CFLAGS, but ++ applying libcpp-arm-workaround.diff. ++ ++ [ Nobuhiro Iwamatsu ] ++ * Update gcc-multiarch patch for sh4. ++ ++ -- Matthias Klose Thu, 07 Jan 2010 16:34:57 +0100 ++ ++gcc-4.5 (4.5-20100106-0ubuntu1) lucid; urgency=low ++ ++ * Update to SVN 20100106 from the trunk. ++ * gcj-4.5-jdk: Include /usr/lib/jvm-exports. ++ * Rename libgcc symbols file for hppa. ++ * On alpha and armel, set BOOT_CFLAGS to -g -O1 to work around bootstrap ++ failures (see PR target/42509 (armel) and PR bootstrap/42511 (alpha)). ++ * Base the source build-dependency on the package version instead of the ++ gcc version. ++ ++ -- Matthias Klose Wed, 06 Jan 2010 14:17:29 +0100 ++ ++gcc-4.5 (4.5-20100103-1) experimental; urgency=low ++ ++ * Update to SVN 20100103 from the trunk. ++ ++ [ Samuel Thibault ] ++ * Update hurd patch for 4.5. Closes: #562802. ++ ++ [ Aurelien Jarno ] ++ * Remove patches/kbsd-gnu-ada.diff (merged upstream). ++ ++ [ Matthias Klose ] ++ * libgcj11: Move .so symlinks into gcj-4.5-jdk. Addresses: #563280. ++ * gcc-snapshot: On sparc64, use gcc-snapshot as bootstrap compiler. ++ * Don't use expect-tcl8.3 on hppa anymore. ++ * Merge gnat-4.4 changes back from 4.4.2-5. ++ * Bump libgcc soversion on hppa (4 -> 6). ++ * Default to v9a (ultrasparc) on sparc*-linux. ++ ++ -- Matthias Klose Sun, 03 Jan 2010 17:25:27 +0100 ++ ++gcc-4.5 (4.5-20091226-1) experimental; urgency=low ++ ++ * Update to SVN 20091226 from the trunk. ++ * Fix powerpc spu installation. ++ * Enable multiarch for sh4. ++ * Fix libffi multilib test runs. ++ * Configure the hppa -> hppa64 cross compiler --with-system-zlib. ++ * gcc-4.5-hppa64: Don't ship info dir file. ++ * lib32stdc++6{,-dbg}: Add dependency on 32bit glibc. ++ ++ -- Matthias Klose Sat, 26 Dec 2009 15:38:23 +0100 ++ ++gcc-4.5 (4.5-20091223-1) experimental; urgency=low ++ ++ * Update to SVN 20091223 from the trunk. ++ ++ [ Matthias Klose ] ++ * Update hardening patches for 4.5. ++ * Don't call install-info directly, depend on dpkg | install-info instead. ++ * Add conflicts with packages built from GCC 4.4 sources. ++ * On ARM, pass --hash-style=both to ld. ++ * Update libgfortran3 symbols file. ++ * Update libstdc++6 symbols file. ++ ++ [ Arthur Loiret ] ++ * debian/rules.conf (gen_no_archs): Handle multiple arm ports. ++ ++ -- Matthias Klose Wed, 23 Dec 2009 18:02:24 +0100 ++ ++gcc-4.5 (4.5-20091220-1) experimental; urgency=low ++ ++ * Update to SVN 20091220 from the trunk. ++ - Remove patches applied upstream: arm-boehm-gc-locks.diff, ++ arm-gcc-gcse.diff, deb-protoize.diff, gcc-arm-thumb2-sched.diff, ++ gcc-atom-doc.diff, gcc-atom.diff, gcc-build-id.diff, ++ gcc-unwind-debug-hook.diff, gcj-use-atomic-builtins-doc.diff, ++ gcj-use-atomic-builtins.diff, libjava-atomic-builtins-eabi.diff, ++ libjava-nobiarch-check-snap.diff, lp432222.diff, pr25509-doc.diff, ++ pr25509.diff, pr39429.diff, pr40133.diff, pr40134.diff, rev146451.diff, ++ s390-biarch-snap.diff, sh4-scheduling.diff, sh4_atomic_update.diff. ++ - Update patches: gcc-multiarch.diff, gcc-textdomain.diff, ++ libjava-nobiarch-check.diff, libjava-subdir.diff, libstdc++-doclink.diff, ++ libstdc++-man-3cxx.diff, libstdc++-pic.diff, note-gnu-stack.diff, ++ rename-info-files.diff, s390-biarch.diff. ++ * Stop building the protoize package, removed from the GCC 4.5 sources. ++ * gcc-4.5: Install lto1, lto-wrapper, and new header files for intrinsics. ++ * libstdc++6-4.5-dbg: Install the python files for use with gdb. ++ * Build java packages from the gcc-4.5 source package. ++ ++ -- Matthias Klose Sun, 20 Dec 2009 10:56:56 +0100 ++ ++gcc-4.4 (4.4.2-6) unstable; urgency=low ++ ++ * Update to SVN 20091220 from the gcc-4_4-branch (r155367). ++ Fix PR c++/42387, PR c++/41183. ++ ++ [ Matthias Klose ] ++ * Apply svn-doc-updates.diff for non DFSG builds. ++ * gcc-snapshot: ++ - Remove patches integrated upstream: pr40133.diff. Closes: #561550. ++ ++ [ Nobuhiro Iwamatsu ] ++ * Backport linux atomic ops changes for sh4 from the trunk. Closes: #561550. ++ * Backport from trunk: [SH] Not run scheduling before reload as default. ++ Closes: #561429. ++ ++ [ Arthur Loiret ] ++ * Apply spu patches independently of the hardening patches; fix build ++ failure on powerpc. ++ ++ -- Matthias Klose Sun, 20 Dec 2009 10:20:19 +0100 ++ ++gcc-4.4 (4.4.2-5) unstable; urgency=low ++ ++ * Update to SVN 20091212 from the gcc-4_4-branch (r155122). ++ Revert the fix for PR libstdc++/42261, fix PR fortran/42268, ++ PR target/42263, PR target/42263, PR target/41196, PR target/41939, ++ PR rtl-optimization/41574. ++ ++ [ Matthias Klose ] ++ * Regenerate svn-updates.diff. ++ * Disable biarch testsuite runs for libffi (broken and unused). ++ * Support xz compression of source tarballs. ++ * Fix typo in PR libstdc++/40133 to do the link tests. ++ * gcc-snapshot: ++ - Remove patches integrated upstream: pr40134-snap.diff. ++ - Update s390-biarch.diff for trunk. ++ ++ [ Aurelien Jarno ] ++ * Add sparc64 support: disable multilib and install the libraries ++ in /lib. ++ ++ -- Matthias Klose Sun, 13 Dec 2009 10:28:19 +0100 ++ ++gcc-4.4 (4.4.2-4) unstable; urgency=low ++ ++ * Update to SVN 20091210 from the gcc-4_4-branch (r155122), Fixes: ++ PR target/42165, PR target/42113, PR libgfortran/42090, ++ PR middle-end/42049, PR c++/42234, PR fortran/41278, PR libstdc++/42261, ++ PR libstdc++/42273 PR java/41991. ++ ++ [ Matthias Klose ] ++ * gcc-arm-thumb2-sched.diff: Don't restrict reloads to LO_REGS for Thumb-2. ++ * PR target/40134: Don't redefine LIB_SPEC on hppa. ++ * PR target/42263, fix wrong code bugs in SMP support on ARM, backport from ++ the trunk. ++ * Pass -mimplicit-it=thumb to as by default on ARM, when configured ++ --with-mode=thumb. ++ * Fix boehm-gc build on ARM --with-mode=thumb. ++ * ARM: Don't copy uncopyable instructions in gcse.c (backport from trunk). ++ * Build the spu cross compiler for powerpc from the cell-4_4-branch. ++ * gcj: add option -fuse-atomic-builtins (backport from the trunk). ++ ++ [ Arthur Loiret ] ++ * Make svn update interdiffs more readable. ++ ++ -- Matthias Klose Thu, 10 Dec 2009 04:29:36 +0100 ++ ++gcc-4.4 (4.4.2-3) unstable; urgency=low ++ ++ * Update to SVN 20091118 from the gcc-4_4-branch (r154294). ++ Fix PR PR c++/9381, PR c++/21008, PR c++/35067, PR c++/36912, PR c++/37037, ++ PR c++/37093, PR c++/38699, PR c++/39786, c++/36959, PR c++/41754, ++ PR c++/41876, PR c++/41967, PR c++/41972, PR c++/41994, PR c++/42059, ++ PR c++/42061, ++ PR fortran/41772, PR fortran/41850, PR fortran/41909, ++ PR middle-end/40946, PR middle-end/41317, R tree-optimization/41643, ++ PR target/41900, PR rtl-optimization/41917, PR middle-end/41963, ++ PR middle-end/42029. ++ * Snapshot builds: ++ - Patch updates. ++ - Configure with --disable-browser-plugin. ++ * Configure with --disable-libstdcxx-pch on hppa. ++ * Backport armel patches form the trunk: ++ - Fix PR objc/41848 - workaround ObjC and -fsection-anchors. ++ - Enable scheduling for Thumb-2, including the fix for PR target/42031. ++ - Fix PR target/41939, EABI violation in accessing values below the stack. ++ ++ -- Matthias Klose Wed, 18 Nov 2009 08:37:18 -0600 ++ ++gcc-4.4 (4.4.2-2) unstable; urgency=low ++ ++ * Update to SVN 20091031 from the gcc-4_4-branch (r153603). ++ - Fix PR debug/40521, PR target/40913, PR middle-end/22072, ++ PR target/41665, PR c++/38798, PR c++/40092, PR c++/37875, ++ PR c++/37204, PR fortran/41755, PR libstdc++/40654, PR libstdc++/40826, ++ PR target/41702, PR c/41842, PR target/41762, PR c++/40808, ++ PR fortran/41777, PR libstdc++/40852. ++ * Snapshot builds: ++ - Configure with --enable-plugin, disable the gcjwebplugin by a patch. ++ Addresses: #551200. ++ - Proposed patch for PR lto/41652, compile lto-plugin with ++ -D_FILE_OFFSET_BITS=64 ++ - Allow disabling the ada build via DEB_BUILD_OPTIONS nolang=ada. ++ * Fixes for reverse cross builds. ++ * On sparc default to v9 in 32bit mode. ++ * Fix __stack_chk_fail check for cross builds configured --with-headers. ++ * Apply some fixes for uClibc cross builds (Jonas Meyer, Hector Oron). ++ ++ -- Matthias Klose Sat, 31 Oct 2009 14:16:03 +0100 ++ ++gcc-4.4 (4.4.2-1) unstable; urgency=low ++ ++ * GCC 4.4.2 release. ++ - Fixes PR target/26515, PR target/41680, PR rtl-optimization/41646, ++ PR c++/39863, PR c++/41038. ++ * Fix setting timeout for testsuite runs. ++ * gcj-4.4/gcc-snapshot: Drop build-dependency on libgconf2-dev, disabled ++ by default. ++ * gcj-4.4: Run the libffi testsuite as well. ++ * Add explicit build dependency on zlib1g-dev. ++ * Fix cross builds, add support for gomp and gfortran (only tested for ++ non-biarch targets). ++ * (Build-)depend on binutils-2.20. ++ * Fix up omp.h for multilibs (taken from Fedora). ++ ++ -- Matthias Klose Sun, 18 Oct 2009 02:31:32 +0200 ++ ++gcc-4.4 (4.4.1-6) unstable; urgency=low ++ ++ * Snapshot builds: ++ - Add build dependency on libelfg0-dev (>= 0.8.12). ++ - Add build dependency on binutils-gold where available. ++ - Suggest binutils-gold; not perfect, it is required when using ++ -use-linker-plugin. ++ - Work around installation failure in the lto-plugin (PR lto/41569). ++ - Install java home symlinks in /usr/lib/jvm. ++ - Revert the dwarf2cfi_asm workaround, obsoleted by PR debug/40521. ++ * PR debug/40521: ++ - Apply patch for PR debug/40521, taken from the trunk. ++ - Revert the dwarf2cfi_asm workaround, obsoleted by PR debug/40521. ++ - Depend on binutils (>= 2.19.91.20091005). ++ * Update to SVN 20091005 from the gcc-4_4-branch (r152450). ++ - Fixes PR fortran/41479. ++ * In the test summary, add more information about package versions ++ used for the build. ++ ++ -- Matthias Klose Wed, 07 Oct 2009 02:12:56 +0200 ++ ++gcc-4.4 (4.4.1-5) unstable; urgency=medium ++ ++ * Update to SVN 20091003 from the gcc-4_4-branch (r152174). ++ - Fixes PR target/22093, PR c/39779, PR libffi/40242, PR target/40473, ++ PR debug/40521, PR c/41049, PR debug/41065, PR ada/41100, ++ PR tree-optimization/41101, PR libgfortran/41328, PR libffi/41443, ++ PR fortran/41515. ++ * Updates for snapshot builds: ++ - Fix build dependency on automake for snapshot builds. ++ - Update patches pr40134-snap and libjava-nobiarch-check-snap. ++ * Fix lintian errors in libstdc++ packages and lintian warnings in the ++ source package. ++ * Add debian/README.source. ++ * Don't apply PR libstdc++/39491 for the trunk anymore. ++ * Install java home symlinks for snapshot builds in /usr/lib/jvm, ++ including javac. Depend on ecj. Addresses #536102. ++ * Fix build failure on armel with -mfloat-abi=softfp. ++ * Don't pessimize the code for newer armv6 and armv7 processors. ++ * libjava: Use atomic builtins For Linux ARM/EABI, backported from the ++ trunk. ++ * Proposed patch to fix wrong-code on powerpc (Alan Modra). LP: #432222. ++ * Link against -ldl instead of -lcloog -lppl. Exit with an error when using ++ the Graphite loop transformation infrastructure without having the ++ libcloog-ppl0 package installed (patch taken from Fedora). Packages ++ using these optimizations should build-depend on libcloog-ppl0. ++ gcc-4.4: Suggest the cloog runtime libraries. ++ * Install a hook _Unwind_DebugHook, called during unwinding. Intended as ++ a hook for a debugger to intercept exceptions. CFA is the CFA of the ++ target frame. HANDLER is the PC to which control will be transferred ++ (patch taken from Fedora). ++ ++ -- Matthias Klose Sat, 03 Oct 2009 13:33:05 +0100 ++ ++gcc-4.4 (4.4.1-4) unstable; urgency=low ++ ++ * Update to SVN 20090911 from the gcc-4_4-branch (r151649). ++ - Fixes PR target/34412, PR middle-end/41094, PR target/40718, ++ PR fortran/41062, PR libstdc++/41005, PR target/41184, ++ PR bootstrap/41180, PR c++/41127, PR fortran/41258, ++ PR rtl-optimization/40861, PR target/41315, PR fortran/39876. ++ ++ [ Matthias Klose ] ++ * Avoid underscores in doc-base document id's to workaround a ++ dh_installdocs bug. ++ * Update file names for the Ada user's guide. ++ * Set Homepage attribute for packages. ++ * Update the patch for gnat on armel. ++ * gcj-4.4-jdk: Depend on libantlr-java. Addresses: #546062. ++ * Backport patch for PR tree-optimization/41101 from the trunk. ++ Closes: #541816. ++ * Update libstdc++6.symbols for symbols introduced with the fix ++ for PR libstdc++/41005. ++ * Apply proposed patches for PR libstdc++/40133 and PR target/40134. ++ Add symbols exception propagation support in libstdc++ on armel ++ to the libstdc++6 symbols. ++ ++ [ Ludovic Brenta] ++ Merge from gnat-4.4 (4.4.1-3) unstable; urgency=low ++ * debian/rules.defs, debian/rules.d/binary-ada.mk, debian/rules.patch: ++ better support for architectures that support only one exception ++ handling mechanism (SJLJ or ZCX). ++ ++ -- Matthias Klose Sat, 12 Sep 2009 03:18:17 +0200 ++ ++gcc-4.4 (4.4.1-3) unstable; urgency=low ++ ++ * Update to SVN 20090822 from the gcc-4_4-branch (r151011). ++ - Fixes PR tree-optimization/41016, PR tree-optimization/41011, ++ PR tree-optimization/41008, PR tree-optimization/40991, ++ PR tree-optimization/40964, PR target/8603 (closes: #161432), ++ PR target/41019, PR target/41015, PR target/40957, PR target/40934, ++ PR rtl-optimization/41033, PR middle-end/41047, PR middle-end/41006, ++ PR fortran/41070, PR fortran/40995, PR fortran/40847, PR debug/40990, ++ PR debug/37801, PR c/41046, PR c/40948, PR c/40866, PR bootstrap/41018, ++ PR middle-end/41123,PR target/40971, PR c++/41131, PR fortran/41102, ++ PR libfortran/40962. ++ ++ [ Arthur Loiret ] ++ * Only use -fno-stack-protector when known to the stage1 compiler. ++ ++ [ Aurelien Jarno ] ++ * lib32* packages: remove the Pre-Depends: libc6-i386 (>= 2.9-18) and ++ upgrade the Conflicts: libc6-i386 from (<< 2.9-18) to (<< 2.9-22). ++ Closes: #537466. ++ * kbsd-gnu-ada.dpatch: add support for kfreebsd-amd64. ++ ++ [ Matthias Klose ] ++ * Build gnat on armel, the gnat-4.4 build still failing, gcc-snapshot ++ builds good enough to build itself. ++ * Merge enough of the gnat-4.4 changes back to allow a combined build ++ from the gcc-4.4 source. ++ * Build libgnatprj for armel. ++ * On armel build just one version of the ada run-time library. ++ * Update auto* build dependencies for snapshot builds. ++ * Apply proposed patch for PR target/40718. ++ ++ -- Matthias Klose Sun, 23 Aug 2009 11:50:38 +0200 ++ ++gcc-4.4 (4.4.1-2) unstable; urgency=low ++ ++ [ Matthias Klose ] ++ * Update to SVN 20090808 from the gcc-4_4-branch (r150577). ++ - Fixes PR target/40832, PR rtl-optimization/40710, ++ PR tree-optimization/40321, PR build/40010, PR fortran/40727, ++ PR build/40010, PR rtl-optimization/40924, PR c/39902, ++ PR middle-end/40943, PR target/40577, PR c++/39987, PR debug/39706, ++ PR c++/40948, PR c++/40749, PR fortran/40851, PR fortran/40878, ++ PR target/40906. ++ * Bump GCC version required in dependencies to 4.4.1. ++ * Enable Ada for snapshot builds on all archs with a gnat package ++ available in the archive. ++ * Build-depend on binutils 2.19.51.20090805, needed at least for armel. ++ ++ [ Aurelien Jarno ] ++ * kbsd-gnu-ada.dpatch: new patch to fix build on GNU/kFreeBSD. ++ ++ -- Matthias Klose Sat, 08 Aug 2009 10:17:39 +0200 ++ ++gcc-4.4 (4.4.1-1) unstable; urgency=low ++ ++ * GCC 4.4.1 release. ++ - Fixes PR target/39943, PR tree-optimization/40792, PR c++/40780, ++ PR middle-end/40747, PR libstdc++/40691, PR libfortran/40714, ++ PR tree-optimization/40813 (ICE in OpenJDK build on sparc). ++ * Apply proposed patch for PR target/39429, an ARM wrong-code error. ++ * Fix a typo in the arm back-end (proposed patch). ++ * Build-depend on libmpc-dev for snapshot builds. ++ * Fix build failure in cross builds (Hector Oron). Closes: #522597. ++ * Run the testsuite as part of the build target, not the install target. ++ ++ -- Matthias Klose Wed, 22 Jul 2009 13:24:39 +0200 ++ ++gcc-4.4 (4.4.0-11) unstable; urgency=medium ++ ++ [ Matthias Klose ] ++ * Update to SVN 20090715 from the gcc-4_4-branch (r149690). ++ - Corresponds to the 4.4.1 release candidate. ++ - Fixes PR target/38900, PR debug/40666, PR middle-end/40669, ++ PR middle-end/40328, PR target/40587, PR middle-end/40585, ++ PR c++/40566, PR tree-optimization/40542, PR c/39902, ++ PR tree-optimization/40579, PR tree-optimization/40550, PR c++/40684, ++ PR c++/35828, PR c++/37816, PR c++/40639, PR c++/40633, PR c++/40619, ++ PR c++/40595, PR fortran/40440, PR fortran/40551, PR fortran/40638, ++ PR fortran/40443, PR libstdc++/40600, PR rtl-optimization/40667, PR c++/40740, ++ PR c++/36628, PR c++/37206, PR c++/40689, PR c++/40502, PR middle-end/40747. ++ * Backport of PR c/25509, new option -Wno-unused-result. LP: #305176. ++ * gcc-4.4: Depend on libgomp1, even if not building the libgomp1 package. ++ * Add proposed patches for PR libstdc++/40133, PR target/40134; don't apply ++ yet. ++ ++ [Emilio Pozuelo Monfort] ++ * Backport build-id support, configure with --enable-linker-build-id. ++ ++ -- Matthias Klose Tue, 14 Jul 2009 16:09:33 -0400 ++ ++gcc-4.4 (4.4.0-10) unstable; urgency=low ++ ++ [ Arthur Loiret ] ++ * debian/rules.patch: Record the auto* calls to run them once only. ++ ++ [ Matthias Klose ] ++ * Update to SVN 20090627 from the gcc-4_4-branch (r149023). ++ - Fixes PR other/40024. ++ * Fix typo, adding blacklisted symbols to the libgcc1 symbols file on armel. ++ * On mips/mipsel use -O2 in STAGE1_CFLAGS until binutils is updated. ++ ++ -- Matthias Klose Sun, 28 Jun 2009 10:13:08 +0200 ++ ++gcc-4.4 (4.4.0-9) unstable; urgency=high ++ ++ * Update to SVN 20090624 from the gcc-4_4-branch (r148821). ++ - Fix PR objc/28050 (LP: #362217), PR libstdc++/40297, PR c++/40342. ++ * Continue the well planned lib32 transition on amd64, adding pre-dependencies ++ on libc6-i386 (>= 2.9-18) on Debian. Closes: #533767. ++ * Enable SSP on arm and armel, run the testsuite with -fstack-protector. ++ LP: #375189. ++ * Fix spu fortran build in gcc-snapshot builds. ++ * Add missing symbols for 64bit libgfortran library. ++ * Update libstdc++ symbol files for sparc 64bit, adding symbols ++ for exception propagation support. ++ * Explicitely add __aeabi symbols to the libgcc1 symbols file on armel. ++ Closes: #533843. ++ ++ -- Matthias Klose Wed, 24 Jun 2009 23:46:02 +0200 ++ ++gcc-4.4 (4.4.0-8) unstable; urgency=medium ++ ++ * Let all 32bit libs conflict with libc6-i386 (<< 2.9-17). Closes: #533767. ++ * Update to SVN 20090620 from the gcc-4_4-branch (r148747). ++ - Fixes PR fortran/39800, PR fortran/40402. ++ * Work around tar bug on kfreebsd unpacking java class file updates (#533356). ++ ++ -- Matthias Klose Sat, 20 Jun 2009 15:15:22 +0200 ++ ++gcc-4.4 (4.4.0-7) unstable; urgency=medium ++ ++ * Update to SVN 20090618 from the gcc-4_4-branch (r148685). ++ - Fixes PR middle-end/40446, PR middle-end/40389, PR middle-end/40460, ++ PR fortran/40168, PR target/40470. ++ * On amd64, install 32bit libraries into /lib32 and /usr/lib32. ++ * lib32gcc1, lib32gomp1, lib32stdc++6: Conflict with libc6-i386 (= 2.9-15), ++ libc6-i386 (= 2.9-16). ++ * Handle serialver alternative in -jdk install scripts, not in -jre-headless. ++ ++ -- Matthias Klose Fri, 19 Jun 2009 01:36:00 +0200 ++ ++gcc-4.4 (4.4.0-6) unstable; urgency=low ++ ++ [ Matthias Klose ] ++ * Update to SVN 20090612 from the gcc-4_4-branch (r148433). ++ - Fixes PR c++/38064, PR c++/40139, PR target/40017, PR target/40266, ++ PR bootstrap/40027, PR tree-optimization/40087, PR target/39856, ++ PR rtl-optimization/40105, PR target/39942, PR middle-end/40204, ++ PR debug/40109, PR tree-optimization/39999, PR libfortran/37754, ++ PR fortran/22423, PR libfortran/39667, PR libfortran/39782, ++ PR libfortran/38668, PR libfortran/39665, PR libfortran/39702, ++ PR libfortran/39709, PR libfortran/39665i, PR libgfortran/39664, ++ PR fortran/38654, PR libfortran/37754, PR libfortran/37754, ++ PR libfortran/25561, PR libfortran/37754, PR middle-end/40291, ++ PR target/40017, PR middle-end/40340, PR c++/40308, PR c++/40311, ++ PR c++/40306, PR c++/40307, PR c++/40370, PR c++/40372, PR c++/40373, ++ PR c++/40381, PR fortran/40019, PR fortran/39893. ++ * gcj-4.4-jdk: Depend on libecj-java-gcj instead of libecj-java. ++ * Let gjdoc --version use the Configuration class instead of ++ version.properties (Alexander Sack). LP: #385682. ++ * Preserve libgcc_s.so linker scripts. Closes: #532263. ++ ++ [Ludovic Brenta] ++ * debian/patches/ppc64-ada.dpatch, ++ debian/patches/ada-mips.dpatch, ++ debian/patches/ada-mipsel.dpatch: remove, merged upstream. ++ * debian/patches/*ada*.dpatch: ++ - rename to *.diff; ++ - remove the dpatch prologue shell script ++ - refresh with quilt -p ab and without time stamps ++ - adjust to GCC 4.4 ++ * debian/patches/ada-library-project-files-soname.diff, ++ debian/patches/ada-polyorb-dsa.diff, ++ debian/patches/pr39856.diff: new. ++ * debian/rules.patch: adjust accordingly. ++ * debian/rules.defs: re-enable Ada. ++ * debian/rules2: do a lean bootstrap when building Ada. ++ * debian/rules.d/binary-ada.mk: do not build gnatbl or gprmake anymore, ++ removed upstream. ++ ++ -- Matthias Klose Fri, 12 Jun 2009 18:34:13 +0200 ++ ++gcc-4.4 (4.4.0-5) unstable; urgency=medium ++ ++ * Update to SVN 20090517 from the gcc-4_4-branch (r147630). ++ - Fixes PR tree-optimization/40062, PR middle-end/39986, ++ PR middle-end/40057, PR fortran/39879, PR libstdc++/40038, ++ PR middle-end/40035, PR target/37179, PR middle-end/39666, ++ PR tree-optimization/40074, PR fortran/40018, PR fortran/38863, ++ PR middle-end/40147, PR fortran/40018, PR target/40153. ++ ++ [ Matthias Klose ] ++ * Update libstdc++ symbols files. ++ * Update libgcc, libobjc, libstdc++ symbols files for armel. ++ * Fix version symlink in gcc_lib_dir. Closes: #527837. ++ * Fix symlinks for javac and header files in /usr/lib/jvm. ++ Closes: #528084. ++ * Don't build the stage1 compiler with -O with recent binutils (trunk). ++ * Revert doing link tests to check for the atomic builtins, disabling ++ exception propagation support in libstdc++ on armel. See PR40133, PR40134. ++ * On mips/mipsel don't run the java testsuite with -mabi=64. ++ * Default to armv4 for the gcc-snapshot package as well. Closes: #523936. ++ * Mention GCC trunk in the gcc-snapshot package description. Closes: #526309. ++ * Remove unneed '..' elements from symlinks in JAVA_HOME. ++ * Fix some lintian warnings for gcc-snapshot. ++ ++ [ Arthur Loiret ] ++ * Add missing dir separator to multiarch path. Closes: #527537. ++ ++ -- Matthias Klose Sun, 17 May 2009 11:15:52 +0200 ++ ++gcc-4.4 (4.4.0-4) unstable; urgency=medium ++ ++ * Update to SVN 20090506 from the gcc-4_4-branch (r147161). ++ - Fixes PR rtl-optimization/39914, PR testsuite/39776, ++ PR tree-optimization/40022, PR libstdc++/39909. ++ ++ [ Matthias Klose ] ++ * gcc-4.4-source: Don't depend on gcc-4.4-base, depend on quilt ++ and patchutils. ++ * On armel, link the shared libstdc++ with both -lgcc_s and -lgcc. ++ * Update libgcc and libstdc++ symbol files for mips and mipsel. ++ * Update libstdc++ symbol files for armel and hppa, adding symbols ++ for exception propagation support. ++ * Add ARM EABI symbols to libstdc++ symbol files for armel. ++ * Add libobjc symbols file for armel. ++ * Fix PR libstdc++/40038, missing ceill/tanhl symbols in libstdc++. ++ ++ [ Aurelien Jarno ] ++ * Fix libc name for biarch packages on kfreebsd-amd64. ++ ++ -- Matthias Klose Wed, 06 May 2009 15:10:36 +0200 ++ ++gcc-4.4 (4.4.0-3) unstable; urgency=low ++ ++ * libstdc++-doc: Install the man pages again. ++ * Fix build configuration for the GC enabled ObjC runtime library. ++ * Fix thinko in autotools_files, resulting in autoconf not run in ++ some cases. ++ * Do link tests to check for the atomic builtins, enables exception ++ propagation support in libstdc++ on armel and hppa. ++ ++ -- Matthias Klose Sun, 03 May 2009 23:38:56 +0200 ++ ++gcc-4.4 (4.4.0-2) unstable; urgency=low ++ ++ [ Samuel Thibault ] ++ * Enable java build on the hurd. ++ ++ [ Matthias Klose ] ++ * libobjc2.symbols.armel: Remove, use the default one. ++ * Address PR libstdc++/39491, removing __signbitl from the libstdc++6 ++ symbols file on hppa. ++ * libstdc++6.symbols.armel: Fix error introduced with copy from the ++ arm symbols file. ++ * libstdc++6.symbols.*: Don't assume exception propagation support ++ enabled for all architectures (although it should on armel, hppa, ++ sparc). ++ * Disable the build of the ObjC garbage collection library on mips*, ++ working around a build failure. ++ ++ -- Matthias Klose Sat, 02 May 2009 14:22:35 +0200 ++ ++gcc-4.4 (4.4.0-1) unstable; urgency=low ++ ++ [ Matthias Klose ] ++ * Update to SVN 20090429 from the gcc-4_4-branch (r146989). ++ * Configure java enabled builds with --enable-java-home. ++ * Integrate the bits previously found in java-gcj-compat. ++ * Rename the packages using the naming schema used for OpenJDK: ++ gcj-X.Y-{jre-headless,jre,jre-lib,jdk,source}. The packages ++ {gij,gcj,gappletviewer}-X.Y and libgcjN-{jar,source} are gone. ++ * Build the libgcj documentation with the just built gjdoc. ++ * Don't use profiled bootstrap when building the gcj source. ++ * Apply proposed patch for PR target/39856. ++ * Fix some lintian warnings. ++ * Don't include debug symbols for libstdc++.so.6, if the library is ++ built by a newer GCC version. ++ * Adjust hrefs to point to the local libstdc++ documentation. LP: #365414. ++ * Update libgcc, libgfortran, libobjc, libstdc++ symbol files. ++ * gcc-4.4: Include libssp_nonshared.a. ++ * For ix86, set the java architecture directory to i386. ++ ++ [ Samuel Thibault ] ++ * Update Hurd changes. ++ * Configure with --enable-clocale=gnu on hurd-i386. ++ * debian/patches/hurd-pthread.diff: Reapply. ++ ++ -- Matthias Klose Thu, 30 Apr 2009 00:30:20 +0200 ++ ++gcc-4.4 (4.4.0-1~exp2) experimental; urgency=low ++ ++ * Update to SVN 20090423 from the gcc-4_4-branch. ++ ++ [ Aurelien Jarno ] ++ * kbsd-gnu.diff: remove parts merged upstream. ++ ++ [ Matthias Klose ] ++ * Remove conflicts/replaces for *-spu packages. ++ * Configure the spu cross compiler without --with-sysroot and ++ --enable-multiarch. ++ * Fix and reenable the gfortran-spu build. ++ * Work around build failures with missing libstdc++ baseline files. ++ * Install gjdoc man page. ++ * Fix java configuration with --enable-java-home and include symlinks ++ for JAVA_HOME in /usr/lib/jvm. ++ * Apply proposed fix for PR middle-end/39794. ++ * Install libstdc++ man pages with suffix .3cxx instead of .3. ++ Closes: #525244. ++ * lib*stdc++6-{dbg,doc}: Add conflicts to the corresponding 4.3 packages. ++ ++ -- Matthias Klose Thu, 23 Apr 2009 18:11:49 +0200 ++ ++gcc-4.4 (4.4.0-1~exp1) experimental; urgency=low ++ ++ * Final GCC 4.4.0 release. ++ ++ * Don't build the Fortran SPU cross compiler, currently broken. ++ * spu cross build: Build without spucache and spumea64. ++ * Configure --with-arch-32=i486 on amd64, i386, and kfreebsd-{amd64,i386}, ++ --with-arch-32=i586 on hurd-i386, --with-cpu=atom on lpia. ++ * Build using profiled bootstrap. ++ * Remove the gcc-4.4-base.postinst. Addresses: #524708. ++ * Update debian/copyright: Include runtime library exception, remove ++ D and Phobas license. ++ * Apply proposed patch for PR libstdc++/39491, missing symbol in libstdc++ ++ on hppa. ++ * Remove unsused soft-fp functions in the 64bit libgcc on powerpc (PR39828). ++ * Update NEWS files for 4.4. ++ * Build again libgfortran for the non-default multilib configuration. ++ * Restore missing chunks in note-gnu-stack.diff, lost during the conversion ++ to quilt. ++ ++ -- Matthias Klose Wed, 22 Apr 2009 00:53:16 +0200 ++ ++gcc-4.4 (4.4-20090418-1) experimental; urgency=low ++ ++ * Update to SVN 20090418 from the gcc-4_4-branch. ++ ++ [ Arthur Loiret ] ++ * Update patches: ++ - boehm-gc-nocheck, cross-include, libjava-rpath, link-libs: ++ Rebase on trunk. ++ - gcc-m68k-pch, libjava-debuginfo, libjava-loading-constraints: ++ Remove, merged in trunk. ++ - cell-branch, cell-branch-doc: Remove, there is no upstream cell 4.4 ++ branch yet. ++ - gdc-fix-build-kbsd-gnu, svn-gdc-updates, gpc-4.1, gpc-gcc-4.x, ++ gpc-names: Remove, gpc and gdc are not ported to GCC 4.4 yet. ++ - svn-class-updates, svn-doc-updates, svn-updates: Make empty. ++ - Refresh all others, and convert them all to quilt. ++ ++ * Build system improvements: ++ - Partial rewrite/refactor of rules files. ++ - Switch patch system to quilt. ++ - Autogenerate debian/copyright. ++ - Use the autoconf2.59 package. ++ ++ * multilib/multiarch support improvements: Closes: #369064, #484589. ++ - mips-triarch.diff: Replace with a newer version (approved upstream). ++ - s390-biarch.diff: Ditto. ++ - debian/rules2: Configure with --enable-targets=all on mips-linux, ++ mipsel-linux and s390-linux. ++ - gcc-multiarch.diff: New, add multiarch include directories and ++ libraries path to the system paths. ++ - debian/rules2: Configure with --enable-multiarch. Configure spu build ++ with --with-multiarch-defaults=spu-elf. ++ - multiarch-include.diff: Remove. ++ - debian/multiarch.inc: Ditto. ++ ++ * cross-compilers changes: ++ - Never build a separated -base package, don't symlink any doc dir. ++ - Build gobjc again. ++ ++ * Run the 64-bit tests with -mabi=64 instead of -m64 on mips/mipsel to ++ hopefully fix the massive failure. ++ * Always set $(distribution) to "Debian" on mips/mipsel, workarounds FTBFS ++ on those archs due to a kernel bug triggered by lsb_release call. ++ Adresses: #524416. ++ * debian/rules.patch: Only apply the ada-nobiarch-check patch when ada is ++ enabled. Remove gpc and gdc patches. ++ * debian/rules.unpack (install_autotools_stamp): Remove. ++ * debian/rules.defs (configure_dependencies): Remove autotools dependency. ++ * debian/rules.conf: Add a copyright-file target. ++ * debian/control.m4: Build-Depends on autoconf2.59 and patchutils. ++ Make gcc-4.4-source Depends on autoconf2.59. ++ Add myself to Uploaders. ++ * debian/rules.d/binary-source.mk: Don't build and install an embedded ++ copy or autoconf2.59 in gcc-4.4-source. ++ * debian/copyright.in: New. ++ ++ [ Matthias Klose ] ++ * Build gcj on hppa. ++ * Add support to build vfp optimized runtime libraries on armel. ++ * gcc-4.4-spu: Depend on newlib-spu. ++ * Fix sections of -dbg and java packages. ++ * gcc-default-ssp.dpatch: Set the default as well, when calling the ++ preprocessor. LP: #346126. ++ * Build-depend on quilt. ++ * Keep the copyright file in the archive. ++ * Remove conflict of the gcc-X.Y-source packages. ++ * Update removal of gfdl doc files for 4.4. ++ * Don't re-run the autotools (introduced with the switch to quilt). ++ * On arm and armel, install the arm_neon.h header. LP: #360819. ++ * When hardening options are turned on by default, patch the testsuite ++ to handle the hardening defaults (Kees Cook). ++ * Only run the patch target once. Avoids multiple autotool runs, but ++ doesn't reflect changes in the series file anymore. ++ * libgcj-doc: Fix documentation title. ++ * Fix gcj source build with recent build changes. ++ * Don't check for libraries in DEB_BUILD_OPTIONS/nolang. ++ * gappletviewer: Include missing binary. ++ ++ [ Aurelien Jarno ] ++ * Remove: patches/kbsd-gnu-ada.dpatch (merged upstream). ++ * kbsd-gnu.diff: add fix for stuff broken by upstream. ++ ++ -- Matthias Klose Mon, 20 Apr 2009 01:34:26 +0200 ++ ++gcc-4.4 (4.4-20090317-1) experimental; urgency=low ++ ++ * Initial upload of GCC-4.4, based on trunk 20090317 (r144904). ++ ++ [Matthias Klose] ++ * Branch from the gcc-4.3 packaging. ++ * Remove *-trunk patches, update remaining patches for the trunk. ++ * Remove patches integrated upstream: libobjc-gc-link, libjava-file-support, ++ libjava-realloc-leak, libjava-armel-ldflags, libstdc++-symbols-hppa, ++ gcc-m68k-pch, libjava-extra-cflags, libjava-javah-bridge-tgts, ++ hppa-atomic-builtins, armel-atomic-builtins, libssp-gnu, libobjc-armel, ++ gfortran-armel-updates, sparc-biarch, libjava-xulrunner-1.9. ++ * Update patches for 4.4, mostly using the patches converted for quilt by ++ Arthur Loiret. ++ * debian/patches/libjava-soname.dpatch: Remove, unmodifed upstream library. ++ * debian/patches/gcc-driver-extra-langs.dpatch: Search Ada files in subdir. ++ * debian/rules.unpack, debian/rules.d/binary-source.mk: Update for included ++ autoconf tarball. ++ * debian/rules.d/binary-{gcc,java}.mk: Install new header files. ++ * debian/libgfortran3.symbols.common: Remove symbol not generated by ++ gfortran (__iso_c_binding_c_f_procpointer@GFORTRAN_1.0), PR38871. ++ * debian/rules.conf: Update for 4.4. ++ * Fix build dependencies and configure options for 4.4, which were applied ++ for snapshot builds only. ++ ++ [Arthur Loiret] ++ * Update patches from debian/patches: ++ - Remove backported fixes: ++ PR ada: pr10768.dpatch, pr15808.dpatch, pr15915.dpatch, pr16086.dpatch, ++ pr16087.dpatch, pr16098.dpatch, pr17985.dpatch, pr18680.dpatch, ++ pr22255.dpatch, pr22387.dpatch, pr28305.dpatch, pr28733.dpatch, ++ pr29015.dpatch, pr30740.dpatch, pr30827.dpatch pr33688.dpatch, ++ pr34466.dpatch, pr35050.dpatch, pr35792.dpatch. ++ PR target: pr27880.dpatch, pr28102.dpatch, pr30961.dpatch, ++ pr35965.dpatch, pr37661.dpatch. ++ PR libgcj: pr24170.dpatch, pr35020.dpatch. ++ PR gcov-profile: pr38292.dpatch. ++ PR other: pr28322.dpatch. ++ * debian/rules.patch: Update. ++ * debian/symbols/libgomp1.symbols.common: Add new symbols from OpenMP 3.0. ++ ++ -- Matthias Klose Tue, 17 Mar 2009 02:28:01 +0100 ++ ++gcc-4.3 (4.3.3-5) unstable; urgency=low ++ ++ Merge from gnat-4.3 (4.3.3-1): ++ ++ [Petr Salinger] ++ * debian/patches/ada-libgnatprj.dpatch: enable support for GNU/kFreeBSD. ++ Fixes: #512277. ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-acats.dpatch: attempt to fix ACATS tests (not entirely ++ successful yet). ++ * New upstream version. Fixes: #514565. ++ ++ [Matthias Klose] ++ * Update to SVN 20090301 from the gcc-4_3-branch. ++ - Fix PR c/35446, PR c++/38950, PR fortran/38852, PR fortran/39006, ++ PR c++/39225 (closes: #516727), PR c++/38950, PR target/38056, ++ PR target/39228, PR middle-end/36578, PR inline-asm/39058, ++ PR middle-end/37861. ++ * Don't provide the 4.3.2 symlink in gcc_lib_dir anymore. ++ * Require binutils-2.19.1. ++ ++ -- Matthias Klose Sun, 01 Mar 2009 14:18:09 +0100 ++ ++gcc-4.3 (4.3.3-4) unstable; urgency=low ++ ++ * Fix Fix PR gcov-profile/38292 (wrong profile information), taken ++ from the trunk. ++ * Update to SVN 20090215 from the gcc-4_3-branch. ++ Fix PR c/35435, PR tree-optimization/39100, PR rtl-optimization/39076, ++ PR c/35433, PR tree-optimization/39041, PR target/38988, ++ PR middle-end/38969, PR c++/36897, PR c++/39054, PR c/39035, PR c/35434, ++ PR c/36432, PR target/38991, PR c/39084, PR target/39118. ++ * Reapply the fix for PR middle-end/38615. ++ * Include autoconf-2.59 sources into the source package, and install as ++ part of the gcc-4.3-source package. ++ * Explicitely use autoconf-1.9. ++ * Disable building the gcjwebplugin. ++ * Don't configure with --enable-cld on amd64 and i386. ++ ++ -- Matthias Klose Sun, 15 Feb 2009 23:40:09 +0100 ++ ++gcc-4.3 (4.3.3-3) unstable; urgency=medium ++ ++ * Revert fix for PR middle-end/38615. Closes: #513420. ++ ++ -- Matthias Klose Thu, 29 Jan 2009 07:05:15 +0100 ++ ++gcc-4.3 (4.3.3-2) unstable; urgency=low ++ ++ * Update to SVN 20090127 from the gcc-4_3-branch. ++ - Fix PR tree-optimization/38359. Closes: #492505. ++ - Fix PR tree-optimization/38932 (ice-on-valid-code), PR target/38931 ++ (ice-on-valid-code), PR rtl-optimization/38879 (wrong-code), ++ PR c++/23287 (rejects-valid), PR fortran/38907 (ice-on-valid-code), ++ PR fortran/38859 (wrong-code), PR fortran/38657 (rejects-valid), ++ PR fortran/38672 (ice-on-valid-code). ++ * Fix PR middle-end/38969, taken from the trunk. Closes: #513007. ++ ++ -- Matthias Klose Tue, 27 Jan 2009 23:42:45 +0100 ++ ++gcc-4.3 (4.3.3-1) unstable; urgency=low ++ ++ * GCC-4.3.3 release (no changes compared to the 4.3.2-4 upload). ++ * Fix PR middle-end/38615 (wrong code, taken from the trunk). ++ ++ -- Matthias Klose Sat, 24 Jan 2009 14:43:09 +0100 ++ ++gcc-4.3 (4.3.2-4) unstable; urgency=medium ++ ++ * Update to SVN 20090119 from the gcc-4_3-branch. ++ - Fix PR tree-optimization/36765 (wrong code). ++ * Remove patch for PR 34571, applied upstream (fix build failure on alpha). ++ * Apply proposed patch for PR middle-end/38902 (wrong code). ++ ++ -- Matthias Klose Tue, 20 Jan 2009 00:22:41 +0100 ++ ++gcc-4.3 (4.3.2-3) unstable; urgency=low ++ ++ * Update to SVN 20090117 from the gcc-4_3-branch (4.3.3 release candidate). ++ - Fix PR target/34571, PR debug/7055, PR tree-optimization/37194, ++ PR tree-optimization/38529, PR fortran/38763, PR fortran/38765, ++ PR fortran/38669, PR fortran/38487, PR fortran/35681, PR fortran/38657, ++ PR c++/36019, PR c++/31488, PR c++/37646, PR c++/36334, PR c++/38357, ++ PR c++/31260, PR c++/38877, PR libstdc++/36801, PR libgcj/38396. ++ - debian/patches/libgcj-bc.dpatch: Remove, applied upstream. ++ * Fix PR middle-end/38616 (wrong code with -fstack-protector). ++ * Update backport for PR28322 (Gunther Nikl). ++ ++ -- Matthias Klose Sat, 17 Jan 2009 21:09:35 +0100 ++ ++gcc-4.3 (4.3.2-2) unstable; urgency=low ++ ++ * Update to SVN 20090110 from the gcc-4_3-branch. ++ - Fix PR target/36654, PR tree-optimization/38752, PR fortran/38675, ++ PR fortran/37469, PR libstdc++/38000. ++ ++ -- Matthias Klose Sat, 10 Jan 2009 18:32:34 +0100 ++ ++gcc-4.3 (4.3.2-2~exp5) experimental; urgency=low ++ ++ * Adjust build-dependencies for cross builds. Closes: #499998. ++ * Update to SVN 20081231 from the gcc-4_3-branch. ++ - Fix PR middle-end/38565, PR target/38062, PR bootstrap/38383, ++ PR target/38402, PR testsuite/35677, PR tree-optimization/38478, ++ PR target/38054, PR middle-end/29056, PR testsuite/28870, ++ PR target/38254. ++ - Fix PR libstdc++/37144, PR c++/37582, PR libstdc++/38080. ++ - Fix PR fortran/38602, PR fortran/38602, PR fortran/38487, ++ PR fortran/38113, PR fortran/35983, PR fortran/35937, PR testsuite/36889. ++ * Update the spu cross compiler from the cell-gcc-4_3-branch 20081217. ++ * debian/patches/libobjc-armel.dpatch: Don't define EH_USES. ++ * Apply the Atomic builtins patch for PARISC. ++ ++ -- Matthias Klose Thu, 18 Dec 2008 00:34:46 +0100 ++ ++gcc-4.3 (4.3.2-2~exp4) experimental; urgency=low ++ ++ * Update to SVN 20081130 from the gcc-4_3-branch. ++ - Fix PR bootstrap/33304, PR middle-end/37807, PR middle-end/37809, ++ PR rtl-optimization/37489, PR target/35574, PR c/37924, ++ PR tree-optimization/37879, PR middle-end/37858, PR middle-end/37870, ++ PR target/38016, PR target/37939, PR rtl-optimization/37769, ++ PR target/37909, PR fortran/37597, PR fortran/35820, PR fortran/37445, ++ PR fortran/PR35769, PR fortran/37903, PR fortran/37749. ++ - Fix PR target/37640, PR tree-optimization/37868, PR bootstrap/33100, ++ PR other/38214, PR c++/37142, PR c++/35405, PR c++/37563, PR c++/38030, ++ PR c++/37932, PR c++/38007. ++ - Fix PR fortran/37836, PR fortran/38171, PR fortran/35681, ++ PR fortran/37792, PR fortran/37926, PR fortran/38033, PR fortran/36526. ++ - Fix PR target/38287. Closes: #506713. ++ * Atomic builtins using kernel helpers for PARISC and ARM Linux/EABI, taken ++ from the trunk. ++ ++ -- Matthias Klose Mon, 01 Dec 2008 01:29:51 +0100 ++ ++gcc-4.3 (4.3.2-2~exp3) experimental; urgency=low ++ ++ * Update to SVN 20081117 from the gcc-4_3-branch. ++ * Add build dependencies on spu packages for snapshot builds. ++ * Add build dependency on libantlr-java for snapshot builds. ++ * Disable fortran on spu for snapshot builds. ++ * Add dependency on binutils-{hppa64,spu} for snapshot builds. ++ ++ -- Matthias Klose Mon, 17 Nov 2008 21:57:51 +0100 ++ ++gcc-4.3 (4.3.2-2~exp2) experimental; urgency=low ++ ++ * Update to SVN 20081023 from the gcc-4_3-branch. ++ - General regression fixes: PR rtl-optimization/37882 (wrong code), ++ - Fortran regression fixes: PR fortran/37787, PR fortran/37723. ++ * Use gij-4.3 for builds in java maintainer mode. ++ * Don't run the testsuite with -fstack-protector for snapshot builds. ++ * Update the spu cross compiler from the cell-gcc-4_3-branch 20081023. ++ Don't disable multilibs, install additional components in the gcc-4.3-spu ++ package. ++ * Enable building the spu cross compiler for powerpc and ppc64 snapshot ++ builds. ++ * Apply proposed patch for PR tree-optimization/37868 (wrong code). ++ * Apply proposed patch to parallelize make check. ++ * For biarch builds, disable the gnat testsuite for the non-default ++ architecture (no biarch support in gnat yet). ++ ++ -- Matthias Klose Thu, 23 Oct 2008 22:06:38 +0200 ++ ++gcc-4.3 (4.3.2-2~exp1) experimental; urgency=low ++ ++ * Update to SVN 20081017 from the gcc-4_3-branch. ++ - General regression fixes: PR rtl-optimization/37408 (wrong code), ++ PR tree-optimization/36630, PR tree-optimization/37102 (wrong code), ++ PR c/35437 (ice on invalid code), PR middle-end/37731 (wrong code), ++ PR target/37603 (wrong code, hppa), PR tree-optimization/35737 (ice on ++ valid code), PR middle-end/36575 (wrong code), PR c/37645 (ice on valid ++ code), PR tree-optimization/37539 (compile time hog), PR middle-end/37236 ++ (ice on invalid code), PR tree-optimization/36343 (wrong code), ++ PR rtl-optimization/37544 (wrong code), PR target/35620 (ice on valid ++ code), PR target/35713 (ice on valid code, wrong code), PR c/35712 (wrong ++ code), PR target/37466 (wrong code, AVR). ++ - C++ regression fixes: PR c++/37389 (LP: #252301), PR c++/37555 (ice on ++ invalid code). ++ - Fortran regression fixes: PR fortran/37199, PR fortran/36214, ++ PR fortran/35770, PR fortran/36454, PR fortran/36374, PR fortran/37274, ++ PR fortran/37583, PR fortran/36700, PR fortran/35945, PR fortran/37626, ++ PR fortran/37504, PR fortran/37580, PR fortran/37706, PR fortran/35680, ++ PR fortran/37794. ++ * Remove obsolete patches: ada-driver.dpatch, pr33148.dpatch. ++ * Fix naming of bridge targets in gjavah (wrong header generation). ++ * Fix PR target/37661, SPARC64 int-to-TFmode conversions. ++ * Include the complete test summaries in a binary package, to allow ++ regression checking from the previous build. ++ * Tighten inter-package dependencies to (>= 4.3.2-1). ++ * Drop the 4.3.1 symlink in gcc_lib_dir, add a 4.3.3 symlink to 4.3. ++ ++ -- Matthias Klose Fri, 17 Oct 2008 23:26:50 +0200 ++ ++gcc-4.3 (4.3.2-1) unstable; urgency=medium ++ ++ [Matthias Klose] ++ * Final gcc-4.3.2 release (regression fixes). ++ - Remove the generated install docs from the tarball (GFDL licensed). ++ - C++ regression fixes: PR debug/37156. ++ - general regression fixes: PR debug/37156, PR target/37101. ++ - Java regression fixes: PR libgcj/8995. ++ * Update to SVN 20080905 from the gcc-4_3-branch. ++ - C++ regression fixes: PR c++/36741 (wrong diagnostic), ++ - general regression fixes: PR target/37184 (ice on valid code), ++ PR target/37191 (ice on valid code), PR target/37197 (ice on valid code), ++ PR middle-end/36817 (ice on valid code), PR middle-end/36548 (wrong code), ++ PR middle-end/37125 (wrong code), PR c/37261 (wrong diagnostic), ++ PR target/37168 (ice on valid code), PR middle-end/36449 (wrong code), ++ PR middle-end/37248 (missed optimization), PR target/36332 (wrong code). ++ - Fortran regression fixes: PR fortran/37193 (rejects valid code). ++ * Move symlinks in gcc_lib_dir from cpp-4.3 to gcc-4.3-base. Closes: #497369. ++ * Don't build-depend on autogen on architectures where it is not installable ++ (needed for the fixincludes testsuite only); don't build-depend on it for ++ source packages not running the fixincludes testsuite. ++ ++ [Ludovic Brenta] ++ * Add sdefault.ads to libgnatprj4.3-dev. Fixes: #492866. ++ * turn gnatvsn.gpr and gnatprj.gpr into proper library project files. ++ * Unconditionally build-depend on gnat when building gnat-4.3. ++ Fixes: #487564. ++ * (debian/rules.d/binary-ada.mk): Add a symlink libgnat.so to ++ /usr/lib/libgnat-4.3.so in the adalib directory. Fixes: #493814. ++ * (debian/patches/ada-sjlj.dpatch): remove dangling symlinks from all ++ adalib directories. ++ * debian/patches/ada-alpha.dpatch: remove, applied upstream. ++ ++ [Samuel Tardieu, Ludovic Brenta] ++ * debian/patches/pr16086.dpatch: new; backport from GCC 4.4. ++ Closes: #248172. ++ * debian/patches/pr35792.dpatch: new; backport from GCC 4.4. ++ * debian/patches/pr15808.dpatch (fixes: #246392), ++ debian/patches/pr30827.dpatch: new; backport from the trunk. ++ ++ -- Matthias Klose Fri, 05 Sep 2008 22:52:58 +0200 ++ ++gcc-4.3 (4.3.1-9) unstable; urgency=low ++ ++ * Update to SVN 20080814 from the gcc-4_3-branch. ++ - C++/libstdc++ regression fixes: PR c++/36688, PR c++/37016, PR c++/36999, ++ PR c++/36405, PR c++/36767, PR c++/36852. ++ - general regression fixes: PR target/36613, PR rtl-optimization/36998, ++ PR middle-end/37042, PR middle-end/35432, PR target/35659, ++ PR middle-end/37026, PR middle-end/36691, PR tree-optimization/36991, ++ PR rtl-optimization/35542, PR bootstrap/35752, PR rtl-optimization/36419, ++ PR debug/36278, PR preprocessor/36649, PR rtl-optimization/36929, ++ PR tree-optimization/36830, PR c/35746, PR middle-end/37014, ++ PR middle-end/37103. ++ - Fortran regression fixes: PR fortran/36132. ++ - Java regression fixes: PR libgcj/31890. ++ - Fixes PR middle-end/37090. Closes: #494815. ++ ++ -- Matthias Klose Thu, 14 Aug 2008 18:02:52 +0000 ++ ++gcc-4.3 (4.3.1-8) unstable; urgency=low ++ ++ * Undo Revert PR tree-optimization/36262 on i386 (PR 36917 is invalid). ++ ++ -- Matthias Klose Fri, 25 Jul 2008 21:47:52 +0200 ++ ++gcc-4.3 (4.3.1-7) unstable; urgency=low ++ ++ * Update to SVN 20080722 from the gcc-4_3-branch. ++ - Fix PR middle-end/36811, infinite loop building with -O3. ++ - C++/libstdc++ regression fixes: PR c++/36407, PR c++/34963, ++ PR libstdc++/36832, PR libstdc++/36552, PR libstdc++/36729. ++ - Fortran regression fixes: PR fortran/36366, PR fortran/36824. ++ - general regression fixes: PR middle-end/36877, PR target/36780, ++ PR target/36827, PR rtl-optimization/35281, PR rtl-optimization/36753, ++ PR target/36827, PR target/36784, PR target/36782, PR middle-end/36369, ++ PR target/36780, PR target/35492, PR middle-end/36811, ++ PR rtl-optimization/36419, PR target/35802, PR target/36736, ++ PR target/34780. ++ * Revert PR tree-optimization/36262 on i386, causing miscompilation of ++ OpenJDK hotspot. ++ * gij/gcj: Don't remove alternatives on upgrade. Addresses: #479950. ++ ++ -- Matthias Klose Tue, 22 Jul 2008 23:55:54 +0200 ++ ++gcc-4.3 (4.3.1-6) unstable; urgency=low ++ ++ * Start the logwatch script on alpha as well to avoid timeouts in ++ the testsuite. ++ ++ -- Matthias Klose Mon, 07 Jul 2008 11:31:58 +0200 ++ ++gcc-4.3 (4.3.1-5) unstable; urgency=low ++ ++ * Update to SVN 20080705 from the gcc-4_3-branch. ++ - Fix PR target/36634, wrong-code on powerpc with -msecure-plt. ++ * Fix PR target/35965, PIC + -fstack-protector on arm/armel. Closes: #469517. ++ * Don't run the libjava testsuite with -mabi=n32. ++ * Update patch for PR other/28322, that unknown -Wno-* options do not ++ cause errors, but warnings instead. ++ * On m68k, add -fgnu89-inline when in gnu99 mode (requested by Michael ++ Casadeval for the m68k port). Closes: #489234. ++ ++ -- Matthias Klose Sun, 06 Jul 2008 01:39:30 +0200 ++ ++gcc-4.3 (4.3.1-4) unstable; urgency=low ++ ++ * Revert: debian/patches/gcc-multilib64dir.dpatch: Remove obsolete patch. ++ * Remove obsolete multiarch-lib patch. ++ ++ -- Matthias Klose Mon, 30 Jun 2008 23:05:17 +0200 ++ ++gcc-4.3 (4.3.1-3) unstable; urgency=medium ++ ++ [Arthur Loiret] ++ * debian/rules2: ++ - configure sh4-linux with --with-multilib-list=m4,m4-nofpu ++ and --with-cpu=sh4. ++ - configure sparc-linux with --enable-targets=all on snapshot builds ++ (change already in 4.3.1-1). ++ * debian/rules.patch: Don't apply sh4-multilib.dpatch. ++ ++ [Matthias Klose] ++ * Update to SVN 20080628 from the gcc-4_3-branch. ++ - Fix PR target/36533, wrong-code with incorrectly assumed aligned_operand. ++ Closes: #487115. ++ * debian/rules.defs: Remove hurd-i386 from ssp_no_archs (Samuel Thibault). ++ Closes: #483613. ++ * Do not create a /usr/lib/gcc//4.3.0 symlink. ++ * debian/patches/gcc-multilib64dir.dpatch: Remove obsolete patch. ++ * libjava/classpath: Set and use EXTRA_CFLAGS (taken from the trunk). ++ ++ -- Matthias Klose Sat, 28 Jun 2008 16:00:38 +0200 ++ ++gcc-4.3 (4.3.1-2) unstable; urgency=low ++ ++ * Update to SVN 20080610 from the gcc-4_3-branch. ++ - config.gcc: Fix quoting for in the enable_cld test. ++ * Use GNU locales on hurd-i386 (Samuel Thibault). Closes: #485395. ++ * libstdc++-doc: Fix URL's for locally installed docs. Closes: #485133. ++ * libjava: On armel apply kludge to fix unwinder infinitely looping 'til ++ it runs out of memory. ++ * Adjust dependencies to require GCC 4.3.1. ++ ++ -- Matthias Klose Wed, 11 Jun 2008 00:35:38 +0200 ++ ++gcc-4.3 (4.3.1-1) unstable; urgency=high ++ ++ [Samuel Tardieu, Ludovic Brenta] ++ * debian/patches/pr16087.dpatch: new. Fixes: #248173. ++ * Correct the patches from the previous upload. ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-acats.dpatch: really run the just-built gnat, not the ++ bootstrap gnat. ++ * debian/rules2: when running the Ada test suite, do not run the multilib ++ tests as gnat does not support multilib yet. ++ * Run the ACATS testsuite again (patch it so it correctly finds gnatmake). ++ ++ [Thiemo Seufer] ++ * debian/patches/ada-libgnatprj.dpatch, ++ debian/patches/ada-mips{,el}.dpatch: complete support for mips and mipsel. ++ Fixes: #482433. ++ ++ [Matthias Klose] ++ * GCC-4.3.1 release. ++ * Do not include standard system paths in libgcj pkgconfig file. ++ * Suggest the correct libmudflap0-dbg package. ++ * Fix PR libjava/35020, taken from the trunk. ++ * Apply proposed patch for PR tree-optimization/36343. ++ * On hurd-i386 with -fstack-protector do not link with libssp_nonshared ++ (Samuel Thibault). Closes: #483613. ++ * Apply proposed patch for PR tree-optimization/34244. ++ * Remove debian-revision in symbols files. ++ * Fix installation of all biarch -multilib packages which are not triarch. ++ * Fix some lintian warnings. ++ * Include library symlinks in gobjc and gfortran multilib packages, when ++ not building the library packages. ++ * Fix sections in doc-base files. ++ * Don't apply the sparc-biarch patch when building the gcc-snapshot package. ++ * libjava: Add @file support for gjavah & gjar. ++ * Apply patch for PR rtl-optimization/36111, taken from the trunk. ++ ++ * Closing reports reported against gcc-4.0 and fixed in gcc-4.3: ++ - General ++ + Fix PR optimization/3511, inlined strlen() could be smarter. ++ Close: #86251. ++ - C ++ + Fix PR c/9072, Split of -Wconversion in two different flags. ++ Closes: #128950, #226952. ++ - C++/libstdc++ ++ + PR libstdc++/24660, implement versioning weak symbols in libstdc++. ++ Closes: #328421. ++ - Architecture specific: ++ - mips ++ + PR target/26560, unable to find a register to spill in class ++ 'FP_REGS'. Closes: #354439. ++ - sparc ++ + Fix PR rtl-optimization/23454, ICE in invert_exp_1. Closes: #340951. ++ * Closing reports reported against gcc-4.1 and fixed in gcc-4.2: ++ - General ++ + PR tree-optimization/30132, ICE in find_lattice_value. Closes: #400484. ++ + PR other/29534, ICE in "gcc -O -ftrapv" with decreasing array index. ++ Closes: #405065. ++ + Incorrect SSE2 code generation for vector initialization. ++ Closes: #406442. ++ + Fix segfault in cc1 due to infinite loop in error() when using -ftrapv. ++ Closes: #458072. ++ + Fix regression in code size with -Os compared to GCC-3.3. ++ Closes: #348298. ++ - C++ ++ + Fix initialization of global variables with non-constant initializer. ++ Closes: #446067. ++ + Fix ICE building muse. Closes: #429385. ++ * Closing reports reported against gcc-4.1 and fixed in gcc-4.3: ++ - C++ ++ + PR c++/28705, ICE: in type_dependent_expression_p. Closes: #406324. ++ + PR c++/7302, -Wnon-virtual-dtor should't complain of protected dtor. ++ Closes: #356316. ++ + PR c++/28316, PR c++/24791, PR c++/20133, ICE in instantiate_decl. ++ Closes: #327346, #355909. ++ - Fortran ++ + PR fortran/31639, ICE in gfc_conv_constant. Closes: #401496. ++ - Java ++ + Fix ICE using gcj with --coverage. Closes: #416326. ++ + PR libgcj/29869, LogManager class loading failure. Closes: #399251 ++ + PR swing/29547 setText (String) of JButton does not work ++ with HTML code. Closes: #392791. ++ + PR libgcj/29178, CharsetEncoder.canEncode() gives different results ++ than Sun version. Closes: #388596. ++ + PR java/8923, ICE when modifying a variable decleared "final static". ++ Closes: #351512. ++ + PR java/22507, segfault building Apache Cocoon. Closes: #318534. ++ + PR java/2499, class members should be inherited from implemented ++ interfaces. Closes: #225434. ++ + PR java/10581, ICE compiling freenet. Closes: #186922. ++ + PR libgcj/28340, gij ignores -Djava.security.manager. Closes: #421098. ++ + PR java/32846, build failure on GNU/Hurd. Closes: #408888. ++ + PR java/29194, fails to import package from project. Closes: #369873. ++ + PR libgcj/31700, -X options not recognised by JNI_CreateJavaVM. ++ Closes: #426742. ++ + java.util.Calendar.setTimeZone fails to set ZONE_OFFSET. ++ Closes: #433636. ++ - Architecture specific: ++ - alpha ++ + C++, fix segfault in constructor with -Os. Closes: #438436. ++ - hppa ++ + PR target/30131, ICE in propagate_one_insn. Closes: #397341. ++ - m32r ++ + PR target/28508, assembler error (operand out of range). ++ Closes: #417542. ++ - m68k ++ + PR target/34688, ICE in output_operand. Closes: #459429. ++ * Closing reports reported against gcc-4.2 and fixed in gcc-4.3: ++ - General ++ + PR tree-optimization/33826, wrong code generation for infinitely ++ recursive functions. Closes: #445536. ++ - C++ ++ + PR c++/24791, ICE on invalid instantiation of template's static member. ++ Closes: #446698. ++ ++ [Aurelien Jarno] ++ * Really apply arm-funroll-loops.dpatch on arm and armel. Closes: #476460. ++ ++ -- Matthias Klose Sat, 07 Jun 2008 23:16:21 +0200 ++ ++gcc-4.3 (4.3.0-5) unstable; urgency=medium ++ ++ * Update to SVN 20080523 from the gcc-4_3-branch. ++ - Remove gcc-i386-emit-cld patch. ++ - On Debian amd64 and i386 configure with --enable-cld. ++ * Fix PR tree-optimization/36129, ICE with -fprofile-use. ++ * Add spu build dependencies independent of the architecture. ++ * Move arm -funroll-loops fix to arm-funroll-loops from ++ gfortran-armel-updates. Apply it on both arm and armel. ++ Closes: #476460. ++ * Use iceape-dev as a build dependency for Java enabled builds. ++ * Build the sru cross compiler from a separate source dir without applying ++ the hardening patches. ++ ++ -- Matthias Klose Fri, 23 May 2008 10:12:02 +0200 ++ ++gcc-4.3 (4.3.0-4) unstable; urgency=low ++ ++ [ Aurelien Jarno ] ++ * Fix gnat-4.3 build on mips/mipsel. ++ * Update libgcc1 symbols for hurd-i386. ++ ++ [ Arthur Loiret ] ++ * Make gcc-4.3-spu Recommends newlib-spu. Closes: #476088 ++ * Build depend on spu build dependencies only when building ++ as gcc-4.x source package. ++ * Disable spu for snapshot builds. ++ * Support sh4 targets: ++ - sh4-multilib.dpatch: Add, fix multilib (m4/m4-nofpu) for sh4-linux ++ - multiarch-include.dpatch: Don't apply on sh4. ++ ++ [ Matthias Klose ] ++ * Stop building libffi packages. ++ * Update to SVN 20080501 from the gcc-4_3-branch. ++ - Fix PR target/35662, wrong gfortran code on mips/mipsel. Closes: #476427. ++ - Fixes mplayer build on powerpc. Closes: #475153. ++ * Stop building gij/gcj on alpha, arm and hppa. Closes: #459560. ++ * libstdc++6-4.3-doc: Fix file location in doc-base file. Closes: #476253. ++ * debian/patches/template.dpatch: Remove the `exit 0' line. ++ * Fix alternative names for amd64 cross builds. Addresses: #466422. ++ * debian/copyright: Update to GPLv3, remove the text of the GFDL ++ and reference the copy in common-licenses. ++ * Generate the locale data for the testsuite, if the locales package ++ is installed (not a dependency on all archs). ++ * Update libgcc2 symbols for m68k, libstdc++6 symbols for arm, m68k, mips ++ and mipsel. ++ * Do not include a symbols file for libobjc_gc.so. ++ * Add four more symbols to libgcj_bc, patch taken from the trunk. ++ * Adjust names of manual pages in the spu build on powerpc. ++ * ARM EABI (armel) updates (Andrew Jenner, Julian Brown): ++ - Add Objective-C support. ++ - Fortran support patches. ++ - Fix ICE in gfortran.dg/vector_subscript_1.f90 for -Os -mthumb reload. ++ * Build ObjC and Obj-C++ packages on armel. ++ * Reenable running the testsuite on m68k. ++ ++ [Samuel Tardieu, Ludovic Brenta] ++ * debian/patches/gnalasup_to_lapack.dpatch: new. ++ * debian/patches/pr34466.dpatch, ++ debian/patches/pr22255.dpatch, ++ debian/patches/pr33688.dpatch, ++ debian/patches/pr10768.dpatch, ++ debian/patches/pr28305.dpatch, ++ debian/patches/pr17985.dpatch (#278685) ++ debian/patches/pr15915.dpatch, ++ debian/patches/pr16098.dpatch, ++ debian/patches/pr18680.dpatch, ++ debian/patches/pr28733.dpatch, ++ debian/patches/pr22387.dpatch, ++ debian/patches/pr29015.dpatch: new; backport Ada bug fixes from GCC 4.4. ++ * debian/patches/rules.patch: apply them. ++ * debian/patches/pr35050.dpatch: update. ++ ++ [Andreas Jochens] ++ * debian/patches/ppc64-ada.dpatch: update, adding support for ppc64. ++ (#476868). ++ ++ [Ludovic Brenta] ++ * Apply ppc64-ada.dpatch whenever we build libgnat, not just on ppc64. ++ * debian/patches/pr28322.dpatch: never pass -Wno-overlength-strings to ++ the bootstrap compiler, as the patch breaks the detection of whether ++ the bootstrap compiler supports this option or not. ++ Fixes: #471192. Works around #471767. ++ * Merge Aurélien Jarno's mips patch. Fixes: #472854. ++ ++ [ Samuel Tardieu ] ++ * debian/patches/pr30740.dpatch: new Ada bug fix. ++ * debian/patches/pr35050.dpatch: new Ada bug fix. ++ ++ [ Xavier Grave ] ++ * debian/patches/ada-mips{,el}.dpatch: new; split mips/mipsel support ++ into new patches, out of ada-sjlj.dpatch. ++ * debian/rules.d/binary-ada.mk: fix the version number of libgnarl-4.3.a. ++ ++ [Roman Zippel] ++ * PR target/25343, fix gcc.dg/pch/pch for m68k. ++ ++ -- Matthias Klose Thu, 01 May 2008 21:08:09 +0200 ++ ++gcc-4.3 (4.3.0-3) unstable; urgency=medium ++ ++ [ Matthias Klose ] ++ * Update to SVN 20080401 from the gcc-4_3-branch. ++ - Fix PR middle-end/35705 (hppa only). ++ * Update libstdc++6 symbols for hurd-i386. Closes: #472334. ++ * Update symbol files for libgomp (ppc64). ++ * Only apply the gcc-i386-emit-cld patch on amd64 and i386 architectures. ++ * Update libstdc++ baseline symbols for hppa. ++ * Install powerpc specific header files new in 4.3. ++ * gcc-4.3-hppa64: Don't include the install tools in the package. ++ ++ [ Aurelien Jarno ] ++ * Fix gobjc-4.3-multilib dependencies. Closes: #473455. ++ * Fix gnat-4.3 build on mips/mipsel. ++ * patches/ada-alpha.dpatch: new patch to fix gnat-4.3 build on alpha. ++ Closes: #472852. ++ * patches/config-ml.dpatch: also check for n32 multidir. ++ ++ [ Arthur Loiret ] ++ * Build-Depends on binutils (>= 2.18.1~cvs20080103-2) on mips and mipsel, ++ required for triarch. ++ * libstdc++-pic.dpatch: Update, don't fail anymore if shared lib is disabled. ++ ++ [ Andreas Jochens ] ++ * Fix build failures on ppc64. Closes: #472917. ++ - gcc-multilib64dir.dpatch: Remove "msoft-float" and "nof" from MULTILIB ++ variables. ++ - Removed ppc64-biarch.dpatch. ++ - Add debian/lib32gfortan3.symbols.ppc64. ++ ++ [ Arthur Loiret, Matthias Klose ] ++ * Build compilers for spu-elf target on powerpc and ppc64. ++ - Add gcc-4.3-spu, g++-4.3-spu and gfortran-4.3-spu packages. ++ - Partly based on the work in Ubuntu on the spu toolchain. ++ ++ -- Matthias Klose Tue, 01 Apr 2008 23:29:21 +0000 ++ ++gcc-4.3 (4.3.0-2) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20080321 from the gcc-4_3-branch. ++ - Remove some broken code that attempts to enforce linker ++ constraints. Closes: #432541. ++ * Temporary fix, will be removed once a fixed kernel is available ++ in testing: Emit cld instruction when stringops are used (i386). ++ Do not expose the -mcld option until added upstream. Closes: #469567. ++ * Update NEWS files. ++ * libjava: Don't leak upon failed realloc (taken from the trunk). ++ * debian/rules2: The build is not yet prepared to take variables from ++ the environment; unexport and unset those. ++ ++ [Arthur Loiret/Aurelien Jarno] ++ * MIPS tri-arch support: ++ - mips-triarch.dpatch: new patch to default to o32 and follow the ++ glibc convention for n32 & 64 bit names. ++ - Rename $(biarch) and related vars into $(biarch64). ++ - Fix biarchsubdir to allow triarch. ++ - Add biarchn32 support. ++ - Add mips and mipsel to biarch64 and biarchn32 archs. ++ - Update binary rules for biarchn32 and libn32 targets. ++ - Fix multilib deps for triarch. ++ - control.m4: Add libn32 packages. ++ ++ -- Matthias Klose Sat, 22 Mar 2008 00:06:33 +0100 ++ ++gcc-4.3 (4.3.0-1) unstable; urgency=low ++ ++ [Matthias Klose] ++ * GCC-4.3.0, final release. ++ * Update to SVN 20080309 from the gcc-4_3-branch. ++ * Build from a modified tarball, without GFDL documentation with ++ invariant sections and cover texts. ++ * debian/rules.unpack: Avoid make warnings. ++ * debian/rules.d/binary-cpp.mk: Add 4.3.0 symlink in gcclibdir. ++ * Stop building treelang (removed upstream). ++ * gcj-4.3: Hardcode libgcj-bc dependency, don't run dh_shlibdeps on ecj1. ++ ++ [Aurelien Jarno] ++ * Update libssp-gnu.dpatch and reenable it. ++ ++ -- Matthias Klose Sun, 09 Mar 2008 15:18:08 +0100 ++ ++gcc-4.3 (4.3.0~rc2-1) unstable; urgency=medium ++ ++ * Update to SVN 20080301 from the gcc-4_3-branch. ++ * Include the biarch libobjc_gc library in the packages. ++ * Link libobjc_gc with libgcjgc_convenience.la. ++ * Add new symbols to libstdc++6 symbol files, remove the symbols for ++ support (reverted upstream for the 4.3 branch). ++ * Disable running the testsuite on m68k. ++ * Update PR other/28322, ignore only unknown -W* options. ++ ++ -- Matthias Klose Sat, 01 Mar 2008 15:09:16 +0100 ++ ++gcc-4.3 (4.3-20080227-1) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20080227 from the gcc-4_3-branch. ++ * Fix PR other/28322, GCC new warnings and compatibility. ++ Addresses: #367657. ++ ++ [Hector Oron] ++ * Fix cross-compile builds. Closes: #467471. ++ ++ -- Matthias Klose Thu, 28 Feb 2008 00:30:38 +0100 ++ ++gcc-4.3 (4.3-20080219-1) unstable; urgency=medium ++ ++ [Matthias Klose] ++ * Update to SVN 20080219 from the gcc-4_3-branch. ++ * Apply proposed patch for PR target/34571 (alpha). ++ * libgcj9-dev: Don't claim that the package contains the static ++ libraries. ++ * libjava-xulrunner1.9.dpatch: Add configure check for xulrunner-1.9. ++ Name the alternative xulrunner-1.9-javaplugin.so. ++ * libgcj-doc: Don't include the examples; these cannot be built ++ with the existing Makefile anyway. Addresses: #449608. ++ * Manpages for gc-analyze and grmic are GFDL. Don't include these when ++ building DFSG compliant packages. ++ * Fix build failure building amd64 cross-target libstdc++ packages ++ (Tim Bagot). Addresses: #464365. ++ * Fix typos in rename-info-files patch (Richard Guenther). ++ * Fix PR libgcj/24170. ++ ++ [Aurelien Jarno] ++ * kbsd-gnu-ada.dpatch: new patch to fix build on GNU/kFreeBSD. ++ ++ [Ludovic Brenta] ++ * debian/rules.defs: Temporarily disable the testsuite when building gnat. ++ * debian/patches/libffi-configure.dpatch: run autoconf in the top-level ++ directory, where we've changed configure.ac; not in src/gcc. ++ * debian/patches/ada-sjlj.dpatch: do not run autoconf since we don't ++ change configure.ac. ++ * debian/control.m4 (gnat-4.3-doc): conflict with gnat-4.[12]-doc. ++ Closes: #464801. ++ ++ -- Matthias Klose Tue, 19 Feb 2008 23:20:45 +0000 ++ ++gcc-4.3 (4.3-20080202-1) unstable; urgency=low ++ ++ [ Matthias Klose ] ++ * Update to SVN 20080202 from the trunk. ++ - Fix PR c/35017, pedwarns about valid code. Closes: #450506. ++ - Fix PR target/35045, wrong code generation with -O3 on i386. ++ Closes: #463478. ++ * gcj-4.3: On armel depend on g++-4.3. ++ * Re-enable build of libobjc_gc, using the internal version of boehm-gc. ++ Closes: #212248. ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-default-project-path.dpatch, ++ debian/patches/ada-gcc-name.dpatch, ++ debian/patches/ada-symbolic-tracebacks.dpatch, ++ debian/patches/ada-link-lib.dpatch, ++ debian/patches/ada-libgnatvsn.dpatch, ++ debian/patches/ada-libgnatprj.dpatch, ++ debian/patches/ada-sjlj.dpatch: adjust to GCC 4.3. ++ * debian/README.gnat, debian/TODO, ++ debian/rules.d/binary-ada.mk: merge from gnat-4.2. ++ * debian/README.maintainers: add instructions for patching GCC. ++ * debian/patches/ada-driver.dpatch: remove, no longer used. ++ * debian/patches/libffi-configure.dpatch: do not patch the top-level ++ configure anymore; instead, rerun autoconf. This allows removing the ++ patch cleanly. ++ * debian/rules2: use gnatgcc as the bootstrap compiler, not gcc-4.2. ++ ++ -- Matthias Klose Sat, 02 Feb 2008 19:58:48 +0100 ++ ++gcc-4.3 (4.3-20080127-1) unstable; urgency=low ++ ++ [ Matthias Klose ] ++ * Update to SVN 20080126 from the trunk. ++ * Tighten build dependency on doxygen. ++ * Update libstdc++ patches to current svn. ++ * gij-4.3: Provide java*-runtime-headless instead of java*-runtime. ++ ++ [ Aurelien Jarno] ++ * debian/multiarch.inc: change mipsel64 into mips64el. ++ ++ -- Matthias Klose Sun, 27 Jan 2008 01:33:35 +0100 ++ ++gcc-4.3 (4.3-20080116-1) unstable; urgency=medium ++ ++ * Update to SVN 20080116 from the trunk. ++ * Update debian/watch. ++ * Build libgomp documentation without building libgomp. Addresses: #460660. ++ * Handle lzma compressed tarballs. ++ * Fix dependency generation for the gcc-snapshot package: Addresses: #454667. ++ * Restore lost chunk in libjava-subdir.dpatch. ++ ++ -- Matthias Klose Wed, 16 Jan 2008 20:33:50 +0100 ++ ++gcc-4.3 (4.3-20080112-1) unstable; urgency=low ++ ++ * Update to SVN 20080112 from the trunk. ++ * Tighten build-dependency on dpkg-dev (closes: #458894). ++ * Update symbol definitions for alpha. ++ * Build-depend on libmpfr-dev for all source packages. ++ ++ -- Matthias Klose Sun, 13 Jan 2008 00:40:28 +0100 ++ ++gcc-4.3 (4.3-20080104-1) unstable; urgency=low ++ ++ * Update to SVN 20080104 from the trunk. ++ * Update symbol definitions for alpha, hppa, ia64, mips, mipsel, powerpc, ++ s390, sparc. ++ ++ -- Matthias Klose Fri, 04 Jan 2008 07:34:15 +0100 ++ ++gcc-4.3 (4.3-20080102-1) unstable; urgency=low ++ ++ [ Matthias Klose ] ++ * Update to SVN 20080102 from the trunk. ++ - Fix 64bit biarch builds (addresses: #447443). ++ * debian/rules.d/binary-java.mk: Reorder packaging to get shlibs ++ dependencies right. ++ * Use lib instead of lib64 as multilibdir on amd64 and ppc64. ++ * Build the java plugin always using libxul-dev. ++ * Add libgcj_bc to the libgcj9-0 shlibs file. ++ * Add symbol files for libgcc1, lib32gcc1, lib64gcc1, libstdc++6, ++ lib32stdc++6, lib64stdc++6, libgomp1, lib32gomp1, lib64gomp1, libffi4, ++ lib32ffi4, lib64ffi4, libobjc2, lib32objc2, lib64objc2, libgfortran3, ++ lib32gfortran3, lib64gfortran3. ++ Adjust build dependencies on dpkg-dev and debhelper. ++ * Do not build the java packages from the gcc-4.3 source package. ++ ++ [ Aurelien Jarno ] ++ * Disable amd64-biarch patch on kfreebsd-amd64. ++ ++ -- Matthias Klose Wed, 02 Jan 2008 23:48:14 +0100 ++ ++gcc-4.3 (4.3-20071124-1) experimental; urgency=low ++ ++ [ Matthias Klose ] ++ * Update to SVN 20071124 from the trunk. ++ * Fix dependencies of lib*gcc1-dbg packages. ++ * gcjwebplugin: Fix path of the gcj subdirectory. LP: #149792. ++ * gij-hppa: Call gij-4.2, not gij-4.1. Addresses: #446282. ++ * Don't run the testsuite on hppa when expect-tcl8.3 is not available. ++ * Fix libgcc1-dbg doc directory symlink. Closes: #447969. ++ ++ [ Aurelien Jarno ] ++ * Update kbsd-gnu patch. ++ * Remove kbsd-gnu-ada patch (merged upstream). ++ ++ -- Matthias Klose Sat, 24 Nov 2007 13:14:29 +0100 ++ ++gcc-4.3 (4.3-20070930-1) experimental; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20070929 from the trunk. ++ * Update debian patches to the current trunk. ++ * Regenerate the control file. ++ * On powerpc-linux-gnu and i486-linux-gnu cross-compile the 64bit ++ multilib libraries to allow a sucessful build on 32bit kernels ++ (our buildds). Although we won't get 64bit test results this way ... ++ * Remove the build dependency on expect-tcl8.3. ++ * Fix MULTILIB_OSDIRNAMES for cross builds targeted for amd64 and ppc64. ++ * When -fstack-protector is the default (Ubuntu), do not enable ++ -fstack-protector when -nostdlib is specified. LP: #77865. ++ * Always set STAGE1_CFLAGS to -g -O2, only pass other settings ++ when configuring when required. ++ * Configure --with-bugurl, adjust the bug reporting instructions. ++ * gcc-4.3: Install new cpuid.h header. ++ * Fix installation of the s390 libstdc++ biarch headers. ++ * Install new bmmintrin.h, mmintrin-common.h headers. ++ * Build -dbg packages for libgcc, libgomp, libmudflap, libffi, libobjc, ++ libgfortran. ++ * Downgrade libmudflap-dev recommendation to a suggestion. Closes: #443929. ++ ++ [Riku Voipio] ++ * Configure armeabi with --disable-sjlj-exceptions. ++ * armel testsuite takes ages, adjust build accordingly. ++ ++ -- Matthias Klose Sun, 30 Sep 2007 12:06:02 +0200 ++ ++gcc-4.3 (4.3-20070902-1) experimental; urgency=low ++ ++ * Upload to experimental. ++ ++ -- Matthias Klose Sun, 2 Sep 2007 20:51:16 +0200 ++ ++gcc-4.3 (4.3-20070902-0ubuntu1) gutsy; urgency=low ++ ++ * Update to SVN 20070902 from the trunk. ++ * Fix the build logic for the Ubuntu i386 buildd; we can't build biarch. ++ * Only remove libgcj9's classmap db if no other libgcj9* library is ++ installed. ++ * A lot more updates for 4.3 packaging. ++ ++ -- Matthias Klose Sat, 01 Sep 2007 21:01:43 +0200 ++ ++gcc-4.3 (4.3-20070901-0ubuntu1) gutsy; urgency=low ++ ++ * Update to SVN 20070901 from the trunk. ++ * First gcc-4.3 package build. ++ - Update patches for the *-linux-gnu builds. ++ - Update build files for 4.3. ++ * Add proposed patch for PR middle-end/33029. ++ * gcj-4.3: Install gc-analyze. ++ ++ -- Matthias Klose Sat, 1 Sep 2007 20:52:16 +0200 ++ ++gcc-4.2 (4.2.2-7) unstable; urgency=low ++ ++ * Update to SVN 20080114 from the ubuntu/gcc-4_2-branch. ++ - Fix PR middle-end/34762. LP: #182412. ++ * Update debian/watch. Closes: #459259. Addresses: #459391, #459392. ++ * Build libgomp documentation without building libgomp. Closes: #460660. ++ * Restore gomp development files. Closes: #460736. ++ ++ -- Matthias Klose Mon, 14 Jan 2008 23:20:04 +0100 ++ ++gcc-4.2 (4.2.2-6) unstable; urgency=low ++ ++ * Update to SVN 20080113 from the ubuntu/gcc-4_2-branch. ++ * Adjust build-dependency on debhelper, dpkg-dev. ++ * Fix gnat-4.2 build failure (addresses: #456867). ++ * Do not build packages built from the gcc-4.3 source. ++ ++ -- Matthias Klose Sun, 13 Jan 2008 13:48:49 +0100 ++ ++gcc-4.2 (4.2.2-5) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20080102 from the ubuntu/gcc-4_2-branch. ++ - Fix PR middle-end/32889, ICE in delete_output_reload. ++ Closes: #444873, #445336, #451047. ++ - Fix PR target/34215, ICE in assign_386_stack_local. ++ Closes: #446714, #452451. ++ - Fix PR target/33848, reference to non-existent label at -O1 on ++ mips/mipsel. Closes: #441633. ++ * debian/rules.d/binary-java.mk: dpkg-shlibsdeps can't handle the dangling ++ symlink to libgcj_bc.so.1. Remove it temporarily. ++ * Add libgcj_bc to the libgcj8-1 shlibs file. ++ * Fix build failures for gnat-4.2, gpc-4.2, gdc-4.2 introduced by recent ++ gdc changes. ++ * Add symbol files for libgcc1, lib32gcc1, lib64gcc1, libstdc++6, ++ lib32stdc++6, lib64stdc++6, libgomp1, lib32gomp1, lib64gomp1, libffi4, ++ lib32ffi4, lib64ffi4, libobjc2, lib32objc2, lib64objc2. Adjust build ++ dependencies on dpkg-dev and debhelper. ++ Adjust build-dependency on dpkg-dev. ++ ++ [Arthur Loiret] ++ * Fix gdc-4.2 build failure. ++ * Update gdc to upstream SVN 20071124. ++ - d-bi-attrs: Support attributes on declarations in other modules. ++ - d-codegen.cc (IRState::attributes): Support constant declarations as ++ string arguments. ++ * Enable libphobos: ++ - gdc-4.2.dpatch: Fix ICEs. ++ - gdc-4.2-build.dpatch: Update, make it cleaner. ++ * Install libphobos in the private gcc lib dir. ++ * gdc-4.2.dpatch: Update from gdc-4.1.dpatch. ++ - gcc/tree-sra.c: Do not use SRA on structs with aliased fields created ++ for anonymous unions. ++ - gcc/predict.c: Add null-pointer check. ++ * debian/rules.defs: Disable phobos on hurd-i386. ++ - gdc-hurd-proc_maps.dpatch: Remove. ++ ++ -- Matthias Klose Wed, 02 Jan 2008 15:49:30 +0100 ++ ++gcc-4.2 (4.2.2-4) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20071123 from the ubuntu/gcc-4_2-branch. ++ - Fix PR middle-end/34130, wrong code with some __builtin_abs expressions. ++ Closes: #452108. ++ * Don't run the testsuite on hppa when expect-tcl8.3 is not available. ++ * Fix libgcc1-dbg doc directory symlink. Closes: #447969. ++ * Use gcc-multilib as build-dependency instead of gcc-4.1-mulitlib. ++ * Support for fast-math on hurd-i386 (Michael Banck). Closes: #451520. ++ * Fix again profiling support on the Hurd (Thomas Schwinge). Closes: #434937. ++ ++ [Arthur Loiret] ++ * Merge gdc-4.1 patches and build infrastructure: ++ - gdc-4.2.dpatch: Add, setup gcc-4.2.x for D. ++ - gdc-4.2-build.dpatch: Add, update gdc builtins and driver objs. ++ - gdc-driver-zlib.dpatch: Add, use up-to-date system zlib. ++ - gdc-driver-defaultlib.dpatch: Add, add -defaultlib/-debuglib switches. ++ - gdc-driver-nophobos.dpatch: Add, disable libphobos when unsupported. ++ - gdc-libphobos-build.dpatch: Add, enable libphobos build when supported. ++ - gdc-fix-build.dpatch: Add, fix build on non-biarched 64bits targets. ++ - gdc-libphobos-std-format.dpatch: Add, replace assert when formating a ++ struct on non-x86_64 archs by a FormatError. ++ - gdc-arm-unwind_ptr.dpatch: Add, fix build on arm. ++ - gdc-mips-gcc-config.dpatch: Add, fix build on mips. ++ - gdc-hurd-proc_maps.dpatch: Add, fix build on hurd. ++ ++ -- Matthias Klose Sat, 24 Nov 2007 12:01:06 +0100 ++ ++gcc-4.2 (4.2.2-3) unstable; urgency=low ++ ++ * Update to SVN 20071014 from the ubuntu/gcc-4_2-branch. ++ - Fix build failure in libjava on mips/mipsel. ++ * Make 4.2.2-2 a requirement for frontends built from separate sources. ++ Addresses: #446596. ++ ++ -- Matthias Klose Sun, 14 Oct 2007 14:13:00 +0200 ++ ++gcc-4.2 (4.2.2-2) unstable; urgency=low ++ ++ * Update to SVN 20071011 from the ubuntu/gcc-4_2-branch. ++ - Fix PR middle-end/33448, ICE in create_tmp_var. Closes: #439687. ++ - Remove debian/patches/pr31899.dpatch, applied upstream. ++ - Remove debian/patches/pr33381.dpatch, applied upstream. ++ * gij-hppa: Call gij-4.2, not gij-4.1. Addresses: #446282. ++ ++ -- Matthias Klose Thu, 11 Oct 2007 23:41:52 +0200 ++ ++gcc-4.2 (4.2.2-1) unstable; urgency=low ++ ++ * Update to SVN 20071008 from the ubuntu/gcc-4_2-branch, corresponding ++ to the GCC-4.2.2 release. ++ * Fix dependencies of lib*gcc1-dbg packages. Closes: #445190. ++ * Remove libjava-armeabi patch integrated upstream. ++ * gcjwebplugin: Fix path of the gcj subdirectory. LP: #149792. ++ * Apply proposed patch for PR debug/31899. Closes: #445268. ++ ++ * Add niagara2 optimization support (David Miller). ++ ++ -- Matthias Klose Mon, 08 Oct 2007 21:12:41 +0200 ++ ++gcc-4.2 (4.2.1-6) unstable; urgency=high ++ ++ [Matthias Klose] ++ * Update to SVN 20070929 from the ubuntu/gcc-4_2-branch. ++ - Fix PR middle-end/33382, ICE (closes: #441481). ++ - Fix PR tree-optimization/28544 (4.2.1, closes: #380482). ++ - Fix PR libffi/28313, port to mips64 (closes: #358235). ++ * Fix PR tree-optimization/33099, PR tree-optimization/33381, ++ wrong code generation with VRP/SCEV. Closes: #440545, #443576. ++ * Update Hurd fixes (Samuel Thibault). ++ * When -fstack-protector is the default (Ubuntu), do not enable ++ -fstack-protector when -nostdlib is specified. LP: #77865. ++ * Add -g to BOOT_CFLAGS, set STAGE1_CFLAGS to -g -O, only pass ++ other settings when required. ++ * Fix installation of the s390 libstdc++ biarch headers. ++ * Allow the powerpc build on a 32bit machine (without running the ++ biarch testsuite). ++ * Build -dbg packages for libgcc, libgomp, libmudflap, libffi, libobjc, ++ libgfortran. ++ * Drop the build dependency on expect-tcl8.3 (the hppa testsuite seems ++ to complete sucessfully with the expect package). ++ * Downgrade libmudflap-dev recommendation to a suggestion. Closes: #443929. ++ ++ * Closing reports reported against gcc-4.1 and fixed in gcc-4.2: ++ - General ++ + PR rtl-optimization/21299, error in invalid asm statement. ++ Closes: #380121. ++ - C++ ++ + PR libstdc++/19664, libstdc++ headers have pop/push of the visibility ++ around the declarations (closes: #307207, #324290, #423547). ++ + PR c++/21581, functions in anonymous namespaces default to "hidden" ++ visibility (closes: #278310). ++ + PR c++/4882, specialization of inner template using outer template ++ argument (closes: #269513). ++ + PR c++/6634, wrong parsing of "long long double" (closes: #247112). ++ + PR c++/10891, code using dynamic_cast causes segfaults when -fno-rtti ++ is used (closes: #188943). ++ + PR libstdc++/14991, stream::attach(int fd) porting entry out-of-date. ++ Closes: #178561. ++ + PR libstdc++/31638, string usage leads to warning with -Wcast-align. ++ Closes: #382153. ++ + Fix memory hog seen with g++-4.1. Closes: #411234. ++ - Fortran ++ + PR fortran/29228, ICE in gfc_trans_deferred_array (closes: #387222). ++ + PR fortran/24285, allow dollars everywhere in format (closes: #324600). ++ + PR libfortran/28354, 0.99999 printed as 0. instead of 1. by ++ format(f3.0). Closes: #397671. ++ + Fix ICE in gfc_get_extern_function_decl (closes: #396292). ++ - Architecture specific: ++ - i386 ++ + Fix error with -m64 (unable to find a register to spill in class ++ 'DIREG'). Closes: #430049. ++ - mips ++ + Fix ICE in tsubst (closes: #422303). ++ - s390 ++ + Fix ICE (segmentation fault) building dcmtk (closes: #435736). ++ ++ [Roman Zippel] ++ * Update the m68k patches. ++ ++ [Riku Voipio] ++ * Configure armeabi with --disable-sjlj-exceptions. ++ * armel testsuite takes ages, adjust build accordingly. ++ ++ [Ludovic Brenta and Xavier Grave] ++ * Add a version of the Ada run-time library using the setjump/longjump ++ exception handling mechanism (static library only). Use with ++ gnatmake --RTS=sjlj. Particularly useful for distributed (Annex E) ++ programs. ++ * Restore building libgnatvsn-dev and libgnatprj-dev. ++ ++ -- Matthias Klose Sat, 29 Sep 2007 11:19:40 +0200 ++ ++gcc-4.2 (4.2.1-5) unstable; urgency=low ++ ++ * Update to SVN 20070825 from the ubuntu/gcc-4_2-branch. ++ - Fix PR debug/32610, LP: #121911. ++ * Apply proposed patches: ++ - Improve debug info for packed arrays with constant bounds ++ (PR fortran/22244). ++ - Fix ICE in rtl_for_decl_init on const vector initializers ++ (PR debug/32914). ++ - Fix (neg (lt X 0)) optimization (PR rtl-optimization/33148). ++ - Fix libgcc.a(tramp.o) on ppc32. ++ - Fix redundant reg/mem stores/moves (PR target/30961). ++ * Update the -fdirectives-only backport. ++ * gappletviewer-4.2: Include the gcjwebplugin binary. LP: #131114. ++ * Update gpc patches and build support (not yet enabled). ++ * Fix gcc-snapshot hppa64 install target. ++ * Set the priority of the source package to optional. ++ * Remove .la files from the biarch libstdc++ debug packages, ++ conflict with the 3.4 package. Closes: #440490. ++ ++ [Arthur Loiret] ++ * Add build support for GDC. ++ ++ -- Matthias Klose Mon, 27 Aug 2007 01:39:32 +0200 ++ ++gcc-4.2 (4.2.1-4) unstable; urgency=medium ++ ++ * gcc-4.2: Include missing std*.h header files. ++ ++ -- Matthias Klose Tue, 14 Aug 2007 11:14:35 +0200 ++ ++gcc-4.2 (4.2.1-3) unstable; urgency=low ++ ++ * Update to SVN 20070812 from the ubuntu/gcc-4_2-branch. ++ * debian/rules.defs: Fix typo, run the checks in biarch mode too. ++ * libgcj8-awt: Loosen dependency on gcj-4.2-base. ++ * Build only needed multilib libraries when building as gcj or gnat. ++ * Always build biarch libgomp in biarch builds. ++ * debian/rules2: Adjust testsuite logs files for logwatch.sh. ++ * Include header files from $/gcc_lib_dir)/include-fixed. ++ * Backport from trunk: -fdirectives-only (when preprocessing, handle ++ directives, but do not expand macros). ++ * Report an ICE to apport (if apport is available and the environment ++ variable GCC_NOAPPORT is not set) ++ * Fix gcj build failure on the Hurd (Samuel Thibault). Closes: #437470. ++ ++ -- Matthias Klose Sun, 12 Aug 2007 21:11:00 +0200 ++ ++gcc-4.2 (4.2.1-2) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20070804 from the ubuntu/gcc-4_2-branch (20070804): ++ - Merge gcc-4_2-branch SVN 20070804. ++ - Imported classpath CVS 20070727. ++ - Bump the libgcj soname, add conflict with java-gcj-compat (<< 1.0.76-4). ++ - Remove patches integrated in the branches: pr32862. ++ - Update patches: libjava-subdir, libjava-jar. ++ - Add regenerated class files: svn-class-updates. ++ ++ * Fix profiling support on the Hurd (Michael Casadeval). Closes: #434937. ++ * Fix build on kfreebsd-amd64 (Aurelien Jarno). Closes: #435053. ++ * Period of grace is over, run the testsuite on m68k-linux again. ++ * Update infrastructure for the gcc-source package (Bastian Blank). ++ * Update profiling on the Hurd (Samuel Thibault, Michael Casadevall). ++ Closes: #433539. ++ * debian/rules2: Allow DEB_BUILD_OPTIONS=parallel= to overwrite NJOBS. ++ * Allow lang=, nolang= in DEB_BUILD_OPTIONS; deprecating ++ WITHOUT_LANG, and WITHOUT_CHECK. ++ * debian/rules.defs, debian/rules.conf: Cache some often used macros. ++ ++ * Preliminary work: Enable Java for ARM EABI (Andrew Haley), build ++ libffi for armel. ++ * gcj: Don't build the browser plugin in gcc-snapshot builds to get ++ rid of the xulrunner dependency. ++ * gcjwebplugin: Register for more browsers (package currently not built). ++ * gij/boehm-gc: Use sysconf as fallback, if reading /proc/stat fails. ++ Closes: #422469. ++ * libjava: Avoid dependency on MAXHOSTNAMELEN (Samuel Thibault). ++ * gcj: On arm and armel, use the ecj1 binary built from the ecj package. ++ * gcj: Don't require javac without java maintainer mode, remove build ++ dependencies on gcj and ecj, add build dependency on libecj-java. ++ ++ -- Matthias Klose Sun, 05 Aug 2007 15:56:07 +0200 ++ ++gcc-4.2 (4.2.1-1) unstable; urgency=medium ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-symbolic-tracebacks.c: remove all trace of ++ the function convert_addresses from adaint.c. Fixes FTBFS on alpha, ++ s390 and possibly other platforms. Closes: #433633. ++ * debian/control.m4: list myself as uploader if the source package name ++ is gnat. Relax build-dependency on gnat-4.2-source. ++ * debian/control.m4, debian/rules.conf: Build-depend on libmpfr-dev only ++ if building Fortran. ++ ++ [Matthias Klose] ++ * debian/rules.conf: Fix breakage of Fortran build dependencies introduced ++ by merge of the Ada bits. ++ * Don't include the gccbug binary anymore in the gcc package; upstream bug ++ reports should be reported to the upstream bug tracker at ++ http://gcc.gnu.org/bugzilla. ++ * Don't build and test libjava for the biarch architecture. ++ * Install gappletviewer man page. Addresses: #423094. ++ * debian/patches/m68k-java.dpatch: Readd. ++ * gjar: support @ arguments. ++ * Update to SVN 20070726 from the ubuntu/gcc-4_2-branch. ++ - Fix mips/mipsel builds. ++ * libmudflap0: Fix update leaving an empty doc dir. Closes: #428306. ++ * arm/armel doesn't have ssp support. Closes: #433172. ++ * Update kbsd-gnu-ada patch (Aurelien Jarno): Addresses: #434754. ++ * gcj-4.2: Build depend on gcj-4.2 to build the classpath examples files ++ for the binary-indep target. ++ * Fix PR java/32862, bugs in EnumMap implementation. Addresses: #423160. ++ ++ [Arthur Loiret] ++ * Fix cross builds targeting x86_64. Closes: LP: #121834. ++ ++ -- Matthias Klose Thu, 26 Jul 2007 21:46:03 +0200 ++ ++gcc-4.2 (4.2.1-0) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20070719 from the ubuntu/gcc-4_2-branch, corresponding ++ to the GCC-4.2.1 release. ++ - debian/patches/arm-gij.dpatch: Remove. Closes: #433714. ++ * Apply proposed patch for PR tree-optimization/32723. ++ * Tighten build dependency on libmpfr-dev. ++ * On ia64, apply proposed patch for PR target/27880. Closes: #433719. ++ ++ [Hector Oron] ++ * Fix cross and reverse-cross builds. Closes: #432356. ++ ++ -- Matthias Klose Thu, 19 Jul 2007 17:59:37 +0200 ++ ++gnat-4.2 (4.2-20070712-1) unstable; urgency=low ++ ++ * debian/rules.d/binary-ada.mk, debian/control.m4: ++ disable building libgnatvsn-dev and libgnatprj-dev, as they conflict ++ with packages from gnat-4.1. Will reenable them for the transition to ++ gnat-4.2. ++ * Upload as gnat-4.2. Closes: #432525. ++ ++ -- Ludovic Brenta Sat, 14 Jul 2007 15:12:34 +0200 ++ ++gcc-4.2 (4.2-20070712-1) unstable; urgency=high ++ ++ [Matthias Klose] ++ * Update to SVN 20070712 from the ubuntu/gcc-4_2-branch. ++ - 4.2.1 RC2, built from SVN. ++ - same as gcc-4_2-branch, plus backport of gcc/java, boehm-gc, libffi, ++ libjava, zlib from the trunk. ++ - debian/patches/arm-libffi.dpatch: Remove. ++ - Fixes ICE in update_equiv_regs. Closes: #432604. ++ * debian/control.m4: Restore build dependency on dejagnu. ++ * debian/patches/arm-gij.dpatch: Update. ++ * i386-biarch.dpatch: Update for the backport for PR target/31868. ++ Closes: #432599. ++ ++ -- Matthias Klose Fri, 13 Jul 2007 08:07:51 +0200 ++ ++gcc-4.2 (4.2-20070707-1) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20070707 from the ubuntu/gcc-4_2-branch. ++ - debian/patches/libjava-soname.dpatch: Remove. ++ - debian/patches/disable-configure-run-check.dpatch: Update. ++ * Only suggest multilib packages on multilib architectures. ++ * Point ICE messages to the 4.2 docdir. ++ * Explicitely use fastjar to build gcj-4.1. Addresses: #416001. ++ * Configure with --enable-libgcj on m32r (Kazuhiro Inaoka). ++ * Include the hppa64 cross compiler on hppa snapshot builds. ++ * debian/patches/arm-libffi.dpatch: Update. ++ * libgcj-doc: Include the generated documentation. ++ * Fix building the libjava/classpath examples. ++ * Support reverse cross builds (Neil Williams). Closes: #431086. ++ ++ -- Matthias Klose Sat, 07 Jul 2007 10:59:26 +0200 ++ ++gcc-4.2 (4.2-20070627-1) unstable; urgency=high ++ ++ [Matthias Klose] ++ * Update to SVN gcc-4_2-branch/20070626. ++ * Update to SVN trunk/20070626 (gcc/java, libjava, libffi, boehm-gc). ++ * On mips*-linux, always imply -lpthread for -pthread (Thiemo Seufer). ++ Addresses: #428741. ++ * Fix libstdc++ cross builds (Arthur Loiret). Closes: #430395. ++ * README.Debian: Point to debian-toolchain for general toolchain topics. ++ * Use the generated locales for the libstdc++ build to fix the setting ++ of the gnu locale model. Closes: #428926, #429660. ++ * For ix86 lpia targets, configure --with-tune=i586. ++ * Make build dependency on gcc-4.1-multilib architecture specific. ++ * Do not ignore bootstrap comparision failure on ia64. ++ ++ [Ludovic Brenta] ++ * ada-link-lib.dpatch: update to apply cleanly on GCC 4.2. ++ * ada-libgnat{vsn,prj}.dpatch: adjust to GCC 4.2. Reenable in rules.patch. ++ * rules.conf: do not build libgomp as part of gnat-4.2. ++ * rules.conf, control.m4: build-depend on libz-dev, lib32z-dev or ++ lib64-dev only when building Java. ++ * rules2, rules.defs: $(with_mudflap): remove, use $(with_libmudflap) only. ++ * config.m4, binary-ada.mk: tighten dependencies; no Ada package depends ++ on gcc-4.2-base anymore. ++ * TODO: rewrite. ++ * README.gnat: include in gnat-4.2-base. Remove outdated information. ++ * README.maintainers: new. Include in gnat-4.2-base. ++ ++ [Hector Oron] ++ * Merge DEB_CROSS_INDEPENDENT with DEB_CROSS. ++ * Disables libssp0 for arm and armel targets when cross compiling. ++ * Updates README.cross. ++ * Fixes linker mapping problem on binary-libstdcxx-cross.mk. Closes: #430688. ++ ++ -- Matthias Klose Wed, 27 Jun 2007 21:54:08 +0200 ++ ++gcc-4.2 (4.2-20070609-1) unstable; urgency=low ++ ++ * Update to SVN gcc-4_2-branch/20070609. ++ - Remove patches integrated upstream: pr30052, hppa-caller-save-pic-tls. ++ * Update to SVN trunk/20070609 (gcc/java, libjava, libffi, boehm-gc). ++ - Remove patches integrated upstream: libjava-qt-peer, ++ classpath-config-guess. ++ * Do not build with --enable-java-maintainer-mode. ++ * debian/rules.patch: Comment out m68k-peephole, requires m68k-split_shift. ++ * Add target to apply patches up to a specific patch (Wouter Verhelst). ++ Closes: #424855. ++ * libstdc++6-4.2-*: Add conflicts with 4.1 packages. Closes: #419511. ++ * Apply proposed fix for PR target/28102. Closes: #426905. ++ * Fix build failure for cross compiler builds (Jiri Palecek). Closes: #393897. ++ * Update build macros for kfreebsd-amd64. Closes: #424693. ++ ++ -- Matthias Klose Sat, 9 Jun 2007 06:54:13 +0200 ++ ++gcc-4.2 (4.2-20070528-1) unstable; urgency=low ++ ++ * Update to SVN gcc-4_2-branch/20070528. ++ * Add backport for PR middle-end/20218. ++ * Add proposed PTA solver backport, PR tree-optimization/30052. ++ * Add backport for PR target/31868. ++ * Reenable the testsuite for arm, mips, mipsel. ++ ++ -- Matthias Klose Mon, 28 May 2007 09:03:04 +0200 ++ ++gcc-4.2 (4.2-20070525-1) unstable; urgency=low ++ ++ * Update to SVN gcc-4_2-branch/20070525. ++ * Update to SVN trunk/20070520 (gcc/java, libjava, libffi, boehm-gc). ++ * Do not explicitely configure for __cxa_atexit. ++ * libstdc++6-4.2-doc: Conflict with libstdc++6-4.1-doc. Closes: #424896. ++ * Update m68k patches: ++ - Remove patches applied upstream: m68k-jumptable, m68k-gc, ++ - Reenable patches: m68k-save_pic, m68k-dwarf, m68k-limit_reload, ++ m68k-prevent-qipush, m68k-peephole, m68k-return, m68k-sig-unwind, ++ m68k-align-code m68k-align-stack, m68k-symbolic-operand, ++ m68k-bitfield-offset. ++ - Update: m68k-return, m68k-secondary-addr-reload, m68k-notice-move ++ m68k-secondary-addr-reload, m68k-notice-move. ++ - TODO: m68k-split_shift, m68k-dwarf3, m68k-fpcompare. ++ * Update the kfreebsd and arm patches (Aurelien Jarno). Closes: #425011. ++ * Temporarily disable the testsuite on slow architectures to get the ++ package built soon. ++ ++ -- Matthias Klose Fri, 25 May 2007 07:14:36 +0200 ++ ++gcc-4.2 (4.2-20070516-1) unstable; urgency=low ++ ++ * Update to SVN gcc-4_2-branch/20070516. ++ * Update to SVN trunk/20070516 (gcc/java, libjava, libffi, boehm-gc). ++ * Merge changes from gcc-4.1_4.1.2-7. ++ * Update NEWS files. ++ ++ -- Matthias Klose Wed, 16 May 2007 02:33:57 +0200 ++ ++gcc-4.2 (4.2-20070502-1) unstable; urgency=low ++ ++ * Update to SVN gcc-4_2-branch/20070502. ++ - Remove pr11953 patch, integrated upstream. ++ * Update to SVN trunk/20070502 (gcc/java, libjava, libffi, boehm-gc). ++ * Adjust tetex/tex-live build dependency. ++ * Fix gobjc-4.2's, gobjc++-4.2's dependency on libobjc2. ++ * Tighten (build) dependency on binutils. Addresses: #421197. ++ * gfortran-4.2: Depend on libgfortran2, provide the libgfortran.so ++ symlink. Adresses: #421362. ++ * Build-depend on gcc-multilib [amd64 i386 powerpc ppc64 s390 sparc]. ++ * (Build-) depend on glibc (>= 2.5) for all architectures. ++ * Remove libssp packages from the control file. ++ ++ -- Matthias Klose Wed, 2 May 2007 18:46:57 +0200 ++ ++gcc-4.2 (4.2-20070405-1) experimental; urgency=low ++ ++ * Update to SVN gcc-4_2-branch/20070405. ++ * Update to SVN trunk/20070405 (gcc/java, libjava, libffi, boehm-gc). ++ * gcc-4.2-hppa64: Don't depend on libc6-dev. ++ * Robustify setting of make's -j flag. Closes: #410919. ++ * gcc-snapshot: Use the install_snap_stamp target for installation. ++ ++ -- Matthias Klose Thu, 5 Apr 2007 23:56:35 +0200 ++ ++gcc-4.2 (4.2-20070307-1) experimental; urgency=low ++ ++ * Update to SVN gcc-4_2-branch/20070307. ++ * Update to SVN trunk/20070307 (gcc/java, libjava, libffi, boehm-gc). ++ * Build gnat from separate sources. ++ * Merge changes from gcc-4.1-4.1.2-1. ++ * Install into /usr/lib/gcc//4.2, to ease upgrades ++ between subminor versions. ++ * Configure --with-gxx-include-dir=/usr/include/c++/4.2 ++ ++ -- Matthias Klose Thu, 8 Mar 2007 02:52:00 +0100 ++ ++gcc-4.2 (4.2-20070210-1) experimental; urgency=low ++ ++ * Merge Java backport from Ubuntu: ++ - Update to SVN gcc-4_2-branch/20070210. ++ - Update to SVN trunk/20070210 (gcc/java, libjava). ++ - Backout trunk specific gcc/java changes. ++ - Build-depend on gcj-4.1 and ecj-bootstrap. ++ - gcj-4.2: Depend on ecj-bootstrap, recommend ecj-bootstrap-gcj. ++ - Merge libgcj8-awt-gtk back into libgcj8-awt; the Qt peers ++ are disabled by upstream again. ++ - Generate manual pages for the classpath tools from the classpath ++ documentation. ++ - Adopt packaging for the merged libjava. ++ - Update patches for the merged libjava: libjava-lib32-properties, ++ i386-biarch, reporting, libjava-soname, libjava-subdir, ++ libjava-lib32subdir. ++ - Remove obsolete patches: libjava-plugin-binary, libjava-ia32fix, ++ libstdc++-docfixes. ++ ++ * Set priority of development packages to optional. ++ * debian/libgcjGCJ.postrm: Don't fail on purge when directories ++ don't exist anymore. Closes: #406017. ++ * debian/patches/gcc-textdomain.dpatch: Update for 4.2. ++ * Generate and install libgomp docs into gcc-4.2-doc. ++ ++ -- Matthias Klose Sat, 10 Feb 2007 16:53:11 +0100 ++ ++gcc-4.2 (4.2-20070105-1) experimental; urgency=low ++ ++ * Update to SVN 20070105. ++ * Add tetex-extra to Build-Depend-Indep (libstd++ doxygen docs), ++ fix doxygen build (libstdc++-docfixes.dpatch). ++ * Enable parallel build by default on SMP machines. ++ ++ -- Matthias Klose Fri, 5 Jan 2007 22:42:18 +0100 ++ ++gcc-4.2 (4.2-20061217-1) experimental; urgency=low ++ ++ * Update to SVN 20061217. ++ * Merge changes from gcc-4.1_4.1.1-16 to gcc-4.1_4.1.1-21. ++ * Update patches to the current branch. ++ * Add multilib packages for gcc, g++, gobjc, gobjc++, gfortran. ++ * Link using --hash-style=gnu (alpha, amd64, ia64, i386, powerpc, ppc64, ++ s390, sparc). ++ ++ -- Matthias Klose Sun, 17 Dec 2006 15:54:54 +0100 ++ ++gcc-4.2 (4.2-20061003-1) experimental; urgency=low ++ ++ * libgcj.postinst: Remove /var/lib/gcj-4.2 on package removal. ++ * Don't install backup files in the doc directory, only one gcc-4.1 ++ upgrade was broken. Closes: #389366. ++ * Merge gcc-biarch-generic.dpatch into i386-biarch.dpatch. ++ * Update link-libs.dpatch. ++ * Merge libgfortran2-dev into gfortran-4.2. ++ ++ -- Matthias Klose Tue, 3 Oct 2006 16:26:38 +0000 ++ ++gcc-4.2 (4.2-20060923-1) experimental; urgency=low ++ ++ * Update to SVN 20060923. ++ * Remove patches applied upstream: kbsd-gnu-java, kbsd-gnu. ++ ++ -- Matthias Klose Sat, 23 Sep 2006 15:11:36 +0200 ++ ++gcc-4.2 (4.2-20060905-1) experimental; urgency=low ++ ++ * Update to SVN 20060905. ++ * Merge changes from gcc-4.1 (4.1.1-10 - 4.1.1-12). ++ * Move gomp development files into gcc and gfortran. ++ * Build-depend on binutils (>= 2.17). ++ ++ -- Matthias Klose Tue, 5 Sep 2006 03:33:00 +0200 ++ ++gcc-4.2 (4.2-20060818-1) experimental; urgency=low ++ ++ * Update to SVN 20060818. ++ - libjava-libgcjbc.dpatch: Remove, applied upstream. ++ * Merge changes from the Ubuntu gcj-4.2 package: ++ - libjava-soname.dpatch: Remove, applied upstream. ++ - libjava-native-libdir.dpatch: update. ++ - libffi-without-libgcj.dpatch: Remove, new libffi-configure to ++ enable --disable-libffi. ++ - Changes required for the classpath-0.92 update: ++ - New packages gappletviewer-4.2, gcjwebplugin-4.2. ++ - gij-4.2: Add keytool alternative. ++ - gcj-4.2: Add jarsigner alternative. ++ - libgcj8-dev: Remove conflicts with older libgcjX-dev packages. ++ - lib32gcj8: Populate the /usr/lib32/gcj-4.2 directory. ++ - libjava-library-path.dpatch: ++ - When running the i386 binaries on amd64, look in ++ /usr/lib32/gcj-x.y and /usr/lib32/jni instead. ++ - Add /usr/lib/jni to java.library.path. Adresses: #364820. ++ - Add more debugging symbols to libgcj8-dbg. Adresses: #383705. ++ - Fix and renable the biarch build for sparc. ++ * Disable gnat for alpha, fails to build. ++ * Configure without --enable-objc-gc, fails to build. ++ ++ -- Matthias Klose Sat, 19 Aug 2006 18:25:50 +0200 ++ ++gcc-4.2 (4.2-20060709-1) experimental; urgency=low ++ ++ * Test build, SVN trunk 20060709. ++ * Merge libssp0-dev into gcc-4.1 (-fstack-protector is a common option). ++ * Rename libmudflap0-dev to libmudflap0-4.2-dev. ++ * Ignore compiler warnings when checking whether compiler driver understands ++ Ada fails. ++ * Merge changes from the gcc-4.1 package. ++ ++ -- Matthias Klose Sun, 9 Jul 2006 14:28:03 +0200 ++ ++gcc-4.2 (4.2-20060617-1) experimental; urgency=low ++ ++ * Test build, SVN trunk 20060617. ++ ++ [Matthias Klose] ++ * Configure using --enable-objc-gc, using the internal boehm-gc. ++ * Build-depend on bison (>= 1:2.3). ++ * Build the QT based awt peer library, not yet the same functionality ++ as the GTK based peer library. ++ * Update libjava-* patches. ++ ++ [Ludovic Brenta] ++ * Do not provide the symbolic link /usr/bin/gnatgcc; this will now ++ be provided by package gnat from the source package gcc-defaults. ++ * debian/control.m4, debian/control (gnat): conflict with gnat (<< 4.1), ++ not all versions of gnat, since gcc-defaults will now provide gnat (= 4.1) ++ which depends on gnat-4.1. ++ ++ [Bastian Blank] ++ * Make it possible to overwrite arch per DEB_TARGET_ARCH and ++ DEB_TARGET_GNU_TYPE. ++ * Disable biarch only on request for cross builds. ++ * Use correct source directory for tarballs. ++ * Produce correct multiarch.inc for source builds. ++ ++ -- Matthias Klose Sat, 17 Jun 2006 19:02:01 +0200 ++ ++gcc-4.2 (4.2-20060606-1) experimental; urgency=low ++ ++ * Test build, SVN trunk 20060606. ++ * Remove obsolete patches, update patches for 4.2. ++ * Update the biarch-include patches to work with mips-triarch. ++ * Disable Ada, not yet updated. ++ * New packages: libgomp*. ++ * Remove fastjar, not included upstream anymore. ++ ++ -- Matthias Klose Tue, 6 Jun 2006 10:52:28 +0200 ++ ++gcc-4.1 (4.1.2-12) unstable; urgency=high ++ ++ * i386-biarch.dpatch: Update for the backport for PR target/31868. ++ Closes: #427185. ++ * m68k-libffi2.dpatch: Update. Closes: #425399. ++ ++ -- Matthias Klose Mon, 4 Jun 2007 23:53:23 +0200 ++ ++gcc-4.1 (4.1.2-11) unstable; urgency=low ++ ++ * Update to SVN 20070601. ++ * Build the libmudflap0-dev package again. ++ * Don't build libffi, when the packages are not built. ++ ++ -- Matthias Klose Fri, 1 Jun 2007 23:55:22 +0200 ++ ++gcc-4.1 (4.1.2-10) unstable; urgency=low ++ ++ * Regenerate the control file. ++ ++ -- Matthias Klose Wed, 30 May 2007 00:29:29 +0200 ++ ++gcc-4.1 (4.1.2-9) unstable; urgency=low ++ ++ * Update to SVN 20070528. ++ * Don't build packages now built from the gcc-4.2 source (arm, m68k, ++ mips, mipsel). ++ * Add backport for PR middle-end/20218. ++ * Add backport for PR target/31868. ++ ++ -- Matthias Klose Tue, 29 May 2007 00:01:12 +0200 ++ ++gcc-4.1 (4.1.2-8) unstable; urgency=low ++ ++ * Update to SVN 20070518. ++ * Don't build packages now built from the gcc-4.2 source. ++ ++ [ Aurelian Jarno ] ++ * Update libffi patch for ARM. Closes: #425011. ++ * arm-pr30486, arm-pr28516, arm-unbreak-eabi-armv4t: New. ++ * Disable FFI, Java, ObjC for armel. ++ ++ -- Matthias Klose Sun, 20 May 2007 10:31:24 +0200 ++ ++gcc-4.1 (4.1.2-7) unstable; urgency=low ++ ++ * Update to SVN 20070514. ++ * Link using --hash-style=both on supported architectures. Addresses: #421790. ++ * On hppa, build ecjx as a native binary. ++ * note-gnu-stack.dpatch: Fix ARM comment marker (Daniel Jacobowitz). ++ Closes: #422978. ++ * Add build dependency on libxul-dev for *-freebsd. Closes: #422995. ++ * Update config.guess/config.sub and build gcjwebplugin on GNU/kFreeBSD ++ (Aurelian Jarno). Closes: #422995. ++ * Disable ssp on hurd-i386. Closes: #423757. ++ ++ -- Matthias Klose Mon, 14 May 2007 08:40:08 +0200 ++ ++gcc-4.1 (4.1.2-6) unstable; urgency=low ++ ++ * Update libjava from the gcc-4.1 Fedora branch 20070504. ++ * gfortran-4.1: Fix the target of the libgfortran.so symlink. ++ Closes: #421362. ++ * Build-depend on gcc-multilib [amd64 i386 powerpc ppc64 s390 sparc]. ++ * Readd build dependency on binutils on arm. ++ * (Build-) depend on glibc (>= 2.5) for all architectures. ++ * Remove libssp packages from the control file. ++ * Fix wrong code generation on hppa when TLS variables are used. ++ Closes: #422421. ++ ++ -- Matthias Klose Sun, 6 May 2007 10:00:23 +0200 ++ ++gcc-4.1 (4.1.2-5) unstable; urgency=low ++ ++ * Update to SVN 20070429. ++ * Update libjava from the gcc-4.1 Fedora branch 20070428. ++ * Update m68k patches: ++ - Remove pr25514, pr27736, applied upstream. ++ - Update m68k-java. ++ * Link using --hash-style=gnu/both. ++ * Tighten (build) dependency on binutils. Closes: #421197. ++ * gij-4.1: Add a conflict with java-gcj-compat (<< 1.0.69). ++ * gfortran-4.1: Depend on libgfortran1, provide the libgfortran.so ++ symlink. Closes: #421362. ++ * gcc-4.1, gcc-4.1-multilib: Fix compatibility symlinks. Closes: #421382. ++ * Temporarily remove build dependency on locales on arm, hppa, m68k, mipsel. ++ * Temporarily remove build dependency on binutils on arm. ++ * Fix FTBFS on GNU/kFreeBSD (Aurelian Jarno). Closes: #421423. ++ * gij-4.1 postinst: Create /var/lib/gcj-4.1. Closes: #421526. ++ ++ -- Matthias Klose Mon, 30 Apr 2007 08:13:32 +0200 ++ ++gcc-4.1 (4.1.2-4) unstable; urgency=medium ++ ++ * Update to SVN 20070423. ++ - Remove pr11953, applied upstream. ++ - Fix ld version detection in libstdc++v3. ++ * Update libjava from the gcc-4.1 Fedora branch 20070423. ++ * Merge libgfortran1-dev into gfortran-4.1. ++ * Add multilib packages for gcc, g++, gobjc, gobjc++, gfortran. ++ * Don't link using --hash-style=gnu/both; loosen dependency on binutils. ++ * Don't revert the patch to fix PR c++/27227. ++ ++ -- Matthias Klose Mon, 23 Apr 2007 23:13:14 +0200 ++ ++gcc-4.1 (4.1.2-3) experimental; urgency=low ++ ++ * Update to SVN 20070405. ++ * Update libjava from the gcc-4.1 Fedora branch 20070405. ++ * Robustify setting of make's -j flag. Closes: #414316. ++ * Only build the libssp packages, when building the common libraries. ++ * gcc-4.1-hppa64: Don't depend on libc6-dev. ++ ++ -- Matthias Klose Fri, 6 Apr 2007 00:28:29 +0200 ++ ++gcc-4.1 (4.1.2-2) experimental; urgency=low ++ ++ * Update to SVN 20070306. ++ * Update libjava from the gcc-4.1 Fedora branch 20070306. ++ ++ [Matthias Klose] ++ * Don't install gij-wrapper anymore, directly register gij as a java ++ alternative. ++ * Don't install gcjh-wrapper anymore. ++ * Don't use exact versioned dependencies on gcj-base for libgcj and ++ libgcj-awt. ++ * Fix glibc build dependency for alpha. ++ * Support -ffast-math on hurd-i386 (Samuel Thibault). Closes: #413342. ++ * Update kfreebsd-amd64 patches (Aurelien Jarno). Closes: #406015. ++ * gij: Consistently use $(dbexecdir) to reference the gcj sub dir. ++ * Install into /usr/lib/gcc//4.1, to ease upgrades ++ between minor versions. ++ Add compatibility symlinks in /4.1.2 to build gnat-4.1 ++ and gcj-4.1 from separate sources. ++ ++ -- Matthias Klose Wed, 7 Mar 2007 03:51:47 +0100 ++ ++gcc-4.1 (4.1.2-1) experimental; urgency=low ++ ++ [Matthias Klose] ++ * Update to gcc-4.1.2. ++ * Update libjava backport patches, split out boehm-gc-backport patch. ++ * Enable the cpu-default-generic patch (i386, amd64), backport from 4.2. ++ * Correct mfctl instruction syntax (hppa), backport from the trunk. ++ * Backport PR java/9861 (name mangling updates). ++ * gcc.c (main): Call expandargv (backport from 4.2). ++ * Apply gcc dwarf2 unwinding patches from the trunk. ++ * Apply backport for PR 20208 on amd64 i386 powerpc ppc64 sparc s390. ++ * Apply patches from the 4.1 branch for PR rtl-optimization/28772, ++ PR middle-end/30313, PR middle-end/30473, PR c++/30536, PR debug/30189, ++ PR fortran/30478, PR rtl-optimization/30787, PR tree-optimization/30823, ++ PR rtl-optimization/28173, PR ada/30684, bug in pointer dependency test, ++ PR rtl-optimization/30931, PR fortran/25392, PR fortran/30400, ++ PR libgfortran/30910, PR libgfortran/30918, PR fortran/29441, ++ PR target/30634. ++ * Update NEWS files. ++ * Include a backport of the ecj+generics java updates as ++ gcj-ecj-20070215.tar.bz2. Install it into the gcc-4.1-source package. ++ * Do not build fastjar anymore from this source. ++ * debian/control.m4: Move expect-tcl8.3 before dejagnu. ++ * Work around firefox/icewhatever dropping plugin dependencies on xpcom. ++ * Refactor naming of libgcj packages in the build files. ++ * Make libstdc++-doc's build dependencies depending on the source package. ++ * Do not build packages on architectures, which are already built by gcc-4.2. ++ ++ * Merge the gcj generics backport from Ubuntu: ++ ++ - Merge the Java bits (eclipse based compiler, 1.5 compatibility, ++ classpath generics) from the gcc-4.1 Fedora branch. ++ - Drop all previous patches from the classpath-0.93 merge, keep ++ the boehm-gc backport (splitted out as a separate patch). ++ - Add a gcj-ecj-generics.tar.bz2 tarball, containing gcc/java, libjava, ++ config/unwind_ipinfo.m4, taken from the Fedora branch. ++ - Drop the libjava-hppa, libjava-plugin-binary, pr29362, pr29805 patches ++ integrated in the backport. ++ - Update patches for the merge: reporting, libjava-subdir, i386-biarch, ++ classpath-tooldoc, pr26885 ++ - Add libjava-dropped, libjava-install; dropped chunks from the merge. ++ - Add pr9861-nojava mangling changes, non-java parts for PR 9861. ++ - Add gcc-expandv, expand `@' parameters on the commandline; backport ++ from the trunk. ++ - Disable the m68k-gc patch, needs update for the merge. ++ - Configure --with-java-home set for 1.5.0. ++ - Configure with --enable-java-maintainer-mode to build the header ++ and class files on the fly. ++ - Add build dependency on ecj-bootstrap, configure --with-ecj-jar. ++ - Build an empty libgcj-doc package; gjdoc currently cannot handle ++ generics. ++ - Apply gcc dwarf2 unwinding patches from the trunk, allowing the Events ++ testcase to pass. ++ - Tighten dependencies on shared libraries. ++ - Use /usr/lib/gcj-4-1-71 as private gcj subdir. ++ - Bump the libgcj soversion to 71, rename the libgcj7-0 package ++ to libgcj7-1, rename the libgcj7-awt package to libgcj7-1-awt. ++ - gij-4.1: Add and provide alternatives for gorbd, grmid, gserialver. ++ - gcj-4.1: Remove gcjh, gcjh-wrapper, gjnih. ++ - gcj-4.1: Add and provide alternatives for jar, javah, native2ascii, ++ tnameserv. ++ - gcj-4.1: Add dependency on ecj-bootstrap, recommend fastjar, ++ ecj-bootstrap-gcj. ++ - Add build dependency on ecj-bootstrap version providing the GCCMain ++ class. ++ - libgcj7-1: Recommend libgcj7-1-awt. ++ - Add build dependency on libmagic-dev. ++ - Build-depend on gcj-4.1; build our own ecj1 and gjdoc before ++ starting the build. ++ - Make ecj1 available when running the testsuite. ++ - Fix build failure on sparc-linux. ++ - Fix gjavah compatibility problems (PR cp-tools/3070[67]). ++ - Fixed driver issue source files (PR driver/30714). ++ - Add (rudimentary) manual pages for classpath tools. ++ ++ [Kevin Brown] ++ * debian/control.m4, debian/rules.d/binary-ada.mk: provide new packages ++ containing debugging symbols for Ada libraries: libgnat-4.1-dbg, ++ libgnatprj4.1-dbg, and libgnatvsn4.1-dbg. Adresses: #401385. ++ ++ -- Matthias Klose Sat, 3 Mar 2007 23:12:08 +0100 ++ ++gcc-4.1 (4.1.1ds2-30) experimental; urgency=low ++ ++ * Update to SVN 20070106. ++ * Do not revert the fixes for PR 25878, PR 29138, PR 29408. ++ * Don't build the packages built by gcc-4.2 source. ++ * debian/patches/note-gnu-stack.dpatch: Add .note.GNU-stack sections ++ for gcc's crt files, libffi and boehm-gc. Taken from FC. Closes: #382741. ++ * Merge from Ubuntu: ++ - Backport g++ visibility patches from the FC gcc-4_1-branch. ++ - Update the long-double patches; require glibc-2.4 as a build dependency ++ on alpha, powerpc, sparc, s390. Bump the shlibs dependencies to ++ require 4.1.1-21. ++ - On powerpc-linux configure using --enable-secureplt. Closes: #382748. ++ - When using the cpu-default-generic patch, build for generic x86-64 ++ on amd64 and i386 biarch. ++ - Link using --hash-style=both (alpha, amd64, ia64, i386, powerpc, ppc64, ++ s390, sparc). ++ * gij-4.1: Recommends libgcj7-awt instead of suggesting it. Closes: #394917. ++ * Split the gcc-long-double patch into a code and doc part. ++ * Set priority of development packages to optional. ++ * Add support for kfreebsd-amd64 (Aurelian Jarno). Closes: #406015. ++ ++ -- Matthias Klose Sat, 6 Jan 2007 10:35:42 +0100 ++ ++gcc-4.1 (4.1.1ds2-22) unstable; urgency=high ++ ++ * Enable -pthread for GNU/Hurd (Michael Banck). Closes: #400031. ++ * Update the m68k-fpcompare patch (Roman Zippel). Closes: #401585. ++ ++ -- Matthias Klose Sun, 10 Dec 2006 12:35:06 +0100 ++ ++gcc-4.1 (4.1.1ds2-20) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20061115. ++ - Fix PR tree-optimization/27891, ICE in tree_split_edge. ++ Closes: #370248, #391657, #394630. ++ - Fix PR tree-optimization/9814, duplicate of PR tree-optimization/29797. ++ Closes: #181096. ++ * Apply the libjava/net backport from the redhat/gcc-4_1-branch. ++ * Apply proposed patch for PR java/29805. ++ ++ [Roman Zippel] ++ * Build the ObjC and ObjC++ compilers in cross builds. ++ * debian/patches/m68k-symbolic-operand.dpatch: Better recognize ++ symbolic operands in addresses. ++ * debian/patches/m68k-bitfield-offset.dpatch: Only use constant offset ++ for register bitfields (combine expects shifts, but does a rotate). ++ * debian/patches/m68k-bitfield-offset.dpatch: Update and apply. ++ ++ [Daniel Jacobowitz] ++ * Don't try to use _Unwind_Backtrace on SJLJ targets. ++ See bug #387875, #388505, GCC PR 29206. ++ ++ -- Matthias Klose Wed, 15 Nov 2006 08:59:53 -0800 ++ ++gcc-4.1 (4.1.1ds2-19) unstable; urgency=low ++ ++ * Fix typo in arm-pragma-pack.dpatch. ++ ++ -- Matthias Klose Sat, 28 Oct 2006 11:04:00 +0200 ++ ++gcc-4.1 (4.1.1ds2-18) unstable; urgency=medium ++ ++ [Matthias Klose] ++ * Update to SVN 20061028. ++ * Fix #pragma pack on ARM (Paul Brook). Closes: #394703. ++ * Revert PR c++/29138, PR c++/29408. Closes: #392559. ++ * Revert PR c++/25878. Addresses: #387989. ++ * fastjar: Provide jar. Closes: #395397. ++ ++ [Ludovic Brenta] ++ * debian/control.m4 (libgnatprj-dev): depend on libgnatvsn-dev. ++ debian/gnatprj.gpr: with gnatvsn.gpr. Closes: #395000. ++ ++ -- Matthias Klose Thu, 26 Oct 2006 23:51:10 +0200 ++ ++gcc-4.1 (4.1.1ds2-17) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20061020. ++ - Fix PR debug/26881, ICE in dwarf2out_finish. Closes: #377613. ++ - Fix PR PR c++/29408, parse error for valid code. Closes: #392327, #393010. ++ - Fix PR c++/29435, segfault with sizeof and templates. Closes: #393071. ++ - Fix PR target/29338, segfault with -finline-limit on arm. Closes: 390620. ++ - Fix 3.4/4.0 backwards compatibility problem in libstdc++. ++ * Fix PR classpath/29362, taken from the redhat/gcc-4_1-branch. ++ * Remove the INSTALL directory from the source tarball. Closes: #392974. ++ * Disable building the static libgcj; non-functional, and cutting ++ down build times. ++ * libgcj7-0: Tighten dependency on libgcj-common. ++ * libgcj7-dev: Install .pc file as libgcj-4.1.pc. ++ * README.cross: Updated (Hector Oron). Addresses: #380251. ++ * config-ml.dpatch: Use *-linux-gnu as *_GNU_TYPE. Closes: #394034. ++ ++ [Nikita V. Youshchenko] ++ * Fix typo in the cross build scripts. Closes: #391445. ++ ++ [Falk Hueffner] ++ * alpha-no-ev4-directive.dpatch: Fix kernel build failure. ++ ++ [Roman Zippel] ++ * debian/patches/m68k-align-code.dpatch: Use "move.l %a4,%a4" to advance ++ within code. ++ * debian/patches/m68k-align-stack.dpatch: Try to keep the stack word aligned. ++ * debian/patches/m68k-dwarf3.dpatch: Emit correct dwarf info for cfa offset ++ and register with -fomit-frame-pointer. ++ * debian/patches/m68k-fpcompare.dpatch: Bring fp compare early to its ++ desired form to relieve reload. Closes: #390879. ++ * debian/patches/m68k-prevent-swap.dpatch: Don't swap operands ++ during reloads. ++ * debian/patches/m68k-reg-inc.dpatch: Reinsert REG_INC notes after splitting ++ an instruction. ++ * debian/patches/m68k-secondary-addr-reload.dpatch: Add secondary reloads ++ to allow reload to get byte values into addr regs. Closes: #385327. ++ * debian/patches/m68k-symbolic-operand.dpatch: Better recognize symbolic ++ operands in addresses. ++ * debian/patches/m68k-limit_reload.dpatch: Remove, superseded by ++ m68k-secondary-addr-reload.dpatch. ++ * debian/patches/m68k-notice-move.dpatch: Apply, was checked in in -16. ++ * debian/patches/m68k-autoinc.dpatch: Updated, don't attempt to increment ++ the register, if it's used multiple times in the instruction . ++ ++ -- Matthias Klose Sat, 21 Oct 2006 00:25:05 +0200 ++ ++gcc-4.1 (4.1.1ds1-16) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20061008. ++ - Fix PR c++/29226, ICE in make_decl_rtl. Closes: #388263. ++ * libgcj7-0: Fix package removal. Closes: #390874. ++ * Configure with --disable-libssp on architectures that don't ++ support it (alpha, hppa, ia64, m68k, mips, mipsel). ++ * On hppa, remove build-dependency on dash. ++ * gij/gcj: Do not install slave links for the non DFSG manpages. ++ Closes: #390425, #390532. ++ * libgcj-common: rebuild-gcj-db: Don't do anything, if no classmap ++ files are found. Closes: #390966. ++ * Fix PR libstdc++/11953, extended for all linux architectures. ++ Closes: #391268. ++ * libffi4-dev: Conflict with libffi. Closes: #387561. ++ * Backport PR target/27880 to the gcc-4_1-branch. Patch by Steve Ellcey. ++ Closes: #390693. ++ * On ia64, don't use _Unwind_GetIPInfo in libjava and libstdc++. ++ * Add a README.ssp with minimal documentation about stack smashing ++ protection. Closes: #366094. ++ * Do not build libgcj-common from the gcc-4.1/gcj-4.1 sources anymore. ++ ++ [Roman Zippel] ++ * debian/patches/m68k-notice-move.dpatch: Don't set cc_status ++ for fp move without fp register. ++ ++ -- Matthias Klose Sun, 8 Oct 2006 02:21:49 +0200 ++ ++gcc-4.1 (4.1.1ds1-15) unstable; urgency=medium ++ ++ * Update to SVN 20060927. ++ - Fix PR debug/29132, exception handling on mips. Closes: #389468, #390042. ++ - Fix typo in gcc documentation. Closes: #386180. ++ - Fix PR target/29230, wrong code generation on arm. Closes: #385505. ++ * libgcj-common: Ignore exit value of gcj-dbtool in rebuild-gcj-db on ++ arm, m68k, hppa. Adresses: #388505. ++ * libgcj-common: Replaces java-gcj-compat-dev and java-gcj-compat. ++ Closes: #389539. ++ * libgcj-common: /usr/share/gcj/debian_defaults: Define gcj_native_archs. ++ * Update the java backport from the redhat/gcc-4_1-branch upto 2006-09-27; ++ remove libjava-str2double.dpatch, pr28661.dpatch. ++ * Disable ssp on hppa, not supported. ++ * i386-biarch.dpatch: Avoid warnings about macro redefinitions. ++ ++ -- Matthias Klose Fri, 29 Sep 2006 22:32:41 +0200 ++ ++gcc-4.1 (4.1.1ds1-14) unstable; urgency=medium ++ ++ [Matthias Klose] ++ * Update to SVN 20060920. ++ - Fix PR c++/26957. Closes: #373257, #386910. ++ - Fix PR rtl-optimization/28243. Closes: #378325. ++ * Remove patch for PR rtl-optimization/28634, applied upstream. ++ * Fix FTBFS on GNU/kFreeBSD (fallout from the backport of classpath-0.92). ++ (Petr Salinger). Closes: #385974. ++ * Merge from Ubuntu: ++ - Do not encode the subminor version in the jar files. ++ - Fix typo for the versioned gcj subdirectory in lib32gcj-0. ++ - When running the i386 binaries on amd64, adjust the properties ++ java.home, gnu.classpath.home.url, sun.boot.class.path, ++ gnu.gcj.precompiled.db.path. ++ - Configure the 32bit build on amd64 ++ --with-java-home=/usr/lib32/jvm/java-1.4.2-gcj-4.1-1.4.2.0/jre. ++ - Configure --with-long-double-128 for glibc-2.4 on alpha, powerpc, ppc64, ++ s390, s390x, sparc, sparc64. ++ - Update the java backport from the redhat/gcc-4_1-branch upto 2006-09-20. ++ - Fix PR java/29013, invalid byte code generation. Closes: #386926. ++ - debian/patches/gcc-pfrs-2.dpatch: Apply a fix for a regression in the ++ backport of PR 28946 from the trunk (H.J. Lu). ++ * Backport PR classpath/28661 from the trunk. ++ * Don't ship the .la files for the java modules. Closes: #386228. ++ * gcj-4.1: Remove dangling symlink. Closes: #386430. ++ * gij: Suggest java-gcj-compat, gcj: Suggest java-gcj-compat-dev. ++ Closes: #361942. ++ * Fix infinite loop in string-to-double conversion on 64bit targets. ++ Closes: #348792. ++ * gij-4.1: Ignore exit value of gcj-dbtool in postinst. Adresses: #388505. ++ * libgcj-common: Move rebuild-gcj-db from java-gcj-compat into libgcj-common. ++ * On hppa, install a wrapper around gij-4.1 to ignore unaligned memory ++ accesses. Works around buildd configurations enabling this check by ++ default. Addresses: #364819. ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-libgnatprj.dpatch: Build mlib-tgt-linux.adb instead of ++ mlib-tgt.adb. Closes: #387826. ++ * debian/patches/ada-pr15802.dpatch: Backport from the trunk. ++ Closes: #246384. ++ * debian/control.m4 (gnat-4.1): do not provide gnat (supplied by ++ gcc-defaults instead); conflict with gnat-4.2 which will soon be in ++ unstable. ++ ++ [Roman Zippel] ++ * debian/patches/m68k-dwarf2.dpatch: Recognize stack adjustments also ++ in the src of an instruction. ++ * debian/patches/m68k-jumptable.dpatch: Don't force byte offset when ++ accessing the jumptable, gas can generate the correct offset size instead. ++ * debian/patches/m68k-peephole.dpatch: Convert some text peepholes to rtl ++ peepholes, so the correct DWARF2 information can be generated for stack ++ manipulations (Keep a few peepholes temporarily disabled). ++ * debian/patches/m68k-peephole-note.dpatch: Don't choke on notes while ++ reinserting REG_EH_REGION notes. ++ * debian/patches/m68k-return.dpatch: Don't use single return if fp register ++ have to be restored. Closes: #386864. ++ * debian/patches/m68k-sig-unwind.dpatch: Add support for unwinding over ++ signal frames. ++ * Fix PR rtl-optimization/27736, backport from the trunk. ++ * Add java support for m68k. Closes: #312830, #340874, #381022. ++ ++ -- Matthias Klose Sun, 24 Sep 2006 19:36:31 +0200 ++ ++gcc-4.1 (4.1.1ds1-13) unstable; urgency=medium ++ ++ * Update to SVN 20060901; remove patches applied upstream: ++ - PR target/24367. ++ - PR c++/26670. ++ * Apply proposed patch for PR fortran/28908. ++ * Fix biarch symlinks in lib64stdc++ for cross builds. ++ * Fix biarch symlinks in lib32objc on amd64. ++ ++ -- Matthias Klose Fri, 1 Sep 2006 00:04:05 +0200 ++ ++gcc-4.1 (4.1.1ds1-12) unstable; urgency=medium ++ ++ [Matthias Klose] ++ * Update to SVN 20060830. ++ * Add backport of PR other/26208, bump libgcc1 shlibs dependency. ++ * Add backport of PR c++/26670. Closes: #356548. ++ * Apply proposed patch for PR target/24367 (s390). ++ * Add /usr/lib/jni to the libjava dlsearch path. Closes: #364820. ++ * Build without GFDL licensed docs. Closes: #384036. ++ - debian/patches/{svn-doc-updates,pr25524-doc,pr26885-doc}.dpatch: ++ Split out -doc specific patches. ++ - debian/*.texi, debian/porting.html: Add dummy documentation. ++ - debian/rules.unpack, debian/rules.patch: Update for non-gfdl build. ++ - fastjar.texi: Directly define the gcctabopt and gccoptlist macros. ++ ++ * Merge from Ubuntu: ++ - Backport the classpath-0.92, libjava, gcc/java merge from the ++ redhat/gcc-4_1-branch branch. ++ - Apply the proposed patch for PR libgcj/28698. ++ - Change the libgcj/libgij sonames. Rename libgcj7 to libgcj7-0. ++ - Do not remove the rpath from libjvm.so and libjawt.so. Some ++ configure scripts rely on being able to link that libraries ++ directly. ++ - When running the i386 binaries on amd64, look in ++ /usr/lib32/gcj-x.y and /usr/lib32/jni instead. ++ - Add /usr/lib/jni to java.library.path. Closes: #364820. ++ - Add debugging symbols for more binary packages to libgcj7-dbg. ++ Closes: #383705. ++ - libgcj7-dev: Remove conflicts with older libgcjX-dev packages. ++ - Do not build the libgcj-bc and lib32gcj-bc packages anymore from ++ the gcj-4.1 source. ++ ++ [Roman Zippel] ++ * debian/patches/m68k-limit_reload.dpatch: Correctly limit reload class. ++ Closes: #375522. ++ * debian/patches/m68k-split_shift.dpatch: Use correct predicates for long long ++ shifts and use more splits. Closes: #381572. ++ * debian/patches/m68k-prevent-qipush.dpatch: Prevent combine from creating ++ a byte push on the stack (invalid on m68k). Closes: #385021. ++ * debian/patches/m68k-autoinc.dpatch: Recognize a few more autoinc possibilities. ++ * debian/patches/pr25514.dpatch: Backport from the trunk. ++ * debian/patches/m68k-gc.dpatch: Change STACKBOTTOM to LINUX_STACKBOTTOM ++ so it works with 2.6 kernels. ++ * Other m68k bug reports fixed in 4.1.1-11 and 4.1.1-12: ++ Closes: #378599, #345574, #344041, #323426, #340293. ++ * Build the stage1 compiler using -g -O2; saves a few hours build time ++ and apparently is working at the moment. ++ ++ -- Matthias Klose Tue, 29 Aug 2006 21:37:28 +0200 ++ ++gcc-4.1 (4.1.1-11) unstable; urgency=low ++ ++ * The "Our priority are our users, remove the documentation!" release. ++ ++ [Matthias Klose] ++ * Fix build failure building the hppa->hppa64 cross compiler. ++ * Update to SVN 20060814. ++ - Fix directory traversal vulnerability in fastjar. Closes: #368397. ++ CVE-2006-3619. ++ - Fix PR rtl-optimization/23454, ICE in invert_exp_1 on sparc. ++ Closes: #321215. ++ - Fix PR c++/26757, C++ front-end producing two DECLs with the same UID. ++ Closes: #356569. ++ * Remove patch for PR rtl-optimization/28075, applied upstream. ++ * Apply proposed patch for PR rtl-optimization/28634, rounding problem with ++ -fdelayed-branch on hppa/mips. Closes: #381710. ++ * Fixed at least in 4.1.1-10: boost::date_time build failure. ++ Closes: #382352. ++ * Build-depend on make (>= 3.81), add make (>= 3.81) as dependency to ++ gcc-4.1-source. Closes: #381117. ++ * Backport of libffi from the trunk; needed for the java backport in ++ experimental. ++ * libffi4-dev: Install the libffi_convenience library as libffi_pic.a. ++ * When building a package without the GFDL'd documentation, don't create ++ the alternative's slave links for manual pages for the java tools. ++ * Do not build the -doc packages and derived manual pages licensed under ++ the GFDL with invariant sections or cover texts. ++ * Only build the libssp package, if the target libc doesn't provide ++ ssp support. ++ * Run the complete testsuite, when building a standalone gcj package. ++ ++ [Roman Zippel] ++ * debian/patches/m68k-fjump.dpatch: ++ Always use as fjcc pseudo op, we rely heavily on as to generate the ++ right size for the jump instructions. Closes: #359281. ++ * debian/patches/m68k-gc.dpatch: ++ The thread suspend handler has to save all registers. ++ Reenable MPROTECT_VDB, it should work, otherwise it's probably a kernel bug. ++ * debian/patches/m68k-save_pic.dpatch: ++ Correctly save the pic register, when not done by reload(). ++ (fixes _Unwind_RaiseException and thus exception handling). ++ * debian/patches/m68k-libffi.dpatch: Add support for closures. ++ * debian/patches/m68k-bitfield.dpatch: Avoid propagation of mem expression ++ past a zero_extract lvalue. ++ * debian/patches/m68k-dwarf.dpatch: Correct the dwarf frame information, ++ but preserve compatibility. ++ ++ [Christian Aichinger] ++ * Fix building a cross compiler targeted for ia64. Closes: #382627. ++ ++ -- Matthias Klose Tue, 15 Aug 2006 00:41:00 +0200 ++ ++gcc-4.1 (4.1.1-10) unstable; urgency=low ++ ++ * Update to SVN 20060729. ++ - Fix PR c++/28225, segfault in type_dependent_expression_p. ++ Closes: #376148. ++ * Apply proposed patch for PR rtl-optimization/28075. ++ Closes: #373820. ++ * Apply proposed backport and proposed patch for PR rtl-optimization/28221. ++ Closes: #376084. ++ * libgcj7-jar: Loosen dependency on gcj-4.1-base. ++ * Add ssp header files to the private gcc includedir. ++ * Do not build the Ada packages from the gcc-4.1 source, introducing ++ a new gnat-4.1 source package. ++ * Build libgnat on alpha and s390 as well. ++ * Do not build the gnat-4.1-doc package (GFDL with invariant sections or ++ cover texts). ++ * Remove references to the stl-manual package. Closes: #378698. ++ ++ -- Matthias Klose Sat, 29 Jul 2006 22:08:59 +0200 ++ ++gcc-4.1 (4.1.1-9) unstable; urgency=low ++ ++ * Update to SVN 20060715. ++ - Fix PR c++/28016, do not emit uninstantiated static data members. ++ Closes: #373895, #376871. ++ * Revert the patch to fix PR c++/27227. Closes: #378321. ++ * multiarch-include.dpatch: Renamed from biarch-include.dpatch; ++ apply for all architectures. ++ * Do not build the java compiler in gcc-4.1 package, just include the ++ options and specs in the gcc driver. ++ * Remove gnat-4.0 as an alternative build dependency. ++ * Add a patch to enable -fstack-protector by default for C, C++, ObjC, ObjC++. ++ The patch is disabled by default. ++ ++ -- Matthias Klose Sat, 15 Jul 2006 17:07:29 +0200 ++ ++gcc-4.1 (4.1.1-8) unstable; urgency=medium ++ ++ * Update to SVN 20060708. ++ - Fix typo in gcov documentation. Closes: #375140. ++ - Fix typo in gccint documentation. Closes: #376412. ++ - [alpha], Fix -fvisibility-inlines-hidden segfaults on reference to ++ static method. PR target/27082. Closes: #369642. ++ ++ * Fix ppc64 architecture string in debian/multiarch.inc. Closes: #374535. ++ * Fix conflict, replace and provide libssp0-dev for cross compilers. ++ Closes: #377012. ++ * Ignore compiler warnings when checking whether compiler driver understands ++ Ada fails. Closes: #376660. ++ * Backport fix for PR libmudflap/26864 from the trunk. Closes: #26864. ++ * README.C++: Remove non-existing URL. Closes: #347601. ++ * gij-4.1: Provide java2-runtime. Closes: #360906. ++ ++ * Closed reports reported against gcc-3.0 and fixed in gcc-4.1: ++ - C++ ++ + PR libstdc++/13943, call of overloaded `llabs(int)' is ambiguous. ++ Closes: #228645. ++ - Java ++ + Fixed segmentation fault on compiling bad program. Closes: #165635 ++ * Closed reports reported against gcc-3.3 and fixed in gcc-4.1: ++ - Stack protector available. Closes: #213994, #233208. ++ - Better documentation of -finline-limit option. Closes: #296047. ++ * Closed reports reported against gcc-3.4 and fixed in gcc-4.1: ++ - General ++ + Fixed [unit-at-a-time] Using -O2 cannot detect missing return ++ statement in a function. Closes: #276843. ++ - C++ ++ + PR13943, call of overloaded `llabs(int)' is ambiguous. Closes: #228645. ++ + PR c++/21280, #pragma interface, templates, and "inline function used ++ but never defined". Closes: #364412. ++ - Architecture specific: ++ - m68k ++ + Segfault building glibc. Closes: #353618. ++ + ICE when trying to build boost. Closes: #321486. ++ * Closed reports reported against gcc-4.0 and fixed in gcc-4.1: ++ - General ++ + Handling of #pragma GCC visibility for builtin functions. ++ Closes: #330279. ++ + gettext interpretation the two conditional strings as one. ++ Closes: #227193. ++ + ICE due to if-conversion. Closes: #335078. ++ + Fix unaligned accesses with __attribute__(packed) and memcpy. ++ Closes: #355297. ++ + Fix ICE in expand_expr_real_1, at expr.c. Closes: #369817. ++ - Ada ++ + Link error not finding -laddr2line. Closes: #322849. ++ + ICE on invalid code. Closes: #333564. ++ - C++ ++ + libstdc++: bad thousand separator with fr_FR.UTF-8. Closes: #351786. ++ + The Compiler uses less memory than 4.0. Closes: #336225. ++ + Fix "fails to compare reverse map iterators". Closes: #362840. ++ + Fix "fail to generate code for base destructor defined inline with ++ pragma interface". Closes: #356435. ++ + Fix ICE in cp_expr_size, at cp/cp-objcp-common.c. Closes: #317455. ++ + Fix wrong warning: control may reach end of non-void function. ++ Closes: #319309. ++ + Fix bogus warning "statement has no effect" with template and ++ statement-expression. Closes: #336915. ++ + Fixed segfault on syntax error. Closes: #349087. ++ + Fix ICE with __builtin_constant_p in template argument. ++ Closes: #353366. ++ + Implement DR280 (fixing "no operator!= for const_reverse_iterator"). ++ Closes: #244894. ++ - Fortran ++ + Fix wrong behaviour in unformatted writing. Closes: #369547. ++ - Java ++ + Fixed segfault on -fdump-tree-all-all. Closes: #344265. ++ + Fixed ant code completion in eclipse generating a nullpointer ++ exception. Closes: #337510. ++ + Fixed abort in gnu_java_awt_peer_gtk_GtkImage.c. Closes: #343112. ++ + Fixed assertion failure in gij with rhdb-explain. Closes: #335650. ++ + Fixed assertion failure when calling JTabbedPane.addTab(null, ...). ++ Closes: #314704. ++ + Fixed error when displaying empty window with bound larger than the ++ displayed content. Closes: #324502. ++ + Fixed: Exception in JComboBox.removeAllItems(). Closes: #314706. ++ + Fixed assertian error in gnu_java_awt_peer_gtk_GtkImage.c. ++ Closes: #333733. ++ - libmudflap ++ + PR libmudflap/23170, libmudflap should not use functions marked ++ obsolescent by POSIX/SUS. Closes: #320398. ++ - Architecture specific: ++ - m68k ++ + FTBFS building tin. Closes: #323016. ++ + ICE with -g -fomit-frame-pointer. Closes: #331150. ++ + ICE in instantiate_virtual_regs_lossage. Closes: #333536. ++ + Wrong code generation with loop unrolling. Closes: #342121. ++ + ICEs while building gst-ffmpeg. Closes: #343692. ++ - mips ++ + Fix gjdoc build failure. Closes: #344986. ++ + Fix link failure for static libs and object files when xgot ++ needs to be used. Closes: #274942. ++ * gnat bug reports fixed since gnat-3.15p: ++ - GNAT miscounts UTF8 characters in string with -gnaty. Closes: #66175. ++ - Bug box from "with Text_IO" when compiling optimized. Closes: #243795. ++ - Nonconforming parameter lists not detected. Closes: #243796. ++ - Illegal use clause not detected. Closes: #243797. ++ - Compiler enters infinite loop on illegal program with tagged records. ++ Closes: #243799. ++ - Compiler crashes on illegal program (missing discriminant, unconstrained ++ parent). Closes: #243800. ++ - Bug box at sinfo.adb:1215 on illegal program. Closes: #243801. ++ - Bug box at sinfo.adb:1651 on illegal program. Closes: #243802. ++ - Illegal program not detected (entry families). Closes: #243803. ++ - Illegal program not detected, RM 10.1.1(14). Closes: #243807. ++ - Bug box at exp_ch9.adb:7254 on illegal code. Closes: #243812. ++ - Illegal program not detected, RM 4.1.4(14). Closes: #243816. ++ - Bug box in Gigi, code=116, on legal program. Closes: #244225. ++ - Illegal program not detected, 12.7(10) (generic parameter is visible, ++ shouldn't be). Closes: #244483. ++ - Illegal program not detected, ambiguous aggregate. Closes: #244496. ++ - Bug box at sem_ch3.adb:8003. Closes: #244940. ++ - Bug box in Gigi, code=103, on illegal program. Closes: #244945. ++ - Legal program rejected, overloaded procedures. Closes: #246188. ++ - Bug box in Gigi, code=999, on legal program. Closes: #246388. ++ - Illegal program not detected, RM 10.1.6(3). Closes: #246389. ++ - Illegal program not detected, RM 3.10.2(24). Closes: #247014. ++ - Illegal program not detected, RM 3.9(17). Closes: #247015. ++ - Legal program rejected. Closes: #247016. ++ - Legal program rejected. Closes: #247021. ++ - Illegal program not detected, RM 4.7(3). Closes: #247022. ++ - Illegal program not detected, RM 3.10.2(27). Closes: #247562. ++ - Legal program rejected, "limited type has no stream attributes". ++ Closes: #247563. ++ - Wrong output from legal program. Closes: #247565. ++ - Compiler enters infinite loop on illegal program. Closes: #247567. ++ - Illegal program not detected, RM 8.6(31). Closes: #247568. ++ - Legal program rejected, visible declaration not seen. Closes: #247572. ++ - Illegal program not detected, RM 8.2(9). Closes: #247573. ++ - Wrong output from legal program, dereferencing access all T'Class. ++ Closes: #248171. ++ - Compiler crashes on illegal program, RM 5.2(6). Closes: #248174. ++ - Cannot find generic package body, RM 1.1.3(4). Closes: #248677. ++ - Illegal program not detected, RM 3.4.1(5). Closes: #248679. ++ - Compiler ignores legal override of abstract subprogram. Closes: #248686. ++ - Bug box, Assert_Failure at sinfo.adb:2365 on illegal program. ++ Closes: #251266. ++ - Ada.Numerics.Generic_Elementary_Functions.Log erroneout with -gnatN. ++ Closes: #263498. ++ - Bug box, Assert_Failure at atree.adb:2906 or Gigi abort, code=102 ++ with -gnat -gnatc. Closes: #267788. ++ - Bug box in Gigi, code=116, 'Unrestricted_Access of a protected ++ subprogram. Closes: #269775. ++ - Stack overflow on illegal program, AI-306. Closes: #276225. ++ - Illegal program not detected, RM B.1(24). Closes: #276226. ++ - Wrong code generated with -O -fPIC. Closes: #306833. ++ - Obsolete: bashism's in debian/rules file. Closes: #370681. ++ - Supports more debian architectures. Closes: #171477. ++ ++ -- Matthias Klose Sat, 8 Jul 2006 16:24:47 +0200 ++ ++gcc-4.1 (4.1.1-7) unstable; urgency=low ++ ++ * Prefer gnat-4.1 over gnat-4.0 as a build dependency. ++ * libssp0: Set priority to standard. ++ ++ -- Matthias Klose Sun, 2 Jul 2006 10:22:50 +0000 ++ ++gcc-4.1 (4.1.1-6) unstable; urgency=low ++ ++ [Ludovic Brenta] ++ * Do not provide the symbolic link /usr/bin/gnatgcc; this will now ++ be provided by package gnat from the source package gcc-defaults. ++ * debian/control.m4, debian/control (gnat): conflict with gnat (<< 4.1), ++ not all versions of gnat, since gcc-defaults will now provide gnat (= 4.1) ++ which depends on gnat-4.1. ++ ++ [Matthias Klose] ++ * libjava: Change the default for enable_hash_synchronization_default ++ on PA-RISC. Tighten the libgcj7 shlibs version on hppa. ++ * Update to SVN 20060630. ++ * Apply proposed patch for PR 26991. ++ * Don't use the version for the libstdc++ shlibs dependency for the libgcj ++ shlibs dependency. ++ * Merge from Ubuntu edgy: ++ - Fix %g7 usage in TLS, add patch sparc-g7.dpatch, fixes glibc-2.4 build ++ failure on sparc (Fabio M. Di Nitto). ++ - Merge libssp0-dev into gcc-4.1 (-fstack-protector is a common option). ++ - Run the testsuite with -fstack-protector as well. ++ ++ [Bastian Blank] ++ * Make it possible to overwrite arch per DEB_TARGET_ARCH and DEB_TARGET_GNU_TYPE. ++ * Disable biarch only on request for cross builds. ++ * Use correct source directory for tarballs. ++ * Produce correct multiarch.inc for source builds. ++ ++ -- Matthias Klose Sat, 1 Jul 2006 01:49:55 +0200 ++ ++gcc-4.1 (4.1.1-5) unstable; urgency=low ++ ++ * Fix build error running with dpkg-buildpackage -rsudo. ++ ++ -- Matthias Klose Wed, 14 Jun 2006 01:54:13 +0200 ++ ++gcc-4.1 (4.1.1-4) unstable; urgency=low ++ ++ * Really do not backout the fix for PR c++/26068. ++ Closes: #372152, #372559. ++ * Update fastjar version string to 4.1. ++ * Disable pascal again. ++ ++ -- Matthias Klose Mon, 12 Jun 2006 20:29:57 +0200 ++ ++gcc-4.1 (4.1.1-3) unstable; urgency=low ++ ++ * Update to SVN 20060608, do not revert the fix for PR c++/26068. ++ Closes: #372152, #372559. ++ * Fix build failures for Pascal, enable Pascal on all architectures. ++ * Fix another build failure on GNU/kFreeBSD (Aurelien Jarno). ++ Closes: #370661. ++ * Fix build fauilure in gcc/p with parallel make. ++ * Remove cross-configure patch (Kazuhiro Inaoka). Closes: #370649. ++ * Only build the gcc-4.1-source package, when building from the gcc-4.1 ++ source. ++ * Fix upgrade problem from standalone gcj-4.1. ++ * Fix build error using bison-2.2, build-depend on bison (>= 2.3). ++ Closes: #372605. ++ * Backport PR libstdc++/25524 from the trunk, update the biarch-include ++ patch. mips triarch support can be added more easily. ++ ++ -- Matthias Klose Mon, 12 Jun 2006 00:23:45 +0200 ++ ++gcc-4.1 (4.1.1-2) unstable; urgency=low ++ ++ * Update to SVN 20060604. ++ - Fix PR c++/26757, C++ front-end producing two DECLs with the same UID. ++ Closes: #356569. ++ - Fix PR target/27158, ICE in extract_insn with -maltivec. ++ Closes: #362307. ++ * Revert PR c++/26068 to work around PR c++/27884 (Martin Michlmayr). ++ Closes: #370308. ++ * Mention Ada in copyright, update copyright file (Ludovic Brenta). ++ Closes: #366744. ++ * Fix kbsd-gnu-java.dpatch (Petr Salinger). Closes: #370320. ++ * Don't include version control files in gcc-4.1-source. ++ ++ -- Matthias Klose Sun, 4 Jun 2006 19:13:37 +0000 ++ ++gcc-4.1 (4.1.1-1) unstable; urgency=low ++ ++ [Matthias Klose] ++ * Update to SVN 20060601. ++ * Reenable the gpc build. ++ * PR libgcj/26483, libffi patch for IA-64 denorms, taken from trunk. ++ * Disable Ada for m32r targets. Closes: #367595. ++ * lib32gfortran1: Do not create empty directory /usr/lib32. Closes: #367999. ++ * gcc-4.1: Add a conflict to the gcj-4.1 version with a different ++ gcc_libdir. ++ * Build gij/gcj for GNU/k*BSD. Closes: #367166. ++ * Update hurd-changes patch (Michael Banck). Closes: #369690. ++ * debian/copyright: Add exception for the gpc runtime library. ++ * Update gpc/gpc-doc package descriptions. ++ ++ [Ludovic Brenta] ++ * patches/ada-libgnatprj.dpatch: add prj-pars.ad[bs] and sfn_scan.ad[bs] ++ to libgnatprj; remove them from gnatmake. ++ ++ -- Matthias Klose Thu, 1 Jun 2006 20:35:54 +0200 ++ ++gcc-4.1 (4.1.0-4) unstable; urgency=low ++ ++ [Ludovic Brenta] ++ * Fix a stupid bug whereby fname.ad{b,s} would be included in both ++ libgnatvsn-dev and libgnatprj-dev, preventing use of gnatprj.gpr. ++ Closes: #366733. ++ ++ -- Matthias Klose Thu, 11 May 2006 04:34:50 +0200 ++ ++gcc-4.1 (4.1.0-3) unstable; urgency=low ++ ++ * Update to SVN 20060507. ++ * debian/rules.d/binary-java.mk: Use $(lib32) everywhere. Closes: #365388. ++ * Always configure hppa64-linux-gnu with ++ --includedir=/usr/hppa64-linux-gnu/include. ++ * Make libgnatvsn4.1 and libgnatprj4.1 priority optional. Closes: #365900. ++ * Call autoconf2.13 explicitely in the Ada patches, build-depend on ++ autoconf2.13. Closes: #365780. ++ * Fix libgnatprj-dev and libgnatvsn-dev dependencies on their shared ++ libraries. ++ * Deduce softfloat and vfp (ARM) configure options (Pjotr Kourzanov). ++ * Update proposed patch for PR26885 (May 2 version). ++ * Build the libxxstdc++-dbg packages, when not building the library pacakges. ++ * Do not include the _pic library in the libxxstdc++-dbg packages. ++ ++ -- Matthias Klose Sun, 7 May 2006 15:29:53 +0200 ++ ++gcc-4.1 (4.1.0-2) unstable; urgency=medium ++ ++ * Update to SVN 20060428. ++ * Apply proposed patches for PR26885. ++ ++ * Keep libffi doc files in its own directory. Closes: #360466. ++ * Update ppc64 patches for 4.1 (Andreas Jochens). Closes: #360498. ++ * Fix PR tree-optimization/26763, wrong-code, taken from the 4.1 branch. ++ Closes: #356896. CVE-2006-1902. ++ * hppa-cbranch, hppa-cbranch2 patches: Fix for PR target/26743, ++ PR target/11254, PR target/10274, backport from trunk (Randolph Chung). ++ * Let libgccN provide -dcv1 when cross-compiling (Pjotr Kourzanov). ++ Closes: #363289. ++ * (Build-)depend on glibc-2.3.6-7. Closes: #360895, #361904. ++ * Fix a pedantic report about a package description. Add a hint that ++ we do not like bug reports with locales other than "C". Closes: #361409. ++ * Enable the libjava interpreter on mips/mipsel. ++ * gcc-4.1-source: Depend on gcc-4.1-base. ++ * gnat-4.1: Fix permissions of .ali files. ++ * Build lib32gcj7 on amd64. ++ * debian/patches/ada-gnatvsn.dpatch: New. Apply proposed fix for ++ PR27194. ++ ++ [Ludovic Brenta] ++ * debian/patches/ada-default-project-path.dpatch: new. Change the ++ default search path for project files to the one specified ++ by the Debian Policy for Ada: /usr/share/ada/adainclude. ++ * debian/patches/ada-symbolic-tracebacks.dpatch: new. Enable support for ++ symbolic tracebacks in exceptions. ++ * debian/patches/ada-missing-lib.dpatch: remove, superseded by the above. ++ * debian/patches/ada-link-lib.dpatch: changed. ++ - Instead of building libada as a target library only, build it as ++ both a host and, if different, target library. ++ - Build the GNAT tools in their top-level directory; do not use ++ recursive makefiles. ++ - Link the GNAT tools dynamically against libgnat. ++ - Apply proposed fix for PR27300. ++ - Rerun autoconf (Matthias Klose). ++ * debian/patches/ada-libgnatvsn.dpatch: new. ++ - Introduce a new shared library named libgnatvsn, containing ++ common components of GNAT under the GNAT-Modified GPL, for ++ use in GNAT tools, ASIS, GLADE and GPS. ++ - Link the gnat tools against this new library. ++ - Rerun autoconf (Matthias Klose). ++ * debian/patches/ada-libgnatprj.dpatch: new. ++ - Introduce a new shared library named libgnatprj, containing the ++ GNAT Project Manager, i.e. the parts of GNAT that parses project ++ files (*.gpr). Licensed under pure GPL; for use in GLADE and GPS. ++ - Link the gnat tools against this new library. ++ - Rerun autoconf (Matthias Klose). ++ * debian/patches/ada-acats.dpatch: new. ++ - When running the ACATS, look for the gnat tools in their new ++ directory (build/gnattools), and for the shared libraries in ++ build/gcc/ada/rts, build/libgnatvsn and build/libgnatprj. ++ * debian/gnatvsn.gpr, debian/gnatprj.gpr: new. ++ * debian/rules.d/binary-ada.mk, debian/control.m4: new binary packages: ++ libgnatvsn-dev, libgnatvsn4.1, libgnatprj-dev, libgnatprj4.1. Place ++ the *.gpr files in their respective -dev packages. ++ ++ -- Matthias Klose Sat, 29 Apr 2006 00:32:09 +0200 ++ ++gcc-4.1 (4.1.0-1) unstable; urgency=low ++ ++ * libstdc++CXX-BV-dev.preinst: Remove (handling of c++ include dir for 4.0). ++ * libgcj-common: Move removal of docdir from preinst into postinst. ++ * libgcj7: Move removal of docdir from preinst into postinst. ++ * Drop alternative build dependency on gnat-3.4, not built anymore. ++ * Fix PR libgcj/26103, wrong exception thrown (4.1 branch). ++ * debian/patches/libjava-stacktrace.dpatch: Add support to print file names ++ and line numbers in stacktraces. ++ * Add debugging symbols for libgcjawt and lib-gnu-java-awt-peer-gtk ++ in the libgcj7-dbg and lib32gcj7-dbg packages. ++ * Remove dependency of the libgcj-dbg packages on the libgcj-dev packages, ++ add recommendations on binutils and libgcj-dev. Mention the requirement ++ of binutils for the stacktraces. ++ * Fix upgrade from version 4.0.2-9, loosing the Debian changelog. ++ Closes: #355439. ++ * gij/gcj: Install one alternative for each command, do not use slave ++ links for rmiregistry, javah, rmic. Ubuntu #26781. Closes: #342557. ++ * Fix for PR tree-optimization/26587, taken from the 4.1 branch. ++ * Fix PR libstdc++/26526 (link failure when _GLIBCXX_DEBUG is defined). ++ * Configure with --enable-clocale=gnu, even if not building C++ packages. ++ * Remove runtime path from biarch libraries as well. ++ * PR middle-end/26557 (ice-on-vaild-code, regression), taken from ++ the gcc-4_1-branch. Closes: #349083. ++ * PR tree-optimization/26672 (ice-on-vaild-code, regression), taken from ++ the gcc-4_1-branch. Closes: #356231. ++ * PR middle-end/26004 (rejects-vaild-code, regression), taken from ++ the gcc-4_1-branch. ++ * When building as standalone gcj, build libgcc4 (hppa only) and fastjar. ++ * Configure --with-cpu=v8 on sparc. ++ * debian/patches/libjava-hppa.dpatch: pa/pa32-linux.h ++ (CRT_CALL_STATIC_FUNCTION): Define when CRTSTUFFS_O is defined. ++ (John David Anglin). Closes: #353346. ++ * Point to the 4.1 version of README.Bugs (closes: #356230). ++ * Disable the libmudflap testsuite on alpha (getting killed). ++ ++ -- Matthias Klose Sat, 18 Mar 2006 23:00:39 +0100 ++ ++gcc-4.1 (4.1.0-0) experimental; urgency=low ++ ++ * GCC 4.1.0 final release. ++ * Build the packages for the Java language from a separate source. ++ * Update NEWS.html, NEWS.gcc. ++ * libgcj-doc: Auto generated API documentation for libgcj7, classpath ++ example programs. ++ * Add gjdoc to Build-Depends-Indep. ++ * On amd64, build-depend on libc6-dev-i386 instead of ia32-libs-dev. ++ * Internal ssp headers now installed in the gcc libdir. ++ * Do not build gcj-4.1-base when building the gcc-4.1 packages. ++ * When building as gcj-4.1, use the tarball from the gcc-4.1-source ++ package. ++ ++ [Ludovic Brenta] ++ * Allow one to enable and disable NLS and bootstrapping from the environment. ++ - Adding "nls" to WITHOUT_LANG disables NLS support. ++ - If WITH_BOOTSTRAP is set, debian/rules2 calls configure ++ --enable-bootstrap=$(WITH_BOOTSTRAP) and just "make". If ++ WITH_BOOTSTRAP is unset, it calls configure without a bootstrapping ++ option and calls "make profiledbootstrap" or "make bootstrap-lean" ++ depending on the target CPU. ++ Currently overwritten to default to "bootstrap". ++ ++ -- Matthias Klose Thu, 2 Mar 2006 00:03:45 +0100 ++ ++gcc-4.1 (4.1ds9-0exp9) experimental; urgency=low ++ ++ * Update to GCC 4.1.0 release candidate 1 (gcc-4.1.0-20060219 tarball). ++ * Update gcc-version patch for gcc-4.1. ++ * libgccN, libstdc++N*: Fix upgrade of /usr/share/doc symlinks. ++ * libjava awt & swing update, taken from trunk 2006-02-16. ++ * libgcj7-dev: Suggest libgcj-doc, built from a separate source package. ++ * Shorten build-dependency line (work around buildd problems ++ on arm* and mips*). ++ * New patch gcc-ice-hack (saving the preprocessed source on an ICE), ++ taken from Fedora. ++ ++ -- Matthias Klose Mon, 20 Feb 2006 10:07:23 +0100 ++ ++gcc-4.1 (4.1ds8-0exp8) experimental; urgency=low ++ ++ * Update to SVN 20060212, taken from the 4.1 release branch. ++ * libgccN: Fix upgrade of /usr/share/doc/libgccN symlink. ++ ++ -- Matthias Klose Sun, 12 Feb 2006 19:48:31 +0000 ++ ++gcc-4.1 (4.1ds7-0exp7) experimental; urgency=low ++ ++ * Update to SVN 20060127, taken from the 4.1 release branch. ++ - On hppa, bump the libgcc soversion to 4. ++ * Add an option not to depend on the system -base package for cross compiler ++ (Ian Wienand). Closes: #347484. ++ * Remove workaround increasing the stack size limit for some architectures, ++ not needed anymore on ia64. ++ * On amd64, build-depend on libc6-dev-i386, depend on libc6-i386, where ++ available. ++ * libstdc++6: Properly upgrade the doc directory. Closes: #346171. ++ * libstdc++6: Add a conflict to scim (<< 1.4.2-1). Closes: #343313. ++ * Set default 32bit ix86 architecture to i486. ++ ++ -- Matthias Klose Fri, 27 Jan 2006 22:23:22 +0100 ++ ++gcc-4.1 (4.1ds6-0ubuntu6) experimental; urgency=low ++ ++ * Update to SVN 20060107, taken from the 4.1 release branch. ++ - Remove fix for PR ada/22533, fixed by patch for PR c++/23171. ++ * Remove binary packages from the control file, which aren't built ++ yet on any architecture. ++ * gcc-hppa64: Use /usr/hppa64-linux-gnu/include as location for the glibc ++ headers, tighten glibc (build-)dependency. ++ * libffi [arm]: Add support for closures, libjava [arm]: enable the gij ++ interpreter (Phil Blundell). Addresses: #337263. ++ * For the gcj standalone build, include cc1 into the gcj-4.1 package, ++ needed for linking java programs compiled to native code. ++ ++ -- Matthias Klose Sat, 7 Jan 2006 03:36:33 +0100 ++ ++gcc-4.1 (4.1ds4-0exp4) experimental; urgency=low ++ ++ * Update to SVN 20051210, taken from the 4.1 release branch. ++ * Prepare to build the java packages from it's own source (merged ++ from Ubuntu). ++ - Build the java packages from the gcc-4.1 source, as long as packages ++ are prepared for experimental. ++ - When built as gcj, run only the libjava testsuite, don't build the ++ libstdc++ debug packages, don't package the gcc source. ++ - Loosen package dependencies, when java packages are built from ++ separate sources. ++ - Fix gcj hppa build, when java packages are built from separate sources. ++ - gij-4.1: Install test-summary, when doing separate builds. ++ - Allow java packages be installed independent from other packages built ++ from the source package. ++ - Rename libgcj7-common to libgcj7-jar. ++ - Introduce a gcj-4.1-base package to completely separate the two and not ++ duplicate the changelog in each gcj/gij package. ++ * Java related changes: ++ - libjava-xml-transform: Update from classpath trunk, needed for ++ eclipse (Michael Koch), applied upstream. ++ - Fix java wrapper scripts to point to 4.1 (closes: #341710). ++ - Reenable java on mips and mipsel. ++ - Fix libgcj6 dependency. Ubuntu #19935. ++ - Add libxt-dev as a java build dependency. autoconf explicitely checks ++ for X11/Intrinsic.h. ++ * Ada related changes: ++ - Apply proposed fix for PR ada/22533, reenable ada on alpha, powerpc, ++ mips, mipsel and s390. ++ - Add Ada support for GNU/kFreeBSD (Aurelien Jarno). Closes: #341356. ++ - Remove ada bootstrap workaround for alpha. ++ * Build a separate gcc-4.1-source package (Bastian Blank). Closes: #333922. ++ * Remove obsolete patch: libstdc++-automake. ++ * Remove patch integrated upstream: libffi-mips. ++ * Fix the installation of the hppa64 compiler in snapshot builds. ++ * Rename libgfortran0* to libgfortran1* (upstream soversion change). ++ * Add a dependency on libc-dev for all compilers / -dev packages except ++ gcc (which can be used for kernel builds without libc-dev). ++ * libffi4-dev: Fix package description. ++ * On amd64, install 32bit libraries into /emul/ia32-linux/usr/lib. ++ Addresses: #341147. ++ * Fix installation of biarch libstdc++ headers on amd64. ++ * Configure --with-tune=i686 on ix86 architectures (on Ubuntu with ++ -mtune=pentium4). Remove the cpu-default-* patches. ++ * debian/control.m4: Fix libxxgcc package names. ++ * Update the build infrastructure to build cross compilers ++ (Nikita V. Youshchenko). ++ * Tighten binutils (build-)dependency. Closes: #342484. ++ * Symlink more doc directories. ++ * debian/control.m4: Explicitely set Architecture for biarch packages. ++ ++ -- Matthias Klose Sat, 10 Dec 2005 16:56:45 +0100 ++ ++gcc-4.1 (4.1ds1-0ubuntu1) UNRELEASED; urgency=low ++ ++ * Build Java packages only. ++ * Update to SVN 20051121, taken from the 4.1 release branch. ++ - Remove libjava-saxdriver-fix patch, applied upstream. ++ - Remove ada-gnat-version patch, applied upstream. ++ * Fix FTBFS in biarch builds on 32bit kernels. ++ * Update libstdc++-doc doc-base file (closes: #339046). ++ * Remove obsolete patch: gcc-alpha-ada_fix. ++ * Fix installation of biarch libstdc++ headers (Ubuntu #19655). ++ * Fix sparc and s390 biarch patches to build the 64bit libffi. ++ * Work around biarch build failure in libjava/classpath/native/jni/midi-alsa. ++ * Install spe.h header on powerpc. ++ * Add libasound build dependencies. ++ * libgcj: Fix installation of libgjsmalsa library. ++ * Remove patches not used anymore: libjava-no-rpath, i386-config-ml-nomf, ++ libobjc, multiarch-include, disable-biarch-check-mf, gpc-profiled, ++ gpc-no-gpidump, libgpc-shared, acats-expect. ++ * Fix references to manuals in gnat(1). Ubuntu #19772. ++ * Remove build dependency on xlibs-dev, add libxtst-dev. ++ * Do not configure with --disable-werror. ++ * Merge *-config-ml patches into one config-ml patch, configure the biarch ++ libs in debian/rules.defs. ++ * debian/gcj-wrapper: Accept -Xss. ++ * Do not build biarch java on Debian (missing biarch libasound). ++ * Do not build the java packages from this source package, avoiding ++ dependencies on X. ++ ++ -- Matthias Klose Mon, 21 Nov 2005 20:29:43 +0100 ++ ++gcc-4.1 (4.1ds0-0exp0) experimental; urgency=low ++ ++ * Configure libstdc++ using the default allocator. ++ * Update to 20051112, taken from the svn trunk. ++ ++ -- Matthias Klose Sat, 12 Nov 2005 23:47:01 +0100 ++ ++gcc-4.1 (4.1ds0-0ubuntu0) breezy; urgency=low ++ ++ * UNRELEASED ++ * First snapshot of gcc-4.1 (CVS 20051019). ++ - adds SSP support (closes: #213994, #233208). ++ * Remove patches applied upstream/not needed anymore. ++ * Update patches for 4.1: link-libs, gcc-textdomain, libjava-dlsearch-path, ++ rename-info-files, reporting, classmap-path, i386-biarch, sparc-biarch, ++ libjava-biarch-awt, ada-gcc-name. ++ * Disable patches: ++ - 323016, m68k, necessary for 4.1? ++ * debian/copyright: Update for 4.1. ++ * debian/control, debian/control.m4, debian/rules.defs, debian/rules.conf: ++ Update for 4.1, add support for Obj-C++ and SSP. ++ * Fix generation of Ada docs in info format. ++ * Set Ada library version to 4.1. ++ * Drop gnat-3.3 as an alternative build dependency. ++ * Use fortran instead of f95 for the build files. ++ * Update build support for awt peer libs. ++ * Add packaging support for SSP library. ++ * Add packaging support for Obj-C++. ++ * Run the testsuite for -march=i686 on i386 and amd64 as well. ++ * Fix generation of Pascal docs in html format. ++ * Update config-ml patches to build libssp biarch. ++ * Disable libssp for hppa64 build. ++ * libgcj7-dev: Install jni_md.h. ++ * Disable gnat for powerpc, currently fails to build. ++ * Add biarch runtime lib packages for ssp, mudflap, ffi. ++ * Do not explicitely configure with --enable-java-gc=boehm, which is the ++ default. ++ * libjava-saxdriver-fix: Fix a problem in the Aelfred2 SAX parser. ++ * libstdc++6-4.0-dev: Depend on the libc-dev package. Ubuntu #18885. ++ * Build-depend on expect-tcl8.3 on all architectures. ++ * Build-depend on lib32z1-dev on amd64 and ppc64, drop build dependency on ++ amd64-libs. ++ * Disable ada on alpha mips mipsel powerpc s390, currently broken. ++ ++ -- Matthias Klose Wed, 19 Oct 2005 11:02:31 +0200 ++ ++gcc-4.0 (4.0.2-3) unstable; urgency=low ++ ++ * Update to CVS 20051015, taken from the gcc-4_0-branch. ++ - gcc man page fixes (closes: #327254, #330099). ++ - PR java/19870, PR java/20338, PR java/21844, PR java/21540: ++ Remove Debian patches. ++ - Applied libjava-echo-fix patch. ++ - Fix PR target/24284, ICE (Segmentation fault) on sparc-linux. ++ Closes: #329840. ++ - Fix PR c++/23797, ICE on typename outside template. Closes: #325545. ++ - Fix PR c++/22551, ICE in tree_low_cst. Closes: #318932. ++ * libstdc++6: Tighten libstdc++ shlibs version to 4.0.2-3 (new symbol). ++ * Update generated Ada files. ++ * Fix logic to disable mudflap and Obj-C++ via the environment. ++ * Remove f77 build bits. ++ * gij-4.0: Remove /var/lib/gcj-4.0/classmap.db on purge (closes: #330800). ++ * Let gcj-4.0 depend on libgcj6-dev, instead of recommending it. This is ++ not necessary for byte-code compilations, but for compilations to native ++ code. For compilations to byte-code, use a better compiler like ecj ++ for now (found in the ecj-bootstrap package). ++ * Disable biarch setup in cross compilers (Josh Triplett). Closes: #333952. ++ * Fix with_libnof logic for cross-compilations (Josh Triplett). ++ Closes: #333951. ++ * Depend on binutils (>= 2.16.1cvs20050902-1) on the alpha architecture. ++ Closes: #333954. ++ * On i386, build-depend on libc6-dev-amd64. Closes: #329108. ++ * (Build-)depend on glibc 2.3.5-5. ++ ++ -- Matthias Klose Sun, 2 Oct 2005 14:25:54 +0200 ++ ++gcc-4.0 (4.0.2-2) unstable; urgency=low ++ ++ * Update to CVS 20051001, taken from the gcc-4_0-branch. Includes the ++ changes between 4.0.2 RC3 and the final 4.0.2 release, missing from ++ the upstream tarball. Remove patches applied upstream (gcc-c-decl, ++ pr23182, pr23043, pr23367, pr23891, pr21418, pr24018). ++ * On ix86 architectures run the testsuite for -march=i686 as well. ++ * Build libffi on the Hurd (closes: #328705). ++ * Add big-endian arm (armeb) support (Lennert Buytenhek). Closes: #330730. ++ * Update libjava xml to classpath CVS HEAD 20050930 (Michael Koch). ++ * Reapply patch to make -mieee the default on alpha-linux. Closes: #330826. ++ * Add workaround not to make libmudflap _start/_end not small data on ++ mips/mipsel, taken from CVS HEAD. ++ * Don't build the nof libraries on powerpc. ++ * Number crunching time on m68k, reenable gfortran on m68k-linux-gnu. ++ ++ -- Matthias Klose Sat, 1 Oct 2005 15:42:10 +0200 ++ ++gcc-4.0 (4.0.2-1) unstable; urgency=low ++ ++ * GCC 4.0.2 release. ++ * lib64stdc++6: Set priority to optional. ++ * Fix bug in StreamSerializer, seen with eclipse-3.1 (Ubuntu 12744). ++ Backport from CVS HEAD, Michael Koch. ++ * Apply java patches, proposed for the 4.0 branch: PR java/24018, ++ PR libgcj/23182, PR java/19870, PR java/21844, PR libgcj/23367, ++ PR java/20338. ++ * Update the expect/pty test to actually call expect directly, rather ++ than test for the existence of PTYs, since a working expect is what ++ we really care about, not random device files (Adam Conrad). ++ Closes: #329715. ++ * Add build dependencies on lib64z1-dev. ++ * gcc-c-decl.dpatch: Fix C global decl handling regression in 4.0.2 from ++ 4.0.1 ++ ++ -- Matthias Klose Thu, 29 Sep 2005 19:50:08 +0200 ++ ++gcc-4.0 (4.0.1-9) unstable; urgency=low ++ ++ * Update to CVS 20050922, taken from the gcc-4_0-branch (4.0.2 RC3). ++ * Apply patches: ++ - Fix PR java/21418: Order of source files matters when compiling, ++ backported from mainline. ++ - Fix for PR 23043, backported form mainline. ++ - Proposed patch for #323016 (m68k only). Patch by Roman Zippel. ++ * libstdc++6: Tighten libstdc++ shlibs version to 4.0.1-9 (new symbol). ++ * Fail the build early, if the system doesn't have any pty devices ++ created in /dev. Needed for running the testsuite. ++ * Update hurd changes again (closes: #328973). ++ ++ -- Matthias Klose Thu, 22 Sep 2005 07:28:18 +0200 ++ ++gcc-4.0 (4.0.1-8) unstable; urgency=medium ++ ++ * Update to CVS 20050917, taken from the gcc-4_0-branch. ++ - Fix FTBFS for boost, introduced in 4.0.1-7 (closes: #328684). ++ * Fix PR java/23891, eclipse bootstrap. ++ * Set priority of gcc-4.0-hppa64 package to standard. ++ * Bump standards version to 3.6.2. ++ * Fix java wrapper script, mishandles command line options with arguments. ++ Patch from Olly Betts. Closes: #296456. ++ * Bump epoch of the lib32gcc1 package to the same epoch as for the the ++ libgcc1 and lib64gcc1 packages. ++ * Fix some lintian warnings. ++ * Build libffi on the Hurd (closes: #328705). ++ * For biarch builds, disable the testsuite for the non-default architecture ++ for runtime libraries, which are not built by default (libjava). ++ * Add gsfonts-x11 to Build-Depends-Indep to avoid warnings from doxygen. ++ * Install Ada .ali files read-only. ++ ++ -- Matthias Klose Sat, 17 Sep 2005 10:35:23 +0200 ++ ++gcc-4.0 (4.0.1-7) unstable; urgency=low ++ ++ * Update to CVS 20050913, taken from the gcc-4_0-branch. ++ - Fix PR c++/19004, ICE in uses_template_parms (closes: #284777). ++ - Fix PR rtl-optimization/23454, ICE in invert_exp_1 on sparc. ++ Closes: #321215. ++ - Fix PR libstdc++/23417, make bits/stl_{list,tree}.h -Weffc++ clean. ++ Closes: ##322170. ++ * Install 'altivec.h' on ppc64 (closes: #323945). ++ * Install locale data with the versioned package name (closes: #321591). ++ * Fix fastjar build without building libjava. ++ * On hppa, don't build using gcc-3.3 when ada is disabled. ++ * On m68k, don't build the stage1 compiler using -O. ++ ++ * Ludovic Brenta ++ - Allow the choice whether or not to build with NLS. ++ - Fix a typo whereby libffi was always enabled on i386. ++ ++ -- Matthias Klose Tue, 13 Sep 2005 23:23:11 +0200 ++ ++gcc-4.0 (4.0.1-6) unstable; urgency=low ++ ++ * Update to CVS 20050821, taken from the gcc-4_0-branch. ++ - debian/patches/pr21562.dpatch: Removed, applied upstream. ++ - debian/patches/libjava-awt-name.dpatch: Updated. ++ - debian/patches/classpath-20050618.dpatch: Updated. ++ * Use all available CPU's for the check target, unless USE_NJOBS == no. ++ * debian/patches/biarch-include.dpatch: Include ++ /usr/local/include/-linux-gnu before including /usr/local/include. ++ * Fix biarch system include directories for the non-default architecture. ++ * Prefer gnat-4.0 over gnat-3.4 over gnat-3.3 as a build-dependency. ++ ++ -- Matthias Klose Thu, 18 Aug 2005 18:36:23 +0200 ++ ++gcc-4.0 (4.0.1-5) unstable; urgency=low ++ ++ * Update to CVS 20050816, taken from the gcc-4_0-branch. ++ - Fix PR middle-end/23369, wrong code generation for funcptr comparison ++ on hppa. Closes: #321785. ++ - Fix PR fortran/23368 ICE with NAG routines (closes: #322912). ++ * Build-depend on libcairo2-dev (they say, that's the final package name ...) ++ * libgcj: Search /usr/lib/gcj-4.0 for dlopened libraries, place a copy ++ of the .la files in the libgcj6 package into this directory. ++ Closes: #322576. ++ * Tighten the dependencies between the compiler packages to the same ++ version and release. Use some substitution variables for control file ++ generation. ++ * Remove build dependencies for gpc. ++ * Don't use '/emul/ia32-linux' on ppc64 (closes: #322890). ++ * Synchronize with Ubuntu. ++ ++ -- Matthias Klose Tue, 16 Aug 2005 22:45:47 +0200 ++ ++gcc-4.0 (4.0.1-4ubuntu1) breezy; urgency=low ++ ++ * Jeff Bailey ++ ++ Enable i386 biarch using biarch glibc (not yet enabled for unstable). ++ - debian/rules.d/binary-libgcc.mk: Make i386 lib64gcc1 depend on ++ libc6-amd64 ++ - debian/control.m4: Suggest libc6-amd64 rather than amd64-libs. ++ - debian/rules.conf: Build-Dep on libc6-dev-amd64 [i386] ++ Build-Dep on binutils >= 2.16.1-2ubuntu3 ++ - debian/rules2: Enable biarch build in Ubuntu. ++ ++ * Matthias Klose ++ ++ - Add shlibs file and dependency information for the lib32gcc1 package. ++ - debian/patches/gcc-textdomain.dpatch: Update (closes: #321591). ++ - Set priority of gcc-4.0-base and libstdc++6 packages to `required'. ++ Closes: #321016. ++ - libffi-hppa.dpatch: Remove, applied upstream. ++ ++ -- Matthias Klose Mon, 8 Aug 2005 19:39:02 +0200 ++ ++gcc-4.0 (4.0.1-4) unstable; urgency=low ++ ++ * Enable the biarch compiler for powerpc (closes: #268023). ++ * Update to CVS 20050806, taken from the gcc-4_0-branch. ++ * Build depend on libcairo0.6.0-dev (closes: #321540). ++ * Fix Ada build on the hurd (closes: #321350). ++ * Update libffi for mips (Thiemo Seufer). Closes: #321100. ++ * Fix segfault on 64bit archs in the AWT Gtk peer library (Dan Frazier). ++ Closes: #320915. ++ * Add libXXgcc1 build dependencies for biarch builds. ++ ++ -- Matthias Klose Sun, 7 Aug 2005 07:01:59 +0000 ++ ++gcc-4.0 (4.0.1-3) unstable; urgency=medium ++ ++ * Update to CVS 20050725, taken from the gcc-4_0-branch. ++ - Fix ICE with -O and -mno-ieee-fp/-ffast-math (closes: #319087). ++ * Synchronize with Ubuntu. ++ * Fix applying hurd specific patches for the hurd build (closes: #318443). ++ * Do not build-depend on libmpfr-dev on architectures, where fortran ++ is not built. ++ * Apply biarch include patch on ppc64 as well (closes: #318603). ++ * Correct libstdc++-dev package description (closes: #319082). ++ * debian/rules.defs: Replace DEB_TARGET_GNU_CPU with DEB_TARGET_ARCH_CPU. ++ * gcc-4.0-hppa64: Rename hppa64-linux-gcc to hppa64-linux-gnu-gcc. ++ Closes: #319818. ++ ++ -- Matthias Klose Mon, 25 Jul 2005 10:43:06 +0200 ++ ++gcc-4.0 (4.0.1-2ubuntu3) breezy; urgency=low ++ ++ * Update to CVS 20050720, taken from the gcc-4_0-branch. ++ - Fix PR22278, volatile issues, seen when building xorg. ++ * Build against new libcairo1-dev (0.5.2). ++ ++ -- Matthias Klose Wed, 20 Jul 2005 12:29:50 +0200 ++ ++gcc-4.0 (4.0.1-2ubuntu2) breezy; urgency=low ++ ++ * Acknowledge that i386 biarch builds still need to be fixed for glibc-2.3.5. ++ ++ -- Matthias Klose Tue, 19 Jul 2005 08:29:30 +0000 ++ ++gcc-4.0 (4.0.1-2ubuntu1) breezy; urgency=low ++ ++ * Synchronize with Debian. ++ * Update to CVS 20050718, taken from the gcc-4_0-branch. ++ - Fix PR c++/22132 (closes: #318488), upcasting a const class pointer ++ to struct the class derives from generates wrong code. ++ * Build biarch runtime libraries for Fortran and ObjC. ++ * Apply proposed patch for PR22309 (crash with mt_allocator if libstdc++ ++ is dlclosed). Closes: #293466. ++ ++ -- Matthias Klose Mon, 18 Jul 2005 17:10:18 +0200 ++ ++gcc-4.0 (4.0.1-2) unstable; urgency=low ++ ++ * Don't apply the patch to make -mieee the default on alpha-linux-gnu. ++ Causes the bootstrap to fail on alpha-linux-gnu. ++ ++ -- Matthias Klose Tue, 12 Jul 2005 00:14:12 +0200 ++ ++gcc-4.0 (4.0.1-1) unstable; urgency=high ++ ++ * GCC 4.0.1 final release. See /usr/share/doc/gcc-4.0/NEWS.{gcc,html}. ++ * Build fastjar on mips/mipsel, fix fastjar build without building java. ++ * Disable the comparision check on unstable/ia64. adaint.o differs, ++ currently cannot be reproduced with glibc-2.3.5 and binutils-2.16.1. ++ * libffi/hppa: Fix handling of 3 and 5-7 byte struct returns. ++ * amd64: Fix libgcc symlinks to point to /usr/lib32, instead of /lib32. ++ * On powerpc, don't build with -j >1, apparently doesn't succeeds ++ on the Debian buildd. ++ * Apply revised patch to make -mieee the default on alpha-linux, ++ and add -mieee-disable switch to turn the default off (Tyson Whitehead). ++ * Disable multiarch-includes; redo biarch-includes to include the paths ++ for the non-default biarch, when called with -m32/-m64. ++ * Move new java headers from libstdc++-dev to libgcj-dev, add replaces ++ line. ++ * Update classpath patch to work with cairo-0.5.1. Patch provided by ++ Michael Koch. ++ * Further classpath updates for gnu.xml and javax.swing.text.html. ++ Patch provided by Michael Koch. ++ * Require binutils (>= 2.16.1) as a build dependency and a dependency. ++ * On i386, require amd64-libs-dev (>= 1.2). ++ * Update debian/NEWS.{html,gcc}. ++ ++ * Closing bug reports reported against older gcc versions (some of them ++ still present in Debian, but not anymore as the default compiler). ++ Usually, forwarded bug reports are linked to ++ http://gcc.gnu.org/PR ++ The upstream bug number usually can be found in the Debian reports. ++ ++ * Closed reports reported against gcc-3.3 and fixed in gcc-3.4: ++ - General: ++ + PR rtl-optimization/2960: Duplicate loop conditions even with -Os ++ Closes: #94701. ++ + PR optimization/3995: i386 optimisation: joining tests. ++ Closes: #105309. ++ + PR rtl-optimization/11635: Unnecessary store onto stack, more ++ curefully expand union cast (closes: #202016). ++ + PR target/7618: vararg disallowed in virtual function. Closes: #205404. ++ + Large array problem on 64 bit platforms (closes: #209152). ++ + Mark more strings as translatable (closes: #227129). ++ + PR gcc/14711: ICE when compiling a huge source file Closes: #234711. ++ + Better code generation for if(!p) return NULL;return p; ++ Closes: #242318. ++ + PR rtl-optimization/16152: Perl ftbfs on {ia64,arm,m68k}-linux. ++ Closes: #255801. ++ + ICE (segfault) while compiling Linux 2.6.9 (closes: #277206). ++ + Link error building memtest (closes: #281445). ++ - Ada: ++ + PR ada/12450: Constraint error for valid input (closes: #210844). ++ + PR ada/13620: miscompilation of array initializer with ++ -O3 -fprofile-arcs. Closes: #226244. ++ - C: ++ + PR c/6897: Code produced with -fPIC reserves EBX, but compiles ++ bad __asm__ anyway (closes: #73065). ++ + PR c/9209: On i386, gcc-3.0 allows $ in indentifiers but not the asm. ++ Closes: #121282. ++ + PR c/11943: Accepts invalid declaration "int x[2, 3];" in C99 mode. ++ Closes: #177303. ++ + PR c/11942: restrict keyword broken in C99 mode. Closes: #187091. ++ + PR other/11370: -Wunreachable-code gives false complaints. ++ Closes: #196600. ++ + PR c/11369: Too relaxed checking with -Wstrict-prototypes. ++ Closes: #197504. ++ + PR c/11445: False positive warning with -Wunreachable-code. ++ Closes: #200140. ++ + PR c/11459: -stdc=c90 -pedantic warns about C90's non long-long ++ support when in C99 mode. Closes: #200392. ++ + PR c/456: Handling of constant expressions. Closes: #225935. ++ + ICE on invalid #define with -traditional (closes: #242916). ++ + No warning when initializing a variable with itself, new option ++ -Winit-self (closes: #293957). ++ - C++: ++ + C++ parse error (closes: #42946). ++ + PR libstdc++/9073: Replacement for __STL_ASSERTIONS (libstdc++v3 ++ debug mode). Closes: #128993. ++ + Parse errors in nested constructor calls (closes: #138561). ++ + PR optimization/1823: -ftrapv aborts with pointer difference due to ++ division optimization. Closes: #169862. ++ + ICE on invalid code (closes: #176101). ++ + PR c++/10199: ICE handling method parametrized by template. ++ Closes: #185604. ++ + High memory usage building packages OpenOffice.org and MythTV. ++ Closes: #194345, #194513. ++ + Improved documentation of std::lower_bound (closes: #196380). ++ + ICE in regenerate_decl_from_template (closes: #197674). ++ + PR c++/11444: Function fails to propagate up class tree ++ (template-related). Closes: #198042. ++ + ICE when using namespaced typedef of primitive type as struct. ++ Closes: #198261. ++ + Bug using streambuf / iostream to read from a named pipe. ++ Closes: #216105. ++ + PR c++/11437: ICE in lookup_name_real (closes: #200011). ++ + Add large file support (LFS) in libstdc++ (closes: #220000). ++ + PR c++/13621: ICE compiling a statement expression returning type ++ string (closes: #224413). ++ + g++ doesn't find inherited inner class after template instantiation. ++ Closes: #227518. ++ + PR libstdc++/13928: Add whatis info in man pages generated by doxygen. ++ Closes: #229642. ++ + Missing symbol _M_setstate in libstdc++ (closes: #232709). ++ + Unable to parse declaration of inline constructor explicit ++ specialization (closes: #234709). ++ + ICE (segfault) on invalid C++ code (closes: #246031). ++ + ICE in lookup_tempate_function (closes: #262441). ++ + Undefined symbols in libstdc++, when using specials char_traits. ++ Closes: #266110. ++ + PR libstdc++/16011: Outputting numbers with ostream in the locale fr_BE ++ causes infinite recursion (closes: #270795). ++ + ICE in tree_low_cst (closes: #276291). ++ + ICE in in expand_call (closes: #283503). ++ + typeof operator is misparsed in a template function (closes: #288555). ++ + ICE in tree_low_cs (closes: #291374). ++ + Improve uninformative error messages (closes: #292961, #293076). ++ + ICE on array initialization (closes: #294560). ++ + Failure to build xine-lib with -finline-functions (closes: #306854). ++ - Java: ++ + Fix error finding files in subdirectories (closes: #195480). ++ + Implement java.text.CollationElementIterator lacks getOffset(). ++ Closes: #259789. ++ - Treelang: ++ + Pointer truncation on 64bit architectures (closes: #308367). ++ - Architecture specific: ++ - alpha ++ + PR debug/10695: ICE on alpha while building agistudio. ++ Closes: #192568. ++ + ICE when building fceu (closes: #228018, #252764). ++ - amd64 ++ + Miscompilation of Objective-C code (closes: #250174). ++ + g++ hangs compiling k3d on amd64 (closes: #285364). ++ - arm ++ + PR target/19008: gcc -O3 -fPIC produces wrong code via auto inlining. ++ Closes: #285238. ++ - i386 ++ + PR target/4106: i386 -fPIC asm ebx clobber no error. ++ Closes: #153472. ++ + PR target/10984: x86/sse2 ICEs on vector intrinsics. Closes: #166940. ++ + Wrong code generation on at least ix86 (closes: #275655). ++ - m68k ++ + PR target/9201: ICE compiling octave-2.1 (closes: #175478). ++ + ICE in verify_initial_elim_offsets (closes: #204407, #257012). ++ + g77 generates invalid assembly code (closes: #225621). ++ + ICE in verify_local_live_at_start (closes #245584). ++ - powerpc ++ + PR optimization/12828: -floop-optimize is unstable on PowerPC (float ++ to int conversion problem). Closes: #218219. ++ + PR target/13619: ICE building altivec code in ffmpeg. ++ Closes: #226148. ++ + PR target/20046: Miscompilation of bind 9.3.0. Closes: #292958. ++ - sparc ++ + ICE (segfault) while building atlas3 on sparc32 (closes: #249108). ++ + Wrong optimization on sparc32 when building linux kernel. ++ Closes: #254626. ++ ++ * Closed reports reported against gcc-3.3 or gcc-3.4 and fixed in gcc-4.0: ++ - General: ++ + PR rtl-optimization/6901: Optimizer improvement (removing unused ++ local variables). Closes: #67206. ++ + PR middle-end/179: Failure to detect use of unitialized variable ++ with -O -Wall. Closes: #117765. ++ + ICE building glibc's nptl on amd64 (closes: #260710, #307993). ++ + PR middle-end/17827: ICE in make_decl_rtl. Closes: #270854. ++ + PR middle-end/21709: ICE on compile-time complex NaN. Closes: #305344. ++ - Ada: ++ + PR ada/10889: Convention Fortran matrices mishandled in generics. ++ Closes: #192135. ++ + PR ada/13897: Implement tasking on powerpc. Closes: #225346. ++ - C: ++ + PR c/13072: Bogus warning with VLA in switch. Closes: #218803. ++ + PR c/13519: typeof(nonconst+const) is const. Closes: #208981. ++ + PR c/12867: Incorrect warning message (void format, should be void* ++ format). Closes: #217360. ++ + PR c/16066: PR 16066] i386 loop strength reduction bug. ++ Closes: #254659. ++ - C++: ++ + PR c++/13518: -Wnon-virtual-dtor doesn't always work. Closes: #212260. ++ + PR translation/16025: ICE with unsupported locale(closes: #242158). ++ + PR c++/15125: -Wformat doesn't warn for different types in fprintf. ++ Closes: #243507. ++ + PR c++/15214: Warn only if the dtor is non-private or the class has ++ friends. (closes: #246639). ++ + PR libstdc++/17218: Unknown subjects in generated libstdc++ manpages. ++ Closes: #262934. ++ + PR libstdc++/17223: Missing .so references in generated libstdc++ ++ manpages. Closes: #262956. ++ + libstdc++-doc: Improve man pages (closes: #280910). ++ + PR c++/19006: ICE in tree_low_cst. Closes: #285692. ++ + g++ does not check arguments to fprintf. Closes: #281847. ++ - Java: ++ + PR java/7304: gcj ICE (closes: #152501). ++ + PR libgcj/7305: Installation of headers not directly in /usr/include. ++ Closes: #195483. ++ + PR libgcj/11941: libgcj timezone handling (closes: #203212). ++ + PR java/14709: gcj fails to wait for its child processes on exec(). ++ Closes: #238432. ++ + PR libgcj/21703: gcj hangs when rapidly calling String.intern(). ++ Closes: #275547. ++ + SocketChannel.get(ByteBuffer) returns 0 at EOF. Closes: #281602. ++ + PR java/19711: gcj segfaults instead of reporting the ambiguous ++ expression. Closes: #286715. ++ + Static libgcj contains repeated archive members (closes: #298263). ++ - Architecture specific: ++ - alpha ++ + Unaligned accesses with ?-operator (closes: #301983). ++ - arm ++ + Compilation error of glibc-2.3.4 on arm (closes: #298508). ++ - m68k ++ + ICE in add_insn_before (closes: #248432). ++ - mips ++ + Fix o32 ABI breakage in gcc 3.3/3.4 (closes: #270620). ++ - powerpc ++ + ICE in extract_insn (closes: #311128). ++ ++ * Closing bug reports as wontfix: ++ - g++ defines _GNU_SOURCE when using the libstdc++ header files. ++ Behaviour did change since 3.0. Closes: #126703, #164872. ++ ++ -- Matthias Klose Sat, 9 Jul 2005 17:10:54 +0000 ++ ++gcc-4.0 (4.0.0ds2-12) unstable; urgency=high ++ ++ * Update to CVS 20050701, taken from the gcc-4_0-branch. ++ * Apply proposed patch for MMAP configure fix; aka PR 19877. Backport ++ from mainline. ++ * Disable Fortran on m68k. Currently FTBFS. ++ * Split multiarch-include/lib patches. Update multiarch-include patch. ++ * Fix FTBFS of the hppa64-linux cross compiler. Don't add the ++ multiarch include dirs when cross compiling. ++ * Configure --with-java-home, as used by java-gcj-compat. ++ Closes: #315646. ++ * Make libgcj-dbg packages priority extra. ++ * Set the path of classmap.db to /var/lib/gcj-@gcc_version@. ++ * On m68k, do not create the default classmap.db in the gcj postinst. ++ See #312830. ++ * On amd64, install the 32bit libraries into /emul/ia32-linux/usr/lib. ++ Restore the /usr/lib32 symlink. ++ * On amd64, don't reference lib64, but instead lib (lib64 is a symlink ++ to lib). Closes: #293050. ++ * Remove references to build directories from the .la files. ++ * Make cpp-X.Y conflict with earlier versions of gcc-X.Y, g++-X.Y, gobjc-X.Y, ++ gcj-X.Y, gfortran-X.Y, gnat-X.Y, treelang-X.Y, if a path component in ++ the gcc library path changes (i.e. version or target alias). ++ * Disable Ada for sh3 sh3eb sh4 sh4eb. ++ * For gcj-4.0, add a conflict to libgcj4-dev and libgcj5-dev. ++ Closes: #316499. ++ ++ -- Matthias Klose Sat, 2 Jul 2005 11:04:35 +0200 ++ ++gcc-4.0 (4.0.0ds1-11) unstable; urgency=low ++ ++ * debian/rules.defs: Disable Ada for alpha. ++ * debian/rules.conf: Fix typo in type-handling replacement code. ++ * Don't ship an empty libgcj6-dbg package. ++ ++ -- Matthias Klose Thu, 23 Jun 2005 09:03:21 +0200 ++ ++gcc-4.0 (4.0.0ds1-10) unstable; urgency=medium ++ ++ * debian/patches/libstdc++-api-compat.dpatch: Apply proposed patch ++ to fix libstdc++ 3.4.5/4.0 compatibility. ++ * type-handling output became insane. Don't use it anymore. ++ * Drop the reference to the stl-manual package (closes: #314983). ++ * Disable java on GNU/kFreeBSD targets, requested by Robert Millan. ++ Closes: #315140. ++ * Terminate the acats-killer process, even if the build is aborted ++ by the user (closes: #314405). ++ * debian/rules.defs: Define DEB_TARGET_ARCH_{OS,CPU}. ++ * Start converting the use of DEB_*_GNU_* to DEB_*_ARCH_* in the build ++ files. ++ * Do not configure with --enable-gtk-cairo. Needs newer gtk. Drop ++ build dependency on libcairo-dev. ++ * Fix setting of the system header directory for the hurd (Michael Banck). ++ Closes: #315386. ++ * Fix FTBFS on hurd-i386: MAXPATHLEN issue (Michael Banck). Closes: #315384. ++ ++ -- Matthias Klose Wed, 22 Jun 2005 19:45:50 +0200 ++ ++gcc-4.0 (4.0.0ds1-9ubuntu2) breezy; urgency=low ++ ++ * Fix version number in libgcj shlibs file. ++ ++ -- Matthias Klose Sun, 19 Jun 2005 10:34:02 +0200 ++ ++gcc-4.0 (4.0.0ds1-9ubuntu1) breezy; urgency=low ++ ++ * Update to 4.0.1, release candidate 2. ++ * libstdc++ shlibs file: Require 4.0.0ds1-9ubuntu1 as minimum version. ++ * Rename libawt to libgcjawt to avoid conflicts with other ++ libawt implementations (backport from HEAD). ++ * Update classpath awt, swing and xml parser for HTML support in swing. ++ Taken from classpath CVS HEAD 2005-06-18. Patch provided by Michael Koch. ++ * Remove the libgcj-buffer-strategy path, part of the classpath update. ++ * libgcj shlibs file: Require 4.0.0ds1-9ubuntu1 as minimum version. ++ * Require cairo-0.5 as build dependency. ++ * gij-4.0: Provide java1-runtime. ++ * gij-4.0: Provide an rmiregistry alternative (using grmiregistry-4.0). ++ * gcj-4.0: Provide an rmic alternative (using grmic-4.0). ++ * libgcj6-dev conflicts with libgcj5-dev, libgcj4-dev, not libgcj6. ++ Closes: #312741. ++ * libmudflap-entry-point.dpatch: Correct name of entry point on mips/mipsel. ++ * Apply proposed patch for PR 18421 and PR 18719 (m68k only). ++ * Apply proposed path for PR 21562. ++ * Add build dependency on dpkg (>= 1.13.7). ++ * On linux systems, configure for -linux-gnu. ++ * Configure the hppa64 cross compiler to target hppa64-linux-gnu. ++ * (Build-)depend on binutils-2.16.1. ++ * libstdc{32,64}++6-4.0-dbg: Depend on libstdc++6-4.0-dev. ++ * gnat-4.0: only depend on libgnat, when a shared libgnat is built. ++ * gfortran-4.0: Depend on libgmp3c2 | libgmp3. ++ * On hppa, explicitely use gcc-3.3 as a build dependency in the case ++ that Ada is disabled. ++ * libmudflap: Always build the library for the non-default biarch ++ architecture, or else the test results show link failures. ++ ++ -- Matthias Klose Sat, 18 Jun 2005 00:42:55 +0000 ++ ++gcc-4.0 (4.0.0-9) unstable; urgency=low ++ ++ * Upload to unstable. ++ ++ -- Matthias Klose Wed, 25 May 2005 19:02:20 +0200 ++ ++gcc-4.0 (4.0.0-8ubuntu3) breezy; urgency=low ++ ++ * debian/control: Regenerate. ++ ++ -- Matthias Klose Sat, 4 Jun 2005 10:56:27 +0200 ++ ++gcc-4.0 (4.0.0-8ubuntu2) breezy; urgency=low ++ ++ * Fix powerpc-config-ml patch. ++ ++ -- Matthias Klose Fri, 3 Jun 2005 15:47:52 +0200 ++ ++gcc-4.0 (4.0.0-8ubuntu1) breezy; urgency=low ++ ++ * powerpc biarch support: ++ - Enable powerpc biarch support, build lib64gcc1 on powerpc. ++ - Add patch to disable libstdc++'s configure checking, if it can't run ++ 64bit binaries on 32bit kernels (Sven Luther). ++ - Apply the same patch to the other runtime librararies as well. ++ - Run the testsuite with -m64, if we can execute 64bit binaries. ++ - Add libc6-dev-ppc64 as build dependency for powerpc. ++ * 32bit gcj libs for amd64. ++ * debian/logwatch.sh: Don't remove logwatch pid file on exit (suggested ++ by Ryan Murray). ++ * Update to CVS 20050603, taken from the gcc-4_0-branch. ++ * g++-4.0 provides c++abi2-dev. ++ * Loosen dependencies on packages of architecture `all' to not break ++ binary only uploads. ++ * Build libgfortran for biarch as well, else the testsuite will fail. ++ ++ -- Matthias Klose Fri, 3 Jun 2005 13:38:19 +0200 ++ ++gcc-4.0 (4.0.0-8) experimental; urgency=low ++ ++ * Synchronize with Ubuntu. ++ ++ -- Matthias Klose Mon, 23 May 2005 01:56:28 +0000 ++ ++gcc-4.0 (4.0.0-7ubuntu7) breezy; urgency=low ++ ++ * Fix build failures for builds with disabled testsuite. ++ * Adjust debian/rules conditionals to work with all dpkg versions. ++ * Build separate lib32stdc6-4.0-dbg/lib64stdc6-4.0-dbg packages. ++ * Add the debugging symbols of the optimzed libstdc++ build in the ++ lib*stdc++6-dbg packages as well. ++ * Build a libgcj6-dbg package. ++ * Update to CVS 20050522, taken from the gcc-4_0-branch. ++ * Add Ada support for the ppc64 architecture (Andreas Jochens): ++ * debian/patches/ppc64-ada.dpatch ++ - Add gcc/ada/system-linux-ppc64.ads, which has been copied from ++ gcc/ada/system-linux-ppc.ads and changed to use 'Word_Size' 64 ++ instead of 32. ++ - gcc/ada/Makefile.in: Use gcc/ada/system-linux-ppc64.ads on powerpc64. ++ * debian/rules.patch ++ - Use ppc64-ada patch on ppc64. ++ * debian/rules.d/binary-ada.mk ++ Place the symlinks libgnat.so, libgnat-4.0.so, libgnarl.so, ++ libgnarl-4.0.so in '/usr/lib' instead of '/adalib'. ++ Closes: #308948. ++ * Add libc6-dev-i386 as an alternative build dependency for amd64. ++ Closes: #305690. ++ ++ -- Matthias Klose Sun, 22 May 2005 22:14:20 +0200 ++ ++gcc-4.0 (4.0.0-7ubuntu6) breezy; urgency=low ++ ++ * Don't trust dpkg-architecture (1.13.4), it "hurds" ... ++ ++ -- Matthias Klose Wed, 18 May 2005 11:36:38 +0200 ++ ++gcc-4.0 (4.0.0-7ubuntu5) breezy; urgency=low ++ ++ * libgcj6-dev: Don't provide libgcj-dev. ++ ++ -- Matthias Klose Wed, 18 May 2005 00:30:32 +0000 ++ ++gcc-4.0 (4.0.0-7ubuntu4) breezy; urgency=low ++ ++ * Update to CVS 20050517, taken from the gcc-4_0-branch. ++ * Apply proposed patch for PR21293. ++ ++ -- Matthias Klose Tue, 17 May 2005 23:05:40 +0000 ++ ++gcc-4.0 (4.0.0-7ubuntu2) breezy; urgency=low ++ ++ * Update to CVS 20050515, taken from the gcc-4_0-branch. ++ ++ -- Matthias Klose Sun, 15 May 2005 23:48:00 +0200 ++ ++gcc-4.0 (4.0.0-7ubuntu1) breezy; urgency=low ++ ++ * Synchronize with Debian. ++ ++ -- Matthias Klose Mon, 9 May 2005 19:35:29 +0200 ++ ++gcc-4.0 (4.0.0-7) experimental; urgency=low ++ ++ * Update to CVS 20050509, taken from the gcc-4_0-branch. ++ * Remove the note from the fastjar package description, stating, that ++ fastjar is incomplete compared to the "standard" jar utility. ++ * Fix typo in build depends. dpkg-checkbuilddeps doesn't like a comma ++ inside []. ++ * Tighten shlibs dependencies to require the current version. ++ ++ -- Matthias Klose Mon, 9 May 2005 19:02:03 +0200 ++ ++gcc-4.0 (4.0.0-6) experimental; urgency=low ++ ++ * Update to CVS 20050508, taken from the gcc-4_0-branch. ++ ++ -- Matthias Klose Sun, 8 May 2005 14:08:28 +0200 ++ ++gcc-4.0 (4.0.0-5ubuntu1) breezy; urgency=low ++ ++ * Temporarily disable the i386 biarch build. Remove the amd64-libs-dev ++ build dependency, add (build-)conflict (<= 1.1ubuntu1). ++ ++ -- Matthias Klose Sat, 7 May 2005 16:56:21 +0200 ++ ++gcc-4.0 (4.0.0-5) breezy; urgency=low ++ ++ * gnat-3.3 and gnat-4.0 are alternative build dependencies (closes: #308002). ++ * Update to CVS 20050507, taken from the gcc-4_0-branch. ++ * gcj-4.0: Install gjnih. ++ * Add libgcj buffer strategy framework (Thomas Fitzsimmons), needed for OOo2. ++ Backport from 4.1. ++ * Fix all lintian errors and most of the warnings. ++ ++ -- Matthias Klose Sat, 7 May 2005 12:26:15 +0200 ++ ++gcc-4.0 (4.0.0-4) breezy; urgency=low ++ ++ * Still prefer gnat-3.3 over gnat-4.0 as a build dependency. ++ ++ -- Matthias Klose Fri, 6 May 2005 22:30:43 +0200 ++ ++gcc-4.0 (4.0.0-3) breezy; urgency=low ++ ++ * Update to CVS 20050506, taken from the gcc-4_0-branch. ++ * Update priority of java alternatives to 40. ++ * Move gcj-dbtool to gij package, move the default classmap.db to ++ /var/lib/gcj-4.0/classmap.db. Create it in the postinst. ++ * Fix gcc-4.0-hppa64 postinst (closes: #307762). ++ * Fix gcc-4.0-hppa64, gij-4.0 and gcj-4.0 postinst, to not ignore errors ++ from update-alternatives. ++ * Fix gcc-4.0-hppa64, fastjar, gij-4.0 and gcj-4.0 prerm, ++ to not ignore errors from update-alternatives. ++ ++ -- Matthias Klose Fri, 6 May 2005 17:50:58 +0200 ++ ++gcc-4.0 (4.0.0-2) experimental; urgency=low ++ ++ * GCC 4.0.0 release. ++ * Update to CVS 20050503, taken from the gcc-4_0-branch. ++ * Add gnat-4.0 as an alternative build dependency (closes: #305690). ++ ++ -- Matthias Klose Tue, 3 May 2005 15:41:26 +0200 ++ ++gcc-4.0 (4.0.0-1) experimental; urgency=low ++ ++ * GCC 4.0.0 release. ++ ++ -- Matthias Klose Sun, 24 Apr 2005 11:28:42 +0200 ++ ++gcc-4.0 (4.0ds11-0pre11) breezy; urgency=low ++ ++ * CVS 20050413, taken from the gcc-4_0-branch. ++ * Add proposed patches for PR20126, PR20490, PR20929. ++ ++ -- Matthias Klose Wed, 13 Apr 2005 09:43:00 +0200 ++ ++gcc-4.0 (4.0ds10-0pre10) experimental; urgency=low ++ ++ * gcc-4.0.0-20050410 release candidate 1, built from the prerelease tarball. ++ - C++ fix for "optimizer breaks function inlining". Closes: #302989. ++ * Append the GCC version to the fastjar/grepjar version string. ++ * Use short file names in the libstdc++ docs (closes: #301140). ++ * Fix libstdc++-dbg dependencies (closes: #303866). ++ ++ -- Matthias Klose Mon, 11 Apr 2005 13:16:01 +0200 ++ ++gcc-4.0 (4.0ds9-0pre9) experimental; urgency=low ++ ++ * CVS 20050326, taken from the gcc-4_0-branch. ++ * Reenable Ada on ia64. ++ * Build libgnat on hppa, sparc, s390 again. ++ * ppc64 support (Andreas Jochens): ++ * debian/control.m4 ++ - Add libc6-dev-powerpc [ppc64] to the Build-Depends. ++ - Change the Description for lib32gcc1: s/ia32/32 bit Version/ ++ * debian/rules.defs ++ - Define 'biarch_ia32' for ppc64 to use the same 32 bit multilib ++ facilities as amd64. ++ * debian/rules.d/binary-gcc.mk ++ - Correct an error in the 'files_gcc' definition for biarch_ia32 ++ (replace '64' by '32'). ++ * debian/rules2 ++ - Do not use '--disable-multilib' on powerpc64-linux. ++ Use '--disable-nof --disable-softfloat' instead. ++ * debian/rules.d/binary-libstdcxx.mk ++ - Put the 32 bit libstdc++ files in '/usr/lib32'. ++ * debian/rules.patch ++ - Apply 'ppc64-biarch' patch on ppc64. ++ * debian/patches/ppc64-biarch.dpatch ++ - MULTILIB_OSDIRNAMES: Use /lib for native 64 bit libraries and ++ /lib32 for 32 bit libraries. ++ - Add multilib handling to src/config-ml.in (taken from ++ amd64-biarch.dpatch). ++ * Rename biarch_ia32 to biarch32, as suggsted by Andreas. ++ * Use /bin/dash on hppa. ++ * Reenable the build of the hppa64 compiler. ++ * Enable parallel builds by defaults (set environment variale USE_NJOBS=no ++ or USE_NJOBS= to modify the default, which is to use the ++ number of available processors). ++ ++ -- Matthias Klose Sat, 26 Mar 2005 19:07:30 +0100 ++ ++gcc-4.0 (4.0ds8-0pre8) experimental; urgency=low ++ ++ * CVS 20050322, taken from the gcc-4_0-branch. ++ - Add proposed fix for PR19406. ++ * Configure --with-gtk-cairo only if version 0.3.0 is found. ++ * Split out gcc-4.0-locales package. Better chance of getting ++ bug reports in english language. ++ ++ -- Matthias Klose Tue, 22 Mar 2005 14:20:24 +0100 ++ ++gcc-4.0 (4.0ds7-0pre7) experimental; urgency=low ++ ++ * CVS 20050304, taken from the gcc-4_0-branch. ++ * Build the treelang compiler. ++ ++ -- Matthias Klose Fri, 4 Mar 2005 21:29:56 +0100 ++ ++gcc-4.0 (4.0ds6-0pre6ubuntu6) hoary; urgency=low ++ ++ * Fix lib32gcc1 symlink on amd64. Ubuntu #7099. ++ ++ -- Matthias Klose Thu, 3 Mar 2005 00:17:26 +0100 ++ ++gcc-4.0 (4.0ds6-0pre6ubuntu5) hoary; urgency=low ++ ++ * Add patch from PR20160, avoid creating archives with components ++ that have duplicate basenames. ++ ++ -- Matthias Klose Wed, 2 Mar 2005 14:22:04 +0100 ++ ++gcc-4.0 (4.0ds6-0pre6ubuntu4) hoary; urgency=low ++ ++ * CVS 20050301, taken from the gcc-4_0-branch. ++ Test builds on i386, amd64, powerpc, ia64, check libgcc_s.so.1. ++ * Add fastjar-4.0 binary and manpage. Some java packages append it ++ for all java related tools. ++ * Add libgcj6-src package for source code availability in IDE's. ++ * On hppa, disable the build of the hppa64 cross compiler, disable ++ java, disable running the testsuite (request by Lamont). ++ * On amd64, lib32gcc1 replaces ia32-libs.openoffice.org (<< 1ubuntu3). ++ * Build-Depend on libcairo1-dev, configure with --enable-gtk-cairo. ++ Work around libtool problems install libjawt. ++ Install jawt header files in libgcj6-dev. ++ * Add workaround for PR debug/19769. ++ ++ -- Matthias Klose Tue, 1 Mar 2005 11:26:19 +0100 ++ ++gcc-4.0 (4.0ds5-0pre6ubuntu3) hoary; urgency=low ++ ++ * Drop libgmp3-dev (<< 4.1.4-3) as an alterntative build dependency. ++ ++ -- Matthias Klose Thu, 10 Feb 2005 15:16:27 +0100 ++ ++gcc-4.0 (4.0ds5-0pre6ubuntu2) hoary; urgency=low ++ ++ * Disable Ada for powerpc. ++ ++ -- Matthias Klose Wed, 9 Feb 2005 16:47:07 +0100 ++ ++gcc-4.0 (4.0ds5-0pre6ubuntu1) hoary; urgency=low ++ ++ * Avoid build dependency on type-handling. ++ * Install 32bit libs on amd64 in /lib32 and /usr/lib32. ++ ++ -- Matthias Klose Wed, 9 Feb 2005 08:27:21 +0100 ++ ++gcc-4.0 (4.0ds5-0pre6) experimental; urgency=low ++ ++ * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050208. ++ * Build-depend on graphviz (moved to main), remove the pregenerated ++ libstdc++ docs from the diff. ++ * Fix PR19162, libobjc build failure on arm-linux (closes: #291497). ++ ++ -- Matthias Klose Tue, 8 Feb 2005 11:47:31 +0000 ++ ++gcc-4.0 (4.0ds4-0pre5) experimental; urgency=low ++ ++ * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050125. ++ * Call the 4.0 gcx versions in the java wrappers (closes: #291075). ++ * Correctly install libgij (closes: #291077). ++ * libgcj6-dev: Add conflicts to other libgcj-dev packages (closes: #290950). ++ ++ -- Matthias Klose Mon, 24 Jan 2005 23:59:54 +0100 ++ ++gcc-4.0 (4.0ds3-0pre4) experimental; urgency=low ++ ++ * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050115. ++ * Update cross build patches (Nikita V. Youshchenko). ++ * Enable Ada on i386, amd64, mips, mipsel, powerpc, sparc, s390. ++ Doesn't yet bootstrap on alpha, hppa, ia64. ++ ++ -- Matthias Klose Sat, 15 Jan 2005 18:44:03 +0100 ++ ++gcc-4.0 (4.0ds2-0pre3) experimental; urgency=low ++ ++ * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041224. ++ ++ -- Matthias Klose Wed, 22 Dec 2004 00:31:44 +0100 ++ ++gcc-4.0 (4.0ds1-0pre2) experimental; urgency=low ++ ++ * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041205. ++ * Lot's of merges and updates from the gcc-3.4 packages. ++ ++ -- Matthias Klose Sat, 04 Dec 2004 12:14:51 +0100 ++ ++gcc-4.0 (4.0ds0-0pre1) experimental; urgency=low ++ ++ * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041114. ++ - Addresses many issues with the libstdc++ man pages (closes: #278549). ++ * Disable Ada on hppa, ia64, mips, mipsel, powerpc, s390 and sparc, at least ++ these are known to be broken at the time of the snapshot. ++ * Minor kbsd.gnu build fixes (Robert Millan). Closes: #273004. ++ * For amd64, add missing libstdc++ files to 'libstdc++6-dev' package. ++ (Andreas Jochens). Fixes: #274362. ++ * Update libffi-mips patch (closes: #274096). ++ * Updated i386-biarch patch. Don't build 64bit libstdc++, ICE. ++ * Update sparc biarch patch. ++ * Fix symlinks for gfortran manpage (closes: #278548). ++ * Update cross build patches (Nikita V. Youshchenko). ++ * Update Ada patches (Ludovic Brenta). ++ ++ -- Matthias Klose Sat, 13 Nov 2004 10:38:25 +0100 ++ ++gcc-4.0 (4.0-0pre0) experimental; urgency=low ++ ++ * gcc-4.0 snapshot, taken from the HEAD branch CVS 20040912. ++ ++ * Matthias Klose ++ ++ - Integrate accumulated packaging patches from gcc-3.4. ++ - Rename libstdc++6-* packages to libstdc++6-4-* (closes: #261693). ++ - libffi4-dev: conflict with libffi3-dev (closes: #265939). ++ ++ * Robert Millan ++ ++ * control.m4: ++ - s/locale_no_archs !hurd-i386/locale_no_archs/g ++ (This is now handled in rules.defs. [1]) ++ - s/procps [check_no_archs]/procps [linux_gnu_archs]/g [2] ++ - Add type-handling to build-deps. [3] ++ * rules.conf: ++ - Don't require (>= $(libc_ver)) for libc0.1-dev. [4] ++ - Generate *_no_archs variables with type-handling and use them for ++ for m4's -D parameters. [3] ++ * rules.defs: ++ - use filter instead of findstring [1]. ++ - s/netbsd-elf-gnu/netbsdelf-gnu/g [5]. ++ - enable java for kfreebsd-gnu [6] ++ - enable ffi for kfreebsd-gnu and knetbsd-gnu [6] ++ - enable libgc for kfreebsd-gnu [6] ++ - enable checks for kfreebsd-gnu and knetbsd-gnu [7] ++ - enable locales for kfreebsd-gnu and gnu [1] [8]. ++ * Closes: #264025. ++ ++ -- Matthias Klose Sun, 12 Sep 2004 12:52:56 +0200 ++ ++gcc-3.5 (3.5ds1-0pre1) experimental; urgency=low ++ ++ * gcc-3.5 snapshot, taken from the HEAD branch CVS 20040724. ++ * Install locale data with versioned package name (closes: #260497). ++ * Fix libgnat symlinks. ++ ++ -- Matthias Klose Sat, 24 Jul 2004 21:26:23 +0200 ++ ++gcc-3.5 (3.5-0pre0) experimental; urgency=low ++ ++ * gcc-3.5 snapshot, taken from the HEAD branch CVS 20040718. ++ ++ -- Matthias Klose Sun, 18 Jul 2004 12:26:00 +0200 ++ ++gcc-3.4 (3.4.1-1) experimental; urgency=low ++ ++ * gcc-3.4.1 final release. ++ - configured wth --enable-libstdcxx-allocator=mt. ++ * Fixes for generating cross compiler packages (Jeff Bailey). ++ ++ -- Matthias Klose Fri, 2 Jul 2004 22:49:05 +0200 ++ ++gcc-3.4 (3.4.0-4) experimental; urgency=low ++ ++ * gcc-3.4.1 release candidate 1. ++ * Add logic to build biarch compiler on powerpc (disabled, needs lib64c). ++ * Don't build the libg2c0 package on mipsel-linux (no clear answer on ++ debian-mips, if the libg2c0's built by gcc-3.3 and gcc-3.4 are compatible ++ (post-sarge issue). ++ * Don't use gcc-2.95 as bootstrap compiler on m68k anymore. ++ ++ -- Matthias Klose Sat, 26 Jun 2004 22:40:20 +0200 ++ ++gcc-3.4 (3.4.0-3) experimental; urgency=low ++ ++ * Update to gcc-3.4 CVS 20040613. ++ * On sparc, set the the build target to sparc64-linux, build with ++ switch defaulting to code generation for v7. To generate code for ++ sparc64, use the -m64 switch. ++ * Add missing doc-base files to -doc packages. ++ * Add portability patches and kbsd-gnu patch (Robert Millan). ++ Closes: #251293, #251294. ++ * Apply fixes for cross build (Nikita V. Youshchenko). ++ * Do not include the precompiled libstdc++ header files into the -dev ++ package (still experimental). Closes: #251707. ++ * Reflect renaming of Ada user's guide. ++ * Move AWT peer libraries for libgcj into it's own package (fixes: #247791). ++ ++ -- Matthias Klose Mon, 14 Jun 2004 00:03:18 +0200 ++ ++gcc-3.4 (3.4.0-2) experimental; urgency=low ++ ++ * Update to gcc-3.4 CVS 20040516. ++ * Do not provide the /usr/hppa64-linux/include in the gcc-hppa64 package, ++ migrated to libc6-dev. Adjust dependencies. ++ * Integrate gpc test results into the GCC test summary. ++ * gnatchop calls gcc-3.4 (closes: #245438). ++ * debian/locale-gen.sh: Update for recent libstdc+++ testsuite. ++ * debian/copyright: Add libstdc++-v3's exception clause. ++ * Add libffi update for mips (Thiemo Seufer). ++ * Reference Debian specific bug reporting instructions. ++ * Update README.Bugs. ++ * Fix FTBFS for libstdc++-doc. ++ * Update libjava patch for hppa (Randolph Chung). ++ * Fix installation of ffitarget.h header file. ++ * On amd64-linux, configure --without-multilib, disable Ada. ++ ++ -- Matthias Klose Sun, 16 May 2004 07:53:39 +0200 ++ ++gcc-3.4 (3.4.0-1) experimental; urgency=low ++ ++ * gcc-3.4.0 final release. ++ ++ * Why experimental? ++ - Do not interfer with packages currently built from gcc-3.3 sources, ++ i.e. libgcc1, libobjc1, libffi2, libffi2-dev, libg2c0. ++ - Biarch sparc compiler doesn't built yet. ++ - Use of configure flags affecting binary ABI's not yet determined. ++ - Several ABI bugs have been fixed. Unfortunately, these changes will break ++ binary compatibility with earlier releases on several architectures: ++ alpha, mips, sparc, ++ - hppa and m68k changed sjlj based exception handling to dwarf2 based ++ exception handling. ++ ++ See NEWS.html or http://gcc.gnu.org/gcc-3.4/changes.html for more ++ specific information. ++ ++ -- Matthias Klose Tue, 20 Apr 2004 20:54:56 +0200 ++ ++gcc-3.4 (3.4ds3-0pre4) experimental; urgency=low ++ ++ * Update to gcc-3.4 CVS 20040403. ++ * Add gpc tarball, gpc patches for 3.4 (Waldek Hebisch). ++ * Reenable sparc-biarch patches (closes: #239856). ++ * Build the shared libgnat library, needed to fix FTBFS for some ++ Ada library packages (Ludovic Brenta). ++ Currently enabled for hppa, i386, ia64. ++ ++ -- Matthias Klose Sat, 3 Apr 2004 08:47:55 +0200 ++ ++gcc-3.4 (3.4ds1-0pre2) experimental; urgency=low ++ ++ * Update to gcc-3.4 CVS 20040320. ++ * For libstdc++6-doc, add a conflict to libstdc++5-3.3-doc (closes: #236560). ++ * For libstdc++6-dbg, add a conflict to libstdc++5-3.3-dbg (closes: #236798). ++ * Reenable s390-biarch patches. ++ * Update the cross compiler build files (Nikita V. Youshchenko). ++ ++ -- Matthias Klose Sat, 20 Mar 2004 09:15:10 +0100 ++ ++gcc-3.4 (3.4ds0-0pre1) experimental; urgency=low ++ ++ * Start gcc-3.4 packaging, get rid of the epoch for most of the ++ packages. ++ ++ -- Matthias Klose Sun, 22 Feb 2004 16:00:03 +0100 ++ ++gcc-3.3 (1:3.3.3ds6-6) unstable; urgency=medium ++ ++ * Update to gcc-3_3-branch CVS 20040401. ++ - Fixed ICE in emit_move_insn_1 on legal code (closed: #223215). ++ - Fix PR 14755, miscompilation of loops with bitfield counter. ++ Closes: #241255. ++ - Fix PR 16040, crash in function initializing const data with ++ reinterpret_cast-ed pointer-to-member function crashes (closes: #238621). ++ - Remove patches integrated upstream. ++ * Reenable build of gpidump on powerpc and s390. ++ ++ -- Matthias Klose Thu, 1 Apr 2004 23:51:54 +0200 ++ ++gcc-3.3 (1:3.3.3ds6-5) unstable; urgency=medium ++ ++ * Update to gcc-3_3-branch CVS 20040321. ++ - Fix PR target/13889 (ICE on valid code on m68k). ++ * Fix FTFBS on s390. Do not build gpc's gpidump on s390. ++ * Reenable gpc on arm. ++ ++ -- Matthias Klose Mon, 22 Mar 2004 07:37:26 +0100 ++ ++gcc-3.3 (1:3.3.3ds6-4) unstable; urgency=low ++ ++ * Update to gcc-3_3-branch CVS 20040320. ++ - Revert patch for PR14640 (with this, at least mozilla-firefox was ++ miscompiled on x86 (closes: #238621). ++ * Update the gpc tarball (there were two releases with the same name ...). ++ * Reenable gpc on alpha and ia64. ++ ++ -- Matthias Klose Sat, 20 Mar 2004 07:39:24 +0100 ++ ++gcc-3.3 (1:3.3.3ds5-3) unstable; urgency=low ++ ++ * Update to gcc-3_3-branch CVS 20040314. ++ - Fixes miscompilation with -O -funroll-loops on powerpc (closes: #229567). ++ - Fix ICE in dwarf-2 on code using altivec (closes: #203835). ++ * Update hurd-changes patch. ++ * Add libgcj4-dev as a recommendation for gcj (closes: #236547). ++ * debian/copyright: Added exemption to static linking of libgcc. ++ ++ * Phil Blundell: ++ - debian/patches/arm-ldm.dpatch, debian/patches/arm-gotoff.dpatch: Update. ++ ++ -- Matthias Klose Sun, 14 Mar 2004 09:56:06 +0100 ++ ++gcc-3.3 (1:3.3.3ds5-2) unstable; urgency=low ++ ++ * Update to gcc-3_3-branch CVS 20040306. ++ - Fixes bootstrap comparision error on ia64. ++ - Allows ghc build with gcc-3.3. ++ - On amd64, don't imply 3DNow! for -m64 by default. ++ - Some arm specific changes ++ - Fix C++/13944: exception in constructor of a class to be thrown is not ++ caught. Closes: #228099. ++ * Enable the build of gcc-3.3-hppa64 on hppa. ++ Add symlinks for as and ld to point to hppa64-linux-{as,ld}. ++ * gcj-3.3 depends on g++-3.3, recommends gij-3.3. gij-3.3 suggests gcj-3.3. ++ * Fix libgc2c-pic compatibility links (closes: #234333). ++ The link will be removed for gcc-3.4. ++ * g77-3.3: Conflict with other g77-x.y packages. ++ * Tighten shlibs dependencies to latest released versions. ++ ++ * Phil Blundell: ++ - debian/patches/arm-233633.dpatch: New Fixes problems with half-word ++ loads on ARMv3 architecture. (Closes: #233633) ++ - debian/patches/arm-ldm.dpatch: New. Avoids inefficient epilogue for ++ leaf functions in PIC code on ARM. ++ ++ -- Matthias Klose Sat, 6 Mar 2004 10:57:14 +0100 ++ ++gcc-3.3 (1:3.3.3ds5-1) unstable; urgency=medium ++ ++ * gcc-3.3.3 final release. ++ See /usr/share/doc/gcc-3.3/NEWS.{gcc,html}. ++ ++ -- Matthias Klose Mon, 16 Feb 2004 08:59:52 +0100 ++ ++gcc-3.3 (1:3.3.3ds4-0pre4) unstable; urgency=low ++ ++ * Update to gcc-3.3.3 CVS 20040214 (2nd gcc-3.3.3 prerelease). ++ * Fix title of libstdc++'s html main index (closes: #196381). ++ * Move libg2c libraray files out of the gcc specific libdir to /usr/lib. ++ For g77-3.3 add conflicts to other g77 packages. Closes: #224848. ++ * Update the stack protector patch to 3.3-7, but don't apply it by default. ++ Closes: #230338. ++ * On arm, use arm6 as the cpu default (backport from mainline, PR12527). ++ * Add libffi and libjava support for hppa (Randolph Chung). Closes: #232615. ++ ++ -- Matthias Klose Sat, 14 Feb 2004 09:26:15 +0100 ++ ++gcc-3.3 (1:3.3.3ds3-0pre3) unstable; urgency=low ++ ++ * Update to gcc-3.3.3 CVS 20040125. ++ - Fixed PR11350, undefined labels with -Os -fPIC (closes: #195911). ++ - Fixed PR11793, ICE in extract_insn, at recog.c (closes: #203835). ++ - Fixed PR13544, removed backport for PR12862. ++ - Integrated backport for PR12441. ++ * Fixed since 3.3: java: not implemented interface methods of abstract ++ classes not found (closes: #225438). ++ * Disable pascal on arm architecture (currently broken). ++ * Update the build files to build a cross compiler (Nikita V. Youshchenko). ++ See debian/README.cross in the source package. ++ * Apply revised patch to make -mieee the default on alpha-linux, ++ and add -mieee-disable switch to turn the default off (closes: #212912). ++ (Tyson Whitehead) ++ ++ -- Matthias Klose Sun, 25 Jan 2004 17:41:04 +0100 ++ ++gcc-3.3 (1:3.3.3ds2-0pre2) unstable; urgency=medium ++ ++ * Update to gcc-3.3.3 CVS 20040110. ++ - Fixes compilation not terminating at -O1 on hppa (closes: #207516). ++ * Add backport to fix PR12441 (closes: #224576). ++ * Revert backport to 3.3 branch to fix PR12862, which introduced another ++ regression (PR13544). Closes: #225663. ++ * Tighten dependency of gnat-3.3 on gcc-3.3 (closes: #226273). ++ * Disable treelang build for cross compiler build. ++ * Disable pascal on alpha and ia64 architectures (currently broken). ++ ++ -- Matthias Klose Sat, 10 Jan 2004 12:33:59 +0100 ++ ++gcc-3.3 (1:3.3.3ds1-0pre1) unstable; urgency=low ++ ++ * Update to gcc-3.3.3 CVS 20031229. ++ - Fixes bootstrap error on ia64-linux. ++ - Fix -pthread on mips{,el}-linux (closes: #224875). ++ - Fix -Wformat for C++ (closes: #217075). ++ * Backport from mainline: Preserve inline-ness when redeclaring ++ a function template (closes: #195264). ++ * Add missing intrinsics headers on ix86 (closes: #224593). ++ * Fix location of libg2c libdir in libg2c.la file (closes: #224848). ++ ++ -- Matthias Klose Mon, 29 Dec 2003 10:36:29 +0100 ++ ++gcc-3.3 (1:3.3.3ds0-0pre0.1) unstable; urgency=high ++ ++ * NMU ++ * Fixed mips(el) spec file for -pthread: (Closes: #224875) ++ * [debian/patches/mips-pthread.dpatch] New. ++ * [debian/rules.patch] Added it to debian_patches. ++ ++ -- J.H.M. Dassen (Ray) Sat, 27 Dec 2003 15:51:47 +0100 ++ ++gcc-3.3 (1:3.3.3ds0-0pre0) unstable; urgency=low ++ ++ * Update to gcc-3.3.3 CVS 20031206. ++ - Fixes ICE in verify_local_live_at_start (hppa). Closes: #201550. ++ - Fixes miscompilation of linux-2.6/sound/core/oss/rate.c. ++ Closes: #219949. ++ * Add missing unwind.h to gcc package (closes: #220846). ++ * Regenerate control file to fix build dependencies for m68k. ++ * More gpc only patches to fix test failures on m68k. ++ * Reenable gpc for the Hurd (closes: #189851). ++ ++ -- Matthias Klose Sat, 6 Dec 2003 10:29:07 +0100 ++ ++gcc-3.3 (1:3.3.2ds5-4) unstable; urgency=low ++ ++ * Update libffi-dev package description (closes: #219508). ++ * For gij and libgcj fix dependency on the libstdc++ package, if ++ the latter isn't installed during the build. ++ * Apply patch to emit .note.GNU-stack section on linux arches ++ which by default need executable stack. ++ * Prefer gnat-3.3 over gnat-3.2 as a build dependency. ++ * Update the pascal tarball (different version released with the ++ same name). ++ * Add pascal patches to address various gpc testsuite failures. ++ On alpha and ia64, build gpc from the 20030830 version. Reenable ++ the build on m68k. ++ Remove the 20030507 gpc version from the tarball. ++ * Apply patch to build the shared ada libs and link the ada tools ++ against the shared libs. Not enabled by default, because gnat ++ and gnatlib are rebuilt during install. (Ludovic Brenta) ++ ++ -- Matthias Klose Sun, 9 Nov 2003 22:34:33 +0100 ++ ++gcc-3.3 (1:3.3.2ds4-3) unstable; urgency=low ++ ++ * Fix rules to omit inclusion of gnatpsta in mips(el) gnat package. ++ ++ -- Matthias Klose Sun, 2 Nov 2003 14:29:59 +0100 ++ ++gcc-3.3 (1:3.3.2ds4-2) unstable; urgency=medium ++ ++ * s390-ifcvt patch added. Fixes gcl miscompilation (closes: #217240). ++ (Gerhard Tonn) ++ * Fix an infinite loop in g++ compiling lufs, regression from 3.3.1. ++ * Fix a wrong code generation bug on alpha. ++ (Falk Hueffner) ++ * Update NEWS files. ++ * Add Falk Hueffner to the Debian GCC maintainers. ++ * Enable ada on mips and mipsel, but don't build the gnatpsta tool. ++ ++ -- Matthias Klose Wed, 29 Oct 2003 00:12:37 +0100 ++ ++gcc-3.3 (1:3.3.2ds4-1) unstable; urgency=medium ++ ++ * Update to gcc-3.3.2. ++ * Update NEWS files. ++ * Miscompilation in the pari package at -O3 fixed (closes: #198172). ++ * On alpha-linux, revert -mieee as the default (Falk Hueffner). ++ Reopens: #212912. ++ * Add ia64-unwind patch (Jeff Bailey). ++ * Closed reports reported against gcc-2.96 (ia64), fixed at least in gcc-3.3: ++ - ICE in verify_local_live_at_start, at flow.c:2733 (closes: #135404). ++ - Compilation failure of stlport (closes: #135224). ++ - Infinite loop compiling cssc's pfile.cc with -O2 (closes: #115390). ++ - Added missing some string::compare() members (closes: #141199). ++ - header declares std::pow (closes: #161853). ++ - does have at() method (closes: #59776). ++ - Fixed error in stl_deque.h (closes: #69530). ++ - Fixed problem with bastring (closes: #75759, #96539). ++ - bad_alloc and std:: namespace problem (closes: #75120). ++ - Excessive warnings from headers with -Weffc++ (closes: #76827). ++ ++ -- Matthias Klose Fri, 17 Oct 2003 08:07:01 +0200 ++ ++gcc-3.3 (1:3.3.2ds3-0pre5) unstable; urgency=low ++ ++ * Update to gcc-3.3.2 CVS 20031005. ++ - Fixes cpp inserting a spurious newline (closes: #210478, #210482). ++ - Fixes generation of unrecognizable insn compiling kernel source ++ on alpha (closes: #202762). ++ - Fixes ICE in add_abstract_origin_attribute (closes: #212406). ++ - Fixes forward declaration in libstdc++ (closes: #209386). ++ - Fixes ICE in in extract_insn, at recog.c on alpha (closes: #207564). ++ * Make libgcj-common architecture all (closes: #211909). ++ * Build depend on: flex-old | flex (<< 2.5.31). ++ * Fix spec linking libraries with -pthread on powerpc (closes: #211054). ++ * debian/patches/arm-gotoff.dpatch: fix two kinds of PIC lossage. ++ (Phil Blundell) ++ * debian/patches/arm-common.dpatch: fix excessive alignment of common ++ blocks causing binutils testsuite failures. ++ (Phil Blundell) ++ * Update priorities in debian/control to match the archive. ++ (Ryan Murray) ++ * s390-nonlocal-goto patch added. Fixes some pascal testcase failures. ++ (Gerhard Tonn) ++ * On alpha-linux, make -mieee default and add -mieee-disable switch ++ to turn default off (closes: #212912). ++ (Tyson Whitehead) ++ * Add gpc upstream patch for memory corruption fix. ++ ++ -- Matthias Klose Sun, 5 Oct 2003 19:53:49 +0200 ++ ++gcc-3.3 (1:3.3.2ds2-0pre4) unstable; urgency=low ++ ++ * Add gcc-unsharing_lhs patch (closes: #210848) ++ ++ -- Ryan Murray Fri, 19 Sep 2003 22:51:19 -0600 ++ ++gcc-3.3 (1:3.3.2ds2-0pre3) unstable; urgency=low ++ ++ * Update to gcc-3.3.2 CVS 20030908. ++ * PR11716 (Michael Eager, Dan Jacobowitz): ++ Make GCC think that the maximum length of a short branch is ++ 64K instead of 128K. It's a big hammer, but it works. ++ Closes: #207915. ++ * Downgrade gpc to 20030507 on alpha and ia64 (closes: #208717). ++ ++ -- Matthias Klose Mon, 8 Sep 2003 21:49:52 +0200 ++ ++gcc-3.3 (1:3.3.2ds1-0pre2) unstable; urgency=low ++ ++ * Update to gcc-3.3.2 CVS 20030831. ++ - Fix java NullPointerException detection with 2.6 kernels. ++ Closes: #206377. ++ - Fix bug in C++ typedef handling (closes: #205402). ++ - Fix -Wunreachable-code giving false complaints (closes: #196600). ++ * Update to gpc-20030830. ++ * Don't include /usr/share/java/repository into the class path according ++ to the new version of th Debian Java policy (closes: #205643). ++ * Build-Depend/Depend on libgc-dev. ++ ++ -- Matthias Klose Sun, 31 Aug 2003 08:56:53 +0200 ++ ++gcc-3.3 (1:3.3.2ds0-0pre1) unstable; urgency=low ++ ++ * Remove the build dependency on locales for now. ++ ++ -- Matthias Klose Fri, 15 Aug 2003 07:48:18 +0200 ++ ++gcc-3.3 (1:3.3.2ds0-0pre0) unstable; urgency=medium ++ ++ * Update to gcc-3.3.2 CVS 20030812. ++ - Fixes generation of wrong code for XDM-AUTHORIZATION-1 key generation ++ and/or validation. Closes: #196090. ++ * Update NEWS files. ++ * Change ix86 default CPU type for code generation: ++ - i386-linux -> i486-linux ++ - i386-gnu -> i586-gnu ++ - i386-freebsd-gnu -> i486-freebsd-gnu ++ Use -march=i386 to target i386 CPUs. ++ ++ -- Matthias Klose Tue, 12 Aug 2003 10:31:28 +0200 ++ ++gcc-3.3 (1:3.3.1ds3-1) unstable; urgency=low ++ ++ * gcc-3.3.1 (taken from CVS 20030805). ++ - C++: Fix declaration conflicts (closes: #203351). ++ - Fix ICE on ia64 (closes: #203840). ++ ++ -- Matthias Klose Tue, 5 Aug 2003 20:38:02 +0200 ++ ++gcc-3.3 (1:3.3.1ds2-0rc2) unstable; urgency=low ++ ++ * Update to gcc-3.3.1 CVS 20030728. ++ - Fix ICE in extract_insn, at recog.c:2148 on m68k. ++ Closes: #177840, #180375, #190818. ++ - Fix ICE while building libquicktime on alpha (closes: #192576). ++ - Fix failure to deal with using and private inheritance (closes: #202696). ++ * On sparc, /usr/lib was added to the library search path. Fix it. ++ * Closed reports reported against gcc-3.2.x and fixed in gcc-3.3: ++ - Fix error building the gcl package on arm (closes: #199835). ++ ++ -- Matthias Klose Mon, 28 Jul 2003 20:39:07 +0200 ++ ++gcc-3.3 (1:3.3.1ds1-0rc1) unstable; urgency=low ++ ++ * Update to gcc-3.3.1 CVS 20030722 (3.3.1 release candidate 1). ++ - Fix ICE in copy_to_mode_reg on 64-bit targets (closes: #189365). ++ - Remove documentation about multi-line strings (closes: #194391). ++ - Correctly document -falign-* parameters (closes: #198269). ++ - out-of-class specialization of a private nested template class. ++ Closes: #193830. ++ - Tighten shlibs dependency due to new symbols in libgcc. ++ * README.Debian for libg2c0, describing the need for g77-x.y when ++ working with the g2c header and library (closes: #189059). ++ * Call make with -j, if USE_NJOBS is set and non-empty ++ in the environment. ++ * Add another two m68k patches, partly replacing the workarounds provided ++ by Roman Zippel. ++ * Add the stack protector patch, but don't apply it by default. Edit ++ debian/rules.patch to apply it (closes: #171699, #189494). ++ * Remove wrong symlinks from gnat package (closes: #201882). ++ * Closed reports reported against gcc-2.95 and fixed in newer versions: ++ - SMP kernel compilation on alpha (closes: #134197, #146883). ++ - ICE on arm while building imagemagick (closes: #173475). ++ * Closed reports reported against gcc-3.2.x and fixed in gcc-3.3: ++ - Miscompilation of octave2.1 on hppa (closes: #192296, #193804). ++ ++ -- Matthias Klose Sun, 13 Jul 2003 10:26:30 +0200 ++ ++gcc-3.3 (1:3.3.1ds0-0pre0) unstable; urgency=medium ++ ++ * Update to gcc-3.3.1 CVS 20030626. ++ - Fix ICE on arm compiling xfree86 (closes: #195424). ++ - Fix ICE on arm compiling fftw (closes: #186185). ++ - Fix ICE on arm in change_address_1, affecting a few packages. ++ Closes: #197099. ++ - Fix ICE in merge_assigned_reloads building Linux 2.4.2x sched.c. ++ Closes: #195237. ++ - Do not warn about failing to inline functions declared in system headers. ++ Closes: #193049. ++ - Fix ICE on mips{,el} in propagate_one_insn (closes: #194330, #196091). ++ - Fix ICE on m68k in reg_overlap_mentioned_p (closes: #194749). ++ - Build crtbeginT.o on m68k (closes: #197613). ++ * Fix g++ man page symlink (closes: #196271). ++ * mips/mipsel: Depend on binutils (>= 2.14.90.0.4). Closes: #196744. ++ * Disable treelang on powerpc (again). Closes: #196915. ++ * Pass -encoding in gcj-wrapper. ++ ++ -- Matthias Klose Fri, 27 Jun 2003 00:14:43 +0200 ++ ++gcc-3.3 (1:3.3ds9-3) unstable; urgency=low ++ ++ * Closing more reports, fixed in 3.2/3.3: ++ - ICE building texmacs on m68k (closes: #177433). ++ - libstdc++: doesn't define trunc(...) (closes: #105285). ++ - libstdc++: setw is ignored for strings output (closes: #52382, #76645). ++ * Add build support to omit the manual pages and info docs from the ++ packages, disabled by default. Wait for a Debian statement, which can ++ be cited. Adresses: #193787. ++ * Reenable the m68k-const patch, don't run the g77 testsuite on m68k. ++ Addresses ICEs (#177840, #190818). ++ * Update arm-xscale patch. ++ * libstdc++: use __attribute__(__unknown__), instead of (unknown). ++ Closes: #195796. ++ * Build-Depend on glibc (>= 2.3.1) to prevent incorrect builds on woody. ++ Request from Adrian Bunk. ++ * Add treelang-update patch (Tim Josling), reenable treelang on powerpc. ++ * Add -{cpp,gcc,g++,gcj,g77} symlinks (addresses: #189466). ++ * Make sure not to build using binutils-2.14.90.0.[12]. ++ ++ -- Matthias Klose Mon, 2 Jun 2003 22:35:45 +0200 ++ ++gcc-3.3 (1:3.3ds9-2) unstable; urgency=medium ++ ++ * Correct autoconf-related snafu in newly added ARM patches (Phil Blundell). ++ * Correct libgcc1 dependency (closes: #193689). ++ * Work around ldd/dpkg-shlibs failure on s390x. ++ ++ -- Matthias Klose Sun, 18 May 2003 09:40:15 +0200 ++ ++gcc-3.3 (1:3.3ds9-1) unstable; urgency=low ++ ++ * gcc-3.3 final release. ++ See /usr/share/doc/gcc-3.3/NEWS.{gcc,html}. ++ * First merge of i386/x86-64 biarch support (Arnd Bergmann). ++ Disabled by default. Closes: #190066. ++ * New gpc-20030507 version. ++ * Upstream gpc update to fix netbsd build failure (closes: #191407). ++ * Add arm-xscale.dpatch, arm-10730.dpatch, arm-tune.dpatch, copied ++ from gcc-3.2 (Phil Blundell). ++ * Closing bug reports reported against older gcc versions (some of them ++ still present in Debian, but not anymore as the default compiler). ++ Usually, forwarded bug reports are linked to ++ http://gcc.gnu.org/PR ++ The upstream bug number usually can be found in the Debian reports. ++ ++ * Closed reports reported against gcc-3.1.x, gcc-3.2.x and fixed in gcc-3.3: ++ - General: ++ + GCC accepts multi-line strings without \ or " " &c (closes: #2910). ++ + -print-file-name sometimes fails (closes: #161615). ++ + ICE: reporting routines re-entered (closes: #179597, #180937). ++ + Misplaced paragraph in gcc documentation (closes: #179363). ++ + Error: suffix or operands invalid for `div' (closes: #150558). ++ + builtin memcmp() could be optimised (closes: #85535). ++ - Ada: ++ + Preelaborate, exceptions, and -gnatN (closes: #181679). ++ - C: ++ + Duplicate loop conditions even with -Os (closes: #94701). ++ + ICE (signal 11) (closes: #65686). ++ - C++: ++ + C++ error on virtual function which uses ... (closes: #165829). ++ + ICE when warning about cleanup nastiness in switch statements ++ (closes: #184108). ++ + Fails to compile virtual inheritance with variable number of ++ argument method (closes: #151357). ++ + xmmintrin.h broken for c++ (closes: #168310). ++ + Stack corruption with variable-length automatic arrays and virtual ++ destructors (closes: #188527). ++ + ICE on illegal code (closes: #184862). ++ + _attribute__((unused)) is ignored in C++ (closes: #45440). ++ + g++ handles &(void *)foo bizzarely (closes: #79225). ++ + ICE (with wrong code, though) (closes: #81122). ++ - Java: ++ + Broken zip file handling (closes: #180567). ++ - ObjC: ++ + @protocol forward definitions do not work (closes: #80468). ++ - Architecture specific: ++ - alpha ++ + va_start is off by one (closes: #186139). ++ + ICE while building kseg/ddd (closes: #184753). ++ + g++ -O2 optimization error (closes: #70743). ++ - arm ++ + ICE with -O2 in change_address_1 (closes: #180750). ++ + gcc optimization error with -O2, affecting bison (closes: #185903). ++ - hppa ++ + ICE in insn_default_length (closes: #186447). ++ - ia64 ++ + gcc-3.2 fails w/ optimization (closes: #178830). ++ - i386 ++ + unnecessary generation of instruction cwtl (closes: #95318). ++ + {athlon} ICE building mplayer (closes: #184800). ++ + {pentium4} ICE while compiling mozilla with -march=pentium4 ++ (closes: #187910). ++ + i386 optimisation: joining tests (closes: #105309). ++ - m68k ++ + ICE in instantiate_virtual_regs_1 (closes: #180493). ++ + gcc optimizer bug on m68k (closes: #64832). ++ - powerpc ++ + ICE in extract_insn, at recog.c:2175 building php3 (closes: #186299). ++ + ICE with -O -Wunreachable-code (closes: #189702). ++ - s390 ++ + Operand out of range at assembly time when using -O2 ++ (closes: #178596). ++ - sparc ++ + gcc-3.2 regression (wrong code) (closes: #176387). ++ + ICE in mem_loc_descriptor when optimizing (closes: #178909). ++ + ICE in gen_reg_rtx when optimizing (closes: #178965). ++ + Optimisation leads to unaligned access in memcpy (closes: #136659). ++ ++ * Closed reports reported against gcc-3.0 and fixed in gcc-3.2.x: ++ - General: ++ + Use mkstemp instead of mktemp (closed: #127802). ++ - Preprocessor: ++ + Fix redundant error message from cpp (closed: #100722). ++ - C: ++ + Optimization issue on ix86 (pointless moving) (closed: #97904). ++ + Miscompilation of allegro on ix86 (closed: #105741). ++ + Fix generation of ..ng references for static aliases (alpha-linux). ++ (closed: #108036). ++ + ICE compiling pari on hppa (closed: #111613). ++ + ICE on ia64 in instantiate_virtual_regs_1 (closed: #121668). ++ + ICE in c-typeck.c (closed: #123687). ++ + ICE in gen_subprogram_die on alpha (closed: #127890). ++ + SEGV in initialization of flexible char array member (closed: #131399). ++ + ICE on arm compiling lapack (closed: #135967). ++ + ICE in incomplete_type_error (closed: #140606). ++ + Fix -Wswitch (also part of -Wall) (closed: #140995). ++ + Wrong code in mke2fs on hppa (closed: #150232). ++ + sin(a) * sin(b) gives wrong result (closed: #164135). ++ - C++: ++ + Error in std library headers on arm (closed: #107633). ++ + ICE nr. 19970302 (closed: #119635). ++ + std::wcout does not perform encoding conversions (closed: #128026). ++ + SEGV, when compiling iostream.h with -fPIC (closed: #134315). ++ + Fixed segmentation fault in included code for (closed: #137017). ++ + Fix with exception handling and -O (closed: #144232). ++ + Fix octave-2.1 build failure on ia64 (closed: #144584). ++ + nonstandard overloads in num_get facet (closed: #155900). ++ + ICE in expand_end_loop with -O (closed: #158371). ++ - Fortran: ++ + Fix blas build failure on arm (closed: #137959). ++ - Java: ++ + Interface members are public by default (closed: #94974). ++ + Strange message with -fno-bounds-check in combination with -W. ++ (closed: #102353). ++ + Crash in FileWriter using IOException (closed: #116128). ++ + Fix ObjectInputStream.readObject() calling constructors. ++ (closed: #121636). ++ + gij: better error reporting on `class not found' (closed: #125649). ++ + Lockup during .java->.class compilation (closed: #141899). ++ + Compile breaks using temporary inner class instance (closed: #141900). ++ + Default constructor for inner class causes broken bytecode. ++ (closed: #141902). ++ + gij-3.2 linked against libgcc1 (closed: #165180). ++ + gij-wrapper understands -classpath parameter (closed: #146634). ++ + gij-3.2 doesn't ignore -jar when run as "java" (closed: #167673). ++ - ObjC: ++ + ICE on alpha (closed: #172353). ++ ++ * Closed reports reported against gcc-2.95 and fixed in newer versions: ++ - General: ++ + Undocumented option -pthread (closes: #165110). ++ + stdbool.h broken (closes: #167439). ++ + regparm/profiling breakage (closes: #20695). ++ + another gcc optimization error (closes: #51456). ++ + ICE in `output_fix_trunc' (closes: #55967). ++ + Fix "Unable to generate reloads for" (closes: #58219, #131890). ++ + gcc -c -MD x/y.c -o x/y.o leaves y.d in cwd (closes: #59232). ++ + Compiler error with -O2 (closes: #67631). ++ + ICE (unrecognizable insn) compiling php4 (closes: #83550, #84969). ++ + Another ICE (closes: #90666). ++ + man versus info inconsistency (-W and -Wall) (closes: #93708). ++ + ICE on invalid extended asm (closes: #136630). ++ + ICE in `emit_no_conflict_block' compiling perl (closes: #154599). ++ + ICE in `gen_tagged_type_instantiation_die'(closes: #166766). ++ + ICE on __builtin_memset(s, 0, -1) (closes: #170994). ++ + -Q option to gcc appears twice in the documentation (closes: #137382). ++ + New options for specifying targets:- -MQ and -MT (closes: #27878). ++ + Configure using --enable-nls (closes: #51651). ++ + gcc -dumpspecs undocumented (closes: #65406). ++ - Preprocessor: ++ + cpp fails to parse macros with varargs correctly(closes: #154767). ++ + __VA_ARGS__ stringification crashes preprocessor if __VA_ARGS__ is ++ empty (closes: #152709). ++ + gcc doesn't handle empty args in macro function if there is only ++ one arg(closes: #156450). ++ - C: ++ + Uncaught floating point exception causes ICE (closes: #33786). ++ + gcc -fpack-struct doesn't pack structs (closes: #64628). ++ + ICE in kernel (matroxfb) code (closes: #151196). ++ + gcc doesn't warn about unreachable code (closes: #158704). ++ + Fix docs for __builtin_return_address(closes: #165992). ++ + C99 symbols in limits.h not defined (closes: #168346). ++ + %zd printf spec generates warning, even in c9x mode (closes: #94891). ++ + Update GCC attribute syntax (closes: #12253, #43119). ++ - C++ & libstdc++-v3: ++ + template and virtual inheritance bug (closes: #152315). ++ + g++ has some troubles with nested templates (closes: #21255). ++ + vtable thunks implementation is broken (closes: #34876, #35477). ++ + ICE for templated friend (closes: #42662). ++ + ICE compiling mnemonic (closes: #42989). ++ + Deprecated: result naming doesn't work for functions defined in a ++ class (closes: #43170). ++ + volatile undefined ... (closes: #50529). ++ + ICE concerning templates (closes: #53698). ++ + Program compiled -O3 -malign-double segfaults in ofstream::~ofstream ++ (closes: #56867). ++ + __attribute__ ((constructor)) doesn't work with C++ (closes: #61806). ++ + Another ICE (closes: #65687). ++ + ICE in `const_hash' (closes: #72933). ++ + ICE on illegal code (closes: #83221). ++ + Wrong code with -O2 (closes: #83363). ++ + ICE on template class (closes: #85934). ++ + No warning for missing return in non-void member func (closes: #88260). ++ + Not a bug/fixed in libgcc1: libgcc.a symbols end up exported by ++ shared libraries (closes: #118670). ++ + ICE using nested templates (closes: #118781). ++ + Another ICE with templates (closes: #127489). ++ + More ICEs (closes: #140427, #141797). ++ + ICE when template declared after use(closes: #148603). ++ + template function default arguments are not handled (closes: #157292). ++ + Warning when including stl.h (closes: #162074). ++ + g++ -pedantic-errors -D_GNU_SOURCE cannot #include ++ (closes: #151671). ++ + c++ error message improvement suggestion (closes: #46181). ++ + Compilation error in stl_alloc.h with -fhonor-std (closes: #59005). ++ + libstdc++ has no method at() in stl_= (closes: #68963). ++ - Fortran: ++ + g77 crash (closes: #130415). ++ - ObjC: ++ + ICE: program cc1obj got fatal signal 11 (closes: #62309). ++ + Interface to garbage collector is undocumented. (closes: #68987). ++ - Architecture specific: ++ - alpha ++ + Can't compile with define gnu_source with stdio and curses ++ (closes: #97603). ++ + Header conflicts on alpha (closes: #134558). ++ + lapack-dev: cannot link on alpha (closes: #144602). ++ + ICE `fixup_var_refs_1' (closes: #43001). ++ + Mutt segv on viewing list of attachments (closes: #47981). ++ + ICE building open-amulet (closes: #48530). ++ + ICE compiling hatman (closes: #55291). ++ + dead code removal in switch() broken (closes: #142844). ++ - arm ++ + Miscompilation using -fPIC on arm (closes: #90363). ++ + infinite loop with -O on arm (closes: #151675). ++ - i386 ++ + ICE when using -mno-ieee-fp and -march=i686 (closes: #87540). ++ - m68k ++ + Optimization (-O2) broken on m68k (closes: #146006). ++ - mips ++ + g++ exception catching does not work... (closes: #105569). ++ + update-menus gets Bus Error (closes: #120333). ++ - mipsel ++ + aspell: triggers ICE on mipsel (closes: #128367). ++ - powerpc ++ + -O2 produces wrong code (gnuchess example) (closes: #131454). ++ - sparc ++ + Misleading documentation for -malign-{jump,loop,function}s ++ (closes: #114029). ++ + Sparc GCC issue with -mcpu=ultrasparc (closes: #172956). ++ + flightgear: build failure on sparc (closes: #88694). ++ ++ -- Matthias Klose Fri, 16 May 2003 07:13:57 +0200 ++ ++gcc-3.3 (1:3.3ds8-0pre9) unstable; urgency=high ++ ++ * gcc-3.3 second prerelease. ++ - Fixing exception handling on s390 (urgency high). ++ * Reenabled gpc build (I had it disabled ...). Closes: #192347. ++ ++ -- Matthias Klose Fri, 9 May 2003 07:32:14 +0200 ++ ++gcc-3.3 (1:3.3ds8-0pre8) unstable; urgency=low ++ ++ * gcc-3.3 prerelease. ++ - Fixes gcj ICE (closes: #189545). ++ * For libstdc++ use the i486 atomicity implementation, introduced with ++ 0pre6, left out in 0pre7 (closes: #191684). ++ * Add README.Debian for treelang (closes: #190812). ++ * Apply NetBSD changes (Joel Baker). Closes: #191551. ++ * New symbols in libgcc1, tighten the shlibs dependency. ++ * Disable testsuite run on mips/mipsel because of an outdated libc-dev ++ package. ++ * Do not build libffi with debug information, although configuring ++ with --enable-debug. ++ ++ -- Matthias Klose Tue, 6 May 2003 06:53:49 +0200 ++ ++gcc-3.3 (1:3.3ds7-0pre7) unstable; urgency=low ++ ++ * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030429). ++ * Revert upstream libstdc++ change (closes: #191145, #191147, #191148, ++ #191149, #149159, #149151, and other reports). ++ Sorry for not detecting this before the upload, seems to be ++ broken on i386 "only". ++ * hurd-i386: Use /usr/include, not /include. ++ * Disable gpc on hurd-i386 (closes: #189851). ++ * Disable building the debug version of libstdc++ on powerpc-linux ++ (fixes about 200 java test cases). ++ * Install libstdc++v3 man pages (closes: #127263). ++ ++ -- Matthias Klose Tue, 29 Apr 2003 23:28:44 +0200 ++ ++gcc-3.3 (1:3.3ds6-0pre6) unstable; urgency=high ++ ++ * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030426). ++ * libstdc++-doc: Fix index.html link (closes: #189424). ++ * Revert back to the i486 atomicity implementation, that was used ++ for gcc-3.2 as well. Reopens: #184446, #185662. Closes: #189983. ++ For this reason, tighten the libstdc++5 shlibs dependency. See ++ http://lists.debian.org/debian-devel/2003/debian-devel-200304/msg01895.html ++ Don't build the ix86 specfic libstdc++ libs anymore. ++ ++ -- Matthias Klose Sun, 27 Apr 2003 19:47:54 +0200 ++ ++gcc-3.3 (1:3.3ds5-0pre5) unstable; urgency=low ++ ++ * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030415). ++ * Disable treelang on powerpc. ++ * Disable gpc on m68k. ++ * Install locale data. Conflict with gcc-3.2 (<= 1:3.2.3-0pre8). ++ * Fix generated bits/atomicity.h (closes: #189183). ++ * Tighten libgcc1 shlibs dependency (new symbol _Unwind_Backtrace). ++ ++ -- Matthias Klose Wed, 16 Apr 2003 00:37:05 +0200 ++ ++gcc-3.3 (1:3.3ds4-0pre4) unstable; urgency=low ++ ++ * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030412). ++ * Avoid sparc64 dependencies for libgcc1 on sparc (Clint Adams). ++ * Make the default sparc 32bit target v8 instead of v7. This mainly ++ enables hardmul, which should speed up v8 and v9 systems by a large ++ margin (Ben Collins). ++ * Tighten binutils dependency for sparc. ++ * On i386, build libstdc++ optimized for i486 and above. The library ++ in /usr/lib is built for i386. Closes: #184446, #185662. ++ * Add gpc build (from gcc-snapshot package). ++ * debian/control: Include all packages, that _can_ be built from ++ this source package (except the cross packages). ++ * Add m68k patches: m68k-const, m68k-subreg, m68k-loop. ++ * Run the 3.3 testsuite a second time with the installed gcc-3.2 ++ to check for regressions (promised, only this time, and for the ++ final release ;). Add build dependencies (gobjc-3.2, g77-3.2, g++-3.2). ++ ++ -- Matthias Klose Sat, 12 Apr 2003 10:11:11 +0200 ++ ++gcc-3.3 (1:3.3ds3-0pre3) unstable; urgency=low ++ ++ * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030331). ++ * Reenable java on arm. ++ * Build-Depend on binutils-2.13.90.0.18-1.3 on m68k. Fixes all ++ bprob/gcov testsuite failures. ++ * Enable C++ build on arm. ++ * Enable the sparc64 build. ++ ++ -- Matthias Klose Mon, 31 Mar 2003 23:24:54 +0200 ++ ++gcc-3.3 (1:3.3ds2-0pre2) unstable; urgency=low ++ ++ * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030317). ++ * Disable building the gcc-3.3-nof package. ++ * Disable Ada on mips and mipsel. ++ * Remove the workaround to build Ada on powerpc. ++ * Add GNU Free documentation license to copyright file. ++ * Update the sparc64 build patches (Clint Adams). Not yet enabled. ++ * Disable C++ on arm (Not yet tested). ++ * Add fix for ICE on powerpc (see: #184684). ++ ++ -- Matthias Klose Sun, 16 Mar 2003 21:40:57 +0100 ++ ++gcc-3.3 (1:3.3ds1-0pre1) unstable; urgency=low ++ ++ * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030310). ++ * Add gccbug manpage. ++ * Don't build libgnat package (no shared library). ++ * Configure with --enable-sjlj-exceptions on hppa and m68k for ++ binary compatibility with libstdc++ built with gcc-3.2. ++ * Disable Java on arm-linux (never seen it sucessfully bootstrap). ++ * Install non-conflicting baseline README. ++ * multilib *.so and *.a moved to /usr/lib/gcc-lib/... , so that several ++ compiler versions can be installed concurrently. ++ * Remove libstdc++-incdir patch applied upstream. ++ * libstdc++ 64 bit development files now handled in -dev target. ++ (Gerhard Tonn) ++ * Drop build dependencies for gpc (tetex-bin, help2man, libncurses5-dev). ++ * Add libstdc++5-3.3-dev confict to libstdc++5-dev (<= 1:3.2.3-0pre3). ++ * Enable builds on m68k (all but C++ for the moment). gcc-3.3 bootstraps, ++ while gcc-3.2 doesn't. ++ ++ -- Matthias Klose Mon, 10 Mar 2003 23:41:00 +0100 ++ ++gcc-3.3 (1:3.3ds0-0pre0) unstable; urgency=low ++ ++ * First gcc-3.3 package, built for s390 only. All other architectures ++ build the gcc-3.3-base package only. ++ To build the package on other architectures, edit debian/rules.defs ++ (macro no_dummy_archs). ++ * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030301). ++ * Don't include the gcc locale files (would conflict with 3.2). ++ * Remove libffi-install-fix patch. ++ * Fix netbsd-i386 patches. ++ * Change priority of libstdc++5 and gcc-3.2-base to important. ++ * Install gcjh-wrapper for javah. ++ * gij suggests fastjar, gcj recommends fastjar. ++ * Allow builds using automake1.4 | automake (<< 1.5). ++ * Backport fix for to output more correct line numbers. ++ * Add help2man to build dependencies needed for some gpc man pages. ++ * gpc: Install binobj and gpidump binaries and man pages. ++ * Apply cross compilation patches submitted by Bastian Blank. ++ * Replace s390-biarch patch and copy s390-config-ml patch from 3.2 ++ (Gerhard Tonn). ++ * Configure using --enable-debug. ++ * Add infrastructure to only build a subset of binary packages. ++ * Rename libstdc++-{dev,dbg,pic,doc} packages. ++ * Build treelang compiler. ++ ++ -- Matthias Klose Sat, 1 Mar 2003 12:56:42 +0100 ++ ++gcc-3.2 (1:3.2.3ds2-0pre3) unstable; urgency=low ++ ++ * gcc-3.2.3 prerelease (CVS 20030228) ++ - Fixes bootstrap failure on alpha-linux. ++ - Fixes ICE on m68k (closes: #177016). ++ * Build Pascal with -O1 on powerpc, disable Pascal on arm, m68k and ++ sparc (due to wrong code generation for fwrite in glibc, ++ see PR optimization/9279). ++ * Apply cross compilation patches submitted by Bastian Blank. ++ ++ -- Matthias Klose Fri, 28 Feb 2003 20:26:30 +0100 ++ ++gcc-3.2 (1:3.2.3ds1-0pre2) unstable; urgency=medium ++ ++ * gcc-3.2.3 prerelease (CVS 20030221) ++ - Fixes ICE on hppa (closes: #181813). ++ * Patch for ffitest in s390-java.dpatch deleted, since already fixed ++ upstream. (Gerhard Tonn) ++ * Build crtbeginT.o on m68k-linux (closes: #179807). ++ * Install gcjh-wrapper for javah (closes: #180218). ++ * gij suggests fastjar, gcj recommends fastjar (closes: #179298). ++ * Allow builds using automake1.4 | automake (<< 1.5) (closes: #180048). ++ * Backport fix for to output more correct line numbers (closes: #153965). ++ * Add help2man to build dependencies needed for some gpc man pages. ++ * gpc: Install binobj and gpidump binaries and man pages. ++ * Disable gpc on arm due to wrong code generation for fwrite in ++ glibc (see PR optimization/9279). ++ ++ -- Matthias Klose Sat, 22 Feb 2003 19:58:20 +0100 ++ ++gcc-3.2 (1:3.2.3ds0-0pre1) unstable; urgency=low ++ ++ * gcc-3.2.3 prerelease (CVS 20030210) ++ - Fixes long millicode calls on hppa (closes: #180520) ++ * New gpc-20030209 version. Remove gpc-update.dpatch and gpc-testsuite.dptch ++ as they are no longer needed. ++ * Fix netbsd-i386 patches (closes: #180129, #179931) ++ * m68k-bootstrap.dpatch: backport gcse.c changes from 3.3/MAIN to 3.2 ++ * Change priority of libstdc++5 and gcc-3.2-base to important. ++ ++ -- Ryan Murray Tue, 11 Feb 2003 06:18:09 -0700 ++ ++gcc-3.2 (1:3.2.2ds8-1) unstable; urgency=low ++ ++ * gcc-3.2.2 release. ++ - Fixes ICE, regression from 2.95 (closes: #176117). ++ - Fixes ICE, regression from 2.95 (closes: #179161). ++ * libstdc++ for biarch installs now upstream to usr/lib64, ++ therefore mv usr/lib/64 usr/lib64 no longer necessary. (Gerhard Tonn) ++ ++ -- Ryan Murray Wed, 5 Feb 2003 01:35:29 -0700 ++ ++gcc-3.2 (1:3.2.2ds7-0pre8) unstable; urgency=low ++ ++ * gcc-3.2.2 prerelease (CVS 20030130). ++ * update s390 libffi patch ++ * debian/control: add myself to uploaders and change libc12-dev depends to ++ libc-dev on i386 (closes: #179128) ++ * Build-Depend on procps so that ps is available for logwatch ++ ++ -- Ryan Murray Fri, 31 Jan 2003 04:00:15 -0700 ++ ++gcc-3.2 (1:3.2.2ds6-0pre7) unstable; urgency=low ++ ++ * gcc-3.2.2 prerelease (CVS 20030128). ++ - Update needed for hppa. ++ - Fixes ICE on arm, regression from 2.95.x (closes: #168086). ++ - Can use default bison (1.875). ++ * Apply netbsd build patches (closes: #177674, #178328, #178325, ++ #178326, #178327). ++ * Run the logwatch script on "slow" architectures (arm, m68k) only. ++ * autoreconf.dpatch: Only update libtool.m4, which is newer conceptually ++ than libtool 1.4 (Ryan Murray). ++ * Apply autoreconf patch universally (Ryan Murray). ++ * More robust gij/gcj wrapper scripts, include /usr/lib/jni in default ++ JNI search path (Ben Burton). Closes: #167932. ++ * Build crtbeginT.o on m68k (closes: #177036). ++ * Fixed libc-dev source dependency (closes: #178602). ++ * Tighten shlib dependency to the current package version; should be ++ 1:3.2.2-1 for the final release (closes: #178867). ++ ++ -- Matthias Klose Tue, 28 Jan 2003 21:59:30 +0100 ++ ++gcc-3.2 (1:3.2.2ds5-0pre6) unstable; urgency=low ++ ++ * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20030123). ++ * Build locales needed by the libstdc++ testsuite. ++ * Update config.{guess,sub} files from autotools-dev (closes: #177674). ++ * Disable Ada and Java on netbsd-i386 (closes: #177679). ++ * gnat: Add suggests for gnat-doc and ada-reference-manual. ++ ++ -- Matthias Klose Thu, 23 Jan 2003 22:16:53 +0100 ++ ++gcc-3.2 (1:3.2.2ds4-0pre5.1) unstable; urgency=low ++ ++ * Readd build dependency `locales' on arm. locales is now installable ++ * Add autoreconf patch for mips{,el}. (closes: #176311) ++ ++ -- Ryan Murray Wed, 22 Jan 2003 14:31:14 -0800 ++ ++gcc-3.2 (1:3.2.2ds4-0pre5) unstable; urgency=low ++ ++ * Remove build dependency `libc6-dev-sparc64 [sparc]' for now. ++ * Remove build dependency `locales' on arm. locales is uninstallable ++ on arm due to the missing glibc-2.3. ++ * Use bison-1.35. bison-1.875 causes an hard error on the reduce/reduce ++ conflict in objc-parse.y. ++ ++ -- Matthias Klose Fri, 10 Jan 2003 10:10:43 +0100 ++ ++gcc-3.2 (1:3.2.2ds4-0pre4) unstable; urgency=low ++ ++ * Try building with gcc-2.95 on m68k-linux. Building gcc-3.2 with gcc-3.2 ++ does not work for me. m68k-linux doesn't look good at all ... ++ * Fix s390 build error. ++ * Add locales to build dependencies. A still unsolved issue is the ++ presence of the locales de_DE, en_PH, en_US, es_MX, fr_FR and it_IT, ++ or else some tests in the libstdc++ testsuite will fail. ++ * Put all -nof files in the -nof package (closes: #175253). ++ * Correctly exit logwatch script (closes: #175251). ++ * Install linker-map.gnu file for libstdc++_pic (closes: #175144). ++ * Install versioned gpcs docs only (closes: #173844). ++ * Include gpc test results in gpc package. ++ * Link local libstdc++ documentation to local source-level documentation. ++ * Clarify libstdc++ description (so version and library version). ++ Closes: #175799. ++ * Include library in libstdc++-dbg package (closes: #176005). ++ ++ -- Matthias Klose Wed, 8 Jan 2003 23:39:50 +0100 ++ ++gcc-3.2 (1:3.2.2ds3-0pre3) unstable; urgency=low ++ ++ * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021231). ++ - Fix loop count computation for preconditioned unrolled loops. ++ Closes: #162919. ++ - Fix xmmintrin.h (_MM_TRANSPOSE4_PS) CVS 20021027 (closes: #163647). ++ - Fix [PR 8601] strlen/template interaction causes ICE CVS 20021201. ++ Closes: #166143. ++ * Watch the log files, which are written during the testsuite runs and print ++ out a message, if there is still activity. No more buildd timeouts on arm ++ and m68k ... ++ * Remove gpc's reference to librx1g-dev package (closes: #172953). ++ * Remove trailing dots on package descriptions. ++ * Fix external reference to cpp.info in gcc.info (closes: #174598). ++ ++ -- Matthias Klose Tue, 31 Dec 2002 13:47:52 +0100 ++ ++gcc-3.2 (1:3.2.2ds2-0pre2) unstable; urgency=medium ++ ++ * Friday, 13th upload, so what do you expect ... ++ * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021212). ++ * Fix gnat build (autobuild maintainers: please revert back to gnat-3.2 ++ (<= 1:3.2.1ds6-1) for building gnat-3.2, if the build fails building ++ gnatlib and gnattools). ++ * Really disable sparc64 support. ++ ++ -- Matthias Klose Fri, 13 Dec 2002 00:26:37 +0100 ++ ++gcc-3.2 (1:3.2.2ds1-0pre1) unstable; urgency=low ++ ++ * A candidate for the transition ... ++ * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021210). ++ - doc/invoke.texi: Remove last reference to -a (closes: #171748). ++ * Disable sparc64 support. For now please use egcs64 to build sparc64 ++ kernels. ++ * Disable Pascal on the sparc architecture (doesn't bootstrap). ++ ++ -- Matthias Klose Tue, 10 Dec 2002 22:33:13 +0100 ++ ++gcc-3.2 (1:3.2.2ds0-0pre0) unstable; urgency=low ++ ++ * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021202). ++ - Should fix _Pragma expansion within macros (closes: #157416). ++ * New gpc-20021128 version. Run check using EXTRA_TEST_PFLAGS=-g0 ++ * Add tetex-bin to build dependencies (gpc needs it). Closes: #171203. ++ ++ -- Matthias Klose Tue, 3 Dec 2002 08:22:33 +0100 ++ ++gcc-3.2 (1:3.2.1ds6-1) unstable; urgency=low ++ ++ * gcc-3.2.1 final release. ++ * Build gpc-20021111 for all architectures. hppa and i386 are ++ known to work. For the other architectures, send the usual FTBFS ... ++ WARNING: this gpc version is an alpha version, especially debug info ++ doesn't work well, so use -g0 for compiling. If you need a stable ++ gpc compiler, use gpc-2.95. ++ * Encode the gpc upstream version in the package name, the gpc release ++ date in the version number (requested by gpc upstream). ++ * Added libncurses5-dev and libgmp3-dev as build dependencies for the ++ gpc tests and runtime. ++ * Clean CVS files as well (closes: #169101). ++ * s390-biarch.dpatch added, backported from CVS (Gerhard Tonn). ++ * s390-config-ml.dpatch added, disables biarch for java, ++ libffi and boehm-gc on s390. They need a 64 bit runtime ++ during build which is not yet available on s390 (Gerhard Tonn). ++ * Biarch support for packaging adapted (Gerhard Tonn). ++ biarch variable added and with-sparc64 variable substituted in ++ most places by biarch. ++ dh_shlibdeps is applied only to 32 bit libraries on s390, since ++ ldd for 64 bit libraries don't work on 32 bit runtime. ++ Build dependency to libc6-dev-s390x added. ++ ++ -- Matthias Klose Wed, 20 Nov 2002 00:20:58 +0100 ++ ++gcc-3.2 (1:3.2.1ds5-0pre6) unstable; urgency=medium ++ ++ * gcc-3.2.1 prerelease. ++ * Removed arm patch integrated upstream. ++ * Adjust gnat build dependency (closes: #167116). ++ * Always configure with --enable-clocale=gnu. The autobuilders do have ++ locales installed, but not generated the "de_DE" locale needed for ++ the autoconf test in libstdcc++-v3/aclocal.m4. ++ * libstdc++ documentaion: Don't compresss '*.txt' referenced by html pages. ++ ++ -- Matthias Klose Tue, 12 Nov 2002 07:19:44 +0100 ++ ++gcc-3.2 (1:3.2.1ds4-0pre5) unstable; urgency=medium ++ ++ * gcc-3.2.1 snapshot (CVS 20021103). ++ * sparc64-build.dpatch: Updated. Lets sparc boostrap again. ++ * s390-loop.dpatch removed, already fixed upstream (Gerhard Tonn). ++ * bison.dpatch: Removed, patch submitted upstream. ++ * backport-java-6865.dpatch: Apply again during build. ++ * Tighten glibc dependency (closes: #166703). ++ ++ -- Matthias Klose Sun, 3 Nov 2002 12:22:02 +0100 ++ ++gcc-3.2 (1:3.2.1ds3-0pre4) unstable; urgency=high ++ ++ * gcc-3.2.1 snapshot (CVS 20021020). ++ - Expansion of _Pragma within macros fixed (closes: #157416). ++ * FTBFS: With the switch to bison-1.50 (and 1.75), gcc-3.2 fails to build from ++ source on Debian unstable systems. This is fixed in gcc HEAD, but not on ++ the current release branch. ++ HELP NEEDED: ++ - check what is missing from the patches in debian/patches/bison.dpatch. ++ This is a backport of the bison related patches, but showing regressions ++ in the gcc testsuite, so it cannot be applied. ++ - build gcc using byacc (bootstrap currently fails using byacc). ++ - build bison-1.35 in it's own package (the current 1.35-3 package fails ++ to build form source). ++ - and finally ask upstream to backport the patch to the branch. It's not ++ helpful not beeing able to follow the stable branch. Maybe we should ++ just switch to gcc HEAD as BSD does ... ++ As a terrible workaround, build the sources from CVS first on a machine, ++ with bison-1.35 installed, then package the tarball, so the bison ++ generated files are not rebuilt. ++ ++ * re-add lost patch: configure with --enable-__cxa_atexit (closes: #163422), ++ Therefore urgency high. ++ * gcj-wrapper, gij-wrapper: Accept names starting with `.' (closes: #163172, ++ #164009). ++ * Point g++ manpage to correct g++ version (closes: #162843). ++ * Support for i386-freebsd-gnu (closes: #163883). ++ * s390-java.dpatch replaced with backport from cvs head (Gerhard Tonn). ++ * Disable the testsuite run on the Hurd (closes: #159650). ++ * s390-loop.dpatch added, fixes runtime problem (Gerhard Tonn). ++ * debian/patches/bison.dpatch: Backport for bison-1.75 compatibility. ++ Don't use it due to regressions. ++ * debian/patches/backport-java-6865.dpatch: Directly applied in the ++ included tarball because of bison problems. ++ * Make fixincludes priority optional, so linda can depend on it. ++ * Tighten binutils dependency. ++ ++ -- Matthias Klose Sun, 20 Oct 2002 10:52:49 +0200 ++ ++gcc-3.2 (1:3.2.1ds2-0pre3) unstable; urgency=low ++ ++ * gcc-3.2.1 snapshot (CVS 20020923). ++ * Run the libstdc++ check-abi script. Results are put into the file ++ /usr/share/doc/libstdc++5/README.libstdc++-baseline in the libstdc++5-dev ++ package. This file contains a new baseline, if no baseline for this ++ architecture is included in the gcc sources. ++ * gcj-wrapper: Accept files starting with an underscore, accept ++ path names (closes: #160859, #161517). ++ * Explicitely call automake-1.4 when rebuilding Makefiles (closes: #161438). ++ * Let installed fixincludes script find files in /usr/lib/fixincludes. ++ * debian/rules.patch: Add .NOTPARALLEL as target, so that patches are ++ applied sequentially (closes: #159395). ++ ++ -- Matthias Klose Tue, 24 Sep 2002 07:36:56 +0200 ++ ++gcc-3.2 (1:3.2.1ds1-0pre2) unstable; urgency=low ++ ++ * gcc-3.2.1 snapshot (CVS 20020913). Welcome back m68k in bootstrap land! ++ * Fix arm-tune.dpatch (closes: #159354). ++ * Don't overwrite LD_LIBRARY_PATH in build (closes: #158459). ++ * --disable-__cxa_atexit on NetBSD (closes: #159620). ++ * Reenable installation of message catalogs (disabled in 3.2-0pre2). ++ Closes: #160175. ++ * Ben Collins ++ - Re-enable sparc64 build. This time, it's part of the default compiler. ++ I have disabled 64/alt libraries as they are too much overhead. All ++ libraries build 64bit, but currently only libgcc/libstdc++ include the ++ 64bit libraries. ++ Closes: #160404. ++ * Depend on autoconf2.13, instead of autoconf. ++ * Phil Blundell ++ - debian/patches/arm-update.dpatch: Fix python2.2 build failure. ++ ++ -- Matthias Klose Sat, 7 Sep 2002 08:05:02 +0200 ++ ++gcc-3.2 (1:3.2.1ds0-0pre1) unstable; urgency=medium ++ ++ * gcc-3.2.1 snapshot (CVS 20020829). ++ New g++ option -Wabi: ++ Warn when G++ generates code that is probably not compatible with the ++ vendor-neutral C++ ABI. Although an effort has been made to warn about ++ all such cases, there are probably some cases that are not warned about, ++ even though G++ is generating incompatible code. There may also be ++ cases where warnings are emitted even though the code that is generated ++ will be compatible. ++ The current version of the ABI is 102, defined by the __GXX_ABI_VERSION ++ macro. ++ * debian/NEWS.*: Updated. ++ * Fix libstdc++-dev dependency on libc-dev for the Hurd (closes: #157004). ++ * Add versioned expect build dependency. ++ * Tighten binutils dependency to 2.13.90.0.4. ++ * debian/patches/arm-tune.dpatch: Increase stack limit for configure. ++ * 3.2-0pre4 did build gnat-3.2 compilers for all architectures. Build-Depend ++ on gnat-3.2 now (closes: #156734). ++ * Remove bashism's in gcj-wrapper (closes: #157982). ++ * Add -cp and -classpath options to gij(1). Backport from HEAD (#146634). ++ * Add fastjar documentation. ++ ++ -- Matthias Klose Fri, 30 Aug 2002 10:35:00 +0200 ++ ++gcc-3.2 (1:3.2ds0-0pre4) unstable; urgency=low ++ ++ * Correct build dependency on gnat-3.1. ++ ++ -- Matthias Klose Mon, 12 Aug 2002 01:21:58 +0200 ++ ++gcc-3.2 (1:3.2ds0-0pre3) unstable; urgency=low ++ ++ * gcc-3.2 upstream prerelease. ++ * Disable all configure options, which are standard: ++ --enable-threads=posix --enable-long-long, --enable-clocale=gnu ++ ++ -- Matthias Klose Fri, 9 Aug 2002 21:59:08 +0200 ++ ++gcc-3.2 (1:3.2ds0-0pre2) unstable; urgency=low ++ ++ * gcc-3.2 snapshot (CVS 20020802). ++ * Fix g++-include dir. ++ * Don't install the locale files (temporarily, until we don't build ++ gcc-3.1 anymore). ++ * New package libgcj-common to avoid conflict with classpath package. ++ ++ -- Matthias Klose Sat, 3 Aug 2002 09:08:34 +0200 ++ ++gcc-3.2 (1:3.2ds0-0pre1) unstable; urgency=low ++ ++ * gcc-3.2 snapshot (CVS 20020729). ++ ++ -- Matthias Klose Mon, 29 Jul 2002 20:36:54 +0200 ++ ++gcc-3.1 (1:3.1.1ds3-1) unstable; urgency=low ++ ++ * gcc-3.1.1 release. Following this release we will have a gcc-3.2 ++ release soon, which is gcc-3.1.1 plus some C++ ABI changes. Once ++ gcc-3.2 hits the archives, gcc-3.1.1 will go away. ++ * Don't build the sparc64 compiler. The packaging/patches are ++ currently broken. ++ * Add missing headers on m68k and powerpc. ++ * Install libgcc_s_nof on powerpc. ++ * Install libffi's copyright and doc files (closes: #152198). ++ * Remove dangling symlink (closes: #149002). ++ * libgcj3: Add a conflict to the classpath package (closes: #148664). ++ * README.C++: Fix URLs. ++ * libstdc++-dbg: Install into /usr/lib/debug, document it. ++ * backport-java-6865.dpatch: backport from HEAD. ++ * Fix typo in gcj docs (closes: #148890). ++ * Change libstdc++ include dir: /usr/include/c++/3.1. ++ * libstdc++-codecvt.dpatch: New patch (closes: #149776). ++ * Build libstdc++-pic package. ++ * Move 64bit libgcc in its own package libgcc1-64 (closes: #147249). ++ * Tighten glibc dependency. ++ ++ -- Matthias Klose Mon, 29 Jul 2002 00:34:49 +0200 ++ ++gcc-3.1 (1:3.1.1ds2-0pre3) unstable; urgency=low ++ ++ * Updated to CVS 2002-06-06 (gcc-3_1-branch). ++ * Updated s390-java patch (Gerhard Tonn). ++ * Don't use -O in STAGE1_FLAGS on m68k. ++ * Fix `-classpath' option in gcj-wrapper script (closes: #150142). ++ * Remove g++-cxa-atexit patch, use --enable-__cxa_atexit configure option. ++ ++ -- Matthias Klose Wed, 3 Jul 2002 23:52:58 +0200 ++ ++gcc-3.1 (1:3.1.1ds1-0pre2) unstable; urgency=low ++ ++ * Updated to CVS 2002-06-06 (gcc-3_1-branch), fixing an ObjC regression. ++ * Welcome m68k to bootstrap land (thanks to Andreas Schwab). ++ * Add javac wrapper for gcj-3.1 (Michael Koch). ++ * Remove dangling symlink in /usr/share/doc/gcc-3.1 (closes: #149002). ++ ++ -- Matthias Klose Fri, 7 Jun 2002 00:26:05 +0200 ++ ++gcc-3.1 (1:3.1.1ds0-0pre1) unstable; urgency=low ++ ++ * Updated to CVS 2002-05-31 (gcc-3_1-branch). ++ * Change priorities from fastjar and gij-wrapper-3.1 from 30 to 31. ++ * Update arm-tune patch. ++ * Install xmmintrin.h header on i386 (closes: #148181). ++ * Install altivec.h header on powerpc. ++ * Call correct gij in gij-wrapper (closes: #148662, #148682). ++ ++ -- Matthias Klose Wed, 29 May 2002 22:47:40 +0200 ++ ++gcc-3.1 (1:3.1ds2-2) unstable; urgency=low ++ ++ * Tighten binutils dependency. ++ * Fix libstdc include dir for multilibs (Dan Jacobowitz). ++ ++ -- Matthias Klose Tue, 21 May 2002 08:03:49 +0200 ++ ++gcc-3.1 (1:3.1ds2-1) unstable; urgency=low ++ ++ * GCC 3.1 release. ++ * Ada cannot be built by the autobuilders for the first time. Do it by hand. ++ gnatgcc and gnatbind need to be in the PATH. ++ * Build with CC=gnatgcc, when building the Ada compiler. ++ * Hurd fixes. ++ * Don't build the sparc64 compiler; the hack isn't up to date and glibc ++ isn't converted to use /lib64 and /usr/lib64. ++ * m68k-linux shows bootstrap comparision failures. If you want to build ++ the compiler anyway and ignore the bootstrap comparision failure, edit ++ debian/rules.patch and uncomment the patch to ignore the failure. See ++ /usr/share/doc/gcc-3.1/BOOTSTRAP_COMPARISION_FAILURE for the differences. ++ ++ -- Matthias Klose Wed, 15 May 2002 09:53:00 +0200 ++ ++gcc-3.1 (1:3.1ds1-0pre6) unstable; urgency=low ++ ++ * Build from the "final prerelease" tarball (gcc-3.1-20020508.tar.gz). ++ * Build gnat-3.1-doc package. ++ * Build fastjar package without building java packages. ++ * Hurd fixes. ++ * Updated sparc64-build patch. ++ * Add s390-ada patch (Gerhard Tonn). ++ * Undo the dwarf2 support for hppa from -0pre5. ++ ++ -- Matthias Klose Thu, 9 May 2002 17:21:09 +0200 ++ ++gcc-3.1 (1:3.1ds0-0pre5) unstable; urgency=low ++ ++ * Use /usr/include/g++-v3-3.1 as C++ include dir. ++ * Update s390-java patch (Gerhard Tonn). ++ * Tighten binutils dependency (gas patch for m68k-linux). ++ * Use gnat-3.1 as the gnat package name (as found in gcc/ada/gnatvsn.ads). ++ * dwarf2 support hppa: a snapshot of the gcc/config/pa directory ++ from the trunk dated 2002-05-02. ++ ++ -- Matthias Klose Fri, 3 May 2002 22:51:37 +0200 ++ ++gcc-3.1 (1:3.1ds0-0pre4) unstable; urgency=low ++ ++ * Use gnat-5.00w as the gnat package name (as found in gcc/ada/gnatvsn.ads). ++ * Don't build the shared libgnat library. It assumes an existing shared ++ libiberty library. ++ * Don't install the libgcjgc library. ++ ++ -- Matthias Klose Thu, 25 Apr 2002 08:48:04 +0200 ++ ++gcc-3.1 (1:3.1ds0-0pre3) unstable; urgency=low ++ ++ * Build fastjar on all architectures. ++ * Update m68k patches. ++ * Update s390-java patch (Gerhard Tonn). ++ ++ -- Matthias Klose Sun, 14 Apr 2002 15:34:47 +0200 ++ ++gcc-3.1 (1:3.1ds0-0pre2) unstable; urgency=low ++ ++ * Add Ada support. To successfully build, a working gnatbind and gcc ++ driver with Ada support is needed. ++ * Apply needed arm patches from 3.0.4. ++ ++ -- Matthias Klose Sat, 6 Apr 2002 13:17:08 +0200 ++ ++gcc-3.1 (1:3.1ds0-0pre1) unstable; urgency=low ++ ++ * First try for gcc-3.1. ++ ++ -- Matthias Klose Mon, 1 Apr 2002 23:39:30 +0200 ++ ++gcc-3.0 (1:3.0.4ds3-6) unstable; urgency=medium ++ ++ * Second try at fixing sparc build problems. ++ ++ -- Phil Blundell Sun, 24 Mar 2002 14:49:26 +0000 ++ ++gcc-3.0 (1:3.0.4ds3-5) unstable; urgency=medium ++ ++ * Enable java on ARM. ++ * Create missing directory to fix sparc build. ++ ++ -- Phil Blundell Fri, 22 Mar 2002 20:21:59 +0000 ++ ++gcc-3.0 (1:3.0.4ds3-4) unstable; urgency=low ++ ++ * Link with system zlib (closes: #136359). ++ ++ -- Matthias Klose Tue, 12 Mar 2002 20:47:59 +0100 ++ ++gcc-3.0 (1:3.0.4ds3-3) unstable; urgency=low ++ ++ * Build libf2c (pic and non-pic) with -mieee on alpha-linux. ++ ++ -- Matthias Klose Sun, 10 Mar 2002 00:37:24 +0100 ++ ++gcc-3.0 (1:3.0.4ds3-2) unstable; urgency=medium ++ ++ * Apply hppa-build patch (Randolph Chung). Closes: #136731. ++ * Make libgcc1 conflict/replace with libgcc1-sparc64. Closes: #135709. ++ * gij-3.0 provides the `java' command. Closes: #128947. ++ * Depend on binutils (>= 2.11.93.0.2-2), allows stripping of libgcj.a ++ again. Closes: #99307. ++ * Update README.cross pointing to the README of the toolchain-source ++ package. ++ ++ -- Matthias Klose Wed, 6 Mar 2002 21:53:34 +0100 ++ ++gcc-3.0 (1:3.0.4ds3-1) unstable; urgency=low ++ ++ * Final gcc-3.0.4 release. ++ * debian/rules.d/binary-java.mk: Fix dormant typo, exposed by removing the ++ duplicate libgcj dependency and adding the gij-3.0 package. ++ Closes: #134005. ++ * New patch by Phil Blundell to fix scalapack build error on m68k. ++ ++ -- Matthias Klose Wed, 20 Feb 2002 23:59:43 +0100 ++ ++gcc-3.0 (1:3.0.4ds2-0pre020210) unstable; urgency=low ++ ++ * Make the base package dependent on the binary-arch target. Closes: #133433. ++ * Get libstdc++ on arm woring (define _GNU_SOURCE). Closes: #133435. ++ ++ -- Matthias Klose Mon, 11 Feb 2002 20:31:12 +0100 ++ ++gcc-3.0 (1:3.0.4ds2-0pre020209) unstable; urgency=high ++ ++ * Update to CVS sources (20020209 gcc-3_0-branch). ++ * Apply patch to fix bootstrap error on arm-linux (submitted upstream ++ by Phil Blundell). Closes: #130422. ++ * Make base package architecture any. ++ * Decouple versioned shlib dependencies from release number for ++ libobjc as well. ++ ++ -- Matthias Klose Sat, 9 Feb 2002 01:30:11 +0100 ++ ++gcc-3.0 (1:3.0.4ds1-0pre020203) unstable; urgency=medium ++ ++ * One release critical bug outstanding: ++ - bootstrap error on arm. ++ * Update to CVS sources (20020203 gcc-3_0-branch). ++ * Fixed upstream: PR c/3504: Correct documentation of __alignof__. ++ Closes: #85445. ++ * Remove libgcc-powerpc patch, integrated upstream (closes: #131977). ++ * Tighten binutils build dependency (to address #126162). ++ * Move jv-convert to gcj package (closes: #131985). ++ ++ -- Matthias Klose Sun, 3 Feb 2002 14:47:14 +0100 ++ ++gcc-3.0 (1:3.0.4ds0-0pre020127) unstable; urgency=low ++ ++ * Two release critical bugs outstanding: ++ - bootstrap error on arm. ++ - bus errors for C++ and java executables on sparc (see the testsuite ++ results). ++ * Update to CVS sources (20020125 gcc-3_0-branch). ++ * Enable java support for s390 architecture (patch from Gerhard Tonn). ++ * Updated NEWS file for 3.0.3. ++ * Disable building the gcc-sparc64, but build a multilibbed compiler ++ for sparc as the default. ++ * Disabled the subreg-byte patch for sparc (request from Ben Collins). ++ * Fixed reference to libgcc1 package in README (closes: #126218). ++ * Do recommend libc-dev, not depend on it. For low-end or embedded systems ++ the dependency on libc-dev can make the difference between ++ having enough or having too little space to build a kernel. ++ * README.cross: Updated by Hakan Ardo. ++ * Decouple versioned shlib dependencies from release number. Closes: #118391. ++ * Fix diversions for gcc-3.0-sparc64 package (closes: #128178), ++ unconditionally remove `sparc64-linux-gcc' alternative. ++ * g77/README.libg2c.Debian: New file mentioning `libg2c-pic'. The next ++ g77 version (3.1) does build a static and shared library (closes: #104250). ++ * Fix formatting errors in the synopsis of the java man pages. Maybe the ++ reason for #127571. Closes: #127571. ++ * fastjar: Fail for the (currently incorrect) -u option. Addresses: #116145. ++ Add alternative for `jar' using priority 30 (closes: #118648). ++ * jv-convert: Add --help option and man page. Backport from HEAD branch. ++ * libgcj2-dev: Remove duplicate dependency (closes: #127805). ++ * Giving up and make just another new package gij-X.Y with only the gij-X.Y ++ binary for policy conformance (closes: #127111). ++ * gij: Provides an alternative for `java' (priority 30) using a wrapper ++ script (Stephen Zander) (closes: #128974). Added simple manpage. ++ ++ -- Matthias Klose Sun, 27 Jan 2002 13:33:41 +0100 ++ ++gcc-3.0 (1:3.0.3ds3-1) unstable; urgency=low ++ ++ * Final gcc-3.0.3 release. ++ * Do not compress .txt files in libstdc++ docs referenced from html ++ pages (closes: #124136). ++ * libstdc++-dev suggests libstdc++-doc. ++ * debian/patches/gcc-ia64-NaT.dpatch: Update (closes: #123685). ++ ++ -- Matthias Klose Fri, 21 Dec 2001 02:54:11 +0100 ++ ++gcc-3.0 (1:3.0.3ds2-0pre011215) unstable; urgency=low ++ ++ * Update to CVS sources (011215). ++ * libstdc++ documentation updated upstream (closes: #123790). ++ * debian/patches/gcc-ia64-NaT.dpatch: Disable. Fixes bootstrap error ++ on ia64 (#123685). ++ ++ -- Matthias Klose Sat, 15 Dec 2001 14:43:21 +0100 ++ ++gcc-3.0 (1:3.0.3ds1-0pre011210) unstable; urgency=medium ++ ++ * Update to CVS sources (011208). ++ * Supposed to fix powerpc build error (closes: #123155). ++ ++ -- Matthias Klose Thu, 13 Dec 2001 07:26:05 +0100 ++ ++gcc-3.0 (1:3.0.3ds0-0pre011209) unstable; urgency=medium ++ ++ * Update to CVS sources (011208). Frozen for upstream 3.0.3 release. ++ * Apply contrib/PR3145.patch, a backport of Nathan Sidwell's patch to ++ fix PR c++/3145, the infamous "virtual inheritance" bug. This affected ++ especially KDE2 (eg. artsd). Franz Sirl ++ * cc1plus segfault in strength reduction fixed upstream. Closes: #122547. ++ * debian/patches/gcc-ia64-NaT.dpatch: Add patch to avoid a bug that can ++ cause miscompiled userapps to crash the kernel. Closes: #121924. ++ * Reenable shared libgcc for powerpc. Fixed upstream. ++ http://gcc.gnu.org/ml/gcc-patches/2001-11/msg00340.html ++ debian/patches/libgcc-powerpc.dpatch: New patch. ++ * Add upstream changelogs. ++ * Remove gij alternative. Move to gij package. ++ ++ -- Matthias Klose Sun, 9 Dec 2001 09:36:48 +0100 ++ ++gcc-3.0 (1:3.0.2ds4-4) unstable; urgency=medium ++ ++ * Disable building of libffi on mips and mipsel. ++ (closes: #117503). ++ * Enable building of shared libgcc on s390 ++ (closes: #120452). ++ ++ -- Christopher C. Chimelis Sat, 1 Dec 2001 06:15:29 -0500 ++ ++gcc-3.0 (1:3.0.2ds4-3) unstable; urgency=medium ++ ++ * Fix logic to build libffi without java (closes: #117503). ++ ++ -- Matthias Klose Sun, 4 Nov 2001 14:34:50 +0100 ++ ++gcc-3.0 (1:3.0.2ds4-2) unstable; urgency=medium ++ ++ * Enable java for ia64 (Jeff Licquia). Closes: #116798. ++ * Allow building of libffi without gcj (Jeff Licquia). ++ New libffi packages for arm hurd-i386 mips mipsel, ++ still missing: hppa, s390. ++ * debian/NEWS.gcc: Add 3.0.2 release notes. ++ * debian/patches/hppa-align.dpatch: New patch from Alan Modra, ++ submitted by Randolph Tausq. ++ ++ -- Matthias Klose Thu, 25 Oct 2001 23:59:31 +0200 ++ ++gcc-3.0 (1:3.0.2ds4-1) unstable; urgency=medium ++ ++ * Final gcc-3.0.2 release. The source tarball is not the released ++ tarball, but taken from CVS 011024). ++ * Remove patch for s390, included upstream. ++ ++ -- Matthias Klose Wed, 24 Oct 2001 00:49:40 +0200 ++ ++gcc-3.0 (1:3.0.2ds3-0pre011014) unstable; urgency=low ++ ++ * Update to CVS sources (011014). Frozen for upstream 3.0.2 release. ++ Closes: #109351, #114099, #114216, #105741 (allegro3938). ++ * Added debian/patches/fastjar.dpatch, which makes fastjar extract ++ filenames correctly (previously, some had incorrect names on extract). ++ Closes: #113236. ++ * Priorities fixed in the past (closes: #94404). ++ ++ -- Matthias Klose Sun, 14 Oct 2001 13:19:43 +0200 ++ ++gcc-3.0 (1:3.0.2ds2-0pre010923) unstable; urgency=low ++ ++ * Bootstraps on powerpc again (closes: #112777). ++ ++ -- Matthias Klose Sun, 23 Sep 2001 01:32:11 +0200 ++ ++gcc-3.0 (1:3.0.2ds2-0pre010922) unstable; urgency=low ++ ++ * Update to CVS sources (010922). ++ * Fixed upstream (closes: #111801). #105569 on hppa. ++ * Update hppa patch (Matt Taggart). ++ * Fix libstdc++-dev package description (closes: #112758). ++ * debian/rules.d/binary-objc.mk: Fix build error (closes: #112462). ++ * Make gobjc-3.0 conflict with gcc-3.0-sparc64 (closes: #111772). ++ ++ -- Matthias Klose Sat, 22 Sep 2001 09:34:49 +0200 ++ ++gcc-3.0 (1:3.0.2ds1-0pre010908) unstable; urgency=low ++ ++ * Update to CVS sources (010908). ++ * Update hppa patch (Matt Taggart). ++ * Depend on libgc6-dev, not libgc5-dev, which got obsolete (during ++ the freeze ...). However adds s390 support (closes: #110189). ++ * debian/patches/m68k-reload.dpatch: New patch (Roman Zippel). ++ Fixes #89023. ++ * debian/patches/gcc-sparc.dpatch: New patch ("David S. Miller"). ++ Fixes libstdc++ testsuite failures on sparc. ++ ++ -- Matthias Klose Sat, 8 Sep 2001 14:26:20 +0200 ++ ++gcc-3.0 (1:3.0.2ds0-0pre010826) unstable; urgency=low ++ ++ * gcc-3.0-nof: Fix symlink to gcc-3.0-base doc directory. ++ * debian/patches/gcj-without-rpath: New patch. ++ * Remove self dependency on libgcj package. ++ * Handle diversions for upgrades from 3.0 and 3.0.1 -> 3.0.2 ++ in gcc-3.0-sparc64 package. ++ * Build libg2c.a with -fPIC -DPIC and name the result libg2c-pic.a. ++ Link with this library to avoid linking with non-pic code. ++ Use this library when building dynamically loadable objects (python ++ modules, gimp plugins, ...), which need to be linked against g2c or ++ a library which is linked against g2c (i.e. lapack). ++ Packages needing '-lg2c-pic' must have a build dependency on ++ 'g77-3.0 (>= 1:3.0.2-0pre010826). ++ ++ -- Matthias Klose Sun, 26 Aug 2001 13:59:03 +0200 ++ ++gcc-3.0 (1:3.0.2ds0-0pre010825) unstable; urgency=low ++ ++ * Update to CVS sources (010825). ++ * Add libc6-dev-sparc64 to gcc-3.0-sparc64 and to sparc build dependencies. ++ * Remove conflicts on egcc package (closes: #109718). ++ * Fix gcc-3.0-nof dependency. ++ * s390 patches against gcc-3.0.1 (Gerhard Tonn). ++ * debian/control: Require binutils (>= 2.11.90.0.27) ++ ++ -- Matthias Klose Sat, 25 Aug 2001 10:59:15 +0200 ++ ++gcc-3.0 (1:3.0.1ds3-1) unstable; urgency=low ++ ++ * Final gcc-3.0.1 release. ++ * Changed upstream: default of -flimit-inline is 600 (closes: #106716). ++ * Add fastjar man page (submitted by "The Missing Man Pages Project", ++ http://www.netmeister.org/misc/m2p2i/) (closes: #103051). ++ * Fixed in last upload as well: #105246. ++ * debian/patches/cpp-memory-leak.dpatch: New patch ++ * Disable installation of shared libgcc on s390 (Gerhard Tonn). ++ ++ -- Matthias Klose Mon, 20 Aug 2001 20:47:13 +0200 ++ ++gcc-3.0 (1:3.0.1ds2-0pre010811) unstable; urgency=high ++ ++ * Update to CVS sources (010811). Includes s390 support. ++ * Add xlibs-dev to Build-Depends (libgcj). ++ * Enable java for powerpc, disable java for ia64. ++ * Enable ObjC garbage collection for all archs, which have a libgc5-dev ++ package. ++ * New patch libstdc++-codecvt (Michael Piefel) (closes: #104614). ++ * Don't strip static libgcj library (work around binutils bug #107812). ++ * Handle diversions for upgrade 3.0 -> 3.0.1 in gcc-3.0-sparc64 package ++ (closes: #107569). ++ ++ -- Matthias Klose Sat, 11 Aug 2001 20:42:15 +0200 ++ ++gcc-3.0 (1:3.0.1ds1-0pre010801) unstable; urgency=high ++ ++ * Update to CVS sources (010801). (closes: #107012). ++ * Remove build dependency on non-free graphviz and include pregenerated ++ docs (closes: #107124). ++ * Fixed in 3.0.1 (closes: #99307). ++ * Updated m68k-updates patch (Roman Zippel). ++ * Another fix for ia64 packaging bits (Randolph Chung). ++ ++ -- Matthias Klose Tue, 31 Jul 2001 21:52:55 +0200 ++ ++gcc-3.0 (1:3.0.1ds0-0pre010727) unstable; urgency=high ++ ++ * Update to CVS sources (010727). ++ * Add epoch to source version. Change '.dsx' to 'dsx', so that ++ 3.1.1ds0 gt 3.1ds7 (closes: #106538). ++ ++ -- Matthias Klose Sat, 28 Jul 2001 09:56:29 +0200 ++ ++gcc-3.0 (3.0.1.ds0-0pre010723) unstable; urgency=high ++ ++ * ia64 packaging bits (Randolph Chung) (closes: #106252). ++ ++ -- Matthias Klose Mon, 23 Jul 2001 23:02:03 +0200 ++ ++gcc-3.0 (3.0.1.ds0-0pre010721) unstable; urgency=high ++ ++ * Update to CVS sources (010721). ++ - Remove patches applied upstream: libstdc++-limits.dpatch, ++ objc-data-references ++ - Updated other patches. ++ * Fix gij alternative (closes: #103468, #103883). ++ * Patch to fix bootstrap on sparc (closes: #103568). ++ * Corrected (closes: #105371) and updated README.Debian. ++ * m68k patches for sucessful bootstrap (Roman Zippel). ++ * Add libstdc++v3 porting hints to README.Debian and README.C++. ++ * m68k md fix (#105622) (Roman Zippel). ++ * debian/rules2: Disable non-functional ulimit on Hurd (#105884). ++ * debian/control: Require binutils (>= 2.11.90.0.24) ++ * Java is enabled for alpha (closes: #87300). ++ ++ -- Matthias Klose Sun, 22 Jul 2001 08:24:04 +0200 ++ ++gcc-3.0 (3.0.ds9-4) unstable; urgency=high ++ ++ * Move this version to testing ASAP. testing still has a prerelease ++ version with now incompatible ABI's. If sparc doesn't build, ++ then IMHO it's better to remove it from testing. ++ * debian/control.m4: Set uploaders field. Adjust description of ++ gcc-3.0 (binary) package (closes: #102271, #102620). ++ * Separate gij.1 in it's own pseudo man page (closes: #99523). ++ * debian/patches/java-manpages.dpatch: New patch. ++ * libgcj: Install unversioned gij. ++ ++ -- Matthias Klose Tue, 3 Jul 2001 07:38:08 +0200 ++ ++gcc-3.0 (3.0.ds9-3) unstable; urgency=high ++ ++ * Reenable configuration with posix threads on i386 (lost in hurd-i386 ++ merge). ++ ++ -- Matthias Klose Sun, 24 Jun 2001 22:21:45 +0200 ++ ++gcc-3.0 (3.0.ds9-2) unstable; urgency=medium ++ ++ * Move this version to testing ASAP. testing still has a prerelease ++ version with now incompatible ABI's. ++ * Add libgcc0 and libgcc300 to the build conflicts (#102041). ++ * debian/README.FIRST: Removed (#101534). ++ * Updated subreg-byte patch (doc files). ++ * Disable java for the Hurd, mips and mipsel (#101570). ++ * Patch for building on the Hurd (#101708) (Jeff Bailey ). ++ * Packaging fixes for the Hurd (#101711) (Jeff Bailey ). ++ * Include pregenerated doxygen (1.2.6) docs for libstdc++-v3 (#101557). ++ The current doxygen-1.2.8.1 segaults. ++ * C++: Enable -fuse-cxa-atexit by default (#101901). ++ * Correct mail address in gccbug (#101743). ++ * Make rules resumable after failure in binary-xxx targets (#101637). ++ ++ -- Matthias Klose Sun, 24 Jun 2001 16:04:53 +0200 ++ ++gcc-3.0 (3.0.ds9-1) unstable; urgency=low ++ ++ * Final 3.0 release. ++ * Update libgcc version number (#100983, #100988, #101069, #101115, #101328). ++ * Updated hppa-build patch (Matt Taggart ). ++ * Disable java for hppa. ++ * Updated subreg-byte patch for sparc (Ben Collins). ++ ++ -- Matthias Klose Mon, 18 Jun 2001 18:26:04 +0200 ++ ++gcc-3.0 (3.0.ds8-0pre010613) unstable; urgency=low ++ ++ * Update patches for recent (010613 23:13 +0200) CVS sources. ++ * Fix packaging bugs (#100459, #100447, #100483). ++ * Build-Depend on gawk, mawk doesn't work well with test_summary. ++ ++ -- Matthias Klose Wed, 13 Jun 2001 23:13:38 +0200 ++ ++gcc-3.0 (3.0.ds7-0pre010609) unstable; urgency=low ++ ++ * Fix build dependency for the hurd (#99164). ++ * Update patches for recent (010609) CVS sources. ++ * Disable java on powerpc (link error in libjava). ++ * gcc-3.0-base.postinst: Don't prompt for non-interactive installs (#100110). ++ ++ -- Matthias Klose Sun, 10 Jun 2001 09:45:57 +0200 ++ ++gcc-3.0 (3.0.ds6-0pre010526) unstable; urgency=high ++ ++ * Urgency "high" for replacing the gcc-3.0 snapshots in testing, which ++ now are incompatile due to the changed ABIs. ++ * Upstream begins tagging with "gcc-3_0_pre_2001mmdd". ++ * Tighten dependencies to install only binary packages derived from ++ one source (#98851). Tighten libc6-dev dependency to match libc6. ++ ++ -- Matthias Klose Sun, 27 May 2001 11:35:31 +0200 ++ ++gcc-3.0 (3.0.ds6-0pre010525) unstable; urgency=low ++ ++ * ATTENTION: The ABI (exception handling) changed. No upgrade path from ++ earlier snapshots (you had been warned in the postinst ...) ++ Closing #93597, #94576, #96448, #96461. ++ You have to rebuild ++ * HELP is appreciated for scanning the Debian BTS and sending followups ++ to bug reports!!! ++ * Should we name debian gcc uploads? What about a "still seeking ++ g++ maintainer" upload? ++ * Fixed in gcc-3.0: #97030 ++ * Update patches for recent (010525) CVS sources. ++ * Make check depend on build target (fakeroot problmes). ++ * debian/rules.d/binary-libgcc.mk: new file, build first. ++ * Free memory detection on the hurd for running the testsuite. ++ * Update debhelper build dependency. ++ * libstdc++-doc: Include doxygen generated docs. ++ * Fix boring packaging bugs, too tired for appropriate changelogs ... ++ #93343, #96348, #96262, #97134, #97905, #96451, #95812, #93157 ++ * Fixed bugs: #87000. ++ ++ -- Matthias Klose Sat, 26 May 2001 23:10:42 +0200 ++ ++gcc-3.0 (3.0.ds5-0pre010510) unstable; urgency=low ++ ++ * Update patches for recent (010506) CVS sources. ++ * New version of source, as of 2001-05-10 ++ * New version of gpc source, as of 2001-05-06 (disabled by default). ++ * Make gcc-3.0-sparc64 provide an alternative for sparc64-linux-gcc, ++ since it can build kernels just fine (it seems) ++ * Add hppa patch from Matt Taggart ++ * Fix objc info inclusion...now merged with gcc info ++ * Do not install the .la for libstdc++, since it confuses libtool linked ++ applications when libstdc++3-dev and libstdc++2.10-dev are both ++ installed (closes #97905). ++ * Fixed gcc-base and libgcc section/prio to match overrides ++ ++ -- Ben Collins Mon, 7 May 2001 00:08:52 +0200 ++ ++gcc-3.0 (3.0.ds5-0pre010427) unstable; urgency=low ++ ++ * Fixed priority for fastjar from optional to extra ++ * New version of source, as of 2001-04-27 ++ * Fix description of libgcj-dev ++ * libffi-install: Make libffi installable ++ * Add libffi and libffi-dev packages. libffi is only enabled for java ++ targets right now. Perhaps more will be enabled later. ++ * Fixes to build cross compiler package (for avr) ++ (Hakan Ardo ). ++ * Better fixincludes description (#93157). ++ * Remove all remnants of libg++ ++ * Remove all hacks around libstdc++ version. Since we are strictly v3 now, ++ we can treat it like a normal shared lib, and not worry about all those ++ ABI changes. ++ * Remove all cruft control scripts. Note, debhelper will create scripts ++ that it needs to. It will do the doc link stuff and the ldconfig stuff ++ explicitly. ++ * Clean up the SONAME parsing stuff, make it a little more cleaner over ++ all the lib packages ++ * Make libffi install when built (IOW, whenever java is enabled). This ++ should obsolete the libffi package, which is old and broken ++ * Revert to normal sonames, except for ia64 (for now) ++ * Remove all references to dh_testversion, since they are deprecated for ++ Build-Depends ++ * Fix powerpc nof build ++ * Remove all references to the MULTILIB stuff, since the arches are ++ using specialized builds anyway (nof, softfloat). ++ * Added 64bit sparc64 package (gcc-3.0-sparc64, libgcc0-sparc64) ++ * Removed obsolete shlibs.local file ++ ++ -- Ben Collins Sun, 15 Apr 2001 21:33:15 -0400 ++ ++gcc-3.0 (3.0.ds4-0pre010403) unstable; urgency=low ++ ++ * debian/README: Updated for gcc-3.0 ++ * debian/rules.patch: Added subreg-byte patch for sparc ++ * debian/rules.unpack: Update to current CVS for gcc tarball name ++ * debian/patches/subreg-byte.dpatch: sparc subreg-byte support ++ * debian/patches/gcc-rawhide.dpatch: Removed ++ debian/patches/gpc-2.95.dpatch: Removed ++ debian/patches/sparc32-rfi.dpatch: Removed ++ debian/patches/temporary.dpatch: Removed ++ * Moving to unstable now ++ * debian/patches/gcc-ppc-disable-shared-libgcc.dpatch: New patch, ++ disables shared libgcc for powerpc target, since it isn't compatible ++ with the EABI objects. ++ * Create $(with_shared_libgcc) var ++ * debian/rules.d/binary-gcc.mk: Use this new variable to determine if ++ the libgcc package actually has any files ++ ++ -- Ben Collins Tue, 3 Apr 2001 23:00:55 -0400 ++ ++gcc-3.0 (3.0.ds2-0pre010223) experimental; urgency=low ++ ++ * New snapshot. Use distinct shared object names for shared libraries: ++ we don't know if binary API's still change until the final release. ++ * Versioned package names. ++ * debian/control.m4: New file. Add gcc-base, libgcc0, libobjc1, ++ libstdc++-doc, libgcj1, libgcj1-dev, fastjar, fixincludes packages. ++ Remove gcc-docs package. ++ * debian/gcov.1: Remove. ++ * debian/*: Remove 2.95.x support. Prepare for 3.0. ++ * debian/patches: Remove 2.95.x patches. ++ * Changed source package name. It's not allowed anymore to overwrite ++ source packages with different content. Introducing a 'debian source ++ element' (.ds), which is stripped again from the version number ++ for the binary packages. ++ * Fixed bugs and added functionality: ++ #26436, #27878, #33786, #34876, #35477, #42662, #46181, #42989, ++ #47981, #48530, #50529, #51227, #51456, #51651, #52382, #53698, ++ #55291, #55967, #56867, #58219, #59005, #59232, #59776, #64628, ++ #65687, #67631, #68632, #68963, #68987, #69530, #72933, #75120, ++ #75759, #76645, #76827, #83221, #87540 ++ * libgcj fixes: 42894, #51266, #68560, #71187, #79984 ++ ++ -- Matthias Klose Sat, 24 Feb 2001 13:41:11 +0100 ++ ++gcc-2.95 (2.95.3-2.001222) experimental; urgency=low ++ ++ * New upstream version 2.95.3 experimental (CVS 20001222). ++ * debian/control.in: Versioned package names, removal of snapshot logic. ++ Remove fake gcc-docs package. ++ * Reserve -1 release numbers for woody. ++ * Updated to gpc-20001218. ++ ++ -- Matthias Klose Fri, 22 Dec 2000 19:53:03 +0100 ++ ++gcc (2.95.2-20) unstable; urgency=low ++ ++ * Apply patch from gcc-2_95-branch; remove ulimit for make check. ++ ++ -- Matthias Klose Sun, 10 Dec 2000 17:01:13 +0100 ++ ++gcc (2.95.2-19) unstable; urgency=low ++ ++ * Added testsuite-20001207 from current snapshots. We'll need results ++ for 2.95.2 to make sure there are no regressions against that release. ++ Dear build daemons and porters to other architectures, please send an ++ email to gcc-testresults@gcc.gnu.org. ++ You can do this by running "debian/rules mail-summary". ++ * Updated to gpc-20001206. ++ * Added S/390 patch prepared by Chu-yeon Park (#78983). ++ * debian/patches/libio.dpatch: Fix iostream doc (fixes #77647). ++ * debian/patches/gcc-doc.dpatch: Update URL (fixes #77542). ++ * debian/patches/gcc-reload1.dpatch Patch from the gcc-bug list which ++ fixes a problem in "long long" on i[345]86 (i686 was not affected). ++ ++ -- Matthias Klose Sat, 9 Dec 2000 12:30:32 +0100 ++ ++gcc (2.95.2-18) unstable; urgency=low ++ ++ * debian/control.in: Fix syntax errors (fixes #76146, #76458). ++ Disable gpc on the hurd by request (#75686). ++ * debian/patches/arm-various.dpatch: Patches from Philip Blundell ++ for ARM arch (fixes #75801). ++ * debian/patches/gcc-alpha-mi-thunk.dpatch: Patches from Chris Chimelis ++ for alpha arch. ++ * debian/patches/g77-docs.dpatch: Adjust g77 docs (fixes #72594). ++ * Update gpc to gpc-20001118. ++ * Reenable gpc for alpha. ++ * debian/README.C++: Merge debian/README.libstdc++ and C++ FAQ information ++ provided by Matt Zimmermann. ++ * Build gcj only on architectures, where libgcj-2.95.1 can be built as well. ++ Probably needs some adjustments ... ++ * Conditionalize for chill, fortran, java, objc and chill. ++ ++ * NOT APPLIED: ++ debian/patches/libstdc++-bastring.dpatch: Apply fix (fixes #75759). ++ ++ -- Matthias Klose Sun, 19 Nov 2000 10:40:41 +0100 ++ ++gcc (2.95.2-17) unstable; urgency=low ++ ++ * Disable gpc for alpha. ++ * Include gpc-cpp in gpc package (fixes #74492). ++ * Don't build gcc-docs compatibility package anymore. ++ ++ -- Matthias Klose Wed, 11 Oct 2000 06:16:53 +0200 ++ ++gcc (2.95.2-16) unstable; urgency=low ++ ++ * Applied the emdebian/cross compiler patch and documentation ++ (Frank Smith ). ++ * Applied patch for avr target (Hakan Ardo ). ++ * debian/control.in: Add awk to Build-Depends. ++ Tighten libc6-dev dependency for libstdc++-dev (fixes #73031, ++ #72531, #72534). ++ * Disable libobjc_gc for m68k again (fixes #74380). ++ * debian/patches/arm-namespace.dpatch: Apply patch from Philip ++ Blundell to fix name space pollution on arm ++ (fixes #70937). ++ * Fix more warnings in STL headers (fixes #69352, #71943). ++ ++ -- Matthias Klose Mon, 9 Oct 2000 21:51:41 +0200 ++ ++gcc (2.95.2-15) unstable; urgency=low ++ ++ * debian/control.in: Add libgc5-dev to build depends (fixes #67015). ++ * debian/rules.def: Build GC enabled ObjC runtime for sparc. ++ * Bug #58741 fixed (in some version since 2.95.2-5). ++ * debian/control.in: Recommend librx1g-dev, libgmp2-dev, libncurses5-dev ++ (unit dependencies). ++ * Patches from Marcus Brinkmann for the hurd (fixes #67763): ++ - debian/rules.defs: Disable objc_gc on hurd-i386. ++ Disable libg++ on GNU systems. ++ - debian/rules2: Set correct names of libstdc++/libg++ ++ libraries on GNU systems. ++ Write out correct shlibs and shlibs.local file content. ++ - Keep _G_config.h for the Hurd. ++ * Apply patch for ObjC linker warnings. ++ * Don't apply gcj backport patch for sparc. ++ * Apply libio compatability patch ++ * debian/glibcver.sh: generate appropriate version for glibc ++ * debian/rules.conf: for everything after glibc 2.1, we always append ++ "-glibc$(ver)" to the C++ libs for linux. ++ * Back down gpc to -13 version (-14 wont compile on anything but i386 ++ and m68k becuase of gpc). ++ * Remove extraneous and obsolete sparc64 patches/files from debian/* ++ ++ -- Ben Collins Thu, 21 Sep 2000 08:08:35 -0400 ++ ++gcc-snapshot (20000901-2.2) experimental; urgency=low ++ ++ * New snapshot. ++ * debian/rules2: Move tradcpp0 to cpp package. ++ ++ -- Matthias Klose Sat, 2 Sep 2000 01:14:28 +0200 ++ ++gcc-snapshot (20000802-2.1) experimental; urgency=low ++ ++ * New snapshot. ++ * debian/rules2: Fixes. tradcpp0 is in gcc package, not cpp. ++ ++ -- Matthias Klose Thu, 3 Aug 2000 07:40:05 +0200 ++ ++gcc-snapshot (20000720-2) experimental; urgency=low ++ ++ * New snapshot. ++ * Enable libstdc++-v3. ++ * debian/rules2: Don't use -D for /usr/bin/install. ++ ++ -- Matthias Klose Thu, 20 Jul 2000 22:33:37 +0200 ++ ++gcc (2.95.2-14) unstable; urgency=low ++ ++ * Update gpc patch. ++ ++ -- Matthias Klose Wed, 5 Jul 2000 20:51:16 +0200 ++ ++gcc (2.95.2-13) frozen unstable; urgency=low ++ ++ * Update debian/README: document how to compile 2.0.xx kernels; don't ++ register gcc272 as an alternative for gcc (closes #62419). ++ Clarify compiler setup (closes #65548). ++ * debian/control.in: Make libstdc++-dev depend on current version of g++. ++ * Undo CVS update from release -8 (problems on alpha, #55263). ++ ++ -- Matthias Klose Mon, 19 Jun 2000 23:06:48 +0200 ++ ++gcc (2.95.2-12) frozen unstable; urgency=low ++ ++ * debian/gpc.postinst: Correct typo introduced with -11 (fixes #64193). ++ * debian/patches/gcc-rs600.dpatch: ppc codegen fix (fixes #63933). ++ ++ -- Matthias Klose Sun, 21 May 2000 15:56:05 +0200 ++ ++gcc (2.95.2-11) frozen unstable; urgency=medium ++ ++ * Upload to unstable again (fixes critical #63784). ++ * Fix doc-base files (fixes important #63810). ++ * gpc wasn't built in -10 (fixes #63977). ++ * Make /usr/bin/pc an alternative (fixes #63888). ++ * Add SYSCALLS.c.X to gcc package. ++ ++ -- Matthias Klose Sun, 14 May 2000 22:17:44 +0200 ++ ++gcc (2.95.2-10) frozen; urgency=low ++ ++ * debian/control.in: make gcc conflict on any version of egcc ++ (slink to potato upgrade problem, fixes grave #62084). ++ * Build protoize programs, separate out in new package (fixes #59436, ++ #62911). ++ * Create dummy gcc-docs package for smooth update from slink (fixes #62537). ++ * Add doc-base support for all -doc packages (fixes #63380). ++ ++ -- Matthias Klose Mon, 1 May 2000 22:24:28 +0200 ++ ++gcc (2.95.2-9) frozen unstable; urgency=low ++ ++ * Disable the sparc-bi-arch.dpatch (patch from Ben Collins, built ++ for sparc as NMU 8.1) (fixes critical #61529 and #61511). ++ "Seems that when you compile gcc 2.95.x for sparc64-linux and compile ++ sparc32 programs, the code is not the same as sparc-linux compile for ++ sparc32 (this is a bug, and is fixed in gcc 2.96 CVS)." ++ * debian/patches/gcj-vs-iconv.dpatch: Option '--encoding' for ++ encoding of input files. Patch from Tom Tromey ++ backported to 2.95.2 (fixes #42895). ++ Compile a Latin-1 encoded file with `gcj --encoding=Latin1 ...'. ++ * debian/control.in: gcc, g++ and gobjc suggest their corresponding ++ task packages (fixes #59623). ++ ++ -- Matthias Klose Sat, 8 Apr 2000 20:19:15 +0200 ++ ++gcc (2.95.2-8) frozen unstable; urgency=low ++ ++ * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000313. ++ * debian/rules2: configure with --enable-java-gc=no for sparc. Fixes ++ gcj side of #60535. ++ * debian/rules.patch: Disable gcc-emit-rtl patch for all archs but ++ alpha. Disable g++-is-tree patch ("just for 2.95.1"). ++ * debian/README: Update for gcc-2.95. ++ ++ -- Matthias Klose Mon, 27 Mar 2000 00:03:16 +0200 ++ ++gcc (2.95.2-7) frozen unstable; urgency=low ++ ++ * debian/patches/gcc-empty-struct-init.dpatch; Apply patch from ++ http://gcc.gnu.org/ml/gcc-patches/2000-02/msg00637.html. Fixes ++ compilation of 2.3.4x kernels. ++ * debian/patches/gcc-emit-rtl.dpatch: Apply patch from David Huggins-Daines ++ (backport from 2.96 CVS to fix #55263). ++ * debian/patches/gcc-pointer-arith.dpatch: Apply patch from Jim Kingdon ++ (backport from 2.96 CVS to fix #54951). ++ ++ -- Matthias Klose Thu, 2 Mar 2000 23:16:43 +0100 ++ ++gcc (2.95.2-6) frozen unstable; urgency=low ++ ++ * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000220. ++ * Remove dangling symlink probably left over from libstdc++2.9 ++ package (fixes #53661). ++ * debian/patches/gcc-alpha-complex-float.dpatch: Fixed patch by ++ David Huggins-Daines (fixes #58486). ++ * debian/g++.{postinst,prerm}: Remove outdated g++FAQ registration ++ (fixes #58253). ++ * debian/control.in: gcc-doc replaces gcc-docs (fixes #58108). ++ * debian/rules2: Include some fixed headers (asm, bits, linux, ...). ++ * debian/patches/{gcc-alpha-ev5-fix,libstdc++-valarray}.dpatch: Remove. ++ Applied upstream. ++ * debian/patches/libstdc++-bastring.dpatch: Add patch from ++ sicard@bigruth.solsoft.fr (fixes #56715). ++ ++ -- Matthias Klose Sun, 20 Feb 2000 15:08:13 +0100 ++ ++gcc (2.95.2-5) frozen unstable; urgency=low ++ ++ * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000116. ++ * Add more build dependencies (fixes #53204). ++ * debian/patches/gcc-alpha-complex-float.dpatch: Patch from ++ Joel Klecker to compile glibc correctly on alpha. ++ "Should fix the g77 problems too." ++ * debian/patches/{libio,libstdc++-wall2}.dpatch. Remove patches ++ applied upstream. ++ ++ -- Matthias Klose Sun, 16 Jan 2000 19:16:54 +0100 ++ ++gcc (2.95.2-4) unstable; urgency=low ++ ++ * debian/patches/libio.dpatch: Patch from Martin v. Loewis. ++ (fixes: #35628). ++ * debian/patches/libstdc++-deque.dpatch: Patch from Martin v. Loewis. ++ (fixes: #52689). ++ * debian/control.in: Updated Build-Depends, removed outdated README.build. ++ Fixes #51246. ++ * Tighten dependencies to cpp (>= 2.95.2-4) (closes: #50294). ++ * debian/rules.patch: Really do not apply patches/gcj-backport.dpatch. ++ Fixes #51636. ++ * Apply updated sparc-bi-arch.dpatch from Ben Collins. ++ * libstdc++: Define wstring type, if __ENABLE_WSTRING is defined. Request ++ from the author of the War FTP Daemon for Linux ("Jarle Aase" ++ ). ++ * debain/g++.preinst: Remove dangling sysmlinks (fixes #52359). ++ ++ -- Matthias Klose Sun, 19 Dec 1999 21:53:48 +0100 ++ ++gcc (2.95.2-3) unstable; urgency=low ++ ++ * debian/rules2: Don't install $(gcc_lib_dir)/include/asm; these are ++ headers fixed for glibc-1.x (closes: #49434). ++ * debian/patches/cpp-dos-newlines.dpatch: Keep CR's without ++ following LF (closes: #49186). ++ * Bug #37358 (internal compiler errors when building vdk_0.6.0-5) ++ fixed in gcc-2.95.? (closes: #37358). ++ * Apply patch gcc-alpha-ev5-fix from Richard Henderson ++ (should fix #48527 and #46963). ++ * debian/README.Bugs: Documented non bug #44554. ++ * Applied patch from Alexandre Oliva to fix gpc boostrap on alpha. ++ Reenabled gpc on all architectures. ++ * Post-2.95.2 CVS updates of the gcc-2_95-branch until 19991108. ++ * Explicitely generate postinst/prerm chunks for usr/doc transition. ++ debhelper currently doesn't handle generation for packages with ++ symlinked directories. ++ * debian/patches/libstdc++-wall3.dpatch: Fix warnings in stl_deque.h ++ and stl_rope.h (closes: #46444, #46720). ++ * debian/patches/gcj-backport.dpatch: Add file, don't apply (yet). ++ ++ -- Matthias Klose Wed, 10 Nov 1999 18:58:45 +0100 ++ ++gcc (2.95.2-2) unstable; urgency=low ++ ++ * New gpc-19991030 snapshot. ++ * Post-2.95.2 CVS updates of the gcc-2_95-branch until 19991103. ++ * Reintegrated sparc patches (bcollins@debian.org), which were lost ++ in 2.95.2-1. ++ * debian/rules2: Only install $(gcc_lib_dir)/include/asm, when existing. ++ * debian/patches/gpc-2.95.{dpatch,diff}: updated patch to drop ++ initialization in stor-layout.c. ++ * debian/NEWS.gcc: Updated for gcc-2.95.2. ++ * debian/bugs/bug-...: Removed testcases for fixed bugs. ++ * debian/patches/...dpatch: Removed patches applied upstream. ++ * debian/{rules2,g++.postinst,g++.prerm}: Handle c++ alternative. ++ * debian/changelog: Merged gcc272, egcs and snapshot changelogs. ++ ++ -- Matthias Klose Tue, 2 Nov 1999 23:09:23 +0200 ++ ++gcc (2.95.2-1.1) unstable; urgency=low ++ ++ * Most of the powerpc patches have been applied upstream. Remove all ++ but ppc-ice, ppc-andrew-dwarf-eh, and ppc-descriptions. ++ * mulilib-install.dpatch was definitely a bad idea. Fix it properly ++ by using install -D. ++ * Also, don't make directories before installing any more. Simplifies ++ rules a (tiny) bit. ++ * Do not build with LDFLAGS=-s. Everything gets stripped out anyway by ++ dh_strip -a -X_debug; so leave the binaries in the build tree with ++ debugging symbols for simplified debugging of the packages. ++ ++ -- Daniel Jacobowitz Sat, 30 Oct 1999 12:40:12 -0400 ++ ++gcc (2.95.2-1) unstable; urgency=low ++ ++ * gcc-2.95.2 release (taken from the CVS archive). -fstrict-aliasing ++ is disabled upstream. ++ ++ -- Matthias Klose Mon, 25 Oct 1999 10:26:19 +0200 ++ ++gcc (2.95.2-0pre4) unstable; urgency=low ++ ++ * Updated to cvs updates of the gcc-2_95-branch until 19991021. ++ * Updated gpc to gpc-19991018 snapshot (closes: #33037, #47453). ++ Enable gpc for all architectures ... ++ * Document gcc exit codes (closes: #43863). ++ * According to the bug submitter (Sergey V Kovalyov ) ++ the original source of these CERN librarties is outdated now. The latest ++ version of cernlibs compiles and works fine with slink (closes #31546). ++ * According to the bug submitter (Gergely Madarasz ), ++ the problem triggered on i386 cannot be reproduced with the current ++ jade and php3 versions anymore (closes: #35215). ++ * Replace corrupted m68k-pic.dpatch (from Roman Hodek and Andreas Schwab ++ and apply to ++ all architectures (closes: #48011). ++ * According to the bug submitter (Herbert Xu ) ++ this bug "probably has been fixed". Setting it to severity "fixed" ++ (fixes: #39616), will close it later ... ++ * debian/README.Bugs: Document throwing C++ exceptions "through" C ++ libraries (closes: #22769). ++ ++ -- Matthias Klose Fri, 22 Oct 1999 20:33:00 +0200 ++ ++gcc (2.95.2-0pre3) unstable; urgency=low ++ ++ * Updated to cvs updates of the gcc-2_95-branch until 19991019. ++ * Apply NMU patches (closes: #46217). ++ * debian/control.in: Fix egcs64 conflict-dependency for sparc ++ architecture (closes: #47088). ++ * debian/rules2: dbg-packages share doc dir with lib packages ++ (closes #45067). ++ * debian/patches/gcj-debian-policy.dpatch: Patch from Stephane ++ Bortzmeyer to conform to Debian policy (closes: #44463). ++ * debian/bugs/bug-*: Added test cases for new bug reports. ++ * debian/patches/libstdc++-bastring.dpatch: Patch by Richard Kettlewell ++ (closes #46550). ++ * debian/rules.patch: Apply libstdc++-wall2 patch (closes #46609). ++ * debian/README: Fix typo (closes: #45253). ++ * debian/control.in: Remove primary/secondary distinction; ++ dbg-packages don't provide their normal counterparts (closes #45206). ++ * debian/rules.patch: gcc-combine patch applied upstream. ++ * debian/rules2: Only use mail if with_check is set (off by default). ++ * debian/rules.conf: Tighten binutils dependency to 2.9.5.0.12. ++ ++ -- Matthias Klose Tue, 19 Oct 1999 20:33:00 +0200 ++ ++gcc (2.95.2-0pre2.0.2) unstable; urgency=HIGH (for m68k) ++ ++ * Binary-only NMU for m68k as quick fix for another bug; the patch ++ is in CVS already, too. ++ * Applied another patch by Andreas Schwab to fix %a5 restauration in ++ some cases. ++ ++ -- Roman Hodek Thu, 30 Sep 1999 16:09:15 +0200 ++ ++gcc (2.95.2-0pre2.0.1) unstable; urgency=HIGH (for m68k) ++ ++ * Binary-only NMU for m68k as quick fix for serious bugs; the patches ++ are already checked into gcc CVS and should be in the next official ++ version, too. ++ * Applied two patches by Andreas Schwab to fix -fpic and loop optimization. ++ ++ -- Roman Hodek Mon, 27 Sep 1999 15:32:49 +0200 ++ ++gcc (2.95.2-0pre2) unstable; urgency=low ++ ++ * Fixed in 2.95.2 (closes: #43478). ++ * Previous version had Pascal examples missing in doc directory. ++ ++ -- Matthias Klose Wed, 8 Sep 1999 22:18:17 +0200 ++ ++gcc (2.95.2-0pre1) unstable; urgency=low ++ ++ * Updated to cvs updates of the gcc-2_95-branch until 19990828. ++ * Apply work around memory corruption (just for 2.95.1) by ++ Daniel Jacobowitz . ++ * debian/patches/libstdc++-wall2.dpatch: Patch from Franck Sicard ++ to fix some warnings (closes: #44670). ++ * debian/patches/libstdc++-valarray.dpatch: Patch from Hideaki Fujitani ++ to fix a bug in valarray_array.h. ++ * Applied NMU from Jim Pick minus the jump.c and fold-const.c patches ++ already in the gcc-2_95-branch (closes: #44690). ++ * Conform to debian-java policy (closes: #44463). ++ * Move docs to /usr/share/doc (closes: #44782). ++ * Remove debian/patches/gcc-align.dpatch applied upstream. ++ * debian/*.postinst: Call install-info only, when configuring. ++ * debian/*.{postinst,prerm}: Add #DEBHELPER# comments to handle ++ /usr/doc -> /usr/share/doc transition. ++ ++ -- Matthias Klose Wed, 8 Sep 1999 22:18:17 +0200 ++ ++gcc (2.95.1-2.1) unstable; urgency=low ++ ++ * Non-maintainer upload. ++ * ARM platform no longer needs library-prefix patch. ++ * Updated patches from Philip Blundell. ++ ++ -- Jim Pick Wed, 8 Sep 1999 20:14:07 -0700 ++ ++gcc (2.95.1-2) unstable; urgency=low ++ ++ * debian/gcc.{postinst,prerm}: gcc provides an alternative for ++ sparc64-linux-gcc. ++ * Applied patch from Ben Collins to enable bi-architecture (32/64) ++ support for sparc. ++ * Rebuild debian/control and debian/rules.parameters after unpacking. ++ * debian/rules2: binary-indep. Conditionalize on with_pascal. ++ ++ -- Matthias Klose Sat, 4 Sep 1999 13:47:30 +0200 ++ ++gcc (2.95.1-1) unstable; urgency=low ++ ++ * Updated to release gcc-2.95.1 and cvs updates of the gcc-2_95-branch ++ until 19990828. ++ * debian/README.gcc: Updated NEWS file to include 2.95 and 2.95.1 news. ++ * debian/README.java: New file. ++ * debian/rules.defs: Disabled gpc for alpha, arm. Disabled ObjC-GC ++ for alpha. ++ * debian/rules [clean]: Remove debian/rules.parameters. ++ * debian/rules2 [binary-arch]: Call dh_shlibdeps with LD_LIBRARY_PATH set ++ to installation dir of libstdc++. Why isn't this the default? ++ * debian/control.in: *-dev packages do not longer conflict with ++ libg++272-dev package. ++ * Apply http://egcs.cygnus.com/ml/gcc-patches/1999-08/msg00599.html. ++ * Only define BAD_THROW_ALLOC, when using exceptions (fixes #43462). ++ * For ObjC (when configured with GC) recommend libgc4-dev, not libgc4. ++ * New version of 68060 build patch. ++ * debian/rules.conf: For m68k, depend on binutils version 2.9.1. ++ ++ -- Matthias Klose Sat, 28 Aug 1999 18:16:31 +0200 ++ ++gcc (2.95.1-0pre2) unstable; urgency=medium ++ ++ * gpc is back again (fixes grave #43022). ++ * debian/patches/gpc-updates.dpatch: Patches sent to upstream authors. ++ * Work around the fatal dependtry assertion failure bug in dpkg (hint ++ from "Antti-Juhani Kaijanaho" , fixes important #43072). ++ ++ -- Matthias Klose Mon, 16 Aug 1999 19:34:14 +0200 ++ ++gcc (2.95.1-0pre1) unstable; urgency=low ++ ++ * Updated to cvs 19990815 gcc-2_95-branch; included install docs and ++ FAQ from 2.95 release; upload source package as well. ++ * Source package contains tarballs only (gcc, libg++, installdocs). ++ * debian/rules: Splitted into debian/rules{,.unpack,.patch,.conf,2}. ++ * debian/gcc.postinst: s/any key/RETURN; warn only when upgrading from ++ pre 2.95 version; reference /usr/doc, not /usr/share/doc. ++ * Checked syntax for attributes of functions; checked for #35068; ++ checked for bad gmon.out files (at least with libc6 2.1.2-0pre5 and ++ binutils 2.9.1.0.25-2 the problem doesn't show up anymore). ++ * debian/patches/cpp-macro-doc.dpatch: Document macro varargs in cpp.texi. ++ * gcc is primary compiler for all platforms but m68k. Setting ++ severity of #22513 to fixed. ++ * debian/patches/gcc-default-arch.dpatch: New patch to enable generation ++ of i386 instruction as default (fixes #42743). ++ * debian/rules: Removed outdated gcc NEWS file (fixes #42742). ++ * debian/patches/libstdc++-out-of-mem.dpatch: Throw exception instead ++ of aborting when out of memory (fixes #42622). ++ * debian/patches/cpp-dos-newlines.dpatch: Handle ibackslashes after ++ DOS newlines (fixes #29240). ++ * Fixed in gcc-2.95.1: #43001. ++ * Bugs closed in this version: ++ Closes: #11525, #12253, #22513, #29240, #35068, #36182, #42584, #42585, ++ #42602, #42622, #42742 #42743, #43001, #43002. ++ ++ -- Matthias Klose Sun, 15 Aug 1999 10:31:50 +0200 ++ ++gcc (2.95-3) unstable; urgency=high ++ ++ * Provide /lib/cpp again (fixes important bug #42524). ++ * Updated to cvs 19990805 gcc-2_95-branch. ++ * Build with the default scheduler. ++ * Apply install-multilib patch from Dan Jacobowitz. ++ * Apply revised cpp-A- patch from Dan Jacobowitz. ++ ++ -- Matthias Klose Fri, 6 Aug 1999 07:25:19 +0200 ++ ++gcc (2.95-2) unstable; urgency=low ++ ++ * Remove /lib/cpp. This driver uses files from /usr/lib/gcc-lib anyway. ++ * The following bugs are fixed (compared to egcs-1.1.2). ++ Closes: #4429, #20889, #21122, #26369, #28417, #28261, #31416, #35261, ++ #35900, #35906, #38246, #38872, #39098, #39526, #40659, #40991, #41117, ++ #41290, #41302, #41313. ++ * The following by Joel Klecker: ++ - Adopt dpkg-architecture variables. ++ - Go back to SHELL = bash -e or it breaks where /bin/sh is not bash. ++ - Disabled the testsuite, it is not included in the gcc 2.95 release. ++ ++ -- Matthias Klose Sat, 31 Jul 1999 18:00:42 +0200 ++ ++gcc (2.95-1) unstable; urgency=low ++ ++ * Update for official gcc-2.95 release. ++ * Built without gpc. ++ * debian/rules: Remove g++FAQ from rules, which is outdated. ++ For ix86, build for i386, not i486. ++ * Apply patch from Jim Pick for building multilib package on arm. ++ ++ -- Matthias Klose Sat, 31 Jul 1999 16:38:21 +0200 ++ ++gcc (2.95-0pre10) unstable; urgency=low ++ ++ * Use ../builddir-gcc-$(VER) by default instead of ./builddir; upstream ++ strongly advises configuring outside of the source tree, and it makes ++ some things much easier. ++ * Add patch to prevent @local branches to weak symbols on powerpc (fixes ++ apt compilation). ++ * Add patch to make cpp -A- work as expected. ++ * Renamed debian/patches/ppc-library-prefix.dpatch to library-prefix.dpatch; ++ apply on all architectures. ++ * debian/control.in: Remove snapshot dependencies. ++ * debian/*.postinst: Reflect use of /usr/share/{info,man}. ++ ++ -- Daniel Jacobowitz Thu, 22 Jul 1999 19:27:12 -0400 ++ ++gcc (2.95-0pre9) unstable; urgency=low ++ ++ * The following bugs are fixed (compared to egcs-1.1.2): #4429, #20889, ++ #21122, #26369, #28417, #28261, #35261, #38246, #38872, #39526, #40659, ++ #40991, #41117, #41290. ++ * Updated to CVS gcc-19990718 snapshot. ++ * debian/control.in: Removed references to egcs in descriptions. ++ Changed gcj's Recommends libgcj-dev to Depends. ++ * debian/rules: Apply ppc-library-prefix for alpha as well. ++ * debian/patches/arm-config.dpatch: Updated patch sent by Jim Pick. ++ ++ -- Matthias Klose Sun, 18 Jul 1999 12:21:07 +0200 ++ ++gcc (2.95-0pre8) unstable; urgency=low ++ ++ * Updated CVS. ++ * debian/copyright: s%doc/copyright%share/common-licenses% ++ * debian/README.Bugs: s/egcs.cygnus.com/gcc.gnu.org/ s/egcs-bugs/gcc-bugs/ ++ * debian/patches/reporting.dpatch: Remake diff for current sources. ++ * debian/libstdc++-dev.postinst: It's /usr/share/info/iostream.info. ++ * debian/rules: Current dejagnu snapshot reports a framework version ++ of 1.3.1. ++ ++ -- Joel Klecker Sun, 18 Jul 1999 02:09:57 -0700 ++ ++gcc-snapshot (19990714-0pre6) experimental; urgency=low ++ ++ * Updated to CVS gcc-19990714 snapshot. ++ * Applied ARM patch (#40515). ++ * Converted DOS style linefeeds in debian/patches/ppc-* files. ++ * debian/rules: Reflect change in gcc/version.c; use sh -e as shell: ++ for some obscure reason, bash -e doesn't work. ++ * Reflect version change for libstdc++ (2.10). Remove libg++-name ++ patch; libg++ now has version 2.8.1.3. Removed libc version from ++ the package name. ++ ++ -- Matthias Klose Wed, 14 Jul 1999 18:43:57 +0200 ++ ++gcc-snapshot (19990625-0pre5.1) experimental; urgency=low ++ ++ * Non-maintainer upload. ++ * Added ARM specific patch. ++ ++ -- Jim Pick Tue, 29 Jun 1999 22:36:08 -0700 ++ ++gcc-snapshot (19990625-0pre5) experimental; urgency=low ++ ++ * Updated to CVS gcc-19990625 snapshot. ++ ++ -- Matthias Klose Fri, 25 Jun 1999 16:11:53 +0200 ++ ++gcc-snapshot (19990609-0pre4.1) experimental; urgency=low ++ ++ * Added and re-added a few last PPC patches. ++ ++ -- Daniel Jacobowitz Sat, 12 Jun 1999 16:48:01 -0500 ++ ++gcc-snapshot (19990609-0pre4) experimental; urgency=low ++ ++ * Updated to CVS egcs-19990611 snapshot. ++ ++ -- Matthias Klose Fri, 11 Jun 1999 10:20:09 +0200 ++ ++gcc-snapshot (19990609-0pre3) experimental; urgency=low ++ ++ * CVS gcc-19990609 snapshot. ++ * New gpc-19990607 snapshot. ++ ++ -- Matthias Klose Wed, 9 Jun 1999 19:40:44 +0200 ++ ++gcc-snapshot (19990524-0pre1) experimental; urgency=low ++ ++ * egcs-19990524 snapshot. ++ * First snapshot of the gcc-2_95-branch. egcs-1.2 is renamed to gcc-2.95, ++ which is now the "official" successor to gcc-2.8.1. The full version ++ name is: gcc-2.95 19990521 (prerelease). ++ * debian/control.in: Changed maintainers to `Debian GCC maintainers'. ++ * Moved all version numbers to epoch 1. ++ * debian/rules: Major changes. The support for secondary compilers ++ was already removed for the egcs-1.2 snapshots. Many fixes by ++ Joel Klecker . ++ - Send mail to Debian maintainers for successful builds. ++ - Fix VER and VERNO sed expressions. ++ - Replace remaining GNUARCH occurrences. ++ * New gpc snapshot (but don't build). ++ * debian/patches/valarray.dpatch: Backport from libstdc++-v3. ++ * debian/gcc-doc.*: Info is now gcc.info* (Joel Klecker ). ++ * Use cpp driver provided by the package. ++ * New script c89 (fixes #28261). ++ ++ -- Matthias Klose Sat, 22 May 1999 16:10:36 +0200 ++ ++egcs (1.1.2-2) unstable; urgency=low ++ ++ * Integrate NMU's for arm and sparc (fixes #37582, #36857). ++ * Apply patch for the Hurd (fixes #37753). ++ * Describe open bugs in TODO.Debian. Please have a look if you can help. ++ * Update README / math functions section (fixes #35906). ++ * Done by J.H.M. Dassen (Ray) : ++ - At Richard Braakman's request, made -dbg packages for libstdc++ ++ and libg++. ++ - Provide egcc(1) (fixes lintian error). ++ ++ -- Matthias Klose Sun, 16 May 1999 14:30:56 +0200 ++ ++egcs-snapshot (19990502-1) experimental; urgency=low ++ ++ * New snapshot. ++ ++ -- Matthias Klose Thu, 6 May 1999 11:51:02 +0200 ++ ++egcs-snapshot (19990418-2) experimental; urgency=low ++ ++ * Merged Rays changes to build debug packages. ++ ++ -- Matthias Klose Wed, 21 Apr 1999 16:54:56 +0200 ++ ++egcs-snapshot (19990418-1) experimental; urgency=low ++ ++ * New snapshot. ++ * Disable cpplib. ++ ++ -- Matthias Klose Mon, 19 Apr 1999 11:32:19 +0200 ++ ++egcs (1.1.2-1.2) unstable; urgency=low ++ ++ * NMU for arm ++ * Added arm-optimizer.dpatch with optimizer workaround for ARM ++ ++ -- Jim Pick Mon, 19 Apr 1999 06:17:13 -0700 ++ ++egcs (1.1.2-1.1) unstable; urgency=low ++ ++ * NMU for sparc ++ * Included dpatch to modify the references to gcc/crtstuff.c so that ++ __register_frame_info is not a weak reference. This allows potato to ++ remain binary compatible with slink, while still retaining compatibility ++ with other sparc/egcs1.1.2 distributions. Diff in .dpatch format has ++ been sent to the maintainer with a note it may not be needed for 1.1.3. ++ ++ -- Ben Collins Tue, 27 Apr 1999 10:15:03 -0600 ++ ++egcs (1.1.2-1) unstable; urgency=low ++ ++ * Final egcs-1.1.2 release built for potato as primary compiler ++ for all architectures except m68k. ++ ++ -- J.H.M. Dassen (Ray) Thu, 8 Apr 1999 13:14:29 +0200 ++ ++egcs-snapshot (19990321-1) experimental; urgency=low ++ ++ * New snapshot. ++ * Disable gpc. ++ * debian/rules: Simplified (no secondary compiler, bumped all versions ++ to same epoch, libapi patch is included upstream). ++ * Separated out cpp documentation to cpp-doc package. ++ * Fixed in this version: #28417. ++ ++ -- Matthias Klose Tue, 23 Mar 1999 02:11:18 +0100 ++ ++egcs (1.1.2-0slink2) stable; urgency=low ++ ++ * Applied H.J.Lu's egcs-19990315.linux patch. ++ * Install faq.html and egcs-1.1.2 announcment. ++ ++ -- Matthias Klose Tue, 23 Mar 1999 01:14:54 +0100 ++ ++egcs (1.1.2-0slink1) stable; urgency=low ++ ++ * Final egcs-1.1.2 release; compiled with glibc-2.0 for slink on i386. ++ * debian/control.in: gcc provides egcc, when FIRST_PRIMARY defined. ++ * Fixes #30767, #32278, #34252, #34352. ++ * Don't build the libstdc++.so.2.9 library on architectures, which have ++ switched to glibc-2.1. ++ ++ -- Matthias Klose Wed, 17 Mar 1999 12:55:59 +0100 ++ ++egcs (1.1.1.63-2.2) unstable; urgency=low ++ ++ * Non-maintainer upload. ++ * Incorporate patch from Joel Klecker to fix snapshot packages ++ by moving/removing the application of libapi. ++ * Disable the new libstdc++-dev-config and the postinst message in ++ glibc 2.1 versions. ++ ++ -- Daniel Jacobowitz Mon, 12 Mar 1999 14:16:02 -0500 ++ ++egcs (1.1.1.63-2.1) unstable; urgency=low ++ ++ * Non-maintainer upload. ++ * Compile with glibc 2.1 release version. ++ * New upstream version egcs-1.1.2 pre3. ++ * Miscellaneous rules updates (see changelog.snapshot). ++ * New set of powerpc-related patches from Franz Sirl, ++ . ++ * Disable libgcc.dpatch (new solution implemented upstream). Remove it. ++ * Also pass $target to config.if. ++ * Enable Dwarf2 EH for powerpc. Bump the C++ binary version. No ++ loss in -backwards- compatibility as far as I can tell, so add a ++ compatibility symlink, and add to shlibs file. ++ * Add --no-backup-if-mismatch to the debian/patches/*.dpatch files, ++ to prevent bogus .orig's in diffs. ++ * Merged with (unreleased) 1.1.1.62-1 and 1.1.1.63-{1,2} packages from ++ Matthias Klose . ++ * Stop adding a backwards compatibility link for egcs-nof on powerpc. ++ To my knowledge, nothing uses it. Do add the libstdc++ API change ++ link, though. ++ ++ -- Daniel Jacobowitz Mon, 8 Mar 1999 14:24:01 -0500 ++ ++egcs (1.1.1.63-2) stable; urgency=low ++ ++ * Provide a libstdc++ with a shared object name, which is compatible ++ to other distributions. Documented the change in README.Debian, ++ the libstdc++-2.9.postinst and the libstdc++-dev-config script. ++ ++ -- Matthias Klose Fri, 12 Mar 1999 00:36:20 +0100 ++ ++egcs (1.1.1.63-1.1) unstable; urgency=low ++ ++ * Non-Maintainer release. ++ * Build against glibc 2.1. ++ * Make egcs the primary compiler on i386. ++ * Also confilct with egcc (<< FIRST_PRIMARY) ++ if FIRST_PRIMARY is defined. ++ (this tells dpkg that gcc completely obsoletes egcc) ++ * Remove hjl-12 patch again, HJL says it should not be ++ necessary with egcs 1.1.2. ++ (as per forwarded reply from Christopher Chimelis) ++ * Apply libapi patch in clean target before regenerating debian/control ++ and remove the patch afterward. Otherwise, the libstdc++ and libg++ ++ package names are generated wrong on a glibc 2.1 system. ++ ++ -- Joel Klecker Tue, 9 Mar 1999 15:31:02 -0800 ++ ++egcs (1.1.1.63-1) unstable; urgency=low ++ ++ * New upstream version egcs-1.1.1-pre3. ++ * Applied improved libstdc++ warning patch from Rob Browning. ++ ++ -- Matthias Klose Tue, 9 Mar 1999 16:14:07 +0100 ++ ++egcs (1.1.1.62-1) unstable; urgency=low ++ ++ * New upstream version egcs-1.1.1-pre2. ++ * New upstream version libg++-2.8.1.3. ++ * Readded ARM support ++ * Readded hjl-12 per request from Christopher C Chimelis ++ ++ ++ -- Matthias Klose Fri, 26 Feb 1999 09:54:01 +0100 ++ ++egcs-snapshot (19990224-0.1) experimental; urgency=low ++ ++ * New snapshot. ++ * Add the ability to disable CPPLIB by setting CPPLIB=no in ++ the environment. ++ * Disable gpc for powerpc; I spent a long time getting it to ++ make correctly, and then it goes and ICEs. ++ ++ -- Daniel Jacobowitz Tue, 24 Feb 1999 23:34:12 -0500 ++ ++egcs (1.1.1.61-1) unstable; urgency=low ++ ++ * New upstream version egcs-1.1.1-pre1. ++ * debian/control.in: Applied patch from bug report #32987. ++ * Split up H.J.Lu's hjl-19990115-linux patch into several small ++ chunks: libapi, arm-mips, libgcc, hjl-other. The changelog.Linux ++ aren't included in the separate chunks. Please refer to the ++ unmodified hjl-19990115-linux patch file in the egcs source pkg. ++ * Apply warning patch to fix the annoying spew you get if you try to ++ use ropes or deques with -Wall (which makes -Wall mostly useless for ++ spotting errors in your own code). Fixes #32996. ++ * debian/rules: Unapply patches in the exact reverse order they were ++ applied. ++ ++ -- Matthias Klose Sat, 20 Feb 1999 22:06:21 +0100 ++ ++egcs (1.1.1-5) frozen unstable; urgency=medium ++ ++ * Move libgcc.map file to g++ package, where gcc is the secondary ++ compiler (fixes #32329, #32605, #32631). ++ * Prepare to rename libstdc++2.9 package for glibc-2.1 (fixes #32148). ++ * Apply NMU patch for arm architecure (fixes #32367). ++ * Don't apply hjl-12 patch for alpha architectures (requested by the ++ alpha developers, Christopher C Chimelis ). ++ * Call makeinfo with --no-validate to fix obscure build failure on alpha. ++ * Build gpc info files in doc subdirectory. ++ * Remove c++filt diversion (C++ name demangling patch is now in binutils, ++ fixes #30820 and #32502). ++ ++ -- Matthias Klose Sun, 31 Jan 1999 23:19:35 +0100 ++ ++egcs (1.1.1-4.1) unstable; urgency=low ++ ++ * Non-maintainer upload. ++ * Pascal doesn't build for ARM. ++ ++ -- Jim Pick Sun, 24 Jan 1999 16:13:34 -0800 ++ ++egcs (1.1.1-4) frozen unstable; urgency=high ++ ++ * Don't strip compiler libraries libgcc.a libobjc.a libg2c.a libgpc.a ++ * Move Pascal examples to the right place (fixes #32149, part 1). ++ * Add dependencies for switching from secondary to primary compiler, ++ if FIRST_PRIMARY is defined (fixes #32149, part 2). ++ ++ -- Matthias Klose Wed, 20 Jan 1999 16:51:30 +0100 ++ ++egcs (1.1.1-3) frozen unstable; urgency=low ++ ++ * Updated with the H.J.Lu's hjl-19990115-linux patch (fixes the ++ __register_frame_info problems, mips and arm port included). ++ * Update gpc to 19990118 (beta release candidate). ++ * Strip static libraries (fixes #31247 and #31248). ++ * Changed maintainer address. ++ ++ -- Matthias Klose Tue, 19 Jan 1999 16:34:28 +0100 ++ ++egcs (1.1.1-2) frozen unstable; urgency=low ++ ++ * Moved egcs-docs, g77-doc and gpc-doc packages to doc section. ++ * Downgraded Recommends: egcs-docs to Suggests: egcs-docs dependencies ++ (for archs, where egcs is the primary compiler). ++ * Add 'Suggests: stl-manual' dependency to libstdc++2.9-dev. ++ * Applied one more alpha patch: ++ ftp://ftp.yggdrasil.com/private/hjl/egcs/1.1.1/egcs-1.1.1.diff.12.gz ++ * Applied PPro optimization patch. ++ * Apply emit-rtl-nan patch. ++ * Upgraded to libg++-2.8.1.2a-19981218.tar.gz. ++ * Upgraded to gpc-19981218. ++ * Make symlinks for gobjc, libstdc++2.9-dev and libg++2.8.2 doc directories. ++ ++ -- Matthias Klose Wed, 23 Dec 1998 18:04:53 +0200 ++ ++egcs-snapshot (19981211-1) experimental; urgency=low ++ ++ * New snapshot. ++ * Adapted gpc to egcs-2.92.x (BOOT_CFLAGS must include -g). ++ * New libg++-2.8.1.2a-19981209.tar.gz. ++ * debian/rules: new target mail-summary. ++ ++ -- Matthias Klose Fri, 11 Dec 1998 18:14:53 +0200 ++ ++egcs (1.1.1-1) frozen unstable; urgency=high ++ ++ * Final egcs-1.1.1 release. ++ * The last version depended on a versioned libc6 again. ++ * Add lost dependency for libg++ on libstdc++. ++ * Added debian-libstdc++.sh script to generate a libstdc++ on a Linux ++ system, which doesn't use the libapi patch. ++ ++ -- Matthias Klose Wed, 2 Dec 1998 12:06:15 +0200 ++ ++egcs (1.1.0.91.59-2) frozen unstable; urgency=high ++ ++ * Fixes bugs from libc6 2.0.7u-6 upload without dependency line ++ Conflicts: libstdc++-2.9 (<< 2.91.59): #30019, #30066, #30078. ++ * debian/copyright: Updated URLs. ++ * gcc --help now mentions /usr/doc/debian/bug-reporting.txt. ++ * Install README.Debian and include information about patches applied. ++ * Depend on unversioned libc6 on i386, such that libstdc++2.9 can be used ++ on a hamm system. ++ ++ -- Matthias Klose Fri, 27 Nov 1998 18:32:02 +0200 ++ ++egcs (1.1.0.91.59-1) frozen unstable; urgency=low ++ ++ * This is egcs-1.1.1 prerelease #3, compiled with libc6 2.0.7u-6. ++ * Added dependency for libstdc++2.9-dev on g++ (fixes #29631). ++ * Package g77 provides f77 (fixes #29817). ++ * Already fixed in earlier egcs-1.1 releases: #2493, #25271, #10620. ++ * Bugs reported for gcc-2.7.x and fixed in the egcs version of gcc: ++ #2493, #4430, #4954, #5367, #6047, #10612, #12375, #20606, #24788, #26100. ++ * Upgraded libg++ to libg++-2.8.1.2a-19981114. ++ * Upgraded gpc to gpc-19981124. ++ * Close #25869: egcs and splay maintainers are unable to reproduce this ++ bug with the current Debian packages. Bug submitter doesn't respond. ++ * Close #25407: egcs maintainer cannot reproduce this bug with the current ++ Debian compiler. Bug submitter doesn't respond. ++ * Use debhelper 1.2.7 for building. ++ * Replace the libstdc++ and libg++ compatibility links with fake libraries. ++ ++ -- Matthias Klose Wed, 25 Nov 1998 12:11:42 +0200 ++ ++egcs (1.1.0.91.58-5) frozen unstable; urgency=low ++ ++ * Applied patch to build on the m68060. ++ * Added c++filt and c++filt.1 to the g++ package. ++ * Updated gpc to gpc-981105; fixes some regressions compared to egcs-1.1. ++ * Separated out g77 and gpc doumentation to new packages g77-doc and gpc-doc. ++ * Closed bugs (#22158). ++ * Close #20248; on platforms where gas and gld are the default versions, ++ it makes no difference to configure with or without enable-ld. ++ * Close #24349. The bugs are in the amulet source. ++ See http://www.cs.cmu.edu/afs/cs/project/amulet/www/FAQ.html#GCC28x ++ * Rename gcc.info* files to egcs.info* (fixes #24088). ++ * Documented known bugs (and workarounds) in BUGS.Debian. ++ * Fixed demangling of C++ names (fixes #28787). ++ * Applied patch form aspell to libstdc++/stl/stl_rope.h. ++ * Updated from cvs 16 Nov 1998. ++ ++ -- Matthias Klose Tue, 17 Nov 1998 09:41:24 +0200 ++ ++egcs-snapshot (19981115-2) experimental; urgency=low ++ ++ * New snapshot. Disabled gpc. ++ * New packages g77-doc and gpc-doc. ++ ++ -- Matthias Klose Mon, 16 Nov 1998 12:48:09 +0200 ++ ++egcs (1.1.0.91.58-3) frozen unstable; urgency=low ++ ++ * Previous version installed in potato, not slink. ++ * Updated from cvs 3 Nov 1998. ++ ++ -- Matthias Klose Tue, 3 Nov 1998 18:34:44 +0200 ++ ++egcs (1.1.0.91.58-2) unstable; urgency=low ++ ++ * [debian/rules]: added targets to apply and unapply patches. ++ * [debian/README.patches]: New file. ++ * Moved patches dir to debian/patches. debian/rules has to select ++ the patches to apply. ++ * Manual pages for genclass and gcov (fixes #5995, #20950, #22196). ++ * Apply egcs-1.1-reload patch needed for powerpc architecture. ++ * Fixed bugs (#17768, #20252, #25508, #27788). ++ * Reapplied alpha patch (#20875). ++ * Fixes first part of #22513, extended README.Debian (combining C & C++). ++ * Already fixed in earlier egcs-1.1 releases: #17963, #20252, #20524, ++ #20640, #22450, #24244, #24288, #28520. ++ ++ -- Matthias Klose Fri, 30 Oct 1998 13:41:45 +0200 ++ ++egcs (1.1.0.91.58-1) experimental; urgency=low ++ ++ * New upstream version. That's the egcs-1.1.1 prerelease plus patches from ++ the cvs archive upto 29 Oct 1998. ++ * Merged files from the egcs and snapshot packages. ++ * Updated libg++ to libg++-2.8.1.2 (although the Debian package name is still ++ 2.8.2). ++ * Moved patches dir to patches-1.1. ++ * Dan Jacobowitz: ++ * This is a snapshot from the egcs_1_1_branch, with ++ libapi, reload, builtin-apply, and egcs patches from ++ the debian/patches/ dir applied, along with the egcs-gpc-patches ++ and gcc/p/diffs/gcc-egcs-2.91.55.diff. ++ * Conditionalize gcj and chill (since they aren't in this branch). ++ * Fake snapshots drop the -snap-main. ++ ++ -- Matthias Klose Thu, 29 Oct 1998 15:15:19 +0200 ++ ++egcs-snapshot (1.1-19981019-5.1) experimental; urgency=low ++ ++ * This is a snapshot from the egcs_1_1_branch, with ++ libapi, reload, builtin-apply, and egcs patches from ++ the debian/patches/ dir applied, along with the egcs-gpc-patches ++ and gcc/p/diffs/gcc-egcs-2.91.55.diff. ++ * Conditionalize gcj and chill (since they aren't in this ++ branch). ++ * Fake snapshots drop the -snap-main. ++ ++ -- Daniel Jacobowitz Mon, 19 Oct 1998 22:19:23 -0400 ++ ++egcs (1.1b-5) unstable; urgency=low ++ ++ * [debian/control.in] Fixed typo in dependencies (#28076, #28087, #28092). ++ ++ -- J.H.M. Dassen (Ray) Sun, 18 Oct 1998 22:56:51 +0200 ++ ++egcs (1.1b-4) unstable; urgency=low ++ ++ * Strengthened g++ dependency on libstdc++_LIB_SO_-dev from ++ `Recommends' to `Depends'. ++ * Updated README.Debian for egcs-1.1. ++ * Updated TODO. ++ ++ -- Matthias Klose Thu, 15 Oct 1998 12:38:47 +0200 ++ ++egcs-snapshot (19981005-0.1) experimental; urgency=low ++ ++ * Make libstdc++2.9-snap-main and libg++-snap-main provide ++ their mainstream equivalents and put those equivalents into ++ their shlibs file. ++ * Package gcj, the GNU Compiler for Java(TM). ++ ++ * New upstream version of egcs (The -regcs_latest_snapshot branch). ++ * Build without libg++ entirely. ++ * Leave out gpc for now - the internals are sufficiently different ++ that it does not trivially compile. ++ * Include an experimental reload patch for powerpc - this is, ++ in the words of its author, not release quality, but it allows ++ powerpc linuxthreads to function. ++ * On architectures where we are the primary compiler, let snapshots ++ build with --prefix=/usr and conflict with the stable versions. ++ * Package chill, a front end for the language Chill. ++ * Other applied patches from debian/patches/: egcs-patches and ++ builtin-apply-patch. ++ * Use reload.c revision 1.43 to avoid a nasty bug. ++ ++ -- Daniel Jacobowitz Wed, 7 Oct 1998 00:27:42 -0400 ++ ++egcs (1.1b-3.1) unstable; urgency=low ++ ++ * NMU to fix the egcc -> gcc link once and for all ++ ++ -- Christopher C. Chimelis Tue, 22 Sep 1998 16:11:19 -0500 ++ ++egcs (1.1b-3) unstable; urgency=low ++ ++ * Oops. The egcc -> gcc link on archs where gcc is egcc was broken. ++ Thanks to Chris Chimelis for pointing this out. ++ ++ -- J.H.M. Dassen (Ray) Mon, 21 Sep 1998 20:51:35 +0200 ++ ++egcs (1.1b-2) unstable; urgency=low ++ ++ * New upstream spellfix release (Debian revision is 2 as the internal ++ version numbers didn't change). ++ * Added egcc -> gcc symlink on architectures where egcc is the primary C ++ compiler. Thus, maintainers of packages that require egcc, can now ++ simply use "egcc" without conditionals. ++ * Porters: we hope/plan to make egcs's gcc the default C compiler on all ++ platforms once the 2.2.x kernels are available. Please test this version ++ thoroughly, and give us a GO / NO GO for your architecture. ++ * Some symbols cpp used to predefine were removed upstream in order to clean ++ up the cpp namespace, but imake requires them for determining the proper ++ settings for LinuxMachineDefines (see /usr/X11R6/lib/X11/{Imake,linux}.cf), ++ thus we put them back. Thanks to Paul Slootman for reporting his imake ++ problems on Alpha. ++ * [gcc/config/alpha/linux.h] Added -D__alpha to CPP_PREDEFINES . ++ Thanks to Chris Chimelis for the alpha-only 1.1a-1.1 NMU which fixed ++ this already. ++ * [gcc/config/i386/linux.h] Added -D__i386__ to CPP_PREDEFINES . ++ * [gcc/config/sparc/linux.h] Has -Dsparc in CPP_PREDEFINES . ++ * [gcc/config/sparc/linux64.h] Has -Dsparc in CPP_PREDEFINES . ++ * [gcc/config/m68k/linux.h] Has -Dmc68000 in CPP_PREDEFINES . ++ * [gcc/config/rs6000/linux.h] Has -Dpowerpc in CPP_PREDEFINES . ++ * [gcc/config/arm/linux.h] Has -Darm in CPP_PREDEFINES . ++ * [gcc/config/i386/gnu.h] Has -Di386 in CPP_PREDEFINES . ++ * Small fixes and updates in README. ++ * Changes affecting the source package only: ++ * [gcc/Makefile.in, gcc/cp/Make-lang.in, gcc/p/Make-lang.in] ++ Daniel Jacobowitz: Ugly hacks of various kinds to make cplib2.txt get ++ properly regenerated with multilib. ++ * [debian/TODO] Created. ++ * [INSTALL/index.html] Fixed broken link. ++ ++ -- J.H.M. Dassen (Ray) Sun, 20 Sep 1998 14:05:15 +0200 ++ ++egcs (1.1a-1) unstable; urgency=low ++ ++ * New upstream release. ++ * Added README.libstdc++ . ++ * Updated Standards-Version. ++ * Matthias: ++ * Downgraded gobjc dependency on egcs-docs from Recommends: to Suggests: . ++ * [libg++/Makefile.in] Patched not to rely on a `-f' flag of `ln'. ++ ++ -- J.H.M. Dassen (Ray) Wed, 2 Sep 1998 19:57:43 +0200 ++ ++egcs (1.1-1) unstable; urgency=low ++ ++ * egcs-1.1 prerelease (from the last Debian package only the version file ++ changed). ++ * "Final" gpc Beta 2.1 gpc-19980830. ++ * Included libg++ and gpc in the .orig tarball. so that diffs are getting ++ smaller. ++ * debian/control.in: Changed maintainer address to galenh-egcs@debian.org. ++ * debian/copyright: Updated URLs. ++ ++ -- Matthias Klose Mon, 31 Aug 1998 12:43:13 +0200 ++ ++egcs (1.0.99.56-0.1) unstable; urgency=low ++ ++ * New upstream snapshot 19980830 from CVS (called egcs-1.1 19980830). ++ * New libg++ snapshot 980828. ++ * Put all patches patches subdirectory; see patches/README in the source. ++ * debian/control.in: readded for libg++2.8.2-dev: ++ Replaces: libstdc++2.8-dev (<= 2.90.29-0.5) ++ * Renamed libg++2.9 package to libg++2.8.2. ++ * gcc/p/gpc-decl.c: Fix from Peter@Gerwinski.de; fixes optimization errors. ++ * patches/gpc-patch2: Fix from Peter@Gerwinski.de; fixes alpha errors. ++ * debian/rules: New configuration flag for building with and without ++ libstdc++api patch; untested without ... ++ ++ -- Matthias Klose Sun, 30 Aug 1998 12:04:22 +0200 ++ ++egcs (1.0.99-0.6) unstable; urgency=low ++ ++ * PowerPC fixes. ++ * On powerpc, generate the -msoft-float libs and package them ++ as egcs-nof. ++ * Fix signed char error in gpc. ++ * Create a libg++.so.2.9 compatibility symlink. ++ ++ -- Daniel Jacobowitz Tue, 25 Aug 1998 11:44:09 -0400 ++ ++egcs (1.0.99-0.5) unstable; urgency=low ++ ++ * New upstream snapshot 19980824. ++ * New gpc snapshot gpc-980822; reenabled gpc for alpha. ++ ++ -- Matthias Klose Tue, 25 Aug 1998 01:21:08 +0200 ++ ++egcs (1.0.99-0.4) unstable; urgency=low ++ ++ * New upstream snapshot 19980819. Should build glibc 2.0.9x on PPC. ++ ++ -- Matthias Klose Wed, 19 Aug 1998 14:18:07 +0200 ++ ++egcs (1.0.99-0.3) unstable; urgency=low ++ ++ * New upstream snapshot 19980816. ++ * debian/rules: build correct debian/control and debian/*.shlibs ++ * Enabled Haifa scheduler for ix86. ++ ++ -- Matthias Klose Mon, 17 Aug 1998 16:29:35 +0200 ++ ++egcs (1.0.99-0.2) unstable; urgency=low ++ ++ * New upstream snapshot: egcs-19980812, minor changes only. ++ * Fixes for building on `primary' targets. ++ * Disabled gpc on `alpha' architecture. ++ * Uses debhelper 1.1.6 ++ * debian/control.in: Replace older snapshot versions in favor of newer ++ normal versions. ++ * debian/rules: Fixes building of binary-arch target only. ++ ++ -- Matthias Klose Thu, 13 Aug 1998 11:59:41 +0200 ++ ++egcs (1.0.99-0.1) unstable; urgency=low ++ ++ * New upstream version: pre egcs-1.1 version. ++ * Many changes ... for details see debian/changelog.snapshot in the ++ source package. ++ * New packages libstdc++2.9 and libstdc++2.9-dev. ++ * New libg++ snapshot 980731: new packages libg++2.9 and libg++2.9-dev. ++ * New gpc snapshot gpc-980729: new package gpc. ++ * Uses debhelper 1.1 ++ ++ -- Matthias Klose Mon, 10 Aug 1998 13:00:27 +0200 ++ ++egcs-snapshot (19980803-4) experimental; urgency=low ++ ++ * rebuilt debian/control. ++ ++ -- Matthias Klose Wed, 5 Aug 1998 08:51:47 +0200 ++ ++egcs-snapshot (19980803-3) experimental; urgency=low ++ ++ * debian/rules: fix installation locations of NEWS, header and ++ `undocumented' files. ++ * man pages aren't compressed for the snapshot package. ++ ++ -- Matthias Klose Tue, 4 Aug 1998 17:34:31 +0200 ++ ++egcs-snapshot (19980803-2) experimental; urgency=low ++ ++ * debian/rules: Uses debhelper. Old in debian/rules.old. ++ renamed postinst, prerm files for use with debhelper. ++ * debian/{libg++2.9,libstdc++2.9}/postinst: call ldconfig only, ++ when called for configure. ++ * egcs-docs is architecture independent package. ++ * new libg++ snapshot 980731. ++ * installed libstdc++ api patch (still buggy). ++ ++ -- Matthias Klose Mon, 3 Aug 1998 13:20:59 +0200 ++ ++egcs-snapshot (19980729-1) experimental; urgency=low ++ ++ * New snapshot version 19980729 from CVS archive. ++ * New gpc snapshot gpc-980729. ++ * Let gcc/configure decide about using the Haifa scheduler. ++ * Remove -DDEBIAN. That was needed for the security improvements with ++ regard to the /tmp problem. egcs-1.1 chooses another approach. ++ * Save test-protocol and extract gpc errors to gpc-test-summary. ++ * Tighten binutils dependency to 2.9.1. ++ * debian/rules: new build-info target ++ * debian/{control.in,rules}: _SO_ and BINUTILSV substitution. ++ * debian/rules: add dependency for debian/control. ++ * debian/rules: remove bin/c++filt ++ * TODO: next version will use debhelper; the unorganized moving of ++ files becomes unmanageable ... ++ * TODO: g++ headers in stdc++ package? check! ++ ++ -- Matthias Klose Thu, 30 Jul 1998 12:10:20 +0200 ++ ++egcs-snapshot (19980721-1) experimental; urgency=low ++ ++ * Unreleased. Infinite loops in executables made by gpc. ++ ++ -- Matthias Klose Wed, 22 Jul 1998 18:07:20 +0200 ++ ++egcs-snapshot (19980715-1) experimental; urgency=low ++ ++ * New snapshot version from CVS archive. ++ * New gpc snapshot gpc-980715. ++ * New libg++ version libg++-2.8.2-980708. Changed versioning ++ schema for library. The major versions of libc, libstdc++ and the ++ g++ interface are coded in the library name. Use this new schema, ++ but provide a symlink to our previous schema, since the library ++ seems to be binary compatible. ++ * [debian/rules]: Fixed bug in build target, when bootstrap returns ++ with an error ++ ++ -- Matthias Klose Wed, 15 Jul 1998 10:55:05 +0200 ++ ++egcs-snapshot (19980701-1) experimental; urgency=low ++ ++ * New snapshot version from CVS archive. ++ Two check programs in libg++ had to be manually killed to finish the ++ testsuite (tBag and tSet). ++ * New gpc snapshot gpc-980629. ++ * Incorporated debian/rules changes from egcs-1.0.3a-0.5 (but don't remove ++ gcc/cp/parse.c gcc/c-parse.c gcc/c-parse.y gcc/objc/objc-parse.c ++ gcc/objc/objc-parse.y, since these files are part of the release). ++ * Disable the -DMKTEMP_EACH_FILE -DHAVE_MKSTEMP -DDEBIAN flags for the ++ snapshot. egcs-1.1 will have another solution. ++ * Don't bootstrap the snapshot with -fno-force-mem. Internal compiler ++ error :-( ++ * libf2c.a and f2c.h have changed names to libg2c.a and g2c.h and ++ have moved again into the gcc-lib dir. They are installed under ++ libg2c.a and g2c.h. Is it necessary to provide links f2c -> g2c ? ++ * debian/rules: reflect change of build dir of libraries. ++ ++ -- Matthias Klose Wed, 2 Jul 1998 13:15:28 +0200 ++ ++egcs-snapshot (19980628-0.1) experimental; urgency=low ++ ++ * New upstream snapshot version. ++ * Non-maintainer upload; Matthias appears to be absent currently. ++ * Updated shlibs. ++ * Merged changes from regular egcs: ++ * [debian/control] Tightened dependency on binutils to 2.8.1.0.23 or ++ newer, as according to INSTALL/SPECIFIC PowerPC (and possibly Sparc) ++ need this. ++ * [debian/rules] Clean up some generated files outside builddir, ++ so the .diff.gz becomes smaller. ++ * [debian/rules] Partial sync/update with the one for the regular egcs ++ version. ++ * [debian/rules] Make gcc/p/configure executable. ++ ++ -- J.H.M. Dassen (Ray) Wed, 1 Jul 1998 07:12:15 +0200 ++ ++egcs (1.0.3a-0.6) frozen unstable; urgency=low ++ ++ * Some libg++ development files were in libstdc++2.8-dev rather than ++ libg++2.8-dev. Fixed this and dealt with upgrading from the earlier ++ versions (fixes #23908; this bug is not marked release-critical, but ++ is annoying and can be quite confusing for users. Therefore, I think ++ this fix should go in 2.0). ++ ++ -- J.H.M. Dassen (Ray) Tue, 30 Jun 1998 11:10:14 +0200 ++ ++egcs (1.0.3a-0.5) frozen unstable; urgency=low ++ ++ * Fixed location of .hP files (Fixes #23448). ++ * [debian/rules] simplified extraction of the files for libg++2.8-dev. ++ ++ -- J.H.M. Dassen (Ray) Wed, 17 Jun 1998 09:33:41 +0200 ++ ++egcs (1.0.3a-0.4) frozen unstable; urgency=low ++ ++ * [gcc/gcc.c] There is one call to choose_temp_base for determining the ++ tempdir to be used only; #ifdef HAVE_MKSTEMP delete the tempfile created ++ as a side effect. (fixes #23123 for egcs). ++ * [gcc/collect2.c] There's still a vulnerability here; I don't see how ++ I can fix it without leaving behind tempfiles though. ++ * [debian/control] Tightened dependency on binutils to 2.8.1.0.23 or ++ newer, as according to INSTALL/SPECIFIC PowerPC (and possibly Sparc) ++ need this. ++ * [debian/rules] Clean up some generated files outside builddir, so the ++ .diff.gz becomes smaller. ++ ++ -- J.H.M. Dassen (Ray) Sat, 13 Jun 1998 09:06:52 +0200 ++ ++egcs-snapshot (19980608-1) experimental; urgency=low ++ ++ * New snapshot version. ++ ++ -- Matthias Klose Tue, 9 Jun 1998 14:07:44 +0200 ++ ++egcs (1.0.3a-0.3) frozen unstable; urgency=high (security fixes) ++ ++ * [gcc/toplev.c] set flag_force_mem to 1 at optimisation level 3 or higher. ++ This works around #17768 which is considered release-critical. ++ * Changes by Matthias: ++ * [debian/README] Documentation of the compiler situation for Objective C. ++ * [debian/rules, debian/control.*] Generate control file from a master ++ file. ++ * [debian/rules] Updates for Pascal and Fortran parts; brings it in sync ++ with the one for the egcs snapshots. ++ * Use the recommended settings LDFLAGS=-s CFLAGS= BOOT_CFLAGS='-O2'. ++ * Really compile -DMKTEMP_EACH_FILE -DHAVE_MKSTEMP (really fixes #19453 ++ for egcs). ++ * [gcc/gcc.c] A couple of temp files weren't marked for deletion. ++ ++ -- J.H.M. Dassen (Ray) Sun, 31 May 1998 22:56:22 +0200 ++ ++egcs (1.0.3a-0.2) frozen unstable; urgency=high (security fixes) ++ ++ * Security improvements with regard to the /tmp problem ++ (gcc opens predictably named files in TMPDIR which can be abused via ++ symlinks) (Fixes #19453 for egcs). ++ * Compile -DMKTEMP_EACH_FILE to ensure the %u name is generated randomly ++ every time; affects gcc/gcc.c . ++ * [gcc/choose-temp.c, libiberty/choose-temp.c]: use mktemp(3) if compiled ++ -DUSE_MKSTEMP . ++ * Security improvements: don't use the result of choose_temp_base in a ++ predictable fashion. ++ [gcc/gcc.c]: ++ * @c, @objective-c: use random name rather then tempbasename.i for ++ intermediate preprocessor output (%g.i -> %d%u). ++ * @c, @objective-c: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @c, @objective-c, @cpp-output, @assembler-with-cpp: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @c, @objective-c, @assembler-with-cpp: use previous random name ++ (cc1|cpp output) rather then tempbasename.s for intermediate assembler ++ input (%g.s -> %U) ++ [gcc/f/lang-specs.h]: ++ * @f77-cpp-input: use random name rather then tempbasename.i for ++ intermediate cpp output (%g.i -> %d%u). ++ * @f77-cpp-input: use previous random name (cpp output) rather than ++ tempbasename.i for f771 input (%g.i -> %U). ++ * @f77-cpp-input: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @f77-cpp-input: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @ratfor: use random name rather then tempbasename.i for ++ intermediate ratfor output (%g.f -> %d%u). ++ * @ratfor: use previous random name (ratfor output) rather than ++ tempbasename.i for f771 input (%g.f -> %U). ++ * @ratfor: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @ratfor: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @ratfor: use previous random name ++ (ratfor output) rather then tempbasename.s for intermediate assembler ++ input (%g.s -> %U). ++ * @f77: use random name rather then tempbasename.s for ++ intermediate ratfor output (%g.f -> %d%u). ++ * @ratfor: use previous random name (ratfor output) rather than ++ tempbasename.i for f771 input (%g.f -> %U). ++ * @ratfor: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @ratfor: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @ratfor: use previous random name ++ (ratfor output) rather then tempbasename.s for intermediate assembler ++ input (%g.s -> %U). ++ * @f77: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @f77: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @ratfor: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %U). ++ * Run the testsuite (this requires the dejagnu package in experimental; ++ unfortunately, it is difficult to distinguish this version from the one ++ in frozen). ++ if possible, and log the results in warn_summary and bootstrap-summary. ++ * [gcc/choose-temp.c, libiberty/choose-temp.c]: s|returh|return| in ++ comment. ++ * Added notes on the Debian compiler setup [debian/README] to the ++ development packages. ++ * Matthias: ++ * [libg++/etc/lf/Makefile.in] Replaced "-ltermcap" by "-lncurses". ++ * [debian/rules] Updated so it can be used for both egcs releases and ++ snapshots easily; added support for the GNU Pascal Compiler gpc. ++ * [contrib/test_summary, contrib/warn_summary] Added from CVS. ++ * Run compiler checks and include results in /usr/doc/. ++ * Updates to the README. ++ * [debian/rules] Use assignments to speed up startup. ++ * [debian/rules] Show the important variables at the start of the build ++ process. ++ * [debian/control.secondary] Added a dependency of gobjc on egcc on ++ architectures where egcs provides the secondary compiler, as ++ /usr/bin/egcc is the compiler driver for gobjc. (Fixes #22829). ++ * [debian/control.*] Bumped Standards-Version; used shorter version ++ numbers in the dependency relationships (esthetic difference only); ++ fixed typo. ++ ++ -- J.H.M. Dassen (Ray) Tue, 26 May 1998 21:47:41 +0200 ++ ++egcs-snapshot (19980525-1) experimental; urgency=low ++ ++ * New snapshot version. ++ ++ -- Matthias Klose Tue, 26 May 1998 18:04:06 +0200 ++ ++egcs-snapshot (19980517-1) experimental; urgency=low ++ ++ * "Initial" release of the egcs-snapshot package; many debian/* files ++ derived from the egcs-1.0.3a-0.1 package (maintained by Galen Hazelwood ++ , NMU's by J.H.M. Dassen (Ray) ) ++ * The egcs-snapshot packages can coexist with the packages of the ++ egcs release. Package names have a '-ss' appended. ++ * All packages are installed in a separate tree (/usr/lib/egcs-ss following ++ the FHSS). ++ * Made all snapshot packages extra, all snapshot packages conflict ++ with correspondent egcs packages, which are newer than the snapshot. ++ * Included libg++-2.8.1-980505. ++ * Included GNU Pascal (gpc-980511). ++ * Haifa scheduler enabled for all snapshot packages. ++ * Run compiler checks and include results in /usr/doc/. ++ * Further information in /usr/doc//README.snapshot. ++ ++ -- Matthias Klose Wed, 20 May 1998 11:14:06 +0200 ++ ++egcs (1.0.3a-0.1) frozen unstable; urgency=low ++ ++ * New upstream release egcs-2.90.29 980515 (egcs-1.0.3 release) ++ (we were using 1.0.3-prerelease). This includes the Haifa patches ++ we had since 1.0.3-0.2 and the gcc/objc/thr-posix.c patch we had ++ since 1.0.3-0.1; the differences with 1.0.3-prerelease + patches ++ we had is negligable. ++ * iostream info documentation was in the wrong package (libg++2.8-dev). ++ Now it's in libstdc++2.8-dev. (Thanks to Jens Rosenboom for bringing ++ this to my attention). As 1.0.3-0.3 didn't make it out of Incoming, ++ I'm not adding "Replaces:" for this; folks who had 1.0.3-0.3 installed ++ already know enough to use --force-overwrite. ++ * [gcc/objc/objc-act.c] Applied patch Matthias Klose supplied me with that ++ demangles Objective C method names in gcc error messages. ++ * Explicitly disable Haifa scheduling on Alpha, to make it easier to use ++ this package's diff with egcs snapshots, which may turn on Haifa ++ scheduling even though it is still unstable. (Requested by Chris Chimelis) ++ * Don't run "configure" again if builddir already exists (makes it faster ++ to restart builds in case one is hacking internals). Requested by ++ Johnnie Ingram. ++ * [gcc/gbl-ctors.h] Don't use extern declaration for atexit on glibc 2.1 ++ and higher (the prototype has probably changed; having the declaration ++ broke Sparc compiles). ++ * [debian/rules] Determine all version number automatically (from the ++ version string in gcc/version.c). ++ * [debian/copyright] Updated FTP locations; added text about libg++ (fixes ++ #22465). ++ ++ -- J.H.M. Dassen (Ray) Sat, 16 May 1998 17:41:44 +0200 ++ ++egcs (1.0.3-0.3) frozen unstable; urgency=low ++ ++ * Made an "egcs-doc" package containing documentation for egcs (e)gcc, ++ g++, gobjc, so that administrators can choose whether to have this ++ documenation or the documentation that comes with the GNU gcc package. ++ Dependency on this is Recommends: on architectures where egcs provides ++ the primary C compiler; Suggests: on the others (where GNU gcc is still ++ the primary C compiler). ++ * Use the g++ FAQ from gcc/cp rather than libg++, as that version is more ++ up to date. ++ * Added iostream info documentation to libstdc++2.8-dev. ++ ++ -- J.H.M. Dassen (Ray) Wed, 13 May 1998 08:46:10 +0200 ++ ++egcs (1.0.3-0.2) frozen unstable; urgency=low ++ ++ * Added libg++ that works with egcs, found at ++ ftp://ftp.yggdrasil.com/private/hjl/libg++-2.8.1-980505.tar.gz ++ (fixes #20587 (Severity: important)). ++ * The "libg++" and "libg++-dev" virtual packages now refer to the GNU ++ extensions. ++ * Added the g++ FAQ that comes with libg++ to the g++ package. ++ * libg++/Makefile.in: added $(srcdir) to rule for g++FAQ.info so that it ++ builds OK in builddir. ++ * Added -D__i386__ to the cpp predefines on intel. ++ * Patches Matthias supplied me with: ++ * Further 1.0.3 prerelease patches from CVS. ++ This includes patches to the Haifa scheduler. Alpha porters, please ++ check if this makes the Haifa scheduler OK again. ++ * Objective C patches from CVS. ++ ++ -- J.H.M. Dassen (Ray) Fri, 8 May 1998 14:43:20 +0200 ++ ++egcs (1.0.3-0.1) frozen unstable; urgency=low (high for maintainers that use objc) ++ ++ * bug fixes only in new upstream version ++ * Applied patches from egcs CVS archive (egcs_1_03_prerelease) ++ (see gcc/ChangeLog in the egcs source package). ++ * libstdc++2.8-dev no longer Provides: libg++-dev (fixes #21153). ++ * libstdc++2.8-dev now Conflicts: libg++27-dev (bo), ++ libg++272-dev (hamm) [regular packages] rather than ++ Conflicts: libg++-dev [virtual package] to prepare the way for "libg++" ++ to be used as a virtual package for a new libg++ package (i.e. an up to ++ date one, which not longer contains libstdc++, but only the GNU ++ extensions) that is compatible with the egcs g++ packages. Such a package ++ isn't available yet. Joel Klecker tried building libg++2.8.1.1a within ++ egcs's libstdc++ setup, but it appears to need true gcc 2.8.1 . ++ * Filed Severity: important bugs against wxxt1-dev (#21707) because these ++ still depend on libg++-dev, which is removed in this version. ++ A fixed libsidplay1-dev has already been uploaded. ++ * libstdc++2.8 is now Section: base and Priority: required (as dselect is ++ linked against it). ++ * Disabled Haifa scheduling on Alpha again; Chris Chimelis reported ++ that this caused problems on some machines. ++ * [gcc/extend.texi] ++ ftp://maya.idiap.ch/pub/tmb/usenix88-lexic.ps.Z is no longer available; ++ use http://master.debian.org/~karlheg/Usenix88-lexic.pdf . ++ (fixes the egcs part of #20002). ++ * Updated Standards-Version. ++ * Changed chmod in debian/rules at Johnie Ingram's request. ++ * Rather than hardwire the Debian part of the packages' version number, ++ extract it from debian/changelog . ++ * Use gcc/objc/thr-posix.c from 980418 egcs snapshot to make objc work. ++ (Fixes #21192). ++ * Applied workaround for the GNUstep packages on sparc systems. ++ See README.sparc (on sparc packages only) in the doc directory. ++ This affects the other compilers as well. ++ * Already done in 1.0.2-0.7: the gobjc package now provides a virtual ++ package objc-compiler. ++ ++ -- J.H.M. Dassen (Ray) Tue, 28 Apr 1998 12:05:28 +0200 ++ ++egcs (1.0.2-0.7) frozen unstable; urgency=low ++ ++ * Separated out Objective-C compiler. ++ * Applied patch from http://www.cygnus.com/ml/egcs/1998-Apr/0614.html ++ ++ -- Matthias Klose Fri, 17 Apr 1998 10:25:48 +0200 ++ ++egcs (1.0.2-0.6) frozen unstable; urgency=low ++ ++ * Due to upstream changes (libg++ is now only the GNU specific C++ ++ classes, and is no longer maintained; libstdc++ contains the C++ ++ standard library, including STL), the virtual "libg++-dev" ++ package's meaning has become confusing. Therefore, new or updated ++ packages should no longer use the virtual "libg++-dev" package. ++ * Corrected g++'s Recommends to libstdc++2.8-dev (>=2.90.27-0.1). ++ The previous version had Recommends: libstdc++-dev (>=2.90.27-0.1) ++ which doesn't work, as libstc++-dev is a virtual package. ++ * Bumped Standards-Version. ++ ++ -- J.H.M. Dassen (Ray) Tue, 14 Apr 1998 11:52:08 +0200 ++ ++egcs (1.0.2-0.5) frozen unstable; urgency=low (high for maintainers of packages that use libstdc++) ++ ++ * Modified shlibs file for libstdc++ to generate versioned dependencies, ++ as it is not link compatible with the 1.0.1-x versions in ++ project/experimental. (Fixes #20247, #20033) ++ Packages depending on libstd++ should be recompiled to fix their ++ dependencies. ++ * Strenghtened g++'s Recommends: libstdc++-dev to the 1.0.2 version or ++ newer. ++ * Fixed problems with the unknown(7) symlink for gcov. ++ * Reordering links now works. ++ ++ -- Adam Heath Sun, 12 Apr 1998 13:09:30 -0400 ++ ++egcs (1.0.2-0.4) frozen unstable; urgency=low ++ ++ * Unreleased. This is the version Adam Heath received from me. ++ * Replaces: gcc (<= 2.7.2.3-3) so that the overlap with the older gcc ++ packages (including bo's gcc_2.7.2.1-8) is handled properly ++ (fixes #19931, #19672, #20217, #20593). ++ * Alpha architecture (fixes #20875): ++ * Patched gcc/config/alpha/linux.h for the gmon functions to operate ++ properly. ++ * Made egcs the primary C compiler. ++ * Enabled Hafia scheduling. ++ * Lintian-detected problems: ++ * E: libstdc++2.8: ldconfig-symlink-before-shlib-in-deb usr/lib/libstdc++.so.2.8 ++ * E: egcc: binary-without-manpage gcov ++ Reported as wishlist bug; added link to undocumented(7). ++ * W: libstdc++2.8: non-standard-executable-perm usr/lib/libstdc++.so.2.8.0 0555 ++ * E: libstdc++2.8: shlib-with-executable-bit usr/lib/libstdc++.so.2.8.0 0555 ++ ++ -- J.H.M. Dassen (Ray) Fri, 10 Apr 1998 14:46:46 +0200 ++ ++egcs (1.0.2-0.3) frozen unstable; urgency=low ++ ++ * Really fixed dependencies. ++ ++ -- J.H.M. Dassen (Ray) Mon, 30 Mar 1998 11:30:26 +0200 ++ ++egcs (1.0.2-0.2) frozen unstable; urgency=low ++ ++ * Fixed dependencies. ++ ++ -- J.H.M. Dassen (Ray) Sat, 28 Mar 1998 13:58:58 +0100 ++ ++egcs (1.0.2-0.1) frozen unstable; urgency=low ++ ++ * New upstream version; it now has -Di386 in CPP_PREDEFINES. ++ * Only used the debian/* patches from 1.0.1-2; the rest of it appears ++ to be in 1.0.2 already. ++ ++ -- J.H.M. Dassen (Ray) Fri, 27 Mar 1998 11:47:14 +0100 ++ ++egcs (1.0.1-2) unstable; urgency=low ++ ++ * Integrated pre-release 1.0.2 patches ++ * Split out g++ ++ * egcs may now provide either the primary or secondary C compiler ++ ++ -- Galen Hazelwood Sat, 14 Mar 1998 14:15:32 -0700 ++ ++egcs (1.0.1-1) unstable; urgency=low ++ ++ * New upstream version ++ * egcs is now the standard Debian gcc! ++ * gcc now provides c-compiler (#15248 et al.) ++ * g77 now provides fortran77-compiler ++ * g77 dependencies now correct (#16991) ++ * /usr/doc/gcc/changelog.gz now has correct permissions (#16139) ++ ++ -- Galen Hazelwood Sat, 7 Feb 1998 19:22:30 -0700 ++ ++egcs (1.0-1) experimental; urgency=low ++ ++ * First official release ++ ++ -- Galen Hazelwood Thu, 4 Dec 1997 16:30:11 -0700 ++ ++egcs (970917-1) experimental; urgency=low ++ ++ * New upstream snapshot (There's a lot of stuff here as well, including ++ a new libstdc++, but it _still_ won't build...) ++ * eg77 driver now works properly ++ ++ -- Galen Hazelwood Wed, 17 Sep 1997 20:44:29 -0600 ++ ++egcs (970904-1) experimental; urgency=low ++ ++ * New upstream snapshot ++ ++ -- Galen Hazelwood Sun, 7 Sep 1997 18:25:06 -0600 ++ ++egcs (970814-1) experimental; urgency=low ++ ++ * Initial packaging (of initial snapshot!) ++ ++ -- Galen Hazelwood Wed, 20 Aug 1997 00:36:28 +0000 ++ ++gcc272 (2.7.2.3-12) unstable; urgency=low ++ ++ * Compiled on a glibc-2.0 based system. ++ * Reflect move of manpage to /usr/share in gcc.postinst as well. ++ * Moved gcc272-docs to section doc, priority optional. ++ ++ -- Matthias Klose Sat, 28 Aug 1999 13:42:13 +0200 ++ ++gcc272 (2.7.2.3-11) unstable; urgency=low ++ ++ * Follow Debian policy for GNU system type (fixes #42657). ++ * config/i386/linux.h: Remove %[cpp_cpu] from CPP_SPEC. Stops gcc-2.95 ++ complaining about obsolete spec operators (using gcc -V 2.7.2.3). ++ Patch suggested by Zack Weinberg . ++ ++ -- Matthias Klose Sun, 15 Aug 1999 20:12:21 +0200 ++ ++gcc272 (2.7.2.3-10) unstable; urgency=low ++ ++ * Renamed source package to gcc272. The egcs source package is renamed ++ to gcc, because it's now the "official" GNU C compiler. ++ * Changed maintainer address to "Debian GCC maintainers". ++ * Install info and man stuff to /usr/share. ++ ++ -- Matthias Klose Thu, 27 May 1999 12:29:23 +0200 ++ ++gcc (2.7.2.3-9) unstable; urgency=low ++ ++ * debian/{postinst,prerm}-doc: handle gcc272.info, not gcc.info. ++ Fixes #36306. ++ ++ -- Matthias Klose Tue, 20 Apr 1999 07:32:58 +0200 ++ ++gcc (2.7.2.3-8) unstable; urgency=low ++ ++ * Make gcc-2.7 the secondary compiler. Rename gcc package to gcc272. ++ On i386, sparc and m68k, this package is compiled against glibc2.0. ++ * The cpp package is built from the egcs source package. ++ ++ -- Matthias Klose Mon, 29 Mar 1999 22:48:50 +0200 ++ ++gcc (2.7.2.3-7) frozen unstable; urgency=low ++ ++ * Separated out ObjC compiler to gobjc27 package. ++ * Changed maintainer address. ++ * Synchronized README.Debian with egcs-1.1.1-3. ++ ++ -- Matthias Klose Tue, 29 Dec 1998 19:05:26 +0100 ++ ++gcc (2.7.2.3-6) frozen unstable; urgency=low ++ ++ * Link with -lc on i386, m68k, sparc, when building shared libraries ++ (fixes #25122). ++ ++ -- Matthias Klose Thu, 3 Dec 1998 12:12:12 +0200 ++ ++gcc (2.7.2.3-5) frozen unstable; urgency=low ++ ++ * Updated maintainer info. ++ * Updated Standards-Version; made lintian-clean. ++ * gcc-docs can coexist with the latest egcs-docs, so added (<= version) to ++ the Conflicts. ++ * Updated the README and renamed it to README.Debian . ++ * Put a reference to /usr/doc/gcc/README.Debian in the info docs. ++ * Updated description of g++272 . ++ * Clean up generated info files, to keep the diff small. ++ ++ -- J.H.M. Dassen (Ray) Tue, 17 Nov 1998 20:05:59 +0100 ++ ++gcc (2.7.2.3-4.8) frozen unstable; urgency=high ++ ++ * Non-maintainer release ++ * Fix type in extended description ++ * Removed wrong test in postinst ++ * Add preinst to clean up some stuff from an older gcc package properly ++ and stop man complaining about dangling symlinks ++ ++ -- Wichert Akkerman Fri, 17 Jul 1998 18:48:32 +0200 ++ ++gcc (2.7.2.3-4.7) frozen unstable; urgency=high ++ ++ * Really fixed gcc-docs postinst (Fixes #23470), so that `gcc-docs' ++ becomes installable. ++ ++ -- J.H.M. Dassen (Ray) Mon, 15 Jun 1998 07:53:40 +0200 ++ ++gcc (2.7.2.3-4.6) frozen unstable; urgency=high ++ ++ * [gcc.c] There is one call to choose_temp_base for determining the ++ tempdir to be used only; ++ #ifdef HAVE_MKSTEMP delete the tempfile created as a side effect. ++ (fixes #23123 for gcc). ++ * gcc-docs postinst was broken (due to a broken line) (fixes #23391, #23401). ++ * [debian/control] description for gcc-docs said `egcs' where it should have ++ said `gcc' (fixes #23396). ++ ++ -- J.H.M. Dassen (Ray) Thu, 11 Jun 1998 12:48:50 +0200 ++ ++gcc (2.7.2.3-4.5) frozen unstable; urgency=high ++ ++ * The previous version left temporary files behind, as they were not ++ marked for deletion afterwards. ++ ++ -- J.H.M. Dassen (Ray) Sun, 31 May 1998 22:49:14 +0200 ++ ++gcc (2.7.2.3-4.4) frozen unstable; urgency=high (security fixes) ++ ++ * Security improvements with regard to the /tmp problem ++ (gcc opens predictably named files in TMPDIR which can be abused via ++ symlinks) (Fixes #19453 for gcc): ++ * Compile -DMKTEMP_EACH_FILE to ensure the %u name is generated randomly ++ every time; affects gcc/gcc.c . ++ * [cp/g++.c, collect2.c, gcc.c] If compiled -DHAVE_MKSTEMP use mkstemp(3) ++ rather than mktemp(3). ++ * Security improvements: don't use the result of choose_temp_base in a ++ predictable fashion. ++ [gcc.c]: ++ * @c, @objective-c: use random name rather then tempbasename.i for ++ intermediate preprocessor output (%g.i -> %d%u). ++ * @c, @objective-c: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @c, @objective-c, @cpp-output, @assembler-with-cpp: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @c, @objective-c, @assembler-with-cpp: use previous random name ++ (cc1|cpp output) rather then tempbasename.s for intermediate assembler ++ input (%g.s -> %U) ++ [f/lang-specs.h]: ++ * @f77-cpp-input: use random name rather then tempbasename.i for ++ intermediate cpp output (%g.i -> %d%u). ++ * @f77-cpp-input: use previous random name (cpp output) rather than ++ tempbasename.i for f771 input (%g.i -> %U). ++ * @f77-cpp-input: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @f77-cpp-input: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @ratfor: use random name rather then tempbasename.i for ++ intermediate ratfor output (%g.f -> %d%u). ++ * @ratfor: use previous random name (ratfor output) rather than ++ tempbasename.i for f771 input (%g.f -> %U). ++ * @ratfor: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @ratfor: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @ratfor: use previous random name ++ (ratfor output) rather then tempbasename.s for intermediate assembler ++ input (%g.s -> %U). ++ * @f77: use random name rather then tempbasename.s for ++ intermediate ratfor output (%g.f -> %d%u). ++ * @ratfor: use previous random name (ratfor output) rather than ++ tempbasename.i for f771 input (%g.f -> %U). ++ * @ratfor: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @ratfor: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @ratfor: use previous random name ++ (ratfor output) rather then tempbasename.s for intermediate assembler ++ input (%g.s -> %U). ++ * @f77: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %d%u). ++ * @f77: switched ++ "as [-o output file] " to ++ "as [-o output file]". ++ * @ratfor: use random name rather then tempbasename.s for ++ intermediate compiler output (%g.s -> %U). ++ ++ -- J.H.M. Dassen (Ray) Sat, 30 May 1998 17:27:03 +0200 ++ ++gcc (2.7.2.3-4.3) frozen unstable; urgency=high ++ ++ * The "alpha" patches from -4 affected a lot more than alpha support, ++ and in all likeliness broke compilation of libc6 2.0.7pre3-1 ++ and 2.0.7pre1-4 . I removed them by selective application of the ++ diff between -4 and -4. (should fix #22292). ++ * Fixed reference to the trampolines paper (fixes #20002 for Debian; ++ this still needs to be forwarded). ++ * This is for frozen too. (obsoletes #22390 (request to move -4.2 to ++ frozen)). ++ * Split of gcc-docs package, so that the gcc can be succesfully installed ++ on systems that have egcs-docs installed. ++ * Added the README on the compiler situation that's already in the egcs ++ packages. ++ * Use the recommended settings LDFLAGS=-s CFLAGS= BOOT_CFLAGS='-O2'. ++ ++ -- J.H.M. Dassen (Ray) Thu, 28 May 1998 20:03:59 +0200 ++ ++gcc (2.7.2.3-4.2) unstable; urgency=low ++ ++ * Still for unstable, as I have received no feedback about the g++272 ++ package yet. ++ * gcc now Provides: objc-compiler . ++ * Clean up /etc/alternatives/{g++,g++.1.gz} if they are dangling. ++ (fixes #19765, #20563) ++ ++ -- J.H.M. Dassen (Ray) Wed, 22 Apr 1998 12:40:45 +0200 ++ ++gcc (2.7.2.3-4.1) unstable; urgency=low ++ ++ * Bumped Standards-Version. ++ * Forked off a g++272 package (e.g. for code that uses the GNU extensions ++ in libg++); for now this is in "unstable" only; feedback appreciated. ++ * Some cleanup (lintian): permissions, absolute link, gzip manpage. ++ ++ -- J.H.M. Dassen (Ray) Fri, 17 Apr 1998 13:05:25 +0200 ++ ++gcc (2.7.2.3-4) unstable; urgency=low ++ ++ * Added alpha patches ++ * Only build C and objective-c compilers, split off g++ ++ ++ -- Galen Hazelwood Sun, 8 Mar 1998 21:16:39 -0700 ++ ++gcc (2.7.2.3-3) unstable; urgency=low ++ ++ * Added patches for m68k ++ * Added patches for sparc (#13968) ++ ++ -- Galen Hazelwood Fri, 17 Oct 1997 18:25:21 -0600 ++ ++gcc (2.7.2.3-2) unstable; urgency=low ++ ++ * Added g77 support (g77 0.5.21) ++ ++ -- Galen Hazelwood Wed, 10 Sep 1997 18:44:54 -0600 ++ ++gcc (2.7.2.3-1) unstable; urgency=low ++ ++ * New upstream version ++ * Now using pristine source ++ * Removed misplaced paragraph in cpp.texi (#10877) ++ * Fix security bug for temporary files (#5298) ++ * Added Suggests: libg++-dev (#12335) ++ * Patched objc/thr-posix.c to support conditions (#12502) ++ ++ -- Galen Hazelwood Mon, 8 Sep 1997 12:20:07 -0600 ++ ++gcc (2.7.2.2-7) unstable; urgency=low ++ ++ * Made cc and c++ managed through alternates mechanism (for egcs) ++ ++ -- Galen Hazelwood Tue, 19 Aug 1997 22:37:03 +0000 ++ ++gcc (2.7.2.2-6) unstable; urgency=low ++ ++ * Tweaked Objective-C thread support (#11069) ++ ++ -- Galen Hazelwood Wed, 9 Jul 1997 11:56:57 -0600 ++ ++gcc (2.7.2.2-5) unstable; urgency=low ++ ++ * More updated m68k patches ++ * Now conflicts with libc5-dev (#10006, #10112) ++ * More strict Depends: cpp, prevents version mismatch (#9954) ++ ++ -- Galen Hazelwood Thu, 19 Jun 1997 01:29:02 -0600 ++ ++gcc (2.7.2.2-4) unstable; urgency=low ++ ++ * Moved to unstable ++ * Temporarily removed fortran support (waiting for new g77) ++ * Updated m68k patches ++ ++ -- Galen Hazelwood Fri, 9 May 1997 13:35:14 -0600 ++ ++gcc (2.7.2.2-3) experimental; urgency=low ++ ++ * Built against libc6 (fixes bug #8511) ++ ++ -- Galen Hazelwood Fri, 4 Apr 1997 13:30:10 -0700 ++ ++gcc (2.7.2.2-2) experimental; urgency=low ++ ++ * Fixed configure to build crt{begin,end}S.o on i386 ++ ++ -- Galen Hazelwood Tue, 11 Mar 1997 16:15:02 -0700 ++ ++gcc (2.7.2.2-1) experimental; urgency=low ++ ++ * Built for use with libc6-dev (experimental purposes only!) ++ * Added m68k patches from Andreas Schwab ++ ++ -- Galen Hazelwood Fri, 7 Mar 1997 12:44:17 -0700 ++ ++gcc (2.7.2.1-7) unstable; urgency=low ++ ++ * Patched to support g77 0.5.20 ++ ++ -- Galen Hazelwood Thu, 6 Mar 1997 22:20:23 -0700 ++ ++gcc (2.7.2.1-6) unstable; urgency=low ++ ++ * Added (small) manpage for protoize/unprotoize (fixes bug #6904) ++ * Removed -lieee from specs file (fixes bug #7741) ++ * No longer builds aout-gcc ++ ++ -- Galen Hazelwood Mon, 3 Mar 1997 11:10:20 -0700 ++ ++gcc (2.7.2.1-5) unstable; urgency=low ++ ++ * debian/control now lists cpp in section "interpreters" ++ * Re-added Objective-c patches for unstable ++ ++ -- Galen Hazelwood Wed, 22 Jan 1997 10:27:52 -0700 ++ ++gcc (2.7.2.1-4) stable unstable; urgency=low ++ ++ * Changed original source file so dpkg-source -x works ++ * Removed Objective-c patches (unsafe for stable) ++ * Built against rex's libc, so fixes placed in -3 are available to ++ those still using rex ++ ++ -- Galen Hazelwood Tue, 21 Jan 1997 11:11:53 -0700 ++ ++gcc (2.7.2.1-3) unstable; urgency=low ++ ++ * New (temporary) maintainer ++ * Updated to new standards and source format ++ * Integrated aout-gcc into gcc source package ++ * Demoted aout-gcc to Priority "extra" ++ * cpp package description more clear (fixes bug #5428) ++ * Removed cpp "Replaces: gcc" (fixes bug #5762) ++ * Minor fix to invoke.texi (fixes bug #2909) ++ * Added latest Objective-C patches for GNUstep people (fixes bug #4657) ++ ++ -- Galen Hazelwood Sun, 5 Jan 1997 09:57:36 -0700 diff --cc debian/compat index 0000000,0000000..ec63514 new file mode 100644 --- /dev/null +++ b/debian/compat @@@ -1,0 -1,0 +1,1 @@@ ++9 diff --cc debian/control index 0000000,0000000..2eeda7a new file mode 100644 --- /dev/null +++ b/debian/control @@@ -1,0 -1,0 +1,1033 @@@ ++Source: gcc-12 ++Section: devel ++Priority: optional ++Maintainer: Debian GCC Maintainers ++Uploaders: Matthias Klose ++Standards-Version: 4.6.2 ++Build-Depends: debhelper (>= 9.20141010), dpkg-dev (>= 1.17.14), g++-multilib [amd64 i386 kfreebsd-amd64 mips mips64 mips64el mips64r6 mips64r6el mipsel mipsn32 mipsn32el mipsn32r6 mipsn32r6el mipsr6 mipsr6el powerpc ppc64 s390 s390x sparc sparc64 x32] , ++ libc6.1-dev (>= 2.23-1~) [alpha ia64] | libc0.3-dev (>= 2.23-1~) [hurd-i386] | libc0.1-dev (>= 2.25) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= 2.23-1~), libc6-dev-amd64 [i386 x32], libc6-dev-sparc64 [sparc], libc6-dev-sparc [sparc64], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64 x32], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc-s1 [amd64 ppc64 kfreebsd-amd64 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el s390x sparc64 x32], libn32gcc-s1 [mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el], lib64gcc-s1 [i386 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el powerpc sparc s390 x32], libc6-dev-mips64 [mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el], libc6-dev-mipsn32 [mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el], libc6-dev-mips32 [mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el], libc6-dev-x32 [amd64 i386], libx32gcc-s1 [amd64 i386], libc6.1-dbg [alpha ia64] | libc0.3-dbg [hurd-i386] | libc0.1-dbg [kfreebsd-i386 kfreebsd-amd64] | libc6-dbg, ++ kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any], linux-libc-dev [m68k], ++ m4, libtool, autoconf2.69, gcc-13-base, ++ dwz, libunwind8-dev [ia64], libatomic-ops-dev [ia64], ++ gawk, lzma, xz-utils, patchutils, ++ libzstd-dev, zlib1g-dev, systemtap-sdt-dev [linux-any], ++ binutils:native (>= 2.37), binutils-hppa64-linux-gnu:native (>= 2.37) [hppa amd64 i386 x32], ++ gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, ++ gdb:native [!riscv64 !mipsel !mips64el], nvptx-tools [amd64 ppc64el], amdgcn-tools [amd64], ++ texinfo (>= 4.3), locales-all, sharutils, ++ procps, gnat-11:native [!arc !ia64 !loong64 !sh3 !sh3eb !sh4eb], g++-11:native, netbase, gdc-11:native [!arc !ia64 !loong64 !m68k !sh4 !s390 !sparc64 !alpha !hurd-alpha !hurd-amd64 !hurd-i386 !hurd-alpha !kfreebsd-amd64 !kfreebsd-i386 !kfreebsd-alpha], python3:any, ++ libisl-dev (>= 0.20), libmpc-dev (>= 1.0), libmpfr-dev (>= 3.0.0-9~), libgmp-dev (>= 2:5.0.1~), lib32z1-dev [amd64 kfreebsd-amd64], lib64z1-dev [i386], unzip , ++ dejagnu , coreutils (>= 2.26) | realpath (>= 1.9.12), chrpath, lsb-release, quilt, time, ++ pkg-config, libgc-dev, ++ g++-12-alpha-linux-gnu [alpha] , gobjc-12-alpha-linux-gnu [alpha] , gfortran-12-alpha-linux-gnu [alpha] , gdc-12-alpha-linux-gnu [alpha] , gccgo-12-alpha-linux-gnu [alpha] , gnat-12-alpha-linux-gnu [alpha] , gm2-12-alpha-linux-gnu [alpha] , g++-12-x86-64-linux-gnu [amd64] , gobjc-12-x86-64-linux-gnu [amd64] , gfortran-12-x86-64-linux-gnu [amd64] , gdc-12-x86-64-linux-gnu [amd64] , gccgo-12-x86-64-linux-gnu [amd64] , gnat-12-x86-64-linux-gnu [amd64] , gm2-12-x86-64-linux-gnu [amd64] , g++-12-arm-linux-gnueabi [armel] , gobjc-12-arm-linux-gnueabi [armel] , gfortran-12-arm-linux-gnueabi [armel] , gdc-12-arm-linux-gnueabi [armel] , gccgo-12-arm-linux-gnueabi [armel] , gnat-12-arm-linux-gnueabi [armel] , gm2-12-arm-linux-gnueabi [armel] , g++-12-arm-linux-gnueabihf [armhf] , gobjc-12-arm-linux-gnueabihf [armhf] , gfortran-12-arm-linux-gnueabihf [armhf] , gdc-12-arm-linux-gnueabihf [armhf] , gccgo-12-arm-linux-gnueabihf [armhf] , gnat-12-arm-linux-gnueabihf [armhf] , gm2-12-arm-linux-gnueabihf [armhf] , g++-12-aarch64-linux-gnu [arm64] , gobjc-12-aarch64-linux-gnu [arm64] , gfortran-12-aarch64-linux-gnu [arm64] , gdc-12-aarch64-linux-gnu [arm64] , gccgo-12-aarch64-linux-gnu [arm64] , gnat-12-aarch64-linux-gnu [arm64] , gm2-12-aarch64-linux-gnu [arm64] , g++-12-i686-linux-gnu [i386] , gobjc-12-i686-linux-gnu [i386] , gfortran-12-i686-linux-gnu [i386] , gdc-12-i686-linux-gnu [i386] , gccgo-12-i686-linux-gnu [i386] , gnat-12-i686-linux-gnu [i386] , gm2-12-i686-linux-gnu [i386] , g++-12-mipsel-linux-gnu [mipsel] , gobjc-12-mipsel-linux-gnu [mipsel] , gfortran-12-mipsel-linux-gnu [mipsel] , gdc-12-mipsel-linux-gnu [mipsel] , gccgo-12-mipsel-linux-gnu [mipsel] , gnat-12-mipsel-linux-gnu [mipsel] , gm2-12-mipsel-linux-gnu [mipsel] , g++-12-mips64-linux-gnuabi64 [mips64] , gobjc-12-mips64-linux-gnuabi64 [mips64] , gfortran-12-mips64-linux-gnuabi64 [mips64] , gdc-12-mips64-linux-gnuabi64 [mips64] , gccgo-12-mips64-linux-gnuabi64 [mips64] , gnat-12-mips64-linux-gnuabi64 [mips64] , gm2-12-mips64-linux-gnuabi64 [mips64] , g++-12-mips64el-linux-gnuabi64 [mips64el] , gobjc-12-mips64el-linux-gnuabi64 [mips64el] , gfortran-12-mips64el-linux-gnuabi64 [mips64el] , gdc-12-mips64el-linux-gnuabi64 [mips64el] , gccgo-12-mips64el-linux-gnuabi64 [mips64el] , gnat-12-mips64el-linux-gnuabi64 [mips64el] , gm2-12-mips64el-linux-gnuabi64 [mips64el] , g++-12-mips64-linux-gnuabin32 [mipsn32] , gobjc-12-mips64-linux-gnuabin32 [mipsn32] , gfortran-12-mips64-linux-gnuabin32 [mipsn32] , gdc-12-mips64-linux-gnuabin32 [mipsn32] , gccgo-12-mips64-linux-gnuabin32 [mipsn32] , gnat-12-mips64-linux-gnuabin32 [mipsn32] , gm2-12-mips64-linux-gnuabin32 [mipsn32] , g++-12-powerpc-linux-gnu [powerpc] , gobjc-12-powerpc-linux-gnu [powerpc] , gfortran-12-powerpc-linux-gnu [powerpc] , gdc-12-powerpc-linux-gnu [powerpc] , gccgo-12-powerpc-linux-gnu [powerpc] , gnat-12-powerpc-linux-gnu [powerpc] , g++-12-powerpc64-linux-gnu [ppc64] , gobjc-12-powerpc64-linux-gnu [ppc64] , gfortran-12-powerpc64-linux-gnu [ppc64] , gdc-12-powerpc64-linux-gnu [ppc64] , gccgo-12-powerpc64-linux-gnu [ppc64] , gnat-12-powerpc64-linux-gnu [ppc64] , g++-12-powerpc64le-linux-gnu [ppc64el] , gobjc-12-powerpc64le-linux-gnu [ppc64el] , gfortran-12-powerpc64le-linux-gnu [ppc64el] , gdc-12-powerpc64le-linux-gnu [ppc64el] , gccgo-12-powerpc64le-linux-gnu [ppc64el] , gnat-12-powerpc64le-linux-gnu [ppc64el] , gm2-12-powerpc64le-linux-gnu [ppc64el] , g++-12-m68k-linux-gnu [m68k] , gobjc-12-m68k-linux-gnu [m68k] , gfortran-12-m68k-linux-gnu [m68k] , gdc-12-m68k-linux-gnu [m68k] , gm2-12-m68k-linux-gnu [m68k] , g++-12-riscv64-linux-gnu [riscv64] , gobjc-12-riscv64-linux-gnu [riscv64] , gfortran-12-riscv64-linux-gnu [riscv64] , gdc-12-riscv64-linux-gnu [riscv64] , gccgo-12-riscv64-linux-gnu [riscv64] , gnat-12-riscv64-linux-gnu [riscv64] , gm2-12-riscv64-linux-gnu [riscv64] , g++-12-sh4-linux-gnu [sh4] , gobjc-12-sh4-linux-gnu [sh4] , gfortran-12-sh4-linux-gnu [sh4] , gnat-12-sh4-linux-gnu [sh4] , g++-12-sparc64-linux-gnu [sparc64] , gobjc-12-sparc64-linux-gnu [sparc64] , gfortran-12-sparc64-linux-gnu [sparc64] , gdc-12-sparc64-linux-gnu [sparc64] , gccgo-12-sparc64-linux-gnu [sparc64] , gnat-12-sparc64-linux-gnu [sparc64] , gm2-12-sparc64-linux-gnu [sparc64] , g++-12-s390x-linux-gnu [s390x] , gobjc-12-s390x-linux-gnu [s390x] , gfortran-12-s390x-linux-gnu [s390x] , gdc-12-s390x-linux-gnu [s390x] , gccgo-12-s390x-linux-gnu [s390x] , gnat-12-s390x-linux-gnu [s390x] , gm2-12-s390x-linux-gnu [s390x] , g++-12-x86-64-linux-gnux32 [x32] , gobjc-12-x86-64-linux-gnux32 [x32] , gfortran-12-x86-64-linux-gnux32 [x32] , gdc-12-x86-64-linux-gnux32 [x32] , gccgo-12-x86-64-linux-gnux32 [x32] , gnat-12-x86-64-linux-gnux32 [x32] , gm2-12-x86-64-linux-gnux32 [x32] , g++-12-mips64el-linux-gnuabin32 [mipsn32el] , gobjc-12-mips64el-linux-gnuabin32 [mipsn32el] , gfortran-12-mips64el-linux-gnuabin32 [mipsn32el] , gdc-12-mips64el-linux-gnuabin32 [mipsn32el] , gccgo-12-mips64el-linux-gnuabin32 [mipsn32el] , gnat-12-mips64el-linux-gnuabin32 [mipsn32el] , gm2-12-mips64el-linux-gnuabin32 [mipsn32el] , g++-12-mipsisa32r6-linux-gnu [mipsr6] , gobjc-12-mipsisa32r6-linux-gnu [mipsr6] , gfortran-12-mipsisa32r6-linux-gnu [mipsr6] , gdc-12-mipsisa32r6-linux-gnu [mipsr6] , gccgo-12-mipsisa32r6-linux-gnu [mipsr6] , gnat-12-mipsisa32r6-linux-gnu [mipsr6] , gm2-12-mipsisa32r6-linux-gnu [mipsr6] , g++-12-mipsisa32r6el-linux-gnu [mipsr6el] , gobjc-12-mipsisa32r6el-linux-gnu [mipsr6el] , gfortran-12-mipsisa32r6el-linux-gnu [mipsr6el] , gdc-12-mipsisa32r6el-linux-gnu [mipsr6el] , gccgo-12-mipsisa32r6el-linux-gnu [mipsr6el] , gnat-12-mipsisa32r6el-linux-gnu [mipsr6el] , gm2-12-mipsisa32r6el-linux-gnu [mipsr6el] , g++-12-mipsisa64r6-linux-gnuabi64 [mips64r6] , gobjc-12-mipsisa64r6-linux-gnuabi64 [mips64r6] , gfortran-12-mipsisa64r6-linux-gnuabi64 [mips64r6] , gdc-12-mipsisa64r6-linux-gnuabi64 [mips64r6] , gccgo-12-mipsisa64r6-linux-gnuabi64 [mips64r6] , gnat-12-mipsisa64r6-linux-gnuabi64 [mips64r6] , gm2-12-mipsisa64r6-linux-gnuabi64 [mips64r6] , g++-12-mipsisa64r6el-linux-gnuabi64 [mips64r6el] , gobjc-12-mipsisa64r6el-linux-gnuabi64 [mips64r6el] , gfortran-12-mipsisa64r6el-linux-gnuabi64 [mips64r6el] , gdc-12-mipsisa64r6el-linux-gnuabi64 [mips64r6el] , gccgo-12-mipsisa64r6el-linux-gnuabi64 [mips64r6el] , gnat-12-mipsisa64r6el-linux-gnuabi64 [mips64r6el] , gm2-12-mipsisa64r6el-linux-gnuabi64 [mips64r6el] , g++-12-mipsisa64r6-linux-gnuabin32 [mipsn32r6] , gobjc-12-mipsisa64r6-linux-gnuabin32 [mipsn32r6] , gfortran-12-mipsisa64r6-linux-gnuabin32 [mipsn32r6] , gdc-12-mipsisa64r6-linux-gnuabin32 [mipsn32r6] , gccgo-12-mipsisa64r6-linux-gnuabin32 [mipsn32r6] , gnat-12-mipsisa64r6-linux-gnuabin32 [mipsn32r6] , gm2-12-mipsisa64r6-linux-gnuabin32 [mipsn32r6] , g++-12-mipsisa64r6el-linux-gnuabin32 [mipsn32r6el] , gobjc-12-mipsisa64r6el-linux-gnuabin32 [mipsn32r6el] , gfortran-12-mipsisa64r6el-linux-gnuabin32 [mipsn32r6el] , gdc-12-mipsisa64r6el-linux-gnuabin32 [mipsn32r6el] , gccgo-12-mipsisa64r6el-linux-gnuabin32 [mipsn32r6el] , gnat-12-mipsisa64r6el-linux-gnuabin32 [mipsn32r6el] , gm2-12-mipsisa64r6el-linux-gnuabin32 [mipsn32r6el] , ++Build-Depends-Indep: doxygen (>= 1.7.2), graphviz (>= 2.2), ghostscript, texlive-latex-base, xsltproc, libxml2-utils, docbook-xsl-ns ++Homepage: http://gcc.gnu.org/ ++Vcs-Browser: https://salsa.debian.org/toolchain-team/gcc/tree/gcc-12-debian ++Vcs-Git: https://salsa.debian.org/toolchain-team/gcc.git -b gcc-12-debian ++XS-Testsuite: autopkgtest ++ ++Package: gcc-12-base ++Architecture: any ++Multi-Arch: same ++Section: libs ++Depends: ${misc:Depends} ++Replaces: ${base:Replaces} ++Breaks: ${base:Breaks} ++Description: GCC, the GNU Compiler Collection (base package) ++ This package contains files common to all languages and libraries ++ contained in the GNU Compiler Collection (GCC). ++ ++Package: libgcc-12-dev ++X-DH-Build-For-Type: target ++Architecture: any ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: gcc-12-base (= ${gcc:Version}), ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ++ ${dep:libatomic}, ${dep:libbtrace}, ${dep:libasan}, ${dep:liblsan}, ++ ${dep:libtsan}, ${dep:libubsan}, ${dep:libhwasan}, ${dep:libvtv}, ++ ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} ++Breaks: libtsan2 (<< 12-20211113-2~) ++Replaces: libtsan2 (<< 12-20211113-2~) ++Multi-Arch: same ++Description: GCC support library (development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++ ++Package: lib64gcc-12-dev ++X-DH-Build-For-Type: target ++Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el x32 ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: gcc-12-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Description: GCC support library (64bit development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++ ++Package: lib32gcc-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: gcc-12-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Description: GCC support library (32 bit development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++ ++Package: libn32gcc-12-dev ++X-DH-Build-For-Type: target ++Architecture: mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: gcc-12-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Description: GCC support library (n32 development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++ ++Package: libx32gcc-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 i386 ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: gcc-12-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Description: GCC support library (x32 development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++ ++Package: gcc-12 ++Architecture: any ++Section: devel ++Priority: optional ++Depends: cpp-12 (= ${gcc:Version}), gcc-12-base (= ${gcc:Version}), ++ ${dep:libcc1}, ++ binutils (>= ${binutils:Version}), ++ ${dep:libgccdev}, ${shlibs:Depends}, ${misc:Depends} ++Recommends: ${dep:libcdev} ++Replaces: cpp-12 (<< 7.1.1-8) ++Suggests: ${gcc:multilib}, gcc-12-doc (>= ${gcc:SoftVersion}), ++ gcc-12-locales (>= ${gcc:SoftVersion}), ++Provides: c-compiler ++Description: GNU C compiler ++ This is the GNU C compiler, a fairly portable optimizing compiler for C. ++ ++Package: gcc-12-multilib ++Architecture: amd64 i386 kfreebsd-amd64 mips mips64 mips64el mips64r6 mips64r6el mipsel mipsn32 mipsn32el mipsn32r6 mipsn32r6el mipsr6 mipsr6el powerpc ppc64 s390 s390x sparc sparc64 x32 ++Section: devel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++Description: GNU C compiler (multilib support) ++ This is the GNU C compiler, a fairly portable optimizing compiler for C. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++ ++Package: gcc-12-test-results ++Architecture: any ++Section: devel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${misc:Depends} ++Replaces: g++-5 (<< 5.2.1-28) ++Description: Test results for the GCC test suite ++ This package contains the test results for running the GCC test suite ++ for a post build analysis. ++ ++Package: gcc-12-plugin-dev ++Architecture: any ++Section: devel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (= ${gcc:Version}), libgmp-dev (>= 2:5.0.1~), libmpc-dev (>= 1.0), ${shlibs:Depends}, ${misc:Depends} ++Description: Files for GNU GCC plugin development. ++ This package contains (header) files for GNU GCC plugin development. It ++ is only used for the development of GCC plugins, but not needed to run ++ plugins. ++ ++Package: gcc-12-hppa64-linux-gnu ++Architecture: hppa amd64 i386 x32 ++Section: devel ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (= ${gcc:Version}), ++ binutils-hppa64-linux-gnu | binutils-hppa64, ++ ${shlibs:Depends}, ${misc:Depends} ++Description: GNU C compiler (cross compiler for hppa64) ++ This is the GNU C compiler, a fairly portable optimizing compiler for C. ++ ++Package: cpp-12 ++Architecture: any ++Section: interpreters ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Suggests: gcc-12-locales (>= ${gcc:SoftVersion}), cpp-12-doc (>= ${gcc:SoftVersion}) ++Breaks: libmagics++-dev (<< 2.28.0-4), hardening-wrapper (<< 2.8+nmu3) ++Description: GNU C preprocessor ++ A macro processor that is used automatically by the GNU C compiler ++ to transform programs before actual compilation. ++ . ++ This package has been separated from gcc for the benefit of those who ++ require the preprocessor but not the compiler. ++ ++Package: gcc-12-locales ++Architecture: all ++Section: devel ++Depends: gcc-12-base (>= ${gcc:SoftVersion}), cpp-12 (>= ${gcc:SoftVersion}), ${misc:Depends} ++Recommends: gcc-12 (>= ${gcc:SoftVersion}) ++Description: GCC, the GNU compiler collection (native language support files) ++ Native language support for GCC. Lets GCC speak your language, ++ if translations are available. ++ . ++ Please do NOT submit bug reports in other languages than "C". ++ Always reset your language settings to use the "C" locales. ++ ++Package: g++-12 ++Architecture: any ++Section: devel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (= ${gcc:Version}), libstdc++-12-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Provides: c++-compiler, c++abi2-dev ++Suggests: ${gxx:multilib}, gcc-12-doc (>= ${gcc:SoftVersion}), , ++Description: GNU C++ compiler ++ This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. ++ ++Package: g++-12-multilib ++Architecture: amd64 i386 kfreebsd-amd64 mips mips64 mips64el mips64r6 mips64r6el mipsel mipsn32 mipsn32el mipsn32r6 mipsn32r6el mipsr6 mipsr6el powerpc ppc64 s390 s390x sparc sparc64 x32 ++Section: devel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), g++-12 (= ${gcc:Version}), gcc-12-multilib (= ${gcc:Version}), ${dep:libcxxbiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++Suggests: ${dep:libcxxbiarchdbg} ++Description: GNU C++ compiler (multilib support) ++ This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++ ++Package: libgccjit-12-doc ++Section: doc ++Architecture: all ++Priority: optional ++Depends: gcc-12-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++Conflicts: libgccjit-5-doc, libgccjit-6-doc, libgccjit-7-doc, libgccjit-8-doc, ++ libgccjit-9-doc, libgccjit-10-doc, libgccjit-11-doc, ++Description: GCC just-in-time compilation (documentation) ++ libgccjit provides an embeddable shared library with an API for adding ++ compilation to existing programs using GCC. ++ ++Package: libgccjit-12-dev ++Section: libdevel ++Architecture: any ++Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libgccjit0 (>= ${gcc:Version}), ++ ${shlibs:Depends}, ${misc:Depends} ++Suggests: libgccjit-12-dbg ++Description: GCC just-in-time compilation (development files) ++ libgccjit provides an embeddable shared library with an API for adding ++ compilation to existing programs using GCC. ++ ++Package: gobjc++-12 ++Architecture: any ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gobjc-12 (= ${gcc:Version}), g++-12 (= ${gcc:Version}), ${shlibs:Depends}, libobjc-12-dev (= ${gcc:Version}), ${misc:Depends} ++Suggests: ${gobjcxx:multilib}, gcc-12-doc (>= ${gcc:SoftVersion}) ++Provides: objc++-compiler ++Description: GNU Objective-C++ compiler ++ This is the GNU Objective-C++ compiler, which compiles ++ Objective-C++ on platforms supported by the gcc compiler. It uses the ++ gcc backend to generate optimized code. ++ ++Package: gobjc++-12-multilib ++Architecture: amd64 i386 kfreebsd-amd64 mips mips64 mips64el mips64r6 mips64r6el mipsel mipsn32 mipsn32el mipsn32r6 mipsn32r6el mipsr6 mipsr6el powerpc ppc64 s390 s390x sparc sparc64 x32 ++Section: devel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gobjc++-12 (= ${gcc:Version}), g++-12-multilib (= ${gcc:Version}), gobjc-12-multilib (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: GNU Objective-C++ compiler (multilib support) ++ This is the GNU Objective-C++ compiler, which compiles Objective-C++ on ++ platforms supported by the gcc compiler. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++ ++Package: gobjc-12 ++Architecture: any ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libobjc-12-dev (= ${gcc:Version}), ${misc:Depends} ++Suggests: ${gobjc:multilib}, gcc-12-doc (>= ${gcc:SoftVersion}), , ++Provides: objc-compiler ++Description: GNU Objective-C compiler ++ This is the GNU Objective-C compiler, which compiles ++ Objective-C on platforms supported by the gcc compiler. It uses the ++ gcc backend to generate optimized code. ++ ++Package: gobjc-12-multilib ++Architecture: amd64 i386 kfreebsd-amd64 mips mips64 mips64el mips64r6 mips64r6el mipsel mipsn32 mipsn32el mipsn32r6 mipsn32r6el mipsr6 mipsr6el powerpc ppc64 s390 s390x sparc sparc64 x32 ++Section: devel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gobjc-12 (= ${gcc:Version}), gcc-12-multilib (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++Description: GNU Objective-C compiler (multilib support) ++ This is the GNU Objective-C compiler, which compiles Objective-C on platforms ++ supported by the gcc compiler. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++ ++Package: libobjc-12-dev ++X-DH-Build-For-Type: target ++Architecture: any ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libgcc-12-dev (= ${gcc:Version}), libobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Multi-Arch: same ++Description: Runtime library for GNU Objective-C applications (development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++ ++Package: lib64objc-12-dev ++X-DH-Build-For-Type: target ++Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el x32 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib64gcc-12-dev (= ${gcc:Version}), lib64objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Objective-C applications (64bit development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++ ++Package: lib32objc-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib32gcc-12-dev (= ${gcc:Version}), lib32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Objective-C applications (32bit development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++ ++Package: libn32objc-12-dev ++X-DH-Build-For-Type: target ++Architecture: mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libn32gcc-12-dev (= ${gcc:Version}), libn32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Objective-C applications (n32 development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++ ++Package: libx32objc-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 i386 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libx32gcc-12-dev (= ${gcc:Version}), libx32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Objective-C applications (x32 development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++ ++Package: gfortran-12 ++Architecture: any ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (= ${gcc:Version}), libgfortran-12-dev (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} ++Provides: fortran95-compiler, ${fortran:mod-version} ++Suggests: ${gfortran:multilib}, gfortran-12-doc, ++ libcoarrays-dev ++Description: GNU Fortran compiler ++ This is the GNU Fortran compiler, which compiles ++ Fortran on platforms supported by the gcc compiler. It uses the ++ gcc backend to generate optimized code. ++ ++Package: gfortran-12-multilib ++Architecture: amd64 i386 kfreebsd-amd64 mips mips64 mips64el mips64r6 mips64r6el mipsel mipsn32 mipsn32el mipsn32r6 mipsn32r6el mipsr6 mipsr6el powerpc ppc64 s390 s390x sparc sparc64 x32 ++Section: devel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gfortran-12 (= ${gcc:Version}), gcc-12-multilib (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++Description: GNU Fortran compiler (multilib support) ++ This is the GNU Fortran compiler, which compiles Fortran on platforms ++ supported by the gcc compiler. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++ ++Package: libgfortran-12-dev ++X-DH-Build-For-Type: target ++Architecture: any ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libgcc-12-dev (= ${gcc:Version}), libgfortran5 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Multi-Arch: same ++Description: Runtime library for GNU Fortran applications (development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++ ++Package: lib64gfortran-12-dev ++X-DH-Build-For-Type: target ++Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el x32 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib64gcc-12-dev (= ${gcc:Version}), lib64gfortran5 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Fortran applications (64bit development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++ ++Package: lib32gfortran-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib32gcc-12-dev (= ${gcc:Version}), lib32gfortran5 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Fortran applications (32bit development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++ ++Package: libn32gfortran-12-dev ++X-DH-Build-For-Type: target ++Architecture: mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libn32gcc-12-dev (= ${gcc:Version}), libn32gfortran5 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Fortran applications (n32 development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++ ++Package: libx32gfortran-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 i386 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libx32gcc-12-dev (= ${gcc:Version}), libx32gfortran5 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Fortran applications (x32 development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++ ++Package: gccgo-12 ++Architecture: any ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (= ${gcc:Version}), libgo-12-dev (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} ++Provides: go-compiler ++Suggests: ${go:multilib}, gccgo-12-doc, , ++Conflicts: ${golang:Conflicts} ++Description: GNU Go compiler ++ This is the GNU Go compiler, which compiles Go on platforms supported ++ by the gcc compiler. It uses the gcc backend to generate optimized code. ++ ++Package: gccgo-12-multilib ++Architecture: amd64 i386 kfreebsd-amd64 mips mips64 mips64el mips64r6 mips64r6el mipsel mipsn32 mipsn32el mipsn32r6 mipsn32r6el mipsr6 mipsr6el powerpc ppc64 s390 s390x sparc sparc64 x32 ++Section: devel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gccgo-12 (= ${gcc:Version}), gcc-12-multilib (= ${gcc:Version}), ${dep:libgobiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++Suggests: ${dep:libgobiarchdbg} ++Description: GNU Go compiler (multilib support) ++ This is the GNU Go compiler, which compiles Go on platforms supported ++ by the gcc compiler. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++ ++Package: libgo-12-dev ++X-DH-Build-For-Type: target ++Architecture: any ++Multi-Arch: same ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libgcc-12-dev (= ${gcc:Version}), libgo21 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Go applications (development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++ ++Package: lib64go-12-dev ++X-DH-Build-For-Type: target ++Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el x32 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib64gcc-12-dev (= ${gcc:Version}), lib64go21 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Go applications (64bit development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++ ++Package: lib32go-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib32gcc-12-dev (= ${gcc:Version}), lib32go21 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Go applications (32bit development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++ ++Package: libn32go-12-dev ++X-DH-Build-For-Type: target ++Architecture: mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libn32gcc-12-dev (= ${gcc:Version}), libn32go21 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Go applications (n32 development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++ ++Package: libx32go-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 i386 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libx32gcc-12-dev (= ${gcc:Version}), libx32go21 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Go applications (x32 development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++ ++Package: libgo21 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: any ++Provides: libgo21-armel [armel], libgo21-armhf [armhf] ++Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Go applications ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++Package: lib64go21 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el x32 ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Go applications (64bit) ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++Package: lib32go21 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++Description: Runtime library for GNU Go applications (32bit) ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++Package: libn32go21 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Go applications (n32) ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++Package: libx32go21 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: amd64 i386 ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Description: Runtime library for GNU Go applications (x32) ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++Package: libstdc++-12-dev ++X-DH-Build-For-Type: target ++Architecture: any ++Multi-Arch: same ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libgcc-12-dev (= ${gcc:Version}), ++ libstdc++6 (>= ${gcc:Version}), ${dep:libcdev}, ${misc:Depends} ++Suggests: libstdc++-12-doc ++Provides: libstdc++-dev ++Description: GNU Standard C++ Library v3 (development files) ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ ++Package: libstdc++-12-pic ++X-DH-Build-For-Type: target ++Architecture: any ++Multi-Arch: same ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), ++ libstdc++-12-dev (= ${gcc:Version}), ${misc:Depends} ++Description: GNU Standard C++ Library v3 (shared library subset kit) ++ This is used to develop subsets of the libstdc++ shared libraries for ++ use on custom installation floppies and in embedded systems. ++ . ++ Unless you are making one of those, you will not need this package. ++ ++Package: libstdc++6-12-dbg ++X-DH-Build-For-Type: target ++Architecture: any ++Section: debug ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), ++ , ${shlibs:Depends}, ${misc:Depends} ++Provides: libstdc++6-12-dbg-armel [armel], libstdc++6-12-dbg-armhf [armhf] ++Multi-Arch: same ++Recommends: libstdc++-12-dev (= ${gcc:Version}) ++Conflicts: libstdc++5-dbg, libstdc++5-3.3-dbg, libstdc++6-dbg, ++ libstdc++6-4.0-dbg, libstdc++6-4.1-dbg, libstdc++6-4.2-dbg, ++ libstdc++6-4.3-dbg, libstdc++6-4.4-dbg, libstdc++6-4.5-dbg, ++ libstdc++6-4.6-dbg, libstdc++6-4.7-dbg, libstdc++6-4.8-dbg, ++ libstdc++6-4.9-dbg, libstdc++6-5-dbg, libstdc++6-6-dbg, ++ libstdc++6-7-dbg, libstdc++6-8-dbg, libstdc++6-9-dbg, ++ libstdc++6-10-dbg, libstdc++6-11-dbg, ++Description: GNU Standard C++ Library v3 (debug build) ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++ ++Package: lib32stdc++-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib32gcc-12-dev (= ${gcc:Version}), ++ lib32stdc++6 (>= ${gcc:Version}), libstdc++-12-dev (= ${gcc:Version}), ${misc:Depends} ++Description: GNU Standard C++ Library v3 (development files) ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ ++Package: lib32stdc++6-12-dbg ++X-DH-Build-For-Type: target ++Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el ++Section: debug ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib32stdc++6 (>= ${gcc:Version}), ++ libstdc++-12-dev (= ${gcc:Version}), , ++ ${shlibs:Depends}, ${misc:Depends} ++Conflicts: lib32stdc++6-dbg, lib32stdc++6-4.0-dbg, ++ lib32stdc++6-4.1-dbg, lib32stdc++6-4.2-dbg, lib32stdc++6-4.3-dbg, ++ lib32stdc++6-4.4-dbg, lib32stdc++6-4.5-dbg, lib32stdc++6-4.6-dbg, ++ lib32stdc++6-4.7-dbg, lib32stdc++6-4.8-dbg, lib32stdc++6-4.9-dbg, ++ lib32stdc++6-5-dbg, lib32stdc++6-6-dbg, lib32stdc++6-7-dbg, ++ lib32stdc++6-8-dbg, lib32stdc++6-9-dbg, lib32stdc++6-10-dbg, ++ lib32stdc++6-11-dbg, ++Description: GNU Standard C++ Library v3 (debug build) ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++ ++Package: lib64stdc++-12-dev ++X-DH-Build-For-Type: target ++Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el x32 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib64gcc-12-dev (= ${gcc:Version}), ++ lib64stdc++6 (>= ${gcc:Version}), libstdc++-12-dev (= ${gcc:Version}), ${misc:Depends} ++Description: GNU Standard C++ Library v3 (development files) ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ ++Package: lib64stdc++6-12-dbg ++X-DH-Build-For-Type: target ++Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el x32 ++Section: debug ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib64stdc++6 (>= ${gcc:Version}), ++ libstdc++-12-dev (= ${gcc:Version}), , ++ ${shlibs:Depends}, ${misc:Depends} ++Conflicts: lib64stdc++6-dbg, lib64stdc++6-4.0-dbg, ++ lib64stdc++6-4.1-dbg, lib64stdc++6-4.2-dbg, lib64stdc++6-4.3-dbg, ++ lib64stdc++6-4.4-dbg, lib64stdc++6-4.5-dbg, lib64stdc++6-4.6-dbg, ++ lib64stdc++6-4.7-dbg, lib64stdc++6-4.8-dbg, lib64stdc++6-4.9-dbg, ++ lib64stdc++6-5-dbg, lib64stdc++6-6-dbg, lib64stdc++6-7-dbg, ++ lib64stdc++6-8-dbg, lib64stdc++6-9-dbg, lib64stdc++6-10-dbg, ++ lib64stdc++6-11-dbg, ++Description: GNU Standard C++ Library v3 (debug build) ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++ ++Package: libn32stdc++-12-dev ++X-DH-Build-For-Type: target ++Architecture: mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libn32gcc-12-dev (= ${gcc:Version}), ++ libn32stdc++6 (>= ${gcc:Version}), libstdc++-12-dev (= ${gcc:Version}), ${misc:Depends} ++Description: GNU Standard C++ Library v3 (development files) ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ ++Package: libn32stdc++6-12-dbg ++X-DH-Build-For-Type: target ++Architecture: mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el ++Section: debug ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libn32stdc++6 (>= ${gcc:Version}), ++ libstdc++-12-dev (= ${gcc:Version}), , ++ ${shlibs:Depends}, ${misc:Depends} ++Conflicts: libn32stdc++6-dbg, libn32stdc++6-4.0-dbg, ++ libn32stdc++6-4.1-dbg, libn32stdc++6-4.2-dbg, libn32stdc++6-4.3-dbg, ++ libn32stdc++6-4.4-dbg, libn32stdc++6-4.5-dbg, libn32stdc++6-4.6-dbg, ++ libn32stdc++6-4.7-dbg, libn32stdc++6-4.8-dbg, libn32stdc++6-4.9-dbg, ++ libn32stdc++6-5-dbg, libn32stdc++6-6-dbg, libn32stdc++6-7-dbg, ++ libn32stdc++6-8-dbg, libn32stdc++6-9-dbg, libn32stdc++6-10-dbg, ++ libn32stdc++6-11-dbg, ++Description: GNU Standard C++ Library v3 (debug build) ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++ ++Package: libx32stdc++-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 i386 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libx32gcc-12-dev (= ${gcc:Version}), libx32stdc++6 (>= ${gcc:Version}), ++ libstdc++-12-dev (= ${gcc:Version}), ${misc:Depends} ++Description: GNU Standard C++ Library v3 (development files) ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ ++Package: libx32stdc++6-12-dbg ++X-DH-Build-For-Type: target ++Architecture: amd64 i386 ++Section: debug ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libx32stdc++6 (>= ${gcc:Version}), ++ libstdc++-12-dev (= ${gcc:Version}), , ++ ${shlibs:Depends}, ${misc:Depends} ++Conflicts: libx32stdc++6-dbg, libx32stdc++6-4.6-dbg, ++ libx32stdc++6-4.7-dbg, libx32stdc++6-4.8-dbg, libx32stdc++6-4.9-dbg, ++ libx32stdc++6-5-dbg, libx32stdc++6-6-dbg, libx32stdc++6-7-dbg, ++ libx32stdc++6-8-dbg, libx32stdc++6-9-dbg, libx32stdc++6-10-dbg, ++ libx32stdc++6-11-dbg, ++Description: GNU Standard C++ Library v3 (debug build) ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++ ++Package: libstdc++-12-doc ++Architecture: all ++Section: doc ++Depends: gcc-12-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, ++ libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, ++ libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc, libstdc++6-4.7-doc, ++ libstdc++-4.8-doc, libstdc++-4.9-doc, libstdc++-5-doc, libstdc++-6-doc, ++ libstdc++-7-doc, libstdc++-8-doc, libstdc++-9-doc, libstdc++-10-doc, ++ libstdc++-11-doc, ++Description: GNU Standard C++ Library v3 (documentation files) ++ This package contains documentation files for the GNU stdc++ library. ++ . ++ One set is the distribution documentation, the other set is the ++ source documentation including a namespace list, class hierarchy, ++ alphabetical list, compound list, file list, namespace members, ++ compound members and file members. ++ ++Package: gnat-12 ++Architecture: any ++Priority: optional ++Pre-Depends: ${misc:Pre-Depends} ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (>= ${gcc:SoftVersion}), ${dep:libgnat}, ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} ++Suggests: gnat-12-doc, ada-reference-manual-2012, gnat-12-sjlj ++Conflicts: gnat-4.9, gnat-5, gnat-6, gnat-7, gnat-8, gnat-9, ++ gnat-10, gnat-11, ++# Previous versions conflict for (at least) /usr/bin/gnatmake. ++Description: GNU Ada compiler ++ GNAT is a compiler for the Ada programming language. It produces optimized ++ code on platforms supported by the GNU Compiler Collection (GCC). ++ . ++ This package provides the compiler, tools and runtime library that handles ++ exceptions using the default zero-cost mechanism. ++ ++Package: libgnat-12 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: any ++Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: runtime for applications compiled with GNAT (shared library) ++ GNAT is a compiler for the Ada programming language. It produces optimized ++ code on platforms supported by the GNU Compiler Collection (GCC). ++ . ++ The libgnat library provides runtime components needed by most ++ applications produced with GNAT. ++ . ++ This package contains the runtime shared library. ++ ++Package: gdc-12 ++Architecture: any ++Priority: optional ++Depends: gcc-12-base (>= ${gcc:SoftVersion}), g++-12 (>= ${gcc:SoftVersion}), ${dep:gdccross}, ${dep:phobosdev}, ${shlibs:Depends}, ${misc:Depends} ++Provides: gdc, d-compiler, d-v2-compiler ++Replaces: gdc (<< 4.4.6-5) ++Description: GNU D compiler (version 2) ++ This is the GNU D compiler, which compiles D on platforms supported by gcc. ++ It uses the gcc backend to generate optimised code. ++ . ++ This compiler supports D language version 2. ++ ++Package: gdc-12-multilib ++Architecture: any ++Priority: optional ++Depends: gcc-12-base (>= ${gcc:SoftVersion}), gdc-12 (= ${gcc:Version}), gcc-12-multilib (= ${gcc:Version}), ${dep:libphobosbiarchdev}${shlibs:Depends}, ${misc:Depends} ++Description: GNU D compiler (version 2, multilib support) ++ This is the GNU D compiler, which compiles D on platforms supported by gcc. ++ It uses the gcc backend to generate optimised code. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++ ++Package: libgphobos-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 arm64 armel armhf i386 x32 hppa mips mips64 mipsel mips64el mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el mips64r6 mips64r6el riscv64 s390x powerpc ppc64 ppc64el ++Multi-Arch: same ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libgphobos3 (>= ${gdc:Version}), ++ zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} ++Description: Phobos D standard library ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: lib64gphobos-12-dev ++X-DH-Build-For-Type: target ++Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el x32 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib64gphobos3 (>= ${gdc:Version}), ++ lib64gcc-12-dev (= ${gcc:Version}), lib64z1-dev [!mips !mipsel !mipsn32 !mipsn32el !mipsr6 !mipsr6el !mipsn32r6 !mipsn32r6el], ++ ${shlibs:Depends}, ${misc:Depends} ++Description: Phobos D standard library (64bit development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: lib32gphobos-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), lib32gphobos3 (>= ${gdc:Version}), ++ lib32gcc-12-dev (= ${gcc:Version}), lib32z1-dev [!mipsn32 !mipsn32el !mips64 !mips64el !mipsn32r6 !mipsn32r6el !mips64r6 !mips64r6el], ++ ${shlibs:Depends}, ${misc:Depends} ++Description: Phobos D standard library (32bit development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: libn32gphobos-12-dev ++X-DH-Build-For-Type: target ++Architecture: mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libn32gphobos3 (>= ${gdc:Version}), ++ libn32gcc-12-dev (= ${gcc:Version}), libn32z1-dev [!mips !mipsel !mips64 !mips64el !mipsr6 !mipsr6el !mips64r6 !mips64r6el], ++ ${shlibs:Depends}, ${misc:Depends} ++Description: Phobos D standard library (n32 development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: libx32gphobos-12-dev ++X-DH-Build-For-Type: target ++Architecture: amd64 i386 ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libx32gphobos3 (>= ${gdc:Version}), ++ libx32gcc-12-dev (= ${gcc:Version}), ${dep:libx32z}, ${shlibs:Depends}, ${misc:Depends} ++Description: Phobos D standard library (x32 development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: libgphobos3 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: amd64 arm64 armel armhf i386 x32 hppa mips mips64 mipsel mips64el mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el mips64r6 mips64r6el riscv64 s390x powerpc ppc64 ppc64el ++Multi-Arch: same ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Replaces: libgphobos68 ++Breaks: dub (<< 1.16.0-1~) ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: lib64gphobos3 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el mipsr6 mipsr6el mipsn32r6 mipsn32r6el x32 ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Replaces: lib64gphobos68 ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: lib32gphobos3 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el mipsn32r6 mipsn32r6el mips64r6 mips64r6el ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Replaces: lib32gphobos68 ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: libn32gphobos3 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: mips mipsel mips64 mips64el mipsr6 mipsr6el mips64r6 mips64r6el ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: libx32gphobos3 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: amd64 i386 ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Replaces: libx32gphobos68 ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: gm2-12 ++Architecture: any ++Priority: optional ++Depends: gcc-12-base (>= ${gcc:SoftVersion}), g++-12 (>= ${gcc:SoftVersion}), libgm2-12-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Provides: gm2, m2-compiler ++Description: GNU Modula-2 compiler ++ This is the GNU Modula-2 compiler, which compiles Modula-2 on platforms ++ supported by gcc. It uses the gcc backend to generate optimised code. ++ ++Package: libgm2-12-dev ++X-DH-Build-For-Type: target ++Architecture: any ++Multi-Arch: same ++Section: libdevel ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), libgm2-17 (>= ${gm2:Version}), ++ ${shlibs:Depends}, ${misc:Depends} ++Description: GNU Modula-2 standard library ++ This is the Modula-2 standard library that comes with the gm2 compiler. ++ ++Package: libgm2-17 ++X-DH-Build-For-Type: target ++Section: libs ++Architecture: any ++Multi-Arch: same ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Description: GNU Modula-2 standard library (runtime library) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++Package: gm2-12-doc ++Architecture: all ++Section: doc ++Depends: gcc-12-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++Suggests: gm2-12 ++Conflicts: gm2-12 (<< 12.2.0-8) ++Replaces: gm2-12 (<< 12.2.0-8) ++Description: Documentation for the GNU Modula-2 compiler (gm2) ++ Documentation for the GNU Modula-2 compiler in HTML and info format. ++ ++#Package: gcc`'PV-soft-float ++#Architecture: arm armel armhf ++#Depends: BASEDEP, depifenabled(`cdev',`gcc`'PV (= ${gcc:Version}),') ${shlibs:Depends}, ${misc:Depends} ++#Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float ++#BUILT_USING`'dnl ++#Description: GCC soft-floating-point gcc libraries (ARM) ++# These are versions of basic static libraries such as libgcc.a compiled ++# with the -msoft-float option, for CPUs without a floating-point unit. ++ ++Package: gcc-12-offload-nvptx ++Architecture: amd64 ppc64el ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (= ${gcc:Version}), ${dep:libcdev}, ++ nvptx-tools, libgomp-plugin-nvptx1 (>= ${gcc:Version}), ++ ${shlibs:Depends}, ${misc:Depends} ++Description: GCC offloading compiler to NVPTX ++ The package provides offloading support for NVidia PTX. OpenMP and OpenACC ++ programs linked with -fopenmp will by default add PTX code into the binaries, ++ which can be offloaded to NVidia PTX capable devices if available. ++ ++Package: libgomp-plugin-nvptx1 ++Architecture: amd64 ppc64el ++Multi-Arch: same ++Section: libs ++Depends: gcc-12-base (= ${gcc:Version}), libgomp1, ${shlibs:Depends}, ${misc:Depends} ++Suggests: libcuda1 [amd64] | libnvidia-tesla-cuda1 [amd64 ppc64el] | libcuda1-any ++Description: GCC OpenMP v4.5 plugin for offloading to NVPTX ++ This package contains libgomp plugin for offloading to NVidia ++ PTX. The plugin needs libcuda.so.1 shared library that has to be ++ installed separately. ++ ++Package: gcc-12-offload-amdgcn ++Architecture: amd64 ++Priority: optional ++Depends: gcc-12-base (= ${gcc:Version}), gcc-12 (= ${gcc:Version}), ${dep:libcdev}, ++ libgomp-plugin-amdgcn1 (>= ${gcc:Version}), ++ amdgcn-tools [amd64], ${shlibs:Depends}, ${misc:Depends} ++Description: GCC offloading compiler to GCN ++ The package provides offloading support for AMD GCN. OpenMP and OpenACC ++ programs linked with -fopenmp will by default add GCN code into the binaries, ++ which can be offloaded to AMD GCN capable devices if available. ++ ++Package: libgomp-plugin-amdgcn1 ++Architecture: amd64 ++Multi-Arch: same ++Section: libs ++Depends: gcc-12-base (= ${gcc:Version}), libgomp1, ${shlibs:Depends}, ${misc:Depends} ++Description: GCC OpenMP v4.5 plugin for offloading to GCN ++ This package contains libgomp plugin for offloading to AMD GCN. ++ ++Package: gcc-12-source ++Multi-Arch: foreign ++Architecture: all ++Depends: make, quilt, patchutils, sharutils, gawk, lsb-release, time, m4, libtool, autoconf2.69, ++ ${misc:Depends} ++Description: Source of the GNU Compiler Collection ++ This package contains the sources and patches which are needed to ++ build the GNU Compiler Collection (GCC). diff --cc debian/control.m4 index 0000000,0000000..f6f33f8 new file mode 100644 --- /dev/null +++ b/debian/control.m4 @@@ -1,0 -1,0 +1,5763 @@@ ++divert(-1) ++ ++define(`checkdef',`ifdef($1, , `errprint(`error: undefined macro $1 ++')m4exit(1)')') ++define(`errexit',`errprint(`error: undefined macro `$1' ++')m4exit(1)') ++ ++dnl The following macros must be defined, when called: ++dnl ifdef(`SRCNAME', , errexit(`SRCNAME')) ++dnl ifdef(`PV', , errexit(`PV')) ++dnl ifdef(`ARCH', , errexit(`ARCH')) ++ ++dnl The architecture will also be defined (-D__i386__, -D__powerpc__, etc.) ++ ++define(`PN', `$1') ++define(`MAINTAINER', `Debian GCC Maintainers ') ++ ++define(`depifenabled', `ifelse(index(enabled_languages, `$1'), -1, `', `$2')') ++define(`ifenabled', `ifelse(index(enabled_languages, `$1'), -1, `dnl', `$2')') ++ ++ifdef(`TARGET',`ifdef(`CROSS_ARCH',`',`undefine(`MULTIARCH')')') ++define(`CROSS_ARCH', ifdef(`CROSS_ARCH', CROSS_ARCH, `all')) ++define(`libdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`>=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') ++define(`libdevdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') ++define(`libidevdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') ++ifdef(`TARGET',`ifelse(CROSS_ARCH,`all',` ++define(`libidevdep', `lib$2$1`'LS`'AQ (>= ifelse(`$4',`',`${gcc:SoftVersion}',`$4'))') ++')') ++ifelse(index(enabled_languages, `libdbg'), -1, ` ++define(`libdbgdep', `') ++',` ++define(`libdbgdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`>=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') ++')`'dnl libdbg ++ ++define(`BUILT_USING', ifelse(add_built_using,yes,`Built-Using: ${Built-Using} ++')) ++define(`TARGET_PACKAGE',`X-DH-Build-For-Type: target ++') ++ ++divert`'dnl ++dnl -------------------------------------------------------------------------- ++Source: SRCNAME ++Section: devel ++Priority: optional ++ifelse(DIST,`Ubuntu',`dnl ++ifelse(regexp(SRCNAME, `gnat\|gdc-'),0,`dnl ++Maintainer: Ubuntu MOTU Developers ++', `dnl ++Maintainer: Ubuntu Core developers ++')dnl SRCNAME ++XSBC-Original-Maintainer: MAINTAINER ++', `dnl ++Maintainer: MAINTAINER ++')dnl DIST ++ifelse(regexp(SRCNAME, `gnat'),0,`dnl ++Uploaders: Ludovic Brenta ++', regexp(SRCNAME, `gdc'),0,`dnl ++Uploaders: Iain Buclaw , Matthias Klose ++', `dnl ++Uploaders: Matthias Klose ++')dnl SRCNAME ++Standards-Version: 4.6.2 ++ifdef(`TARGET',`dnl cross ++Build-Depends: DEBHELPER_BUILD_DEP DPKG_BUILD_DEP ++ LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP ++ kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any], linux-libc-dev [m68k], ++ dwz, LIBUNWIND_BUILD_DEP LIBATOMIC_OPS_BUILD_DEP AUTO_BUILD_DEP ++ SOURCE_BUILD_DEP CROSS_BUILD_DEP ++ ISL_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP, ++ libzstd-dev, zlib1g-dev, gawk, lzma, xz-utils, patchutils, ++ pkg-config, libgc-dev, ++ zlib1g-dev, SDT_BUILD_DEP USAGE_BUILD_DEP ++ bison (>= 1:2.3), flex, coreutils (>= 2.26) | realpath (>= 1.9.12), lsb-release, quilt, time ++',`dnl native ++Build-Depends: DEBHELPER_BUILD_DEP DPKG_BUILD_DEP GCC_MULTILIB_BUILD_DEP ++ LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP LIBC_DBG_DEP ++ kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any], linux-libc-dev [m68k], ++ AUTO_BUILD_DEP BASE_BUILD_DEP ++ dwz, libunwind8-dev [ia64], libatomic-ops-dev [ia64], ++ gawk, lzma, xz-utils, patchutils, ++ libzstd-dev, zlib1g-dev, SDT_BUILD_DEP USAGE_BUILD_DEP ++ BINUTILS_BUILD_DEP, BUILD_DEP_FOR_BINUTILS ++ gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, ++ gdb`'NT [!riscv64 !mipsel !mips64el], OFFLOAD_BUILD_DEP ++ texinfo (>= 4.3), LOCALES, sharutils, ++ procps, FORTRAN_BUILD_DEP GNAT_BUILD_DEP GO_BUILD_DEP GDC_BUILD_DEP GM2_BUILD_DEP ++ ISL_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP PHOBOS_BUILD_DEP ++ CHECK_BUILD_DEP coreutils (>= 2.26) | realpath (>= 1.9.12), chrpath, lsb-release, quilt, time, ++ pkg-config, libgc-dev, ++ TARGET_TOOL_BUILD_DEP ++Build-Depends-Indep: LIBSTDCXX_BUILD_INDEP ++')dnl ++ifelse(regexp(SRCNAME, `gnat'),0,`dnl ++Homepage: http://gcc.gnu.org/ ++', regexp(SRCNAME, `gdc'),0,`dnl ++Homepage: http://gdcproject.org/ ++', `dnl ++Homepage: http://gcc.gnu.org/ ++')dnl SRCNAME ++Vcs-Browser: https://salsa.debian.org/toolchain-team/gcc/tree/gcc-12-debian ++Vcs-Git: https://salsa.debian.org/toolchain-team/gcc.git -b gcc-12-debian ++XS-Testsuite: autopkgtest ++ ++ifelse(regexp(SRCNAME, `gcc-snapshot'),0,`dnl ++Package: gcc-snapshot`'TS ++Architecture: any ++Section: devel ++Priority: optional ++Depends: binutils`'TS (>= ${binutils:Version}), ++ ${dep:libcbiarchdev}, ${dep:libcdev}, ${dep:libunwinddev}, python3, ++ ${snap:depends}, ${shlibs:Depends}, ${misc:Depends} ++Recommends: ${snap:recommends} ++BUILT_USING`'dnl ++Description: SNAPSHOT of the GNU Compiler Collection ++ This package contains a recent development SNAPSHOT of all files ++ contained in the GNU Compiler Collection (GCC). ++ . ++ The source code for this package has been exported from SVN trunk. ++ . ++ DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES! ++ . ++ This package will NEVER hit the testing distribution. It is used for ++ tracking gcc bugs submitted to the Debian BTS in recent development ++ versions of gcc. ++',`dnl regexp SRCNAME ++ifelse(regexp(SRCNAME, `gcc-toolchain'),0,`dnl ++Package: gcc-toolchain`'PV`'TS ++Architecture: any ++Section: devel ++Priority: optional ++Depends: ++ ${dep:libcbiarchdev}, ${dep:libcdev}, ${dep:libunwinddev}, python3, ++ ${snap:depends}, ${shlibs:Depends}, ${misc:Depends} ++Recommends: ${snap:recommends} ++BUILT_USING`'dnl ++Description: Backport of the GNU Compiler Collection ++ This package contains the default GCC and binutils as found ++ in a newer Ubuntu LTS release. ++',`dnl regexp SRCNAME ++dnl default base package dependencies ++define(`BASEDEP', `gcc`'PV`'TS-base (= ${gcc:Version})') ++define(`SOFTBASEDEP', `gcc`'PV`'TS-base (>= ${gcc:SoftVersion})') ++ ++ifdef(`TARGET',` ++define(`BASELDEP', `gcc`'PV`'ifelse(CROSS_ARCH,`all',`-cross')-base`'GCC_PORTS_BUILD (= ${gcc:Version})') ++define(`SOFTBASELDEP', `gcc`'PV`'ifelse(CROSS_ARCH, `all',`-cross')-base`'GCC_PORTS_BUILD (>= ${gcc:SoftVersion})') ++',`dnl ++define(`BASELDEP', `BASEDEP') ++define(`SOFTBASELDEP', `SOFTBASEDEP') ++') ++ ++ifelse(index(SRCNAME, `gnat'), 0, ` ++define(`BASEDEP', `gnat`'PV-base (= ${gnat:Version})') ++define(`SOFTBASEDEP', `gnat`'PV-base (>= ${gnat:SoftVersion})') ++') ++ ++ifenabled(`gccbase',` ++Package: gcc`'PV`'TS-base ++Architecture: any ++Multi-Arch: same ++Section: ifdef(`TARGET',`devel',`libs') ++Depends: ${misc:Depends} ++Replaces: ${base:Replaces} ++Breaks: ${base:Breaks} ++BUILT_USING`'dnl ++Description: GCC, the GNU Compiler Collection (base package) ++ This package contains files common to all languages and libraries ++ contained in the GNU Compiler Collection (GCC). ++ifdef(`BASE_ONLY', `dnl ++ . ++ This version of GCC is not yet available for this architecture. ++ Please use the compilers from the gcc-snapshot package for testing. ++')`'dnl ++')`'dnl gccbase ++ ++ifenabled(`gcclbase',` ++Package: gcc`'PV-cross-base`'GCC_PORTS_BUILD ++Architecture: all ++Section: ifdef(`TARGET',`devel',`libs') ++Depends: ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC, the GNU Compiler Collection (library base package) ++ This empty package contains changelog and copyright files common to ++ all libraries contained in the GNU Compiler Collection (GCC). ++ifdef(`BASE_ONLY', `dnl ++ . ++ This version of GCC is not yet available for this architecture. ++ Please use the compilers from the gcc-snapshot package for testing. ++')`'dnl ++')`'dnl gcclbase ++ ++ifenabled(`gnatbase',` ++Package: gnat`'PV-base`'TS ++Architecture: any ++# "all" causes build instabilities for "any" dependencies (see #748388). ++Section: libs ++Depends: ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Ada compiler (common files) ++ GNAT is a compiler for the Ada programming language. It produces optimized ++ code on platforms supported by the GNU Compiler Collection (GCC). ++ . ++ This package contains files common to all GNAT related packages. ++')`'dnl gnatbase ++ ++ifenabled(`libgcc',` ++Package: libgcc-s1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Provides: libgcc1`'LS (= ${gcc:EpochVersion}), ifdef(`TARGET',`libgcc-s1-TARGET-dcv1',`libgcc-s1-armel [armel], libgcc-s1-armhf [armhf]') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++ifdef(`LIBGCCPROTECTED', `XB-Important: yes ++Protected: yes ++')`'dnl ++ifdef(`TARGET',`dnl ++Breaks: libgcc1`'LS (<< 1:10) ++Replaces: libgcc1`'LS (<< 1:10) ++',`dnl ++Breaks: ${libgcc:Breaks} ++Replaces: libgcc1`'LS (<< 1:10) ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') ++ Shared version of the support library, a library of internal subroutines ++ that GCC uses to overcome shortcomings of particular machines, or ++ special needs for some languages. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libgcc1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libgcc-s1`'LS (>= ${gcc:Version}), ${misc:Depends}, ${shlibs:Depends} ++Provides: ifdef(`TARGET',`libgcc1-TARGET-dcv1',`libgcc1-armel [armel], libgcc1-armhf [armhf]') ++ifdef(`MULTIxxxARCH', `Multi-Arch: same ++Breaks: ${multiarch:breaks} ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library (dependency package)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++ ++ifenabled(`libdbg',` ++Package: libgcc-s1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,,=,${gcc:Version}), ${misc:Depends} ++ifdef(`TARGET',`',`Provides: libgcc-s1-dbg-armel [armel], libgcc-s1-dbg-armhf [armhf] ++')dnl ++ifdef(`MULTIARCH',`Multi-Arch: same ++')dnl ++Breaks: libgcc1-dbg`'LS (<< 1:10) ++Replaces: libgcc1-dbg`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libgcc1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libgcc-s1-dbg`'LS, libdep(gcc1,,=,${gcc:EpochVersion}), ${misc:Depends} ++ifdef(`TARGET',`',`Provides: libgcc1-dbg-armel [armel], libgcc1-dbg-armhf [armhf] ++')dnl ++ifdef(`MULTIxxxARCH',`Multi-Arch: same ++')dnl ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++')`'dnl libdbg ++ ++Package: libgcc-s2`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++ifdef(`LIBGCCPROTECTED', `XB-Important: yes ++Protected: yes ++')`'dnl ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Provides: libgcc2`'LS (= ${gcc:EpochVersion}), ifdef(`TARGET',`libgcc-s2-TARGET-dcv1')`' ++ifdef(`TARGET',`dnl ++Breaks: libgcc2`'LS (<< 1:10) ++Replaces: libgcc2`'LS (<< 1:10) ++',`dnl ++Breaks: ${libgcc:Breaks} ++Replaces: libgcc2`'LS (<< 1:10) ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') ++ Shared version of the support library, a library of internal subroutines ++ that GCC uses to overcome shortcomings of particular machines, or ++ special needs for some languages. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libgcc2`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libgcc-s2`'LS (>= ${gcc:Version}), ${misc:Depends}, ${shlibs:Depends} ++ifdef(`TARGET',`Provides: libgcc-s2-TARGET-dcv1 ++')`'dnl ++ifdef(`MULTIxxxARCH', `Multi-Arch: same ++Breaks: ${multiarch:breaks} ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library (dependency package)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++ ++ifenabled(`libdbg',` ++Package: libgcc-s2-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s2,,=,${gcc:Version}), ${misc:Depends} ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Breaks: libgcc2-dbg`'LS (<< 1:10) ++Replaces: libgcc2-dbg`'LS (<< 1:10) ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libgcc2-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libgcc-s2-dbg`'LS, libdep(gcc2,,=,${gcc:EpochVersion}), ${misc:Depends} ++ifdef(`MULTIxxxARCH',`Multi-Arch: same ++')dnl ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols, debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++')`'dnl libdbg ++ ++Package: libgcc-s4`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa') ++ifdef(`MULTIARCH', `Multi-Arch: same ++ifdef(`LIBGCCPROTECTED', `XB-Important: yes ++Protected: yes ++')`'dnl ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Provides: libgcc4`'LS (= ${gcc:EpochVersion}) ++ifdef(`TARGET',`dnl ++Breaks: libgcc4`'LS (<< 1:10) ++Replaces: libgcc4`'LS (<< 1:10) ++',`dnl ++Breaks: ${libgcc:Breaks} ++Replaces: libgcc4`'LS (<< 1:10) ++')`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') ++ Shared version of the support library, a library of internal subroutines ++ that GCC uses to overcome shortcomings of particular machines, or ++ special needs for some languages. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libgcc4`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libgcc-s4`'LS (>= ${gcc:Version}), ${misc:Depends}, ${shlibs:Depends} ++ifdef(`MULTIxxxARCH', `Multi-Arch: same ++Breaks: ${multiarch:breaks} ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library (dependency package)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++ ++ifenabled(`libdbg',` ++Package: libgcc-s4-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s4,,=,${gcc:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Breaks: libgcc4-dbg`'LS (<< 1:10) ++Replaces: libgcc4-dbg`'LS (<< 1:10) ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libgcc4-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libgcc-s4-dbg`'LS, libdep(gcc4,,=,${gcc:EpochVersion}), ${misc:Depends} ++ifdef(`MULTIxxxARCH',`Multi-Arch: same ++')dnl ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols, debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++')`'dnl libdbg ++')`'dnl libgcc ++ ++ifenabled(`cdev',` ++Package: libgcc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: BASELDEP, ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ++ ${dep:libatomic}, ${dep:libbtrace}, ${dep:libasan}, ${dep:liblsan}, ++ ${dep:libtsan}, ${dep:libubsan}, ${dep:libhwasan}, ${dep:libvtv}, ++ ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} ++Breaks: libtsan`'TSAN_SO`'LS (<< 12-20211113-2~) ++Replaces: libtsan`'TSAN_SO`'LS (<< 12-20211113-2~) ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library (development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++')`'dnl cdev ++ ++ifenabled(`lib64gcc',` ++Package: lib64gcc-s1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: lib64gcc1`'LS (= ${gcc:EpochVersion}), lib64gcc-s1-TARGET-dcv1 ++',`')`'dnl ++Breaks: lib64gcc1`'LS (<< 1:10) ++Replaces: lib64gcc1`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') (64bit) ++ Shared version of the support library, a library of internal subroutines ++ that GCC uses to overcome shortcomings of particular machines, or ++ special needs for some languages. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: lib64gcc1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, lib64gcc-s1`'LS (>= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: lib64gcc1-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library (dependency package)`'ifdef(`TARGET',` (TARGET)', `') (64bit) ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++ ++ifenabled(`libdbg',` ++Package: lib64gcc-s1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,64,=,${gcc:Version}), ${misc:Depends} ++Breaks: lib64gcc1-dbg`'LS (<< 1:10) ++Replaces: lib64gcc1-dbg`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: lib64gcc1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, lib64gcc-s1-dbg`'LS, libdep(gcc1,64,=,${gcc:EpochVersion}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++')`'dnl libdbg ++')`'dnl lib64gcc ++ ++ifenabled(`cdev',` ++Package: lib64gcc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (64bit development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++')`'dnl cdev ++ ++ifenabled(`lib32gcc',` ++Package: lib32gcc-s1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++Breaks: lib32gcc1`'LS (<< 1:10) ++Replaces: lib32gcc1`'LS (<< 1:10) ++ifdef(`TARGET',`Provides: lib32gcc1`'LS (= ${gcc:EpochVersion}), lib32gcc-s1-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library (32 bit Version) ++ Shared version of the support library, a library of internal subroutines ++ that GCC uses to overcome shortcomings of particular machines, or ++ special needs for some languages. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: lib32gcc1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, lib32gcc-s1`'LS (>= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++ifdef(`TARGET',`Provides: lib32gcc1-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library (dependency package, 32bit) ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++ ++ifenabled(`libdbg',` ++Package: lib32gcc-s1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,32,=,${gcc:Version}), ${misc:Depends} ++Breaks: lib32gcc1-dbg`'LS (<< 1:10) ++Replaces: lib32gcc1-dbg`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: lib32gcc1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, lib32gcc-s1-dbg`'LS, libdep(gcc1,32,=,${gcc:EpochVersion}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++')`'dnl libdbg ++')`'dnl lib32gcc1 ++ ++ifenabled(`cdev',` ++Package: lib32gcc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (32 bit development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++')`'dnl cdev ++ ++ifenabled(`libhfgcc',` ++Package: libhfgcc-s1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libhfgcc1`'LS (= ${gcc:EpochVersion}), libhfgcc-s1-TARGET-dcv1 ++',`Conflicts: libgcc-s1-armhf [biarchhf_archs] ++')`'dnl ++Breaks: libhfgcc1`'LS (<< 1:10) ++Replaces: libhfgcc1`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') (hard float ABI) ++ Shared version of the support library, a library of internal subroutines ++ that GCC uses to overcome shortcomings of particular machines, or ++ special needs for some languages. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libhfgcc1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libhfgcc-s1`'LS (>= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libhfgcc1-TARGET-dcv1 ++',`Conflicts: libgcc1-armhf [biarchhf_archs] ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') (hard float ABI) ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++ ++ifenabled(`libdbg',` ++Package: libhfgcc-s1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,hf,=,${gcc:Version}), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgcc-s1-dbg-armhf [biarchhf_archs]') ++Breaks: libhfgcc1-dbg`'LS (<< 1:10) ++Replaces: libhfgcc1-dbg`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libhfgcc1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libhfgcc-s1-dbg`'LS, libdep(gcc1,hf,=,${gcc:EpochVersion}), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++')`'dnl libdbg ++')`'dnl libhfgcc ++ ++ifenabled(`cdev',` ++ifenabled(`armml',` ++Package: libhfgcc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (hard float ABI development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++')`'dnl armml ++')`'dnl cdev ++ ++ifenabled(`libsfgcc',` ++Package: libsfgcc-s1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libsfgcc1`'LS (= ${gcc:EpochVersion}), libsfgcc-s1-TARGET-dcv1 ++',`Conflicts: libgcc-s1-armel [biarchsf_archs] ++')`'dnl ++Breaks: libsfgcc1`'LS (<< 1:10) ++Replaces: libsfgcc1`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') (soft float ABI) ++ Shared version of the support library, a library of internal subroutines ++ that GCC uses to overcome shortcomings of particular machines, or ++ special needs for some languages. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libsfgcc1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libsfgcc-s1`'LS (>= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libsfgcc1-TARGET-dcv1 ++',`Conflicts: libgcc1-armel [biarchsf_archs] ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') (soft float ABI) ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++ ++ifenabled(`libdbg',` ++Package: libsfgcc-s1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,sf,=,${gcc:Version}), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armel [biarchsf_archs]') ++Breaks: libsfgcc1-dbg`'LS (<< 1:10) ++Replaces: libsfgcc1-dbg`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libsfgcc1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libsfgcc-s1-dbg`'LS, libdep(gcc1,sf,=,${gcc:EpochVersion}), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++')`'dnl libcompatgcc ++')`'dnl libdbg ++')`'dnl libsfgcc ++ ++ifenabled(`cdev',` ++ifenabled(`armml',` ++Package: libsfgcc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (soft float ABI development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++')`'dnl armml ++')`'dnl cdev ++ ++ifenabled(`libn32gcc',` ++Package: libn32gcc-s1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libn32gcc1`'LS (= ${gcc:EpochVersion}), libn32gcc-s1-TARGET-dcv1 ++',`')`'dnl ++Breaks: libn32gcc1`'LS (<< 1:10) ++Replaces: libn32gcc1`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') (n32) ++ Shared version of the support library, a library of internal subroutines ++ that GCC uses to overcome shortcomings of particular machines, or ++ special needs for some languages. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libn32gcc1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libn32gcc-s1`'LS, ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libn32gcc1-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') (n32) ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++ ++ifenabled(`libdbg',` ++Package: libn32gcc-s1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,n32,=,${gcc:Version}), ${misc:Depends} ++Breaks: libn32gcc1-dbg`'LS (<< 1:10) ++Replaces: libn32gcc1-dbg`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libn32gcc1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libn32gcc-s1-dbg`'LS, libdep(gcc1,n32,=,${gcc:EpochVersion}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++')`'dnl libdbg ++')`'dnl libn32gcc ++ ++ifenabled(`cdev',` ++Package: libn32gcc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (n32 development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++')`'dnl cdev ++ ++ifenabled(`libx32gcc',` ++Package: libx32gcc-s1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libx32gcc1`'LS (= ${gcc:EpochVersion}), libx32gcc-s1-TARGET-dcv1 ++',`')`'dnl ++Breaks: libx32gcc1`'LS (<< 1:10) ++Replaces: libx32gcc1`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') (x32) ++ Shared version of the support library, a library of internal subroutines ++ that GCC uses to overcome shortcomings of particular machines, or ++ special needs for some languages. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libx32gcc1`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libx32gcc-s1`'LS (>= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libx32gcc1-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GCC support library`'ifdef(`TARGET',` (TARGET)', `') (x32) ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++ ++ifenabled(`libdbg',` ++Package: libx32gcc-s1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,x32,=,${gcc:Version}), ${misc:Depends} ++Breaks: libx32gcc1-dbg`'LS (<< 1:10) ++Replaces: libx32gcc1-dbg`'LS (<< 1:10) ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ Debug symbols for the GCC support library. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`libcompatgcc',` ++Package: libx32gcc1-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libx32gcc-s1-dbg`'LS, libdep(gcc1,x32,=,${gcc:EpochVersion}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (debug symbols)`'ifdef(`TARGET',` (TARGET)', `') ++ This is a dependency package, and can be safely removed after upgrade. ++')`'dnl libcompatgcc ++')`'dnl libdbg ++')`'dnl libx32gcc ++ ++ifenabled(`cdev',` ++ifenabled(`x32dev',` ++Package: libx32gcc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: libdevel ++Priority: optional ++Recommends: ${dep:libcdev} ++Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ++ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch}, ++ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch}, ++ ${dep:libtsanbiarch}, ${dep:libubsanbiarch}, ${dep:libhwasanbiarch}, ++ ${dep:libvtvbiarch}, ++ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC support library (x32 development files) ++ This package contains the headers and static library files necessary for ++ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. ++')`'dnl x32dev ++')`'dnl cdev ++ ++ifenabled(`cdev',` ++Package: gcc`'PV`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Priority: optional ++Depends: cpp`'PV`'TS (= ${gcc:Version}),ifenabled(`gccbase',` BASEDEP,') ++ ifenabled(`gccxbase',` BASEDEP,') ++ ${dep:libcc1}, ++ binutils`'TS (>= ${binutils:Version}), ++ ${dep:libgccdev}, ${shlibs:Depends}, ${misc:Depends} ++Recommends: ${dep:libcdev} ++Replaces: cpp`'PV`'TS (<< 7.1.1-8) ++Suggests: ${gcc:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), ++ gcc`'PV-locales (>= ${gcc:SoftVersion}), ++ libdbgdep(gcc-s`'GCC_SO-dbg,,>=,${libgcc:Version}), ++ libdbgdep(gomp`'GOMP_SO-dbg,), ++ libdbgdep(itm`'ITM_SO-dbg,), ++ libdbgdep(atomic`'ATOMIC_SO-dbg,), ++ libdbgdep(asan`'ASAN_SO-dbg,), ++ libdbgdep(lsan`'LSAN_SO-dbg,), ++ libdbgdep(tsan`'TSAN_SO-dbg,), ++ libdbgdep(ubsan`'UBSAN_SO-dbg,), ++ libdbgdep(hwasan`'HWASAN_SO-dbg,), ++ifenabled(`libvtv',`',` ++ libdbgdep(vtv`'VTV_SO-dbg,), ++')`'dnl ++ libdbgdep(quadmath`'QMATH_SO-dbg,), ++Provides: c-compiler`'TS ++ifdef(`TARGET',`Conflicts: gcc-multilib ++')`'dnl ++BUILT_USING`'dnl ++Description: GNU C compiler`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU C compiler, a fairly portable optimizing compiler for C. ++ifdef(`TARGET', `dnl ++ . ++ This package contains C cross-compiler for TARGET architecture. ++')`'dnl ++ ++ifenabled(`multilib',` ++Package: gcc`'PV-multilib`'TS ++Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Priority: optional ++Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU C compiler (multilib support)`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU C compiler, a fairly portable optimizing compiler for C. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++')`'dnl multilib ++ ++ifenabled(`testresults',` ++Package: gcc`'PV-test-results ++Architecture: any ++Section: devel ++Priority: optional ++Depends: BASEDEP, ${misc:Depends} ++Replaces: g++-5 (<< 5.2.1-28) ++BUILT_USING`'dnl ++Description: Test results for the GCC test suite ++ This package contains the test results for running the GCC test suite ++ for a post build analysis. ++')`'dnl testresults ++ ++ifenabled(`plugindev',` ++Package: gcc`'PV-plugin-dev`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Priority: optional ++Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), GMP_BUILD_DEP MPC_BUILD_DEP ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Files for GNU GCC plugin development. ++ This package contains (header) files for GNU GCC plugin development. It ++ is only used for the development of GCC plugins, but not needed to run ++ plugins. ++')`'dnl plugindev ++')`'dnl cdev ++ ++ifenabled(`cdev',` ++Package: gcc`'PV-hppa64-linux-gnu ++Architecture: ifdef(`TARGET',`any',hppa amd64 i386 x32) ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ++ binutils-hppa64-linux-gnu | binutils-hppa64, ++ ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU C compiler (cross compiler for hppa64) ++ This is the GNU C compiler, a fairly portable optimizing compiler for C. ++')`'dnl cdev ++ ++ifenabled(`cdev',` ++Package: cpp`'PV`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: ifdef(`TARGET',`devel',`interpreters') ++Priority: optional ++Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} ++Suggests: gcc`'PV-locales (>= ${gcc:SoftVersion}), cpp`'PV-doc (>= ${gcc:SoftVersion}) ++Breaks: libmagics++-dev (<< 2.28.0-4)ifdef(`TARGET',`',`, hardening-wrapper (<< 2.8+nmu3)') ++BUILT_USING`'dnl ++Description: GNU C preprocessor ++ A macro processor that is used automatically by the GNU C compiler ++ to transform programs before actual compilation. ++ . ++ This package has been separated from gcc for the benefit of those who ++ require the preprocessor but not the compiler. ++ifdef(`TARGET', `dnl ++ . ++ This package contains preprocessor configured for TARGET architecture. ++')`'dnl ++ ++ifdef(`TARGET', `', ` ++ifenabled(`gfdldoc',` ++Package: cpp`'PV-doc ++Architecture: all ++Section: doc ++Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++Description: Documentation for the GNU C preprocessor (cpp) ++ Documentation for the GNU C preprocessor in info `format'. ++')`'dnl gfdldoc ++')`'dnl native ++ ++ifdef(`TARGET', `', ` ++Package: gcc`'PV-locales ++Architecture: all ++Section: devel ++Depends: SOFTBASEDEP, cpp`'PV (>= ${gcc:SoftVersion}), ${misc:Depends} ++Recommends: gcc`'PV (>= ${gcc:SoftVersion}) ++Description: GCC, the GNU compiler collection (native language support files) ++ Native language support for GCC. Lets GCC speak your language, ++ if translations are available. ++ . ++ Please do NOT submit bug reports in other languages than "C". ++ Always reset your language settings to use the "C" locales. ++')`'dnl native ++')`'dnl cdev ++ ++ifenabled(`c++',` ++ifenabled(`c++dev',` ++Package: g++`'PV`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Priority: optional ++Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libidevdep(stdc++`'PV-dev,,=), ${shlibs:Depends}, ${misc:Depends} ++Provides: c++-compiler`'TS`'ifdef(`TARGET',`',`, c++abi2-dev') ++Suggests: ${gxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libdbgdep(stdc++CXX_SO`'PV-dbg), ++BUILT_USING`'dnl ++Description: GNU C++ compiler`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. ++ifdef(`TARGET', `dnl ++ . ++ This package contains C++ cross-compiler for TARGET architecture. ++')`'dnl ++ ++ifenabled(`multilib',` ++Package: g++`'PV-multilib`'TS ++Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Priority: optional ++Depends: BASEDEP, g++`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libcxxbiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++Suggests: ${dep:libcxxbiarchdbg} ++BUILT_USING`'dnl ++Description: GNU C++ compiler (multilib support)`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++')`'dnl multilib ++')`'dnl c++dev ++')`'dnl c++ ++ ++ifdef(`TARGET', `', ` ++ifenabled(`ssp',` ++Package: libssp`'SSP_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: any ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Section: libs ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC stack smashing protection library ++ GCC can now emit code for protecting applications from stack-smashing attacks. ++ The protection is realized by buffer overflow detection and reordering of ++ stack variables to avoid pointer corruption. ++ ++Package: lib32ssp`'SSP_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: biarch32_archs ++Section: libs ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Replaces: libssp0 (<< 4.1) ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: GCC stack smashing protection library (32bit) ++ GCC can now emit code for protecting applications from stack-smashing attacks. ++ The protection is realized by buffer overflow detection and reordering of ++ stack variables to avoid pointer corruption. ++ ++Package: lib64ssp`'SSP_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: biarch64_archs ++Section: libs ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Replaces: libssp0 (<< 4.1) ++BUILT_USING`'dnl ++Description: GCC stack smashing protection library (64bit) ++ GCC can now emit code for protecting applications from stack-smashing attacks. ++ The protection is realized by buffer overflow detection and reordering of ++ stack variables to avoid pointer corruption. ++ ++Package: libn32ssp`'SSP_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: biarchn32_archs ++Section: libs ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Replaces: libssp0 (<< 4.1) ++BUILT_USING`'dnl ++Description: GCC stack smashing protection library (n32) ++ GCC can now emit code for protecting applications from stack-smashing attacks. ++ The protection is realized by buffer overflow detection and reordering of ++ stack variables to avoid pointer corruption. ++ ++Package: libx32ssp`'SSP_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: biarchx32_archs ++Section: libs ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Replaces: libssp0 (<< 4.1) ++BUILT_USING`'dnl ++Description: GCC stack smashing protection library (x32) ++ GCC can now emit code for protecting applications from stack-smashing attacks. ++ The protection is realized by buffer overflow detection and reordering of ++ stack variables to avoid pointer corruption. ++ ++Package: libhfssp`'SSP_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: biarchhf_archs ++Section: libs ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC stack smashing protection library (hard float ABI) ++ GCC can now emit code for protecting applications from stack-smashing attacks. ++ The protection is realized by buffer overflow detection and reordering of ++ stack variables to avoid pointer corruption. ++ ++Package: libsfssp`'SSP_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: biarchsf_archs ++Section: libs ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC stack smashing protection library (soft float ABI) ++ GCC can now emit code for protecting applications from stack-smashing attacks. ++ The protection is realized by buffer overflow detection and reordering of ++ stack variables to avoid pointer corruption. ++')`'dnl ++')`'dnl native ++ ++ifenabled(`libgomp',` ++Package: libgomp`'GOMP_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libgomp'GOMP_SO`-armel [armel], libgomp'GOMP_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++Breaks: ${multiarch:breaks} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++ ++ifenabled(`libdbg',` ++Package: libgomp`'GOMP_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gomp`'GOMP_SO,,=), ${misc:Depends} ++ifdef(`TARGET',`',`Provides: libgomp'GOMP_SO`-dbg-armel [armel], libgomp'GOMP_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (debug symbols) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++')`'dnl libdbg ++ ++Package: lib32gomp`'GOMP_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (32bit) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++ ++ifenabled(`libdbg',` ++Package: lib32gomp`'GOMP_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gomp`'GOMP_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (32 bit debug symbols) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++')`'dnl libdbg ++ ++Package: lib64gomp`'GOMP_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (64bit) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++ ++ifenabled(`libdbg',` ++Package: lib64gomp`'GOMP_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gomp`'GOMP_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (64bit debug symbols) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++')`'dnl libdbg ++ ++Package: libn32gomp`'GOMP_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (n32) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++ ++ifenabled(`libdbg',` ++Package: libn32gomp`'GOMP_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gomp`'GOMP_SO,n32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (n32 debug symbols) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++')`'dnl libdbg ++ ++ifenabled(`libx32gomp',` ++Package: libx32gomp`'GOMP_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (x32) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++ ++ifenabled(`libdbg',` ++Package: libx32gomp`'GOMP_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gomp`'GOMP_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (x32 debug symbols) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++')`'dnl libdbg ++')`'dnl libx32gomp ++ ++ifenabled(`libhfgomp',` ++Package: libhfgomp`'GOMP_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (hard float ABI) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++ ++ifenabled(`libdbg',` ++Package: libhfgomp`'GOMP_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gomp`'GOMP_SO,hf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (hard float ABI debug symbols) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++')`'dnl libdbg ++')`'dnl libhfgomp ++ ++ifenabled(`libsfgomp',` ++Package: libsfgomp`'GOMP_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (soft float ABI) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++ in the GNU Compiler Collection. ++ ++ifenabled(`libdbg',` ++Package: libsfgomp`'GOMP_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(gomp`'GOMP_SO,sf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: GCC OpenMP (GOMP) support library (soft float ABI debug symbols) ++ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers ++')`'dnl libdbg ++')`'dnl libsfgomp ++')`'dnl libgomp ++ ++ifenabled(`libitm',` ++Package: libitm`'ITM_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libitm'ITM_SO`-armel [armel], libitm'ITM_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++ ++ifenabled(`libdbg',` ++Package: libitm`'ITM_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(itm`'ITM_SO,,=), ${misc:Depends} ++ifdef(`TARGET',`',`Provides: libitm'ITM_SO`-dbg-armel [armel], libitm'ITM_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (debug symbols) ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++')`'dnl libdbg ++ ++Package: lib32itm`'ITM_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (32bit) ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++ ++ifenabled(`libdbg',` ++Package: lib32itm`'ITM_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(itm`'ITM_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (32 bit debug symbols) ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++')`'dnl libdbg ++ ++Package: lib64itm`'ITM_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (64bit) ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++ ++ifenabled(`libdbg',` ++Package: lib64itm`'ITM_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(itm`'ITM_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (64bit debug symbols) ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++')`'dnl libdbg ++ ++#Package: libn32itm`'ITM_SO`'LS ++#Section: ifdef(`TARGET',`devel',`libs') ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Priority: optional ++#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: GNU Transactional Memory Library (n32) ++# GNU Transactional Memory Library (libitm) provides transaction support for ++# accesses to the memory of a process, enabling easy-to-use synchronization of ++# accesses to shared memory by several threads. ++ ++#Package: libn32itm`'ITM_SO-dbg`'LS ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Section: debug ++#Priority: optional ++#Depends: BASELDEP, libdep(itm`'ITM_SO,n32,=), ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: GNU Transactional Memory Library (n32 debug symbols) ++# GNU Transactional Memory Library (libitm) provides transaction support for ++# accesses to the memory of a process, enabling easy-to-use synchronization of ++# accesses to shared memory by several threads. ++ ++ifenabled(`libx32itm',` ++Package: libx32itm`'ITM_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (x32) ++ This manual documents the usage and internals of libitm. It provides ++ transaction support for accesses to the memory of a process, enabling ++ easy-to-use synchronization of accesses to shared memory by several threads. ++ ++ifenabled(`libdbg',` ++Package: libx32itm`'ITM_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(itm`'ITM_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (x32 debug symbols) ++ This manual documents the usage and internals of libitm. It provides ++ transaction support for accesses to the memory of a process, enabling ++ easy-to-use synchronization of accesses to shared memory by several threads. ++')`'dnl libdbg ++')`'dnl libx32itm ++ ++ifenabled(`libhfitm',` ++Package: libhfitm`'ITM_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (hard float ABI) ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++ ++ifenabled(`libdbg',` ++Package: libhfitm`'ITM_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(itm`'ITM_SO,hf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (hard float ABI debug symbols) ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++')`'dnl libdbg ++')`'dnl libhfitm ++ ++ifenabled(`libsfitm',` ++Package: libsfitm`'ITM_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (soft float ABI) ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++ ++ifenabled(`libdbg',` ++Package: libsfitm`'ITM_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(itm`'ITM_SO,sf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Transactional Memory Library (soft float ABI debug symbols) ++ GNU Transactional Memory Library (libitm) provides transaction support for ++ accesses to the memory of a process, enabling easy-to-use synchronization of ++ accesses to shared memory by several threads. ++')`'dnl libdbg ++')`'dnl libsfitm ++')`'dnl libitm ++ ++ifenabled(`libatomic',` ++Package: libatomic`'ATOMIC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libatomic'ATOMIC_SO`-armel [armel], libatomic'ATOMIC_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++ ++ifenabled(`libdbg',` ++Package: libatomic`'ATOMIC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,,=), ${misc:Depends} ++ifdef(`TARGET',`',`Provides: libatomic'ATOMIC_SO`-dbg-armel [armel], libatomic'ATOMIC_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (debug symbols) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++')`'dnl libdbg ++ ++Package: lib32atomic`'ATOMIC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (32bit) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++ ++ifenabled(`libdbg',` ++Package: lib32atomic`'ATOMIC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (32 bit debug symbols) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++')`'dnl libdbg ++ ++Package: lib64atomic`'ATOMIC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (64bit) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++ ++ifenabled(`libdbg',` ++Package: lib64atomic`'ATOMIC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (64bit debug symbols) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++')`'dnl libdbg ++ ++Package: libn32atomic`'ATOMIC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (n32) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++ ++ifenabled(`libdbg',` ++Package: libn32atomic`'ATOMIC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,n32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (n32 debug symbols) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++')`'dnl libdbg ++ ++ifenabled(`libx32atomic',` ++Package: libx32atomic`'ATOMIC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (x32) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++ ++ifenabled(`libdbg',` ++Package: libx32atomic`'ATOMIC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (x32 debug symbols) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++')`'dnl libdbg ++')`'dnl libx32atomic ++ ++ifenabled(`libhfatomic',` ++Package: libhfatomic`'ATOMIC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libatomic'ATOMIC_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (hard float ABI) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++ ++ifenabled(`libdbg',` ++Package: libhfatomic`'ATOMIC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,hf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libatomic'ATOMIC_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (hard float ABI debug symbols) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++')`'dnl libdbg ++')`'dnl libhfatomic ++ ++ifenabled(`libsfatomic',` ++Package: libsfatomic`'ATOMIC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (soft float ABI) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++ ++ifenabled(`libdbg',` ++Package: libsfatomic`'ATOMIC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,sf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: support library providing __atomic built-in functions (soft float ABI debug symbols) ++ library providing __atomic built-in functions. When an atomic call cannot ++ be turned into lock-free instructions, GCC will make calls into this library. ++')`'dnl libdbg ++')`'dnl libsfatomic ++')`'dnl libatomic ++ ++ifenabled(`libasan',` ++Package: libasan`'ASAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libasan'ASAN_SO`-armel [armel], libasan'ASAN_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++ ++ifenabled(`libdbg',` ++Package: libasan`'ASAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(asan`'ASAN_SO,,=), ${misc:Depends} ++ifdef(`TARGET',`',`Provides: libasan'ASAN_SO`-dbg-armel [armel], libasan'ASAN_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (debug symbols) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++')`'dnl libdbg ++ ++Package: lib32asan`'ASAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (32bit) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++ ++ifenabled(`libdbg',` ++Package: lib32asan`'ASAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(asan`'ASAN_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (32 bit debug symbols) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++')`'dnl libdbg ++ ++Package: lib64asan`'ASAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (64bit) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++ ++ifenabled(`libdbg',` ++Package: lib64asan`'ASAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(asan`'ASAN_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (64bit debug symbols) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++')`'dnl libdbg ++ ++#Package: libn32asan`'ASAN_SO`'LS ++#Section: ifdef(`TARGET',`devel',`libs') ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Priority: optional ++#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: AddressSanitizer -- a fast memory error detector (n32) ++# AddressSanitizer (ASan) is a fast memory error detector. It finds ++# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++ ++#Package: libn32asan`'ASAN_SO-dbg`'LS ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Section: debug ++#Priority: optional ++#Depends: BASELDEP, libdep(asan`'ASAN_SO,n32,=), ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: AddressSanitizer -- a fast memory error detector (n32 debug symbols) ++# AddressSanitizer (ASan) is a fast memory error detector. It finds ++# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++ ++ifenabled(`libx32asan',` ++Package: libx32asan`'ASAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (x32) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++ ++ifenabled(`libdbg',` ++Package: libx32asan`'ASAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(asan`'ASAN_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (x32 debug symbols) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++')`'dnl libdbg ++')`'dnl libx32asan ++ ++ifenabled(`libhfasan',` ++Package: libhfasan`'ASAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libasan'ASAN_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (hard float ABI) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++ ++ifenabled(`libdbg',` ++Package: libhfasan`'ASAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(asan`'ASAN_SO,hf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libasan'ASAN_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (hard float ABI debug symbols) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++')`'dnl libdbg ++')`'dnl libhfasan ++ ++ifenabled(`libsfasan',` ++Package: libsfasan`'ASAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (soft float ABI) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++ ++ifenabled(`libdbg',` ++Package: libsfasan`'ASAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(asan`'ASAN_SO,sf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (soft float ABI debug symbols) ++ AddressSanitizer (ASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++')`'dnl libdbg ++')`'dnl libsfasan ++')`'dnl libasan ++ ++ifenabled(`libhwasan',` ++Package: libhwasan`'HWASAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector ++ AddressSanitizer (HWASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++ ++ifenabled(`libdbg',` ++Package: libhwasan`'HWASAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(hwasan`'LSAN_SO,,=), ${misc:Depends} ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: AddressSanitizer -- a fast memory error detector (debug symbols) ++ AddressSanitizer (HWASan) is a fast memory error detector. It finds ++ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs. ++')`'dnl libdbg ++')`'dnl libhwasan ++ ++ifenabled(`liblsan',` ++Package: liblsan`'LSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (runtime) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer. ++ ++ifenabled(`libdbg',` ++Package: liblsan`'LSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(lsan`'LSAN_SO,,=), ${misc:Depends} ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (debug symbols) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer. ++')`'dnl libdbg ++ ++ifenabled(`lib32lsan',` ++Package: lib32lsan`'LSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (32bit) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer (empty package). ++ ++ifenabled(`libdbg',` ++Package: lib32lsan`'LSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(lsan`'LSAN_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (32 bit debug symbols) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer (empty package). ++')`'dnl libdbg ++')`'dnl lib32lsan ++ ++ifenabled(`lib64lsan',` ++#Package: lib64lsan`'LSAN_SO`'LS ++#Section: ifdef(`TARGET',`devel',`libs') ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++#Priority: optional ++#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: LeakSanitizer -- a memory leak detector (64bit) ++# LeakSanitizer (Lsan) is a memory leak detector which is integrated ++# into AddressSanitizer. ++ ++ifenabled(`libdbg',` ++#Package: lib64lsan`'LSAN_SO-dbg`'LS ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++#Section: debug ++#Priority: optional ++#Depends: BASELDEP, libdep(lsan`'LSAN_SO,64,=), ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: LeakSanitizer -- a memory leak detector (64bit debug symbols) ++# LeakSanitizer (Lsan) is a memory leak detector which is integrated ++# into AddressSanitizer. ++')`'dnl libdbg ++')`'dnl lib64lsan ++ ++ifenabled(`libn32lsan',` ++#Package: libn32lsan`'LSAN_SO`'LS ++#Section: ifdef(`TARGET',`devel',`libs') ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Priority: optional ++#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: LeakSanitizer -- a memory leak detector (n32) ++# LeakSanitizer (Lsan) is a memory leak detector which is integrated ++# into AddressSanitizer. ++ ++ifenabled(`libdbg',` ++#Package: libn32lsan`'LSAN_SO-dbg`'LS ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Section: debug ++#Priority: optional ++#Depends: BASELDEP, libdep(lsan`'LSAN_SO,n32,=), ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: LeakSanitizer -- a memory leak detector (n32 debug symbols) ++# LeakSanitizer (Lsan) is a memory leak detector which is integrated ++# into AddressSanitizer. ++')`'dnl libdbg ++')`'dnl libn32lsan ++ ++ifenabled(`libx32lsan',` ++Package: libx32lsan`'LSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (x32) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer (empty package). ++ ++ifenabled(`libdbg',` ++Package: libx32lsan`'LSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(lsan`'LSAN_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (x32 debug symbols) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer (empty package). ++')`'dnl libdbg ++')`'dnl libx32lsan ++ ++ifenabled(`libhflsan',` ++Package: libhflsan`'LSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: liblsan'LSAN_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (hard float ABI) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer. ++ ++ifenabled(`libdbg',` ++Package: libhflsan`'LSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(lsan`'LSAN_SO,hf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: liblsan'LSAN_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (hard float ABI debug symbols) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer. ++')`'dnl libdbg ++')`'dnl libhflsan ++ ++ifenabled(`libsflsan',` ++Package: libsflsan`'LSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (soft float ABI) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer. ++ ++ifenabled(`libdbg',` ++Package: libsflsan`'LSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(lsan`'LSAN_SO,sf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: LeakSanitizer -- a memory leak detector (soft float ABI debug symbols) ++ LeakSanitizer (Lsan) is a memory leak detector which is integrated ++ into AddressSanitizer. ++')`'dnl libdbg ++')`'dnl libsflsan ++')`'dnl liblsan ++ ++ifenabled(`libtsan',` ++Package: libtsan`'TSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libtsan'TSAN_SO`-armel [armel], libtsan'TSAN_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (runtime) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++ ++ifenabled(`libdbg',` ++Package: libtsan`'TSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(tsan`'TSAN_SO,,=), ${misc:Depends} ++ifdef(`TARGET',`',`Provides: libtsan'TSAN_SO`-dbg-armel [armel], libtsan'TSAN_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (debug symbols) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++')`'dnl libdbg ++ ++ifenabled(`lib32tsan',` ++Package: lib32tsan`'TSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (32bit) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++ ++ifenabled(`libdbg',` ++Package: lib32tsan`'TSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(tsan`'TSAN_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (32 bit debug symbols) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++')`'dnl libdbg ++')`'dnl lib32tsan ++ ++ifenabled(`lib64tsan',` ++Package: lib64tsan`'TSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (64bit) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++ ++ifenabled(`libdbg',` ++Package: lib64tsan`'TSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(tsan`'TSAN_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (64bit debug symbols) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++')`'dnl libdbg ++')`'dnl lib64tsan ++ ++ifenabled(`libn32tsan',` ++Package: libn32tsan`'TSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (n32) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++ ++ifenabled(`libdbg',` ++Package: libn32tsan`'TSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(tsan`'TSAN_SO,n32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (n32 debug symbols) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++')`'dnl libdbg ++')`'dnl libn32tsan ++ ++ifenabled(`libx32tsan',` ++Package: libx32tsan`'TSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (x32) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++ ++ifenabled(`libdbg',` ++Package: libx32tsan`'TSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(tsan`'TSAN_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (x32 debug symbols) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++')`'dnl libdbg ++')`'dnl libx32tsan ++ ++ifenabled(`libhftsan',` ++Package: libhftsan`'TSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libtsan'TSAN_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (hard float ABI) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++ ++ifenabled(`libdbg',` ++Package: libhftsan`'TSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(tsan`'TSAN_SO,hf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libtsan'TSAN_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (hard float ABI debug symbols) ++')`'dnl libdbg ++')`'dnl libhftsan ++ ++ifenabled(`libsftsan',` ++Package: libsftsan`'TSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (soft float ABI) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++ ++ifenabled(`libdbg',` ++Package: libsftsan`'TSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(tsan`'TSAN_SO,sf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: ThreadSanitizer -- a Valgrind-based detector of data races (soft float ABI debug symbols) ++ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. ++ The Linux and Mac versions are based on Valgrind. ++')`'dnl libdbg ++')`'dnl libsftsan ++')`'dnl libtsan ++ ++ifenabled(`libubsan',` ++Package: libubsan`'UBSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libubsan'UBSAN_SO`-armel [armel], libubsan'UBSAN_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (runtime) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++ ++ifenabled(`libdbg',` ++Package: libubsan`'UBSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,,=), ${misc:Depends} ++ifdef(`TARGET',`',`Provides: libubsan'UBSAN_SO`-dbg-armel [armel], libubsan'UBSAN_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (debug symbols) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++')`'dnl libdbg ++ ++ifenabled(`lib32ubsan',` ++Package: lib32ubsan`'UBSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (32bit) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++ ++ifenabled(`libdbg',` ++Package: lib32ubsan`'UBSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (32 bit debug symbols) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++')`'dnl libdbg ++')`'dnl lib32ubsan ++ ++ifenabled(`lib64ubsan',` ++Package: lib64ubsan`'UBSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (64bit) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++ ++ifenabled(`libdbg',` ++Package: lib64ubsan`'UBSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (64bit debug symbols) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++')`'dnl libdbg ++')`'dnl lib64ubsan ++ ++ifenabled(`libn32ubsan',` ++#Package: libn32ubsan`'UBSAN_SO`'LS ++#Section: ifdef(`TARGET',`devel',`libs') ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Priority: optional ++#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: UBSan -- undefined behaviour sanitizer (n32) ++# UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++# Various computations will be instrumented to detect undefined behavior ++# at runtime. Available for C and C++. ++ ++ifenabled(`libdbg',` ++#Package: libn32ubsan`'UBSAN_SO-dbg`'LS ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Section: debug ++#Priority: optional ++#Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,n32,=), ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: UBSan -- undefined behaviour sanitizer (n32 debug symbols) ++# UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++# Various computations will be instrumented to detect undefined behavior ++# at runtime. Available for C and C++. ++')`'dnl libdbg ++')`'dnl libn32ubsan ++ ++ifenabled(`libx32ubsan',` ++Package: libx32ubsan`'UBSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (x32) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++ ++ifenabled(`libdbg',` ++Package: libx32ubsan`'UBSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (x32 debug symbols) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++')`'dnl libdbg ++')`'dnl libx32ubsan ++ ++ifenabled(`libhfubsan',` ++Package: libhfubsan`'UBSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libubsan'UBSAN_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (hard float ABI) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++ ++ifenabled(`libdbg',` ++Package: libhfubsan`'UBSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,hf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libubsan'UBSAN_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (hard float ABI debug symbols) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++')`'dnl libdbg ++')`'dnl libhfubsan ++ ++ifenabled(`libsfubsan',` ++Package: libsfubsan`'UBSAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (soft float ABI) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++ ++ifenabled(`libdbg',` ++Package: libsfubsan`'UBSAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,sf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: UBSan -- undefined behaviour sanitizer (soft float ABI debug symbols) ++ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined. ++ Various computations will be instrumented to detect undefined behavior ++ at runtime. Available for C and C++. ++')`'dnl libdbg ++')`'dnl libsfubsan ++')`'dnl libubsan ++ ++ifenabled(`libvtv',` ++Package: libvtv`'VTV_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (runtime) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++ ++ifenabled(`libdbg',` ++Package: libvtv`'VTV_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(vtv`'VTV_SO,,=), ${misc:Depends} ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: GNU vtable verification library (debug symbols) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++')`'dnl libdbg ++ ++ifenabled(`lib32vtv',` ++Package: lib32vtv`'VTV_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (32bit) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++ ++ifenabled(`libdbg',` ++Package: lib32vtv`'VTV_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(vtv`'VTV_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (32 bit debug symbols) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++')`'dnl libdbg ++')`'dnl lib32vtv ++ ++ifenabled(`lib64vtv',` ++Package: lib64vtv`'VTV_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (64bit) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++ ++ifenabled(`libdbg',` ++Package: lib64vtv`'VTV_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(vtv`'VTV_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (64bit debug symbols) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++')`'dnl libdbg ++')`'dnl lib64vtv ++ ++ifenabled(`libn32vtv',` ++Package: libn32vtv`'VTV_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (n32) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++ ++ifenabled(`libdbg',` ++Package: libn32vtv`'VTV_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(vtv`'VTV_SO,n32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (n32 debug symbols) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++')`'dnl libdbg ++')`'dnl libn32vtv ++ ++ifenabled(`libx32vtv',` ++Package: libx32vtv`'VTV_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (x32) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++ ++ifenabled(`libdbg',` ++Package: libx32vtv`'VTV_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(vtv`'VTV_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (x32 debug symbols) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++')`'dnl libdbg ++')`'dnl libx32vtv ++ ++ifenabled(`libhfvtv',` ++Package: libhfvtv`'VTV_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libvtv'VTV_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: GNU vtable verification library (hard float ABI) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++ ++ifenabled(`libdbg',` ++Package: libhfvtv`'VTV_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(vtv`'VTV_SO,hf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libvtv'VTV_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: GNU vtable verification library (hard float ABI debug symbols) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++')`'dnl libdbg ++')`'dnl libhfvtv ++ ++ifenabled(`libsfvtv',` ++Package: libsfvtv`'VTV_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (soft float ABI) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++ ++ifenabled(`libdbg',` ++Package: libsfvtv`'VTV_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(vtv`'VTV_SO,sf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU vtable verification library (soft float ABI debug symbols) ++ Vtable verification is a new security hardening feature for GCC that ++ is designed to detect and handle (during program execution) when a ++ vtable pointer that is about to be used for a virtual function call is ++ not a valid vtable pointer for that call. ++')`'dnl libdbg ++')`'dnl libsfvtv ++')`'dnl libvtv ++ ++ifenabled(`libbacktrace',` ++Package: libbacktrace`'BTRACE_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libbacktrace'BTRACE_SO`-armel [armel], libbacktrace'BTRACE_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++ ++ifenabled(`libdbg',` ++Package: libbacktrace`'BTRACE_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,,=), ${misc:Depends} ++ifdef(`TARGET',`',`Provides: libbacktrace'BTRACE_SO`-dbg-armel [armel], libbacktrace'BTRACE_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: stack backtrace library (debug symbols) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++')`'dnl libdbg ++ ++Package: lib32backtrace`'BTRACE_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: stack backtrace library (32bit) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++ ++ifenabled(`libdbg',` ++Package: lib32backtrace`'BTRACE_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library (32 bit debug symbols) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++')`'dnl libdbg ++ ++Package: lib64backtrace`'BTRACE_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library (64bit) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++ ++ifenabled(`libdbg',` ++Package: lib64backtrace`'BTRACE_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library (64bit debug symbols) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++')`'dnl libdbg ++ ++Package: libn32backtrace`'BTRACE_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library (n32) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++ ++ifenabled(`libdbg',` ++Package: libn32backtrace`'BTRACE_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,n32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library (n32 debug symbols) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++')`'dnl libdbg ++ ++ifenabled(`libx32backtrace',` ++Package: libx32backtrace`'BTRACE_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library (x32) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++ ++ifenabled(`libdbg',` ++Package: libx32backtrace`'BTRACE_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library (x32 debug symbols) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++')`'dnl libdbg ++')`'dnl libx32backtrace ++ ++ifenabled(`libhfbacktrace',` ++Package: libhfbacktrace`'BTRACE_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libbacktrace'BTRACE_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: stack backtrace library (hard float ABI) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++ ++ifenabled(`libdbg',` ++Package: libhfbacktrace`'BTRACE_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,hf,=), ${misc:Depends} ++wifdef(`TARGET',`dnl',`Conflicts: libbacktrace'BTRACE_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: stack backtrace library (hard float ABI debug symbols) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++')`'dnl libdbg ++')`'dnl libhfbacktrace ++ ++ifenabled(`libsfbacktrace',` ++Package: libsfbacktrace`'BTRACE_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library (soft float ABI) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++ ++ifenabled(`libdbg',` ++Package: libsfbacktrace`'BTRACE_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,sf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: stack backtrace library (soft float ABI debug symbols) ++ libbacktrace uses the GCC unwind interface to collect a stack trace, ++ and parses DWARF debug info to get file/line/function information. ++')`'dnl libdbg ++')`'dnl libsfbacktrace ++')`'dnl libbacktrace ++ ++ifenabled(`libqmath',` ++Package: libquadmath`'QMATH_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. The library is used to provide on such ++ targets the REAL(16) type in the GNU Fortran compiler. ++ ++ifenabled(`libdbg',` ++Package: libquadmath`'QMATH_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(quadmath`'QMATH_SO,,=), ${misc:Depends} ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (debug symbols) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. ++')`'dnl libdbg ++ ++Package: lib32quadmath`'QMATH_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (32bit) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. The library is used to provide on such ++ targets the REAL(16) type in the GNU Fortran compiler. ++ ++ifenabled(`libdbg',` ++Package: lib32quadmath`'QMATH_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(quadmath`'QMATH_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (32 bit debug symbols) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. ++')`'dnl libdbg ++ ++Package: lib64quadmath`'QMATH_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (64bit) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. The library is used to provide on such ++ targets the REAL(16) type in the GNU Fortran compiler. ++ ++ifenabled(`libdbg',` ++Package: lib64quadmath`'QMATH_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(quadmath`'QMATH_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (64bit debug symbols) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. ++')`'dnl libdbg ++ ++#Package: libn32quadmath`'QMATH_SO`'LS ++#Section: ifdef(`TARGET',`devel',`libs') ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Priority: optional ++#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: GCC Quad-Precision Math Library (n32) ++# A library, which provides quad-precision mathematical functions on targets ++# supporting the __float128 datatype. The library is used to provide on such ++# targets the REAL(16) type in the GNU Fortran compiler. ++ ++ifenabled(`libdbg',` ++#Package: libn32quadmath`'QMATH_SO-dbg`'LS ++#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++#Section: debug ++#Priority: optional ++#Depends: BASELDEP, libdep(quadmath`'QMATH_SO,n32,=), ${misc:Depends} ++#BUILT_USING`'dnl ++#Description: GCC Quad-Precision Math Library (n32 debug symbols) ++# A library, which provides quad-precision mathematical functions on targets ++# supporting the __float128 datatype. ++')`'dnl libdbg ++ ++ifenabled(`libx32qmath',` ++Package: libx32quadmath`'QMATH_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (x32) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. The library is used to provide on such ++ targets the REAL(16) type in the GNU Fortran compiler. ++ ++ifenabled(`libdbg',` ++Package: libx32quadmath`'QMATH_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(quadmath`'QMATH_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (x32 debug symbols) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. ++')`'dnl libdbg ++')`'dnl libx32qmath ++ ++ifenabled(`libhfqmath',` ++Package: libhfquadmath`'QMATH_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (hard float ABI) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. The library is used to provide on such ++ targets the REAL(16) type in the GNU Fortran compiler. ++ ++ifenabled(`libdbg',` ++Package: libhfquadmath`'QMATH_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(quadmath`'QMATH_SO,hf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. ++')`'dnl libdbg ++')`'dnl libhfqmath ++ ++ifenabled(`libsfqmath',` ++Package: libsfquadmath`'QMATH_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (soft float ABI) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. The library is used to provide on such ++ targets the REAL(16) type in the GNU Fortran compiler. ++ ++ifenabled(`libdbg',` ++Package: libsfquadmath`'QMATH_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(quadmath`'QMATH_SO,sf,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) ++ A library, which provides quad-precision mathematical functions on targets ++ supporting the __float128 datatype. ++')`'dnl libdbg ++')`'dnl libsfqmath ++')`'dnl libqmath ++ ++ifenabled(`libcc1',` ++Package: libcc1-`'CC1_SO ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC cc1 plugin for GDB ++ libcc1 is a plugin for GDB. ++')`'dnl libcc1 ++ ++ifenabled(`libjit',` ++Package: libgccjit`'GCCJIT_SO ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASEDEP, libgcc`'PV-dev, binutils, ${dep:libcdev}, ++ ${shlibs:Depends}, ${misc:Depends} ++Breaks: python-gccjit (<< 0.4-4), python3-gccjit (<< 0.4-4) ++BUILT_USING`'dnl ++Description: GCC just-in-time compilation (shared library) ++ libgccjit provides an embeddable shared library with an API for adding ++ compilation to existing programs using GCC. ++ ++ifenabled(`libdbg',` ++Package: libgccjit`'GCCJIT_SO-dbg ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASEDEP, libgccjit`'GCCJIT_SO (= ${gcc:Version}), ++ ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC just-in-time compilation (debug information) ++ libgccjit provides an embeddable shared library with an API for adding ++ compilation to existing programs using GCC. ++')`'dnl libdbg ++')`'dnl libjit ++ ++ifenabled(`jit',` ++Package: libgccjit`'PV-doc ++Section: doc ++Architecture: all ++Priority: optional ++Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++Conflicts: libgccjit-5-doc, libgccjit-6-doc, libgccjit-7-doc, libgccjit-8-doc, ++ libgccjit-9-doc, libgccjit-10-doc, libgccjit-11-doc, ++Description: GCC just-in-time compilation (documentation) ++ libgccjit provides an embeddable shared library with an API for adding ++ compilation to existing programs using GCC. ++ ++Package: libgccjit`'PV-dev ++Section: ifdef(`TARGET',`devel',`libdevel') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASEDEP, libgccjit`'GCCJIT_SO (>= ${gcc:Version}), ++ ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Suggests: libgccjit`'PV-dbg ++Description: GCC just-in-time compilation (development files) ++ libgccjit provides an embeddable shared library with an API for adding ++ compilation to existing programs using GCC. ++')`'dnl jit ++ ++ifenabled(`objpp',` ++ifenabled(`objppdev',` ++Package: gobjc++`'PV`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), g++`'PV`'TS (= ${gcc:Version}), ${shlibs:Depends}, libidevdep(objc`'PV-dev,,=), ${misc:Depends} ++Suggests: ${gobjcxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}) ++Provides: objc++-compiler`'TS ++BUILT_USING`'dnl ++Description: GNU Objective-C++ compiler ++ This is the GNU Objective-C++ compiler, which compiles ++ Objective-C++ on platforms supported by the gcc compiler. It uses the ++ gcc backend to generate optimized code. ++')`'dnl obcppdev ++ ++ifenabled(`multilib',` ++Package: gobjc++`'PV-multilib`'TS ++Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Priority: optional ++Depends: BASEDEP, gobjc++`'PV`'TS (= ${gcc:Version}), g++`'PV-multilib`'TS (= ${gcc:Version}), gobjc`'PV-multilib`'TS (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Objective-C++ compiler (multilib support) ++ This is the GNU Objective-C++ compiler, which compiles Objective-C++ on ++ platforms supported by the gcc compiler. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++')`'dnl multilib ++')`'dnl obcpp ++ ++ifenabled(`objc',` ++ifenabled(`objcdev',` ++Package: gobjc`'PV`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libidevdep(objc`'PV-dev,,=), ${misc:Depends} ++Suggests: ${gobjc:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libdbgdep(objc`'OBJC_SO-dbg), ++Provides: objc-compiler`'TS ++BUILT_USING`'dnl ++Description: GNU Objective-C compiler ++ This is the GNU Objective-C compiler, which compiles ++ Objective-C on platforms supported by the gcc compiler. It uses the ++ gcc backend to generate optimized code. ++ ++ifenabled(`multilib',` ++Package: gobjc`'PV-multilib`'TS ++Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Priority: optional ++Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Objective-C compiler (multilib support)`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU Objective-C compiler, which compiles Objective-C on platforms ++ supported by the gcc compiler. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++')`'dnl multilib ++ ++Package: libobjc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,), libdep(objc`'OBJC_SO,), ${shlibs:Depends}, ${misc:Depends} ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++ ++Package: lib64objc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,64), libdep(objc`'OBJC_SO,64), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (64bit development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++ ++Package: lib32objc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,32), libdep(objc`'OBJC_SO,32), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (32bit development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++ ++Package: libn32objc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,n32), libdep(objc`'OBJC_SO,n32), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (n32 development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++ ++ifenabled(`x32dev',` ++Package: libx32objc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,x32), libdep(objc`'OBJC_SO,x32), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (x32 development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++')`'dnl libx32objc ++ ++ifenabled(`armml',` ++Package: libhfobjc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,hf), libdep(objc`'OBJC_SO,hf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (hard float ABI development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++')`'dnl armml ++ ++ifenabled(`armml',` ++Package: libsfobjc`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,sf), libdep(objc`'OBJC_SO,sf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (soft float development files) ++ This package contains the headers and static library files needed to build ++ GNU ObjC applications. ++')`'dnl armml ++')`'dnl objcdev ++ ++ifenabled(`libobjc',` ++Package: libobjc`'OBJC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libobjc'OBJC_SO`-armel [armel], libobjc'OBJC_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++ifelse(OBJC_SO,`2',`Breaks: ${multiarch:breaks} ++',`')')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications ++ Library needed for GNU ObjC applications linked against the shared library. ++ ++ifenabled(`libdbg',` ++Package: libobjc`'OBJC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libobjc'OBJC_SO`-dbg-armel [armel], libobjc'OBJC_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Priority: optional ++Depends: BASELDEP, libdep(objc`'OBJC_SO,,=), libdbgdep(gcc-s`'GCC_SO-dbg,,>=,${libgcc:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (debug symbols) ++ Library needed for GNU ObjC applications linked against the shared library. ++')`'dnl libdbg ++')`'dnl libobjc ++ ++ifenabled(`lib64objc',` ++Package: lib64objc`'OBJC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (64bit) ++ Library needed for GNU ObjC applications linked against the shared library. ++ ++ifenabled(`libdbg',` ++Package: lib64objc`'OBJC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, libdep(objc`'OBJC_SO,64,=), libdbgdep(gcc-s`'GCC_SO-dbg,64,>=,${gcc:EpochVersion}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (64 bit debug symbols) ++ Library needed for GNU ObjC applications linked against the shared library. ++')`'dnl libdbg ++')`'dnl lib64objc ++ ++ifenabled(`lib32objc',` ++Package: lib32objc`'OBJC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (32bit) ++ Library needed for GNU ObjC applications linked against the shared library. ++ ++ifenabled(`libdbg',` ++Package: lib32objc`'OBJC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, libdep(objc`'OBJC_SO,32,=), libdbgdep(gcc-s`'GCC_SO-dbg,32,>=,${gcc:EpochVersion}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (32 bit debug symbols) ++ Library needed for GNU ObjC applications linked against the shared library. ++')`'dnl libdbg ++')`'dnl lib32objc ++ ++ifenabled(`libn32objc',` ++Package: libn32objc`'OBJC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (n32) ++ Library needed for GNU ObjC applications linked against the shared library. ++ ++ifenabled(`libdbg',` ++Package: libn32objc`'OBJC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, libdep(objc`'OBJC_SO,n32,=), libdbgdep(gcc-s`'GCC_SO-dbg,n32,>=,${gcc:EpochVersion}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (n32 debug symbols) ++ Library needed for GNU ObjC applications linked against the shared library. ++')`'dnl libdbg ++')`'dnl libn32objc ++ ++ifenabled(`libx32objc',` ++Package: libx32objc`'OBJC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (x32) ++ Library needed for GNU ObjC applications linked against the shared library. ++ ++ifenabled(`libdbg',` ++Package: libx32objc`'OBJC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, libdep(objc`'OBJC_SO,x32,=), libdbgdep(gcc-s`'GCC_SO-dbg,x32,>=,${gcc:EpochVersion}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (x32 debug symbols) ++ Library needed for GNU ObjC applications linked against the shared library. ++')`'dnl libdbg ++')`'dnl libx32objc ++ ++ifenabled(`libhfobjc',` ++Package: libhfobjc`'OBJC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (hard float ABI) ++ Library needed for GNU ObjC applications linked against the shared library. ++ ++ifenabled(`libdbg',` ++Package: libhfobjc`'OBJC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, libdep(objc`'OBJC_SO,hf,=), libdbgdep(gcc-s`'GCC_SO-dbg,hf,>=,${gcc:EpochVersion}), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (hard float ABI debug symbols) ++ Library needed for GNU ObjC applications linked against the shared library. ++')`'dnl libdbg ++')`'dnl libhfobjc ++ ++ifenabled(`libsfobjc',` ++Package: libsfobjc`'OBJC_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (soft float ABI) ++ Library needed for GNU ObjC applications linked against the shared library. ++ ++ifenabled(`libdbg',` ++Package: libsfobjc`'OBJC_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, libdep(objc`'OBJC_SO,sf,=), libdbgdep(gcc-s`'GCC_SO-dbg,sf,>=,${gcc:EpochVersion}), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: Runtime library for GNU Objective-C applications (soft float ABI debug symbols) ++ Library needed for GNU ObjC applications linked against the shared library. ++')`'dnl libdbg ++')`'dnl libsfobjc ++')`'dnl objc ++ ++ifenabled(`fortran',` ++ifenabled(`fdev',` ++Package: gfortran`'PV`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libidevdep(gfortran`'PV-dev,,=), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`',`Provides: fortran95-compiler, ${fortran:mod-version} ++')dnl ++Suggests: ${gfortran:multilib}, gfortran`'PV-doc, ++ libdbgdep(gfortran`'FORTRAN_SO-dbg), ++ libcoarrays-dev ++BUILT_USING`'dnl ++Description: GNU Fortran compiler ++ This is the GNU Fortran compiler, which compiles ++ Fortran on platforms supported by the gcc compiler. It uses the ++ gcc backend to generate optimized code. ++ ++ifenabled(`multilib',` ++Package: gfortran`'PV-multilib`'TS ++Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Priority: optional ++Depends: BASEDEP, gfortran`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Fortran compiler (multilib support)`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU Fortran compiler, which compiles Fortran on platforms ++ supported by the gcc compiler. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++')`'dnl multilib ++ ++ifenabled(`gfdldoc',` ++Package: gfortran`'PV-doc ++Architecture: all ++Section: doc ++Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++Description: Documentation for the GNU Fortran compiler (gfortran) ++ Documentation for the GNU Fortran compiler in info `format'. ++')`'dnl gfdldoc ++ ++Package: libgfortran`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: ifdef(`TARGET',`devel',`libdevel') ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev`',), libdep(gfortran`'FORTRAN_SO,), ${shlibs:Depends}, ${misc:Depends} ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++ ++Package: lib64gfortran`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev`',64), libdep(gfortran`'FORTRAN_SO,64), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (64bit development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++ ++Package: lib32gfortran`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev`',32), libdep(gfortran`'FORTRAN_SO,32), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (32bit development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++ ++Package: libn32gfortran`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev`',n32), libdep(gfortran`'FORTRAN_SO,n32), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (n32 development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++ ++ifenabled(`x32dev',` ++Package: libx32gfortran`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev`',x32), libdep(gfortran`'FORTRAN_SO,x32), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (x32 development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++')`'dnl libx32gfortran ++ ++ifenabled(`armml',` ++Package: libhfgfortran`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev`',hf), libdep(gfortran`'FORTRAN_SO,hf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (hard float ABI development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++')`'dnl armml ++ ++ifenabled(`armml',` ++Package: libsfgfortran`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev`',sf), libdep(gfortran`'FORTRAN_SO,sf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (soft float ABI development files) ++ This package contains the headers and static library files needed to build ++ GNU Fortran applications. ++')`'dnl armml ++')`'dnl fdev ++ ++ifenabled(`libgfortran',` ++Package: libgfortran`'FORTRAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libgfortran'FORTRAN_SO`-armel [armel], libgfortran'FORTRAN_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++Breaks: ${multiarch:breaks} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: libgfortran`'FORTRAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libgfortran'FORTRAN_SO`-dbg-armel [armel], libgfortran'FORTRAN_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Priority: optional ++Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,,=), libdbgdep(gcc-s`'GCC_SO-dbg,,>=,${libgcc:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (debug symbols) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++')`'dnl libdbg ++')`'dnl libgfortran ++ ++ifenabled(`lib64gfortran',` ++Package: lib64gfortran`'FORTRAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (64bit) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: lib64gfortran`'FORTRAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (64bit debug symbols) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++')`'dnl libdbg ++')`'dnl lib64gfortran ++ ++ifenabled(`lib32gfortran',` ++Package: lib32gfortran`'FORTRAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (32bit) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: lib32gfortran`'FORTRAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (32 bit debug symbols) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++')`'dnl libdbg ++')`'dnl lib32gfortran ++ ++ifenabled(`libn32gfortran',` ++Package: libn32gfortran`'FORTRAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (n32) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: libn32gfortran`'FORTRAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,n32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (n32 debug symbols) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++')`'dnl libdbg ++')`'dnl libn32gfortran ++ ++ifenabled(`libx32gfortran',` ++Package: libx32gfortran`'FORTRAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (x32) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: libx32gfortran`'FORTRAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (x32 debug symbols) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++')`'dnl libdbg ++')`'dnl libx32gfortran ++ ++ifenabled(`libhfgfortran',` ++Package: libhfgfortran`'FORTRAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (hard float ABI) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: libhfgfortran`'FORTRAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,hf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++')`'dnl libdbg ++')`'dnl libhfgfortran ++ ++ifenabled(`libsfgfortran',` ++Package: libsfgfortran`'FORTRAN_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (soft float ABI) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: libsfgfortran`'FORTRAN_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,sf,=), ${misc:Depends} ++ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) ++ Library needed for GNU Fortran applications linked against the ++ shared library. ++')`'dnl libdbg ++')`'dnl libsfgfortran ++')`'dnl fortran ++ ++ifenabled(`ggo',` ++ifenabled(`godev',` ++Package: gccgo`'PV`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: BASEDEP, ifdef(`STANDALONEGO',`${dep:libcc1}, ',`gcc`'PV`'TS (= ${gcc:Version}), ')libidevdep(go`'PV-dev,,>=), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`',`Provides: go-compiler ++')dnl ++Suggests: ${go:multilib}, gccgo`'PV-doc, libdbgdep(go`'GO_SO-dbg), ++Conflicts: ${golang:Conflicts} ++BUILT_USING`'dnl ++Description: GNU Go compiler ++ This is the GNU Go compiler, which compiles Go on platforms supported ++ by the gcc compiler. It uses the gcc backend to generate optimized code. ++ ++ifenabled(`multilib',` ++Package: gccgo`'PV-multilib`'TS ++Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Section: devel ++Priority: optional ++Depends: BASEDEP, gccgo`'PV`'TS (= ${gcc:Version}), ifdef(`STANDALONEGO',,`gcc`'PV-multilib`'TS (= ${gcc:Version}), ')${dep:libgobiarchdev}, ${shlibs:Depends}, ${misc:Depends} ++Suggests: ${dep:libgobiarchdbg} ++BUILT_USING`'dnl ++Description: GNU Go compiler (multilib support)`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU Go compiler, which compiles Go on platforms supported ++ by the gcc compiler. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++')`'dnl multilib ++ ++ifenabled(`gfdldoc',` ++Package: gccgo`'PV-doc ++Architecture: all ++Section: doc ++Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Documentation for the GNU Go compiler (gccgo) ++ Documentation for the GNU Go compiler in info `format'. ++')`'dnl gfdldoc ++ ++Package: libgo`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,), libdep(go`'GO_SO,), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++ ++Package: lib64go`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,64), libdep(go`'GO_SO,64), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (64bit development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++ ++Package: lib32go`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,32), libdep(go`'GO_SO,32), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (32bit development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++ ++Package: libn32go`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,n32), libdep(go`'GO_SO,n32), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (n32 development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++ ++ifenabled(`x32dev',` ++Package: libx32go`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,x32), libdep(go`'GO_SO,x32), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (x32 development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++')`'dnl libx32go ++ ++ifenabled(`armml',` ++Package: libhfgo`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,hf), libdep(go`'GO_SO,hf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (hard float ABI development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++')`'dnl armml ++ ++ifenabled(`armml',` ++Package: libsfgo`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,sf), libdep(go`'GO_SO,sf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (soft float development files) ++ This package contains the headers and static library files needed to build ++ GNU Go applications. ++')`'dnl armml ++')`'dnl godev ++ ++ifenabled(`libggo',` ++Package: libgo`'GO_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libgo'GO_SO`-armel [armel], libgo'GO_SO`-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: libgo`'GO_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`TARGET',`',`Provides: libgo'GO_SO`-dbg-armel [armel], libgo'GO_SO`-dbg-armhf [armhf] ++')`'dnl ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Priority: optional ++Depends: BASELDEP, libdep(go`'GO_SO,,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (debug symbols) ++ Library needed for GNU Go applications linked against the ++ shared library. This currently is an empty package, because the ++ library is completely unstripped. ++')`'dnl libdbg ++')`'dnl libgo ++ ++ifenabled(`lib64ggo',` ++Package: lib64go`'GO_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (64bit) ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: lib64go`'GO_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, libdep(go`'GO_SO,64,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (64bit debug symbols) ++ Library needed for GNU Go applications linked against the ++ shared library. This currently is an empty package, because the ++ library is completely unstripped. ++')`'dnl libdbg ++')`'dnl lib64go ++ ++ifenabled(`lib32ggo',` ++Package: lib32go`'GO_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (32bit) ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: lib32go`'GO_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, libdep(go`'GO_SO,32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (32 bit debug symbols) ++ Library needed for GNU Go applications linked against the ++ shared library. This currently is an empty package, because the ++ library is completely unstripped. ++')`'dnl libdbg ++')`'dnl lib32go ++ ++ifenabled(`libn32ggo',` ++Package: libn32go`'GO_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (n32) ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: libn32go`'GO_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, libdep(go`'GO_SO,n32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (n32 debug symbols) ++ Library needed for GNU Go applications linked against the ++ shared library. This currently is an empty package, because the ++ library is completely unstripped. ++')`'dnl libdbg ++')`'dnl libn32go ++ ++ifenabled(`libx32ggo',` ++Package: libx32go`'GO_SO`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (x32) ++ Library needed for GNU Go applications linked against the ++ shared library. ++ ++ifenabled(`libdbg',` ++Package: libx32go`'GO_SO-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, libdep(go`'GO_SO,x32,=), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Runtime library for GNU Go applications (x32 debug symbols) ++ Library needed for GNU Go applications linked against the ++ shared library. This currently is an empty package, because the ++ library is completely unstripped. ++')`'dnl libdbg ++')`'dnl libx32go ++')`'dnl ggo ++ ++ifenabled(`c++',` ++ifenabled(`libcxx',` ++Package: libstdc++CXX_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, ${dep:libc}, ${shlibs:Depends}, ${misc:Depends} ++Provides: ifdef(`TARGET',`libstdc++CXX_SO-TARGET-dcv1',`libstdc++'CXX_SO`-armel [armel], libstdc++'CXX_SO`-armhf [armhf]') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++Breaks: ${multiarch:breaks} ++')`'dnl ++Conflicts: scim (<< 1.4.2-1) ++Replaces: libstdc++CXX_SO`'PV-dbg`'LS (<< 4.9.0-3) ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains an additional runtime library for C++ programs ++ built with the GNU compiler. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl libcxx ++ ++ifenabled(`lib32cxx',` ++Package: lib32stdc++CXX_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,32), ${shlibs:Depends}, ${misc:Depends} ++Conflicts: ${confl:lib32} ++ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3 (32 bit Version) ++ This package contains an additional runtime library for C++ programs ++ built with the GNU compiler. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl lib32cxx ++ ++ifenabled(`lib64cxx',` ++Package: lib64stdc++CXX_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,64), ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3`'ifdef(`TARGET',` (TARGET)', `') (64bit) ++ This package contains an additional runtime library for C++ programs ++ built with the GNU compiler. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl lib64cxx ++ ++ifenabled(`libn32cxx',` ++Package: libn32stdc++CXX_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,n32), ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3`'ifdef(`TARGET',` (TARGET)', `') (n32) ++ This package contains an additional runtime library for C++ programs ++ built with the GNU compiler. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl libn32cxx ++ ++ifenabled(`libx32cxx',` ++Package: libx32stdc++CXX_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,x32), ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3`'ifdef(`TARGET',` (TARGET)', `') (x32) ++ This package contains an additional runtime library for C++ programs ++ built with the GNU compiler. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl libx32cxx ++ ++ifenabled(`libhfcxx',` ++Package: libhfstdc++CXX_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,hf), ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-TARGET-dcv1 ++',`')`'dnl ++ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3`'ifdef(`TARGET',` (TARGET)', `') (hard float ABI) ++ This package contains an additional runtime library for C++ programs ++ built with the GNU compiler. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl libhfcxx ++ ++ifenabled(`libsfcxx',` ++Package: libsfstdc++CXX_SO`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: ifdef(`TARGET',`devel',`libs') ++Priority: optional ++Depends: BASELDEP, libdep(gcc-s1,sf), ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-TARGET-dcv1 ++',`')`'dnl ++ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3`'ifdef(`TARGET',` (TARGET)', `') (soft float ABI) ++ This package contains an additional runtime library for C++ programs ++ built with the GNU compiler. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl libsfcxx ++ ++ifenabled(`c++dev',` ++Package: libstdc++`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Section: ifdef(`TARGET',`devel',`libdevel') ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,,=), ++ libdep(stdc++CXX_SO,,>=), ${dep:libcdev}, ${misc:Depends} ++ifdef(`TARGET',`',`dnl native ++Suggests: libstdc++`'PV-doc ++')`'dnl native ++Provides: libstdc++-dev`'LS`'ifdef(`TARGET',`, libstdc++-dev-TARGET-dcv1') ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: libstdc++`'PV-pic`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Section: ifdef(`TARGET',`devel',`libdevel') ++Priority: optional ++Depends: BASELDEP, libdep(stdc++CXX_SO,), ++ libdevdep(stdc++`'PV-dev,), ${misc:Depends} ++ifdef(`TARGET',`Provides: libstdc++-pic-TARGET-dcv1 ++',`')`'dnl ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3 (shared library subset kit)`'ifdef(`TARGET',` (TARGET)', `') ++ This is used to develop subsets of the libstdc++ shared libraries for ++ use on custom installation floppies and in embedded systems. ++ . ++ Unless you are making one of those, you will not need this package. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: libstdc++CXX_SO`'PV-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(stdc++CXX_SO,), ++ libdbgdep(gcc-s`'GCC_SO-dbg,,>=,${libgcc:Version}), ${shlibs:Depends}, ${misc:Depends} ++Provides: ifdef(`TARGET',`libstdc++CXX_SO-dbg-TARGET-dcv1',`libstdc++'CXX_SO`'PV`-dbg-armel [armel], libstdc++'CXX_SO`'PV`-dbg-armhf [armhf]') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Recommends: libdevdep(stdc++`'PV-dev,) ++Conflicts: libstdc++5-dbg`'LS, libstdc++5-3.3-dbg`'LS, libstdc++6-dbg`'LS, ++ libstdc++6-4.0-dbg`'LS, libstdc++6-4.1-dbg`'LS, libstdc++6-4.2-dbg`'LS, ++ libstdc++6-4.3-dbg`'LS, libstdc++6-4.4-dbg`'LS, libstdc++6-4.5-dbg`'LS, ++ libstdc++6-4.6-dbg`'LS, libstdc++6-4.7-dbg`'LS, libstdc++6-4.8-dbg`'LS, ++ libstdc++6-4.9-dbg`'LS, libstdc++6-5-dbg`'LS, libstdc++6-6-dbg`'LS, ++ libstdc++6-7-dbg`'LS, libstdc++6-8-dbg`'LS, libstdc++6-9-dbg`'LS, ++ libstdc++6-10-dbg`'LS, libstdc++6-11-dbg`'LS, ++BUILT_USING`'dnl ++ifelse(index(enabled_languages, `libdbg'), -1, `dnl ++Description: GNU Standard C++ Library v3 (debug build)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++',`dnl ++Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains the shared library of libstdc++ compiled with ++ debugging symbols. ++')`'dnl ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: lib32stdc++`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: ifdef(`TARGET',`devel',`libdevel') ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,32), ++ libdep(stdc++CXX_SO,32), libdevdep(stdc++`'PV-dev,), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET', `') ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: lib32stdc++CXX_SO`'PV-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(stdc++CXX_SO,32), ++ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc-s`'GCC_SO-dbg,32,>=,${gcc:EpochVersion}), ++ ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-dbg-TARGET-dcv1 ++',`')`'dnl ++Conflicts: lib32stdc++6-dbg`'LS, lib32stdc++6-4.0-dbg`'LS, ++ lib32stdc++6-4.1-dbg`'LS, lib32stdc++6-4.2-dbg`'LS, lib32stdc++6-4.3-dbg`'LS, ++ lib32stdc++6-4.4-dbg`'LS, lib32stdc++6-4.5-dbg`'LS, lib32stdc++6-4.6-dbg`'LS, ++ lib32stdc++6-4.7-dbg`'LS, lib32stdc++6-4.8-dbg`'LS, lib32stdc++6-4.9-dbg`'LS, ++ lib32stdc++6-5-dbg`'LS, lib32stdc++6-6-dbg`'LS, lib32stdc++6-7-dbg`'LS, ++ lib32stdc++6-8-dbg`'LS, lib32stdc++6-9-dbg`'LS, lib32stdc++6-10-dbg`'LS, ++ lib32stdc++6-11-dbg`'LS, ++BUILT_USING`'dnl ++ifelse(index(enabled_languages, `libdbg'), -1, `dnl ++Description: GNU Standard C++ Library v3 (debug build)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++',`dnl ++Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET', `') ++ This package contains the shared library of libstdc++ compiled with ++ debugging symbols. ++')`'dnl ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: lib64stdc++`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: ifdef(`TARGET',`devel',`libdevel') ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,64), ++ libdep(stdc++CXX_SO,64), libdevdep(stdc++`'PV-dev,), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: lib64stdc++CXX_SO`'PV-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(stdc++CXX_SO,64), ++ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc-s`'GCC_SO-dbg,64,>=,${gcc:EpochVersion}), ++ ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-dbg-TARGET-dcv1 ++',`')`'dnl ++Conflicts: lib64stdc++6-dbg`'LS, lib64stdc++6-4.0-dbg`'LS, ++ lib64stdc++6-4.1-dbg`'LS, lib64stdc++6-4.2-dbg`'LS, lib64stdc++6-4.3-dbg`'LS, ++ lib64stdc++6-4.4-dbg`'LS, lib64stdc++6-4.5-dbg`'LS, lib64stdc++6-4.6-dbg`'LS, ++ lib64stdc++6-4.7-dbg`'LS, lib64stdc++6-4.8-dbg`'LS, lib64stdc++6-4.9-dbg`'LS, ++ lib64stdc++6-5-dbg`'LS, lib64stdc++6-6-dbg`'LS, lib64stdc++6-7-dbg`'LS, ++ lib64stdc++6-8-dbg`'LS, lib64stdc++6-9-dbg`'LS, lib64stdc++6-10-dbg`'LS, ++ lib64stdc++6-11-dbg`'LS, ++BUILT_USING`'dnl ++ifelse(index(enabled_languages, `libdbg'), -1, `dnl ++Description: GNU Standard C++ Library v3 (debug build)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++',`dnl ++Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains the shared library of libstdc++ compiled with ++ debugging symbols. ++')`'dnl ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: libn32stdc++`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: ifdef(`TARGET',`devel',`libdevel') ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,n32), ++ libdep(stdc++CXX_SO,n32), libdevdep(stdc++`'PV-dev,), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET', `') ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: libn32stdc++CXX_SO`'PV-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(stdc++CXX_SO,n32), ++ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc-s`'GCC_SO-dbg,n32,>=,${gcc:EpochVersion}), ++ ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-dbg-TARGET-dcv1 ++',`')`'dnl ++Conflicts: libn32stdc++6-dbg`'LS, libn32stdc++6-4.0-dbg`'LS, ++ libn32stdc++6-4.1-dbg`'LS, libn32stdc++6-4.2-dbg`'LS, libn32stdc++6-4.3-dbg`'LS, ++ libn32stdc++6-4.4-dbg`'LS, libn32stdc++6-4.5-dbg`'LS, libn32stdc++6-4.6-dbg`'LS, ++ libn32stdc++6-4.7-dbg`'LS, libn32stdc++6-4.8-dbg`'LS, libn32stdc++6-4.9-dbg`'LS, ++ libn32stdc++6-5-dbg`'LS, libn32stdc++6-6-dbg`'LS, libn32stdc++6-7-dbg`'LS, ++ libn32stdc++6-8-dbg`'LS, libn32stdc++6-9-dbg`'LS, libn32stdc++6-10-dbg`'LS, ++ libn32stdc++6-11-dbg`'LS, ++BUILT_USING`'dnl ++ifelse(index(enabled_languages, `libdbg'), -1, `dnl ++Description: GNU Standard C++ Library v3 (debug build)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++',`dnl ++Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET', `') ++ This package contains the shared library of libstdc++ compiled with ++ debugging symbols. ++')`'dnl ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++ifenabled(`x32dev',` ++Package: libx32stdc++`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: ifdef(`TARGET',`devel',`libdevel') ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,x32), libdep(stdc++CXX_SO,x32), ++ libdevdep(stdc++`'PV-dev,), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl x32dev ++ ++ifenabled(`libx32dbgcxx',` ++Package: libx32stdc++CXX_SO`'PV-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(stdc++CXX_SO,x32), ++ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc-s`'GCC_SO-dbg,x32,>=,${gcc:EpochVersion}), ++ ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-dbg-TARGET-dcv1 ++',`')`'dnl ++Conflicts: libx32stdc++6-dbg`'LS, libx32stdc++6-4.6-dbg`'LS, ++ libx32stdc++6-4.7-dbg`'LS, libx32stdc++6-4.8-dbg`'LS, libx32stdc++6-4.9-dbg`'LS, ++ libx32stdc++6-5-dbg`'LS, libx32stdc++6-6-dbg`'LS, libx32stdc++6-7-dbg`'LS, ++ libx32stdc++6-8-dbg`'LS, libx32stdc++6-9-dbg`'LS, libx32stdc++6-10-dbg`'LS, ++ libx32stdc++6-11-dbg`'LS, ++BUILT_USING`'dnl ++ifelse(index(enabled_languages, `libdbg'), -1, `dnl ++Description: GNU Standard C++ Library v3 (debug build)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++',`dnl ++Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains the shared library of libstdc++ compiled with ++ debugging symbols. ++')`'dnl ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl libx32dbgcxx ++ ++ifenabled(`libhfdbgcxx',` ++Package: libhfstdc++`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: ifdef(`TARGET',`devel',`libdevel') ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,hf), ++ libdep(stdc++CXX_SO,hf), libdevdep(stdc++`'PV-dev,), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET', `') ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: libhfstdc++CXX_SO`'PV-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(stdc++CXX_SO,hf), ++ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc-s`'GCC_SO-dbg,hf,>=,${gcc:EpochVersion}), ++ ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-dbg-TARGET-dcv1 ++',`')`'dnl ++ifdef(`TARGET',`dnl',`Conflicts: libhfstdc++6-dbg`'LS, libhfstdc++6-4.3-dbg`'LS, libhfstdc++6-4.4-dbg`'LS, libhfstdc++6-4.5-dbg`'LS, libhfstdc++6-4.6-dbg`'LS, libhfstdc++6-4.7-dbg`'LS, libhfstdc++6-4.8-dbg`'LS, libhfstdc++6-4.9-dbg`'LS, libhfstdc++6-5-dbg`'LS, libhfstdc++6-6-dbg`'LS, libhfstdc++6-7-dbg`'LS, libstdc++'CXX_SO`-armhf [biarchhf_archs]') ++BUILT_USING`'dnl ++ifelse(index(enabled_languages, `libdbg'), -1, `dnl ++Description: GNU Standard C++ Library v3 (debug build)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++',`dnl ++Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET', `') ++ This package contains the shared library of libstdc++ compiled with ++ debugging symbols. ++')`'dnl ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl libhfdbgcxx ++ ++ifenabled(`libsfdbgcxx',` ++Package: libsfstdc++`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: ifdef(`TARGET',`devel',`libdevel') ++Priority: optional ++Depends: BASELDEP, libdevdep(gcc`'PV-dev,sf), ++ libdep(stdc++CXX_SO,sf), libdevdep(stdc++`'PV-dev,), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains the headers and static library files necessary for ++ building C++ programs which use libstdc++. ++ . ++ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which ++ was included up to g++-2.95. The first version of libstdc++-v3 appeared ++ in g++-3.0. ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++ ++Package: libsfstdc++CXX_SO`'PV-dbg`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: debug ++Priority: optional ++Depends: BASELDEP, libdep(stdc++CXX_SO,sf), ++ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc-s`'GCC_SO-dbg,sf,>=,${gcc:EpochVersion}), ++ ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-dbg-TARGET-dcv1 ++',`')`'dnl ++ifdef(`TARGET',`dnl',`Conflicts: libsfstdc++6-dbg`'LS, libsfstdc++6-4.3-dbg`'LS, libsfstdc++6-4.4-dbg`'LS, libsfstdc++6-4.5-dbg`'LS, libsfstdc++6-4.6-dbg`'LS, libsfstdc++6-4.7-dbg`'LS, libsfstdc++6-4.8-dbg`'LS, libsfstdc++6-4.9-dbg`'LS, libsfstdc++6-5-dbg`'LS, libhfstdc++6-6-dbg`'LS, libhfstdc++6-7-dbg`'LS, libhfstdc++6-8-dbg`'LS, libhfstdc++6-9-dbg`'LS, libhfstdc++6-10-dbg`'LS, libhfstdc++6-11-dbg`'LS, libstdc++'CXX_SO`-armel [biarchsf_archs]') ++BUILT_USING`'dnl ++ifelse(index(enabled_languages, `libdbg'), -1, `dnl ++Description: GNU Standard C++ Library v3 (debug build)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains a debug build of the shared libstdc++ library. The debug ++ symbols for the default build can be found in the libstdc++6-dbgsym package. ++',`dnl ++Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET',` (TARGET)', `') ++ This package contains the shared library of libstdc++ compiled with ++ debugging symbols. ++')`'dnl ++ifdef(`TARGET', `dnl ++ . ++ This package contains files for TARGET architecture, for use in cross-compile ++ environment. ++')`'dnl ++')`'dnl libsfdbgcxx ++ ++ifdef(`TARGET', `', ` ++Package: libstdc++`'PV-doc ++Architecture: all ++Section: doc ++Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, ++ libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, ++ libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc, libstdc++6-4.7-doc, ++ libstdc++-4.8-doc, libstdc++-4.9-doc, libstdc++-5-doc, libstdc++-6-doc, ++ libstdc++-7-doc, libstdc++-8-doc, libstdc++-9-doc, libstdc++-10-doc, ++ libstdc++-11-doc, ++Description: GNU Standard C++ Library v3 (documentation files) ++ This package contains documentation files for the GNU stdc++ library. ++ . ++ One set is the distribution documentation, the other set is the ++ source documentation including a namespace list, class hierarchy, ++ alphabetical list, compound list, file list, namespace members, ++ compound members and file members. ++')`'dnl native ++')`'dnl c++dev ++')`'dnl c++ ++ ++ifenabled(`ada',` ++Package: gnat`'-GNAT_V`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Depends: BASEDEP, gcc`'PV`'TS (>= ${gcc:SoftVersion}), ${dep:libgnat}, ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} ++Suggests: gnat`'PV-doc, ada-reference-manual-2012, gnat`'-GNAT_V-sjlj ++Conflicts: gnat-4.9, gnat-5`'TS, gnat-6`'TS, gnat-7`'TS, gnat-8`'TS, gnat-9`'TS, ++ gnat-10`'TS, gnat-11`'TS, ++# Previous versions conflict for (at least) /usr/bin/gnatmake. ++BUILT_USING`'dnl ++Description: GNU Ada compiler ++ GNAT is a compiler for the Ada programming language. It produces optimized ++ code on platforms supported by the GNU Compiler Collection (GCC). ++ . ++ This package provides the compiler, tools and runtime library that handles ++ exceptions using the default zero-cost mechanism. ++ ++ifenabled(`adasjlj',` ++Package: gnat`'-GNAT_V-sjlj`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Depends: BASEDEP, gnat`'-GNAT_V`'TS (= ${gnat:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Ada compiler (setjump/longjump runtime library) ++ GNAT is a compiler for the Ada programming language. It produces optimized ++ code on platforms supported by the GNU Compiler Collection (GCC). ++ . ++ This package provides an alternative runtime library that handles ++ exceptions using the setjump/longjump mechanism (as a static library ++ only). You can install it to supplement the normal compiler. ++')`'dnl adasjlj ++ ++ifenabled(`libgnat',` ++Package: libgnat`'-GNAT_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: runtime for applications compiled with GNAT (shared library) ++ GNAT is a compiler for the Ada programming language. It produces optimized ++ code on platforms supported by the GNU Compiler Collection (GCC). ++ . ++ The libgnat library provides runtime components needed by most ++ applications produced with GNAT. ++ . ++ This package contains the runtime shared library. ++ ++ifenabled(`libdbg',` ++Package: libgnat`'-GNAT_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++Pre-Depends: ${misc:Pre-Depends} ++')`'dnl ++Priority: optional ++Depends: BASELDEP, libgnat`'-GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: runtime for applications compiled with GNAT (debugging symbols) ++ GNAT is a compiler for the Ada programming language. It produces optimized ++ code on platforms supported by the GNU Compiler Collection (GCC). ++ . ++ The libgnat library provides runtime components needed by most ++ applications produced with GNAT. ++ . ++ This package contains the debugging symbols. ++')`'dnl libdbg ++')`'dnl libgnat ++ ++ifenabled(`lib64gnat',` ++Package: lib64gnat`'-GNAT_V ++Section: libs ++Architecture: biarch64_archs ++Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: runtime for applications compiled with GNAT (64 bits shared library) ++ GNAT is a compiler for the Ada programming language. It produces optimized ++ code on platforms supported by the GNU Compiler Collection (GCC). ++ . ++ The libgnat library provides runtime components needed by most ++ applications produced with GNAT. ++ . ++ This package contains the runtime shared library for 64 bits architectures. ++')`'dnl libgnat ++ ++ifenabled(`gfdldoc',` ++Package: gnat`'PV-doc ++Architecture: all ++Section: doc ++Depends: ${misc:Depends} ++Suggests: gnat`'PV ++Conflicts: gnat-4.9-doc, ++ gnat-5-doc, gnat-6-doc, gnat-7-doc, gnat-8-doc, gnat-9-doc, gnat-10-doc, ++ gnat-11-doc, ++BUILT_USING`'dnl ++Description: GNU Ada compiler (documentation) ++ GNAT is a compiler for the Ada programming language. It produces optimized ++ code on platforms supported by the GNU Compiler Collection (GCC). ++ . ++ The libgnat library provides runtime components needed by most ++ applications produced with GNAT. ++ . ++ This package contains the documentation in info `format'. ++')`'dnl gfdldoc ++')`'dnl ada ++ ++ifenabled(`d ',` ++Package: gdc`'PV`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: SOFTBASEDEP, g++`'PV`'TS (>= ${gcc:SoftVersion}), ${dep:gdccross}, ${dep:phobosdev}, ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`',`Provides: gdc, d-compiler, d-v2-compiler ++')dnl ++Replaces: gdc (<< 4.4.6-5) ++BUILT_USING`'dnl ++Description: GNU D compiler (version 2)`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU D compiler, which compiles D on platforms supported by gcc. ++ It uses the gcc backend to generate optimised code. ++ . ++ This compiler supports D language version 2. ++ ++ifenabled(`multilib',` ++Package: gdc`'PV-multilib`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: SOFTBASEDEP, gdc`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libphobosbiarchdev}${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU D compiler (version 2, multilib support)`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU D compiler, which compiles D on platforms supported by gcc. ++ It uses the gcc backend to generate optimised code. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++')`'dnl multilib ++ ++ifenabled(`libdevphobos',` ++Package: libgphobos`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`libphobos_archs') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libgphobos`'PHOBOS_V`'LS (>= ${gdc:Version}), ++ zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Phobos D standard library ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: lib64gphobos`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, lib64gphobos`'PHOBOS_V`'LS (>= ${gdc:Version}), ++ libdevdep(gcc`'PV-dev,64), ifdef(`TARGET',`',`lib64z1-dev [!mips !mipsel !mipsn32 !mipsn32el !mipsr6 !mipsr6el !mipsn32r6 !mipsn32r6el],') ++ ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Phobos D standard library (64bit development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: lib32gphobos`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, lib32gphobos`'PHOBOS_V`'LS (>= ${gdc:Version}), ++ libdevdep(gcc`'PV-dev,32), ifdef(`TARGET',`',`lib32z1-dev [!mipsn32 !mipsn32el !mips64 !mips64el !mipsn32r6 !mipsn32r6el !mips64r6 !mips64r6el],') ++ ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Phobos D standard library (32bit development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++ifenabled(`libdevn32phobos',` ++Package: libn32gphobos`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libn32gphobos`'PHOBOS_V`'LS (>= ${gdc:Version}), ++ libdevdep(gcc`'PV-dev,n32), ifdef(`TARGET',`',`libn32z1-dev [!mips !mipsel !mips64 !mips64el !mipsr6 !mipsr6el !mips64r6 !mips64r6el],') ++ ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Phobos D standard library (n32 development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl libn32phobos ++ ++ifenabled(`libdevx32phobos',` ++Package: libx32gphobos`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libx32gphobos`'PHOBOS_V`'LS (>= ${gdc:Version}), ++ libdevdep(gcc`'PV-dev,x32), ifdef(`TARGET',`',`${dep:libx32z},') ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Phobos D standard library (x32 development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl libx32phobos ++ ++ifenabled(`armml',` ++Package: libhfgphobos`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libhfgphobos`'PHOBOS_V`'LS (>= ${gdc:Version}), ++ libdevdep(gcc`'PV-dev,hf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Phobos D standard library (hard float ABI development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++Package: libsfgphobos`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libsfgphobos`'PHOBOS_V`'LS (>= ${gdc:Version}), ++ libdevdep(gcc`'PV-dev,sf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Phobos D standard library (soft float ABI development files) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl armml ++')`'dnl libdevphobos ++ ++ifenabled(`libphobos',` ++Package: libgphobos`'PHOBOS_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`libphobos_archs') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Replaces: libgphobos68`'LS ++Breaks: dub (<< 1.16.0-1~) ++BUILT_USING`'dnl ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++ifenabled(`libdbg',` ++Package: libgphobos`'PHOBOS_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`libphobos_archs') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Priority: optional ++Depends: BASELDEP, libgphobos`'PHOBOS_V`'LS (= ${gdc:Version}), ${misc:Depends} ++Replaces: libgphobos68-dbg`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (debug symbols) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl libdbg ++ ++Package: lib64gphobos`'PHOBOS_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Replaces: lib64gphobos68`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++ifenabled(`libdbg',` ++Package: lib64gphobos`'PHOBOS_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, lib64gphobos`'PHOBOS_V`'LS (= ${gdc:Version}), ${misc:Depends} ++Replaces: lib64gphobos68-dbg`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (debug symbols) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl libdbg ++ ++Package: lib32gphobos`'PHOBOS_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Replaces: lib32gphobos68`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++ifenabled(`libdbg',` ++Package: lib32gphobos`'PHOBOS_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, lib32gphobos`'PHOBOS_V`'LS (= ${gdc:Version}), ${misc:Depends} ++Replaces: lib32gphobos68-dbg`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (debug symbols) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl libdbg ++ ++ifenabled(`libn32phobos',` ++Package: libn32gphobos`'PHOBOS_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++ifenabled(`libdbg',` ++Package: libn32gphobos`'PHOBOS_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, libn32gphobos`'PHOBOS_V`'LS (= ${gdc:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: Phobos D standard library (debug symbols) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl libdbg ++')`'dnl libn32phobos ++ ++ifenabled(`libx32phobos',` ++Package: libx32gphobos`'PHOBOS_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Replaces: libx32gphobos68`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++ifenabled(`libdbg',` ++Package: libx32gphobos`'PHOBOS_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, libx32gphobos`'PHOBOS_V`'LS (= ${gdc:Version}), ${misc:Depends} ++Replaces: libx32gphobos68-dbg`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (debug symbols) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl libdbg ++')`'dnl libx32phobos ++ ++ifenabled(`armml',` ++Package: libhfgphobos`'PHOBOS_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Replaces: libhfgphobos68`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++ifenabled(`libdbg',` ++Package: libhfgphobos`'PHOBOS_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, libhfgphobos`'PHOBOS_V`'LS (= ${gdc:Version}), ${misc:Depends} ++Replaces: libhfgphobos68-dbg`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (debug symbols) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl libdbg ++ ++Package: libsfgphobos`'PHOBOS_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Replaces: libsfgphobos68`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (runtime library) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++ ++ifenabled(`libdbg',` ++Package: libsfgphobos`'PHOBOS_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, libsfgphobos`'PHOBOS_V`'LS (= ${gdc:Version}), ${misc:Depends} ++Replaces: libsfgphobos68-dbg`'LS ++BUILT_USING`'dnl ++Description: Phobos D standard library (debug symbols) ++ This is the Phobos standard library that comes with the D2 compiler. ++ . ++ For more information check http://www.dlang.org/phobos/ ++')`'dnl libdbg ++')`'dnl armml ++')`'dnl libphobos ++')`'dnl d ++ ++ifenabled(`m2 ',` ++Package: gm2`'PV`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: SOFTBASEDEP, g++`'PV`'TS (>= ${gcc:SoftVersion}), libidevdep(gm2`'PV-dev,,=), ${shlibs:Depends}, ${misc:Depends} ++ifdef(`TARGET',`',`Provides: gm2, m2-compiler ++')dnl ++BUILT_USING`'dnl ++Description: GNU Modula-2 compiler`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU Modula-2 compiler, which compiles Modula-2 on platforms ++ supported by gcc. It uses the gcc backend to generate optimised code. ++ ++ifenabled(`multigm2lib',` ++Package: gm2`'PV-multilib`'TS ++Architecture: any ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: SOFTBASEDEP, gm2`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libgm2biarchdev}${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 compiler (multilib support)`'ifdef(`TARGET',` (cross compiler for TARGET architecture)', `') ++ This is the GNU Modula-2 compiler, which compiles Modula-2 on platforms supported by gcc. ++ It uses the gcc backend to generate optimised code. ++ . ++ This is a dependency package, depending on development packages ++ for the non-default multilib architecture(s). ++')`'dnl multigm2lib ++ ++ifenabled(`libdevgm2',` ++Package: libgm2`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libgm2`'-GM2_V`'LS (>= ${gm2:Version}), ++ ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library ++ This is the Modula-2 standard library that comes with the gm2 compiler. ++ ++ifenabled(`multigm2lib',` ++Package: lib64gm2`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, lib64gm2`'-GM2_V`'LS (>= ${gm2:Version}), ++ libdevdep(gcc`'PV-dev,64), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (64bit development files) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++Package: lib32gm2`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, lib32gm2`'-GM2_V`'LS (>= ${gm2:Version}), ++ libdevdep(gcc`'PV-dev,32), ifdef(`TARGET',`',`lib32z1-dev,') ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (32bit development files) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++ifenabled(`libdevn32gm2',` ++Package: libn32gm2`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libn32gm2`'-GM2_V`'LS (>= ${gm2:Version}), ++ libdevdep(gcc`'PV-dev,n32), ifdef(`TARGET',`',`libn32z1-dev,') ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (n32 development files) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl libn32gm2 ++ ++ifenabled(`libdevx32gm2',` ++Package: libx32gm2`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libx32gm2`'-GM2_V`'LS (>= ${gm2:Version}), ++ libdevdep(gcc`'PV-dev,x32), ifdef(`TARGET',`',`${dep:libx32z},') ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (x32 development files) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl libx32gm2 ++ ++ifenabled(`armml',` ++Package: libhfgm2`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libhfgm2`'-GM2_V`'LS (>= ${gm2:Version}), ++ libdevdep(gcc`'PV-dev,hf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (hard float ABI development files) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++Package: libsfgm2`'PV-dev`'LS ++TARGET_PACKAGE`'dnl ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Section: libdevel ++Priority: optional ++Depends: BASELDEP, libsfgm2`'-GM2_V`'LS (>= ${gm2:Version}), ++ libdevdep(gcc`'PV-dev,sf), ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (soft float ABI development files) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl armml ++')`'dnl multigm2lib ++')`'dnl libdevgm2 ++ ++ifenabled(`libgm2',` ++Package: libgm2`'-GM2_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (runtime library) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++ifenabled(`libdbg',` ++Package: libgm2`'-GM2_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') ++ifdef(`MULTIARCH', `Multi-Arch: same ++')`'dnl ++Priority: optional ++Depends: BASELDEP, libgm2`'-GM2_V`'LS (= ${gm2:Version}), ${misc:Depends} ++Replaces: libgm268-dbg`'LS ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (debug symbols) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl libdbg ++ ++ifenabled(`multigm2lib',` ++Package: lib64gm2`'-GM2_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Replaces: lib64gm268`'LS ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (runtime library) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++ifenabled(`libdbg',` ++Package: lib64gm2`'-GM2_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') ++Priority: optional ++Depends: BASELDEP, lib64gm2`'-GM2_V`'LS (= ${gm2:Version}), ${misc:Depends} ++Replaces: lib64gm268-dbg`'LS ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (debug symbols) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl libdbg ++ ++Package: lib32gm2`'-GM2_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++Replaces: lib32gm268`'LS ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (runtime library) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++ifenabled(`libdbg',` ++Package: lib32gm2`'-GM2_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') ++Priority: optional ++Depends: BASELDEP, lib32gm2`'-GM2_V`'LS (= ${gm2:Version}), ${misc:Depends} ++Replaces: lib32gm268-dbg`'LS ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (debug symbols) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl libdbg ++ ++ifenabled(`libn32gm2',` ++Package: libn32gm2`'-GM2_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (runtime library) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++ifenabled(`libdbg',` ++Package: libn32gm2`'-GM2_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') ++Priority: optional ++Depends: BASELDEP, libn32gm2`'-GM2_V`'LS (= ${gm2:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (debug symbols) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl libdbg ++')`'dnl libn32gm2 ++ ++ifenabled(`libx32gm2',` ++Package: libx32gm2`'-GM2_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (runtime library) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++ifenabled(`libdbg',` ++Package: libx32gm2`'-GM2_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') ++Priority: optional ++Depends: BASELDEP, libx32gm2`'-GM2_V`'LS (= ${gm2:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (debug symbols) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl libdbg ++')`'dnl libx32gm2 ++ ++ifenabled(`armml',` ++Package: libhfgm2`'-GM2_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (runtime library) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++ifenabled(`libdbg',` ++Package: libhfgm2`'-GM2_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') ++Priority: optional ++Depends: BASELDEP, libhfgm2`'-GM2_V`'LS (= ${gm2:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (debug symbols) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl libdbg ++ ++Package: libsfgm2`'-GM2_V`'LS ++TARGET_PACKAGE`'dnl ++Section: ifdef(`TARGET',`devel',`libs') ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (runtime library) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++ ++ifenabled(`libdbg',` ++Package: libsfgm2`'-GM2_V-dbg`'LS ++TARGET_PACKAGE`'dnl ++Section: debug ++Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') ++Priority: optional ++Depends: BASELDEP, libsfgm2`'-GM2_V`'LS (= ${gm2:Version}), ${misc:Depends} ++BUILT_USING`'dnl ++Description: GNU Modula-2 standard library (debug symbols) ++ This is the GNU Modula-2 standard library that comes with the gm2 compiler. ++')`'dnl libdbg ++')`'dnl armml ++')`'dnl multigm2lib ++')`'dnl libgm2 ++ ++Package: gm2`'PV-doc ++Architecture: all ++Section: doc ++Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++Suggests: gm2`'PV ++Conflicts: gm2-12 (<< 12.2.0-8) ++Replaces: gm2-12 (<< 12.2.0-8) ++Description: Documentation for the GNU Modula-2 compiler (gm2) ++ Documentation for the GNU Modula-2 compiler in HTML and info `format'. ++')`'dnl m2 ++ ++ifdef(`TARGET',`',`dnl ++ifenabled(`libs',` ++#Package: gcc`'PV-soft-float ++#Architecture: arm armel armhf ++#Depends: BASEDEP, depifenabled(`cdev',`gcc`'PV (= ${gcc:Version}),') ${shlibs:Depends}, ${misc:Depends} ++#Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float ++#BUILT_USING`'dnl ++#Description: GCC soft-floating-point gcc libraries (ARM) ++# These are versions of basic static libraries such as libgcc.a compiled ++# with the -msoft-float option, for CPUs without a floating-point unit. ++')`'dnl commonlibs ++')`'dnl ++ ++ifenabled(`cdev',` ++ifdef(`TARGET', `', ` ++ifenabled(`gfdldoc',` ++Package: gcc`'PV-doc ++Architecture: all ++Section: doc ++Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} ++Conflicts: gcc-docs (<< 2.95.2) ++Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2) ++Description: Documentation for the GNU compilers (gcc, gobjc, g++) ++ Documentation for the GNU compilers in info `format'. ++')`'dnl gfdldoc ++')`'dnl native ++')`'dnl cdev ++ ++ifenabled(`olnvptx',` ++Package: gcc`'PV-offload-nvptx ++Architecture: nvptx_archs ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: BASEDEP, gcc`'PV (= ${gcc:Version}), ${dep:libcdev}, ++ nvptx-tools, libgomp-plugin-nvptx`'GOMP_SO (>= ${gcc:Version}), ++ ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC offloading compiler to NVPTX ++ The package provides offloading support for NVidia PTX. OpenMP and OpenACC ++ programs linked with -fopenmp will by default add PTX code into the binaries, ++ which can be offloaded to NVidia PTX capable devices if available. ++ ++ifenabled(`gompnvptx',` ++Package: libgomp-plugin-nvptx`'GOMP_SO ++Architecture: nvptx_archs ++Multi-Arch: same ++Section: libs ++Depends: BASEDEP, libgomp`'GOMP_SO`'LS, ${shlibs:Depends}, ${misc:Depends} ++Suggests: libcuda1 [amd64] | libnvidia-tesla-cuda1 [amd64 ppc64el] | libcuda1-any ++BUILT_USING`'dnl ++Description: GCC OpenMP v4.5 plugin for offloading to NVPTX ++ This package contains libgomp plugin for offloading to NVidia ++ PTX. The plugin needs libcuda.so.1 shared library that has to be ++ installed separately. ++')`'dnl gompnvptx ++')`'dnl olnvptx ++ ++ifenabled(`olgcn',` ++Package: gcc`'PV-offload-amdgcn ++Architecture: gcn_archs ++ifdef(`TARGET',`Multi-Arch: foreign ++')dnl ++Priority: optional ++Depends: BASEDEP, gcc`'PV (= ${gcc:Version}), ${dep:libcdev}, ++ libgomp-plugin-amdgcn`'GOMP_SO (>= ${gcc:Version}), ++ LLVM_DEP ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC offloading compiler to GCN ++ The package provides offloading support for AMD GCN. OpenMP and OpenACC ++ programs linked with -fopenmp will by default add GCN code into the binaries, ++ which can be offloaded to AMD GCN capable devices if available. ++ ++ifenabled(`gompgcn',` ++Package: libgomp-plugin-amdgcn`'GOMP_SO ++Architecture: gcn_archs ++Multi-Arch: same ++Section: libs ++Depends: BASEDEP, libgomp`'GOMP_SO`'LS, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP v4.5 plugin for offloading to GCN ++ This package contains libgomp plugin for offloading to AMD GCN. ++')`'dnl gompgcn ++')`'dnl olgcn ++ ++ifenabled(`olhsa',` ++ifenabled(`gomphsa',` ++Package: libgomp-plugin-hsa`'GOMP_SO ++Architecture: amd64 ++Multi-Arch: same ++Section: libs ++Depends: BASEDEP, libgomp`'GOMP_SO`'LS, ${shlibs:Depends}, ${misc:Depends} ++BUILT_USING`'dnl ++Description: GCC OpenMP v4.5 plugin for offloading to HSA ++ This package contains libgomp plugin for offloading to HSA. ++')`'dnl gomphsa ++')`'dnl olhsa ++ ++ifdef(`TARGET',`',`dnl ++ifenabled(`libnof',` ++#Package: gcc`'PV-nof ++#Architecture: powerpc ++#Depends: BASEDEP, ${shlibs:Depends}ifenabled(`cdev',`, gcc`'PV (= ${gcc:Version})'), ${misc:Depends} ++#Conflicts: gcc-3.2-nof ++#BUILT_USING`'dnl ++#Description: GCC no-floating-point gcc libraries (powerpc) ++# These are versions of basic static libraries such as libgcc.a compiled ++# with the -msoft-float option, for CPUs without a floating-point unit. ++')`'dnl libnof ++')`'dnl ++ ++ifenabled(`source',` ++Package: gcc`'PV-source ++Multi-Arch: foreign ++Architecture: all ++Depends: make, quilt, patchutils, sharutils, gawk, lsb-release, time, AUTO_BUILD_DEP ++ ${misc:Depends} ++Description: Source of the GNU Compiler Collection ++ This package contains the sources and patches which are needed to ++ build the GNU Compiler Collection (GCC). ++')`'dnl source ++dnl ++')')`'dnl regexp SRCNAME ++dnl last line in file diff --cc debian/copyright index 0000000,0000000..00c1360 new file mode 100644 --- /dev/null +++ b/debian/copyright @@@ -1,0 -1,0 +1,1532 @@@ ++This is the Debian GNU/Linux prepackaged version of the GNU compiler ++collection, containing Ada, C, C++, D, Fortran 95, Go, Objective-C, ++Objective-C++, and Modula-2 compilers, documentation, and support ++libraries. In addition, Debian provides the gm2 compiler, either in ++the same source package, or built from a separate same source package. ++Packaging is done by the Debian GCC Maintainers ++, with sources obtained from: ++ ++ ftp://gcc.gnu.org/pub/gcc/releases/ (for full releases) ++ svn://gcc.gnu.org/svn/gcc/ (for prereleases) ++ ftp://sourceware.org/pub/newlib/ (for newlib) ++ git://git.savannah.gnu.org/gm2.git (for Modula-2) ++ ++The current gcc-12 source package is taken from the git gcc-12-branch. ++ ++Changes: See changelog.Debian.gz ++ ++Debian splits the GNU Compiler Collection into packages for each language, ++library, and documentation as follows: ++ ++Language Compiler package Library package Documentation ++--------------------------------------------------------------------------- ++Ada gnat-12 libgnat-12 gnat-12-doc ++C gcc-12 gcc-12-doc ++C++ g++-12 libstdc++6 libstdc++6-12-doc ++D gdc-12 ++Fortran 95 gfortran-12 libgfortran5 gfortran-12-doc ++Go gccgo-12 libgo0 ++Objective C gobjc-12 libobjc4 ++Objective C++ gobjc++-12 ++Modula-2 gm2-12 libgm2 ++ ++For some language run-time libraries, Debian provides source files, ++development files, debugging symbols and libraries containing position- ++independent code in separate packages: ++ ++Language Sources Development Debugging Position-Independent ++------------------------------------------------------------------------------ ++C++ libstdc++6-12-dbg libstdc++6-12-pic ++D libphobos-12-dev ++ ++Additional packages include: ++ ++All languages: ++libgcc1, libgcc2, libgcc4 GCC intrinsics (platform-dependent) ++gcc-12-base Base files common to all compilers ++gcc-12-soft-float Software floating point (ARM only) ++gcc-12-source The sources with patches ++ ++Ada: ++libgnat-util12-dev, libgnat-util12 GNAT version library ++ ++C: ++cpp-12, cpp-12-doc GNU C Preprocessor ++libssp0-dev, libssp0 GCC stack smashing protection library ++libquadmath0 Math routines for the __float128 type ++fixincludes Fix non-ANSI header files ++ ++C, C++ and Fortran 95: ++libgomp1-dev, libgomp1 GCC OpenMP (GOMP) support library ++libitm1-dev, libitm1 GNU Transactional Memory Library ++ ++Biarch support: On some 64-bit platforms which can also run 32-bit code, ++Debian provides additional packages containing 32-bit versions of some ++libraries. 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IN NO EVENT SHALL THE ++CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE ++SOFTWARE. ++ ++Permission is hereby granted, free of charge, to any person obtaining a copy ++of this software and associated documentation files (the "Software"), to deal ++in the Software without restriction, including without limitation the rights ++to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++copies of the Software, and to permit persons to whom the Software is ++furnished to do so, subject to the following conditions: ++ ++The above copyright notice and this permission notice shall be included in ++all copies or substantial portions of the Software. ++ ++THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ++AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN ++THE SOFTWARE. ++ ++ ++The libffi library is licensed under the following terms: ++ ++ libffi - Copyright (c) 1996-2003 Red Hat, Inc. ++ ++ Permission is hereby granted, free of charge, to any person obtaining ++ a copy of this software and associated documentation files (the ++ ``Software''), to deal in the Software without restriction, including ++ without limitation the rights to use, copy, modify, merge, publish, ++ distribute, sublicense, and/or sell copies of the Software, and to ++ permit persons to whom the Software is furnished to do so, subject to ++ the following conditions: ++ ++ The above copyright notice and this permission notice shall be included ++ in all copies or substantial portions of the Software. ++ ++ THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS ++ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ++ IN NO EVENT SHALL CYGNUS SOLUTIONS BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ OTHER DEALINGS IN THE SOFTWARE. ++ ++ ++The documentation is licensed under the GNU Free Documentation License (v1.2). ++On Debian GNU/Linux systems, the complete text of this license is in ++`/usr/share/common-licenses/GFDL-1.2'. ++ ++ ++GCC RUNTIME LIBRARY EXCEPTION ++ ++Version 3.1, 31 March 2009 ++ ++Copyright (C) 2009 Free Software Foundation, Inc. ++ ++Everyone is permitted to copy and distribute verbatim copies of this ++license document, but changing it is not allowed. ++ ++This GCC Runtime Library Exception ("Exception") is an additional ++permission under section 7 of the GNU General Public License, version ++3 ("GPLv3"). It applies to a given file (the "Runtime Library") that ++bears a notice placed by the copyright holder of the file stating that ++the file is governed by GPLv3 along with this Exception. ++ ++When you use GCC to compile a program, GCC may combine portions of ++certain GCC header files and runtime libraries with the compiled ++program. The purpose of this Exception is to allow compilation of ++non-GPL (including proprietary) programs to use, in this way, the ++header files and runtime libraries covered by this Exception. ++ ++0. Definitions. ++ ++A file is an "Independent Module" if it either requires the Runtime ++Library for execution after a Compilation Process, or makes use of an ++interface provided by the Runtime Library, but is not otherwise based ++on the Runtime Library. ++ ++"GCC" means a version of the GNU Compiler Collection, with or without ++modifications, governed by version 3 (or a specified later version) of ++the GNU General Public License (GPL) with the option of using any ++subsequent versions published by the FSF. ++ ++"GPL-compatible Software" is software whose conditions of propagation, ++modification and use would permit combination with GCC in accord with ++the license of GCC. ++ ++"Target Code" refers to output from any compiler for a real or virtual ++target processor architecture, in executable form or suitable for ++input to an assembler, loader, linker and/or execution ++phase. Notwithstanding that, Target Code does not include data in any ++format that is used as a compiler intermediate representation, or used ++for producing a compiler intermediate representation. ++ ++The "Compilation Process" transforms code entirely represented in ++non-intermediate languages designed for human-written code, and/or in ++Java Virtual Machine byte code, into Target Code. Thus, for example, ++use of source code generators and preprocessors need not be considered ++part of the Compilation Process, since the Compilation Process can be ++understood as starting with the output of the generators or ++preprocessors. ++ ++A Compilation Process is "Eligible" if it is done using GCC, alone or ++with other GPL-compatible software, or if it is done without using any ++work based on GCC. For example, using non-GPL-compatible Software to ++optimize any GCC intermediate representations would not qualify as an ++Eligible Compilation Process. ++ ++1. Grant of Additional Permission. ++ ++You have permission to propagate a work of Target Code formed by ++combining the Runtime Library with Independent Modules, even if such ++propagation would otherwise violate the terms of GPLv3, provided that ++all Target Code was generated by Eligible Compilation Processes. You ++may then convey such a combination under terms of your choice, ++consistent with the licensing of the Independent Modules. ++ ++2. No Weakening of GCC Copyleft. ++ ++The availability of this Exception does not imply any general ++presumption that third-party software is unaffected by the copyleft ++requirements of the license of GCC. ++ ++ ++libquadmath/ ++ Copyright (C) 1992-2018 Free Software Foundation, Inc. ++ ++ Written by Francois-Xavier Coudert ++ Written by Tobias Burnus ++ Contributions by Ulrich Drepper ++ Conversion to long double by Jakub Jelinek ++ ++ This file is part of the libquadmath library. ++ Libquadmath is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Library General Public ++ License as published by the Free Software Foundation; either ++ version 2 of the License, or (at your option) any later version. ++ ++ Libiberty is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Library General Public License for more details. ++ ++libquadmath/math: ++ ++atanq.c, expm1q.c, j0q.c, j1q.c, log1pq.c, logq.c: ++ Copyright 2001 by Stephen L. Moshier ++ ++ This library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ This library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c: ++ Changes for 128-bit __float128 are ++ Copyright (C) 2001 Stephen L. Moshier ++ and are incorporated herein by permission of the author. The author ++ reserves the right to distribute this material elsewhere under different ++ copying permissions. These modifications are distributed here under ++ the following terms: ++ ++ This library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ This library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++libquadmath/math/ ++ ++cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c, ++sinq_kernel.c, truncq.c: ++ Copyright (C) 1997, 1999 Free Software Foundation, Inc. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++libquadmath/math/isinfq.c: ++ Written by J.T. Conklin . ++ Change for long double by Jakub Jelinek ++ Public domain. ++ ++libquadmath/math/ ++ llroundq.c, lroundq.c, tgammaq.c: ++ ++ Copyright (C) 1997, 1999, 2002, 2004 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ Contributed by Ulrich Drepper , 1997 and ++ Jakub Jelinek , 1999. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++libquadmath/math/log10q.c: ++ Cephes Math Library Release 2.2: January, 1991 ++ Copyright 1984, 1991 by Stephen L. Moshier ++ Adapted for glibc November, 2001 ++ ++ This library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ This library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++libquadmath/math/ ++ acoshq.c, acosq.c, asinhq.c, asinq.c, atan2q.c, atanhq.c, ceilq.c, ++ copysignq.c, coshq.c, cosq.c, erfq.c, fabsq.c, finiteq.c, floorq.c, ++ fmodq.c, frexpq.c, hypotq.c, ilogbq.c, isnanq.c, jnq.c, ldexpq.c, ++ logbq.c, modfq.c, nearbyintq.c, nextafterq.c, powq.c, remainderq.c, ++ rem_pio2q.c, rintq.c, scalblnq.c, scalbnq.c, sinhq.c, sinq.c, ++ tanhq.c, tanq.c, tanq_kernel.c: ++ ++ Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. ++ . ++ Developed at SunPro, a Sun Microsystems, Inc. business. ++ Permission to use, copy, modify, and distribute this ++ software is freely granted, provided that this notice ++ is preserved. ++ ++libquadmath/math/ ++ acosq.c, asinq.c, coshq.c, erfq.c, jnq.c, powq.c, sinhq.c, tanq_kernel.c: ++ ++ In addition to the Sun Microsystems copyright: ++ ++ Long double expansions are ++ Copyright (C) 2001 Stephen L. Moshier ++ and are incorporated herein by permission of the author. The author ++ reserves the right to distribute this material elsewhere under different ++ copying permissions. These modifications are distributed here under ++ the LGPL 2.1 or later. ++ ++ ++gcc/go/gofrontend, libgo: ++ ++Copyright (c) 2009 The Go Authors. All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions are ++met: ++ ++ * Redistributions of source code must retain the above copyright ++notice, this list of conditions and the following disclaimer. ++ * Redistributions in binary form must reproduce the above ++copyright notice, this list of conditions and the following disclaimer ++in the documentation and/or other materials provided with the ++distribution. ++ * Neither the name of Google Inc. nor the names of its ++contributors may be used to endorse or promote products derived from ++this software without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ ++ ++D: ++gdc-12 GNU D Compiler ++libphobos-12-dev D standard runtime library ++ ++The D source package is made up of the following components. ++ ++The D front-end for GCC: ++ - d/* ++ ++Copyright (C) 2004-2007 David Friedman ++Modified by Vincenzo Ampolo, Michael Parrot, Iain Buclaw, (C) 2009, 2010 ++ ++This program is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 2 of the License, or ++(at your option) any later version. ++ ++On Debian GNU/Linux systems, the complete text of the GNU General ++Public License is in `/usr/share/common-licenses/GPL', version 2 of this ++license in `/usr/share/common-licenses/GPL-2'. ++ ++ ++The DMD Compiler implementation of the D programming language: ++ - d/dmd/* ++ ++Copyright (c) 1999-2010 by Digital Mars ++All Rights Reserved ++written by Walter Bright ++http://www.digitalmars.com ++License for redistribution is by either the Artistic License or ++the GNU General Public License (v1). ++ ++On Debian GNU/Linux systems, the complete text of the GNU General ++Public License is in `/usr/share/common-licenses/GPL', the Artistic ++license in `/usr/share/common-licenses/Artistic'. ++ ++ ++The Zlib data compression library: ++ - d/phobos/etc/c/zlib/* ++ ++ (C) 1995-2004 Jean-loup Gailly and Mark Adler ++ ++ This software is provided 'as-is', without any express or implied ++ warranty. In no event will the authors be held liable for any damages ++ arising from the use of this software. ++ ++ Permission is granted to anyone to use this software for any purpose, ++ including commercial applications, and to alter it and redistribute it ++ freely, subject to the following restrictions: ++ ++ 1. The origin of this software must not be misrepresented; you must not ++ claim that you wrote the original software. If you use this software ++ in a product, an acknowledgment in the product documentation would be ++ appreciated but is not required. ++ 2. Altered source versions must be plainly marked as such, and must not be ++ misrepresented as being the original software. ++ 3. This notice may not be removed or altered from any source distribution. ++ ++ ++The Phobos standard runtime library: ++ - d/phobos/* ++ ++Unless otherwise marked within the file, each file in the source ++is under the following licenses: ++ ++Copyright (C) 2004-2005 by Digital Mars, www.digitalmars.com ++Written by Walter Bright ++ ++This software is provided 'as-is', without any express or implied ++warranty. In no event will the authors be held liable for any damages ++arising from the use of this software. ++ ++Permission is granted to anyone to use this software for any purpose, ++including commercial applications, and to alter it and redistribute it ++freely, in both source and binary form, subject to the following ++restrictions: ++ ++ o The origin of this software must not be misrepresented; you must not ++ claim that you wrote the original software. If you use this software ++ in a product, an acknowledgment in the product documentation would be ++ appreciated but is not required. ++ o Altered source versions must be plainly marked as such, and must not ++ be misrepresented as being the original software. ++ o This notice may not be removed or altered from any source ++ distribution. ++ ++By plainly marking modifications, something along the lines of adding to each ++file that has been changed a "Modified by Foo Bar" line ++underneath the "Written by" line would be adequate. ++ ++gcc/m2: ++gcc/m2/gm2-libiberty: ++gcc/m2/mc-boot/: ++gcc/m2/mc-boot-ch/: ++Copyright (C) 2001-2019 Free Software Foundation, Inc. ++Contributed by Gaius Mulley . ++ ++This file is part of GNU Modula-2. ++ ++GNU Modula-2 is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 3, or (at your option) ++any later version. ++ ++GNU Modula-2 is distributed in the hope that it will be useful, but ++WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++General Public License for more details. ++ ++gcc/m2/**/*.texi: ++Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, ++2011, 2012, 2012, 2013 Free Software Foundation, Inc. ++ ++Permission is granted to copy, distribute and/or modify this document ++under the terms of the GNU Free Documentation License, Version 1.3 or ++any later version published by the Free Software Foundation; with no ++Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. ++ ++gcc/m2/gm2-coroutines: ++gcc/m2/gm2-libs: ++gcc/m2/gm2-libs-min: ++gcc/m2/gm2-libs-pim: ++gcc/m2/gm2-libs-ch: ++Copyright (C) 2002-2019 Free Software Foundation, Inc. ++ ++This library is free software; you can redistribute it and/or ++modify it under the terms of the GNU Lesser General Public ++License as published by the Free Software Foundation; either ++version 2.1 of the License, or (at your option) any later version. ++ ++This library is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++Lesser General Public License for more details. ++ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++gcc/m2/gm2-libs-iso/: ++This has a mix of licenses, most as GPL-3+ plus GCC Runtime Library ++Exception, version 3.1. ++ ++gcc/m2/gm2-libs-iso/*.def: ++Library module defined by the International Standard ++Information technology - programming languages ++BS ISO/IEC 10514-1:1996E Part 1: Modula-2, Base Language. ++ ++Copyright ISO/IEC (International Organization for Standardization ++and International Electrotechnical Commission) 1996, 1997, 1998, ++1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 ++ ++Copyright (C) 2001-2019 Free Software Foundation, Inc. ++mix of GPL-3.0 and LGPL-2.1/3 ++ ++Copyright (C) 2001-2019 Free Software Foundation, Inc. ++mix of GPL-3.0 and LGPL-2.1/3 ++ ++gcc/m2/examples: ++Copyright (C) 2005-2015 Free Software Foundation, Inc. ++Mix of LGPL-2.1 and GPL-3.0. ++ ++gcc/m2/images: ++GPL-3+ ++ ++gcc/m2/el/gm2-mode.el: ++;; Everyone is granted permission to copy, modify and redistribute ++;; GNU Emacs, but only under the conditions described in the ++;; GNU Emacs General Public License. A copy of this license is ++;; supposed to have been given to you along with GNU Emacs so you ++;; can know your rights and responsibilities. It should be in a ++;; file named COPYING. Among other things, the copyright notice ++;; and this notice must be preserved on all copies. ++ ++Copyright (C) 2001-2018 Free Software Foundation, Inc. ++Contributed by Gaius Mulley . ++Mix of GPL-3 and LGPL-2.1. ++ ++gcc/testsuite/gm2/: ++Copyright (C) 2001-2019 Free Software Foundation, Inc. ++Mix of GPL-2+ and GPL-3+ ++ ++libgm2: ++ ++libgm2/libiso/: ++libgm2/libpim/: ++libgm2/liblog/: ++libgm2/libcor/: ++libgm2/libmin/: ++Copyright (C) 2002-2019 Free Software Foundation, Inc. ++ ++This library is free software; you can redistribute it and/or ++modify it under the terms of the GNU Lesser General Public ++License as published by the Free Software Foundation; either ++version 2.1 of the License, or (at your option) any later version. ++ ++This library is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++Lesser General Public License for more details. ++ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++newlib-X.Y.Z/: ++ ++Upstream Authors: ++newlib@sources.redhat.com ++Jeff Johnston ++Tom Fitzsimmons ++ ++The newlib subdirectory is a collection of software from several sources. ++Each file may have its own copyright/license that is embedded in the source ++file. ++ ++This list documents those licenses which are more restrictive than ++a BSD-like license or require the copyright notice ++to be duplicated in documentation and/or other materials associated with ++the distribution. Certain licenses documented here only apply to ++specific targets. Certain clauses only apply if you are building the ++code as part of your binary. ++ ++Note that this list may omit certain licenses that ++only pertain to the copying/modifying of the individual source code. ++If you are distributing the source code, then you do not need to ++worry about these omitted licenses, so long as you do not modify the ++copyright information already in place. ++ ++Parts of this work are licensed under the terms of the GNU General ++Public License. On Debian systems, the complete text of this license ++can be found in /usr/share/common-licenses/GPL. ++ ++Parts of this work are licensed under the terms of the GNU Library ++General Public License. On Debian systems, the complete text of this ++license be found in /usr/share/common-licenses/LGPL. ++ ++(1) University of California, Berkeley ++ ++[1a] ++ ++Copyright (c) 1990 The Regents of the University of California. ++All rights reserved. ++ ++Redistribution and use in source and binary forms are permitted ++provided that the above copyright notice and this paragraph are ++duplicated in all such forms and that any documentation, ++and other materials related to such distribution and use ++acknowledge that the software was developed ++by the University of California, Berkeley. The name of the ++University may not be used to endorse or promote products derived ++from this software without specific prior written permission. ++THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ ++[1b] ++ ++Copyright (c) 1990 The Regents of the University of California. ++All rights reserved. ++ ++Redistribution and use in source and binary forms are permitted ++provided that the above copyright notice and this paragraph are ++duplicated in all such forms and that any documentation, ++advertising materials, and other materials related to such ++distribution and use acknowledge that the software was developed ++by the University of California, Berkeley. The name of the ++University may not be used to endorse or promote products derived ++from this software without specific prior written permission. ++THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ ++[1c] ++ ++Copyright (c) 1981, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 ++The Regents of the University of California. ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. All advertising materials mentioning features or use of this software ++ must display the following acknowledgement: ++ This product includes software developed by the University of ++ California, Berkeley and its contributors. ++4. Neither the name of the University nor the names of its contributors ++ may be used to endorse or promote products derived from this software ++ without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++[1d] ++ ++Copyright (c) 1988, 1990, 1993 Regents of the University of California. ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. Neither the name of the University nor the names of its contributors ++ may be used to endorse or promote products derived from this software ++ without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++[1e] ++ ++Copyright (c) 1982, 1986, 1989, 1991, 1993, 1994 ++The Regents of the University of California. All rights reserved. ++(c) UNIX System Laboratories, Inc. ++All or some portions of this file are derived from material licensed ++to the University of California by American Telephone and Telegraph ++Co. or Unix System Laboratories, Inc. and are reproduced herein with ++the permission of UNIX System Laboratories, Inc. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. All advertising materials mentioning features or use of this software ++ must display the following acknowledgement: ++ This product includes software developed by the University of ++ California, Berkeley and its contributors. ++4. Neither the name of the University nor the names of its contributors ++ may be used to endorse or promote products derived from this software ++ without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++[1f] ++ ++Copyright (c) 1987, 1988, 2000 Regents of the University of California. ++All rights reserved. ++ ++Redistribution and use in source and binary forms are permitted ++provided that: (1) source distributions retain this entire copyright ++notice and comment, and (2) distributions including binaries display ++the following acknowledgement: ``This product includes software ++developed by the University of California, Berkeley and its contributors'' ++in the documentation or other materials provided with the distribution ++and in all advertising materials mentioning features or use of this ++software. Neither the name of the University nor the names of its ++contributors may be used to endorse or promote products derived ++from this software without specific prior written permission. ++THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ ++------------------------------------------------------------- ++ Please note that in some of the above alternate licenses, there is a ++ statement regarding that acknowledgement must be made in any ++ advertising materials for products using the code. This restriction ++ no longer applies due to the following license change: ++ ++ ftp://ftp.cs.berkeley.edu/pub/4bsd/README.Impt.License.Change ++ ++ In some cases the defunct clause has been removed in modified newlib code and ++ in some cases, the clause has been left as-is. ++------------------------------------------------------------- ++ ++(2) Cygwin (cygwin targets only) ++ ++Copyright 2001 Red Hat, Inc. ++ ++This software is a copyrighted work licensed under the terms of the ++Cygwin license. Please consult the file "CYGWIN_LICENSE" for ++details. ++ ++(3) David M. Gay at AT&T ++ ++The author of this software is David M. Gay. ++ ++Copyright (c) 1991 by AT&T. ++ ++Permission to use, copy, modify, and distribute this software for any ++purpose without fee is hereby granted, provided that this entire notice ++is included in all copies of any software which is or includes a copy ++or modification of this software and in all copies of the supporting ++documentation for such software. ++ ++THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED ++WARRANTY. IN PARTICULAR, NEITHER THE AUTHOR NOR AT&T MAKES ANY ++REPRESENTATION OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY ++OF THIS SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE. ++ ++(4) Advanced Micro Devices ++ ++Copyright 1989, 1990 Advanced Micro Devices, Inc. ++ ++This software is the property of Advanced Micro Devices, Inc (AMD) which ++specifically grants the user the right to modify, use and distribute this ++software provided this notice is not removed or altered. All other rights ++are reserved by AMD. ++ ++AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS ++SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL ++DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR ++USE OF THIS SOFTWARE. ++ ++So that all may benefit from your experience, please report any problems ++or suggestions about this software to the 29K Technical Support Center at ++800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or ++0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118. ++ ++Advanced Micro Devices, Inc. ++29K Support Products ++Mail Stop 573 ++5900 E. Ben White Blvd. ++Austin, TX 78741 ++800-292-9263 ++ ++(5) C.W. Sandmann ++ ++Copyright (C) 1993 C.W. Sandmann ++ ++This file may be freely distributed as long as the author's name remains. ++ ++(6) Eric Backus ++ ++(C) Copyright 1992 Eric Backus ++ ++This software may be used freely so long as this copyright notice is ++left intact. There is no warrantee on this software. ++ ++(7) Sun Microsystems ++ ++Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. ++ ++Developed at SunPro, a Sun Microsystems, Inc. business. ++Permission to use, copy, modify, and distribute this ++software is freely granted, provided that this notice ++is preserved. ++ ++(8) Hewlett Packard ++ ++(c) Copyright 1986 HEWLETT-PACKARD COMPANY ++ ++To anyone who acknowledges that this file is provided "AS IS" ++without any express or implied warranty: ++ permission to use, copy, modify, and distribute this file ++for any purpose is hereby granted without fee, provided that ++the above copyright notice and this notice appears in all ++copies, and that the name of Hewlett-Packard Company not be ++used in advertising or publicity pertaining to distribution ++of the software without specific, written prior permission. ++Hewlett-Packard Company makes no representations about the ++suitability of this software for any purpose. ++ ++(9) Hans-Peter Nilsson ++ ++Copyright (C) 2001 Hans-Peter Nilsson ++ ++Permission to use, copy, modify, and distribute this software is ++freely granted, provided that the above copyright notice, this notice ++and the following disclaimer are preserved with no changes. ++ ++THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++PURPOSE. ++ ++(10) Stephane Carrez (m68hc11-elf/m68hc12-elf targets only) ++ ++Copyright (C) 1999, 2000, 2001, 2002 Stephane Carrez (stcarrez@nerim.fr) ++ ++The authors hereby grant permission to use, copy, modify, distribute, ++and license this software and its documentation for any purpose, provided ++that existing copyright notices are retained in all copies and that this ++notice is included verbatim in any distributions. No written agreement, ++license, or royalty fee is required for any of the authorized uses. ++Modifications to this software may be copyrighted by their authors ++and need not follow the licensing terms described here, provided that ++the new terms are clearly indicated on the first page of each file where ++they apply. ++ ++(11) Christopher G. Demetriou ++ ++Copyright (c) 2001 Christopher G. Demetriou ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. The name of the author may not be used to endorse or promote products ++ derived from this software without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ++IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ++OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ++IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ++INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT ++NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF ++THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ ++(12) SuperH, Inc. ++ ++Copyright 2002 SuperH, Inc. All rights reserved ++ ++This software is the property of SuperH, Inc (SuperH) which specifically ++grants the user the right to modify, use and distribute this software ++provided this notice is not removed or altered. All other rights are ++reserved by SuperH. ++ ++SUPERH MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO ++THIS SOFTWARE. IN NO EVENT SHALL SUPERH BE LIABLE FOR INDIRECT, SPECIAL, ++INCIDENTAL OR CONSEQUENTIAL DAMAGES IN CONNECTION WITH OR ARISING FROM ++THE FURNISHING, PERFORMANCE, OR USE OF THIS SOFTWARE. ++ ++So that all may benefit from your experience, please report any problems ++or suggestions about this software to the SuperH Support Center via ++e-mail at softwaresupport@superh.com . ++ ++SuperH, Inc. ++405 River Oaks Parkway ++San Jose ++CA 95134 ++USA ++ ++(13) Royal Institute of Technology ++ ++Copyright (c) 1999 Kungliga Tekniska Hgskolan ++(Royal Institute of Technology, Stockholm, Sweden). ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++ ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++ ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++3. Neither the name of KTH nor the names of its contributors may be ++ used to endorse or promote products derived from this software without ++ specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY KTH AND ITS CONTRIBUTORS ``AS IS'' AND ANY ++EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL KTH OR ITS CONTRIBUTORS BE ++LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ++BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, ++WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR ++OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ++ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ ++(14) Alexey Zelkin ++ ++Copyright (c) 2000, 2001 Alexey Zelkin ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(15) Andrey A. Chernov ++ ++Copyright (C) 1997 by Andrey A. Chernov, Moscow, Russia. ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(16) FreeBSD ++ ++Copyright (c) 1997-2002 FreeBSD Project. ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(17) S. L. Moshier ++ ++Author: S. L. Moshier. ++ ++Copyright (c) 1984,2000 S.L. Moshier ++ ++Permission to use, copy, modify, and distribute this software for any ++purpose without fee is hereby granted, provided that this entire notice ++is included in all copies of any software which is or includes a copy ++or modification of this software and in all copies of the supporting ++documentation for such software. ++ ++THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED ++WARRANTY. IN PARTICULAR, THE AUTHOR MAKES NO REPRESENTATION ++OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY OF THIS ++SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE. ++ ++(18) Citrus Project ++ ++Copyright (c)1999 Citrus Project, ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(19) Todd C. Miller ++ ++Copyright (c) 1998 Todd C. Miller ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. The name of the author may not be used to endorse or promote products ++ derived from this software without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, ++INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY ++AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ++THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; ++OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, ++WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR ++OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ++ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ ++(20) DJ Delorie (i386) ++ ++Copyright (C) 1991 DJ Delorie ++All rights reserved. ++ ++Redistribution and use in source and binary forms is permitted ++provided that the above copyright notice and following paragraph are ++duplicated in all such forms. ++ ++This file is distributed WITHOUT ANY WARRANTY; without even the implied ++warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ++ ++(21) Free Software Foundation LGPL License (*-linux* targets only) ++ ++ Copyright (C) 1990-1999, 2000, 2001 ++ Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ Contributed by Mark Kettenis , 1997. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, write to the Free ++ Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA ++ 02110-1301 USA ++ ++(22) Xavier Leroy LGPL License (i[3456]86-*-linux* targets only) ++ ++Copyright (C) 1996 Xavier Leroy (Xavier.Leroy@inria.fr) ++ ++This program is free software; you can redistribute it and/or ++modify it under the terms of the GNU Library General Public License ++as published by the Free Software Foundation; either version 2 ++of the License, or (at your option) any later version. ++ ++This program is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU Library General Public License for more details. ++ ++(23) Intel (i960) ++ ++Copyright (c) 1993 Intel Corporation ++ ++Intel hereby grants you permission to copy, modify, and distribute this ++software and its documentation. Intel grants this permission provided ++that the above copyright notice appears in all copies and that both the ++copyright notice and this permission notice appear in supporting ++documentation. In addition, Intel grants this permission provided that ++you prominently mark as "not part of the original" any modifications ++made to this software or documentation, and that the name of Intel ++Corporation not be used in advertising or publicity pertaining to ++distribution of the software or the documentation without specific, ++written prior permission. ++ ++Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR ++IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY ++OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or ++representations regarding the use of, or the results of the use of, ++the software and documentation in terms of correctness, accuracy, ++reliability, currentness, or otherwise; and you rely on the software, ++documentation and results solely at your own risk. ++ ++IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, ++LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES ++OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM ++PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. ++ ++(24) Hewlett-Packard (hppa targets only) ++ ++(c) Copyright 1986 HEWLETT-PACKARD COMPANY ++ ++To anyone who acknowledges that this file is provided "AS IS" ++without any express or implied warranty: ++ permission to use, copy, modify, and distribute this file ++for any purpose is hereby granted without fee, provided that ++the above copyright notice and this notice appears in all ++copies, and that the name of Hewlett-Packard Company not be ++used in advertising or publicity pertaining to distribution ++of the software without specific, written prior permission. ++Hewlett-Packard Company makes no representations about the ++suitability of this software for any purpose. ++ ++(25) Henry Spencer (only *-linux targets) ++ ++Copyright 1992, 1993, 1994 Henry Spencer. All rights reserved. ++This software is not subject to any license of the American Telephone ++and Telegraph Company or of the Regents of the University of California. ++ ++Permission is granted to anyone to use this software for any purpose on ++any computer system, and to alter it and redistribute it, subject ++to the following restrictions: ++ ++1. The author is not responsible for the consequences of use of this ++ software, no matter how awful, even if they arise from flaws in it. ++ ++2. The origin of this software must not be misrepresented, either by ++ explicit claim or by omission. Since few users ever read sources, ++ credits must appear in the documentation. ++ ++3. Altered versions must be plainly marked as such, and must not be ++ misrepresented as being the original software. Since few users ++ ever read sources, credits must appear in the documentation. ++ ++4. This notice may not be removed or altered. ++ ++(26) Mike Barcroft ++ ++Copyright (c) 2001 Mike Barcroft ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(27) Konstantin Chuguev (--enable-newlib-iconv) ++ ++Copyright (c) 1999, 2000 ++ Konstantin Chuguev. All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++ iconv (Charset Conversion Library) v2.0 ++ ++(27) Artem Bityuckiy (--enable-newlib-iconv) ++ ++Copyright (c) 2003, Artem B. Bityuckiy, SoftMine Corporation. ++Rights transferred to Franklin Electronic Publishers. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(28) Red Hat Incorporated ++ ++Unless otherwise stated in each remaining newlib file, the remaining ++files in the newlib subdirectory default to the following copyright. ++It should be noted that Red Hat Incorporated now owns copyrights ++belonging to Cygnus Solutions and Cygnus Support. ++ ++Copyright (c) 1994, 1997, 2001, 2002, 2003, 2004 Red Hat Incorporated. ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions are met: ++ ++ Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++ ++ Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++ The name of Red Hat Incorporated may not be used to endorse ++ or promote products derived from this software without specific ++ prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++DISCLAIMED. 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See the GNU ++# Lesser General Public License for more details. ++# ++# You should have received a copy of the GNU Lesser General Public ++# License along with the GNU C Library; if not, see ++# . diff --cc debian/copyright.in index 0000000,0000000..6786818 new file mode 100644 --- /dev/null +++ b/debian/copyright.in @@@ -1,0 -1,0 +1,1532 @@@ ++This is the Debian GNU/Linux prepackaged version of the GNU compiler ++collection, containing Ada, C, C++, D, Fortran 95, Go, Objective-C, ++Objective-C++, and Modula-2 compilers, documentation, and support ++libraries. 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IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, ++INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, ++STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING ++IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++POSSIBILITY OF SUCH DAMAGE. ++ ++ ++The libsanitizer libraries (libasan, liblsan, libtsan, libubsan) are ++licensed under the following terms: ++ ++Copyright (c) 2009-2019 by the LLVM contributors. ++ ++All rights reserved. ++ ++Developed by: ++ ++ LLVM Team ++ ++ University of Illinois at Urbana-Champaign ++ ++ http://llvm.org ++ ++Permission is hereby granted, free of charge, to any person obtaining a copy of ++this software and associated documentation files (the "Software"), to deal with ++the Software without restriction, including without limitation the rights to ++use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies ++of the Software, and to permit persons to whom the Software is furnished to do ++so, subject to the following conditions: ++ ++ * Redistributions of source code must retain the above copyright notice, ++ this list of conditions and the following disclaimers. ++ ++ * Redistributions in binary form must reproduce the above copyright notice, ++ this list of conditions and the following disclaimers in the ++ documentation and/or other materials provided with the distribution. ++ ++ * Neither the names of the LLVM Team, University of Illinois at ++ Urbana-Champaign, nor the names of its contributors may be used to ++ endorse or promote products derived from this Software without specific ++ prior written permission. ++ ++THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS ++FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ++CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE ++SOFTWARE. ++ ++Permission is hereby granted, free of charge, to any person obtaining a copy ++of this software and associated documentation files (the "Software"), to deal ++in the Software without restriction, including without limitation the rights ++to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++copies of the Software, and to permit persons to whom the Software is ++furnished to do so, subject to the following conditions: ++ ++The above copyright notice and this permission notice shall be included in ++all copies or substantial portions of the Software. ++ ++THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ++AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN ++THE SOFTWARE. ++ ++ ++The libffi library is licensed under the following terms: ++ ++ libffi - Copyright (c) 1996-2003 Red Hat, Inc. ++ ++ Permission is hereby granted, free of charge, to any person obtaining ++ a copy of this software and associated documentation files (the ++ ``Software''), to deal in the Software without restriction, including ++ without limitation the rights to use, copy, modify, merge, publish, ++ distribute, sublicense, and/or sell copies of the Software, and to ++ permit persons to whom the Software is furnished to do so, subject to ++ the following conditions: ++ ++ The above copyright notice and this permission notice shall be included ++ in all copies or substantial portions of the Software. ++ ++ THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS ++ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ++ IN NO EVENT SHALL CYGNUS SOLUTIONS BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ OTHER DEALINGS IN THE SOFTWARE. ++ ++ ++The documentation is licensed under the GNU Free Documentation License (v1.2). ++On Debian GNU/Linux systems, the complete text of this license is in ++`/usr/share/common-licenses/GFDL-1.2'. ++ ++ ++GCC RUNTIME LIBRARY EXCEPTION ++ ++Version 3.1, 31 March 2009 ++ ++Copyright (C) 2009 Free Software Foundation, Inc. ++ ++Everyone is permitted to copy and distribute verbatim copies of this ++license document, but changing it is not allowed. ++ ++This GCC Runtime Library Exception ("Exception") is an additional ++permission under section 7 of the GNU General Public License, version ++3 ("GPLv3"). It applies to a given file (the "Runtime Library") that ++bears a notice placed by the copyright holder of the file stating that ++the file is governed by GPLv3 along with this Exception. ++ ++When you use GCC to compile a program, GCC may combine portions of ++certain GCC header files and runtime libraries with the compiled ++program. The purpose of this Exception is to allow compilation of ++non-GPL (including proprietary) programs to use, in this way, the ++header files and runtime libraries covered by this Exception. ++ ++0. Definitions. ++ ++A file is an "Independent Module" if it either requires the Runtime ++Library for execution after a Compilation Process, or makes use of an ++interface provided by the Runtime Library, but is not otherwise based ++on the Runtime Library. ++ ++"GCC" means a version of the GNU Compiler Collection, with or without ++modifications, governed by version 3 (or a specified later version) of ++the GNU General Public License (GPL) with the option of using any ++subsequent versions published by the FSF. ++ ++"GPL-compatible Software" is software whose conditions of propagation, ++modification and use would permit combination with GCC in accord with ++the license of GCC. ++ ++"Target Code" refers to output from any compiler for a real or virtual ++target processor architecture, in executable form or suitable for ++input to an assembler, loader, linker and/or execution ++phase. Notwithstanding that, Target Code does not include data in any ++format that is used as a compiler intermediate representation, or used ++for producing a compiler intermediate representation. ++ ++The "Compilation Process" transforms code entirely represented in ++non-intermediate languages designed for human-written code, and/or in ++Java Virtual Machine byte code, into Target Code. Thus, for example, ++use of source code generators and preprocessors need not be considered ++part of the Compilation Process, since the Compilation Process can be ++understood as starting with the output of the generators or ++preprocessors. ++ ++A Compilation Process is "Eligible" if it is done using GCC, alone or ++with other GPL-compatible software, or if it is done without using any ++work based on GCC. For example, using non-GPL-compatible Software to ++optimize any GCC intermediate representations would not qualify as an ++Eligible Compilation Process. ++ ++1. Grant of Additional Permission. ++ ++You have permission to propagate a work of Target Code formed by ++combining the Runtime Library with Independent Modules, even if such ++propagation would otherwise violate the terms of GPLv3, provided that ++all Target Code was generated by Eligible Compilation Processes. You ++may then convey such a combination under terms of your choice, ++consistent with the licensing of the Independent Modules. ++ ++2. No Weakening of GCC Copyleft. ++ ++The availability of this Exception does not imply any general ++presumption that third-party software is unaffected by the copyleft ++requirements of the license of GCC. ++ ++ ++libquadmath/ ++ Copyright (C) 1992-2018 Free Software Foundation, Inc. ++ ++ Written by Francois-Xavier Coudert ++ Written by Tobias Burnus ++ Contributions by Ulrich Drepper ++ Conversion to long double by Jakub Jelinek ++ ++ This file is part of the libquadmath library. ++ Libquadmath is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Library General Public ++ License as published by the Free Software Foundation; either ++ version 2 of the License, or (at your option) any later version. ++ ++ Libiberty is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Library General Public License for more details. ++ ++libquadmath/math: ++ ++atanq.c, expm1q.c, j0q.c, j1q.c, log1pq.c, logq.c: ++ Copyright 2001 by Stephen L. Moshier ++ ++ This library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ This library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c: ++ Changes for 128-bit __float128 are ++ Copyright (C) 2001 Stephen L. Moshier ++ and are incorporated herein by permission of the author. The author ++ reserves the right to distribute this material elsewhere under different ++ copying permissions. These modifications are distributed here under ++ the following terms: ++ ++ This library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ This library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++libquadmath/math/ ++ ++cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c, ++sinq_kernel.c, truncq.c: ++ Copyright (C) 1997, 1999 Free Software Foundation, Inc. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++libquadmath/math/isinfq.c: ++ Written by J.T. Conklin . ++ Change for long double by Jakub Jelinek ++ Public domain. ++ ++libquadmath/math/ ++ llroundq.c, lroundq.c, tgammaq.c: ++ ++ Copyright (C) 1997, 1999, 2002, 2004 Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ Contributed by Ulrich Drepper , 1997 and ++ Jakub Jelinek , 1999. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++libquadmath/math/log10q.c: ++ Cephes Math Library Release 2.2: January, 1991 ++ Copyright 1984, 1991 by Stephen L. Moshier ++ Adapted for glibc November, 2001 ++ ++ This library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ This library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++libquadmath/math/ ++ acoshq.c, acosq.c, asinhq.c, asinq.c, atan2q.c, atanhq.c, ceilq.c, ++ copysignq.c, coshq.c, cosq.c, erfq.c, fabsq.c, finiteq.c, floorq.c, ++ fmodq.c, frexpq.c, hypotq.c, ilogbq.c, isnanq.c, jnq.c, ldexpq.c, ++ logbq.c, modfq.c, nearbyintq.c, nextafterq.c, powq.c, remainderq.c, ++ rem_pio2q.c, rintq.c, scalblnq.c, scalbnq.c, sinhq.c, sinq.c, ++ tanhq.c, tanq.c, tanq_kernel.c: ++ ++ Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. ++ . ++ Developed at SunPro, a Sun Microsystems, Inc. business. ++ Permission to use, copy, modify, and distribute this ++ software is freely granted, provided that this notice ++ is preserved. ++ ++libquadmath/math/ ++ acosq.c, asinq.c, coshq.c, erfq.c, jnq.c, powq.c, sinhq.c, tanq_kernel.c: ++ ++ In addition to the Sun Microsystems copyright: ++ ++ Long double expansions are ++ Copyright (C) 2001 Stephen L. Moshier ++ and are incorporated herein by permission of the author. The author ++ reserves the right to distribute this material elsewhere under different ++ copying permissions. These modifications are distributed here under ++ the LGPL 2.1 or later. ++ ++ ++gcc/go/gofrontend, libgo: ++ ++Copyright (c) 2009 The Go Authors. All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions are ++met: ++ ++ * Redistributions of source code must retain the above copyright ++notice, this list of conditions and the following disclaimer. ++ * Redistributions in binary form must reproduce the above ++copyright notice, this list of conditions and the following disclaimer ++in the documentation and/or other materials provided with the ++distribution. ++ * Neither the name of Google Inc. nor the names of its ++contributors may be used to endorse or promote products derived from ++this software without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++A PARTICULAR PURPOSE ARE DISCLAIMED. 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Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. All advertising materials mentioning features or use of this software ++ must display the following acknowledgement: ++ This product includes software developed by the University of ++ California, Berkeley and its contributors. ++4. Neither the name of the University nor the names of its contributors ++ may be used to endorse or promote products derived from this software ++ without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. 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Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. Neither the name of the University nor the names of its contributors ++ may be used to endorse or promote products derived from this software ++ without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++[1e] ++ ++Copyright (c) 1982, 1986, 1989, 1991, 1993, 1994 ++The Regents of the University of California. All rights reserved. ++(c) UNIX System Laboratories, Inc. ++All or some portions of this file are derived from material licensed ++to the University of California by American Telephone and Telegraph ++Co. or Unix System Laboratories, Inc. and are reproduced herein with ++the permission of UNIX System Laboratories, Inc. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. All advertising materials mentioning features or use of this software ++ must display the following acknowledgement: ++ This product includes software developed by the University of ++ California, Berkeley and its contributors. ++4. Neither the name of the University nor the names of its contributors ++ may be used to endorse or promote products derived from this software ++ without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. 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Neither the name of the University nor the names of its ++contributors may be used to endorse or promote products derived ++from this software without specific prior written permission. ++THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ ++------------------------------------------------------------- ++ Please note that in some of the above alternate licenses, there is a ++ statement regarding that acknowledgement must be made in any ++ advertising materials for products using the code. This restriction ++ no longer applies due to the following license change: ++ ++ ftp://ftp.cs.berkeley.edu/pub/4bsd/README.Impt.License.Change ++ ++ In some cases the defunct clause has been removed in modified newlib code and ++ in some cases, the clause has been left as-is. ++------------------------------------------------------------- ++ ++(2) Cygwin (cygwin targets only) ++ ++Copyright 2001 Red Hat, Inc. ++ ++This software is a copyrighted work licensed under the terms of the ++Cygwin license. Please consult the file "CYGWIN_LICENSE" for ++details. ++ ++(3) David M. Gay at AT&T ++ ++The author of this software is David M. Gay. ++ ++Copyright (c) 1991 by AT&T. ++ ++Permission to use, copy, modify, and distribute this software for any ++purpose without fee is hereby granted, provided that this entire notice ++is included in all copies of any software which is or includes a copy ++or modification of this software and in all copies of the supporting ++documentation for such software. ++ ++THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED ++WARRANTY. IN PARTICULAR, NEITHER THE AUTHOR NOR AT&T MAKES ANY ++REPRESENTATION OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY ++OF THIS SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE. ++ ++(4) Advanced Micro Devices ++ ++Copyright 1989, 1990 Advanced Micro Devices, Inc. ++ ++This software is the property of Advanced Micro Devices, Inc (AMD) which ++specifically grants the user the right to modify, use and distribute this ++software provided this notice is not removed or altered. All other rights ++are reserved by AMD. ++ ++AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS ++SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL ++DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR ++USE OF THIS SOFTWARE. ++ ++So that all may benefit from your experience, please report any problems ++or suggestions about this software to the 29K Technical Support Center at ++800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or ++0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118. ++ ++Advanced Micro Devices, Inc. ++29K Support Products ++Mail Stop 573 ++5900 E. Ben White Blvd. ++Austin, TX 78741 ++800-292-9263 ++ ++(5) C.W. Sandmann ++ ++Copyright (C) 1993 C.W. Sandmann ++ ++This file may be freely distributed as long as the author's name remains. ++ ++(6) Eric Backus ++ ++(C) Copyright 1992 Eric Backus ++ ++This software may be used freely so long as this copyright notice is ++left intact. There is no warrantee on this software. ++ ++(7) Sun Microsystems ++ ++Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. ++ ++Developed at SunPro, a Sun Microsystems, Inc. business. ++Permission to use, copy, modify, and distribute this ++software is freely granted, provided that this notice ++is preserved. ++ ++(8) Hewlett Packard ++ ++(c) Copyright 1986 HEWLETT-PACKARD COMPANY ++ ++To anyone who acknowledges that this file is provided "AS IS" ++without any express or implied warranty: ++ permission to use, copy, modify, and distribute this file ++for any purpose is hereby granted without fee, provided that ++the above copyright notice and this notice appears in all ++copies, and that the name of Hewlett-Packard Company not be ++used in advertising or publicity pertaining to distribution ++of the software without specific, written prior permission. ++Hewlett-Packard Company makes no representations about the ++suitability of this software for any purpose. ++ ++(9) Hans-Peter Nilsson ++ ++Copyright (C) 2001 Hans-Peter Nilsson ++ ++Permission to use, copy, modify, and distribute this software is ++freely granted, provided that the above copyright notice, this notice ++and the following disclaimer are preserved with no changes. ++ ++THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++PURPOSE. ++ ++(10) Stephane Carrez (m68hc11-elf/m68hc12-elf targets only) ++ ++Copyright (C) 1999, 2000, 2001, 2002 Stephane Carrez (stcarrez@nerim.fr) ++ ++The authors hereby grant permission to use, copy, modify, distribute, ++and license this software and its documentation for any purpose, provided ++that existing copyright notices are retained in all copies and that this ++notice is included verbatim in any distributions. No written agreement, ++license, or royalty fee is required for any of the authorized uses. ++Modifications to this software may be copyrighted by their authors ++and need not follow the licensing terms described here, provided that ++the new terms are clearly indicated on the first page of each file where ++they apply. ++ ++(11) Christopher G. Demetriou ++ ++Copyright (c) 2001 Christopher G. Demetriou ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. The name of the author may not be used to endorse or promote products ++ derived from this software without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ++IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ++OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ++IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ++INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT ++NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF ++THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ ++(12) SuperH, Inc. ++ ++Copyright 2002 SuperH, Inc. All rights reserved ++ ++This software is the property of SuperH, Inc (SuperH) which specifically ++grants the user the right to modify, use and distribute this software ++provided this notice is not removed or altered. All other rights are ++reserved by SuperH. ++ ++SUPERH MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO ++THIS SOFTWARE. IN NO EVENT SHALL SUPERH BE LIABLE FOR INDIRECT, SPECIAL, ++INCIDENTAL OR CONSEQUENTIAL DAMAGES IN CONNECTION WITH OR ARISING FROM ++THE FURNISHING, PERFORMANCE, OR USE OF THIS SOFTWARE. ++ ++So that all may benefit from your experience, please report any problems ++or suggestions about this software to the SuperH Support Center via ++e-mail at softwaresupport@superh.com . ++ ++SuperH, Inc. ++405 River Oaks Parkway ++San Jose ++CA 95134 ++USA ++ ++(13) Royal Institute of Technology ++ ++Copyright (c) 1999 Kungliga Tekniska Hgskolan ++(Royal Institute of Technology, Stockholm, Sweden). ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++ ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++ ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++3. Neither the name of KTH nor the names of its contributors may be ++ used to endorse or promote products derived from this software without ++ specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY KTH AND ITS CONTRIBUTORS ``AS IS'' AND ANY ++EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL KTH OR ITS CONTRIBUTORS BE ++LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ++BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, ++WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR ++OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ++ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ ++(14) Alexey Zelkin ++ ++Copyright (c) 2000, 2001 Alexey Zelkin ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(15) Andrey A. Chernov ++ ++Copyright (C) 1997 by Andrey A. Chernov, Moscow, Russia. ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(16) FreeBSD ++ ++Copyright (c) 1997-2002 FreeBSD Project. ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(17) S. L. Moshier ++ ++Author: S. L. Moshier. ++ ++Copyright (c) 1984,2000 S.L. Moshier ++ ++Permission to use, copy, modify, and distribute this software for any ++purpose without fee is hereby granted, provided that this entire notice ++is included in all copies of any software which is or includes a copy ++or modification of this software and in all copies of the supporting ++documentation for such software. ++ ++THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED ++WARRANTY. IN PARTICULAR, THE AUTHOR MAKES NO REPRESENTATION ++OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY OF THIS ++SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE. ++ ++(18) Citrus Project ++ ++Copyright (c)1999 Citrus Project, ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(19) Todd C. Miller ++ ++Copyright (c) 1998 Todd C. Miller ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++3. The name of the author may not be used to endorse or promote products ++ derived from this software without specific prior written permission. ++ ++THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, ++INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY ++AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ++THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; ++OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, ++WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR ++OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ++ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ ++(20) DJ Delorie (i386) ++ ++Copyright (C) 1991 DJ Delorie ++All rights reserved. ++ ++Redistribution and use in source and binary forms is permitted ++provided that the above copyright notice and following paragraph are ++duplicated in all such forms. ++ ++This file is distributed WITHOUT ANY WARRANTY; without even the implied ++warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ++ ++(21) Free Software Foundation LGPL License (*-linux* targets only) ++ ++ Copyright (C) 1990-1999, 2000, 2001 ++ Free Software Foundation, Inc. ++ This file is part of the GNU C Library. ++ Contributed by Mark Kettenis , 1997. ++ ++ The GNU C Library is free software; you can redistribute it and/or ++ modify it under the terms of the GNU Lesser General Public ++ License as published by the Free Software Foundation; either ++ version 2.1 of the License, or (at your option) any later version. ++ ++ The GNU C Library is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ Lesser General Public License for more details. ++ ++ You should have received a copy of the GNU Lesser General Public ++ License along with the GNU C Library; if not, write to the Free ++ Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA ++ 02110-1301 USA ++ ++(22) Xavier Leroy LGPL License (i[3456]86-*-linux* targets only) ++ ++Copyright (C) 1996 Xavier Leroy (Xavier.Leroy@inria.fr) ++ ++This program is free software; you can redistribute it and/or ++modify it under the terms of the GNU Library General Public License ++as published by the Free Software Foundation; either version 2 ++of the License, or (at your option) any later version. ++ ++This program is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU Library General Public License for more details. ++ ++(23) Intel (i960) ++ ++Copyright (c) 1993 Intel Corporation ++ ++Intel hereby grants you permission to copy, modify, and distribute this ++software and its documentation. Intel grants this permission provided ++that the above copyright notice appears in all copies and that both the ++copyright notice and this permission notice appear in supporting ++documentation. In addition, Intel grants this permission provided that ++you prominently mark as "not part of the original" any modifications ++made to this software or documentation, and that the name of Intel ++Corporation not be used in advertising or publicity pertaining to ++distribution of the software or the documentation without specific, ++written prior permission. ++ ++Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR ++IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY ++OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or ++representations regarding the use of, or the results of the use of, ++the software and documentation in terms of correctness, accuracy, ++reliability, currentness, or otherwise; and you rely on the software, ++documentation and results solely at your own risk. ++ ++IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS, ++LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES ++OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM ++PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER. ++ ++(24) Hewlett-Packard (hppa targets only) ++ ++(c) Copyright 1986 HEWLETT-PACKARD COMPANY ++ ++To anyone who acknowledges that this file is provided "AS IS" ++without any express or implied warranty: ++ permission to use, copy, modify, and distribute this file ++for any purpose is hereby granted without fee, provided that ++the above copyright notice and this notice appears in all ++copies, and that the name of Hewlett-Packard Company not be ++used in advertising or publicity pertaining to distribution ++of the software without specific, written prior permission. ++Hewlett-Packard Company makes no representations about the ++suitability of this software for any purpose. ++ ++(25) Henry Spencer (only *-linux targets) ++ ++Copyright 1992, 1993, 1994 Henry Spencer. All rights reserved. ++This software is not subject to any license of the American Telephone ++and Telegraph Company or of the Regents of the University of California. ++ ++Permission is granted to anyone to use this software for any purpose on ++any computer system, and to alter it and redistribute it, subject ++to the following restrictions: ++ ++1. The author is not responsible for the consequences of use of this ++ software, no matter how awful, even if they arise from flaws in it. ++ ++2. The origin of this software must not be misrepresented, either by ++ explicit claim or by omission. Since few users ever read sources, ++ credits must appear in the documentation. ++ ++3. Altered versions must be plainly marked as such, and must not be ++ misrepresented as being the original software. Since few users ++ ever read sources, credits must appear in the documentation. ++ ++4. This notice may not be removed or altered. ++ ++(26) Mike Barcroft ++ ++Copyright (c) 2001 Mike Barcroft ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(27) Konstantin Chuguev (--enable-newlib-iconv) ++ ++Copyright (c) 1999, 2000 ++ Konstantin Chuguev. All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++ iconv (Charset Conversion Library) v2.0 ++ ++(27) Artem Bityuckiy (--enable-newlib-iconv) ++ ++Copyright (c) 2003, Artem B. Bityuckiy, SoftMine Corporation. ++Rights transferred to Franklin Electronic Publishers. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions ++are met: ++1. Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++2. Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++SUCH DAMAGE. ++ ++(28) Red Hat Incorporated ++ ++Unless otherwise stated in each remaining newlib file, the remaining ++files in the newlib subdirectory default to the following copyright. ++It should be noted that Red Hat Incorporated now owns copyrights ++belonging to Cygnus Solutions and Cygnus Support. ++ ++Copyright (c) 1994, 1997, 2001, 2002, 2003, 2004 Red Hat Incorporated. ++All rights reserved. ++ ++Redistribution and use in source and binary forms, with or without ++modification, are permitted provided that the following conditions are met: ++ ++ Redistributions of source code must retain the above copyright ++ notice, this list of conditions and the following disclaimer. ++ ++ Redistributions in binary form must reproduce the above copyright ++ notice, this list of conditions and the following disclaimer in the ++ documentation and/or other materials provided with the distribution. ++ ++ The name of Red Hat Incorporated may not be used to endorse ++ or promote products derived from this software without specific ++ prior written permission. ++ ++THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY ++DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ ++ ++contrib/unicode: ++ ++UNICODE, INC. LICENSE AGREEMENT - DATA FILES AND SOFTWARE ++ ++ Unicode Data Files include all data files under the directories ++http://www.unicode.org/Public/, http://www.unicode.org/reports/, and ++http://www.unicode.org/cldr/data/. Unicode Data Files do not include PDF ++online code charts under the directory http://www.unicode.org/Public/. ++Software includes any source code published in the Unicode Standard or under ++the directories http://www.unicode.org/Public/, ++http://www.unicode.org/reports/, and http://www.unicode.org/cldr/data/. ++ ++ NOTICE TO USER: Carefully read the following legal agreement. BY ++DOWNLOADING, INSTALLING, COPYING OR OTHERWISE USING UNICODE INC.'S DATA FILES ++("DATA FILES"), AND/OR SOFTWARE ("SOFTWARE"), YOU UNEQUIVOCALLY ACCEPT, AND ++AGREE TO BE BOUND BY, ALL OF THE TERMS AND CONDITIONS OF THIS AGREEMENT. IF ++YOU DO NOT AGREE, DO NOT DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE THE DATA ++FILES OR SOFTWARE. ++ ++ COPYRIGHT AND PERMISSION NOTICE ++ ++ Copyright © 1991-2013 Unicode, Inc. All rights reserved. Distributed under ++the Terms of Use in http://www.unicode.org/copyright.html. ++ ++ Permission is hereby granted, free of charge, to any person obtaining a ++copy of the Unicode data files and any associated documentation (the "Data ++Files") or Unicode software and any associated documentation (the "Software") ++to deal in the Data Files or Software without restriction, including without ++limitation the rights to use, copy, modify, merge, publish, distribute, and/or ++sell copies of the Data Files or Software, and to permit persons to whom the ++Data Files or Software are furnished to do so, provided that (a) the above ++copyright notice(s) and this permission notice appear with all copies of the ++Data Files or Software, (b) both the above copyright notice(s) and this ++permission notice appear in associated documentation, and (c) there is clear ++notice in each modified Data File or in the Software as well as in the ++documentation associated with the Data File(s) or Software that the data or ++software has been modified. ++ ++ THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY ++KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD ++PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN ++THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL ++DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR ++PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ++ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE ++DATA FILES OR SOFTWARE. ++ ++ Except as contained in this notice, the name of a copyright holder shall ++not be used in advertising or otherwise to promote the sale, use or other ++dealings in these Data Files or Software without prior written authorization ++of the copyright holder. ++ ++contrib/unicode/from_glibc: ++ ++# Copyright (C) 2014-2019 Free Software Foundation, Inc. ++# This file is part of the GNU C Library. ++# ++# The GNU C Library is free software; you can redistribute it and/or ++# modify it under the terms of the GNU Lesser General Public ++# License as published by the Free Software Foundation; either ++# version 2.1 of the License, or (at your option) any later version. ++# ++# The GNU C Library is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# Lesser General Public License for more details. ++# ++# You should have received a copy of the GNU Lesser General Public ++# License along with the GNU C Library; if not, see ++# . diff --cc debian/cpp-BV-CRB.preinst.in index 0000000,0000000..408889b new file mode 100644 --- /dev/null +++ b/debian/cpp-BV-CRB.preinst.in @@@ -1,0 -1,0 +1,11 @@@ ++#!/bin/sh ++ ++set -e ++ ++if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then ++ update-alternatives --quiet --remove @TARGET@-cpp /usr/bin/@TARGET@-cpp-@BV@ ++fi ++ ++#DEBHELPER# ++ ++exit 0 diff --cc debian/cpp-BV-doc.doc-base.cpp index 0000000,0000000..d64e86f new file mode 100644 --- /dev/null +++ b/debian/cpp-BV-doc.doc-base.cpp @@@ -1,0 -1,0 +1,16 @@@ ++Document: cpp-@BV@ ++Title: The GNU C preprocessor ++Author: Various ++Abstract: The C preprocessor is a "macro processor" that is used automatically ++ by the C compiler to transform your program before actual compilation. ++ It is called a macro processor because it allows you to define "macros", ++ which are brief abbreviations for longer constructs. ++Section: Programming ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/cpp.html ++Files: /usr/share/doc/gcc-@BV@-base/cpp.html ++ ++Format: info ++Index: /usr/share/info/cpp-@BV@.info.gz ++Files: /usr/share/info/cpp-@BV@* diff --cc debian/cpp-BV-doc.doc-base.cppint index 0000000,0000000..151d319 new file mode 100644 --- /dev/null +++ b/debian/cpp-BV-doc.doc-base.cppint @@@ -1,0 -1,0 +1,17 @@@ ++Document: cppinternals-@BV@ ++Title: The GNU C preprocessor (internals) ++Author: Various ++Abstract: This brief manual documents the internals of cpplib, and ++ explains some of the tricky issues. It is intended that, along with ++ the comments in the source code, a reasonably competent C programmer ++ should be able to figure out what the code is doing, and why things ++ have been implemented the way they have. ++Section: Programming ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/cppinternals.html ++Files: /usr/share/doc/gcc-@BV@-base/cppinternals.html ++ ++Format: info ++Index: /usr/share/info/cppinternals-@BV@.info.gz ++Files: /usr/share/info/cppinternals-@BV@* diff --cc debian/dh_doclink index 0000000,0000000..8372658 new file mode 100755 --- /dev/null +++ b/debian/dh_doclink @@@ -1,0 -1,0 +1,12 @@@ ++#! /bin/sh ++ ++pkg=`echo $1 | sed 's/^-p//'` ++target=$2 ++ ++[ -d debian/$pkg/usr/share/doc ] || mkdir -p debian/$pkg/usr/share/doc ++if [ -d debian/$pkg/usr/share/doc/$p -a ! -h debian/$pkg/usr/share/doc/$p ] ++then ++ echo "WARNING: removing doc directory $pkg" ++ rm -rf debian/$pkg/usr/share/doc/$pkg ++fi ++ln -sf $target debian/$pkg/usr/share/doc/$pkg diff --cc debian/dh_rmemptydirs index 0000000,0000000..4a010c7 new file mode 100755 --- /dev/null +++ b/debian/dh_rmemptydirs @@@ -1,0 -1,0 +1,10 @@@ ++#! /bin/sh -e ++ ++pkg=`echo $1 | sed 's/^-p//'` ++ ++: # remove empty directories, when all components are in place ++for d in `find debian/$pkg -depth -type d -empty 2> /dev/null`; do \ ++ while rmdir $d 2> /dev/null; do d=`dirname $d`; done; \ ++done ++ ++exit 0 diff --cc debian/dummy-man.1 index 0000000,0000000..966d935 new file mode 100644 --- /dev/null +++ b/debian/dummy-man.1 @@@ -1,0 -1,0 +1,29 @@@ ++.TH @NAME@ 1 "May 24, 2003" @name@ "Debian Free Documentation" ++.SH NAME ++@name@ \- A program with a man page covered by the GFDL with invariant sections ++.SH SYNOPSIS ++@name@ [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] ++ ++.SH DESCRIPTION ++ ++\fB@name@\fR is documented by a man page, which is covered by the "GNU ++Free Documentation License" (GFDL) containing invariant sections. ++.P ++In November 2002, version 1.2 of the GNU Free Documentation License (GNU ++FDL) was released by the Free Software Foundation after a long period ++of consultation. Unfortunately, some concerns raised by members of the ++Debian Project were not addressed, and as such the GNU FDL can apply ++to works that do not pass the Debian Free Software Guidelines (DFSG), ++and may thus only be included in the non-free component of the Debian ++archive, not the Debian distribution itself. ++ ++.SH "SEE ALSO" ++.BR http://gcc.gnu.org/onlinedocs/ ++for the complete documentation, ++.BR http://lists.debian.org/debian-legal/2003/debian-legal-200304/msg00307.html ++for a proposed statement of Debian with respect to the GFDL, ++.BR gfdl(7) ++ ++.SH AUTHOR ++This manual page was written by the Debian GCC maintainers, ++for the Debian GNU/Linux system. diff --cc debian/dummy.texi index 0000000,0000000..127ccaa new file mode 100644 --- /dev/null +++ b/debian/dummy.texi @@@ -1,0 -1,0 +1,1 @@@ ++@c This file is empty because the original one has a non DFSG free license (GFDL) diff --cc debian/g++-BV-CRB.preinst.in index 0000000,0000000..b69c8f8 new file mode 100644 --- /dev/null +++ b/debian/g++-BV-CRB.preinst.in @@@ -1,0 -1,0 +1,11 @@@ ++#!/bin/sh ++ ++set -e ++ ++if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then ++ update-alternatives --quiet --remove @TARGET@-g++ /usr/bin/@TARGET@-g++-@BV@ ++fi ++ ++#DEBHELPER# ++ ++exit 0 diff --cc debian/gcc-12.preinst.in index 0000000,0000000..4df30a1 new file mode 100644 --- /dev/null +++ b/debian/gcc-12.preinst.in @@@ -1,0 -1,0 +1,14 @@@ ++#!/bin/sh ++ ++set -e ++ ++if [ "$1" = "upgrade" ] || [ "$1" = "install" ]; then ++ # remove bad symlink introduced in 12.3.0-4 ++ if [ -h /usr/libexec/gcc/@TARGET@/12 ]; then ++ rm -f /usr/libexec/gcc/@TARGET@/12 ++ fi ++fi ++ ++#DEBHELPER# ++ ++exit 0 diff --cc debian/gcc-BV-CRB.preinst.in index 0000000,0000000..ca34796 new file mode 100644 --- /dev/null +++ b/debian/gcc-BV-CRB.preinst.in @@@ -1,0 -1,0 +1,12 @@@ ++#!/bin/sh ++ ++set -e ++ ++if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then ++ update-alternatives --quiet --remove @TARGET@-gcc /usr/bin/@TARGET@-gcc-@BV@ ++ update-alternatives --quiet --remove @TARGET@-gcov /usr/bin/@TARGET@-gcov-@BV@ ++fi ++ ++#DEBHELPER# ++ ++exit 0 diff --cc debian/gcc-BV-doc.doc-base.gcc index 0000000,0000000..106e18d new file mode 100644 --- /dev/null +++ b/debian/gcc-BV-doc.doc-base.gcc @@@ -1,0 -1,0 +1,14 @@@ ++Document: gcc-@BV@ ++Title: The GNU C and C++ compiler ++Author: Various ++Abstract: This manual documents how to run, install and port the GNU compiler, ++ as well as its new features and incompatibilities, and how to report bugs. ++Section: Programming ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/gcc.html ++Files: /usr/share/doc/gcc-@BV@-base/gcc.html ++ ++Format: info ++Index: /usr/share/info/gcc-@BV@.info.gz ++Files: /usr/share/info/gcc-@BV@* diff --cc debian/gcc-BV-doc.doc-base.gccint index 0000000,0000000..85f4af1 new file mode 100644 --- /dev/null +++ b/debian/gcc-BV-doc.doc-base.gccint @@@ -1,0 -1,0 +1,17 @@@ ++Document: gccint-@BV@ ++Title: Internals of the GNU C and C++ compiler ++Author: Various ++Abstract: This manual documents the internals of the GNU compilers, ++ including how to port them to new targets and some information about ++ how to write front ends for new languages. It corresponds to GCC ++ version @BV@.x. The use of the GNU compilers is documented in a ++ separate manual. ++Section: Programming ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/gccint.html ++Files: /usr/share/doc/gcc-@BV@-base/gccint.html ++ ++Format: info ++Index: /usr/share/info/gccint-@BV@.info.gz ++Files: /usr/share/info/gccint-@BV@* diff --cc debian/gcc-BV-doc.doc-base.gomp index 0000000,0000000..69ccede new file mode 100644 --- /dev/null +++ b/debian/gcc-BV-doc.doc-base.gomp @@@ -1,0 -1,0 +1,15 @@@ ++Document: gcc-@BV@-gomp ++Title: The GNU OpenMP Implementation (for GCC @BV@) ++Author: Various ++Abstract: This manual documents the usage of libgomp, the GNU implementation ++ of the OpenMP Application Programming Interface (API) for multi-platform ++ shared-memory parallel programming in C/C++ and Fortran. ++Section: Programming ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/libgomp.html ++Files: /usr/share/doc/gcc-@BV@-base/libgomp.html ++ ++Format: info ++Index: /usr/share/info/libgomp-@BV@.info.gz ++Files: /usr/share/info/libgomp-@BV@* diff --cc debian/gcc-BV-doc.doc-base.itm index 0000000,0000000..130a70f new file mode 100644 --- /dev/null +++ b/debian/gcc-BV-doc.doc-base.itm @@@ -1,0 -1,0 +1,16 @@@ ++Document: gcc-@BV@-itm ++Title: The GNU Transactional Memory Library (for GCC @BV@) ++Author: Various ++Abstract: This manual documents the usage and internals of libitm, ++ the GNU Transactional Memory Library. It provides transaction support ++ for accesses to a process' memory, enabling easy-to-use synchronization ++ of accesses to shared memory by several threads. ++Section: Programming ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/libitm.html ++Files: /usr/share/doc/gcc-@BV@-base/libitm.html ++ ++Format: info ++Index: /usr/share/info/libitm-@BV@.info.gz ++Files: /usr/share/info/libitm-@BV@* diff --cc debian/gcc-BV-doc.doc-base.qmath index 0000000,0000000..bdc2d4c new file mode 100644 --- /dev/null +++ b/debian/gcc-BV-doc.doc-base.qmath @@@ -1,0 -1,0 +1,14 @@@ ++Document: gcc-@BV@-qmath ++Title: The GCC Quad-Precision Math Library (for GCC @BV@) ++Author: Various ++Abstract: This manual documents the usage of libquadmath, the GCC ++ Quad-Precision Math Library Application Programming Interface (API). ++Section: Programming ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/libquadmath.html ++Files: /usr/share/doc/gcc-@BV@-base/libquadmath.html ++ ++Format: info ++Index: /usr/share/info/libquadmath-@BV@.info.gz ++Files: /usr/share/info/libquadmath-@BV@* diff --cc debian/gcc-BV-hppa64-linux-gnu.overrides index 0000000,0000000..9f7ebd0 new file mode 100644 --- /dev/null +++ b/debian/gcc-BV-hppa64-linux-gnu.overrides @@@ -1,0 -1,0 +1,3 @@@ ++gcc-@BV@-hppa64-linux-gnu binary: binary-from-other-architecture ++gcc-@BV@-hppa64-linux-gnu binary: binary-without-manpage ++gcc-@BV@-hppa64-linux-gnu binary: hardening-no-pie diff --cc debian/gcc-BV-multilib.overrides index 0000000,0000000..545ca0e new file mode 100644 --- /dev/null +++ b/debian/gcc-BV-multilib.overrides @@@ -1,0 -1,0 +1,1 @@@ ++gcc-@BV@-multilib binary: binary-from-other-architecture diff --cc debian/gcc-BV-source.overrides index 0000000,0000000..46e8559 new file mode 100644 --- /dev/null +++ b/debian/gcc-BV-source.overrides @@@ -1,0 -1,0 +1,5 @@@ ++gcc-@BV@-source: changelog-file-not-compressed ++ ++# these are patches taken over unmodified from 4.3 ++gcc-@BV@-source: script-not-executable ++gcc-@BV@-source: shell-script-fails-syntax-check diff --cc debian/gcc-XX-BV.1 index 0000000,0000000..4268c41 new file mode 100644 --- /dev/null +++ b/debian/gcc-XX-BV.1 @@@ -1,0 -1,0 +1,17 @@@ ++.TH GCC-@TOOL@-@BV@ 1 "May 8, 2012" gcc-@TOOL@-@BV@ "" ++.SH NAME ++gcc-@TOOL@ \- a wrapper around @TOOL@ adding the --plugin option ++ ++.SH SYNOPSIS ++gcc-@TOOL@ [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] ++ ++.SH DESCRIPTION ++ ++\fBgcc-@TOOL@\fR is a wrapper around @TOOL@(1) adding the appropriate ++\fB\-\-plugin\fR option for the GCC @BV@ compiler. ++ ++.SH OPTIONS ++See @TOOL@(1) for a list of options that @TOOL@ understands. ++ ++.SH "SEE ALSO" ++.BR @TOOL@(1) diff --cc debian/gcc-dummy.texi index 0000000,0000000..b84b670 new file mode 100644 --- /dev/null +++ b/debian/gcc-dummy.texi @@@ -1,0 -1,0 +1,41 @@@ ++\input texinfo @c -*-texinfo-*- ++@c %**start of header ++ ++@settitle The GNU Compiler Collection (GCC) ++ ++@c Create a separate index for command line options. ++@defcodeindex op ++@c Merge the standard indexes into a single one. ++@syncodeindex fn cp ++@syncodeindex vr cp ++@syncodeindex ky cp ++@syncodeindex pg cp ++@syncodeindex tp cp ++ ++@paragraphindent 1 ++ ++@c %**end of header ++ ++@copying ++The current documentation is licensed under the same terms as the Debian packaging. ++@end copying ++@ifnottex ++@dircategory Programming ++@direntry ++* @name@: (@name@). The GNU Compiler Collection (@name@). ++@end direntry ++@sp 1 ++@end ifnottex ++ ++@summarycontents ++@contents ++@page ++ ++@node Top ++@top Introduction ++@cindex introduction ++The official GNU compilers' documentation is released under the terms ++of the GNU Free Documentation License with cover texts. This has been ++considered non free by the Debian Project. Thus you will find it in the ++non-free section of the Debian archive. ++@bye diff --cc debian/gcc-snapshot.overrides index 0000000,0000000..8dda586 new file mode 100644 --- /dev/null +++ b/debian/gcc-snapshot.overrides @@@ -1,0 -1,0 +1,13 @@@ ++gcc-snapshot binary: bad-permissions-for-ali-file ++ ++# libphobos non-multilib builds ++gcc-snapshot binary: embedded-library ++ ++gcc-snapshot binary: binary-from-other-architecture ++gcc-snapshot binary: extra-license-file ++gcc-snapshot binary: triplet-dir-and-architecture-mismatch ++gcc-snapshot binary: unstripped-binary-or-object ++gcc-snapshot binary: missing-prerequisite-for-gfortran-module ++ ++# intended ++gcc-snapshot binary: hardening-no-pie diff --cc debian/gcc-snapshot.prerm index 0000000,0000000..000148c new file mode 100644 --- /dev/null +++ b/debian/gcc-snapshot.prerm @@@ -1,0 -1,0 +1,6 @@@ ++#! /bin/sh -e ++ ++find /usr/lib/gcc-snapshot/share/gcc/python -name '*.py[co]' | xargs -r rm -f ++find /usr/lib/gcc-snapshot/share/gcc/python -name __pycache__ -type d | xargs -r rm -rf ++ ++#DEBHELPER# diff --cc debian/gcc.css index 0000000,0000000..77d01ee new file mode 100644 --- /dev/null +++ b/debian/gcc.css @@@ -1,0 -1,0 +1,150 @@@ ++/* CSS for the GCC web site. ++ ++ Gerald Pfeifer ++ */ ++ ++body { background-color: white; color: black; } ++ ++a:link { color: #0066bb; text-decoration: none; } ++a:visited { color: #003399; text-decoration: none; } ++a:hover { color: darkorange; text-decoration: none; } ++ ++h1 { color: darkslategray; text-align:center; } ++h2 { color: darkslategray; } ++ ++.highlight{ color: darkslategray; font-weight:bold; } ++.smaller { font-size: 80%; } ++ ++.left { text-align:left; } ++.right { text-align:right; } ++.center { text-align:center; margin-left:auto; margin-right:auto; } ++.top { vertical-align:top; } ++.middle { vertical-align:middle; } ++ ++.width33 { width:33%; } ++.border0 { border-width:0; } ++ ++.no-margin-top { margin-top:0; } ++.twocolumns { column-count:2; } ++.imgleft { margin: 5px 20px; float: left; } ++ ++img.right { float: right; } ++ ++td.news { width: 50%; padding-right: 8px; vertical-align: top; } ++td.news h2 { font-size: 1.2em; margin-top: 0; margin-bottom: 2%; } ++td.news dl { margin-top:0; } ++td.news dt { color:darkslategrey; font-weight:bold; margin-top:0.3em; } ++td.news dd { margin-left:3ex; margin-top:0.1em; margin-bottom:0.1em; } ++td.news .date { color:darkslategrey; font-size:90%; margin-left:0.1ex; } ++ ++td.status { width: 50%; padding-left: 12px; vertical-align: top; ++ border-left: #3366cc thin solid; } ++td.status h2 { font-size: 1.2em; margin-top:0; margin-bottom: 1%; } ++td.status dl { margin-top:0; } ++td.status .version { font-weight:bold; } ++td.status .regress { font-size: 80%; } ++td.status dd { margin-left:3ex; } ++ ++table.nav { ++ padding-left: 32px; ++ border-spacing: 0pt; ++} ++ ++table.nav td { ++ border-width: 0; ++} ++ ++table.navitem { ++ width: 100%; ++ border-spacing: 0pt; ++} ++ ++table.navitem tr:nth-child(1) { ++ border-color: #3366cc; ++ border-style: solid; ++ border-width: thin; ++ color: #f2f2f9; ++ background-color: #0066dd; ++ font-weight: bold; ++} ++table.navitem tr:nth-child(2) { ++ padding-top: 3px; ++ padding-left: 8px; ++ padding-bottom: 3px; ++ background-color: #f2f2f9; ++ font-size: smaller; ++} ++ ++div.copyright { ++ clear: both; ++ font-size: smaller; ++ background: #f2f2f9; ++ border: 2px solid #3366cc; ++ border-style: solid; ++ border-width: thin; ++ padding: 4px; ++} ++div.copyright p:nth-child(3) { margin-bottom: 0; } ++ ++.bold { font-weight:bold; } ++.boldcyan { font-weight:bold; color:cyan; } ++.boldlime { font-weight:bold; color:lime; } ++.boldmagenta { font-weight:bold; color:magenta; } ++.boldred { font-weight:bold; color:red; } ++.boldgreen { font-weight:bold; color:green; } ++.boldblue { font-weight:bold; color:blue; } ++.red { color:red; } ++.green { color:green; } ++.blue { color:blue; } ++.blackbg { color:white; background-color: #000000; } ++ ++/* Quote an e-mail. The first
has the sender, the second the quote. */ ++blockquote.mail div:nth-child(2) { border-left: solid blue; padding-left: 4pt; } ++ ++/* This comes close to , alas a bit less bordersome. */ ++table.border th { border:2px solid; } ++ ++/* C++ status tables. */ ++table.cxxstatus th, table.cxxstatus td { border: 1px solid gray; } ++table.cxxstatus td:nth-child(3) { text-align:center; } ++table.cxxstatus tr.separator { background: #f2f2f9; } ++ ++/* C++ Defect Report table. */ ++table.cxxdrstatus th, table.cxxdrstatus td { border: 1px solid gray; } ++table.cxxdrstatus td:nth-child(4) { text-align:center; } ++table.cxxdrstatus tr.separator { background: #f2f2f9; } ++table.cxxdrstatus { width: 65%; } ++ ++/* OpenMP status tables. */ ++table.ompstatus thead th, table.cxxstatus thead td { border: 1px solid gray; } ++table.ompstatus tbody td:nth-child(2) { text-align:center; } ++table.ompstatus thead tr { background: #f2f2f9; } ++ ++/* Padded tables. */ ++table.padding5 th, td { border: 1px solid gray; padding:5px; } ++ ++.supported { background-color: lightgreen; } ++.unsupported { background-color: lightsalmon; } ++.other { background-color: lightgray; } ++.partial { background-color: lightyellow; } ++.open { color: #AAAAAA; } ++ ++/* Online documentation. */ ++ ++pre.smallexample { ++ font-size: medium; ++ background: #f2f2f9; ++ padding: 4px; ++ display: inline-block; ++} ++ ++/* Classpath versus libgcj merge status page. */ ++ ++.classpath-only { background-color: #FFFFAA; } ++.libgcj-only { background-color: #FFFFAA; } ++.VM-specific { background-color: #CCCCFF; } ++.GCJ-specific { background-color: #CCCCFF; } ++.needsmerge { background-color: #FF9090; } ++.merged { background-color: #22FF22; } ++.merged-expected-diff { background-color: #22FF22; } ++.merged-unexpected-diff { background-color: #FF4444; } diff --cc debian/gccgo-BV-doc.doc-base index 0000000,0000000..86ce258 new file mode 100644 --- /dev/null +++ b/debian/gccgo-BV-doc.doc-base @@@ -1,0 -1,0 +1,17 @@@ ++Document: gccgo-@BV@ ++Title: The GNU Go compiler (version @BV@) ++Author: Various ++Abstract: This manual describes how to use gccgo, the GNU compiler for ++ the Go programming language. This manual is specifically about ++ gccgo. For more information about the Go programming ++ language in general, including language specifications and standard ++ package documentation, see http://golang.org/. ++Section: Programming ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/gccgo.html ++Files: /usr/share/doc/gcc-@BV@-base/gccgo.html ++ ++Format: info ++Index: /usr/share/info/gccgo-@BV@.info.gz ++Files: /usr/share/info/gccgo-@BV@* diff --cc debian/gen-libstdc-breaks.sh index 0000000,0000000..de35a4a new file mode 100755 --- /dev/null +++ b/debian/gen-libstdc-breaks.sh @@@ -1,0 -1,0 +1,178 @@@ ++#! /bin/sh ++ ++# https://bugs.debian.org/cgi-bin/pkgreport.cgi?tag=gcc-pr66145;users=debian-gcc@lists.debian.org ++ ++vendor=Debian ++if dpkg-vendor --derives-from Ubuntu; then ++ vendor=Ubuntu ++fi ++ ++if [ "$vendor" = Debian ]; then ++ : ++ pkgs=$(echo ' ++antlr ++libaqsis1 ++libassimp3 ++blockattack ++boo ++libboost-date-time1.54.0 ++libboost-date-time1.55.0 ++libcpprest2.4 ++printer-driver-brlaser ++c++-annotations ++clustalx ++libdavix0 ++libdballe6 ++dff ++libdiet-sed2.8 ++libdiet-client2.8 ++libdiet-admin2.8 ++digikam-private-libs ++emscripten ++ergo ++fceux ++flush ++libfreefem++ ++freeorion ++fslview ++fwbuilder ++libgazebo5 ++libgetfem4++ ++libgmsh2 ++gnote ++gnudatalanguage ++python-healpy ++innoextract ++libinsighttoolkit4.7 ++libdap17 ++libdapclient6 ++libdapserver7 ++libkolabxml1 ++libpqxx-4.0 ++libreoffice-core ++librime1 ++libwibble-dev ++lightspark ++libmarisa0 ++mira-assembler ++mongodb ++mongodb-server ++ncbi-blast+ ++libogre-1.8.0 ++libogre-1.9.0 ++openscad ++libopenwalnut1 ++passepartout ++pdf2djvu ++photoprint ++plastimatch ++plee-the-bear ++povray ++powertop ++psi4 ++python3-taglib ++realtimebattle ++ruby-passenger ++libapache2-mod-passenger ++schroot ++sqlitebrowser ++tecnoballz ++wesnoth-1.12-core ++widelands ++libwreport2 ++xflr5 ++libxmltooling6') ++else ++ pkgs=$(echo ' ++antlr ++libaqsis1 ++libassimp3 ++blockattack ++boo ++libboost-date-time1.55.0 ++libcpprest2.2 ++printer-driver-brlaser ++c++-annotations ++chromium-browser ++clustalx ++libdavix0 ++libdballe6 ++dff ++libdiet-sed2.8 ++libdiet-client2.8 ++libdiet-admin2.8 ++libkgeomap2 ++libmediawiki1 ++libkvkontakte1 ++emscripten ++ergo ++fceux ++flush ++libfreefem++ ++freeorion ++fslview ++fwbuilder ++libgazebo5 ++libgetfem4++ ++libgmsh2 ++gnote ++gnudatalanguage ++python-healpy ++innoextract ++libinsighttoolkit4.6 ++libdap17 ++libdapclient6 ++libdapserver7 ++libkolabxml1 ++libpqxx-4.0 ++libreoffice-core ++librime1 ++libwibble-dev ++lightspark ++libmarisa0 ++mira-assembler ++mongodb ++mongodb-server ++ncbi-blast+ ++libogre-1.8.0 ++libogre-1.9.0 ++openscad ++libopenwalnut1 ++passepartout ++pdf2djvu ++photoprint ++plastimatch ++plee-the-bear ++povray ++powertop ++psi4 ++python3-taglib ++realtimebattle ++ruby-passenger ++libapache2-mod-passenger ++sqlitebrowser ++tecnoballz ++wesnoth-1.12-core ++widelands ++libwreport2 ++xflr5 ++libxmltooling6') ++fi ++ ++fn=debian/libstdc++-breaks.$vendor ++rm -f $fn ++echo $pkgs ++for p in $pkgs; do ++ #echo $p ++ if ! apt-cache show --no-all-versions $p >/dev/null; then ++ echo "not found: $p" ++ fi ++ v=$(apt-cache show --no-all-versions $p | awk '/^Version/ {print $2}') ++ case "$p" in ++ libboost-date-time*) ++ echo "$p," >> $fn ++ ;; ++ *) ++ echo "$p (<= $v)," >> $fn ++ esac ++done diff --cc debian/gfortran-BV-CRB.preinst.in index 0000000,0000000..f6e7cfd new file mode 100644 --- /dev/null +++ b/debian/gfortran-BV-CRB.preinst.in @@@ -1,0 -1,0 +1,11 @@@ ++#!/bin/sh ++ ++set -e ++ ++if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then ++ update-alternatives --quiet --remove @TARGET@-gfortran /usr/bin/@TARGET@-gfortran-@BV@ ++fi ++ ++#DEBHELPER# ++ ++exit 0 diff --cc debian/gfortran-BV-doc.doc-base index 0000000,0000000..485d458 new file mode 100644 --- /dev/null +++ b/debian/gfortran-BV-doc.doc-base @@@ -1,0 -1,0 +1,14 @@@ ++Document: gfortran-@BV@ ++Title: The GNU Fortran Compiler ++Author: Various ++Abstract: This manual documents how to run, install and port `gfortran', ++ as well as its new features and incompatibilities, and how to report bugs. ++Section: Programming/Fortran ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html ++Files: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html ++ ++Format: info ++Index: /usr/share/info/gfortran-@BV@.info.gz ++Files: /usr/share/info/gfortran-@BV@* diff --cc debian/gm2-BV-doc.doc-base index 0000000,0000000..63315b5 new file mode 100644 --- /dev/null +++ b/debian/gm2-BV-doc.doc-base @@@ -1,0 -1,0 +1,14 @@@ ++Document: gm2-@BV@ ++Title: The GNU Modula-2 Compiler ++Author: Various ++Abstract: This manual documents how to run, install and port `gm2', ++ as well as its new features and incompatibilities, and how to report bugs. ++Section: Programming/Modula-2 ++ ++Format: html ++Index: /usr/share/doc/gcc-@BV@-base/m2/gm2-@BV@.html ++Files: /usr/share/doc/gcc-@BV@-base/m2/gm2-@BV@.html ++ ++Format: info ++Index: /usr/share/info/gm2-@BV@.info.gz ++Files: /usr/share/info/gm2-@BV@* diff --cc debian/gnat-BV-doc.doc-base.rm index 0000000,0000000..7957275 new file mode 100644 --- /dev/null +++ b/debian/gnat-BV-doc.doc-base.rm @@@ -1,0 -1,0 +1,16 @@@ ++Document: gnat-rm-@BV@ ++Title: GNAT (GNU Ada) Reference Manual ++Author: Various ++Abstract: This manual contains useful information in writing programs ++ using the GNAT compiler. It includes information on implementation ++ dependent characteristics of GNAT, including all the information ++ required by Annex M of the standard. ++Section: Programming/Ada ++ ++Format: html ++Index: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html ++Files: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html ++ ++Format: info ++Index: /usr/share/info/gnat_rm-@BV@.info.gz ++Files: /usr/share/info/gnat_rm-@BV@* diff --cc debian/gnat-BV-doc.doc-base.style index 0000000,0000000..db6dfc8 new file mode 100644 --- /dev/null +++ b/debian/gnat-BV-doc.doc-base.style @@@ -1,0 -1,0 +1,16 @@@ ++Document: gnat-style-@BV@ ++Title: GNAT Coding Style ++Author: Various ++Abstract: Most of GNAT is written in Ada using a consistent style to ++ ensure readability of the code. This document has been written to ++ help maintain this consistent style, while having a large group of ++ developers work on the compiler. ++Section: Programming/Ada ++ ++Format: html ++Index: /usr/share/doc/gnat-@BV@-doc/gnat-style.html ++Files: /usr/share/doc/gnat-@BV@-doc/gnat-style.html ++ ++Format: info ++Index: /usr/share/info/gnat-style-@BV@.info.gz ++Files: /usr/share/info/gnat-style-@BV@* diff --cc debian/gnat-BV-doc.doc-base.ug index 0000000,0000000..00dedf1 new file mode 100644 --- /dev/null +++ b/debian/gnat-BV-doc.doc-base.ug @@@ -1,0 -1,0 +1,16 @@@ ++Document: gnat-ugn-@BV@ ++Title: GNAT User's Guide for Unix Platforms ++Author: Various ++Abstract: This guide describes the use of GNAT, a compiler and ++ software development toolset for the full Ada 95 programming language. ++ It describes the features of the compiler and tools, and details how ++ to use them to build Ada 95 applications. ++Section: Programming/Ada ++ ++Format: html ++Index: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html ++Files: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html ++ ++Format: info ++Index: /usr/share/info/gnat_ugn-@BV@.info.gz ++Files: /usr/share/info/gnat_ugn-@BV@* diff --cc debian/gnat.1 index 0000000,0000000..33a42c7 new file mode 100644 --- /dev/null +++ b/debian/gnat.1 @@@ -1,0 -1,0 +1,43 @@@ ++.\" Hey, Emacs! This is an -*- nroff -*- source file. ++.\" ++.\" Copyright (C) 1996 Erick Branderhorst ++.\" Copyright (C) 2011 Nicolas Boulenguez ++.\" ++.\" This is free software; you can redistribute it and/or modify it under ++.\" the terms of the GNU General Public License as published by the Free ++.\" Software Foundation; either version 2, or (at your option) any later ++.\" version. ++.\" ++.\" This is distributed in the hope that it will be useful, but WITHOUT ++.\" ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++.\" FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++.\" for more details. ++.\" ++.\" You should have received a copy of the GNU General Public License with ++.\" your Debian GNU/Linux system, in /usr/doc/copyright/GPL, or with the ++.\" dpkg source package as the file COPYING. If not, write to the Free ++.\" Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++.\" ++.\" ++.TH "GNAT TOOLBOX" 1 "Jun 2002" "Debian Project" "Debian Linux" ++.SH NAME ++gnat, gnatbind, gnatbl, gnatchop, gnatfind, gnathtml, gnatkr, gnatlink, ++gnatls, gnatmake, gnatprep, gnatpsta, gnatpsys, gnatxref \- ++GNAT toolbox ++.SH DESCRIPTION ++Those programs are part of GNU GNAT, a freely available Ada 95 compiler. ++.PP ++For accessing the full GNAT manuals, use ++.B info gnat-ug-4.8 ++and ++.B info gnat-rm-4.8 ++for the sections related to the reference manual. ++If those sections cannot be found, you will have to install the ++gnat-4.4-doc package as well (since these manuals contain invariant parts, ++the package is located in the non-free part of the Debian archive). ++You may also browse ++.B http://gcc.gnu.org/onlinedocs ++which provides the GCC online documentation. ++.SH AUTHOR ++This manpage has been written by Samuel Tardieu , for the ++Debian GNU/Linux project. diff --cc debian/lib32asan8.symbols index 0000000,0000000..6a69087 new file mode 100644 --- /dev/null +++ b/debian/lib32asan8.symbols @@@ -1,0 -1,0 +1,7 @@@ ++libasan.so.8 lib32asan8 #MINVER# ++#include "libasan.symbols.common" ++#include "libasan.symbols.32" ++ (arch=s390x)__interceptor___tls_get_addr_internal@Base 7 ++ (arch=s390x)__interceptor___tls_get_offset@Base 7 ++ (arch=s390x)__tls_get_addr_internal@Base 7 ++ (arch=s390x)__tls_get_offset@Base 7 diff --cc debian/lib32gccLC.postinst index 0000000,0000000..0163e03 new file mode 100644 --- /dev/null +++ b/debian/lib32gccLC.postinst @@@ -1,0 -1,0 +1,12 @@@ ++#! /bin/sh -e ++ ++case "$1" in ++ configure) ++ docdir=/usr/share/doc/lib32gcc@LC@ ++ if [ -d $docdir ] && [ ! -h $docdir ]; then ++ rm -rf $docdir ++ ln -s gcc-@BV@-base $docdir ++ fi ++esac ++ ++#DEBHELPER# diff --cc debian/lib32stdc++CXX.postinst index 0000000,0000000..0ebbeb0 new file mode 100644 --- /dev/null +++ b/debian/lib32stdc++CXX.postinst @@@ -1,0 -1,0 +1,12 @@@ ++#! /bin/sh -e ++ ++case "$1" in ++ configure) ++ docdir=/usr/share/doc/lib32stdc++@CXX@ ++ if [ -d $docdir ] && [ ! -h $docdir ]; then ++ rm -rf $docdir ++ ln -s gcc-@BV@-base $docdir ++ fi ++esac ++ ++#DEBHELPER# diff --cc debian/lib64asan8.symbols index 0000000,0000000..0adeebc new file mode 100644 --- /dev/null +++ b/debian/lib64asan8.symbols @@@ -1,0 -1,0 +1,7 @@@ ++libasan.so.8 lib64asan8 #MINVER# ++#include "libasan.symbols.common" ++#include "libasan.symbols.64" ++ (arch=i386)__interceptor___tls_get_addr@Base 12 ++ (arch=i386)__interceptor_ptrace@Base 12 ++ (arch=i386)__tls_get_addr@Base 12 ++ (arch=i386)ptrace@Base 12 diff --cc debian/lib64gccLC.postinst index 0000000,0000000..f671fd6 new file mode 100644 --- /dev/null +++ b/debian/lib64gccLC.postinst @@@ -1,0 -1,0 +1,12 @@@ ++#! /bin/sh -e ++ ++case "$1" in ++ configure) ++ docdir=/usr/share/doc/lib64gcc@LC@ ++ if [ -d $docdir ] && [ ! -h $docdir ]; then ++ rm -rf $docdir ++ ln -s gcc-@BV@-base $docdir ++ fi ++esac ++ ++#DEBHELPER# diff --cc debian/lib64stdc++CXX.postinst index 0000000,0000000..1c8e979 new file mode 100644 --- /dev/null +++ b/debian/lib64stdc++CXX.postinst @@@ -1,0 -1,0 +1,12 @@@ ++#! /bin/sh -e ++ ++case "$1" in ++ configure) ++ docdir=/usr/share/doc/lib64stdc++@CXX@ ++ if [ -d $docdir ] && [ ! -h $docdir ]; then ++ rm -rf $docdir ++ ln -s gcc-@BV@-base $docdir ++ fi ++esac ++ ++#DEBHELPER# diff --cc debian/libasan.symbols.16 index 0000000,0000000..c6ae6da new file mode 100644 --- /dev/null +++ b/debian/libasan.symbols.16 @@@ -1,0 -1,0 +1,38 @@@ ++ __sanitizer_syscall_post_impl_chown16@Base 5 ++ __sanitizer_syscall_post_impl_fchown16@Base 5 ++ __sanitizer_syscall_post_impl_getegid16@Base 5 ++ __sanitizer_syscall_post_impl_geteuid16@Base 5 ++ __sanitizer_syscall_post_impl_getgid16@Base 5 ++ __sanitizer_syscall_post_impl_getgroups16@Base 5 ++ __sanitizer_syscall_post_impl_getresgid16@Base 5 ++ __sanitizer_syscall_post_impl_getresuid16@Base 5 ++ __sanitizer_syscall_post_impl_getuid16@Base 5 ++ __sanitizer_syscall_post_impl_lchown16@Base 5 ++ __sanitizer_syscall_post_impl_setfsgid16@Base 5 ++ __sanitizer_syscall_post_impl_setfsuid16@Base 5 ++ __sanitizer_syscall_post_impl_setgid16@Base 5 ++ __sanitizer_syscall_post_impl_setgroups16@Base 5 ++ __sanitizer_syscall_post_impl_setregid16@Base 5 ++ __sanitizer_syscall_post_impl_setresgid16@Base 5 ++ __sanitizer_syscall_post_impl_setresuid16@Base 5 ++ __sanitizer_syscall_post_impl_setreuid16@Base 5 ++ __sanitizer_syscall_post_impl_setuid16@Base 5 ++ __sanitizer_syscall_pre_impl_chown16@Base 5 ++ __sanitizer_syscall_pre_impl_fchown16@Base 5 ++ __sanitizer_syscall_pre_impl_getegid16@Base 5 ++ __sanitizer_syscall_pre_impl_geteuid16@Base 5 ++ __sanitizer_syscall_pre_impl_getgid16@Base 5 ++ __sanitizer_syscall_pre_impl_getgroups16@Base 5 ++ __sanitizer_syscall_pre_impl_getresgid16@Base 5 ++ __sanitizer_syscall_pre_impl_getresuid16@Base 5 ++ __sanitizer_syscall_pre_impl_getuid16@Base 5 ++ __sanitizer_syscall_pre_impl_lchown16@Base 5 ++ __sanitizer_syscall_pre_impl_setfsgid16@Base 5 ++ __sanitizer_syscall_pre_impl_setfsuid16@Base 5 ++ __sanitizer_syscall_pre_impl_setgid16@Base 5 ++ __sanitizer_syscall_pre_impl_setgroups16@Base 5 ++ __sanitizer_syscall_pre_impl_setregid16@Base 5 ++ __sanitizer_syscall_pre_impl_setresgid16@Base 5 ++ __sanitizer_syscall_pre_impl_setresuid16@Base 5 ++ __sanitizer_syscall_pre_impl_setreuid16@Base 5 ++ __sanitizer_syscall_pre_impl_setuid16@Base 5 diff --cc debian/libasan.symbols.32 index 0000000,0000000..6ba6027 new file mode 100644 --- /dev/null +++ b/debian/libasan.symbols.32 @@@ -1,0 -1,0 +1,26 @@@ ++ (arch=!ppc64 !sparc64)__interceptor_ptrace@Base 7 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZdaPvj@Base 5 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZdaPvjSt11align_val_t@Base 7 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZdlPvj@Base 5 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZdlPvjSt11align_val_t@Base 7 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_Znaj@Base 4.8 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZnajRKSt9nothrow_t@Base 4.8 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZnajSt11align_val_t@Base 7 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZnajSt11align_val_tRKSt9nothrow_t@Base 7 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_Znwj@Base 4.8 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZnwjRKSt9nothrow_t@Base 4.8 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZnwjSt11align_val_t@Base 7 ++ (arch=!arm64 !alpha !amd64 !ia64 !mips64el !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)_ZnwjSt11align_val_tRKSt9nothrow_t@Base 7 ++ (arch=s390x)_ZdaPvm@Base 7.3 ++ (arch=s390x)_ZdaPvmSt11align_val_t@Base 7.3 ++ (arch=s390x)_ZdlPvm@Base 7.3 ++ (arch=s390x)_ZdlPvmSt11align_val_t@Base 7.3 ++ (arch=s390x)_Znam@Base 7.3 ++ (arch=s390x)_ZnamRKSt9nothrow_t@Base 7.3 ++ (arch=s390x)_ZnamSt11align_val_t@Base 7.3 ++ (arch=s390x)_ZnamSt11align_val_tRKSt9nothrow_t@Base 7.3 ++ (arch=s390x)_Znwm@Base 7.3 ++ (arch=s390x)_ZnwmRKSt9nothrow_t@Base 7.3 ++ (arch=s390x)_ZnwmSt11align_val_t@Base 7.3 ++ (arch=s390x)_ZnwmSt11align_val_tRKSt9nothrow_t@Base 7.3 ++ (arch=!ppc64 !sparc64)ptrace@Base 7 diff --cc debian/libasan.symbols.64 index 0000000,0000000..708f653 new file mode 100644 --- /dev/null +++ b/debian/libasan.symbols.64 @@@ -1,0 -1,0 +1,14 @@@ ++ __interceptor_shmctl@Base 4.9 ++ _ZdaPvm@Base 5 ++ _ZdaPvmSt11align_val_t@Base 7 ++ _ZdlPvm@Base 5 ++ _ZdlPvmSt11align_val_t@Base 7 ++ _Znam@Base 4.8 ++ _ZnamRKSt9nothrow_t@Base 4.8 ++ _ZnamSt11align_val_t@Base 7 ++ _ZnamSt11align_val_tRKSt9nothrow_t@Base 7 ++ _Znwm@Base 4.8 ++ _ZnwmRKSt9nothrow_t@Base 4.8 ++ _ZnwmSt11align_val_t@Base 7 ++ _ZnwmSt11align_val_tRKSt9nothrow_t@Base 7 ++ shmctl@Base 4.9 diff --cc debian/libasan.symbols.common index 0000000,0000000..d2664d3 new file mode 100644 --- /dev/null +++ b/debian/libasan.symbols.common @@@ -1,0 -1,0 +1,1904 @@@ ++ _Unwind_RaiseException@Base 9 ++ _ZdaPv@Base 4.8 ++ _ZdaPvRKSt9nothrow_t@Base 4.8 ++ _ZdaPvSt11align_val_t@Base 7 ++ _ZdaPvSt11align_val_tRKSt9nothrow_t@Base 7 ++ _ZdlPv@Base 4.8 ++ _ZdlPvRKSt9nothrow_t@Base 4.8 ++ _ZdlPvSt11align_val_t@Base 7 ++ _ZdlPvSt11align_val_tRKSt9nothrow_t@Base 7 ++ __asan_addr_is_in_fake_stack@Base 5 ++ __asan_address_is_poisoned@Base 4.8 ++ __asan_after_dynamic_init@Base 4.8 ++ __asan_alloca_poison@Base 6.2 ++ __asan_allocas_unpoison@Base 6.2 ++ __asan_backtrace_alloc@Base 4.9 ++ __asan_backtrace_close@Base 4.9 ++ __asan_backtrace_create_state@Base 4.9 ++ __asan_backtrace_dwarf_add@Base 4.9 ++ __asan_backtrace_free@Base 4.9 ++ __asan_backtrace_get_view@Base 4.9 ++ __asan_backtrace_initialize@Base 4.9 ++ __asan_backtrace_open@Base 4.9 ++ __asan_backtrace_pcinfo@Base 4.9 ++ __asan_backtrace_qsort@Base 4.9 ++ __asan_backtrace_release_view@Base 4.9 ++ __asan_backtrace_syminfo@Base 4.9 ++ __asan_backtrace_syminfo_to_full_callback@Base 11 ++ __asan_backtrace_syminfo_to_full_error_callback@Base 11 ++ __asan_backtrace_uncompress_lzma@Base 11 ++ __asan_backtrace_uncompress_zdebug@Base 8 ++ __asan_backtrace_vector_finish@Base 4.9 ++ __asan_backtrace_vector_grow@Base 4.9 ++ __asan_backtrace_vector_release@Base 4.9 ++ __asan_before_dynamic_init@Base 4.8 ++ __asan_cplus_demangle_builtin_types@Base 4.9 ++ __asan_cplus_demangle_fill_ctor@Base 4.9 ++ __asan_cplus_demangle_fill_dtor@Base 4.9 ++ __asan_cplus_demangle_fill_extended_operator@Base 4.9 ++ __asan_cplus_demangle_fill_name@Base 4.9 ++ __asan_cplus_demangle_init_info@Base 4.9 ++ __asan_cplus_demangle_mangled_name@Base 4.9 ++ __asan_cplus_demangle_operators@Base 4.9 ++ __asan_cplus_demangle_print@Base 4.9 ++ __asan_cplus_demangle_print_callback@Base 4.9 ++ __asan_cplus_demangle_type@Base 4.9 ++ __asan_cplus_demangle_v3@Base 4.9 ++ __asan_cplus_demangle_v3_callback@Base 4.9 ++ __asan_default_options@Base 8 ++ __asan_default_suppressions@Base 8 ++ __asan_describe_address@Base 4.8 ++ __asan_exp_load16@Base 6.2 ++ __asan_exp_load1@Base 6.2 ++ __asan_exp_load2@Base 6.2 ++ __asan_exp_load4@Base 6.2 ++ __asan_exp_load8@Base 6.2 ++ __asan_exp_loadN@Base 6.2 ++ __asan_exp_store16@Base 6.2 ++ __asan_exp_store1@Base 6.2 ++ __asan_exp_store2@Base 6.2 ++ __asan_exp_store4@Base 6.2 ++ __asan_exp_store8@Base 6.2 ++ __asan_exp_storeN@Base 6.2 ++ __asan_get_alloc_stack@Base 5 ++ __asan_get_current_fake_stack@Base 5 ++ __asan_get_free_stack@Base 5 ++ __asan_get_report_access_size@Base 5 ++ __asan_get_report_access_type@Base 5 ++ __asan_get_report_address@Base 5 ++ __asan_get_report_bp@Base 5 ++ __asan_get_report_description@Base 5 ++ __asan_get_report_pc@Base 5 ++ __asan_get_report_sp@Base 5 ++ __asan_get_shadow_mapping@Base 5 ++ __asan_handle_no_return@Base 4.8 ++ __asan_handle_vfork@Base 10 ++ __asan_init@Base 6.2 ++ __asan_internal_memcmp@Base 4.9 ++ __asan_internal_memcpy@Base 4.9 ++ __asan_internal_memset@Base 4.9 ++ __asan_internal_strcmp@Base 4.9 ++ __asan_internal_strlen@Base 4.9 ++ __asan_internal_strncmp@Base 4.9 ++ __asan_internal_strnlen@Base 4.9 ++ __asan_is_gnu_v3_mangled_ctor@Base 4.9 ++ __asan_is_gnu_v3_mangled_dtor@Base 4.9 ++ __asan_java_demangle_v3@Base 4.9 ++ __asan_java_demangle_v3_callback@Base 4.9 ++ __asan_load16@Base 5 ++ __asan_load16_noabort@Base 6.2 ++ __asan_load1@Base 5 ++ __asan_load1_noabort@Base 6.2 ++ __asan_load2@Base 5 ++ __asan_load2_noabort@Base 6.2 ++ __asan_load4@Base 5 ++ __asan_load4_noabort@Base 6.2 ++ __asan_load8@Base 5 ++ __asan_load8_noabort@Base 6.2 ++ __asan_loadN@Base 5 ++ __asan_loadN_noabort@Base 6.2 ++ __asan_load_cxx_array_cookie@Base 5 ++ __asan_locate_address@Base 5 ++ __asan_memcpy@Base 5 ++ __asan_memmove@Base 5 ++ __asan_memset@Base 5 ++ __asan_on_error@Base 8 ++ __asan_option_detect_stack_use_after_return@Base 4.9 ++ __asan_poison_cxx_array_cookie@Base 5 ++ __asan_poison_intra_object_redzone@Base 5 ++ __asan_poison_memory_region@Base 4.8 ++ __asan_poison_stack_memory@Base 4.8 ++ __asan_print_accumulated_stats@Base 4.8 ++ __asan_region_is_poisoned@Base 4.8 ++ __asan_register_elf_globals@Base 8 ++ __asan_register_globals@Base 4.8 ++ __asan_register_image_globals@Base 7 ++ __asan_report_error@Base 4.8 ++ __asan_report_exp_load16@Base 6.2 ++ __asan_report_exp_load1@Base 6.2 ++ __asan_report_exp_load2@Base 6.2 ++ __asan_report_exp_load4@Base 6.2 ++ __asan_report_exp_load8@Base 6.2 ++ __asan_report_exp_load_n@Base 6.2 ++ __asan_report_exp_store16@Base 6.2 ++ __asan_report_exp_store1@Base 6.2 ++ __asan_report_exp_store2@Base 6.2 ++ __asan_report_exp_store4@Base 6.2 ++ __asan_report_exp_store8@Base 6.2 ++ __asan_report_exp_store_n@Base 6.2 ++ __asan_report_load16@Base 4.8 ++ __asan_report_load16_noabort@Base 6.2 ++ __asan_report_load1@Base 4.8 ++ __asan_report_load1_noabort@Base 6.2 ++ __asan_report_load2@Base 4.8 ++ __asan_report_load2_noabort@Base 6.2 ++ __asan_report_load4@Base 4.8 ++ __asan_report_load4_noabort@Base 6.2 ++ __asan_report_load8@Base 4.8 ++ __asan_report_load8_noabort@Base 6.2 ++ __asan_report_load_n@Base 4.8 ++ __asan_report_load_n_noabort@Base 6.2 ++ __asan_report_present@Base 5 ++ __asan_report_store16@Base 4.8 ++ __asan_report_store16_noabort@Base 6.2 ++ __asan_report_store1@Base 4.8 ++ __asan_report_store1_noabort@Base 6.2 ++ __asan_report_store2@Base 4.8 ++ __asan_report_store2_noabort@Base 6.2 ++ __asan_report_store4@Base 4.8 ++ __asan_report_store4_noabort@Base 6.2 ++ __asan_report_store8@Base 4.8 ++ __asan_report_store8_noabort@Base 6.2 ++ __asan_report_store_n@Base 4.8 ++ __asan_report_store_n_noabort@Base 6.2 ++ __asan_rt_version@Base 5 ++ __asan_set_death_callback@Base 4.8 ++ __asan_set_error_report_callback@Base 4.8 ++ __asan_set_shadow_00@Base 7 ++ __asan_set_shadow_f1@Base 7 ++ __asan_set_shadow_f2@Base 7 ++ __asan_set_shadow_f3@Base 7 ++ __asan_set_shadow_f5@Base 7 ++ __asan_set_shadow_f8@Base 7 ++ __asan_shadow_memory_dynamic_address@Base 7 ++ __asan_stack_free_0@Base 4.9 ++ __asan_stack_free_10@Base 4.9 ++ __asan_stack_free_1@Base 4.9 ++ __asan_stack_free_2@Base 4.9 ++ __asan_stack_free_3@Base 4.9 ++ __asan_stack_free_4@Base 4.9 ++ __asan_stack_free_5@Base 4.9 ++ __asan_stack_free_6@Base 4.9 ++ __asan_stack_free_7@Base 4.9 ++ __asan_stack_free_8@Base 4.9 ++ __asan_stack_free_9@Base 4.9 ++ __asan_stack_malloc_0@Base 4.9 ++ __asan_stack_malloc_10@Base 4.9 ++ __asan_stack_malloc_1@Base 4.9 ++ __asan_stack_malloc_2@Base 4.9 ++ __asan_stack_malloc_3@Base 4.9 ++ __asan_stack_malloc_4@Base 4.9 ++ __asan_stack_malloc_5@Base 4.9 ++ __asan_stack_malloc_6@Base 4.9 ++ __asan_stack_malloc_7@Base 4.9 ++ __asan_stack_malloc_8@Base 4.9 ++ __asan_stack_malloc_9@Base 4.9 ++ __asan_stack_malloc_always_0@Base 12 ++ __asan_stack_malloc_always_10@Base 12 ++ __asan_stack_malloc_always_1@Base 12 ++ __asan_stack_malloc_always_2@Base 12 ++ __asan_stack_malloc_always_3@Base 12 ++ __asan_stack_malloc_always_4@Base 12 ++ __asan_stack_malloc_always_5@Base 12 ++ __asan_stack_malloc_always_6@Base 12 ++ __asan_stack_malloc_always_7@Base 12 ++ __asan_stack_malloc_always_8@Base 12 ++ __asan_stack_malloc_always_9@Base 12 ++ __asan_store16@Base 5 ++ __asan_store16_noabort@Base 6.2 ++ __asan_store1@Base 5 ++ __asan_store1_noabort@Base 6.2 ++ __asan_store2@Base 5 ++ __asan_store2_noabort@Base 6.2 ++ __asan_store4@Base 5 ++ __asan_store4_noabort@Base 6.2 ++ __asan_store8@Base 5 ++ __asan_store8_noabort@Base 6.2 ++ __asan_storeN@Base 5 ++ __asan_storeN_noabort@Base 6.2 ++ __asan_test_only_reported_buggy_pointer@Base 5 ++ __asan_unpoison_intra_object_redzone@Base 5 ++ __asan_unpoison_memory_region@Base 4.8 ++ __asan_unpoison_stack_memory@Base 4.8 ++ __asan_unregister_elf_globals@Base 8 ++ __asan_unregister_globals@Base 4.8 ++ __asan_unregister_image_globals@Base 7 ++ __asan_update_allocation_context@Base 10 ++ __asan_version_mismatch_check_v8@Base 7 ++ __bzero@Base 10 ++ __cxa_atexit@Base 4.9 ++ __cxa_throw@Base 4.8 ++ __fprintf_chk@Base 9 ++ __getdelim@Base 5 ++ __interceptor__Unwind_RaiseException@Base 9 ++ __interceptor___bzero@Base 10 ++ __interceptor___cxa_atexit@Base 4.9 ++ __interceptor___cxa_throw@Base 4.8 ++ __interceptor___fprintf_chk@Base 9 ++ __interceptor___getdelim@Base 5 ++ __interceptor___isoc99_fprintf@Base 5 ++ __interceptor___isoc99_fscanf@Base 4.8 ++ __interceptor___isoc99_printf@Base 5 ++ __interceptor___isoc99_scanf@Base 4.8 ++ __interceptor___isoc99_snprintf@Base 5 ++ __interceptor___isoc99_sprintf@Base 5 ++ __interceptor___isoc99_sscanf@Base 4.8 ++ __interceptor___isoc99_vfprintf@Base 5 ++ __interceptor___isoc99_vfscanf@Base 4.8 ++ __interceptor___isoc99_vprintf@Base 5 ++ __interceptor___isoc99_vscanf@Base 4.8 ++ __interceptor___isoc99_vsnprintf@Base 5 ++ __interceptor___isoc99_vsprintf@Base 5 ++ __interceptor___isoc99_vsscanf@Base 4.8 ++ __interceptor___libc_memalign@Base 4.8 ++ __interceptor___longjmp_chk@Base 8 ++ __interceptor___lxstat64@Base 7 ++ __interceptor___lxstat@Base 7 ++ __interceptor___overflow@Base 5 ++ __interceptor___pthread_mutex_lock@Base 9 ++ __interceptor___pthread_mutex_unlock@Base 9 ++ __interceptor___snprintf_chk@Base 9 ++ __interceptor___sprintf_chk@Base 9 ++ __interceptor___strdup@Base 7 ++ __interceptor___strndup@Base 8 ++ __interceptor___strxfrm_l@Base 9 ++ __interceptor___uflow@Base 5 ++ __interceptor___underflow@Base 5 ++ __interceptor___vsnprintf_chk@Base 9 ++ __interceptor___vsprintf_chk@Base 9 ++ __interceptor___wcsxfrm_l@Base 9 ++ __interceptor___woverflow@Base 5 ++ __interceptor___wuflow@Base 5 ++ __interceptor___wunderflow@Base 5 ++ __interceptor___xpg_strerror_r@Base 4.9 ++ __interceptor___xstat64@Base 7 ++ __interceptor___xstat@Base 7 ++ __interceptor__exit@Base 4.9 ++ __interceptor__longjmp@Base 4.8 ++ __interceptor__obstack_begin@Base 5 ++ __interceptor__obstack_begin_1@Base 5 ++ __interceptor__obstack_newchunk@Base 5 ++ __interceptor_accept4@Base 4.9 ++ __interceptor_accept@Base 4.9 ++ __interceptor_aligned_alloc@Base 5 ++ __interceptor_asctime@Base 4.8 ++ __interceptor_asctime_r@Base 4.8 ++ __interceptor_asprintf@Base 5 ++ __interceptor_atoi@Base 4.8 ++ __interceptor_atol@Base 4.8 ++ __interceptor_atoll@Base 4.8 ++ __interceptor_backtrace@Base 4.9 ++ __interceptor_backtrace_symbols@Base 4.9 ++ __interceptor_bcmp@Base 10 ++ __interceptor_bsearch@Base 12 ++ __interceptor_bzero@Base 10 ++ __interceptor_calloc@Base 4.8 ++ __interceptor_canonicalize_file_name@Base 4.9 ++ __interceptor_capget@Base 5 ++ __interceptor_capset@Base 5 ++ __interceptor_cfree@Base 4.8 ++ __interceptor_clock_getcpuclockid@Base 11 ++ __interceptor_clock_getres@Base 4.9 ++ __interceptor_clock_gettime@Base 4.9 ++ __interceptor_clock_settime@Base 4.9 ++ __interceptor_confstr@Base 4.9 ++ __interceptor_crypt@Base 10 ++ __interceptor_crypt_r@Base 10 ++ __interceptor_ctermid@Base 7 ++ __interceptor_ctime@Base 4.8 ++ __interceptor_ctime_r@Base 4.8 ++ __interceptor_dlclose@Base 5 ++ __interceptor_dlopen@Base 5 ++ __interceptor_drand48_r@Base 4.9 ++ __interceptor_endgrent@Base 5 ++ __interceptor_endpwent@Base 5 ++ __interceptor_ether_aton@Base 4.9 ++ __interceptor_ether_aton_r@Base 4.9 ++ __interceptor_ether_hostton@Base 4.9 ++ __interceptor_ether_line@Base 4.9 ++ __interceptor_ether_ntoa@Base 4.9 ++ __interceptor_ether_ntoa_r@Base 4.9 ++ __interceptor_ether_ntohost@Base 4.9 ++ __interceptor_eventfd_read@Base 7 ++ __interceptor_eventfd_write@Base 7 ++ __interceptor_fclose@Base 5 ++ __interceptor_fdopen@Base 5 ++ __interceptor_fflush@Base 5 ++ __interceptor_fgetgrent@Base 5 ++ __interceptor_fgetgrent_r@Base 5 ++ __interceptor_fgetpwent@Base 5 ++ __interceptor_fgetpwent_r@Base 5 ++ __interceptor_fgets@Base 9 ++ __interceptor_fgetxattr@Base 5 ++ __interceptor_flistxattr@Base 5 ++ __interceptor_fmemopen@Base 5 ++ __interceptor_fopen64@Base 5 ++ __interceptor_fopen@Base 5 ++ __interceptor_fopencookie@Base 6.2 ++ __interceptor_fprintf@Base 5 ++ __interceptor_fputs@Base 9 ++ __interceptor_fread@Base 8 ++ __interceptor_free@Base 4.8 ++ __interceptor_freopen64@Base 5 ++ __interceptor_freopen@Base 5 ++ __interceptor_frexp@Base 4.9 ++ __interceptor_frexpf@Base 4.9 ++ __interceptor_frexpl@Base 4.9 ++ __interceptor_fscanf@Base 4.8 ++ __interceptor_fstatfs64@Base 4.9 ++ __interceptor_fstatfs@Base 4.9 ++ __interceptor_fstatvfs64@Base 4.9 ++ __interceptor_fstatvfs@Base 4.9 ++ __interceptor_ftime@Base 5 ++ __interceptor_fwrite@Base 8 ++ __interceptor_get_current_dir_name@Base 4.9 ++ __interceptor_getaddrinfo@Base 4.9 ++ __interceptor_getcwd@Base 4.9 ++ __interceptor_getdelim@Base 4.9 ++ __interceptor_getgrent@Base 5 ++ __interceptor_getgrent_r@Base 5 ++ __interceptor_getgrgid@Base 4.9 ++ __interceptor_getgrgid_r@Base 4.9 ++ __interceptor_getgrnam@Base 4.9 ++ __interceptor_getgrnam_r@Base 4.9 ++ __interceptor_getgrouplist@Base 12 ++ __interceptor_getgroups@Base 4.9 ++ __interceptor_gethostbyaddr@Base 4.9 ++ __interceptor_gethostbyaddr_r@Base 4.9 ++ __interceptor_gethostbyname2@Base 4.9 ++ __interceptor_gethostbyname2_r@Base 4.9 ++ __interceptor_gethostbyname@Base 4.9 ++ __interceptor_gethostbyname_r@Base 4.9 ++ __interceptor_gethostent@Base 4.9 ++ __interceptor_gethostent_r@Base 4.9 ++ __interceptor_getifaddrs@Base 5 ++ __interceptor_getitimer@Base 4.9 ++ __interceptor_getline@Base 4.9 ++ __interceptor_getloadavg@Base 8 ++ __interceptor_getmntent@Base 4.9 ++ __interceptor_getmntent_r@Base 4.9 ++ __interceptor_getnameinfo@Base 4.9 ++ __interceptor_getnetbyaddr@Base 12 ++ __interceptor_getnetbyname@Base 12 ++ __interceptor_getnetent@Base 12 ++ __interceptor_getpass@Base 5 ++ __interceptor_getpeername@Base 4.9 ++ __interceptor_getprotobyname@Base 11 ++ __interceptor_getprotobyname_r@Base 11 ++ __interceptor_getprotobynumber@Base 11 ++ __interceptor_getprotobynumber_r@Base 11 ++ __interceptor_getprotoent@Base 11 ++ __interceptor_getprotoent_r@Base 11 ++ __interceptor_getpwent@Base 5 ++ __interceptor_getpwent_r@Base 5 ++ __interceptor_getpwnam@Base 4.9 ++ __interceptor_getpwnam_r@Base 4.9 ++ __interceptor_getpwuid@Base 4.9 ++ __interceptor_getpwuid_r@Base 4.9 ++ __interceptor_getrandom@Base 10 ++ __interceptor_getresgid@Base 5 ++ __interceptor_getresuid@Base 5 ++ __interceptor_getsockname@Base 4.9 ++ __interceptor_getsockopt@Base 4.9 ++ __interceptor_getusershell@Base 10 ++ __interceptor_getutent@Base 8 ++ __interceptor_getutid@Base 8 ++ __interceptor_getutline@Base 8 ++ __interceptor_getutxent@Base 8 ++ __interceptor_getutxid@Base 8 ++ __interceptor_getutxline@Base 8 ++ __interceptor_getxattr@Base 5 ++ __interceptor_glob64@Base 4.9 ++ __interceptor_glob@Base 4.9 ++ __interceptor_gmtime@Base 4.8 ++ __interceptor_gmtime_r@Base 4.8 ++ __interceptor_iconv@Base 4.9 ++ __interceptor_if_indextoname@Base 5 ++ __interceptor_if_nametoindex@Base 5 ++ __interceptor_index@Base 4.8 ++ __interceptor_inet_aton@Base 4.9 ++ __interceptor_inet_ntop@Base 4.9 ++ __interceptor_inet_pton@Base 4.9 ++ __interceptor_initgroups@Base 4.9 ++ __interceptor_ioctl@Base 4.9 ++ __interceptor_lgamma@Base 4.9 ++ __interceptor_lgamma_r@Base 4.9 ++ __interceptor_lgammaf@Base 4.9 ++ __interceptor_lgammaf_r@Base 4.9 ++ __interceptor_lgammal@Base 4.9 ++ __interceptor_lgammal_r@Base 4.9 ++ __interceptor_lgetxattr@Base 5 ++ __interceptor_listxattr@Base 5 ++ __interceptor_llistxattr@Base 5 ++ __interceptor_localtime@Base 4.8 ++ __interceptor_localtime_r@Base 4.8 ++ __interceptor_longjmp@Base 4.8 ++ __interceptor_lrand48_r@Base 4.9 ++ __interceptor_lstat@Base 12 ++ __interceptor_mallinfo@Base 4.8 ++ __interceptor_malloc@Base 4.8 ++ __interceptor_malloc_stats@Base 4.8 ++ __interceptor_malloc_usable_size@Base 4.8 ++ __interceptor_mallopt@Base 4.8 ++ __interceptor_mbsnrtowcs@Base 4.9 ++ __interceptor_mbsrtowcs@Base 4.9 ++ __interceptor_mbstowcs@Base 4.9 ++ __interceptor_mcheck@Base 8 ++ __interceptor_mcheck_pedantic@Base 8 ++ __interceptor_memalign@Base 4.8 ++ __interceptor_memchr@Base 5 ++ __interceptor_memcmp@Base 4.8 ++ __interceptor_memcpy@Base 4.8 ++ __interceptor_memmem@Base 7 ++ __interceptor_memmove@Base 4.8 ++ __interceptor_memrchr@Base 5 ++ __interceptor_memset@Base 4.8 ++ __interceptor_mincore@Base 6.2 ++ __interceptor_mktime@Base 5 ++ __interceptor_mlock@Base 4.8 ++ __interceptor_mlockall@Base 4.8 ++ __interceptor_mmap64@Base 9 ++ __interceptor_mmap@Base 9 ++ __interceptor_modf@Base 4.9 ++ __interceptor_modff@Base 4.9 ++ __interceptor_modfl@Base 4.9 ++ __interceptor_mprobe@Base 8 ++ __interceptor_mprotect@Base 9 ++ __interceptor_msgrcv@Base 11 ++ __interceptor_msgsnd@Base 11 ++ __interceptor_munlock@Base 4.8 ++ __interceptor_munlockall@Base 4.8 ++ __interceptor_name_to_handle_at@Base 9 ++ __interceptor_open_by_handle_at@Base 9 ++ __interceptor_open_memstream@Base 5 ++ __interceptor_open_wmemstream@Base 5 ++ __interceptor_opendir@Base 6.2 ++ __interceptor_pclose@Base 10 ++ __interceptor_poll@Base 4.9 ++ __interceptor_popen@Base 10 ++ __interceptor_posix_memalign@Base 4.8 ++ __interceptor_posix_spawn@Base 12 ++ __interceptor_posix_spawnp@Base 12 ++ __interceptor_ppoll@Base 4.9 ++ __interceptor_prctl@Base 4.8 ++ __interceptor_pread64@Base 4.8 ++ __interceptor_pread@Base 4.8 ++ __interceptor_preadv64@Base 4.9 ++ __interceptor_preadv@Base 4.9 ++ __interceptor_printf@Base 5 ++ __interceptor_process_vm_readv@Base 6.2 ++ __interceptor_process_vm_writev@Base 6.2 ++ __interceptor_pthread_attr_getaffinity_np@Base 4.9 ++ __interceptor_pthread_attr_getdetachstate@Base 4.9 ++ __interceptor_pthread_attr_getguardsize@Base 4.9 ++ __interceptor_pthread_attr_getinheritsched@Base 4.9 ++ __interceptor_pthread_attr_getschedparam@Base 4.9 ++ __interceptor_pthread_attr_getschedpolicy@Base 4.9 ++ __interceptor_pthread_attr_getscope@Base 4.9 ++ __interceptor_pthread_attr_getstack@Base 4.9 ++ __interceptor_pthread_attr_getstacksize@Base 4.9 ++ __interceptor_pthread_barrierattr_getpshared@Base 5 ++ __interceptor_pthread_condattr_getclock@Base 5 ++ __interceptor_pthread_condattr_getpshared@Base 5 ++ __interceptor_pthread_create@Base 4.8 ++ __interceptor_pthread_getcpuclockid@Base 12 ++ __interceptor_pthread_getname_np@Base 9 ++ __interceptor_pthread_getschedparam@Base 4.9 ++ __interceptor_pthread_join@Base 6.2 ++ __interceptor_pthread_mutex_lock@Base 4.9 ++ __interceptor_pthread_mutex_unlock@Base 4.9 ++ __interceptor_pthread_mutexattr_getprioceiling@Base 5 ++ __interceptor_pthread_mutexattr_getprotocol@Base 5 ++ __interceptor_pthread_mutexattr_getpshared@Base 5 ++ __interceptor_pthread_mutexattr_getrobust@Base 5 ++ __interceptor_pthread_mutexattr_getrobust_np@Base 5 ++ __interceptor_pthread_mutexattr_gettype@Base 5 ++ __interceptor_pthread_rwlockattr_getkind_np@Base 5 ++ __interceptor_pthread_rwlockattr_getpshared@Base 5 ++ __interceptor_pthread_setcancelstate@Base 6.2 ++ __interceptor_pthread_setcanceltype@Base 6.2 ++ __interceptor_pthread_setname_np@Base 4.9 ++ __interceptor_pthread_sigmask@Base 10 ++ __interceptor_pvalloc@Base 4.8 ++ __interceptor_ptsname@Base 11 ++ __interceptor_ptsname_r@Base 11 ++ __interceptor_puts@Base 9 ++ __interceptor_pututxline@Base 10 ++ __interceptor_pwrite64@Base 4.8 ++ __interceptor_pwrite@Base 4.8 ++ __interceptor_pwritev64@Base 4.9 ++ __interceptor_pwritev@Base 4.9 ++ __interceptor_qsort@Base 11 ++ __interceptor_qsort_r@Base 11 ++ __interceptor_rand_r@Base 5 ++ __interceptor_random_r@Base 4.9 ++ __interceptor_read@Base 4.8 ++ __interceptor_readdir64@Base 4.9 ++ __interceptor_readdir64_r@Base 4.9 ++ __interceptor_readdir@Base 4.9 ++ __interceptor_readdir_r@Base 4.9 ++ __interceptor_readlink@Base 9 ++ __interceptor_readlinkat@Base 9 ++ __interceptor_readv@Base 4.9 ++ __interceptor_realloc@Base 4.8 ++ __interceptor_reallocarray@Base 10 ++ __interceptor_realpath@Base 4.9 ++ __interceptor_recv@Base 7 ++ __interceptor_recvfrom@Base 7 ++ __interceptor_recvmmsg@Base 9 ++ __interceptor_recvmsg@Base 4.9 ++ __interceptor_regcomp@Base 10 ++ __interceptor_regerror@Base 10 ++ __interceptor_regexec@Base 10 ++ __interceptor_regfree@Base 10 ++ __interceptor_remquo@Base 4.9 ++ __interceptor_remquof@Base 4.9 ++ __interceptor_remquol@Base 4.9 ++ __interceptor_scandir64@Base 4.9 ++ __interceptor_scandir@Base 4.9 ++ __interceptor_scanf@Base 4.8 ++ __interceptor_sched_getaffinity@Base 4.9 ++ __interceptor_sched_getparam@Base 6.2 ++ __interceptor_sem_destroy@Base 6.2 ++ __interceptor_sem_getvalue@Base 6.2 ++ __interceptor_sem_init@Base 6.2 ++ __interceptor_sem_open@Base 12 ++ __interceptor_sem_post@Base 6.2 ++ __interceptor_sem_timedwait@Base 6.2 ++ __interceptor_sem_trywait@Base 6.2 ++ __interceptor_sem_unlink@Base 12 ++ __interceptor_sem_wait@Base 6.2 ++ __interceptor_send@Base 7 ++ __interceptor_sendmmsg@Base 9 ++ __interceptor_sendmsg@Base 7 ++ __interceptor_sendto@Base 7 ++ __interceptor_setbuf@Base 10 ++ __interceptor_setbuffer@Base 10 ++ __interceptor_setgrent@Base 5 ++ __interceptor_setitimer@Base 4.9 ++ __interceptor_setlinebuf@Base 10 ++ __interceptor_setlocale@Base 4.9 ++ __interceptor_setpwent@Base 5 ++ __interceptor_setvbuf@Base 10 ++ __interceptor_sigaction@Base 4.8 ++ __interceptor_sigaltstack@Base 11 ++ __interceptor_sigandset@Base 11 ++ __interceptor_sigemptyset@Base 4.9 ++ __interceptor_sigfillset@Base 4.9 ++ __interceptor_siglongjmp@Base 4.8 ++ __interceptor_signal@Base 4.8 ++ __interceptor_sigorset@Base 11 ++ __interceptor_sigpending@Base 4.9 ++ __interceptor_sigprocmask@Base 4.9 ++ __interceptor_sigtimedwait@Base 4.9 ++ __interceptor_sigwait@Base 4.9 ++ __interceptor_sigwaitinfo@Base 4.9 ++ __interceptor_sincos@Base 4.9 ++ __interceptor_sincosf@Base 4.9 ++ __interceptor_sincosl@Base 4.9 ++ __interceptor_snprintf@Base 5 ++ __interceptor_sprintf@Base 5 ++ __interceptor_sscanf@Base 4.8 ++ __interceptor_stat@Base 12 ++ __interceptor_statfs64@Base 4.9 ++ __interceptor_statfs@Base 4.9 ++ __interceptor_statvfs64@Base 4.9 ++ __interceptor_statvfs@Base 4.9 ++ __interceptor_strcasecmp@Base 4.8 ++ __interceptor_strcasestr@Base 6.2 ++ __interceptor_strcat@Base 4.8 ++ __interceptor_strchr@Base 4.8 ++ __interceptor_strchrnul@Base 7 ++ __interceptor_strcmp@Base 4.8 ++ __interceptor_strcpy@Base 4.8 ++ __interceptor_strcspn@Base 6.2 ++ __interceptor_strdup@Base 4.8 ++ __interceptor_strerror@Base 4.9 ++ __interceptor_strerror_r@Base 4.9 ++ __interceptor_strlen@Base 4.8 ++ __interceptor_strncasecmp@Base 4.8 ++ __interceptor_strncat@Base 4.8 ++ __interceptor_strncmp@Base 4.8 ++ __interceptor_strncpy@Base 4.8 ++ __interceptor_strndup@Base 8 ++ __interceptor_strnlen@Base 4.8 ++ __interceptor_strpbrk@Base 6.2 ++ __interceptor_strptime@Base 4.9 ++ __interceptor_strrchr@Base 7 ++ __interceptor_strspn@Base 6.2 ++ __interceptor_strstr@Base 6.2 ++ __interceptor_strtoimax@Base 4.9 ++ __interceptor_strtok@Base 8 ++ __interceptor_strtol@Base 4.8 ++ __interceptor_strtoll@Base 4.8 ++ __interceptor_strtoumax@Base 4.9 ++ __interceptor_strxfrm@Base 9 ++ __interceptor_strxfrm_l@Base 9 ++ __interceptor_swapcontext@Base 4.8 ++ __interceptor_sysinfo@Base 4.9 ++ __interceptor_tcgetattr@Base 4.9 ++ __interceptor_tempnam@Base 4.9 ++ __interceptor_textdomain@Base 4.9 ++ __interceptor_time@Base 4.9 ++ __interceptor_timerfd_gettime@Base 5 ++ __interceptor_timerfd_settime@Base 5 ++ __interceptor_times@Base 4.9 ++ __interceptor_tmpnam@Base 4.9 ++ __interceptor_tmpnam_r@Base 4.9 ++ __interceptor_tsearch@Base 5 ++ __interceptor_ttyname@Base 10 ++ __interceptor_ttyname_r@Base 7 ++ __interceptor_uname@Base 11 ++ __interceptor_valloc@Base 4.8 ++ __interceptor_vasprintf@Base 5 ++ (arch=armel arm64 any-i386 any-amd64)__interceptor_vfork@Base 10 ++ __interceptor_vfprintf@Base 5 ++ __interceptor_vfscanf@Base 4.8 ++ __interceptor_vprintf@Base 5 ++ __interceptor_vscanf@Base 4.8 ++ __interceptor_vsnprintf@Base 5 ++ __interceptor_vsprintf@Base 5 ++ __interceptor_vsscanf@Base 4.8 ++ __interceptor_wait3@Base 4.9 ++ __interceptor_wait4@Base 4.9 ++ __interceptor_wait@Base 4.9 ++ __interceptor_waitid@Base 4.9 ++ __interceptor_waitpid@Base 4.9 ++ __interceptor_wcrtomb@Base 6.2 ++ __interceptor_wcscat@Base 8 ++ __interceptor_wcsdup@Base 10 ++ __interceptor_wcslen@Base 4.9 ++ __interceptor_wcsncat@Base 8 ++ __interceptor_wcsnlen@Base 8 ++ __interceptor_wcsnrtombs@Base 4.9 ++ __interceptor_wcsrtombs@Base 4.9 ++ __interceptor_wcstombs@Base 4.9 ++ __interceptor_wcsxfrm@Base 9 ++ __interceptor_wcsxfrm_l@Base 9 ++ __interceptor_wctomb@Base 10 ++ __interceptor_wordexp@Base 4.9 ++ __interceptor_write@Base 4.8 ++ __interceptor_writev@Base 4.9 ++ __interceptor_xdr_bool@Base 5 ++ __interceptor_xdr_bytes@Base 5 ++ __interceptor_xdr_char@Base 5 ++ __interceptor_xdr_destroy@Base 11 ++ __interceptor_xdr_double@Base 5 ++ __interceptor_xdr_enum@Base 5 ++ __interceptor_xdr_float@Base 5 ++ __interceptor_xdr_hyper@Base 5 ++ __interceptor_xdr_int16_t@Base 5 ++ __interceptor_xdr_int32_t@Base 5 ++ __interceptor_xdr_int64_t@Base 5 ++ __interceptor_xdr_int8_t@Base 5 ++ __interceptor_xdr_int@Base 5 ++ __interceptor_xdr_long@Base 5 ++ __interceptor_xdr_longlong_t@Base 5 ++ __interceptor_xdr_quad_t@Base 5 ++ __interceptor_xdr_short@Base 5 ++ __interceptor_xdr_string@Base 5 ++ __interceptor_xdr_u_char@Base 5 ++ __interceptor_xdr_u_hyper@Base 5 ++ __interceptor_xdr_u_int@Base 5 ++ __interceptor_xdr_u_long@Base 5 ++ __interceptor_xdr_u_longlong_t@Base 5 ++ __interceptor_xdr_u_quad_t@Base 5 ++ __interceptor_xdr_u_short@Base 5 ++ __interceptor_xdr_uint16_t@Base 5 ++ __interceptor_xdr_uint32_t@Base 5 ++ __interceptor_xdr_uint64_t@Base 5 ++ __interceptor_xdr_uint8_t@Base 5 ++ __interceptor_xdrmem_create@Base 5 ++ __interceptor_xdrrec_create@Base 11 ++ __interceptor_xdrstdio_create@Base 5 ++ __isoc99_fprintf@Base 5 ++ __isoc99_fscanf@Base 4.8 ++ __isoc99_printf@Base 5 ++ __isoc99_scanf@Base 4.8 ++ __isoc99_snprintf@Base 5 ++ __isoc99_sprintf@Base 5 ++ __isoc99_sscanf@Base 4.8 ++ __isoc99_vfprintf@Base 5 ++ __isoc99_vfscanf@Base 4.8 ++ __isoc99_vprintf@Base 5 ++ __isoc99_vscanf@Base 4.8 ++ __isoc99_vsnprintf@Base 5 ++ __isoc99_vsprintf@Base 5 ++ __isoc99_vsscanf@Base 4.8 ++ __libc_memalign@Base 4.8 ++ __longjmp_chk@Base 8 ++ __lsan_default_options@Base 11 ++ __lsan_disable@Base 4.9 ++ __lsan_do_leak_check@Base 4.9 ++ __lsan_do_recoverable_leak_check@Base 6.2 ++ __lsan_enable@Base 4.9 ++ __lsan_ignore_object@Base 4.9 ++ __lsan_register_root_region@Base 5 ++ __lsan_unregister_root_region@Base 5 ++ __lxstat64@Base 7 ++ __lxstat@Base 7 ++ __overflow@Base 5 ++ __pthread_mutex_lock@Base 9 ++ __pthread_mutex_unlock@Base 9 ++ __sancov_default_options@Base 8 ++ __sancov_lowest_stack@Base 8 ++ __sanitizer_acquire_crash_state@Base 9 ++ __sanitizer_annotate_contiguous_container@Base 4.9 ++ __sanitizer_contiguous_container_find_bad_address@Base 6.2 ++ __sanitizer_cov_8bit_counters_init@Base 8 ++ __sanitizer_cov_bool_flag_init@Base 11 ++ __sanitizer_cov_dump@Base 4.9 ++ __sanitizer_cov_pcs_init@Base 8 ++ __sanitizer_cov_reset@Base 8 ++ __sanitizer_cov_trace_cmp1@Base 7 ++ __sanitizer_cov_trace_cmp2@Base 7 ++ __sanitizer_cov_trace_cmp4@Base 7 ++ __sanitizer_cov_trace_cmp8@Base 7 ++ __sanitizer_cov_trace_cmp@Base 6.2 ++ __sanitizer_cov_trace_const_cmp1@Base 8 ++ __sanitizer_cov_trace_const_cmp2@Base 8 ++ __sanitizer_cov_trace_const_cmp4@Base 8 ++ __sanitizer_cov_trace_const_cmp8@Base 8 ++ __sanitizer_cov_trace_div4@Base 7 ++ __sanitizer_cov_trace_div8@Base 7 ++ __sanitizer_cov_trace_gep@Base 7 ++ __sanitizer_cov_trace_pc_guard@Base 7 ++ __sanitizer_cov_trace_pc_guard_init@Base 7 ++ __sanitizer_cov_trace_pc_indir@Base 7 ++ __sanitizer_cov_trace_switch@Base 6.2 ++ __sanitizer_dump_coverage@Base 8 ++ __sanitizer_dump_trace_pc_guard_coverage@Base 8 ++ __sanitizer_finish_switch_fiber@Base 7 ++ __sanitizer_get_allocated_size@Base 5 ++ __sanitizer_get_current_allocated_bytes@Base 5 ++ __sanitizer_get_estimated_allocated_size@Base 5 ++ __sanitizer_get_free_bytes@Base 5 ++ __sanitizer_get_heap_size@Base 5 ++ __sanitizer_get_module_and_offset_for_pc@Base 8 ++ __sanitizer_get_ownership@Base 5 ++ __sanitizer_get_report_path@Base 12 ++ __sanitizer_get_unmapped_bytes@Base 5 ++ __sanitizer_install_malloc_and_free_hooks@Base 7 ++ __sanitizer_on_print@Base 10 ++ __sanitizer_print_memory_profile@Base 8 ++ __sanitizer_print_stack_trace@Base 4.9 ++ __sanitizer_ptr_cmp@Base 5 ++ __sanitizer_ptr_sub@Base 5 ++ __sanitizer_purge_allocator@Base 9 ++ __sanitizer_report_error_summary@Base 4.8 ++ __sanitizer_sandbox_on_notify@Base 4.8 ++ __sanitizer_set_death_callback@Base 6.2 ++ __sanitizer_set_report_fd@Base 7 ++ __sanitizer_set_report_path@Base 4.8 ++ __sanitizer_start_switch_fiber@Base 7 ++ __sanitizer_symbolize_global@Base 7 ++ __sanitizer_symbolize_pc@Base 7 ++ __sanitizer_syscall_post_impl_accept4@Base 4.9 ++ __sanitizer_syscall_post_impl_accept@Base 4.9 ++ __sanitizer_syscall_post_impl_access@Base 4.9 ++ __sanitizer_syscall_post_impl_acct@Base 4.9 ++ __sanitizer_syscall_post_impl_add_key@Base 4.9 ++ __sanitizer_syscall_post_impl_adjtimex@Base 4.9 ++ __sanitizer_syscall_post_impl_alarm@Base 4.9 ++ __sanitizer_syscall_post_impl_bdflush@Base 4.9 ++ __sanitizer_syscall_post_impl_bind@Base 4.9 ++ __sanitizer_syscall_post_impl_brk@Base 4.9 ++ __sanitizer_syscall_post_impl_capget@Base 4.9 ++ __sanitizer_syscall_post_impl_capset@Base 4.9 ++ __sanitizer_syscall_post_impl_chdir@Base 4.9 ++ __sanitizer_syscall_post_impl_chmod@Base 4.9 ++ __sanitizer_syscall_post_impl_chown@Base 4.9 ++ __sanitizer_syscall_post_impl_chroot@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_adjtime@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_getres@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_gettime@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_nanosleep@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_settime@Base 4.9 ++ __sanitizer_syscall_post_impl_close@Base 4.9 ++ __sanitizer_syscall_post_impl_connect@Base 4.9 ++ __sanitizer_syscall_post_impl_creat@Base 4.9 ++ __sanitizer_syscall_post_impl_delete_module@Base 4.9 ++ __sanitizer_syscall_post_impl_dup2@Base 4.9 ++ __sanitizer_syscall_post_impl_dup3@Base 4.9 ++ __sanitizer_syscall_post_impl_dup@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_create1@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_create@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_ctl@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_pwait2@Base 12 ++ __sanitizer_syscall_post_impl_epoll_pwait@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_wait@Base 4.9 ++ __sanitizer_syscall_post_impl_eventfd2@Base 4.9 ++ __sanitizer_syscall_post_impl_eventfd@Base 4.9 ++ __sanitizer_syscall_post_impl_exit@Base 4.9 ++ __sanitizer_syscall_post_impl_exit_group@Base 4.9 ++ __sanitizer_syscall_post_impl_faccessat@Base 4.9 ++ __sanitizer_syscall_post_impl_fchdir@Base 4.9 ++ __sanitizer_syscall_post_impl_fchmod@Base 4.9 ++ __sanitizer_syscall_post_impl_fchmodat@Base 4.9 ++ __sanitizer_syscall_post_impl_fchown@Base 4.9 ++ __sanitizer_syscall_post_impl_fchownat@Base 4.9 ++ __sanitizer_syscall_post_impl_fcntl64@Base 4.9 ++ __sanitizer_syscall_post_impl_fcntl@Base 4.9 ++ __sanitizer_syscall_post_impl_fdatasync@Base 4.9 ++ __sanitizer_syscall_post_impl_fgetxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_flistxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_flock@Base 4.9 ++ __sanitizer_syscall_post_impl_fork@Base 4.9 ++ __sanitizer_syscall_post_impl_fremovexattr@Base 4.9 ++ __sanitizer_syscall_post_impl_fsetxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_fstat64@Base 4.9 ++ __sanitizer_syscall_post_impl_fstat@Base 4.9 ++ __sanitizer_syscall_post_impl_fstatat64@Base 4.9 ++ __sanitizer_syscall_post_impl_fstatfs64@Base 4.9 ++ __sanitizer_syscall_post_impl_fstatfs@Base 4.9 ++ __sanitizer_syscall_post_impl_fsync@Base 4.9 ++ __sanitizer_syscall_post_impl_ftruncate@Base 4.9 ++ __sanitizer_syscall_post_impl_futimesat@Base 4.9 ++ __sanitizer_syscall_post_impl_get_mempolicy@Base 4.9 ++ __sanitizer_syscall_post_impl_get_robust_list@Base 4.9 ++ __sanitizer_syscall_post_impl_getcpu@Base 4.9 ++ __sanitizer_syscall_post_impl_getcwd@Base 4.9 ++ __sanitizer_syscall_post_impl_getdents64@Base 4.9 ++ __sanitizer_syscall_post_impl_getdents@Base 4.9 ++ __sanitizer_syscall_post_impl_getegid@Base 4.9 ++ __sanitizer_syscall_post_impl_geteuid@Base 4.9 ++ __sanitizer_syscall_post_impl_getgid@Base 4.9 ++ __sanitizer_syscall_post_impl_getgroups@Base 4.9 ++ __sanitizer_syscall_post_impl_gethostname@Base 4.9 ++ __sanitizer_syscall_post_impl_getitimer@Base 4.9 ++ __sanitizer_syscall_post_impl_getpeername@Base 4.9 ++ __sanitizer_syscall_post_impl_getpgid@Base 4.9 ++ __sanitizer_syscall_post_impl_getpgrp@Base 4.9 ++ __sanitizer_syscall_post_impl_getpid@Base 4.9 ++ __sanitizer_syscall_post_impl_getppid@Base 4.9 ++ __sanitizer_syscall_post_impl_getpriority@Base 4.9 ++ __sanitizer_syscall_post_impl_getrandom@Base 10 ++ __sanitizer_syscall_post_impl_getresgid@Base 4.9 ++ __sanitizer_syscall_post_impl_getresuid@Base 4.9 ++ __sanitizer_syscall_post_impl_getrlimit@Base 4.9 ++ __sanitizer_syscall_post_impl_getrusage@Base 4.9 ++ __sanitizer_syscall_post_impl_getsid@Base 4.9 ++ __sanitizer_syscall_post_impl_getsockname@Base 4.9 ++ __sanitizer_syscall_post_impl_getsockopt@Base 4.9 ++ __sanitizer_syscall_post_impl_gettid@Base 4.9 ++ __sanitizer_syscall_post_impl_gettimeofday@Base 4.9 ++ __sanitizer_syscall_post_impl_getuid@Base 4.9 ++ __sanitizer_syscall_post_impl_getxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_init_module@Base 4.9 ++ __sanitizer_syscall_post_impl_inotify_add_watch@Base 4.9 ++ __sanitizer_syscall_post_impl_inotify_init1@Base 4.9 ++ __sanitizer_syscall_post_impl_inotify_init@Base 4.9 ++ __sanitizer_syscall_post_impl_inotify_rm_watch@Base 4.9 ++ __sanitizer_syscall_post_impl_io_cancel@Base 4.9 ++ __sanitizer_syscall_post_impl_io_destroy@Base 4.9 ++ __sanitizer_syscall_post_impl_io_getevents@Base 4.9 ++ __sanitizer_syscall_post_impl_io_setup@Base 4.9 ++ __sanitizer_syscall_post_impl_io_submit@Base 4.9 ++ __sanitizer_syscall_post_impl_ioctl@Base 4.9 ++ __sanitizer_syscall_post_impl_ioperm@Base 4.9 ++ __sanitizer_syscall_post_impl_ioprio_get@Base 4.9 ++ __sanitizer_syscall_post_impl_ioprio_set@Base 4.9 ++ __sanitizer_syscall_post_impl_ipc@Base 4.9 ++ __sanitizer_syscall_post_impl_kexec_load@Base 4.9 ++ __sanitizer_syscall_post_impl_keyctl@Base 4.9 ++ __sanitizer_syscall_post_impl_kill@Base 4.9 ++ __sanitizer_syscall_post_impl_lchown@Base 4.9 ++ __sanitizer_syscall_post_impl_lgetxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_link@Base 4.9 ++ __sanitizer_syscall_post_impl_linkat@Base 4.9 ++ __sanitizer_syscall_post_impl_listen@Base 4.9 ++ __sanitizer_syscall_post_impl_listxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_llistxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_llseek@Base 4.9 ++ __sanitizer_syscall_post_impl_lookup_dcookie@Base 4.9 ++ __sanitizer_syscall_post_impl_lremovexattr@Base 4.9 ++ __sanitizer_syscall_post_impl_lseek@Base 4.9 ++ __sanitizer_syscall_post_impl_lsetxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_lstat64@Base 4.9 ++ __sanitizer_syscall_post_impl_lstat@Base 4.9 ++ __sanitizer_syscall_post_impl_madvise@Base 4.9 ++ __sanitizer_syscall_post_impl_mbind@Base 4.9 ++ __sanitizer_syscall_post_impl_migrate_pages@Base 4.9 ++ __sanitizer_syscall_post_impl_mincore@Base 4.9 ++ __sanitizer_syscall_post_impl_mkdir@Base 4.9 ++ __sanitizer_syscall_post_impl_mkdirat@Base 4.9 ++ __sanitizer_syscall_post_impl_mknod@Base 4.9 ++ __sanitizer_syscall_post_impl_mknodat@Base 4.9 ++ __sanitizer_syscall_post_impl_mlock@Base 4.9 ++ __sanitizer_syscall_post_impl_mlockall@Base 4.9 ++ __sanitizer_syscall_post_impl_mmap_pgoff@Base 4.9 ++ __sanitizer_syscall_post_impl_mount@Base 4.9 ++ __sanitizer_syscall_post_impl_move_pages@Base 4.9 ++ __sanitizer_syscall_post_impl_mprotect@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_getsetattr@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_notify@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_open@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_timedreceive@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_timedsend@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_unlink@Base 4.9 ++ __sanitizer_syscall_post_impl_mremap@Base 4.9 ++ __sanitizer_syscall_post_impl_msgctl@Base 4.9 ++ __sanitizer_syscall_post_impl_msgget@Base 4.9 ++ __sanitizer_syscall_post_impl_msgrcv@Base 4.9 ++ __sanitizer_syscall_post_impl_msgsnd@Base 4.9 ++ __sanitizer_syscall_post_impl_msync@Base 4.9 ++ __sanitizer_syscall_post_impl_munlock@Base 4.9 ++ __sanitizer_syscall_post_impl_munlockall@Base 4.9 ++ __sanitizer_syscall_post_impl_munmap@Base 4.9 ++ __sanitizer_syscall_post_impl_name_to_handle_at@Base 4.9 ++ __sanitizer_syscall_post_impl_nanosleep@Base 4.9 ++ __sanitizer_syscall_post_impl_newfstat@Base 4.9 ++ __sanitizer_syscall_post_impl_newfstatat@Base 4.9 ++ __sanitizer_syscall_post_impl_newlstat@Base 4.9 ++ __sanitizer_syscall_post_impl_newstat@Base 4.9 ++ __sanitizer_syscall_post_impl_newuname@Base 4.9 ++ __sanitizer_syscall_post_impl_ni_syscall@Base 4.9 ++ __sanitizer_syscall_post_impl_nice@Base 4.9 ++ __sanitizer_syscall_post_impl_old_getrlimit@Base 4.9 ++ __sanitizer_syscall_post_impl_old_mmap@Base 4.9 ++ __sanitizer_syscall_post_impl_old_readdir@Base 4.9 ++ __sanitizer_syscall_post_impl_old_select@Base 4.9 ++ __sanitizer_syscall_post_impl_oldumount@Base 4.9 ++ __sanitizer_syscall_post_impl_olduname@Base 4.9 ++ __sanitizer_syscall_post_impl_open@Base 4.9 ++ __sanitizer_syscall_post_impl_open_by_handle_at@Base 4.9 ++ __sanitizer_syscall_post_impl_openat@Base 4.9 ++ __sanitizer_syscall_post_impl_pause@Base 4.9 ++ __sanitizer_syscall_post_impl_pciconfig_iobase@Base 4.9 ++ __sanitizer_syscall_post_impl_pciconfig_read@Base 4.9 ++ __sanitizer_syscall_post_impl_pciconfig_write@Base 4.9 ++ __sanitizer_syscall_post_impl_perf_event_open@Base 4.9 ++ __sanitizer_syscall_post_impl_personality@Base 4.9 ++ __sanitizer_syscall_post_impl_pipe2@Base 4.9 ++ __sanitizer_syscall_post_impl_pipe@Base 4.9 ++ __sanitizer_syscall_post_impl_pivot_root@Base 4.9 ++ __sanitizer_syscall_post_impl_poll@Base 4.9 ++ __sanitizer_syscall_post_impl_ppoll@Base 4.9 ++ __sanitizer_syscall_post_impl_pread64@Base 4.9 ++ __sanitizer_syscall_post_impl_preadv@Base 4.9 ++ __sanitizer_syscall_post_impl_prlimit64@Base 4.9 ++ __sanitizer_syscall_post_impl_process_vm_readv@Base 4.9 ++ __sanitizer_syscall_post_impl_process_vm_writev@Base 4.9 ++ __sanitizer_syscall_post_impl_pselect6@Base 4.9 ++ __sanitizer_syscall_post_impl_ptrace@Base 4.9 ++ __sanitizer_syscall_post_impl_pwrite64@Base 4.9 ++ __sanitizer_syscall_post_impl_pwritev@Base 4.9 ++ __sanitizer_syscall_post_impl_quotactl@Base 4.9 ++ __sanitizer_syscall_post_impl_read@Base 4.9 ++ __sanitizer_syscall_post_impl_readlink@Base 4.9 ++ __sanitizer_syscall_post_impl_readlinkat@Base 4.9 ++ __sanitizer_syscall_post_impl_readv@Base 4.9 ++ __sanitizer_syscall_post_impl_reboot@Base 4.9 ++ __sanitizer_syscall_post_impl_recv@Base 4.9 ++ __sanitizer_syscall_post_impl_recvfrom@Base 4.9 ++ __sanitizer_syscall_post_impl_recvmmsg@Base 4.9 ++ __sanitizer_syscall_post_impl_recvmsg@Base 4.9 ++ __sanitizer_syscall_post_impl_remap_file_pages@Base 4.9 ++ __sanitizer_syscall_post_impl_removexattr@Base 4.9 ++ __sanitizer_syscall_post_impl_rename@Base 4.9 ++ __sanitizer_syscall_post_impl_renameat@Base 4.9 ++ __sanitizer_syscall_post_impl_request_key@Base 4.9 ++ __sanitizer_syscall_post_impl_restart_syscall@Base 4.9 ++ __sanitizer_syscall_post_impl_rmdir@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_sigaction@Base 7 ++ __sanitizer_syscall_post_impl_rt_sigpending@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_sigprocmask@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_sigqueueinfo@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_sigtimedwait@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_tgsigqueueinfo@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_get_priority_max@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_get_priority_min@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_getaffinity@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_getparam@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_getscheduler@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_rr_get_interval@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_setaffinity@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_setparam@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_setscheduler@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_yield@Base 4.9 ++ __sanitizer_syscall_post_impl_select@Base 4.9 ++ __sanitizer_syscall_post_impl_semctl@Base 4.9 ++ __sanitizer_syscall_post_impl_semget@Base 4.9 ++ __sanitizer_syscall_post_impl_semop@Base 4.9 ++ __sanitizer_syscall_post_impl_semtimedop@Base 4.9 ++ __sanitizer_syscall_post_impl_send@Base 4.9 ++ __sanitizer_syscall_post_impl_sendfile64@Base 4.9 ++ __sanitizer_syscall_post_impl_sendfile@Base 4.9 ++ __sanitizer_syscall_post_impl_sendmmsg@Base 4.9 ++ __sanitizer_syscall_post_impl_sendmsg@Base 4.9 ++ __sanitizer_syscall_post_impl_sendto@Base 4.9 ++ __sanitizer_syscall_post_impl_set_mempolicy@Base 4.9 ++ __sanitizer_syscall_post_impl_set_robust_list@Base 4.9 ++ __sanitizer_syscall_post_impl_set_tid_address@Base 4.9 ++ __sanitizer_syscall_post_impl_setdomainname@Base 4.9 ++ __sanitizer_syscall_post_impl_setfsgid@Base 4.9 ++ __sanitizer_syscall_post_impl_setfsuid@Base 4.9 ++ __sanitizer_syscall_post_impl_setgid@Base 4.9 ++ __sanitizer_syscall_post_impl_setgroups@Base 4.9 ++ __sanitizer_syscall_post_impl_sethostname@Base 4.9 ++ __sanitizer_syscall_post_impl_setitimer@Base 4.9 ++ __sanitizer_syscall_post_impl_setns@Base 4.9 ++ __sanitizer_syscall_post_impl_setpgid@Base 4.9 ++ __sanitizer_syscall_post_impl_setpriority@Base 4.9 ++ __sanitizer_syscall_post_impl_setregid@Base 4.9 ++ __sanitizer_syscall_post_impl_setresgid@Base 4.9 ++ __sanitizer_syscall_post_impl_setresuid@Base 4.9 ++ __sanitizer_syscall_post_impl_setreuid@Base 4.9 ++ __sanitizer_syscall_post_impl_setrlimit@Base 4.9 ++ __sanitizer_syscall_post_impl_setsid@Base 4.9 ++ __sanitizer_syscall_post_impl_setsockopt@Base 4.9 ++ __sanitizer_syscall_post_impl_settimeofday@Base 4.9 ++ __sanitizer_syscall_post_impl_setuid@Base 4.9 ++ __sanitizer_syscall_post_impl_setxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_sgetmask@Base 4.9 ++ __sanitizer_syscall_post_impl_shmat@Base 4.9 ++ __sanitizer_syscall_post_impl_shmctl@Base 4.9 ++ __sanitizer_syscall_post_impl_shmdt@Base 4.9 ++ __sanitizer_syscall_post_impl_shmget@Base 4.9 ++ __sanitizer_syscall_post_impl_shutdown@Base 4.9 ++ __sanitizer_syscall_post_impl_sigaction@Base 7 ++ __sanitizer_syscall_post_impl_sigaltstack@Base 11 ++ __sanitizer_syscall_post_impl_signal@Base 4.9 ++ __sanitizer_syscall_post_impl_signalfd4@Base 4.9 ++ __sanitizer_syscall_post_impl_signalfd@Base 4.9 ++ __sanitizer_syscall_post_impl_sigpending@Base 4.9 ++ __sanitizer_syscall_post_impl_sigprocmask@Base 4.9 ++ __sanitizer_syscall_post_impl_socket@Base 4.9 ++ __sanitizer_syscall_post_impl_socketcall@Base 4.9 ++ __sanitizer_syscall_post_impl_socketpair@Base 4.9 ++ __sanitizer_syscall_post_impl_splice@Base 4.9 ++ __sanitizer_syscall_post_impl_spu_create@Base 4.9 ++ __sanitizer_syscall_post_impl_spu_run@Base 4.9 ++ __sanitizer_syscall_post_impl_ssetmask@Base 4.9 ++ __sanitizer_syscall_post_impl_stat64@Base 4.9 ++ __sanitizer_syscall_post_impl_stat@Base 4.9 ++ __sanitizer_syscall_post_impl_statfs64@Base 4.9 ++ __sanitizer_syscall_post_impl_statfs@Base 4.9 ++ __sanitizer_syscall_post_impl_stime@Base 4.9 ++ __sanitizer_syscall_post_impl_swapoff@Base 4.9 ++ __sanitizer_syscall_post_impl_swapon@Base 4.9 ++ __sanitizer_syscall_post_impl_symlink@Base 4.9 ++ __sanitizer_syscall_post_impl_symlinkat@Base 4.9 ++ __sanitizer_syscall_post_impl_sync@Base 4.9 ++ __sanitizer_syscall_post_impl_syncfs@Base 4.9 ++ __sanitizer_syscall_post_impl_sysctl@Base 4.9 ++ __sanitizer_syscall_post_impl_sysfs@Base 4.9 ++ __sanitizer_syscall_post_impl_sysinfo@Base 4.9 ++ __sanitizer_syscall_post_impl_syslog@Base 4.9 ++ __sanitizer_syscall_post_impl_tee@Base 4.9 ++ __sanitizer_syscall_post_impl_tgkill@Base 4.9 ++ __sanitizer_syscall_post_impl_time@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_create@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_delete@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_getoverrun@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_gettime@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_settime@Base 4.9 ++ __sanitizer_syscall_post_impl_timerfd_create@Base 4.9 ++ __sanitizer_syscall_post_impl_timerfd_gettime@Base 4.9 ++ __sanitizer_syscall_post_impl_timerfd_settime@Base 4.9 ++ __sanitizer_syscall_post_impl_times@Base 4.9 ++ __sanitizer_syscall_post_impl_tkill@Base 4.9 ++ __sanitizer_syscall_post_impl_truncate@Base 4.9 ++ __sanitizer_syscall_post_impl_umask@Base 4.9 ++ __sanitizer_syscall_post_impl_umount@Base 4.9 ++ __sanitizer_syscall_post_impl_uname@Base 4.9 ++ __sanitizer_syscall_post_impl_unlink@Base 4.9 ++ __sanitizer_syscall_post_impl_unlinkat@Base 4.9 ++ __sanitizer_syscall_post_impl_unshare@Base 4.9 ++ __sanitizer_syscall_post_impl_uselib@Base 4.9 ++ __sanitizer_syscall_post_impl_ustat@Base 4.9 ++ __sanitizer_syscall_post_impl_utime@Base 4.9 ++ __sanitizer_syscall_post_impl_utimensat@Base 4.9 ++ __sanitizer_syscall_post_impl_utimes@Base 4.9 ++ __sanitizer_syscall_post_impl_vfork@Base 4.9 ++ __sanitizer_syscall_post_impl_vhangup@Base 4.9 ++ __sanitizer_syscall_post_impl_vmsplice@Base 4.9 ++ __sanitizer_syscall_post_impl_wait4@Base 4.9 ++ __sanitizer_syscall_post_impl_waitid@Base 4.9 ++ __sanitizer_syscall_post_impl_waitpid@Base 4.9 ++ __sanitizer_syscall_post_impl_write@Base 4.9 ++ __sanitizer_syscall_post_impl_writev@Base 4.9 ++ __sanitizer_syscall_pre_impl_accept4@Base 4.9 ++ __sanitizer_syscall_pre_impl_accept@Base 4.9 ++ __sanitizer_syscall_pre_impl_access@Base 4.9 ++ __sanitizer_syscall_pre_impl_acct@Base 4.9 ++ __sanitizer_syscall_pre_impl_add_key@Base 4.9 ++ __sanitizer_syscall_pre_impl_adjtimex@Base 4.9 ++ __sanitizer_syscall_pre_impl_alarm@Base 4.9 ++ __sanitizer_syscall_pre_impl_bdflush@Base 4.9 ++ __sanitizer_syscall_pre_impl_bind@Base 4.9 ++ __sanitizer_syscall_pre_impl_brk@Base 4.9 ++ __sanitizer_syscall_pre_impl_capget@Base 4.9 ++ __sanitizer_syscall_pre_impl_capset@Base 4.9 ++ __sanitizer_syscall_pre_impl_chdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_chmod@Base 4.9 ++ __sanitizer_syscall_pre_impl_chown@Base 4.9 ++ __sanitizer_syscall_pre_impl_chroot@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_adjtime@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_getres@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_gettime@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_nanosleep@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_settime@Base 4.9 ++ __sanitizer_syscall_pre_impl_close@Base 4.9 ++ __sanitizer_syscall_pre_impl_connect@Base 4.9 ++ __sanitizer_syscall_pre_impl_creat@Base 4.9 ++ __sanitizer_syscall_pre_impl_delete_module@Base 4.9 ++ __sanitizer_syscall_pre_impl_dup2@Base 4.9 ++ __sanitizer_syscall_pre_impl_dup3@Base 4.9 ++ __sanitizer_syscall_pre_impl_dup@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_create1@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_create@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_ctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_pwait2@Base 12 ++ __sanitizer_syscall_pre_impl_epoll_pwait@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_wait@Base 4.9 ++ __sanitizer_syscall_pre_impl_eventfd2@Base 4.9 ++ __sanitizer_syscall_pre_impl_eventfd@Base 4.9 ++ __sanitizer_syscall_pre_impl_exit@Base 4.9 ++ __sanitizer_syscall_pre_impl_exit_group@Base 4.9 ++ __sanitizer_syscall_pre_impl_faccessat@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchmod@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchmodat@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchown@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchownat@Base 4.9 ++ __sanitizer_syscall_pre_impl_fcntl64@Base 4.9 ++ __sanitizer_syscall_pre_impl_fcntl@Base 4.9 ++ __sanitizer_syscall_pre_impl_fdatasync@Base 4.9 ++ __sanitizer_syscall_pre_impl_fgetxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_flistxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_flock@Base 4.9 ++ __sanitizer_syscall_pre_impl_fork@Base 4.9 ++ __sanitizer_syscall_pre_impl_fremovexattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_fsetxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstat64@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstatat64@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstatfs64@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstatfs@Base 4.9 ++ __sanitizer_syscall_pre_impl_fsync@Base 4.9 ++ __sanitizer_syscall_pre_impl_ftruncate@Base 4.9 ++ __sanitizer_syscall_pre_impl_futimesat@Base 4.9 ++ __sanitizer_syscall_pre_impl_get_mempolicy@Base 4.9 ++ __sanitizer_syscall_pre_impl_get_robust_list@Base 4.9 ++ __sanitizer_syscall_pre_impl_getcpu@Base 4.9 ++ __sanitizer_syscall_pre_impl_getcwd@Base 4.9 ++ __sanitizer_syscall_pre_impl_getdents64@Base 4.9 ++ __sanitizer_syscall_pre_impl_getdents@Base 4.9 ++ __sanitizer_syscall_pre_impl_getegid@Base 4.9 ++ __sanitizer_syscall_pre_impl_geteuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getgroups@Base 4.9 ++ __sanitizer_syscall_pre_impl_gethostname@Base 4.9 ++ __sanitizer_syscall_pre_impl_getitimer@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpeername@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpgrp@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getppid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpriority@Base 4.9 ++ __sanitizer_syscall_pre_impl_getrandom@Base 10 ++ __sanitizer_syscall_pre_impl_getresgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getresuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getrlimit@Base 4.9 ++ __sanitizer_syscall_pre_impl_getrusage@Base 4.9 ++ __sanitizer_syscall_pre_impl_getsid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getsockname@Base 4.9 ++ __sanitizer_syscall_pre_impl_getsockopt@Base 4.9 ++ __sanitizer_syscall_pre_impl_gettid@Base 4.9 ++ __sanitizer_syscall_pre_impl_gettimeofday@Base 4.9 ++ __sanitizer_syscall_pre_impl_getuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_init_module@Base 4.9 ++ __sanitizer_syscall_pre_impl_inotify_add_watch@Base 4.9 ++ __sanitizer_syscall_pre_impl_inotify_init1@Base 4.9 ++ __sanitizer_syscall_pre_impl_inotify_init@Base 4.9 ++ __sanitizer_syscall_pre_impl_inotify_rm_watch@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_cancel@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_destroy@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_getevents@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_setup@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_submit@Base 4.9 ++ __sanitizer_syscall_pre_impl_ioctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_ioperm@Base 4.9 ++ __sanitizer_syscall_pre_impl_ioprio_get@Base 4.9 ++ __sanitizer_syscall_pre_impl_ioprio_set@Base 4.9 ++ __sanitizer_syscall_pre_impl_ipc@Base 4.9 ++ __sanitizer_syscall_pre_impl_kexec_load@Base 4.9 ++ __sanitizer_syscall_pre_impl_keyctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_kill@Base 4.9 ++ __sanitizer_syscall_pre_impl_lchown@Base 4.9 ++ __sanitizer_syscall_pre_impl_lgetxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_link@Base 4.9 ++ __sanitizer_syscall_pre_impl_linkat@Base 4.9 ++ __sanitizer_syscall_pre_impl_listen@Base 4.9 ++ __sanitizer_syscall_pre_impl_listxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_llistxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_llseek@Base 4.9 ++ __sanitizer_syscall_pre_impl_lookup_dcookie@Base 4.9 ++ __sanitizer_syscall_pre_impl_lremovexattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_lseek@Base 4.9 ++ __sanitizer_syscall_pre_impl_lsetxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_lstat64@Base 4.9 ++ __sanitizer_syscall_pre_impl_lstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_madvise@Base 4.9 ++ __sanitizer_syscall_pre_impl_mbind@Base 4.9 ++ __sanitizer_syscall_pre_impl_migrate_pages@Base 4.9 ++ __sanitizer_syscall_pre_impl_mincore@Base 4.9 ++ __sanitizer_syscall_pre_impl_mkdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_mkdirat@Base 4.9 ++ __sanitizer_syscall_pre_impl_mknod@Base 4.9 ++ __sanitizer_syscall_pre_impl_mknodat@Base 4.9 ++ __sanitizer_syscall_pre_impl_mlock@Base 4.9 ++ __sanitizer_syscall_pre_impl_mlockall@Base 4.9 ++ __sanitizer_syscall_pre_impl_mmap_pgoff@Base 4.9 ++ __sanitizer_syscall_pre_impl_mount@Base 4.9 ++ __sanitizer_syscall_pre_impl_move_pages@Base 4.9 ++ __sanitizer_syscall_pre_impl_mprotect@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_getsetattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_notify@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_open@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_timedreceive@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_timedsend@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_unlink@Base 4.9 ++ __sanitizer_syscall_pre_impl_mremap@Base 4.9 ++ __sanitizer_syscall_pre_impl_msgctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_msgget@Base 4.9 ++ __sanitizer_syscall_pre_impl_msgrcv@Base 4.9 ++ __sanitizer_syscall_pre_impl_msgsnd@Base 4.9 ++ __sanitizer_syscall_pre_impl_msync@Base 4.9 ++ __sanitizer_syscall_pre_impl_munlock@Base 4.9 ++ __sanitizer_syscall_pre_impl_munlockall@Base 4.9 ++ __sanitizer_syscall_pre_impl_munmap@Base 4.9 ++ __sanitizer_syscall_pre_impl_name_to_handle_at@Base 4.9 ++ __sanitizer_syscall_pre_impl_nanosleep@Base 4.9 ++ __sanitizer_syscall_pre_impl_newfstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_newfstatat@Base 4.9 ++ __sanitizer_syscall_pre_impl_newlstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_newstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_newuname@Base 4.9 ++ __sanitizer_syscall_pre_impl_ni_syscall@Base 4.9 ++ __sanitizer_syscall_pre_impl_nice@Base 4.9 ++ __sanitizer_syscall_pre_impl_old_getrlimit@Base 4.9 ++ __sanitizer_syscall_pre_impl_old_mmap@Base 4.9 ++ __sanitizer_syscall_pre_impl_old_readdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_old_select@Base 4.9 ++ __sanitizer_syscall_pre_impl_oldumount@Base 4.9 ++ __sanitizer_syscall_pre_impl_olduname@Base 4.9 ++ __sanitizer_syscall_pre_impl_open@Base 4.9 ++ __sanitizer_syscall_pre_impl_open_by_handle_at@Base 4.9 ++ __sanitizer_syscall_pre_impl_openat@Base 4.9 ++ __sanitizer_syscall_pre_impl_pause@Base 4.9 ++ __sanitizer_syscall_pre_impl_pciconfig_iobase@Base 4.9 ++ __sanitizer_syscall_pre_impl_pciconfig_read@Base 4.9 ++ __sanitizer_syscall_pre_impl_pciconfig_write@Base 4.9 ++ __sanitizer_syscall_pre_impl_perf_event_open@Base 4.9 ++ __sanitizer_syscall_pre_impl_personality@Base 4.9 ++ __sanitizer_syscall_pre_impl_pipe2@Base 4.9 ++ __sanitizer_syscall_pre_impl_pipe@Base 4.9 ++ __sanitizer_syscall_pre_impl_pivot_root@Base 4.9 ++ __sanitizer_syscall_pre_impl_poll@Base 4.9 ++ __sanitizer_syscall_pre_impl_ppoll@Base 4.9 ++ __sanitizer_syscall_pre_impl_pread64@Base 4.9 ++ __sanitizer_syscall_pre_impl_preadv@Base 4.9 ++ __sanitizer_syscall_pre_impl_prlimit64@Base 4.9 ++ __sanitizer_syscall_pre_impl_process_vm_readv@Base 4.9 ++ __sanitizer_syscall_pre_impl_process_vm_writev@Base 4.9 ++ __sanitizer_syscall_pre_impl_pselect6@Base 4.9 ++ __sanitizer_syscall_pre_impl_ptrace@Base 4.9 ++ __sanitizer_syscall_pre_impl_pwrite64@Base 4.9 ++ __sanitizer_syscall_pre_impl_pwritev@Base 4.9 ++ __sanitizer_syscall_pre_impl_quotactl@Base 4.9 ++ __sanitizer_syscall_pre_impl_read@Base 4.9 ++ __sanitizer_syscall_pre_impl_readlink@Base 4.9 ++ __sanitizer_syscall_pre_impl_readlinkat@Base 4.9 ++ __sanitizer_syscall_pre_impl_readv@Base 4.9 ++ __sanitizer_syscall_pre_impl_reboot@Base 4.9 ++ __sanitizer_syscall_pre_impl_recv@Base 4.9 ++ __sanitizer_syscall_pre_impl_recvfrom@Base 4.9 ++ __sanitizer_syscall_pre_impl_recvmmsg@Base 4.9 ++ __sanitizer_syscall_pre_impl_recvmsg@Base 4.9 ++ __sanitizer_syscall_pre_impl_remap_file_pages@Base 4.9 ++ __sanitizer_syscall_pre_impl_removexattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_rename@Base 4.9 ++ __sanitizer_syscall_pre_impl_renameat@Base 4.9 ++ __sanitizer_syscall_pre_impl_request_key@Base 4.9 ++ __sanitizer_syscall_pre_impl_restart_syscall@Base 4.9 ++ __sanitizer_syscall_pre_impl_rmdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_sigaction@Base 7 ++ __sanitizer_syscall_pre_impl_rt_sigpending@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_sigprocmask@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_sigqueueinfo@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_sigtimedwait@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_tgsigqueueinfo@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_get_priority_max@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_get_priority_min@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_getaffinity@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_getparam@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_getscheduler@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_rr_get_interval@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_setaffinity@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_setparam@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_setscheduler@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_yield@Base 4.9 ++ __sanitizer_syscall_pre_impl_select@Base 4.9 ++ __sanitizer_syscall_pre_impl_semctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_semget@Base 4.9 ++ __sanitizer_syscall_pre_impl_semop@Base 4.9 ++ __sanitizer_syscall_pre_impl_semtimedop@Base 4.9 ++ __sanitizer_syscall_pre_impl_send@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendfile64@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendfile@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendmmsg@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendmsg@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendto@Base 4.9 ++ __sanitizer_syscall_pre_impl_set_mempolicy@Base 4.9 ++ __sanitizer_syscall_pre_impl_set_robust_list@Base 4.9 ++ __sanitizer_syscall_pre_impl_set_tid_address@Base 4.9 ++ __sanitizer_syscall_pre_impl_setdomainname@Base 4.9 ++ __sanitizer_syscall_pre_impl_setfsgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setfsuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setgroups@Base 4.9 ++ __sanitizer_syscall_pre_impl_sethostname@Base 4.9 ++ __sanitizer_syscall_pre_impl_setitimer@Base 4.9 ++ __sanitizer_syscall_pre_impl_setns@Base 4.9 ++ __sanitizer_syscall_pre_impl_setpgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setpriority@Base 4.9 ++ __sanitizer_syscall_pre_impl_setregid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setresgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setresuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setreuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setrlimit@Base 4.9 ++ __sanitizer_syscall_pre_impl_setsid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setsockopt@Base 4.9 ++ __sanitizer_syscall_pre_impl_settimeofday@Base 4.9 ++ __sanitizer_syscall_pre_impl_setuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_sgetmask@Base 4.9 ++ __sanitizer_syscall_pre_impl_shmat@Base 4.9 ++ __sanitizer_syscall_pre_impl_shmctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_shmdt@Base 4.9 ++ __sanitizer_syscall_pre_impl_shmget@Base 4.9 ++ __sanitizer_syscall_pre_impl_shutdown@Base 4.9 ++ __sanitizer_syscall_pre_impl_sigaction@Base 7 ++ __sanitizer_syscall_pre_impl_sigaltstack@Base 11 ++ __sanitizer_syscall_pre_impl_signal@Base 4.9 ++ __sanitizer_syscall_pre_impl_signalfd4@Base 4.9 ++ __sanitizer_syscall_pre_impl_signalfd@Base 4.9 ++ __sanitizer_syscall_pre_impl_sigpending@Base 4.9 ++ __sanitizer_syscall_pre_impl_sigprocmask@Base 4.9 ++ __sanitizer_syscall_pre_impl_socket@Base 4.9 ++ __sanitizer_syscall_pre_impl_socketcall@Base 4.9 ++ __sanitizer_syscall_pre_impl_socketpair@Base 4.9 ++ __sanitizer_syscall_pre_impl_splice@Base 4.9 ++ __sanitizer_syscall_pre_impl_spu_create@Base 4.9 ++ __sanitizer_syscall_pre_impl_spu_run@Base 4.9 ++ __sanitizer_syscall_pre_impl_ssetmask@Base 4.9 ++ __sanitizer_syscall_pre_impl_stat64@Base 4.9 ++ __sanitizer_syscall_pre_impl_stat@Base 4.9 ++ __sanitizer_syscall_pre_impl_statfs64@Base 4.9 ++ __sanitizer_syscall_pre_impl_statfs@Base 4.9 ++ __sanitizer_syscall_pre_impl_stime@Base 4.9 ++ __sanitizer_syscall_pre_impl_swapoff@Base 4.9 ++ __sanitizer_syscall_pre_impl_swapon@Base 4.9 ++ __sanitizer_syscall_pre_impl_symlink@Base 4.9 ++ __sanitizer_syscall_pre_impl_symlinkat@Base 4.9 ++ __sanitizer_syscall_pre_impl_sync@Base 4.9 ++ __sanitizer_syscall_pre_impl_syncfs@Base 4.9 ++ __sanitizer_syscall_pre_impl_sysctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_sysfs@Base 4.9 ++ __sanitizer_syscall_pre_impl_sysinfo@Base 4.9 ++ __sanitizer_syscall_pre_impl_syslog@Base 4.9 ++ __sanitizer_syscall_pre_impl_tee@Base 4.9 ++ __sanitizer_syscall_pre_impl_tgkill@Base 4.9 ++ __sanitizer_syscall_pre_impl_time@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_create@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_delete@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_getoverrun@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_gettime@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_settime@Base 4.9 ++ __sanitizer_syscall_pre_impl_timerfd_create@Base 4.9 ++ __sanitizer_syscall_pre_impl_timerfd_gettime@Base 4.9 ++ __sanitizer_syscall_pre_impl_timerfd_settime@Base 4.9 ++ __sanitizer_syscall_pre_impl_times@Base 4.9 ++ __sanitizer_syscall_pre_impl_tkill@Base 4.9 ++ __sanitizer_syscall_pre_impl_truncate@Base 4.9 ++ __sanitizer_syscall_pre_impl_umask@Base 4.9 ++ __sanitizer_syscall_pre_impl_umount@Base 4.9 ++ __sanitizer_syscall_pre_impl_uname@Base 4.9 ++ __sanitizer_syscall_pre_impl_unlink@Base 4.9 ++ __sanitizer_syscall_pre_impl_unlinkat@Base 4.9 ++ __sanitizer_syscall_pre_impl_unshare@Base 4.9 ++ __sanitizer_syscall_pre_impl_uselib@Base 4.9 ++ __sanitizer_syscall_pre_impl_ustat@Base 4.9 ++ __sanitizer_syscall_pre_impl_utime@Base 4.9 ++ __sanitizer_syscall_pre_impl_utimensat@Base 4.9 ++ __sanitizer_syscall_pre_impl_utimes@Base 4.9 ++ __sanitizer_syscall_pre_impl_vfork@Base 4.9 ++ __sanitizer_syscall_pre_impl_vhangup@Base 4.9 ++ __sanitizer_syscall_pre_impl_vmsplice@Base 4.9 ++ __sanitizer_syscall_pre_impl_wait4@Base 4.9 ++ __sanitizer_syscall_pre_impl_waitid@Base 4.9 ++ __sanitizer_syscall_pre_impl_waitpid@Base 4.9 ++ __sanitizer_syscall_pre_impl_write@Base 4.9 ++ __sanitizer_syscall_pre_impl_writev@Base 4.9 ++ __sanitizer_unaligned_load16@Base 4.9 ++ __sanitizer_unaligned_load32@Base 4.9 ++ __sanitizer_unaligned_load64@Base 4.9 ++ __sanitizer_unaligned_store16@Base 4.9 ++ __sanitizer_unaligned_store32@Base 4.9 ++ __sanitizer_unaligned_store64@Base 4.9 ++ __sanitizer_verify_contiguous_container@Base 5 ++ __sanitizer_weak_hook_memcmp@Base 8 ++ __sanitizer_weak_hook_memmem@Base 8 ++ __sanitizer_weak_hook_strcasecmp@Base 8 ++ __sanitizer_weak_hook_strcasestr@Base 8 ++ __sanitizer_weak_hook_strcmp@Base 8 ++ __sanitizer_weak_hook_strncasecmp@Base 8 ++ __sanitizer_weak_hook_strncmp@Base 8 ++ __sanitizer_weak_hook_strstr@Base 8 ++ __snprintf_chk@Base 9 ++ __sprintf_chk@Base 9 ++ __strdup@Base 7 ++ __strndup@Base 8 ++ __strxfrm_l@Base 9 ++ __uflow@Base 5 ++ __underflow@Base 5 ++ __vsnprintf_chk@Base 9 ++ __vsprintf_chk@Base 9 ++ __wcsxfrm_l@Base 9 ++ __woverflow@Base 5 ++ __wuflow@Base 5 ++ __wunderflow@Base 5 ++ __xpg_strerror_r@Base 4.9 ++ __xstat64@Base 7 ++ __xstat@Base 7 ++ _exit@Base 4.9 ++ _longjmp@Base 4.8 ++ _obstack_begin@Base 5 ++ _obstack_begin_1@Base 5 ++ _obstack_newchunk@Base 5 ++ accept4@Base 4.9 ++ accept@Base 4.9 ++ aligned_alloc@Base 5 ++ asctime@Base 4.8 ++ asctime_r@Base 4.8 ++ asprintf@Base 5 ++ atoi@Base 4.8 ++ atol@Base 4.8 ++ atoll@Base 4.8 ++ backtrace@Base 4.9 ++ backtrace_symbols@Base 4.9 ++ bcmp@Base 10 ++ bsearch@Base 12 ++ bzero@Base 10 ++ calloc@Base 4.8 ++ canonicalize_file_name@Base 4.9 ++ capget@Base 5 ++ capset@Base 5 ++ cfree@Base 4.8 ++ clock_getcpuclockid@Base 11 ++ clock_getres@Base 4.9 ++ clock_gettime@Base 4.9 ++ clock_settime@Base 4.9 ++ confstr@Base 4.9 ++ crypt@Base 10 ++ crypt_r@Base 10 ++ ctermid@Base 7 ++ ctime@Base 4.8 ++ ctime_r@Base 4.8 ++ dlclose@Base 5 ++ dlopen@Base 5 ++ drand48_r@Base 4.9 ++ endgrent@Base 5 ++ endpwent@Base 5 ++ ether_aton@Base 4.9 ++ ether_aton_r@Base 4.9 ++ ether_hostton@Base 4.9 ++ ether_line@Base 4.9 ++ ether_ntoa@Base 4.9 ++ ether_ntoa_r@Base 4.9 ++ ether_ntohost@Base 4.9 ++ eventfd_read@Base 7 ++ eventfd_write@Base 7 ++ fclose@Base 5 ++ fdopen@Base 5 ++ fflush@Base 5 ++ fgetgrent@Base 5 ++ fgetgrent_r@Base 5 ++ fgetpwent@Base 5 ++ fgetpwent_r@Base 5 ++ fgets@Base 9 ++ fgetxattr@Base 5 ++ flistxattr@Base 5 ++ fmemopen@Base 5 ++ fopen64@Base 5 ++ fopen@Base 5 ++ fopencookie@Base 6.2 ++ fprintf@Base 5 ++ fputs@Base 9 ++ fread@Base 8 ++ free@Base 4.8 ++ freopen64@Base 5 ++ freopen@Base 5 ++ frexp@Base 4.9 ++ frexpf@Base 4.9 ++ frexpl@Base 4.9 ++ fscanf@Base 4.8 ++ fstatfs64@Base 4.9 ++ fstatfs@Base 4.9 ++ fstatvfs64@Base 4.9 ++ fstatvfs@Base 4.9 ++ ftime@Base 5 ++ fwrite@Base 8 ++ get_current_dir_name@Base 4.9 ++ getaddrinfo@Base 4.9 ++ getcwd@Base 4.9 ++ getdelim@Base 4.9 ++ getgrent@Base 5 ++ getgrent_r@Base 5 ++ getgrgid@Base 4.9 ++ getgrgid_r@Base 4.9 ++ getgrnam@Base 4.9 ++ getgrnam_r@Base 4.9 ++ getgrouplist@Base 12 ++ getgroups@Base 4.9 ++ gethostbyaddr@Base 4.9 ++ gethostbyaddr_r@Base 4.9 ++ gethostbyname2@Base 4.9 ++ gethostbyname2_r@Base 4.9 ++ gethostbyname@Base 4.9 ++ gethostbyname_r@Base 4.9 ++ gethostent@Base 4.9 ++ gethostent_r@Base 4.9 ++ getifaddrs@Base 5 ++ getitimer@Base 4.9 ++ getline@Base 4.9 ++ getloadavg@Base 8 ++ getmntent@Base 4.9 ++ getmntent_r@Base 4.9 ++ getnameinfo@Base 4.9 ++ getnetbyaddr@Base 12 ++ getnetbyname@Base 12 ++ getnetent@Base 12 ++ getpass@Base 5 ++ getpeername@Base 4.9 ++ getprotobyname@Base 11 ++ getprotobyname_r@Base 11 ++ getprotobynumber@Base 11 ++ getprotobynumber_r@Base 11 ++ getprotoent@Base 11 ++ getprotoent_r@Base 11 ++ getpwent@Base 5 ++ getpwent_r@Base 5 ++ getpwnam@Base 4.9 ++ getpwnam_r@Base 4.9 ++ getpwuid@Base 4.9 ++ getpwuid_r@Base 4.9 ++ getrandom@Base 10 ++ getresgid@Base 5 ++ getresuid@Base 5 ++ getsockname@Base 4.9 ++ getsockopt@Base 4.9 ++ getusershell@Base 10 ++ getutent@Base 8 ++ getutid@Base 8 ++ getutline@Base 8 ++ getutxent@Base 8 ++ getutxid@Base 8 ++ getutxline@Base 8 ++ getxattr@Base 5 ++ glob64@Base 4.9 ++ glob@Base 4.9 ++ gmtime@Base 4.8 ++ gmtime_r@Base 4.8 ++ iconv@Base 4.9 ++ if_indextoname@Base 5 ++ if_nametoindex@Base 5 ++ index@Base 4.8 ++ inet_aton@Base 4.9 ++ inet_ntop@Base 4.9 ++ inet_pton@Base 4.9 ++ initgroups@Base 4.9 ++ ioctl@Base 4.9 ++ lgamma@Base 4.9 ++ lgamma_r@Base 4.9 ++ lgammaf@Base 4.9 ++ lgammaf_r@Base 4.9 ++ lgammal@Base 4.9 ++ lgammal_r@Base 4.9 ++ lgetxattr@Base 5 ++ listxattr@Base 5 ++ llistxattr@Base 5 ++ localtime@Base 4.8 ++ localtime_r@Base 4.8 ++ longjmp@Base 4.8 ++ lrand48_r@Base 4.9 ++ lstat@Base 12 ++ mallinfo@Base 4.8 ++ malloc@Base 4.8 ++ malloc_stats@Base 4.8 ++ malloc_usable_size@Base 4.8 ++ mallopt@Base 4.8 ++ mbsnrtowcs@Base 4.9 ++ mbsrtowcs@Base 4.9 ++ mbstowcs@Base 4.9 ++ mcheck@Base 8 ++ mcheck_pedantic@Base 8 ++ memalign@Base 4.8 ++ memchr@Base 5 ++ memcmp@Base 4.8 ++ memcpy@Base 4.8 ++ memmem@Base 7 ++ memmove@Base 4.8 ++ memrchr@Base 5 ++ memset@Base 4.8 ++ mincore@Base 6.2 ++ mktime@Base 5 ++ mlock@Base 4.8 ++ mlockall@Base 4.8 ++ mmap64@Base 9 ++ mmap@Base 9 ++ modf@Base 4.9 ++ modff@Base 4.9 ++ modfl@Base 4.9 ++ mprobe@Base 8 ++ mprotect@Base 9 ++ msgrcv@Base 11 ++ msgsnd@Base 11 ++ munlock@Base 4.8 ++ munlockall@Base 4.8 ++ name_to_handle_at@Base 9 ++ open_by_handle_at@Base 9 ++ open_memstream@Base 5 ++ open_wmemstream@Base 5 ++ opendir@Base 6.2 ++ pclose@Base 10 ++ poll@Base 4.9 ++ popen@Base 10 ++ posix_memalign@Base 4.8 ++ posix_spawn@Base 12 ++ posix_spawnp@Base 12 ++ ppoll@Base 4.9 ++ prctl@Base 4.8 ++ pread64@Base 4.8 ++ pread@Base 4.8 ++ preadv64@Base 4.9 ++ preadv@Base 4.9 ++ printf@Base 5 ++ process_vm_readv@Base 6.2 ++ process_vm_writev@Base 6.2 ++ pthread_attr_getaffinity_np@Base 4.9 ++ pthread_attr_getdetachstate@Base 4.9 ++ pthread_attr_getguardsize@Base 4.9 ++ pthread_attr_getinheritsched@Base 4.9 ++ pthread_attr_getschedparam@Base 4.9 ++ pthread_attr_getschedpolicy@Base 4.9 ++ pthread_attr_getscope@Base 4.9 ++ pthread_attr_getstack@Base 4.9 ++ pthread_attr_getstacksize@Base 4.9 ++ pthread_barrierattr_getpshared@Base 5 ++ pthread_condattr_getclock@Base 5 ++ pthread_condattr_getpshared@Base 5 ++ pthread_create@Base 4.8 ++ pthread_getcpuclockid@Base 12 ++ pthread_getname_np@Base 9 ++ pthread_getschedparam@Base 4.9 ++ pthread_join@Base 6.2 ++ pthread_mutex_lock@Base 4.9 ++ pthread_mutex_unlock@Base 4.9 ++ pthread_mutexattr_getprioceiling@Base 5 ++ pthread_mutexattr_getprotocol@Base 5 ++ pthread_mutexattr_getpshared@Base 5 ++ pthread_mutexattr_getrobust@Base 5 ++ pthread_mutexattr_getrobust_np@Base 5 ++ pthread_mutexattr_gettype@Base 5 ++ pthread_rwlockattr_getkind_np@Base 5 ++ pthread_rwlockattr_getpshared@Base 5 ++ pthread_setcancelstate@Base 6.2 ++ pthread_setcanceltype@Base 6.2 ++ pthread_setname_np@Base 4.9 ++ pthread_sigmask@Base 10 ++ pvalloc@Base 4.8 ++ ptsname@Base 11 ++ ptsname_r@Base 11 ++ puts@Base 9 ++ pututxline@Base 10 ++ pwrite64@Base 4.8 ++ pwrite@Base 4.8 ++ pwritev64@Base 4.9 ++ pwritev@Base 4.9 ++ qsort@Base 11 ++ qsort_r@Base 11 ++ rand_r@Base 5 ++ random_r@Base 4.9 ++ read@Base 4.8 ++ readdir64@Base 4.9 ++ readdir64_r@Base 4.9 ++ readdir@Base 4.9 ++ readdir_r@Base 4.9 ++ readlink@Base 9 ++ readlinkat@Base 9 ++ readv@Base 4.9 ++ realloc@Base 4.8 ++ reallocarray@Base 10 ++ realpath@Base 4.9 ++ recv@Base 7 ++ recvfrom@Base 7 ++ recvmmsg@Base 9 ++ recvmsg@Base 4.9 ++ regcomp@Base 10 ++ regerror@Base 10 ++ regexec@Base 10 ++ regfree@Base 10 ++ remquo@Base 4.9 ++ remquof@Base 4.9 ++ remquol@Base 4.9 ++ scandir64@Base 4.9 ++ scandir@Base 4.9 ++ scanf@Base 4.8 ++ sched_getaffinity@Base 4.9 ++ sched_getparam@Base 6.2 ++ sem_destroy@Base 6.2 ++ sem_getvalue@Base 6.2 ++ sem_init@Base 6.2 ++ sem_open@Base 12 ++ sem_post@Base 6.2 ++ sem_timedwait@Base 6.2 ++ sem_trywait@Base 6.2 ++ sem_unlink@Base 12 ++ sem_wait@Base 6.2 ++ send@Base 7 ++ sendmmsg@Base 9 ++ sendmsg@Base 7 ++ sendto@Base 7 ++ setbuf@Base 10 ++ setbuffer@Base 10 ++ setgrent@Base 5 ++ setitimer@Base 4.9 ++ setlinebuf@Base 10 ++ setlocale@Base 4.9 ++ setpwent@Base 5 ++ setvbuf@Base 10 ++ sigaction@Base 4.8 ++ sigaltstack@Base 11 ++ sigandset@Base 11 ++ sigemptyset@Base 4.9 ++ sigfillset@Base 4.9 ++ siglongjmp@Base 4.8 ++ signal@Base 4.8 ++ sigorset@Base 11 ++ sigpending@Base 4.9 ++ sigprocmask@Base 4.9 ++ sigtimedwait@Base 4.9 ++ sigwait@Base 4.9 ++ sigwaitinfo@Base 4.9 ++ sincos@Base 4.9 ++ sincosf@Base 4.9 ++ sincosl@Base 4.9 ++ snprintf@Base 5 ++ sprintf@Base 5 ++ sscanf@Base 4.8 ++ stat@Base 12 ++ statfs64@Base 4.9 ++ statfs@Base 4.9 ++ statvfs64@Base 4.9 ++ statvfs@Base 4.9 ++ strcasecmp@Base 4.8 ++ strcasestr@Base 6.2 ++ strcat@Base 4.8 ++ strchr@Base 4.8 ++ strchrnul@Base 7 ++ strcmp@Base 4.8 ++ strcpy@Base 4.8 ++ strcspn@Base 6.2 ++ strdup@Base 4.8 ++ strerror@Base 4.9 ++ strerror_r@Base 4.9 ++ strlen@Base 4.8 ++ strncasecmp@Base 4.8 ++ strncat@Base 4.8 ++ strncmp@Base 4.8 ++ strncpy@Base 4.8 ++ strndup@Base 8 ++ strnlen@Base 4.8 ++ strpbrk@Base 6.2 ++ strptime@Base 4.9 ++ strrchr@Base 7 ++ strspn@Base 6.2 ++ strstr@Base 6.2 ++ strtoimax@Base 4.9 ++ strtok@Base 8 ++ strtol@Base 4.8 ++ strtoll@Base 4.8 ++ strtoumax@Base 4.9 ++ strxfrm@Base 9 ++ strxfrm_l@Base 9 ++ swapcontext@Base 4.8 ++ sysinfo@Base 4.9 ++ tcgetattr@Base 4.9 ++ tempnam@Base 4.9 ++ textdomain@Base 4.9 ++ time@Base 4.9 ++ timerfd_gettime@Base 5 ++ timerfd_settime@Base 5 ++ times@Base 4.9 ++ tmpnam@Base 4.9 ++ tmpnam_r@Base 4.9 ++ tsearch@Base 5 ++ ttyname@Base 10 ++ ttyname_r@Base 7 ++ uname@Base 11 ++ valloc@Base 4.8 ++ vasprintf@Base 5 ++ (arch=armel arm64 any-i386 any-amd64)vfork@Base 10 ++ vfprintf@Base 5 ++ vfscanf@Base 4.8 ++ vprintf@Base 5 ++ vscanf@Base 4.8 ++ vsnprintf@Base 5 ++ vsprintf@Base 5 ++ vsscanf@Base 4.8 ++ wait3@Base 4.9 ++ wait4@Base 4.9 ++ wait@Base 4.9 ++ waitid@Base 4.9 ++ waitpid@Base 4.9 ++ wcrtomb@Base 6.2 ++ wcscat@Base 8 ++ wcsdup@Base 10 ++ wcslen@Base 4.9 ++ wcsncat@Base 8 ++ wcsnlen@Base 8 ++ wcsnrtombs@Base 4.9 ++ wcsrtombs@Base 4.9 ++ wcstombs@Base 4.9 ++ wcsxfrm@Base 9 ++ wcsxfrm_l@Base 9 ++ wctomb@Base 10 ++ wordexp@Base 4.9 ++ write@Base 4.8 ++ writev@Base 4.9 ++ xdr_bool@Base 5 ++ xdr_bytes@Base 5 ++ xdr_char@Base 5 ++ xdr_destroy@Base 11 ++ xdr_double@Base 5 ++ xdr_enum@Base 5 ++ xdr_float@Base 5 ++ xdr_hyper@Base 5 ++ xdr_int16_t@Base 5 ++ xdr_int32_t@Base 5 ++ xdr_int64_t@Base 5 ++ xdr_int8_t@Base 5 ++ xdr_int@Base 5 ++ xdr_long@Base 5 ++ xdr_longlong_t@Base 5 ++ xdr_quad_t@Base 5 ++ xdr_short@Base 5 ++ xdr_string@Base 5 ++ xdr_u_char@Base 5 ++ xdr_u_hyper@Base 5 ++ xdr_u_int@Base 5 ++ xdr_u_long@Base 5 ++ xdr_u_longlong_t@Base 5 ++ xdr_u_quad_t@Base 5 ++ xdr_u_short@Base 5 ++ xdr_uint16_t@Base 5 ++ xdr_uint32_t@Base 5 ++ xdr_uint64_t@Base 5 ++ xdr_uint8_t@Base 5 ++ xdrmem_create@Base 5 ++ xdrrec_create@Base 11 ++ xdrstdio_create@Base 5 diff --cc debian/libasan8.symbols index 0000000,0000000..47fa7f0 new file mode 100644 --- /dev/null +++ b/debian/libasan8.symbols @@@ -1,0 -1,0 +1,27 @@@ ++libasan.so.8 libasan8 #MINVER# ++#include "libasan.symbols.common" ++(arch-bits=32)#include "libasan.symbols.32" ++(arch-bits=64)#include "libasan.symbols.64" ++(arch=armel armhf sparc64 x32)#include "libasan.symbols.16" ++# these are missing on some archs ... ++ (arch=!s390x)__interceptor___tls_get_addr@Base 5 ++ (arch=!powerpc !ppc64 !ppc64el !s390x)__tls_get_addr@Base 5 ++ (arch=powerpc ppc64 ppc64el)__tls_get_addr_opt@Base 7 ++ (arch=s390x)__interceptor___tls_get_addr_internal@Base 8 ++ (arch=s390x)__interceptor___tls_get_offset@Base 8 ++ (arch=s390x)__tls_get_addr_internal@Base 8 ++ (arch=s390x)__tls_get_offset@Base 8 ++ (arch=!powerpc !sparc !sparc64)__interceptor_ptrace@Base 4.9 ++ (arch=!powerpc !sparc !sparc64)ptrace@Base 4.9 ++ (arch=armel armhf)__interceptor___aeabi_memclr4@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memclr8@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memclr@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memcpy4@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memcpy8@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memcpy@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memmove4@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memmove8@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memmove@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memset4@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memset8@Base 5 ++ (arch=armel armhf)__interceptor___aeabi_memset@Base 5 diff --cc debian/libatomic.symbols index 0000000,0000000..f50770d new file mode 100644 --- /dev/null +++ b/debian/libatomic.symbols @@@ -1,0 -1,0 +1,4 @@@ ++libatomic.so.1 #PACKAGE# #MINVER# ++ (symver)LIBATOMIC_1.0 4.8 ++ (symver)LIBATOMIC_1.1 4.9 ++ (symver)LIBATOMIC_1.2 6 diff --cc debian/libcc1-0.symbols index 0000000,0000000..5af2e06 new file mode 100644 --- /dev/null +++ b/debian/libcc1-0.symbols @@@ -1,0 -1,0 +1,70 @@@ ++libcc1.so.0 libcc1-0 #MINVER# ++ (optional=abi_c++98)_ZNSs12_S_constructIPcEES0_T_S1_RKSaIcESt20forward_iterator_tag@Base 5 ++ (optional=abi_c++98)_ZNSt6vectorISsSaISsEE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPSsS1_EERKSs@Base 5 ++ (optional=abi_c++11)_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEEvDpOT_@Base 6 ++ (optional=abi_c++11)_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE19_M_emplace_back_auxIJRKS5_EEEvDpOT_@Base 6 ++ (optional=abi_c++11)_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE19_M_emplace_back_auxIJS5_EEEvDpOT_@Base 6 ++ (optional=abi_c++17)_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJRKS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_@Base 8 ++ (optional=abi_c++17)_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_@Base 8 ++ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag@Base 8 ++ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag@Base 8 ++ (optional=abi_c++11)_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED1Ev@Base 10 ++ (optional=abi_c++11)_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev@Base 10 ++ (optional=abi_c++11)_ZZNSt8__detail18__to_chars_10_implIjEEvPcjT_E8__digits@Base 12 ++ _xexit_cleanup@Base 5 ++ concat@Base 5 ++ concat_copy2@Base 5 ++ concat_copy@Base 5 ++ concat_length@Base 5 ++ gcc_c_fe_context@Base 5 ++ gcc_cp_fe_context@Base 7 ++ htab_clear_slot@Base 5 ++ htab_collisions@Base 5 ++ htab_create@Base 5 ++ htab_create_alloc@Base 5 ++ htab_create_alloc_ex@Base 5 ++ htab_create_typed_alloc@Base 5 ++ htab_delete@Base 5 ++ htab_elements@Base 5 ++ htab_empty@Base 5 ++ htab_eq_pointer@Base 5 ++ htab_eq_string@Base 12 ++ htab_find@Base 5 ++ htab_find_slot@Base 5 ++ htab_find_slot_with_hash@Base 5 ++ htab_find_with_hash@Base 5 ++ htab_hash_pointer@Base 5 ++ htab_hash_string@Base 5 ++ htab_remove_elt@Base 5 ++ htab_remove_elt_with_hash@Base 5 ++ htab_set_functions_ex@Base 5 ++ htab_size@Base 5 ++ htab_traverse@Base 5 ++ htab_traverse_noresize@Base 5 ++ htab_try_create@Base 5 ++ iterative_hash@Base 5 ++ libiberty_concat_ptr@Base 5 ++ reconcat@Base 5 ++ xcalloc@Base 5 ++ xexit@Base 5 ++ xmalloc@Base 5 ++ xmalloc_failed@Base 5 ++ xmalloc_set_program_name@Base 5 ++ xre_comp@Base 5 ++ xre_compile_fastmap@Base 5 ++ xre_compile_pattern@Base 5 ++ xre_exec@Base 5 ++ xre_match@Base 5 ++ xre_match_2@Base 5 ++ xre_max_failures@Base 5 ++ xre_search@Base 5 ++ xre_search_2@Base 5 ++ xre_set_registers@Base 5 ++ xre_set_syntax@Base 5 ++ xre_syntax_options@Base 5 ++ xrealloc@Base 5 ++ xregcomp@Base 5 ++ xregerror@Base 5 ++ xregexec@Base 5 ++ xregfree@Base 5 ++ xstrdup@Base 7 diff --cc debian/libgcc-s.symbols index 0000000,0000000..28e5f8f new file mode 100644 --- /dev/null +++ b/debian/libgcc-s.symbols @@@ -1,0 -1,0 +1,28 @@@ ++libgcc_s.so.1 #PACKAGE# #MINVER# ++ (symver)GCC_3.0 3.0 ++ (symver)GCC_3.3 3.3 ++ (symver)GCC_3.3.1 3.3.1 ++# __gcc_personality_sj0, __gcc_personality_v0 ++#(symver|optional)GCC_3.3.2 3.3.2 ++ (symver|arch=arc armel armhf mips mipsel mipsn32 mipsn32el mips64 mips64el powerpc sh4)GCC_3.3.4 3.3.4 ++ (symver)GCC_3.4 3.4 ++ (symver)GCC_3.4.2 3.4.2 ++#(symver|arch-bits=32)GCC_3.4.4 3.4.4 ++ (symver|arch=!arc !armel !armhf !any-i386 !mips !mipsel !powerpc !s390 !sh4 !sparc)GCC_3.4.4 3.4.4 ++ (symver|arch=armel armhf|ignore-blacklist)GCC_3.5 3.5 ++ (symver)GCC_4.0.0 4.0 ++ (symver|arch=powerpc s390 s390x)GCC_4.1.0 4.1 ++ (symver)GCC_4.2.0 4.2 ++ (symver)GCC_4.3.0 4.3 ++ (symver|arch=any-i386 mips mipsel mipsn32 mipsn32el mips64 mips64el riscv64 sh4)GCC_4.4.0 4.4 ++ (symver|arch=arm64 any-i386 mipsn32 mipsn32el mips64 mips64el riscv64)GCC_4.5.0 4.5 ++#(symver|optional)GCC_4.6.0 4.6 ++ (symver)GCC_4.7.0 4.7 ++ (symver|arch=any-amd64 any-i386 x32)GCC_4.8.0 4.8 ++ (symver|arch=!arc !any-amd64 !x32 !sparc64 !s390x !sh4)GLIBC_2.0 4.2 ++ (symver|arch=s390x sh4 sparc64)GLIBC_2.2 4.2 ++ (symver|arch=sparc)GCC_LDBL_3.0 3.0 ++ (symver|arch=alpha sparc)GCC_LDBL_4.0.0 4.0 ++ (symver)GCC_7.0.0 7 ++ (symver|arch=arm64)GCC_11.0 11 ++ (symver|arch=amd64 i386 x32)GCC_12.0.0 12 diff --cc debian/libgcc-s2.symbols.m68k index 0000000,0000000..9c308ad new file mode 100644 --- /dev/null +++ b/debian/libgcc-s2.symbols.m68k @@@ -1,0 -1,0 +1,162 @@@ ++libgcc_s.so.2 libgcc-s2 #MINVER# ++ GCC_3.0@GCC_3.0 4.2.1 ++ GCC_3.3.1@GCC_3.3.1 4.2.1 ++ GCC_3.3.4@GCC_3.3.4 4.4.5 ++ GCC_3.3@GCC_3.3 4.2.1 ++ GCC_3.4.2@GCC_3.4.2 4.2.1 ++ GCC_3.4@GCC_3.4 4.2.1 ++ GCC_4.0.0@GCC_4.0.0 4.2.1 ++ GCC_4.2.0@GCC_4.2.0 4.2.1 ++ GCC_4.3.0@GCC_4.3.0 4.3.0 ++ GCC_4.5.0@GCC_4.5.0 4.5 ++ GCC_4.7.0@GCC_4.7.0 4.7 ++ GLIBC_2.0@GLIBC_2.0 4.2.1 ++ _Unwind_Backtrace@GCC_3.3 4.2.1 ++ _Unwind_DeleteException@GCC_3.0 4.2.1 ++ _Unwind_FindEnclosingFunction@GCC_3.3 4.2.1 ++ _Unwind_Find_FDE@GCC_3.0 4.2.1 ++ _Unwind_ForcedUnwind@GCC_3.0 4.2.1 ++ _Unwind_GetCFA@GCC_3.3 4.2.1 ++ _Unwind_GetDataRelBase@GCC_3.0 4.2.1 ++ _Unwind_GetGR@GCC_3.0 4.2.1 ++ _Unwind_GetIP@GCC_3.0 4.2.1 ++ _Unwind_GetIPInfo@GCC_4.2.0 4.2.1 ++ _Unwind_GetLanguageSpecificData@GCC_3.0 4.2.1 ++ _Unwind_GetRegionStart@GCC_3.0 4.2.1 ++ _Unwind_GetTextRelBase@GCC_3.0 4.2.1 ++ _Unwind_RaiseException@GCC_3.0 4.2.1 ++ _Unwind_Resume@GCC_3.0 4.2.1 ++ _Unwind_Resume_or_Rethrow@GCC_3.3 4.2.1 ++ _Unwind_SetGR@GCC_3.0 4.2.1 ++ _Unwind_SetIP@GCC_3.0 4.2.1 ++ __absvdi2@GCC_3.0 4.2.1 ++ __absvsi2@GCC_3.0 4.2.1 ++ __adddf3@GCC_3.0 4.4.5 ++ __addsf3@GCC_3.0 4.4.5 ++ __addvdi3@GCC_3.0 4.2.1 ++ __addvsi3@GCC_3.0 4.2.1 ++ __addxf3@GCC_3.0 4.4.5 ++ __ashldi3@GCC_3.0 4.2.1 ++ __ashrdi3@GCC_3.0 4.2.1 ++ __bswapdi2@GCC_4.3.0 4.3.0 ++ __bswapsi2@GCC_4.3.0 4.3.0 ++ __clear_cache@GCC_3.0 4.2.1 ++ __clrsbdi2@GCC_4.7.0 4.7 ++ __clrsbsi2@GCC_4.7.0 4.7 ++ __clzdi2@GCC_3.4 4.2.1 ++ __clzsi2@GCC_3.4 4.2.1 ++ __cmpdi2@GCC_3.0 4.2.1 ++ __ctzdi2@GCC_3.4 4.2.1 ++ __ctzsi2@GCC_3.4 4.2.1 ++ __deregister_frame@GLIBC_2.0 4.2.1 ++ __deregister_frame_info@GLIBC_2.0 4.2.1 ++ __deregister_frame_info_bases@GCC_3.0 4.2.1 ++ __divdc3@GCC_4.0.0 4.2.1 ++ __divdf3@GCC_3.0 4.4.5 ++ __divdi3@GLIBC_2.0 4.2.1 ++ __divsc3@GCC_4.0.0 4.2.1 ++ __divsf3@GCC_3.0 4.4.5 ++ __divsi3@GCC_3.0 4.4.5 ++ __divxc3@GCC_4.0.0 4.2.1 ++ __divxf3@GCC_3.0 4.4.5 ++ __emutls_get_address@GCC_4.3.0 4.3.0 ++ __emutls_register_common@GCC_4.3.0 4.3.0 ++ __enable_execute_stack@GCC_3.4.2 4.2.1 ++ __eqdf2@GCC_3.0 4.4.5 ++ __eqsf2@GCC_3.0 4.4.5 ++ __eqxf2@GCC_3.0 4.4.5 ++ __extenddfxf2@GCC_3.0 4.4.5 ++ __extendsfdf2@GCC_3.0 4.4.5 ++ __extendsfxf2@GCC_3.0 4.4.5 ++ __ffsdi2@GCC_3.0 4.2.1 ++ __ffssi2@GCC_4.3.0 4.3.0 ++ __fixdfdi@GCC_3.0 4.2.1 ++ __fixdfsi@GCC_3.0 4.4.5 ++ __fixsfdi@GCC_3.0 4.2.1 ++ __fixsfsi@GCC_3.0 4.4.5 ++ __fixunsdfdi@GCC_3.0 4.2.1 ++ __fixunsdfsi@GCC_3.0 4.2.1 ++ __fixunssfdi@GCC_3.0 4.2.1 ++ __fixunssfsi@GCC_3.0 4.2.1 ++ __fixunsxfdi@GCC_3.0 4.2.1 ++ __fixunsxfsi@GCC_3.0 4.2.1 ++ __fixxfdi@GCC_3.0 4.2.1 ++ __fixxfsi@GCC_3.0 4.4.5 ++ __floatdidf@GCC_3.0 4.2.1 ++ __floatdisf@GCC_3.0 4.2.1 ++ __floatdixf@GCC_3.0 4.2.1 ++ __floatsidf@GCC_3.0 4.4.5 ++ __floatsisf@GCC_3.0 4.4.5 ++ __floatsixf@GCC_3.0 4.4.5 ++ __floatundidf@GCC_4.2.0 4.2.1 ++ __floatundisf@GCC_4.2.0 4.2.1 ++ __floatundixf@GCC_4.2.0 4.2.1 ++ __floatunsidf@GCC_4.2.0 4.4.5 ++ __floatunsisf@GCC_4.2.0 4.4.5 ++ __floatunsixf@GCC_4.2.0 4.4.5 ++ __frame_state_for@GLIBC_2.0 4.2.1 ++ __gcc_personality_v0@GCC_3.3.1 4.2.1 ++ __gedf2@GCC_3.0 4.4.5 ++ __gesf2@GCC_3.0 4.4.5 ++ __gexf2@GCC_3.0 4.4.5 ++ __gtdf2@GCC_3.0 4.4.5 ++ __gtsf2@GCC_3.0 4.4.5 ++ __gtxf2@GCC_3.0 4.4.5 ++ __ledf2@GCC_3.0 4.4.5 ++ __lesf2@GCC_3.0 4.4.5 ++ __lexf2@GCC_3.0 4.4.5 ++ __lshrdi3@GCC_3.0 4.2.1 ++ __ltdf2@GCC_3.0 4.4.5 ++ __ltsf2@GCC_3.0 4.4.5 ++ __ltxf2@GCC_3.0 4.4.5 ++ __moddi3@GLIBC_2.0 4.2.1 ++ __modsi3@GCC_3.0 4.4.5 ++ __muldc3@GCC_4.0.0 4.2.1 ++ __muldf3@GCC_3.0 4.4.5 ++ __muldi3@GCC_3.0 4.2.1 ++ __mulsc3@GCC_4.0.0 4.2.1 ++ __mulsf3@GCC_3.0 4.4.5 ++ __mulsi3@GCC_3.0 4.4.5 ++ __mulvdi3@GCC_3.0 4.2.1 ++ __mulvsi3@GCC_3.0 4.2.1 ++ __mulxc3@GCC_4.0.0 4.2.1 ++ __mulxf3@GCC_3.0 4.4.5 ++ __nedf2@GCC_3.0 4.4.5 ++ __negdf2@GCC_3.0 4.4.5 ++ __negdi2@GCC_3.0 4.2.1 ++ __negsf2@GCC_3.0 4.4.5 ++ __negvdi2@GCC_3.0 4.2.1 ++ __negvsi2@GCC_3.0 4.2.1 ++ __negxf2@GCC_3.0 4.4.5 ++ __nesf2@GCC_3.0 4.4.5 ++ __nexf2@GCC_3.0 4.4.5 ++ __paritydi2@GCC_3.4 4.2.1 ++ __paritysi2@GCC_3.4 4.2.1 ++ __popcountdi2@GCC_3.4 4.2.1 ++ __popcountsi2@GCC_3.4 4.2.1 ++ __powidf2@GCC_4.0.0 4.2.1 ++ __powisf2@GCC_4.0.0 4.2.1 ++ __powixf2@GCC_4.0.0 4.2.1 ++ __register_frame@GLIBC_2.0 4.2.1 ++ __register_frame_info@GLIBC_2.0 4.2.1 ++ __register_frame_info_bases@GCC_3.0 4.2.1 ++ __register_frame_info_table@GLIBC_2.0 4.2.1 ++ __register_frame_info_table_bases@GCC_3.0 4.2.1 ++ __register_frame_table@GLIBC_2.0 4.2.1 ++ __subdf3@GCC_3.0 4.4.5 ++ __subsf3@GCC_3.0 4.4.5 ++ __subvdi3@GCC_3.0 4.2.1 ++ __subvsi3@GCC_3.0 4.2.1 ++ __subxf3@GCC_3.0 4.4.5 ++ __truncdfsf2@GCC_3.0 4.4.5 ++ __truncxfdf2@GCC_3.0 4.4.5 ++ __truncxfsf2@GCC_3.0 4.4.5 ++ __ucmpdi2@GCC_3.0 4.2.1 ++ __udivdi3@GLIBC_2.0 4.2.1 ++ __udivmoddi4@GCC_3.0 4.2.1 ++ __udivsi3@GCC_3.0 4.4.5 ++ __umoddi3@GLIBC_2.0 4.2.1 ++ __umodsi3@GCC_3.0 4.4.5 ++ __unorddf2@GCC_3.3.4 4.4.5 ++ __unordsf2@GCC_3.3.4 4.4.5 ++ __unordxf2@GCC_4.5.0 4.7 diff --cc debian/libgcc-s4.symbols.hppa index 0000000,0000000..6f4694a new file mode 100644 --- /dev/null +++ b/debian/libgcc-s4.symbols.hppa @@@ -1,0 -1,0 +1,96 @@@ ++libgcc_s.so.4 libgcc-s4 #MINVER# ++ GCC_3.0@GCC_3.0 4.1.1 ++ GCC_3.3.1@GCC_3.3.1 4.1.1 ++ GCC_3.3@GCC_3.3 4.1.1 ++ GCC_3.4.2@GCC_3.4.2 4.1.1 ++ GCC_3.4@GCC_3.4 4.1.1 ++ GCC_4.0.0@GCC_4.0.0 4.1.1 ++ GCC_4.2.0@GCC_4.2.0 4.1.1 ++ GCC_4.3.0@GCC_4.3.0 4.3 ++ GCC_4.7.0@GCC_4.7.0 1:4.7 ++ GLIBC_2.0@GLIBC_2.0 4.1.1 ++ _Unwind_Backtrace@GCC_3.3 4.1.1 ++ _Unwind_DeleteException@GCC_3.0 4.1.1 ++ _Unwind_FindEnclosingFunction@GCC_3.3 4.1.1 ++ _Unwind_Find_FDE@GCC_3.0 4.1.1 ++ _Unwind_ForcedUnwind@GCC_3.0 4.1.1 ++ _Unwind_GetCFA@GCC_3.3 4.1.1 ++ _Unwind_GetDataRelBase@GCC_3.0 4.1.1 ++ _Unwind_GetGR@GCC_3.0 4.1.1 ++ _Unwind_GetIP@GCC_3.0 4.1.1 ++ _Unwind_GetIPInfo@GCC_4.2.0 4.1.1 ++ _Unwind_GetLanguageSpecificData@GCC_3.0 4.1.1 ++ _Unwind_GetRegionStart@GCC_3.0 4.1.1 ++ _Unwind_GetTextRelBase@GCC_3.0 4.1.1 ++ _Unwind_RaiseException@GCC_3.0 4.1.1 ++ _Unwind_Resume@GCC_3.0 4.1.1 ++ _Unwind_Resume_or_Rethrow@GCC_3.3 4.1.1 ++ _Unwind_SetGR@GCC_3.0 4.1.1 ++ _Unwind_SetIP@GCC_3.0 4.1.1 ++ __absvdi2@GCC_3.0 4.1.1 ++ __absvsi2@GCC_3.0 4.1.1 ++ __addvdi3@GCC_3.0 4.1.1 ++ __addvsi3@GCC_3.0 4.1.1 ++ __ashldi3@GCC_3.0 4.1.1 ++ __ashrdi3@GCC_3.0 4.1.1 ++ __bswapdi2@GCC_4.3.0 4.3 ++ __bswapsi2@GCC_4.3.0 4.3 ++ __clear_cache@GCC_3.0 4.1.1 ++ __clrsbdi2@GCC_4.7.0 4.7 ++ __clrsbsi2@GCC_4.7.0 4.7 ++ __clzdi2@GCC_3.4 4.1.1 ++ __clzsi2@GCC_3.4 4.1.1 ++ __cmpdi2@GCC_3.0 4.1.1 ++ __ctzdi2@GCC_3.4 4.1.1 ++ __ctzsi2@GCC_3.4 4.1.1 ++ __deregister_frame@GLIBC_2.0 4.1.1 ++ __deregister_frame_info@GLIBC_2.0 4.1.1 ++ __deregister_frame_info_bases@GCC_3.0 4.1.1 ++ __divdc3@GCC_4.0.0 4.1.1 ++ __divdi3@GLIBC_2.0 4.1.1 ++ __divsc3@GCC_4.0.0 4.1.1 ++ __emutls_get_address@GCC_4.3.0 4.3 ++ __emutls_register_common@GCC_4.3.0 4.3 ++ __enable_execute_stack@GCC_3.4.2 4.1.1 ++ __ffsdi2@GCC_3.0 4.1.1 ++ __ffssi2@GCC_4.3.0 4.3 ++ __fixdfdi@GCC_3.0 4.1.1 ++ __fixsfdi@GCC_3.0 4.1.1 ++ __fixunsdfdi@GCC_3.0 4.1.1 ++ __fixunsdfsi@GCC_3.0 4.1.1 ++ __fixunssfdi@GCC_3.0 4.1.1 ++ __fixunssfsi@GCC_3.0 4.1.1 ++ __floatdidf@GCC_3.0 4.1.1 ++ __floatdisf@GCC_3.0 4.1.1 ++ __floatundidf@GCC_4.2.0 4.2.1 ++ __floatundisf@GCC_4.2.0 4.2.1 ++ __frame_state_for@GLIBC_2.0 4.1.1 ++ __gcc_personality_v0@GCC_3.3.1 4.1.1 ++ __lshrdi3@GCC_3.0 4.1.1 ++ __moddi3@GLIBC_2.0 4.1.1 ++ __muldc3@GCC_4.0.0 4.1.1 ++ __muldi3@GCC_3.0 4.1.1 ++ __mulsc3@GCC_4.0.0 4.1.1 ++ __mulvdi3@GCC_3.0 4.1.1 ++ __mulvsi3@GCC_3.0 4.1.1 ++ __negdi2@GCC_3.0 4.1.1 ++ __negvdi2@GCC_3.0 4.1.1 ++ __negvsi2@GCC_3.0 4.1.1 ++ __paritydi2@GCC_3.4 4.1.1 ++ __paritysi2@GCC_3.4 4.1.1 ++ __popcountdi2@GCC_3.4 4.1.1 ++ __popcountsi2@GCC_3.4 4.1.1 ++ __powidf2@GCC_4.0.0 4.1.1 ++ __powisf2@GCC_4.0.0 4.1.1 ++ __register_frame@GLIBC_2.0 4.1.1 ++ __register_frame_info@GLIBC_2.0 4.1.1 ++ __register_frame_info_bases@GCC_3.0 4.1.1 ++ __register_frame_info_table@GLIBC_2.0 4.1.1 ++ __register_frame_info_table_bases@GCC_3.0 4.1.1 ++ __register_frame_table@GLIBC_2.0 4.1.1 ++ __subvdi3@GCC_3.0 4.1.1 ++ __subvsi3@GCC_3.0 4.1.1 ++ __ucmpdi2@GCC_3.0 4.1.1 ++ __udivdi3@GLIBC_2.0 4.1.1 ++ __udivmoddi4@GCC_3.0 4.1.1 ++ __umoddi3@GLIBC_2.0 4.1.1 diff --cc debian/libgcc.symbols.aeabi index 0000000,0000000..9e70dc2 new file mode 100644 --- /dev/null +++ b/debian/libgcc.symbols.aeabi @@@ -1,0 -1,0 +1,69 @@@ ++ __aeabi_cdcmpeq@GCC_3.5 3.5 ++ __aeabi_cdcmple@GCC_3.5 3.5 ++ __aeabi_cdrcmple@GCC_3.5 3.5 ++ __aeabi_cfcmpeq@GCC_3.5 3.5 ++ __aeabi_cfcmple@GCC_3.5 3.5 ++ __aeabi_cfrcmple@GCC_3.5 3.5 ++ __aeabi_d2f@GCC_3.5 3.5 ++ __aeabi_d2iz@GCC_3.5 3.5 ++ __aeabi_d2lz@GCC_3.5 3.5 ++ __aeabi_d2uiz@GCC_3.5 3.5 ++ __aeabi_d2ulz@GCC_3.5 3.5 ++ __aeabi_dadd@GCC_3.5 3.5 ++ __aeabi_dcmpeq@GCC_3.5 3.5 ++ __aeabi_dcmpge@GCC_3.5 3.5 ++ __aeabi_dcmpgt@GCC_3.5 3.5 ++ __aeabi_dcmple@GCC_3.5 3.5 ++ __aeabi_dcmplt@GCC_3.5 3.5 ++ __aeabi_dcmpun@GCC_3.5 3.5 ++ __aeabi_ddiv@GCC_3.5 3.5 ++ __aeabi_dmul@GCC_3.5 3.5 ++ __aeabi_dneg@GCC_3.5 3.5 ++ __aeabi_drsub@GCC_3.5 3.5 ++ __aeabi_dsub@GCC_3.5 3.5 ++ __aeabi_f2d@GCC_3.5 3.5 ++ __aeabi_f2iz@GCC_3.5 3.5 ++ __aeabi_f2lz@GCC_3.5 3.5 ++ __aeabi_f2uiz@GCC_3.5 3.5 ++ __aeabi_f2ulz@GCC_3.5 3.5 ++ __aeabi_fadd@GCC_3.5 3.5 ++ __aeabi_fcmpeq@GCC_3.5 3.5 ++ __aeabi_fcmpge@GCC_3.5 3.5 ++ __aeabi_fcmpgt@GCC_3.5 3.5 ++ __aeabi_fcmple@GCC_3.5 3.5 ++ __aeabi_fcmplt@GCC_3.5 3.5 ++ __aeabi_fcmpun@GCC_3.5 3.5 ++ __aeabi_fdiv@GCC_3.5 3.5 ++ __aeabi_fmul@GCC_3.5 3.5 ++ __aeabi_fneg@GCC_3.5 3.5 ++ __aeabi_frsub@GCC_3.5 3.5 ++ __aeabi_fsub@GCC_3.5 3.5 ++ __aeabi_i2d@GCC_3.5 3.5 ++ __aeabi_i2f@GCC_3.5 3.5 ++ __aeabi_idiv@GCC_3.5 3.5 ++ __aeabi_idiv0@GCC_3.5 1:4.5.0 ++ __aeabi_idivmod@GCC_3.5 3.5 ++ __aeabi_l2d@GCC_3.5 3.5 ++ __aeabi_l2f@GCC_3.5 3.5 ++ __aeabi_lasr@GCC_3.5 3.5 ++ __aeabi_lcmp@GCC_3.5 3.5 ++ __aeabi_ldivmod@GCC_3.5 3.5 ++ __aeabi_ldiv0@GCC_3.5 1:4.5.0 ++ __aeabi_llsl@GCC_3.5 3.5 ++ __aeabi_llsr@GCC_3.5 3.5 ++ __aeabi_lmul@GCC_3.5 3.5 ++ __aeabi_ui2d@GCC_3.5 3.5 ++ __aeabi_ui2f@GCC_3.5 3.5 ++ __aeabi_uidiv@GCC_3.5 3.5 ++ __aeabi_uidivmod@GCC_3.5 3.5 ++ __aeabi_ul2d@GCC_3.5 3.5 ++ __aeabi_ul2f@GCC_3.5 3.5 ++ __aeabi_ulcmp@GCC_3.5 3.5 ++ __aeabi_uldivmod@GCC_3.5 3.5 ++ __aeabi_unwind_cpp_pr0@GCC_3.5 3.5 ++ __aeabi_unwind_cpp_pr1@GCC_3.5 3.5 ++ __aeabi_unwind_cpp_pr2@GCC_3.5 3.5 ++ __aeabi_uread4@GCC_3.5 3.5 ++ __aeabi_uread8@GCC_3.5 3.5 ++ __aeabi_uwrite4@GCC_3.5 3.5 ++ __aeabi_uwrite8@GCC_3.5 3.5 diff --cc debian/libgccjit0.symbols index 0000000,0000000..618622f new file mode 100644 --- /dev/null +++ b/debian/libgccjit0.symbols @@@ -1,0 -1,0 +1,26 @@@ ++libgccjit.so.0 #PACKAGE# #MINVER# ++ (symver)LIBGCCJIT_ABI_0 5.1 ++ (symver)LIBGCCJIT_ABI_1 5.1 ++ (symver)LIBGCCJIT_ABI_2 5.1 ++ (symver)LIBGCCJIT_ABI_3 5.1 ++ (symver)LIBGCCJIT_ABI_4 6 ++ (symver)LIBGCCJIT_ABI_5 6 ++ (symver)LIBGCCJIT_ABI_6 7 ++ (symver)LIBGCCJIT_ABI_7 8 ++ (symver)LIBGCCJIT_ABI_8 8 ++ (symver)LIBGCCJIT_ABI_9 8 ++ (symver)LIBGCCJIT_ABI_10 8 ++ (symver)LIBGCCJIT_ABI_11 8 ++ (symver)LIBGCCJIT_ABI_12 10 ++ (symver)LIBGCCJIT_ABI_13 10 ++ (symver)LIBGCCJIT_ABI_14 11 ++ (symver)LIBGCCJIT_ABI_15 11 ++ (symver)LIBGCCJIT_ABI_16 12 ++ (symver)LIBGCCJIT_ABI_17 12 ++ (symver)LIBGCCJIT_ABI_18 12 ++ (symver)LIBGCCJIT_ABI_19 12 ++ (symver)LIBGCCJIT_ABI_20 12 ++ (symver)LIBGCCJIT_ABI_21 12 ++ (symver)LIBGCCJIT_ABI_22 12 ++ (symver)LIBGCCJIT_ABI_23 12 ++ (symver)LIBGCCJIT_ABI_24 12 diff --cc debian/libgfortran.symbols index 0000000,0000000..17f50d7 new file mode 100644 --- /dev/null +++ b/debian/libgfortran.symbols @@@ -1,0 -1,0 +1,9 @@@ ++libgfortran.so.5 #PACKAGE# #MINVER# ++ (symver)GFORTRAN_8 8 ++ (symver)GFORTRAN_9 9 ++ (symver)GFORTRAN_9.2 9.1 ++ (symver)GFORTRAN_10 10 ++ (symver)GFORTRAN_10.2 10.2 ++ (symver)GFORTRAN_12 11.2 ++ (symver)GFORTRAN_C99_8 8 ++ (symver)GFORTRAN_F2C_8 8 diff --cc debian/libgm2.symbols index 0000000,0000000..89b3b3e new file mode 100644 --- /dev/null +++ b/debian/libgm2.symbols @@@ -1,0 -1,0 +1,1644 @@@ ++libm2cor.so.17 #PACKAGE# #MINVER# ++ Debug_DebugString@Base 10 ++ Debug_Halt@Base 10 ++ Debug_PushOutput@Base 10 ++ Executive_DebugProcess@Base 10 ++ Executive_GetCurrentProcess@Base 10 ++ Executive_InitProcess@Base 10 ++ Executive_InitSemaphore@Base 10 ++ Executive_KillProcess@Base 10 ++ Executive_ProcessName@Base 10 ++ Executive_Ps@Base 10 ++ Executive_Resume@Base 10 ++ Executive_RotateRunQueue@Base 10 ++ Executive_Signal@Base 10 ++ Executive_Suspend@Base 10 ++ Executive_Wait@Base 10 ++ Executive_WaitForIO@Base 10 ++ KeyBoardLEDs_SwitchCaps@Base 10 ++ KeyBoardLEDs_SwitchLeds@Base 10 ++ KeyBoardLEDs_SwitchNum@Base 10 ++ KeyBoardLEDs_SwitchScroll@Base 10 ++ SYSTEM_IOTRANSFER@Base 10 ++ SYSTEM_LISTEN@Base 10 ++ SYSTEM_ListenLoop@Base 10 ++ SYSTEM_NEWPROCESS@Base 10 ++ SYSTEM_RotateLeft@Base 10 ++ SYSTEM_RotateRight@Base 10 ++ SYSTEM_RotateVal@Base 10 ++ SYSTEM_ShiftLeft@Base 10 ++ SYSTEM_ShiftRight@Base 10 ++ SYSTEM_ShiftVal@Base 10 ++ SYSTEM_TRANSFER@Base 10 ++ SYSTEM_TurnInterrupts@Base 10 ++ TimerHandler_ArmEvent@Base 10 ++ TimerHandler_Cancel@Base 10 ++ TimerHandler_GetTicks@Base 10 ++ TimerHandler_ReArmEvent@Base 10 ++ TimerHandler_Sleep@Base 10 ++ TimerHandler_WaitOn@Base 10 ++ _M2_Debug_finish@Base 10 ++ _M2_Debug_init@Base 10 ++ _M2_Executive_finish@Base 10 ++ _M2_Executive_init@Base 10 ++ _M2_KeyBoardLEDs_finish@Base 10 ++ _M2_KeyBoardLEDs_init@Base 10 ++ _M2_SYSTEM_finish@Base 10 ++ _M2_SYSTEM_init@Base 10 ++ _M2_TimerHandler_finish@Base 10 ++ _M2_TimerHandler_init@Base 10 ++libm2iso.so.17 #PACKAGE# #MINVER# ++ COROUTINES_ATTACH@Base 10 ++ COROUTINES_CURRENT@Base 10 ++ COROUTINES_DETACH@Base 10 ++ COROUTINES_HANDLER@Base 10 ++ COROUTINES_IOTRANSFER@Base 10 ++ COROUTINES_IsATTACHED@Base 10 ++ COROUTINES_LISTEN@Base 10 ++ COROUTINES_NEWCOROUTINE@Base 10 ++ COROUTINES_PROT@Base 10 ++ COROUTINES_TRANSFER@Base 10 ++ COROUTINES_TurnInterrupts@Base 10 ++ CharClass_IsControl@Base 10 ++ CharClass_IsLetter@Base 10 ++ CharClass_IsLower@Base 10 ++ CharClass_IsNumeric@Base 10 ++ CharClass_IsUpper@Base 10 ++ CharClass_IsWhiteSpace@Base 10 ++ ClientSocket_Close@Base 10 ++ ClientSocket_IsSocket@Base 10 ++ ClientSocket_OpenSocket@Base 10 ++ ComplexMath_IsCMathException@Base 10 ++ ComplexMath_abs@Base 10 ++ ComplexMath_arccos@Base 10 ++ ComplexMath_arcsin@Base 10 ++ ComplexMath_arctan@Base 10 ++ ComplexMath_arg@Base 10 ++ ComplexMath_conj@Base 10 ++ ComplexMath_cos@Base 10 ++ ComplexMath_exp@Base 10 ++ ComplexMath_ln@Base 10 ++ ComplexMath_polarToComplex@Base 10 ++ ComplexMath_power@Base 10 ++ ComplexMath_scalarMult@Base 10 ++ ComplexMath_sin@Base 10 ++ ComplexMath_sqrt@Base 10 ++ ComplexMath_tan@Base 10 ++ ConvStringLong_RealToEngString@Base 10 ++ ConvStringLong_RealToFixedString@Base 10 ++ ConvStringLong_RealToFloatString@Base 10 ++ ConvStringReal_RealToEngString@Base 10 ++ ConvStringReal_RealToFixedString@Base 10 ++ ConvStringReal_RealToFloatString@Base 10 ++ EXCEPTIONS_AllocateSource@Base 10 ++ EXCEPTIONS_CurrentNumber@Base 10 ++ EXCEPTIONS_GetMessage@Base 10 ++ EXCEPTIONS_IsCurrentSource@Base 10 ++ EXCEPTIONS_IsExceptionalExecution@Base 10 ++ EXCEPTIONS_RAISE@Base 10 ++ ErrnoCategory_GetOpenResults@Base 10 ++ ErrnoCategory_IsErrnoHard@Base 10 ++ ErrnoCategory_IsErrnoSoft@Base 10 ++ ErrnoCategory_UnAvailable@Base 10 ++ GeneralUserExceptions_GeneralException@Base 10 ++ GeneralUserExceptions_IsGeneralException@Base 10 ++ GeneralUserExceptions_RaiseGeneralException@Base 10 ++ IOChan_ChanException@Base 10 ++ IOChan_CurrentFlags@Base 10 ++ IOChan_DeviceError@Base 10 ++ IOChan_Flush@Base 10 ++ IOChan_GetName@Base 10 ++ IOChan_InvalidChan@Base 10 ++ IOChan_IsChanException@Base 10 ++ IOChan_Look@Base 10 ++ IOChan_RawRead@Base 10 ++ IOChan_RawWrite@Base 10 ++ IOChan_ReadResult@Base 10 ++ IOChan_Reset@Base 10 ++ IOChan_SetReadResult@Base 10 ++ IOChan_Skip@Base 10 ++ IOChan_SkipLook@Base 10 ++ IOChan_TextRead@Base 10 ++ IOChan_TextWrite@Base 10 ++ IOChan_WriteLn@Base 10 ++ IOLink_AllocateDeviceId@Base 10 ++ IOLink_DeviceTablePtrValue@Base 10 ++ IOLink_IOException@Base 10 ++ IOLink_IsDevice@Base 10 ++ IOLink_IsIOException@Base 10 ++ IOLink_MakeChan@Base 10 ++ IOLink_RAISEdevException@Base 10 ++ IOLink_UnMakeChan@Base 10 ++ IOResult_ReadResult@Base 10 ++ LongComplexMath_IsCMathException@Base 10 ++ LongComplexMath_abs@Base 10 ++ LongComplexMath_arccos@Base 10 ++ LongComplexMath_arcsin@Base 10 ++ LongComplexMath_arctan@Base 10 ++ LongComplexMath_arg@Base 10 ++ LongComplexMath_conj@Base 10 ++ LongComplexMath_cos@Base 10 ++ LongComplexMath_exp@Base 10 ++ LongComplexMath_ln@Base 10 ++ LongComplexMath_polarToComplex@Base 10 ++ LongComplexMath_power@Base 10 ++ LongComplexMath_scalarMult@Base 10 ++ LongComplexMath_sin@Base 10 ++ LongComplexMath_sqrt@Base 10 ++ LongComplexMath_tan@Base 10 ++ LongConv_FormatReal@Base 10 ++ LongConv_IsRConvException@Base 10 ++ LongConv_LengthEngReal@Base 10 ++ LongConv_LengthFixedReal@Base 10 ++ LongConv_LengthFloatReal@Base 10 ++ LongConv_ScanReal@Base 10 ++ LongConv_ValueReal@Base 10 ++ LongIO_ReadReal@Base 10 ++ LongIO_WriteEng@Base 10 ++ LongIO_WriteFixed@Base 10 ++ LongIO_WriteFloat@Base 10 ++ LongIO_WriteReal@Base 10 ++ LongMath_IsRMathException@Base 10 ++ LongMath_arccos@Base 10 ++ LongMath_arcsin@Base 10 ++ LongMath_arctan@Base 10 ++ LongMath_cos@Base 10 ++ LongMath_exp@Base 10 ++ LongMath_ln@Base 10 ++ LongMath_power@Base 10 ++ LongMath_round@Base 10 ++ LongMath_sin@Base 10 ++ LongMath_sqrt@Base 10 ++ LongMath_tan@Base 10 ++ LongStr_RealToEng@Base 10 ++ LongStr_RealToFixed@Base 10 ++ LongStr_RealToFloat@Base 10 ++ LongStr_RealToStr@Base 10 ++ LongStr_StrToReal@Base 10 ++ LongWholeIO_ReadCard@Base 10 ++ LongWholeIO_ReadInt@Base 10 ++ LongWholeIO_WriteCard@Base 10 ++ LongWholeIO_WriteInt@Base 10 ++ LowLong_IsLowException@Base 10 ++ LowLong_currentMode@Base 10 ++ LowLong_exponent@Base 10 ++ LowLong_fraction@Base 10 ++ LowLong_fractpart@Base 10 ++ LowLong_intpart@Base 10 ++ LowLong_pred@Base 10 ++ LowLong_round@Base 10 ++ LowLong_scale@Base 10 ++ LowLong_setMode@Base 10 ++ LowLong_sign@Base 10 ++ LowLong_succ@Base 10 ++ LowLong_synthesize@Base 10 ++ LowLong_trunc@Base 10 ++ LowLong_ulp@Base 10 ++ LowReal_IsLowException@Base 10 ++ LowReal_currentMode@Base 10 ++ LowReal_exponent@Base 10 ++ LowReal_fraction@Base 10 ++ LowReal_fractpart@Base 10 ++ LowReal_intpart@Base 10 ++ LowReal_pred@Base 10 ++ LowReal_round@Base 10 ++ LowReal_scale@Base 10 ++ LowReal_setMode@Base 10 ++ LowReal_sign@Base 10 ++ LowReal_succ@Base 10 ++ LowReal_synthesize@Base 10 ++ LowReal_trunc@Base 10 ++ LowReal_ulp@Base 10 ++ LowShort_IsLowException@Base 10 ++ LowShort_currentMode@Base 10 ++ LowShort_exponent@Base 10 ++ LowShort_fraction@Base 10 ++ LowShort_fractpart@Base 10 ++ LowShort_intpart@Base 10 ++ LowShort_pred@Base 10 ++ LowShort_round@Base 10 ++ LowShort_scale@Base 10 ++ LowShort_setMode@Base 10 ++ LowShort_sign@Base 10 ++ LowShort_succ@Base 10 ++ LowShort_synthesize@Base 10 ++ LowShort_trunc@Base 10 ++ LowShort_ulp@Base 10 ++ M2EXCEPTION_IsM2Exception@Base 10 ++ M2EXCEPTION_M2Exception@Base 10 ++ M2RTS_AssignmentException@Base 10 ++ M2RTS_CaseException@Base 10 ++ M2RTS_DecException@Base 10 ++ M2RTS_DynamicArraySubscriptException@Base 10 ++ M2RTS_ErrorMessage@Base 10 ++ M2RTS_ExclException@Base 10 ++ M2RTS_ExecuteInitialProcedures@Base 10 ++ M2RTS_ExecuteTerminationProcedures@Base 10 ++ M2RTS_ExitOnHalt@Base 10 ++ M2RTS_ForLoopBeginException@Base 10 ++ M2RTS_ForLoopEndException@Base 10 ++ M2RTS_ForLoopToException@Base 10 ++ M2RTS_HALT@Base 10 ++ M2RTS_Halt@Base 10 ++ M2RTS_HasHalted@Base 10 ++ M2RTS_IncException@Base 10 ++ M2RTS_InclException@Base 10 ++ M2RTS_InstallInitialProcedure@Base 10 ++ M2RTS_InstallTerminationProcedure@Base 10 ++ M2RTS_IsTerminating@Base 10 ++ M2RTS_Length@Base 10 ++ M2RTS_NoException@Base 10 ++ M2RTS_NoReturnException@Base 10 ++ M2RTS_ParameterException@Base 10 ++ M2RTS_PointerNilException@Base 10 ++ M2RTS_RealValueException@Base 10 ++ M2RTS_ReturnException@Base 10 ++ M2RTS_RotateException@Base 10 ++ M2RTS_ShiftException@Base 10 ++ M2RTS_StaticArraySubscriptException@Base 10 ++ M2RTS_WholeNonPosDivException@Base 10 ++ M2RTS_WholeNonPosModException@Base 10 ++ M2RTS_WholeValueException@Base 10 ++ M2RTS_WholeZeroDivException@Base 10 ++ M2RTS_WholeZeroRemException@Base 10 ++ MemStream_Close@Base 10 ++ MemStream_IsMem@Base 10 ++ MemStream_OpenRead@Base 10 ++ MemStream_OpenWrite@Base 10 ++ MemStream_Reread@Base 10 ++ MemStream_Rewrite@Base 10 ++ Processes_Activate@Base 10 ++ Processes_Attach@Base 10 ++ Processes_Create@Base 10 ++ Processes_Detach@Base 10 ++ Processes_Handler@Base 10 ++ Processes_IsAttached@Base 10 ++ Processes_IsProcessesException@Base 10 ++ Processes_Me@Base 10 ++ Processes_MyParam@Base 10 ++ Processes_ProcessesException@Base 10 ++ Processes_Start@Base 10 ++ Processes_StopMe@Base 10 ++ Processes_SuspendMe@Base 10 ++ Processes_SuspendMeAndActivate@Base 10 ++ Processes_Switch@Base 10 ++ Processes_UrgencyOf@Base 10 ++ Processes_Wait@Base 10 ++ ProgramArgs_ArgChan@Base 10 ++ ProgramArgs_IsArgPresent@Base 10 ++ ProgramArgs_NextArg@Base 10 ++ RTco_currentInterruptLevel@Base 10 ++ RTco_currentThread@Base 10 ++ RTco_init@Base 10 ++ RTco_initSemaphore@Base 10 ++ RTco_initThread@Base 10 ++ RTco_select@Base 10 ++ RTco_signal@Base 10 ++ RTco_signalThread@Base 10 ++ RTco_transfer@Base 10 ++ RTco_turnInterrupts@Base 10 ++ RTco_wait@Base 10 ++ RTco_waitThread@Base 10 ++ RTdata_GetData@Base 10 ++ RTdata_InitData@Base 10 ++ RTdata_KillData@Base 10 ++ RTdata_MakeModuleId@Base 10 ++ RTentity_DelKey@Base 10 ++ RTentity_GetKey@Base 10 ++ RTentity_InitGroup@Base 10 ++ RTentity_IsIn@Base 10 ++ RTentity_KillGroup@Base 10 ++ RTentity_PutKey@Base 10 ++ RTfio_dogeterrno@Base 10 ++ RTfio_dorbytes@Base 10 ++ RTfio_doreadchar@Base 10 ++ RTfio_dounreadchar@Base 10 ++ RTfio_dowbytes@Base 10 ++ RTfio_dowriteln@Base 10 ++ RTfio_iseof@Base 10 ++ RTfio_iseoln@Base 10 ++ RTfio_iserror@Base 10 ++ RTgen_InitChanDev@Base 10 ++ RTgen_KillChanDev@Base 10 ++ RTgen_RaiseEOFinLook@Base 10 ++ RTgen_RaiseEOFinSkip@Base 10 ++ RTgen_checkErrno@Base 10 ++ RTgen_doLook@Base 10 ++ RTgen_doReadLocs@Base 10 ++ RTgen_doReadText@Base 10 ++ RTgen_doSkip@Base 10 ++ RTgen_doSkipLook@Base 10 ++ RTgen_doWriteLn@Base 10 ++ RTgen_doWriteLocs@Base 10 ++ RTgen_doWriteText@Base 10 ++ RTgenif_InitGenDevIF@Base 10 ++ RTgenif_KillGenDevIF@Base 10 ++ RTgenif_doGetErrno@Base 10 ++ RTgenif_doRBytes@Base 10 ++ RTgenif_doReadChar@Base 10 ++ RTgenif_doUnReadChar@Base 10 ++ RTgenif_doWBytes@Base 10 ++ RTgenif_doWrLn@Base 10 ++ RTgenif_getDID@Base 10 ++ RTgenif_isEOF@Base 10 ++ RTgenif_isEOLN@Base 10 ++ RTgenif_isError@Base 10 ++ RTio_GetDeviceId@Base 10 ++ RTio_GetDevicePtr@Base 10 ++ RTio_GetFile@Base 10 ++ RTio_InitChanId@Base 10 ++ RTio_KillChanId@Base 10 ++ RTio_NilChanId@Base 10 ++ RTio_SetDeviceId@Base 10 ++ RTio_SetDevicePtr@Base 10 ++ RTio_SetFile@Base 10 ++ RandomNumber_RandomBytes@Base 10 ++ RandomNumber_RandomCard@Base 10 ++ RandomNumber_RandomInit@Base 10 ++ RandomNumber_RandomInt@Base 10 ++ RandomNumber_RandomLongCard@Base 10 ++ RandomNumber_RandomLongInt@Base 10 ++ RandomNumber_RandomLongReal@Base 10 ++ RandomNumber_RandomReal@Base 10 ++ RandomNumber_RandomShortCard@Base 10 ++ RandomNumber_RandomShortInt@Base 10 ++ RandomNumber_RandomShortReal@Base 10 ++ RandomNumber_Randomize@Base 10 ++ RawIO_Read@Base 10 ++ RawIO_Write@Base 10 ++ RealConv_FormatReal@Base 10 ++ RealConv_IsRConvException@Base 10 ++ RealConv_LengthEngReal@Base 10 ++ RealConv_LengthFixedReal@Base 10 ++ RealConv_LengthFloatReal@Base 10 ++ RealConv_ScanReal@Base 10 ++ RealConv_ValueReal@Base 10 ++ RealIO_ReadReal@Base 10 ++ RealIO_WriteEng@Base 10 ++ RealIO_WriteFixed@Base 10 ++ RealIO_WriteFloat@Base 10 ++ RealIO_WriteReal@Base 10 ++ RealMath_IsRMathException@Base 10 ++ RealMath_arccos@Base 10 ++ RealMath_arcsin@Base 10 ++ RealMath_arctan@Base 10 ++ RealMath_cos@Base 10 ++ RealMath_exp@Base 10 ++ RealMath_ln@Base 10 ++ RealMath_power@Base 10 ++ RealMath_round@Base 10 ++ RealMath_sin@Base 10 ++ RealMath_sqrt@Base 10 ++ RealMath_tan@Base 10 ++ RealStr_RealToEng@Base 10 ++ RealStr_RealToFixed@Base 10 ++ RealStr_RealToFloat@Base 10 ++ RealStr_RealToStr@Base 10 ++ RealStr_StrToReal@Base 10 ++ RndFile_Close@Base 10 ++ RndFile_CurrentPos@Base 10 ++ RndFile_EndPos@Base 10 ++ RndFile_IsRndFile@Base 10 ++ RndFile_IsRndFileException@Base 10 ++ RndFile_NewPos@Base 10 ++ RndFile_OpenClean@Base 10 ++ RndFile_OpenOld@Base 10 ++ RndFile_SetPos@Base 10 ++ RndFile_StartPos@Base 10 ++ SIOResult_ReadResult@Base 10 ++ SLongIO_ReadReal@Base 10 ++ SLongIO_WriteEng@Base 10 ++ SLongIO_WriteFixed@Base 10 ++ SLongIO_WriteFloat@Base 10 ++ SLongIO_WriteReal@Base 10 ++ SLongWholeIO_ReadCard@Base 10 ++ SLongWholeIO_ReadInt@Base 10 ++ SLongWholeIO_WriteCard@Base 10 ++ SLongWholeIO_WriteInt@Base 10 ++ SRawIO_Read@Base 10 ++ SRawIO_Write@Base 10 ++ SRealIO_ReadReal@Base 10 ++ SRealIO_WriteEng@Base 10 ++ SRealIO_WriteFixed@Base 10 ++ SRealIO_WriteFloat@Base 10 ++ SRealIO_WriteReal@Base 10 ++ SShortIO_ReadReal@Base 10 ++ SShortIO_WriteEng@Base 10 ++ SShortIO_WriteFixed@Base 10 ++ SShortIO_WriteFloat@Base 10 ++ SShortIO_WriteReal@Base 10 ++ SShortWholeIO_ReadCard@Base 10 ++ SShortWholeIO_ReadInt@Base 10 ++ SShortWholeIO_WriteCard@Base 10 ++ SShortWholeIO_WriteInt@Base 10 ++ STextIO_ReadChar@Base 10 ++ STextIO_ReadRestLine@Base 10 ++ STextIO_ReadString@Base 10 ++ STextIO_ReadToken@Base 10 ++ STextIO_SkipLine@Base 10 ++ STextIO_WriteChar@Base 10 ++ STextIO_WriteLn@Base 10 ++ STextIO_WriteString@Base 10 ++ SWholeIO_ReadCard@Base 10 ++ SWholeIO_ReadInt@Base 10 ++ SWholeIO_WriteCard@Base 10 ++ SWholeIO_WriteInt@Base 10 ++ SYSTEM_RotateLeft@Base 10 ++ SYSTEM_RotateRight@Base 10 ++ SYSTEM_RotateVal@Base 10 ++ SYSTEM_ShiftLeft@Base 10 ++ SYSTEM_ShiftRight@Base 10 ++ SYSTEM_ShiftVal@Base 10 ++ Semaphores_Claim@Base 10 ++ Semaphores_CondClaim@Base 10 ++ Semaphores_Create@Base 10 ++ Semaphores_Destroy@Base 10 ++ Semaphores_Release@Base 10 ++ SeqFile_Close@Base 10 ++ SeqFile_IsSeqFile@Base 10 ++ SeqFile_OpenAppend@Base 10 ++ SeqFile_OpenRead@Base 10 ++ SeqFile_OpenWrite@Base 10 ++ SeqFile_Reread@Base 10 ++ SeqFile_Rewrite@Base 10 ++ ServerSocket_Close@Base 10 ++ ServerSocket_IsSocket@Base 10 ++ ServerSocket_OpenAccept@Base 10 ++ ServerSocket_OpenSocketBindListen@Base 10 ++ ShortComplexMath_IsCMathException@Base 10 ++ ShortComplexMath_abs@Base 10 ++ ShortComplexMath_arccos@Base 10 ++ ShortComplexMath_arcsin@Base 10 ++ ShortComplexMath_arctan@Base 10 ++ ShortComplexMath_arg@Base 10 ++ ShortComplexMath_conj@Base 10 ++ ShortComplexMath_cos@Base 10 ++ ShortComplexMath_exp@Base 10 ++ ShortComplexMath_ln@Base 10 ++ ShortComplexMath_polarToComplex@Base 10 ++ ShortComplexMath_power@Base 10 ++ ShortComplexMath_scalarMult@Base 10 ++ ShortComplexMath_sin@Base 10 ++ ShortComplexMath_sqrt@Base 10 ++ ShortComplexMath_tan@Base 10 ++ ShortIO_ReadReal@Base 10 ++ ShortIO_WriteEng@Base 10 ++ ShortIO_WriteFixed@Base 10 ++ ShortIO_WriteFloat@Base 10 ++ ShortIO_WriteReal@Base 10 ++ ShortWholeIO_ReadCard@Base 10 ++ ShortWholeIO_ReadInt@Base 10 ++ ShortWholeIO_WriteCard@Base 10 ++ ShortWholeIO_WriteInt@Base 10 ++ SimpleCipher_InsertCipherLayer@Base 10 ++ SimpleCipher_RemoveCipherLayer@Base 10 ++ StdChans_ErrChan@Base 10 ++ StdChans_InChan@Base 10 ++ StdChans_NullChan@Base 10 ++ StdChans_OutChan@Base 10 ++ StdChans_SetErrChan@Base 10 ++ StdChans_SetInChan@Base 10 ++ StdChans_SetOutChan@Base 10 ++ StdChans_StdErrChan@Base 10 ++ StdChans_StdInChan@Base 10 ++ StdChans_StdOutChan@Base 10 ++ Storage_ALLOCATE@Base 10 ++ Storage_DEALLOCATE@Base 10 ++ Storage_IsStorageException@Base 10 ++ Storage_REALLOCATE@Base 10 ++ Storage_StorageException@Base 10 ++ StreamFile_Close@Base 10 ++ StreamFile_IsStreamFile@Base 10 ++ StreamFile_Open@Base 10 ++ StringChan_writeFieldWidth@Base 10 ++ StringChan_writeString@Base 10 ++ Strings_Append@Base 10 ++ Strings_Assign@Base 10 ++ Strings_CanAppendAll@Base 10 ++ Strings_CanAssignAll@Base 10 ++ Strings_CanConcatAll@Base 10 ++ Strings_CanDeleteAll@Base 10 ++ Strings_CanExtractAll@Base 10 ++ Strings_CanInsertAll@Base 10 ++ Strings_CanReplaceAll@Base 10 ++ Strings_Capitalize@Base 10 ++ Strings_Compare@Base 10 ++ Strings_Concat@Base 10 ++ Strings_Delete@Base 10 ++ Strings_Equal@Base 10 ++ Strings_Extract@Base 10 ++ Strings_FindDiff@Base 10 ++ Strings_FindNext@Base 10 ++ Strings_FindPrev@Base 10 ++ Strings_Insert@Base 10 ++ Strings_Length@Base 10 ++ Strings_Replace@Base 10 ++ SysClock_CanGetClock@Base 10 ++ SysClock_CanSetClock@Base 10 ++ SysClock_GetClock@Base 10 ++ SysClock_IsValidDateTime@Base 10 ++ SysClock_SetClock@Base 10 ++ TERMINATION_HasHalted@Base 10 ++ TERMINATION_IsTerminating@Base 10 ++ TermFile_Close@Base 10 ++ TermFile_IsTermFile@Base 10 ++ TermFile_Open@Base 10 ++ TextIO_ReadChar@Base 10 ++ TextIO_ReadRestLine@Base 10 ++ TextIO_ReadString@Base 10 ++ TextIO_ReadToken@Base 10 ++ TextIO_SkipLine@Base 10 ++ TextIO_WriteChar@Base 10 ++ TextIO_WriteLn@Base 10 ++ TextIO_WriteString@Base 10 ++ WholeConv_FormatCard@Base 10 ++ WholeConv_FormatInt@Base 10 ++ WholeConv_IsWholeConvException@Base 10 ++ WholeConv_LengthCard@Base 10 ++ WholeConv_LengthInt@Base 10 ++ WholeConv_ScanCard@Base 10 ++ WholeConv_ScanInt@Base 10 ++ WholeConv_ValueCard@Base 10 ++ WholeConv_ValueInt@Base 10 ++ WholeIO_ReadCard@Base 10 ++ WholeIO_ReadInt@Base 10 ++ WholeIO_WriteCard@Base 10 ++ WholeIO_WriteInt@Base 10 ++ WholeStr_CardToStr@Base 10 ++ WholeStr_IntToStr@Base 10 ++ WholeStr_StrToCard@Base 10 ++ WholeStr_StrToInt@Base 10 ++ _M2_COROUTINES_finish@Base 10 ++ _M2_COROUTINES_init@Base 10 ++ _M2_ChanConsts_finish@Base 10 ++ _M2_ChanConsts_init@Base 10 ++ _M2_CharClass_finish@Base 10 ++ _M2_CharClass_init@Base 10 ++ _M2_ClientSocket_finish@Base 10 ++ _M2_ClientSocket_init@Base 10 ++ _M2_ComplexMath_finish@Base 10 ++ _M2_ComplexMath_init@Base 10 ++ _M2_ConvStringLong_finish@Base 10 ++ _M2_ConvStringLong_init@Base 10 ++ _M2_ConvStringReal_finish@Base 10 ++ _M2_ConvStringReal_init@Base 10 ++ _M2_ConvTypes_finish@Base 10 ++ _M2_ConvTypes_init@Base 10 ++ _M2_EXCEPTIONS_finish@Base 10 ++ _M2_EXCEPTIONS_init@Base 10 ++ _M2_ErrnoCategory_finish@Base 10 ++ _M2_ErrnoCategory_init@Base 10 ++ _M2_GeneralUserExceptions_finish@Base 10 ++ _M2_GeneralUserExceptions_init@Base 10 ++ _M2_IOChan_finish@Base 10 ++ _M2_IOChan_init@Base 10 ++ _M2_IOConsts_finish@Base 10 ++ _M2_IOConsts_init@Base 10 ++ _M2_IOLink_finish@Base 10 ++ _M2_IOLink_init@Base 10 ++ _M2_IOResult_finish@Base 10 ++ _M2_IOResult_init@Base 10 ++ _M2_LongComplexMath_finish@Base 10 ++ _M2_LongComplexMath_init@Base 10 ++ _M2_LongConv_finish@Base 10 ++ _M2_LongConv_init@Base 10 ++ _M2_LongIO_finish@Base 10 ++ _M2_LongIO_init@Base 10 ++ _M2_LongMath_finish@Base 10 ++ _M2_LongMath_init@Base 10 ++ _M2_LongStr_finish@Base 10 ++ _M2_LongStr_init@Base 10 ++ _M2_LongWholeIO_finish@Base 10 ++ _M2_LongWholeIO_init@Base 10 ++ _M2_LowLong_finish@Base 10 ++ _M2_LowLong_init@Base 10 ++ _M2_LowReal_finish@Base 10 ++ _M2_LowReal_init@Base 10 ++ _M2_LowShort_finish@Base 10 ++ _M2_LowShort_init@Base 10 ++ _M2_M2EXCEPTION_finish@Base 10 ++ _M2_M2EXCEPTION_init@Base 10 ++ _M2_M2RTS_finish@Base 10 ++ _M2_M2RTS_init@Base 10 ++ _M2_MemStream_finish@Base 10 ++ _M2_MemStream_init@Base 10 ++ _M2_Processes_finish@Base 10 ++ _M2_Processes_init@Base 10 ++ _M2_ProgramArgs_finish@Base 10 ++ _M2_ProgramArgs_init@Base 10 ++ _M2_RTco_finish@Base 10 ++ _M2_RTco_init@Base 10 ++ _M2_RTdata_finish@Base 10 ++ _M2_RTdata_init@Base 10 ++ _M2_RTentity_finish@Base 10 ++ _M2_RTentity_init@Base 10 ++ _M2_RTfio_finish@Base 10 ++ _M2_RTfio_init@Base 10 ++ _M2_RTgen_finish@Base 10 ++ _M2_RTgen_init@Base 10 ++ _M2_RTgenif_finish@Base 10 ++ _M2_RTgenif_init@Base 10 ++ _M2_RTio_finish@Base 10 ++ _M2_RTio_init@Base 10 ++ _M2_RandomNumber_finish@Base 10 ++ _M2_RandomNumber_init@Base 10 ++ _M2_RawIO_finish@Base 10 ++ _M2_RawIO_init@Base 10 ++ _M2_RealConv_finish@Base 10 ++ _M2_RealConv_init@Base 10 ++ _M2_RealIO_finish@Base 10 ++ _M2_RealIO_init@Base 10 ++ _M2_RealMath_finish@Base 10 ++ _M2_RealMath_init@Base 10 ++ _M2_RealStr_finish@Base 10 ++ _M2_RealStr_init@Base 10 ++ _M2_RndFile_finish@Base 10 ++ _M2_RndFile_init@Base 10 ++ _M2_SIOResult_finish@Base 10 ++ _M2_SIOResult_init@Base 10 ++ _M2_SLongIO_finish@Base 10 ++ _M2_SLongIO_init@Base 10 ++ _M2_SLongWholeIO_finish@Base 10 ++ _M2_SLongWholeIO_init@Base 10 ++ _M2_SRawIO_finish@Base 10 ++ _M2_SRawIO_init@Base 10 ++ _M2_SRealIO_finish@Base 10 ++ _M2_SRealIO_init@Base 10 ++ _M2_SShortIO_finish@Base 10 ++ _M2_SShortIO_init@Base 10 ++ _M2_SShortWholeIO_finish@Base 10 ++ _M2_SShortWholeIO_init@Base 10 ++ _M2_STextIO_finish@Base 10 ++ _M2_STextIO_init@Base 10 ++ _M2_SWholeIO_finish@Base 10 ++ _M2_SWholeIO_init@Base 10 ++ _M2_SYSTEM_finish@Base 10 ++ _M2_SYSTEM_init@Base 10 ++ _M2_Semaphores_finish@Base 10 ++ _M2_Semaphores_init@Base 10 ++ _M2_SeqFile_finish@Base 10 ++ _M2_SeqFile_init@Base 10 ++ _M2_ServerSocket_finish@Base 10 ++ _M2_ServerSocket_init@Base 10 ++ _M2_ShortComplexMath_finish@Base 10 ++ _M2_ShortComplexMath_init@Base 10 ++ _M2_ShortIO_finish@Base 10 ++ _M2_ShortIO_init@Base 10 ++ _M2_ShortWholeIO_finish@Base 10 ++ _M2_ShortWholeIO_init@Base 10 ++ _M2_SimpleCipher_finish@Base 10 ++ _M2_SimpleCipher_init@Base 10 ++ _M2_StdChans_finish@Base 10 ++ _M2_StdChans_init@Base 10 ++ _M2_Storage_finish@Base 10 ++ _M2_Storage_init@Base 10 ++ _M2_StreamFile_finish@Base 10 ++ _M2_StreamFile_init@Base 10 ++ _M2_StringChan_finish@Base 10 ++ _M2_StringChan_init@Base 10 ++ _M2_Strings_finish@Base 10 ++ _M2_Strings_init@Base 10 ++ _M2_SysClock_finish@Base 10 ++ _M2_SysClock_init@Base 10 ++ _M2_TERMINATION_finish@Base 10 ++ _M2_TERMINATION_init@Base 10 ++ _M2_TermFile_finish@Base 10 ++ _M2_TermFile_init@Base 10 ++ _M2_TextIO_finish@Base 10 ++ _M2_TextIO_init@Base 10 ++ _M2_WholeConv_finish@Base 10 ++ _M2_WholeConv_init@Base 10 ++ _M2_WholeIO_finish@Base 10 ++ _M2_WholeIO_init@Base 10 ++ _M2_WholeStr_finish@Base 10 ++ _M2_WholeStr_init@Base 10 ++ _M2_wrapsock_finish@Base 10 ++ _M2_wrapsock_init@Base 10 ++ _M2_wraptime_finish@Base 10 ++ _M2_wraptime_init@Base 10 ++ currentThread@Base 10 ++ wrapsock_clientOpen@Base 10 ++ wrapsock_clientOpenIP@Base 10 ++ wrapsock_getClientHostname@Base 10 ++ wrapsock_getClientIP@Base 10 ++ wrapsock_getClientPortNo@Base 10 ++ wrapsock_getClientSocketFd@Base 10 ++ wrapsock_getPushBackChar@Base 10 ++ wrapsock_getSizeOfClientInfo@Base 10 ++ wrapsock_setPushBackChar@Base 10 ++ wraptime_GetDST@Base 10 ++ wraptime_GetDay@Base 10 ++ wraptime_GetFractions@Base 10 ++ wraptime_GetHour@Base 10 ++ wraptime_GetMinute@Base 10 ++ wraptime_GetMonth@Base 10 ++ wraptime_GetSecond@Base 10 ++ wraptime_GetSummerTime@Base 10 ++ wraptime_GetYear@Base 10 ++ wraptime_InitTM@Base 10 ++ wraptime_InitTimeval@Base 10 ++ wraptime_InitTimezone@Base 10 ++ wraptime_KillTM@Base 10 ++ wraptime_KillTimeval@Base 10 ++ wraptime_KillTimezone@Base 10 ++ wraptime_SetTimeval@Base 10 ++ wraptime_SetTimezone@Base 10 ++ wraptime_gettimeofday@Base 10 ++ wraptime_localtime_r@Base 10 ++ wraptime_settimeofday@Base 10 ++libm2log.so.17 #PACKAGE# #MINVER# ++ BitBlockOps_BlockAnd@Base 10 ++ BitBlockOps_BlockNot@Base 10 ++ BitBlockOps_BlockOr@Base 10 ++ BitBlockOps_BlockRol@Base 10 ++ BitBlockOps_BlockRor@Base 10 ++ BitBlockOps_BlockShl@Base 10 ++ BitBlockOps_BlockShr@Base 10 ++ BitBlockOps_BlockXor@Base 10 ++ BitByteOps_ByteAnd@Base 10 ++ BitByteOps_ByteNot@Base 10 ++ BitByteOps_ByteOr@Base 10 ++ BitByteOps_ByteRol@Base 10 ++ BitByteOps_ByteRor@Base 10 ++ BitByteOps_ByteSar@Base 10 ++ BitByteOps_ByteShl@Base 10 ++ BitByteOps_ByteShr@Base 10 ++ BitByteOps_ByteXor@Base 10 ++ BitByteOps_GetBits@Base 10 ++ BitByteOps_HighNibble@Base 10 ++ BitByteOps_LowNibble@Base 10 ++ BitByteOps_SetBits@Base 10 ++ BitByteOps_Swap@Base 10 ++ BitWordOps_GetBits@Base 10 ++ BitWordOps_HighByte@Base 10 ++ BitWordOps_LowByte@Base 10 ++ BitWordOps_SetBits@Base 10 ++ BitWordOps_Swap@Base 10 ++ BitWordOps_WordAnd@Base 10 ++ BitWordOps_WordNot@Base 10 ++ BitWordOps_WordOr@Base 10 ++ BitWordOps_WordRol@Base 10 ++ BitWordOps_WordRor@Base 10 ++ BitWordOps_WordSar@Base 10 ++ BitWordOps_WordShl@Base 10 ++ BitWordOps_WordShr@Base 10 ++ BitWordOps_WordXor@Base 10 ++ BlockOps_BlockClear@Base 10 ++ BlockOps_BlockEqual@Base 10 ++ BlockOps_BlockMoveBackward@Base 10 ++ BlockOps_BlockMoveForward@Base 10 ++ BlockOps_BlockPosition@Base 10 ++ BlockOps_BlockSet@Base 10 ++ Break_DisableBreak@Base 10 ++ Break_EnableBreak@Base 10 ++ Break_InstallBreak@Base 10 ++ Break_UnInstallBreak@Base 10 ++ CardinalIO_Done@Base 10 ++ CardinalIO_ReadCardinal@Base 10 ++ CardinalIO_ReadHex@Base 10 ++ CardinalIO_ReadLongCardinal@Base 10 ++ CardinalIO_ReadLongHex@Base 10 ++ CardinalIO_ReadShortCardinal@Base 10 ++ CardinalIO_ReadShortHex@Base 10 ++ CardinalIO_WriteCardinal@Base 10 ++ CardinalIO_WriteHex@Base 10 ++ CardinalIO_WriteLongCardinal@Base 10 ++ CardinalIO_WriteLongHex@Base 10 ++ CardinalIO_WriteShortCardinal@Base 10 ++ CardinalIO_WriteShortHex@Base 10 ++ Conversions_ConvertCardinal@Base 10 ++ Conversions_ConvertHex@Base 10 ++ Conversions_ConvertInteger@Base 10 ++ Conversions_ConvertLongInt@Base 10 ++ Conversions_ConvertOctal@Base 10 ++ Conversions_ConvertShortInt@Base 10 ++ Delay_Delay@Base 10 ++ Display_Write@Base 10 ++ ErrorCode_ExitToOS@Base 10 ++ ErrorCode_GetErrorCode@Base 10 ++ ErrorCode_SetErrorCode@Base 10 ++ FileSystem_Close@Base 10 ++ FileSystem_Create@Base 10 ++ FileSystem_Delete@Base 10 ++ FileSystem_Doio@Base 10 ++ FileSystem_GetPos@Base 10 ++ FileSystem_Length@Base 10 ++ FileSystem_Lookup@Base 10 ++ FileSystem_ReadByte@Base 10 ++ FileSystem_ReadChar@Base 10 ++ FileSystem_ReadNBytes@Base 10 ++ FileSystem_ReadWord@Base 10 ++ FileSystem_Rename@Base 10 ++ FileSystem_Reset@Base 10 ++ FileSystem_SetModify@Base 10 ++ FileSystem_SetOpen@Base 10 ++ FileSystem_SetPos@Base 10 ++ FileSystem_SetRead@Base 10 ++ FileSystem_SetWrite@Base 10 ++ FileSystem_WriteByte@Base 10 ++ FileSystem_WriteChar@Base 10 ++ FileSystem_WriteNBytes@Base 10 ++ FileSystem_WriteWord@Base 10 ++ FloatingUtilities_Float@Base 10 ++ FloatingUtilities_Floatl@Base 10 ++ FloatingUtilities_Frac@Base 10 ++ FloatingUtilities_Fracl@Base 10 ++ FloatingUtilities_Round@Base 10 ++ FloatingUtilities_Roundl@Base 10 ++ FloatingUtilities_Trunc@Base 10 ++ FloatingUtilities_Truncl@Base 10 ++ InOut_CloseInput@Base 10 ++ InOut_CloseOutput@Base 10 ++ InOut_Done@Base 10 ++ InOut_OpenInput@Base 10 ++ InOut_OpenOutput@Base 10 ++ InOut_Read@Base 10 ++ InOut_ReadCard@Base 10 ++ InOut_ReadInt@Base 10 ++ InOut_ReadS@Base 10 ++ InOut_ReadString@Base 10 ++ InOut_Write@Base 10 ++ InOut_WriteCard@Base 10 ++ InOut_WriteHex@Base 10 ++ InOut_WriteInt@Base 10 ++ InOut_WriteLn@Base 10 ++ InOut_WriteOct@Base 10 ++ InOut_WriteS@Base 10 ++ InOut_WriteString@Base 10 ++ InOut_termCH@Base 10 ++ Keyboard_KeyPressed@Base 10 ++ Keyboard_Read@Base 10 ++ LongIO_Done@Base 10 ++ LongIO_ReadLongInt@Base 10 ++ LongIO_WriteLongInt@Base 10 ++ Random_RandomBytes@Base 10 ++ Random_RandomCard@Base 10 ++ Random_RandomInit@Base 10 ++ Random_RandomInt@Base 10 ++ Random_RandomLongReal@Base 10 ++ Random_RandomReal@Base 10 ++ Random_Randomize@Base 10 ++ RealConversions_LongRealToString@Base 10 ++ RealConversions_RealToString@Base 10 ++ RealConversions_SetNoOfExponentDigits@Base 10 ++ RealConversions_StringToLongReal@Base 10 ++ RealConversions_StringToReal@Base 10 ++ RealInOut_Done@Base 10 ++ RealInOut_ReadLongReal@Base 10 ++ RealInOut_ReadReal@Base 10 ++ RealInOut_ReadShortReal@Base 10 ++ RealInOut_SetNoOfDecimalPlaces@Base 10 ++ RealInOut_WriteLongReal@Base 10 ++ RealInOut_WriteLongRealOct@Base 10 ++ RealInOut_WriteReal@Base 10 ++ RealInOut_WriteRealOct@Base 10 ++ RealInOut_WriteShortReal@Base 10 ++ RealInOut_WriteShortRealOct@Base 10 ++ Strings_Assign@Base 10 ++ Strings_CompareStr@Base 10 ++ Strings_ConCat@Base 10 ++ Strings_Copy@Base 10 ++ Strings_Delete@Base 10 ++ Strings_Insert@Base 10 ++ Strings_Length@Base 10 ++ Strings_Pos@Base 10 ++ Termbase_AssignRead@Base 10 ++ Termbase_AssignWrite@Base 10 ++ Termbase_KeyPressed@Base 10 ++ Termbase_Read@Base 10 ++ Termbase_UnAssignRead@Base 10 ++ Termbase_UnAssignWrite@Base 10 ++ Termbase_Write@Base 10 ++ Terminal_KeyPressed@Base 10 ++ Terminal_Read@Base 10 ++ Terminal_ReadAgain@Base 10 ++ Terminal_ReadString@Base 10 ++ Terminal_Write@Base 10 ++ Terminal_WriteLn@Base 10 ++ Terminal_WriteString@Base 10 ++ TimeDate_CompareTime@Base 10 ++ TimeDate_GetTime@Base 10 ++ TimeDate_SetTime@Base 10 ++ TimeDate_TimeToString@Base 10 ++ TimeDate_TimeToZero@Base 10 ++ _M2_BitBlockOps_finish@Base 10 ++ _M2_BitBlockOps_init@Base 10 ++ _M2_BitByteOps_finish@Base 10 ++ _M2_BitByteOps_init@Base 10 ++ _M2_BitWordOps_finish@Base 10 ++ _M2_BitWordOps_init@Base 10 ++ _M2_BlockOps_finish@Base 10 ++ _M2_BlockOps_init@Base 10 ++ _M2_CardinalIO_finish@Base 10 ++ _M2_CardinalIO_init@Base 10 ++ _M2_Conversions_finish@Base 10 ++ _M2_Conversions_init@Base 10 ++ _M2_DebugPMD_finish@Base 10 ++ _M2_DebugPMD_init@Base 10 ++ _M2_DebugTrace_finish@Base 10 ++ _M2_DebugTrace_init@Base 10 ++ _M2_Delay_finish@Base 10 ++ _M2_Delay_init@Base 10 ++ _M2_Display_finish@Base 10 ++ _M2_Display_init@Base 10 ++ _M2_ErrorCode_finish@Base 10 ++ _M2_ErrorCode_init@Base 10 ++ _M2_FileSystem_finish@Base 10 ++ _M2_FileSystem_init@Base 10 ++ _M2_FloatingUtilities_finish@Base 10 ++ _M2_FloatingUtilities_init@Base 10 ++ _M2_InOut_finish@Base 10 ++ _M2_InOut_init@Base 10 ++ _M2_Keyboard_finish@Base 10 ++ _M2_Keyboard_init@Base 10 ++ _M2_LongIO_finish@Base 10 ++ _M2_LongIO_init@Base 10 ++ _M2_NumberConversion_finish@Base 10 ++ _M2_NumberConversion_init@Base 10 ++ _M2_Random_finish@Base 10 ++ _M2_Random_init@Base 10 ++ _M2_RealConversions_finish@Base 10 ++ _M2_RealConversions_init@Base 10 ++ _M2_RealInOut_finish@Base 10 ++ _M2_RealInOut_init@Base 10 ++ _M2_Strings_finish@Base 10 ++ _M2_Strings_init@Base 10 ++ _M2_Termbase_finish@Base 10 ++ _M2_Termbase_init@Base 10 ++ _M2_Terminal_finish@Base 10 ++ _M2_Terminal_init@Base 10 ++ _M2_TimeDate_finish@Base 10 ++ _M2_TimeDate_init@Base 10 ++libm2min.so.17 #PACKAGE# #MINVER# ++ M2RTS_ExecuteInitialProcedures@Base 10 ++ M2RTS_ExecuteTerminationProcedures@Base 10 ++ M2RTS_HALT@Base 10 ++ M2RTS_NoException@Base 10 ++ _M2_M2RTS_finish@Base 10 ++ _M2_M2RTS_init@Base 10 ++ _M2_SYSTEM_finish@Base 10 ++ _M2_SYSTEM_init@Base 10 ++ abort@Base 10 ++ exit@Base 10 ++libm2pim.so.17 #PACKAGE# #MINVER# ++ Args_GetArg@Base 10 ++ Args_Narg@Base 10 ++ Assertion_Assert@Base 10 ++ Builtins_alloca@Base 10 ++ Builtins_alloca_trace@Base 10 ++ Builtins_atan2@Base 10 ++ Builtins_atan2f@Base 10 ++ Builtins_atan2l@Base 10 ++ Builtins_cabs@Base 10 ++ Builtins_cabsf@Base 10 ++ Builtins_cabsl@Base 10 ++ Builtins_carccos@Base 10 ++ Builtins_carccosf@Base 10 ++ Builtins_carccosl@Base 10 ++ Builtins_carcsin@Base 10 ++ Builtins_carcsinf@Base 10 ++ Builtins_carcsinl@Base 10 ++ Builtins_carctan@Base 10 ++ Builtins_carctanf@Base 10 ++ Builtins_carctanl@Base 10 ++ Builtins_carg@Base 10 ++ Builtins_cargf@Base 10 ++ Builtins_cargl@Base 10 ++ Builtins_ccos@Base 10 ++ Builtins_ccosf@Base 10 ++ Builtins_ccosl@Base 10 ++ Builtins_cexp@Base 10 ++ Builtins_cexpf@Base 10 ++ Builtins_cexpl@Base 10 ++ Builtins_cln@Base 10 ++ Builtins_clnf@Base 10 ++ Builtins_clnl@Base 10 ++ Builtins_conj@Base 10 ++ Builtins_conjf@Base 10 ++ Builtins_conjl@Base 10 ++ Builtins_cos@Base 10 ++ Builtins_cosf@Base 10 ++ Builtins_cosl@Base 10 ++ Builtins_cpower@Base 10 ++ Builtins_cpowerf@Base 10 ++ Builtins_cpowerl@Base 10 ++ Builtins_csin@Base 10 ++ Builtins_csinf@Base 10 ++ Builtins_csinl@Base 10 ++ Builtins_csqrt@Base 10 ++ Builtins_csqrtf@Base 10 ++ Builtins_csqrtl@Base 10 ++ Builtins_ctan@Base 10 ++ Builtins_ctanf@Base 10 ++ Builtins_ctanl@Base 10 ++ Builtins_exp10@Base 10 ++ Builtins_exp10f@Base 10 ++ Builtins_exp10l@Base 10 ++ Builtins_exp@Base 10 ++ Builtins_expf@Base 10 ++ Builtins_expl@Base 10 ++ Builtins_fabs@Base 10 ++ Builtins_fabsf@Base 10 ++ Builtins_fabsl@Base 10 ++ Builtins_frame_address@Base 10 ++ Builtins_huge_val@Base 10 ++ Builtins_huge_valf@Base 10 ++ Builtins_huge_vall@Base 10 ++ Builtins_ilogb@Base 10 ++ Builtins_ilogbf@Base 10 ++ Builtins_ilogbl@Base 10 ++ Builtins_index@Base 10 ++ Builtins_isfinite@Base 10 ++ Builtins_isfinitef@Base 10 ++ Builtins_isfinitel@Base 10 ++ Builtins_log10@Base 10 ++ Builtins_log10f@Base 10 ++ Builtins_log10l@Base 10 ++ Builtins_log@Base 10 ++ Builtins_logf@Base 10 ++ Builtins_logl@Base 10 ++ Builtins_longjmp@Base 10 ++ Builtins_memcmp@Base 10 ++ Builtins_memcpy@Base 10 ++ Builtins_memmove@Base 10 ++ Builtins_memset@Base 10 ++ Builtins_modf@Base 10 ++ Builtins_modff@Base 10 ++ Builtins_modfl@Base 10 ++ Builtins_nextafter@Base 10 ++ Builtins_nextafterf@Base 10 ++ Builtins_nextafterl@Base 10 ++ Builtins_nexttoward@Base 10 ++ Builtins_nexttowardf@Base 10 ++ Builtins_nexttowardl@Base 10 ++ Builtins_return_address@Base 10 ++ Builtins_rindex@Base 10 ++ Builtins_scalb@Base 10 ++ Builtins_scalbf@Base 10 ++ Builtins_scalbl@Base 10 ++ Builtins_scalbln@Base 10 ++ Builtins_scalblnf@Base 10 ++ Builtins_scalblnl@Base 10 ++ Builtins_scalbn@Base 10 ++ Builtins_scalbnf@Base 10 ++ Builtins_scalbnl@Base 10 ++ Builtins_setjmp@Base 10 ++ Builtins_signbit@Base 10 ++ Builtins_signbitf@Base 10 ++ Builtins_signbitl@Base 10 ++ Builtins_significand@Base 10 ++ Builtins_significandf@Base 10 ++ Builtins_significandl@Base 10 ++ Builtins_sin@Base 10 ++ Builtins_sinf@Base 10 ++ Builtins_sinl@Base 10 ++ Builtins_sqrt@Base 10 ++ Builtins_sqrtf@Base 10 ++ Builtins_sqrtl@Base 10 ++ Builtins_strcat@Base 10 ++ Builtins_strchr@Base 10 ++ Builtins_strcmp@Base 10 ++ Builtins_strcpy@Base 10 ++ Builtins_strcspn@Base 10 ++ Builtins_strlen@Base 10 ++ Builtins_strncat@Base 10 ++ Builtins_strncmp@Base 10 ++ Builtins_strncpy@Base 10 ++ Builtins_strpbrk@Base 10 ++ Builtins_strrchr@Base 10 ++ Builtins_strspn@Base 10 ++ Builtins_strstr@Base 10 ++ CmdArgs_GetArg@Base 10 ++ CmdArgs_Narg@Base 10 ++ Debug_DebugString@Base 10 ++ Debug_Halt@Base 10 ++ DynamicStrings_Add@Base 10 ++ DynamicStrings_Assign@Base 10 ++ DynamicStrings_ConCat@Base 10 ++ DynamicStrings_ConCatChar@Base 10 ++ DynamicStrings_CopyOut@Base 10 ++ DynamicStrings_Dup@Base 10 ++ DynamicStrings_DupDB@Base 10 ++ DynamicStrings_Equal@Base 10 ++ DynamicStrings_EqualArray@Base 10 ++ DynamicStrings_EqualCharStar@Base 10 ++ DynamicStrings_Fin@Base 10 ++ DynamicStrings_Index@Base 10 ++ DynamicStrings_InitString@Base 10 ++ DynamicStrings_InitStringChar@Base 10 ++ DynamicStrings_InitStringCharDB@Base 10 ++ DynamicStrings_InitStringCharStar@Base 10 ++ DynamicStrings_InitStringCharStarDB@Base 10 ++ DynamicStrings_InitStringDB@Base 10 ++ DynamicStrings_KillString@Base 10 ++ DynamicStrings_Length@Base 10 ++ DynamicStrings_Mark@Base 10 ++ DynamicStrings_Mult@Base 10 ++ DynamicStrings_MultDB@Base 10 ++ DynamicStrings_PopAllocation@Base 10 ++ DynamicStrings_PopAllocationExemption@Base 10 ++ DynamicStrings_PushAllocation@Base 10 ++ DynamicStrings_RIndex@Base 10 ++ DynamicStrings_RemoveComment@Base 10 ++ DynamicStrings_RemoveWhitePostfix@Base 10 ++ DynamicStrings_RemoveWhitePrefix@Base 10 ++ DynamicStrings_Slice@Base 10 ++ DynamicStrings_SliceDB@Base 10 ++ DynamicStrings_ToLower@Base 10 ++ DynamicStrings_ToUpper@Base 10 ++ DynamicStrings_char@Base 10 ++ DynamicStrings_string@Base 10 ++ Environment_GetEnvironment@Base 10 ++ FIO_Close@Base 10 ++ FIO_EOF@Base 10 ++ FIO_EOLN@Base 10 ++ FIO_Exists@Base 10 ++ FIO_FindPosition@Base 10 ++ FIO_FlushBuffer@Base 10 ++ FIO_FlushOutErr@Base 10 ++ FIO_GetFileName@Base 10 ++ FIO_GetUnixFileDescriptor@Base 10 ++ FIO_IsActive@Base 10 ++ FIO_IsNoError@Base 10 ++ FIO_OpenForRandom@Base 10 ++ FIO_OpenToRead@Base 10 ++ FIO_OpenToWrite@Base 10 ++ FIO_ReadCardinal@Base 10 ++ FIO_ReadChar@Base 10 ++ FIO_ReadNBytes@Base 10 ++ FIO_ReadString@Base 10 ++ FIO_SetPositionFromBeginning@Base 10 ++ FIO_SetPositionFromEnd@Base 10 ++ FIO_StdErr@Base 10 ++ FIO_StdIn@Base 10 ++ FIO_StdOut@Base 10 ++ FIO_UnReadChar@Base 10 ++ FIO_WasEOLN@Base 10 ++ FIO_WriteCardinal@Base 10 ++ FIO_WriteChar@Base 10 ++ FIO_WriteLine@Base 10 ++ FIO_WriteNBytes@Base 10 ++ FIO_WriteString@Base 10 ++ FIO_exists@Base 10 ++ FIO_getFileName@Base 10 ++ FIO_getFileNameLength@Base 10 ++ FIO_openForRandom@Base 10 ++ FIO_openToRead@Base 10 ++ FIO_openToWrite@Base 10 ++ FormatStrings_HandleEscape@Base 10 ++ FormatStrings_Sprintf0@Base 10 ++ FormatStrings_Sprintf1@Base 10 ++ FormatStrings_Sprintf2@Base 10 ++ FormatStrings_Sprintf3@Base 10 ++ FormatStrings_Sprintf4@Base 10 ++ FpuIO_LongIntToStr@Base 10 ++ FpuIO_LongRealToStr@Base 10 ++ FpuIO_ReadLongInt@Base 10 ++ FpuIO_ReadLongReal@Base 10 ++ FpuIO_ReadReal@Base 10 ++ FpuIO_RealToStr@Base 10 ++ FpuIO_StrToLongInt@Base 10 ++ FpuIO_StrToLongReal@Base 10 ++ FpuIO_StrToReal@Base 10 ++ FpuIO_WriteLongInt@Base 10 ++ FpuIO_WriteLongReal@Base 10 ++ FpuIO_WriteReal@Base 10 ++ GetOpt_AddLongOption@Base 10 ++ GetOpt_GetOpt@Base 10 ++ GetOpt_GetOptLong@Base 10 ++ GetOpt_GetOptLongOnly@Base 10 ++ GetOpt_InitLongOptions@Base 10 ++ GetOpt_KillLongOptions@Base 10 ++ IO_BufferedMode@Base 10 ++ IO_EchoOff@Base 10 ++ IO_EchoOn@Base 10 ++ IO_Error@Base 10 ++ IO_Read@Base 10 ++ IO_UnBufferedMode@Base 10 ++ IO_Write@Base 10 ++ Indexing_DebugIndex@Base 10 ++ Indexing_DeleteIndice@Base 10 ++ Indexing_ForeachIndiceInIndexDo@Base 10 ++ Indexing_GetIndice@Base 10 ++ Indexing_HighIndice@Base 10 ++ Indexing_InBounds@Base 10 ++ Indexing_IncludeIndiceIntoIndex@Base 10 ++ Indexing_InitIndex@Base 10 ++ Indexing_IsIndiceInIndex@Base 10 ++ Indexing_KillIndex@Base 10 ++ Indexing_LowIndice@Base 10 ++ Indexing_PutIndice@Base 10 ++ Indexing_RemoveIndiceFromIndex@Base 10 ++ LMathLib0_arctan@Base 10 ++ LMathLib0_cos@Base 10 ++ LMathLib0_entier@Base 10 ++ LMathLib0_exp@Base 10 ++ LMathLib0_ln@Base 10 ++ LMathLib0_sin@Base 10 ++ LMathLib0_sqrt@Base 10 ++ LMathLib0_tan@Base 10 ++ M2EXCEPTION_IsM2Exception@Base 10 ++ M2EXCEPTION_M2Exception@Base 10 ++ M2RTS_AssignmentException@Base 10 ++ M2RTS_CaseException@Base 10 ++ M2RTS_DecException@Base 10 ++ M2RTS_DynamicArraySubscriptException@Base 10 ++ M2RTS_ErrorMessage@Base 10 ++ M2RTS_ExclException@Base 10 ++ M2RTS_ExecuteInitialProcedures@Base 10 ++ M2RTS_ExecuteTerminationProcedures@Base 10 ++ M2RTS_ExitOnHalt@Base 10 ++ M2RTS_ForLoopBeginException@Base 10 ++ M2RTS_ForLoopEndException@Base 10 ++ M2RTS_ForLoopToException@Base 10 ++ M2RTS_HALT@Base 10 ++ M2RTS_Halt@Base 10 ++ M2RTS_IncException@Base 10 ++ M2RTS_InclException@Base 10 ++ M2RTS_InstallInitialProcedure@Base 10 ++ M2RTS_InstallTerminationProcedure@Base 10 ++ M2RTS_Length@Base 10 ++ M2RTS_NoException@Base 10 ++ M2RTS_NoReturnException@Base 10 ++ M2RTS_ParameterException@Base 10 ++ M2RTS_PointerNilException@Base 10 ++ M2RTS_RealValueException@Base 10 ++ M2RTS_ReturnException@Base 10 ++ M2RTS_RotateException@Base 10 ++ M2RTS_ShiftException@Base 10 ++ M2RTS_StaticArraySubscriptException@Base 10 ++ M2RTS_Terminate@Base 10 ++ M2RTS_WholeNonPosDivException@Base 10 ++ M2RTS_WholeNonPosModException@Base 10 ++ M2RTS_WholeValueException@Base 10 ++ M2RTS_WholeZeroDivException@Base 10 ++ M2RTS_WholeZeroRemException@Base 10 ++ MathLib0_arctan@Base 10 ++ MathLib0_cos@Base 10 ++ MathLib0_entier@Base 10 ++ MathLib0_exp@Base 10 ++ MathLib0_ln@Base 10 ++ MathLib0_sin@Base 10 ++ MathLib0_sqrt@Base 10 ++ MathLib0_tan@Base 10 ++ MemUtils_MemCopy@Base 10 ++ MemUtils_MemZero@Base 10 ++ NumberIO_BinToStr@Base 10 ++ NumberIO_CardToStr@Base 10 ++ NumberIO_HexToStr@Base 10 ++ NumberIO_IntToStr@Base 10 ++ NumberIO_OctToStr@Base 10 ++ NumberIO_ReadBin@Base 10 ++ NumberIO_ReadCard@Base 10 ++ NumberIO_ReadHex@Base 10 ++ NumberIO_ReadInt@Base 10 ++ NumberIO_ReadOct@Base 10 ++ NumberIO_StrToBin@Base 10 ++ NumberIO_StrToBinInt@Base 10 ++ NumberIO_StrToCard@Base 10 ++ NumberIO_StrToHex@Base 10 ++ NumberIO_StrToHexInt@Base 10 ++ NumberIO_StrToInt@Base 10 ++ NumberIO_StrToOct@Base 10 ++ NumberIO_StrToOctInt@Base 10 ++ NumberIO_WriteBin@Base 10 ++ NumberIO_WriteCard@Base 10 ++ NumberIO_WriteHex@Base 10 ++ NumberIO_WriteInt@Base 10 ++ NumberIO_WriteOct@Base 10 ++ OptLib_ConCat@Base 10 ++ OptLib_Dup@Base 10 ++ OptLib_GetArgc@Base 10 ++ OptLib_GetArgv@Base 10 ++ OptLib_IndexStrCmp@Base 10 ++ OptLib_IndexStrNCmp@Base 10 ++ OptLib_InitOption@Base 10 ++ OptLib_KillOption@Base 10 ++ OptLib_Slice@Base 10 ++ PushBackInput_Close@Base 10 ++ PushBackInput_Error@Base 10 ++ PushBackInput_GetCh@Base 10 ++ PushBackInput_GetColumnPosition@Base 10 ++ PushBackInput_GetCurrentLine@Base 10 ++ PushBackInput_GetExitStatus@Base 10 ++ PushBackInput_Open@Base 10 ++ PushBackInput_PutCh@Base 10 ++ PushBackInput_PutString@Base 10 ++ PushBackInput_SetDebug@Base 10 ++ PushBackInput_WarnError@Base 10 ++ PushBackInput_WarnString@Base 10 ++ RTExceptions_BaseExceptionsThrow@Base 10 ++ RTExceptions_DefaultErrorCatch@Base 10 ++ RTExceptions_GetBaseExceptionBlock@Base 10 ++ RTExceptions_GetExceptionBlock@Base 10 ++ RTExceptions_GetExceptionSource@Base 10 ++ RTExceptions_GetNumber@Base 10 ++ RTExceptions_GetTextBuffer@Base 10 ++ RTExceptions_GetTextBufferSize@Base 10 ++ RTExceptions_InitExceptionBlock@Base 10 ++ RTExceptions_IsInExceptionState@Base 10 ++ RTExceptions_KillExceptionBlock@Base 10 ++ RTExceptions_PopHandler@Base 10 ++ RTExceptions_PushHandler@Base 10 ++ RTExceptions_Raise@Base 10 ++ RTExceptions_SetExceptionBlock@Base 10 ++ RTExceptions_SetExceptionSource@Base 10 ++ RTExceptions_SetExceptionState@Base 10 ++ RTExceptions_SwitchExceptionState@Base 10 ++ RTint_AttachVector@Base 10 ++ RTint_ExcludeVector@Base 10 ++ RTint_GetTimeVector@Base 10 ++ RTint_IncludeVector@Base 10 ++ RTint_Init@Base 10 ++ RTint_InitInputVector@Base 10 ++ RTint_InitOutputVector@Base 10 ++ RTint_InitTimeVector@Base 10 ++ RTint_Listen@Base 10 ++ RTint_ReArmTimeVector@Base 10 ++ SArgs_GetArg@Base 10 ++ SArgs_Narg@Base 10 ++ SCmdArgs_GetArg@Base 10 ++ SCmdArgs_Narg@Base 10 ++ SEnvironment_GetEnvironment@Base 10 ++ SFIO_Exists@Base 10 ++ SFIO_OpenForRandom@Base 10 ++ SFIO_OpenToRead@Base 10 ++ SFIO_OpenToWrite@Base 10 ++ SFIO_ReadS@Base 10 ++ SFIO_WriteS@Base 10 ++ SMathLib0_arctan@Base 10 ++ SMathLib0_cos@Base 10 ++ SMathLib0_entier@Base 10 ++ SMathLib0_exp@Base 10 ++ SMathLib0_ln@Base 10 ++ SMathLib0_sin@Base 10 ++ SMathLib0_sqrt@Base 10 ++ SMathLib0_tan@Base 10 ++ Scan_CloseSource@Base 10 ++ Scan_DefineComments@Base 10 ++ Scan_GetNextSymbol@Base 10 ++ Scan_OpenSource@Base 10 ++ Scan_TerminateOnError@Base 10 ++ Scan_WriteError@Base 10 ++ Selective_FdClr@Base 10 ++ Selective_FdIsSet@Base 10 ++ Selective_FdSet@Base 10 ++ Selective_FdZero@Base 10 ++ Selective_GetTime@Base 10 ++ Selective_GetTimeOfDay@Base 10 ++ Selective_InitSet@Base 10 ++ Selective_InitTime@Base 10 ++ Selective_KillSet@Base 10 ++ Selective_KillTime@Base 10 ++ Selective_MaxFdsPlusOne@Base 10 ++ Selective_ReadCharRaw@Base 10 ++ Selective_Select@Base 10 ++ Selective_SetTime@Base 10 ++ Selective_WriteCharRaw@Base 10 ++ StdIO_GetCurrentInput@Base 10 ++ StdIO_GetCurrentOutput@Base 10 ++ StdIO_PopInput@Base 10 ++ StdIO_PopOutput@Base 10 ++ StdIO_PushInput@Base 10 ++ StdIO_PushOutput@Base 10 ++ StdIO_Read@Base 10 ++ StdIO_Write@Base 10 ++ Storage_ALLOCATE@Base 10 ++ Storage_Available@Base 10 ++ Storage_DEALLOCATE@Base 10 ++ Storage_REALLOCATE@Base 10 ++ StrCase_Cap@Base 10 ++ StrCase_Lower@Base 10 ++ StrCase_StrToLowerCase@Base 10 ++ StrCase_StrToUpperCase@Base 10 ++ StrIO_ReadString@Base 10 ++ StrIO_WriteLn@Base 10 ++ StrIO_WriteString@Base 10 ++ StrLib_IsSubString@Base 10 ++ StrLib_StrConCat@Base 10 ++ StrLib_StrCopy@Base 10 ++ StrLib_StrEqual@Base 10 ++ StrLib_StrLen@Base 10 ++ StrLib_StrLess@Base 10 ++ StrLib_StrRemoveWhitePrefix@Base 10 ++ StringConvert_CardinalToString@Base 10 ++ StringConvert_IntegerToString@Base 10 ++ StringConvert_LongCardinalToString@Base 10 ++ StringConvert_LongIntegerToString@Base 10 ++ StringConvert_LongrealToString@Base 10 ++ StringConvert_ShortCardinalToString@Base 10 ++ StringConvert_StringToCardinal@Base 10 ++ StringConvert_StringToInteger@Base 10 ++ StringConvert_StringToLongCardinal@Base 10 ++ StringConvert_StringToLongInteger@Base 10 ++ StringConvert_StringToLongreal@Base 10 ++ StringConvert_StringToShortCardinal@Base 10 ++ StringConvert_ToSigFig@Base 10 ++ StringConvert_bstoc@Base 10 ++ StringConvert_bstoi@Base 10 ++ StringConvert_ctos@Base 10 ++ StringConvert_hstoc@Base 10 ++ StringConvert_hstoi@Base 10 ++ StringConvert_itos@Base 10 ++ StringConvert_ostoc@Base 10 ++ StringConvert_ostoi@Base 10 ++ StringConvert_stoc@Base 10 ++ StringConvert_stoi@Base 10 ++ StringConvert_stolr@Base 10 ++ StringConvert_stor@Base 10 ++ SysExceptions_InitExceptionHandlers@Base 10 ++ SysStorage_ALLOCATE@Base 10 ++ SysStorage_Available@Base 10 ++ SysStorage_DEALLOCATE@Base 10 ++ SysStorage_Init@Base 10 ++ SysStorage_REALLOCATE@Base 10 ++ TimeString_GetTimeString@Base 10 ++ UnixArgs_ArgC@Base 10 ++ UnixArgs_ArgV@Base 10 ++ _M2_ASCII_finish@Base 10 ++ _M2_ASCII_init@Base 10 ++ _M2_Args_finish@Base 10 ++ _M2_Args_init@Base 10 ++ _M2_Assertion_finish@Base 10 ++ _M2_Assertion_init@Base 10 ++ _M2_Break_finish@Base 10 ++ _M2_Break_init@Base 10 ++ _M2_Builtins_finish@Base 10 ++ _M2_Builtins_init@Base 10 ++ _M2_COROUTINES_finish@Base 10 ++ _M2_COROUTINES_init@Base 10 ++ _M2_CmdArgs_finish@Base 10 ++ _M2_CmdArgs_init@Base 10 ++ _M2_Debug_finish@Base 10 ++ _M2_Debug_init@Base 10 ++ _M2_DynamicStrings_finish@Base 10 ++ _M2_DynamicStrings_init@Base 10 ++ _M2_Environment_finish@Base 10 ++ _M2_Environment_init@Base 10 ++ _M2_FIO_finish@Base 10 ++ _M2_FIO_init@Base 10 ++ _M2_FormatStrings_finish@Base 10 ++ _M2_FormatStrings_init@Base 10 ++ _M2_FpuIO_finish@Base 10 ++ _M2_FpuIO_init@Base 10 ++ _M2_GetOpt_finish@Base 10 ++ _M2_GetOpt_init@Base 10 ++ _M2_IO_finish@Base 10 ++ _M2_IO_init@Base 10 ++ _M2_Indexing_finish@Base 10 ++ _M2_Indexing_init@Base 10 ++ _M2_LMathLib0_finish@Base 10 ++ _M2_LMathLib0_init@Base 10 ++ _M2_LegacyReal_finish@Base 10 ++ _M2_LegacyReal_init@Base 10 ++ _M2_M2EXCEPTION_finish@Base 10 ++ _M2_M2EXCEPTION_init@Base 10 ++ _M2_M2RTS_finish@Base 10 ++ _M2_M2RTS_init@Base 10 ++ _M2_MathLib0_finish@Base 10 ++ _M2_MathLib0_init@Base 10 ++ _M2_MemUtils_finish@Base 10 ++ _M2_MemUtils_init@Base 10 ++ _M2_NumberIO_finish@Base 10 ++ _M2_NumberIO_init@Base 10 ++ _M2_OptLib_finish@Base 10 ++ _M2_OptLib_init@Base 10 ++ _M2_PushBackInput_finish@Base 10 ++ _M2_PushBackInput_init@Base 10 ++ _M2_RTExceptions_finish@Base 10 ++ _M2_RTExceptions_init@Base 10 ++ _M2_RTint_finish@Base 10 ++ _M2_RTint_init@Base 10 ++ _M2_SArgs_finish@Base 10 ++ _M2_SArgs_init@Base 10 ++ _M2_SCmdArgs_finish@Base 10 ++ _M2_SCmdArgs_init@Base 10 ++ _M2_SEnvironment_finish@Base 10 ++ _M2_SEnvironment_init@Base 10 ++ _M2_SFIO_finish@Base 10 ++ _M2_SFIO_init@Base 10 ++ _M2_SMathLib0_finish@Base 10 ++ _M2_SMathLib0_init@Base 10 ++ _M2_SYSTEM_finish@Base 10 ++ _M2_SYSTEM_init@Base 10 ++ _M2_Scan_finish@Base 10 ++ _M2_Scan_init@Base 10 ++ _M2_Selective_finish@Base 10 ++ _M2_Selective_init@Base 10 ++ _M2_StdIO_finish@Base 10 ++ _M2_StdIO_init@Base 10 ++ _M2_Storage_finish@Base 10 ++ _M2_Storage_init@Base 10 ++ _M2_StrCase_finish@Base 10 ++ _M2_StrCase_init@Base 10 ++ _M2_StrIO_finish@Base 10 ++ _M2_StrIO_init@Base 10 ++ _M2_StrLib_finish@Base 10 ++ _M2_StrLib_init@Base 10 ++ _M2_StringConvert_finish@Base 10 ++ _M2_StringConvert_init@Base 10 ++ _M2_SysExceptions_finish@Base 10 ++ _M2_SysExceptions_init@Base 10 ++ _M2_SysStorage_finish@Base 10 ++ _M2_SysStorage_init@Base 10 ++ _M2_TimeString_finish@Base 10 ++ _M2_TimeString_init@Base 10 ++ _M2_UnixArgs_finish@Base 10 ++ _M2_UnixArgs_init@Base 10 ++ _M2_dtoa_finish@Base 10 ++ _M2_dtoa_init@Base 10 ++ _M2_errno_finish@Base 10 ++ _M2_errno_init@Base 10 ++ _M2_gdbif_finish@Base 10 ++ _M2_gdbif_init@Base 10 ++ _M2_getopt_finish@Base 10 ++ _M2_getopt_init@Base 10 ++ _M2_ldtoa_finish@Base 10 ++ _M2_ldtoa_init@Base 10 ++ _M2_sckt_finish@Base 10 ++ _M2_sckt_init@Base 10 ++ _M2_termios_finish@Base 10 ++ _M2_termios_init@Base 10 ++ _M2_wrapc_finish@Base 10 ++ _M2_wrapc_init@Base 10 ++ connectSpin@Base 10 ++ doSetUnset@Base 10 ++ dtoa_calcdecimal@Base 10 ++ dtoa_calcmaxsig@Base 10 ++ dtoa_calcsign@Base 10 ++ dtoa_dtoa@Base 10 ++ dtoa_strtod@Base 10 ++ errno_geterrno@Base 10 ++ exp10@Base 10 ++ exp10f@Base 10 ++ exp10l@Base 10 ++ finishSpin@Base 10 ++ getLocalIP@Base 10 ++ getopt_GetLongOptionArray@Base 10 ++ getopt_InitOptions@Base 10 ++ getopt_KillOptions@Base 10 ++ getopt_SetOption@Base 10 ++ getopt_getopt@Base 10 ++ getopt_getopt_long@Base 10 ++ getopt_getopt_long_only@Base 10 ++ getopt_optarg@Base 10 ++ getopt_opterr@Base 10 ++ getopt_optind@Base 10 ++ getopt_optopt@Base 10 ++ ldtoa_ldtoa@Base 10 ++ ldtoa_strtold@Base 10 ++ localExit@Base 10 ++ sleepSpin@Base 10 ++ tcpClientConnect@Base 10 ++ tcpClientIP@Base 10 ++ tcpClientPortNo@Base 10 ++ tcpClientSocket@Base 10 ++ tcpClientSocketFd@Base 10 ++ tcpClientSocketIP@Base 10 ++ tcpServerAccept@Base 10 ++ tcpServerClientIP@Base 10 ++ tcpServerClientPortNo@Base 10 ++ tcpServerEstablish@Base 10 ++ tcpServerEstablishPort@Base 10 ++ tcpServerIP@Base 10 ++ tcpServerPortNo@Base 10 ++ tcpServerSocketFd@Base 10 ++ termios_GetChar@Base 10 ++ termios_GetFlag@Base 10 ++ termios_InitTermios@Base 10 ++ termios_KillTermios@Base 10 ++ termios_SetChar@Base 10 ++ termios_SetFlag@Base 10 ++ termios_cfgetispeed@Base 10 ++ termios_cfgetospeed@Base 10 ++ termios_cfmakeraw@Base 10 ++ termios_cfsetispeed@Base 10 ++ termios_cfsetospeed@Base 10 ++ termios_cfsetspeed@Base 10 ++ termios_tcdrain@Base 10 ++ termios_tcflowoffi@Base 10 ++ termios_tcflowoffo@Base 10 ++ termios_tcflowoni@Base 10 ++ termios_tcflowono@Base 10 ++ termios_tcflushi@Base 10 ++ termios_tcflushio@Base 10 ++ termios_tcflusho@Base 10 ++ termios_tcgetattr@Base 10 ++ termios_tcsdrain@Base 10 ++ termios_tcsendbreak@Base 10 ++ termios_tcsetattr@Base 10 ++ termios_tcsflush@Base 10 ++ termios_tcsnow@Base 10 ++ wrapc_fileinode@Base 10 ++ wrapc_filemtime@Base 10 ++ wrapc_filesize@Base 10 ++ wrapc_getnameuidgid@Base 10 ++ wrapc_getrand@Base 10 ++ wrapc_getusername@Base 10 ++ wrapc_isfinite@Base 10 ++ wrapc_isfinitef@Base 10 ++ wrapc_isfinitel@Base 10 ++ wrapc_signbit@Base 10 ++ wrapc_signbitf@Base 10 ++ wrapc_signbitl@Base 10 ++ wrapc_strtime@Base 10 diff --cc debian/libgomp.symbols index 0000000,0000000..2e450c6 new file mode 100644 --- /dev/null +++ b/debian/libgomp.symbols @@@ -1,0 -1,0 +1,32 @@@ ++libgomp.so.1 #PACKAGE# #MINVER# ++ (symver)GOACC_2.0 5 ++ (symver)GOACC_2.0.1 6 ++ (symver)GOACC_2.0.2 12 ++ (symver)GOMP_1.0 4.2.1 ++ (symver)GOMP_2.0 4.4 ++ (symver)GOMP_3.0 4.7 ++ (symver)GOMP_4.0 4.9 ++ (symver)GOMP_4.0.1 5 ++ (symver)GOMP_4.5 6 ++ (symver)GOMP_5.0 9 ++ (symver)GOMP_5.0.1 11 ++ (symver)GOMP_5.1 12 ++ (symver)GOMP_PLUGIN_1.0 5 ++ (symver)GOMP_PLUGIN_1.1 6 ++ (symver)GOMP_PLUGIN_1.2 9 ++ (symver)GOMP_PLUGIN_1.3 10 ++ (symver)OACC_2.0 5 ++ (symver)OACC_2.0.1 8 ++ (symver)OACC_2.5 9 ++ (symver)OACC_2.5.1 10 ++ (symver)OACC_2.6 10 ++ (symver)OMP_1.0 4.2.1 ++ (symver)OMP_2.0 4.2.1 ++ (symver)OMP_3.0 4.4 ++ (symver)OMP_3.1 4.7 ++ (symver)OMP_4.0 4.9 ++ (symver)OMP_4.5 6 ++ (symver)OMP_5.0 9 ++ (symver)OMP_5.0.1 11 ++ (symver)OMP_5.0.2 12 ++ (symver)OMP_5.1 12 diff --cc debian/libgphobos.symbols index 0000000,0000000..c141b9a new file mode 100644 --- /dev/null +++ b/debian/libgphobos.symbols @@@ -1,0 -1,0 +1,2 @@@ ++libgdruntime.so.3 #PACKAGE# #MINVER# ++libgphobos.so.3 #PACKAGE# #MINVER# diff --cc debian/libgphobos3.symbols.amd64 index 0000000,0000000..a79399e new file mode 100644 --- /dev/null +++ b/debian/libgphobos3.symbols.amd64 @@@ -1,0 -1,0 +1,21991 @@@ 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_D2rt3aaA9entryDtorFPvxC15TypeInfo_StructZv@Base 12 ++ _D2rt3aaA9getRTInfoFxC8TypeInfoZPyv@Base 12 ++ _D2rt3adi11__moduleRefZ@Base 12 ++ _D2rt3adi12__ModuleInfoZ@Base 12 ++ _D2rt3deh11__moduleRefZ@Base 12 ++ _D2rt3deh12__ModuleInfoZ@Base 12 ++ _D2rt4util7utility10safeAssertFNbNiNfbMAyaMQemZv@Base 12 ++ _D2rt4util7utility11__moduleRefZ@Base 12 ++ _D2rt4util7utility12__ModuleInfoZ@Base 12 ++ _D2rt4util7utility__T8_ComplexTdZQm11__xopEqualsMxFKxSQCaQCaQBy__TQBtTdZQBzZb@Base 12 ++ _D2rt4util7utility__T8_ComplexTdZQm6__initZ@Base 12 ++ _D2rt4util7utility__T8_ComplexTdZQm9__xtoHashFNbNeKxSQBzQBzQBx__TQBsTdZQByZm@Base 12 ++ _D2rt4util7utility__T8_ComplexTeZQm11__xopEqualsMxFKxSQCaQCaQBy__TQBtTeZQBzZb@Base 12 ++ _D2rt4util7utility__T8_ComplexTeZQm6__initZ@Base 12 ++ _D2rt4util7utility__T8_ComplexTeZQm9__xtoHashFNbNeKxSQBzQBzQBx__TQBsTeZQByZm@Base 12 ++ _D2rt4util7utility__T8_ComplexTfZQm11__xopEqualsMxFKxSQCaQCaQBy__TQBtTfZQBzZb@Base 12 ++ _D2rt4util7utility__T8_ComplexTfZQm6__initZ@Base 12 ++ _D2rt4util7utility__T8_ComplexTfZQm9__xtoHashFNbNeKxSQBzQBzQBx__TQBsTfZQByZm@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_c8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_j8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n4swapMxFNaNbNiNfPvQcZv@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n6equalsMxFNaNbNiNfIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n6rtInfoMxFNaNbNdNiNfZPyv@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n7compareMxFNaNbNiNfIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n7getHashMxFNaNbNiNfMxPvZm@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n8toStringMxFNaNbNiNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_o8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_p8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_q8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_r8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_v5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_v7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_v8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Ac8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Aj8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Ao8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Ap8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Aq8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Ar8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Av4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Av8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11__moduleRefZ@Base 12 ++ _D2rt4util8typeinfo12TypeInfo_Aya8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo12__ModuleInfoZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe11initializerMxFNaNbNeZ1cyG1EQEeQEeQCrQCm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf11initializerMxFNaNbNeZ1cyG1EQEfQEfQCsQCn@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg11initializerMxFNaNbNeZ1cyG1EQEgQEgQCtQCo@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw11initializerMxFNaNbNeZ1cyG1a@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw11initializerMxFNaNbNeZ1cyG1d@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw11initializerMxFNaNbNeZ1cyG1e@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw11initializerMxFNaNbNeZ1cyG1f@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTlTmZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTlTmZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTlTmZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTlTmZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTlTmZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw11initializerMxFNaNbNeZ1cyG1u@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw11initializerMxFNaNbNeZ1cyG1w@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb8toStringMxFNbNfZAya@Base 12 ++ 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_D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTlTmZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTlTmZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTlTmZQBb6__vtblZ@Base 12 ++ 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_D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTuTtZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTuTtZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTuTtZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTuTtZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTuTtZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTwTkZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTwTkZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTwTkZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTwTkZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTwTkZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTwTkZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTxaTxaZQBd4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTxaTxaZQBd6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTxaTxaZQBd6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTxaTxaZQBd6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTxaTxaZQBd7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTxaTxaZQBd7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTxaTxaZQBd7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTxaTxaZQBd8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTxaTxaZQBd8toStringMxFNbNfZAya@Base 12 ++ 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_D4core3sys5linux5fcntl11__moduleRefZ@Base 12 ++ _D4core3sys5linux5fcntl12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux5sched11__moduleRefZ@Base 12 ++ _D4core3sys5linux5sched12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux5sched9cpu_set_t6__initZ@Base 12 ++ _D4core3sys5linux5stdio11__moduleRefZ@Base 12 ++ _D4core3sys5linux5stdio12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux5stdio21cookie_io_functions_t6__initZ@Base 12 ++ _D4core3sys5linux6config11__moduleRefZ@Base 12 ++ _D4core3sys5linux6config12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux6string11__moduleRefZ@Base 12 ++ _D4core3sys5linux6string12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux6unistd11__moduleRefZ@Base 12 ++ _D4core3sys5linux6unistd12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux7ifaddrs11__moduleRefZ@Base 12 ++ _D4core3sys5linux7ifaddrs12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux7ifaddrsQi6__initZ@Base 12 ++ _D4core3sys5linux7netinet3in_11IN_BADCLASSFNaNbNiNfkZb@Base 12 ++ _D4core3sys5linux7netinet3in_11__moduleRefZ@Base 12 ++ _D4core3sys5linux7netinet3in_12IN_MULTICASTFNbNikZb@Base 12 ++ _D4core3sys5linux7netinet3in_12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux7netinet3in_15IN_EXPERIMENTALFNaNbNiNfkZb@Base 12 ++ _D4core3sys5linux7netinet3in_18IN6_ARE_ADDR_EQUALFNaNbNiNfPSQCgQCe5posixQCdQBy8in6_addrQBdZb@Base 12 ++ _D4core3sys5linux7netinet3in_9IN_CLASSAFNaNbNiNfkZb@Base 12 ++ _D4core3sys5linux7netinet3in_9IN_CLASSBFNaNbNiNfkZb@Base 12 ++ _D4core3sys5linux7netinet3in_9IN_CLASSCFNaNbNiNfkZb@Base 12 ++ _D4core3sys5linux7netinet3in_9IN_CLASSDFNaNbNiNfkZb@Base 12 ++ _D4core3sys5linux7netinet3tcp11__moduleRefZ@Base 12 ++ _D4core3sys5linux7netinet3tcp12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux7termios11__moduleRefZ@Base 12 ++ _D4core3sys5linux7termios12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux7timerfd11__moduleRefZ@Base 12 ++ _D4core3sys5linux7timerfd12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux8execinfo11__moduleRefZ@Base 12 ++ _D4core3sys5linux8execinfo12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux8io_uring11__moduleRefZ@Base 12 ++ _D4core3sys5linux8io_uring12__ModuleInfoZ@Base 12 ++ _D4core3sys5linux8io_uring12io_uring_cqe6__initZ@Base 12 ++ _D4core3sys5linux8io_uring12io_uring_sqe6__initZ@Base 12 ++ _D4core3sys5linux8io_uring14io_uring_probe6__initZ@Base 12 ++ _D4core3sys5linux8io_uring15io_uring_params6__initZ@Base 12 ++ _D4core3sys5linux8io_uring17io_cqring_offsets6__initZ@Base 12 ++ _D4core3sys5linux8io_uring17io_sqring_offsets6__initZ@Base 12 ++ _D4core3sys5linux8io_uring17io_uring_probe_op6__initZ@Base 12 ++ _D4core3sys5linux8io_uring20io_uring_restriction6__initZ@Base 12 ++ _D4core3sys5linux8io_uring21io_uring_files_update6__initZ@Base 12 ++ _D4core3sys5linux8io_uring22io_uring_getevents_arg6__initZ@Base 12 ++ _D4core3sys5linuxQk4auxv11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk4auxv12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk4file11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk4file12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk4mman11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk4mman12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk4time10timerclearFNaNbNiNfPSQBtQBr5posixQCaQBr7timevalZv@Base 12 ++ _D4core3sys5linuxQk4time10timerissetFNaNbNiNfPSQBtQBr5posixQCaQBr7timevalZi@Base 12 ++ _D4core3sys5linuxQk4time11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk4time12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk4time8timeraddFNaNbNiNfxPSQBrQBp5posixQByQBp7timevalxQBdPSQCxQCvQBgQDbQCsQBdZv@Base 12 ++ _D4core3sys5linuxQk4time8timersubFNaNbNiNfxPSQBrQBp5posixQByQBp7timevalxQBdPSQCxQCvQBgQDbQCsQBdZv@Base 12 ++ _D4core3sys5linuxQk5prctl11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk5prctl12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk5prctl12prctl_mm_map6__initZ@Base 12 ++ _D4core3sys5linuxQk5xattr11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk5xattr12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk6procfs11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk6procfs12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk6socket11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk6socket12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk7eventfd11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk7eventfd12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk7inotify11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk7inotify12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk7inotify13inotify_event14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core3sys5linuxQk7inotify13inotify_event6__initZ@Base 12 ++ _D4core3sys5linuxQk7inotify13inotify_event8opAssignMFNaNbNcNiNjNeSQCmQCkQCjQCqQChQCcZQu@Base 12 ++ _D4core3sys5linuxQk7sysinfo11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk7sysinfo12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk7sysinfo8sysinfo_6__initZ@Base 12 ++ _D4core3sys5linuxQk8signalfd11__moduleRefZ@Base 12 ++ _D4core3sys5linuxQk8signalfd12__ModuleInfoZ@Base 12 ++ _D4core3sys5linuxQk8signalfd16signalfd_siginfo6__initZ@Base 12 ++ _D4core3sys5posix3aio11__moduleRefZ@Base 12 ++ _D4core3sys5posix3aio12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix3aio5aiocb6__initZ@Base 12 ++ _D4core3sys5posix3aio7aiocb646__initZ@Base 12 ++ _D4core3sys5posix3grp11__moduleRefZ@Base 12 ++ _D4core3sys5posix3grp12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix3grp5group6__initZ@Base 12 ++ _D4core3sys5posix3net3if_11__moduleRefZ@Base 12 ++ _D4core3sys5posix3net3if_12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix3net3if_14if_nameindex_t6__initZ@Base 12 ++ _D4core3sys5posix3pwd11__moduleRefZ@Base 12 ++ _D4core3sys5posix3pwd12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix3pwd6passwd6__initZ@Base 12 ++ _D4core3sys5posix4arpa4inet11__moduleRefZ@Base 12 ++ _D4core3sys5posix4arpa4inet12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix4arpa4inet7in_addr6__initZ@Base 12 ++ _D4core3sys5posix4poll11__moduleRefZ@Base 12 ++ _D4core3sys5posix4poll12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix4poll6pollfd6__initZ@Base 12 ++ _D4core3sys5posix4stdc4time11__moduleRefZ@Base 12 ++ _D4core3sys5posix4stdc4time12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix4stdc4time2tm6__initZ@Base 12 ++ _D4core3sys5posix4time10itimerspec6__initZ@Base 12 ++ _D4core3sys5posix4time11__moduleRefZ@Base 12 ++ _D4core3sys5posix4time12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix5dlfcn11__moduleRefZ@Base 12 ++ _D4core3sys5posix5dlfcn12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix5dlfcn7Dl_info6__initZ@Base 12 ++ _D4core3sys5posix5fcntl11__moduleRefZ@Base 12 ++ _D4core3sys5posix5fcntl12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix5fcntl5flock6__initZ@Base 12 ++ _D4core3sys5posix5iconv11__moduleRefZ@Base 12 ++ _D4core3sys5posix5iconv12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix5netdb11__moduleRefZ@Base 12 ++ _D4core3sys5posix5netdb12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix5netdb6netent6__initZ@Base 12 ++ _D4core3sys5posix5netdb7hostent6__initZ@Base 12 ++ _D4core3sys5posix5netdb7hostent6h_addrMUNdZPa@Base 12 ++ _D4core3sys5posix5netdb7servent6__initZ@Base 12 ++ _D4core3sys5posix5netdb8addrinfo6__initZ@Base 12 ++ _D4core3sys5posix5netdb8protoent6__initZ@Base 12 ++ _D4core3sys5posix5sched11__moduleRefZ@Base 12 ++ _D4core3sys5posix5sched11sched_param6__initZ@Base 12 ++ _D4core3sys5posix5sched12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix5spawn11__moduleRefZ@Base 12 ++ _D4core3sys5posix5spawn12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix5spawn17posix_spawnattr_t6__initZ@Base 12 ++ _D4core3sys5posix5spawn26posix_spawn_file_actions_t6__initZ@Base 12 ++ _D4core3sys5posix5stdio11__moduleRefZ@Base 12 ++ _D4core3sys5posix5stdio12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix5utime11__moduleRefZ@Base 12 ++ _D4core3sys5posix5utime12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix5utime7utimbuf6__initZ@Base 12 ++ _D4core3sys5posix6config11__moduleRefZ@Base 12 ++ _D4core3sys5posix6config12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6dirent11__moduleRefZ@Base 12 ++ _D4core3sys5posix6dirent12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6dirent3DIR6__initZ@Base 12 ++ _D4core3sys5posix6direntQh6__initZ@Base 12 ++ _D4core3sys5posix6libgen11__moduleRefZ@Base 12 ++ _D4core3sys5posix6libgen12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6locale11__moduleRefZ@Base 12 ++ _D4core3sys5posix6locale12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6locale5lconv6__initZ@Base 12 ++ _D4core3sys5posix6mqueue11__moduleRefZ@Base 12 ++ _D4core3sys5posix6mqueue12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6mqueue7mq_attr6__initZ@Base 12 ++ _D4core3sys5posix6setjmp11__moduleRefZ@Base 12 ++ _D4core3sys5posix6setjmp12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6setjmp13__jmp_buf_tag6__initZ@Base 12 ++ _D4core3sys5posix6signal11__moduleRefZ@Base 12 ++ _D4core3sys5posix6signal11sigaction_t6__initZ@Base 12 ++ _D4core3sys5posix6signal12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6signal6sigval6__initZ@Base 12 ++ _D4core3sys5posix6signal7stack_t6__initZ@Base 12 ++ _D4core3sys5posix6signal8SIGRTMAXUNbNdNiZ3sigi@Base 12 ++ _D4core3sys5posix6signal8SIGRTMINUNbNdNiZ3sigi@Base 12 ++ _D4core3sys5posix6signal8sigevent6__initZ@Base 12 ++ _D4core3sys5posix6signal8sigset_t6__initZ@Base 12 ++ _D4core3sys5posix6signal8sigstack6__initZ@Base 12 ++ _D4core3sys5posix6signal8timespec6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t10_sigpoll_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t11_sigchild_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t11_sigfault_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t5_rt_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t7_kill_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t8_timer_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t6si_pidMUNbNcNdNiNjZi@Base 12 ++ _D4core3sys5posix6signal9siginfo_t6si_uidMUNbNcNdNiNjZk@Base 12 ++ _D4core3sys5posix6signal9siginfo_t7si_addrMUNbNcNdNiNjZPv@Base 12 ++ _D4core3sys5posix6signal9siginfo_t7si_bandMUNbNcNdNiNjZl@Base 12 ++ _D4core3sys5posix6signal9siginfo_t8si_valueMUNbNcNdNiNjZSQCdQCbQCaQBx6sigval@Base 12 ++ _D4core3sys5posix6signal9siginfo_t9si_statusMUNbNcNdNiNjZi@Base 12 ++ _D4core3sys5posix6stdlib11__moduleRefZ@Base 12 ++ _D4core3sys5posix6stdlib12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6string11__moduleRefZ@Base 12 ++ _D4core3sys5posix6string12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6syslog11__moduleRefZ@Base 12 ++ _D4core3sys5posix6syslog12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6unistd11__moduleRefZ@Base 12 ++ _D4core3sys5posix6unistd12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7netinet3in_11__moduleRefZ@Base 12 ++ _D4core3sys5posix7netinet3in_11sockaddr_in6__initZ@Base 12 ++ _D4core3sys5posix7netinet3in_12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7netinet3in_12sockaddr_in66__initZ@Base 12 ++ _D4core3sys5posix7netinet3in_20IN6_IS_ADDR_LOOPBACKFNaNbNiPSQCgQCeQCdQCaQBv8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_20IN6_IS_ADDR_V4COMPATFNaNbNiPSQCgQCeQCdQCaQBv8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_20IN6_IS_ADDR_V4MAPPEDFNaNbNiPSQCgQCeQCdQCaQBv8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_21IN6_IS_ADDR_LINKLOCALFNaNbNiPSQChQCfQCeQCbQBw8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_21IN6_IS_ADDR_MC_GLOBALFNaNbNiPSQChQCfQCeQCbQBw8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_21IN6_IS_ADDR_MULTICASTFNaNbNiPSQChQCfQCeQCbQBw8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_21IN6_IS_ADDR_SITELOCALFNaNbNiPSQChQCfQCeQCbQBw8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_23IN6_IS_ADDR_MC_ORGLOCALFNaNbNiPSQCjQChQCgQCdQBy8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_23IN6_IS_ADDR_UNSPECIFIEDFNaNbNiPSQCjQChQCgQCdQBy8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_24IN6_IS_ADDR_MC_LINKLOCALFNaNbNiPSQCkQCiQChQCeQBz8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_24IN6_IS_ADDR_MC_NODELOCALFNaNbNiPSQCkQCiQChQCeQBz8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_24IN6_IS_ADDR_MC_SITELOCALFNaNbNiPSQCkQCiQChQCeQBz8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_8in6_addr6__initZ@Base 12 ++ _D4core3sys5posix7netinet3in_9ipv6_mreq6__initZ@Base 12 ++ _D4core3sys5posix7netinet3tcp11__moduleRefZ@Base 12 ++ _D4core3sys5posix7netinet3tcp12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7pthread11__moduleRefZ@Base 12 ++ _D4core3sys5posix7pthread12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7pthread15pthread_cleanup6__initZ@Base 12 ++ _D4core3sys5posix7pthread15pthread_cleanup__T3popZQfMFNbiZv@Base 12 ++ _D4core3sys5posix7pthread15pthread_cleanup__T4pushHTPUNaNbNiPvZvZQuMFNbNiQvQpZv@Base 12 ++ _D4core3sys5posix7pthread23_pthread_cleanup_buffer6__initZ@Base 12 ++ _D4core3sys5posix7strings11__moduleRefZ@Base 12 ++ _D4core3sys5posix7strings12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7termios11__moduleRefZ@Base 12 ++ _D4core3sys5posix7termios12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7termiosQi6__initZ@Base 12 ++ _D4core3sys5posix8inttypes11__moduleRefZ@Base 12 ++ _D4core3sys5posix8inttypes12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix8ucontext10mcontext_t6__initZ@Base 12 ++ _D4core3sys5posix8ucontext10ucontext_t6__initZ@Base 12 ++ _D4core3sys5posix8ucontext11__moduleRefZ@Base 12 ++ _D4core3sys5posix8ucontext12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix8ucontext12_libc_fpxreg6__initZ@Base 12 ++ _D4core3sys5posix8ucontext12_libc_xmmreg6__initZ@Base 12 ++ _D4core3sys5posix8ucontext13_libc_fpstate6__initZ@Base 12 ++ _D4core3sys5posix9semaphore11__moduleRefZ@Base 12 ++ _D4core3sys5posix9semaphore12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix9semaphore17_pthread_fastlock6__initZ@Base 12 ++ _D4core3sys5posix9semaphore5sem_t6__initZ@Base 12 ++ _D4core3sys5posixQk2un11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk2un11sockaddr_un6__initZ@Base 12 ++ _D4core3sys5posixQk2un12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk3ipc11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk3ipc12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk3ipc8ipc_perm6__initZ@Base 12 ++ _D4core3sys5posixQk3msg11__moduleRefZ@Base 12 ++ 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_D4core4sync7rwmutex14ReadWriteMutex6Reader4lockMOFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader6__initZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader6__vtblZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader6unlockMFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader6unlockMOFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7__ClassZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7tryLockMFNeSQCc4time8DurationZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7tryLockMFNeZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7tryLockMOFNeSQCd4time8DurationZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7tryLockMOFNeZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader__T17shouldQueueReaderTCQCnQClQCjQCeQBrZQBlMFNaNbNdNiNfZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader__T17shouldQueueReaderTOCQCoQCmQCkQCfQBsZQBmMOFNaNbNdNiNfZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader__T6__ctorTCQCbQBzQBxQBsQBfZQzMFNaNbNiNeZQBe@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader__T6__ctorTOCQCcQCaQByQBtQBgZQBaMOFNaNbNiNeZOQBh@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer12MonitorProxy11__xopEqualsMxFKxSQCwQCuQCsQCnQCaQBwZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer12MonitorProxy6__initZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer12MonitorProxy9__xtoHashFNbNeKxSQCvQCtQCrQCmQBzQBvZm@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer4lockMFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer4lockMOFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer6__initZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer6__vtblZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer6unlockMFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer6unlockMOFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7__ClassZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7tryLockMFNeSQCc4time8DurationZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7tryLockMFNeZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7tryLockMOFNeSQCd4time8DurationZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7tryLockMOFNeZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer__T17shouldQueueWriterTCQCnQClQCjQCeQBrZQBlMFNaNbNdNiNfZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer__T17shouldQueueWriterTOCQCoQCmQCkQCfQBsZQBmMOFNaNbNdNiNfZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer__T6__ctorTCQCbQBzQBxQBsQBfZQzMFNaNbNiNeZQBe@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer__T6__ctorTOCQCcQCaQByQBtQBgZQBaMOFNaNbNiNeZOQBh@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6__ctorMFNbNfEQBwQBuQBsQBn6PolicyZCQCrQCpQCnQCi@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6__ctorMOFNbNfEQBxQBvQBtQBo6PolicyZOCQCtQCrQCpQCk@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6__initZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6__vtblZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6policyMFNbNdNfZEQBzQBxQBvQBq6Policy@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6policyMOFNbNdNfZEQCaQByQBwQBr6Policy@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6readerMFNbNdNfZCQBzQBxQBvQBq6Reader@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6readerMOFNbNdNfZOCQCbQBzQBxQBs6Reader@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6writerMFNbNdNfZCQBzQBxQBvQBq6Writer@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6writerMOFNbNdNfZOCQCbQBzQBxQBs6Writer@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex7__ClassZ@Base 12 ++ _D4core4sync9condition11__moduleRefZ@Base 12 ++ _D4core4sync9condition12__ModuleInfoZ@Base 12 ++ _D4core4sync9condition9Condition13mutex_nothrowMFNaNbNdNiNfZCQChQCf5mutex5Mutex@Base 12 ++ _D4core4sync9condition9Condition13mutex_nothrowMOFNaNbNdNiNfZOCQCjQCh5mutex5Mutex@Base 12 ++ _D4core4sync9condition9Condition4waitMFSQBm4time8DurationZb@Base 12 ++ _D4core4sync9condition9Condition4waitMFZv@Base 12 ++ _D4core4sync9condition9Condition4waitMOFSQBn4time8DurationZb@Base 12 ++ _D4core4sync9condition9Condition4waitMOFZv@Base 12 ++ _D4core4sync9condition9Condition5mutexMFNdZCQBqQBoQs5Mutex@Base 12 ++ _D4core4sync9condition9Condition5mutexMOFNdZOCQBsQBqQu5Mutex@Base 12 ++ _D4core4sync9condition9Condition6__ctorMFNbNfCQBsQBq5mutex5MutexZCQCmQCkQCiQCb@Base 12 ++ _D4core4sync9condition9Condition6__ctorMOFNbNfOCQBuQBs5mutex5MutexZOCQCpQCnQClQCe@Base 12 ++ _D4core4sync9condition9Condition6__dtorMFZv@Base 12 ++ _D4core4sync9condition9Condition6__initZ@Base 12 ++ _D4core4sync9condition9Condition6__vtblZ@Base 12 ++ _D4core4sync9condition9Condition6notifyMFZv@Base 12 ++ _D4core4sync9condition9Condition6notifyMOFZv@Base 12 ++ _D4core4sync9condition9Condition7__ClassZ@Base 12 ++ _D4core4sync9condition9Condition9notifyAllMFZv@Base 12 ++ _D4core4sync9condition9Condition9notifyAllMOFZv@Base 12 ++ _D4core4sync9condition9Condition__T4waitTCQBoQBmQBkQBdZQuMFSQCg4time8DurationbZb@Base 12 ++ _D4core4sync9condition9Condition__T4waitTCQBoQBmQBkQBdZQuMFbZv@Base 12 ++ _D4core4sync9condition9Condition__T4waitTOCQBpQBnQBlQBeZQvMOFSQCi4time8DurationbZb@Base 12 ++ _D4core4sync9condition9Condition__T4waitTOCQBpQBnQBlQBeZQvMOFbZv@Base 12 ++ _D4core4sync9condition9Condition__T6__ctorTCQBqQBoQBmQBfTCQCeQCc5mutex5MutexZQBqMFNbNeQBdbZQBw@Base 12 ++ _D4core4sync9condition9Condition__T6__ctorTOCQBrQBpQBnQBgTOCQCgQCe5mutex5MutexZQBsMOFNbNeOQBfbZOQCa@Base 12 ++ _D4core4sync9condition9Condition__T6notifyTCQBqQBoQBmQBfZQwMFNbbZv@Base 12 ++ _D4core4sync9condition9Condition__T6notifyTOCQBrQBpQBnQBgZQxMOFNbbZv@Base 12 ++ _D4core4sync9condition9Condition__T9notifyAllTCQBtQBrQBpQBiZQzMFNbbZv@Base 12 ++ _D4core4sync9condition9Condition__T9notifyAllTOCQBuQBsQBqQBjZQBaMOFNbbZv@Base 12 ++ _D4core4sync9exception11__moduleRefZ@Base 12 ++ _D4core4sync9exception12__ModuleInfoZ@Base 12 ++ _D4core4sync9exception9SyncError6__ctorMFNaNbNfAyaC6object9ThrowableQvmZCQCtQCrQCpQCi@Base 12 ++ _D4core4sync9exception9SyncError6__ctorMFNaNbNfAyaQdmC6object9ThrowableZCQCtQCrQCpQCi@Base 12 ++ _D4core4sync9exception9SyncError6__initZ@Base 12 ++ _D4core4sync9exception9SyncError6__vtblZ@Base 12 ++ _D4core4sync9exception9SyncError7__ClassZ@Base 12 ++ _D4core4sync9semaphore11__moduleRefZ@Base 12 ++ _D4core4sync9semaphore12__ModuleInfoZ@Base 12 ++ _D4core4sync9semaphore9Semaphore4waitMFSQBm4time8DurationZb@Base 12 ++ _D4core4sync9semaphore9Semaphore4waitMFZv@Base 12 ++ _D4core4sync9semaphore9Semaphore6__ctorMFkZCQBqQBoQBmQBf@Base 12 ++ _D4core4sync9semaphore9Semaphore6__dtorMFZv@Base 12 ++ _D4core4sync9semaphore9Semaphore6__initZ@Base 12 ++ _D4core4sync9semaphore9Semaphore6__vtblZ@Base 12 ++ _D4core4sync9semaphore9Semaphore6notifyMFZv@Base 12 ++ _D4core4sync9semaphore9Semaphore7__ClassZ@Base 12 ++ _D4core4sync9semaphore9Semaphore7tryWaitMFZb@Base 12 ++ _D4core4time11__moduleRefZ@Base 12 ++ _D4core4time11_posixClockFNaNbNiNfEQBhQBf9ClockTypeZi@Base 12 ++ _D4core4time12TickDuration11ticksPerSecyl@Base 12 ++ _D4core4time12TickDuration14currSystemTickFNbNdNiNeZSQBzQBxQBv@Base 12 ++ _D4core4time12TickDuration27_sharedStaticCtor_L2825_C14FNeZv@Base 12 ++ _D4core4time12TickDuration3maxFNaNbNdNiNfZSQBpQBnQBl@Base 12 ++ _D4core4time12TickDuration3minFNaNbNdNiNfZSQBpQBnQBl@Base 12 ++ _D4core4time12TickDuration4zeroFNaNbNdNiNfZSQBqQBoQBm@Base 12 ++ _D4core4time12TickDuration5msecsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration5nsecsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration5opCmpMxFNaNbNiNfSQBqQBoQBmZi@Base 12 ++ _D4core4time12TickDuration5usecsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration6__ctorMFNaNbNcNiNflZSQBuQBsQBq@Base 12 ++ _D4core4time12TickDuration6__initZ@Base 12 ++ _D4core4time12TickDuration6hnsecsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration7secondsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration8__xopCmpMxFKxSQBnQBlQBjZi@Base 12 ++ _D4core4time12TickDuration9appOriginySQBkQBiQBg@Base 12 ++ _D4core4time12__ModuleInfoZ@Base 12 ++ _D4core4time12nsecsToTicksFNaNbNiNflZl@Base 12 ++ _D4core4time12ticksToNSecsFNaNbNiNflZl@Base 12 ++ _D4core4time13TimeException6__ctorMFNaNbNfAyaC6object9ThrowableQvmZCQCoQCmQCk@Base 12 ++ _D4core4time13TimeException6__ctorMFNaNbNfAyaQdmC6object9ThrowableZCQCoQCmQCk@Base 12 ++ _D4core4time13TimeException6__initZ@Base 12 ++ _D4core4time13TimeException6__vtblZ@Base 12 ++ _D4core4time13TimeException7__ClassZ@Base 12 ++ _D4core4time13_clockTypeIdxFEQBbQz9ClockTypeZm@Base 12 ++ _D4core4time13convClockFreqFNaNbNiNflllZl@Base 12 ++ _D4core4time14_clockTypeNameFEQBcQBa9ClockTypeZAya@Base 12 ++ _D4core4time15_ticksPerSecondyG8l@Base 12 ++ _D4core4time25unitsAreInDescendingOrderFMAAyaZb@Base 12 ++ _D4core4time3absFNaNbNiNfSQyQv12TickDurationZQu@Base 12 ++ _D4core4time3absFNaNbNiNfSQyQv8DurationZQp@Base 12 ++ _D4core4time4_absFNaNbNiNfdZd@Base 12 ++ _D4core4time4_absFNaNbNiNflZl@Base 12 ++ _D4core4time8Duration10isNegativeMxFNaNbNdNiNfZb@Base 12 ++ _D4core4time8Duration3maxFNaNbNdNiNfZSQBkQBiQBg@Base 12 ++ _D4core4time8Duration3minFNaNbNdNiNfZSQBkQBiQBg@Base 12 ++ _D4core4time8Duration4zeroFNaNbNdNiNfZSQBlQBjQBh@Base 12 ++ _D4core4time8Duration5opCmpMxFNaNbNiNfSQBlQBjQBhZi@Base 12 ++ _D4core4time8Duration6__ctorMFNaNbNcNiNflZSQBpQBnQBl@Base 12 ++ _D4core4time8Duration6__initZ@Base 12 ++ _D4core4time8Duration8__xopCmpMxFKxSQBiQBgQBeZi@Base 12 ++ _D4core4time8Duration8toStringMxFNaNbNfZAya@Base 12 ++ _D4core4time8Duration__T10opOpAssignVAyaa1_2aZQwMFNaNbNcNiNflZSQCjQChQCf@Base 12 ++ _D4core4time8Duration__T10opOpAssignVAyaa1_2bTSQBtQBrQBpZQBhMFNaNbNcNiNfxSQCuQCsQCqZQBm@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373ZQBsMxFNaNbNiNfZ10SplitUnits6__initZ@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373ZQBsMxFNaNbNiNfZ12genSplitCallFNaNbNfZQCw@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373ZQBsMxFNaNbNiNfZ14genMemberDeclsFNaNbNfZQCy@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373ZQBsMxFNaNbNiNfZSQDeQDcQDa__TQCuVQCra7_7365636f6e6473VQDma5_6e73656373ZQEkMxFNaNbNiNfZ10SplitUnits@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373Z__TQBvTlTlZQCdMxFNaNbNiNfJlJlZv@Base 12 ++ _D4core4time8Duration__T5totalVAyaa5_6d73656373ZQyMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time8Duration__T5totalVAyaa7_7365636f6e6473ZQBcMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time8Duration__T8opBinaryVAyaa1_2bTSQBqQBoQBmZQBeMxFNaNbNiNfQzZQBc@Base 12 ++ _D4core4time8Duration__T8opBinaryVAyaa1_2dTxSQBrQBpQBnZQBfMxFNaNbNiNfxQBaZSQCvQCtQCr@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ10appListSepFNaNbNfQBqkbZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ5unitsyAAa@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa4_64617973ZQBcFNaNbNfQCmlZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa5_686f757273ZQBeFNaNbNfQColZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa5_6d73656373ZQBeFNaNbNfQColZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa5_7573656373ZQBeFNaNbNfQColZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa5_7765656b73ZQBeFNaNbNfQColZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa6_686e73656373ZQBgFNaNbNfQCqlZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa7_6d696e75746573ZQBiFNaNbNfQCslZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa7_7365636f6e6473ZQBiFNaNbNfQCslZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFNaNbNfMQBaZv@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj14ticksPerSecondFNaNbNdNiNfZl@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj3maxFNaNbNdNiNfZSQCqQCo__TQCmVQCbi0ZQCw@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj3minFNaNbNdNiNfZSQCqQCo__TQCmVQCbi0ZQCw@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj4zeroFNaNbNdNiNfZSQCrQCp__TQCnVQCci0ZQCx@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj5opCmpMxFNaNbNiNfSQCrQCp__TQCnVQCci0ZQCxZi@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj5ticksMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj6__initZ@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj8__xopCmpMxFKxSQCoQCm__TQCkVQBzi0ZQCuZi@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj8currTimeFNbNdNiNeZSQCtQCr__TQCpVQCei0ZQCz@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj8toStringMxFNaNbNfZAya@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj__T8opBinaryVAyaa1_2dZQtMxFNaNbNiNfSQDjQDh__TQDfVQCui0ZQDpZSQEhQEf8Duration@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa4_64617973ZQBmFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa5_686f757273ZQBoFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa5_6d73656373ZQBoFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa5_7573656373ZQBoFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa5_7765656b73ZQBoFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa7_6d696e75746573ZQBsFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa7_7365636f6e6473ZQBsFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T2toVAyaa5_6d73656373TlTxSQBmQBk12TickDurationZQBuFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T2toVAyaa5_6e73656373TlTxSQBmQBk12TickDurationZQBuFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T2toVAyaa5_7573656373TlTxSQBmQBk12TickDurationZQBuFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T2toVAyaa6_686e73656373TlTxSQBoQBm12TickDurationZQBwFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T2toVAyaa7_7365636f6e6473TlTxSQBqQBo12TickDurationZQByFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T3durVAyaa4_64617973ZQuFNaNbNiNflZSQBvQBt8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_686f757273ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_6d73656373ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_6e73656373ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_7573656373ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_7765656b73ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa6_686e73656373ZQyFNaNbNiNflZSQBzQBx8Duration@Base 12 ++ _D4core4time__T3durVAyaa7_6d696e75746573ZQBaFNaNbNiNflZSQCcQCa8Duration@Base 12 ++ _D4core4time__T3durVAyaa7_7365636f6e6473ZQBaFNaNbNiNflZSQCcQCa8Duration@Base 12 ++ _D4core4time__T7convertVAyaa4_64617973VQpa6_686e73656373ZQBqFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_686f757273VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_6d73656373VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_6e73656373VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_7573656373VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_7765656b73VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta4_64617973ZQBqFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_686f757273ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_6d73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_6e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_7573656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_7765656b73ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta6_686e73656373ZQBuFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta7_6d696e75746573ZQBwFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta7_7365636f6e6473ZQBwFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_6d696e75746573VQva6_686e73656373ZQBwFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva5_6d73656373ZQBuFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva5_6e73656373ZQBuFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva5_7573656373ZQBuFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva6_686e73656373ZQBwFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva7_7365636f6e6473ZQByFNaNbNiNflZl@Base 12 ++ _D4core5bitop11__moduleRefZ@Base 12 ++ _D4core5bitop12__ModuleInfoZ@Base 12 ++ _D4core5bitop2btFNaNbNiMxPmmZi@Base 12 ++ _D4core5bitop3bsfFNaNbNiNfkZi@Base 12 ++ _D4core5bitop3bsfFNaNbNiNfmZi@Base 12 ++ _D4core5bitop3bsrFNaNbNiNfkZi@Base 12 ++ _D4core5bitop3bsrFNaNbNiNfmZi@Base 12 ++ _D4core5bitop6popcntFNaNbNiNfkZi@Base 12 ++ _D4core5bitop6popcntFNaNbNiNfmZi@Base 12 ++ _D4core5bitop7Split646__ctorMFNaNbNcNiNfmZSQBpQBnQBk@Base 12 ++ _D4core5bitop7Split646__initZ@Base 12 ++ _D4core5bitop7bitswapFNaNbNiNfkZk@Base 12 ++ _D4core5bitop7bitswapFNaNbNiNfmZm@Base 12 ++ _D4core5bitop8BitRange5emptyMxFNaNbNiNfZb@Base 12 ++ _D4core5bitop8BitRange5frontMFNaNbNiNfZm@Base 12 ++ _D4core5bitop8BitRange6__ctorMFNaNbNcNiPxmmZSQBrQBpQBm@Base 12 ++ _D4core5bitop8BitRange6__initZ@Base 12 ++ _D4core5bitop8BitRange8popFrontMFNaNbNiZv@Base 12 ++ _D4core5bitop8byteswapFNaNbNiNftZt@Base 12 ++ _D4core5bitop__T10softPopcntTkZQpFNaNbNiNfkZi@Base 12 ++ _D4core5bitop__T10softPopcntTmZQpFNaNbNiNfmZi@Base 12 ++ _D4core5bitop__T11softBitswapTkZQqFNaNbNiNfkZk@Base 12 ++ _D4core5bitop__T11softBitswapTmZQqFNaNbNiNfmZm@Base 12 ++ _D4core5bitop__T8softScanTkVbi0ZQqFNaNbNiNfkZi@Base 12 ++ _D4core5bitop__T8softScanTkVbi1ZQqFNaNbNiNfkZi@Base 12 ++ _D4core5bitop__T8softScanTmVbi0ZQqFNaNbNiNfmZi@Base 12 ++ _D4core5bitop__T8softScanTmVbi1ZQqFNaNbNiNfmZi@Base 12 ++ _D4core5cpuid10_hasPopcntyb@Base 12 ++ _D4core5cpuid10_hasRdrandyb@Base 12 ++ _D4core5cpuid10_hasRdseedyb@Base 12 ++ _D4core5cpuid10_isItaniumyb@Base 12 ++ _D4core5cpuid10_processoryAa@Base 12 ++ _D4core5cpuid10_x87onChipyb@Base 12 ++ _D4core5cpuid10dataCachesFNaNbNdNiNeZxG5SQBnQBl9CacheInfo@Base 12 ++ _D4core5cpuid11CpuFeatures11__xopEqualsMxFKxSQBrQBpQBmZb@Base 12 ++ _D4core5cpuid11CpuFeatures6__initZ@Base 12 ++ _D4core5cpuid11CpuFeatures9__xtoHashFNbNeKxSQBqQBoQBlZm@Base 12 ++ _D4core5cpuid11__moduleRefZ@Base 12 ++ _D4core5cpuid11_dataCachesyG5SQBcQBa9CacheInfo@Base 12 ++ _D4core5cpuid11amd3dnowExtFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid11cacheLevelsFNbNdNiNeZk@Base 12 ++ _D4core5cpuid11coresPerCPUFNaNbNdNiNeZk@Base 12 ++ _D4core5cpuid11cpuFeaturesSQzQw11CpuFeatures@Base 12 ++ _D4core5cpuid11hasLahfSahfFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid12__ModuleInfoZ@Base 12 ++ _D4core5cpuid12_amd3dnowExtyb@Base 12 ++ _D4core5cpuid12_coresPerCPUyk@Base 12 ++ _D4core5cpuid12_hasLahfSahfyb@Base 12 ++ _D4core5cpuid12getCpuInfo0BFNbNiNeZv@Base 12 ++ _D4core5cpuid12hasCmpxchg8bFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid12hasPclmulqdqFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid12preferAthlonFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid13_hasCmpxchg8byb@Base 12 ++ _D4core5cpuid13_hasPclmulqdqyb@Base 12 ++ _D4core5cpuid13_preferAthlonyb@Base 12 ++ _D4core5cpuid13hasCmpxchg16bFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid13hasVpclmulqdqFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid13threadsPerCPUFNaNbNdNiNeZk@Base 12 ++ _D4core5cpuid14_hasCmpxchg16byb@Base 12 ++ _D4core5cpuid14_hasVpclmulqdqyb@Base 12 ++ _D4core5cpuid14_threadsPerCPUyk@Base 12 ++ _D4core5cpuid14getCpuFeaturesFNbNiNeZPSQBlQBj11CpuFeatures@Base 12 ++ _D4core5cpuid14hyperThreadingFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid14numCacheLevelsk@Base 12 ++ _D4core5cpuid14preferPentium1FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid14preferPentium4FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid15_hyperThreadingyb@Base 12 ++ _D4core5cpuid15_preferPentium1yb@Base 12 ++ _D4core5cpuid15_preferPentium4yb@Base 12 ++ _D4core5cpuid15getAMDcacheinfoFNbNiNeZ8assocmapyAh@Base 12 ++ _D4core5cpuid15getAMDcacheinfoFNbNiNeZv@Base 12 ++ _D4core5cpuid16has3dnowPrefetchFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid17_has3dnowPrefetchyb@Base 12 ++ _D4core5cpuid17hyperThreadingBitFNbNdNiNeZb@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID2FNbNiNeZ14decipherCpuid2MFNbNihZ3idsyG63h@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID2FNbNiNeZ14decipherCpuid2MFNbNihZ4waysyG63h@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID2FNbNiNeZ14decipherCpuid2MFNbNihZ5sizesyG63k@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID2FNbNiNeZv@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID4FNbNiNeZv@Base 12 ++ _D4core5cpuid18hasSysEnterSysExitFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid18max_extended_cpuidk@Base 12 ++ _D4core5cpuid19_hasSysEnterSysExityb@Base 12 ++ _D4core5cpuid26_sharedStaticCtor_L1068_C1FNbNiNeZv@Base 12 ++ _D4core5cpuid3aesFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3avxFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3fmaFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3hleFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3mmxFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3rtmFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3sseFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid4_aesyb@Base 12 ++ _D4core5cpuid4_avxyb@Base 12 ++ _D4core5cpuid4_fmayb@Base 12 ++ _D4core5cpuid4_hleyb@Base 12 ++ _D4core5cpuid4_mmxyb@Base 12 ++ _D4core5cpuid4_rtmyb@Base 12 ++ _D4core5cpuid4_sseyb@Base 12 ++ _D4core5cpuid4avx2FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid4sse2FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid4sse3FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid4vaesFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5_avx2yb@Base 12 ++ _D4core5cpuid5_sse2yb@Base 12 ++ _D4core5cpuid5_sse3yb@Base 12 ++ _D4core5cpuid5_vaesyb@Base 12 ++ _D4core5cpuid5fp16cFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5modelk@Base 12 ++ _D4core5cpuid5sse41FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5sse42FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5sse4aFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5ssse3FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid6_fp16cyb@Base 12 ++ _D4core5cpuid6_sse41yb@Base 12 ++ _D4core5cpuid6_sse42yb@Base 12 ++ _D4core5cpuid6_sse4ayb@Base 12 ++ _D4core5cpuid6_ssse3yb@Base 12 ++ _D4core5cpuid6amdMmxFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid6familyk@Base 12 ++ _D4core5cpuid6hasShaFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid6vendorFNaNbNdNiNeZAya@Base 12 ++ _D4core5cpuid7_amdMmxyb@Base 12 ++ _D4core5cpuid7_hasShayb@Base 12 ++ _D4core5cpuid7_vendoryAa@Base 12 ++ _D4core5cpuid7hasCmovFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid7hasFxsrFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8_hasCmovyb@Base 12 ++ _D4core5cpuid8_hasFxsryb@Base 12 ++ _D4core5cpuid8amd3dnowFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8cpuidX86FNbNiNeZv@Base 12 ++ _D4core5cpuid8hasCPUIDFNbNiNeZb@Base 12 ++ _D4core5cpuid8hasLzcntFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8hasRdtscFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8isX86_64FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8steppingk@Base 12 ++ _D4core5cpuid9CacheInfo6__initZ@Base 12 ++ _D4core5cpuid9_amd3dnowyb@Base 12 ++ _D4core5cpuid9_hasLzcntyb@Base 12 ++ _D4core5cpuid9_hasRdtscyb@Base 12 ++ _D4core5cpuid9_isX86_64yb@Base 12 ++ _D4core5cpuid9datacacheG5SQyQv9CacheInfo@Base 12 ++ _D4core5cpuid9hasPopcntFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid9hasRdrandFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid9hasRdseedFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid9isItaniumFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid9max_cpuidk@Base 12 ++ _D4core5cpuid9processorFNaNbNdNiNeZAya@Base 12 ++ _D4core5cpuid9x87onChipFNaNbNdNiNeZb@Base 12 ++ _D4core6atomic11__moduleRefZ@Base 12 ++ _D4core6atomic12__ModuleInfoZ@Base 12 ++ _D4core6atomic5pauseFNaNbNiNfZv@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNeNkMKOxPSQCcQCcQBvZQCp@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNeNkMKxPOxSQCdQCdQBwZQCq@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TmZQBmFNaNbNiNeKOxmZm@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TmZQBmFNaNbNiNeKxmZm@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TPOS2rt8monitor_7MonitorZQCiFNaNbNiNeNkMKOxPSQBpQBpQBjZQCc@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TPOS2rt8monitor_7MonitorZQCiFNaNbNiNeNkMKxPOxSQBqQBqQBkZQCd@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNeNkMKOxPSQCcQCcQBvZQCp@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNeNkMKxPOxSQCdQCdQBwZQCq@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TbZQBmFNaNbNiNeKOxbZb@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TbZQBmFNaNbNiNeKxbZb@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TiZQBmFNaNbNiNeKOxiZi@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TiZQBmFNaNbNiNeKxiZi@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TkZQBmFNaNbNiNeKOxkZk@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TkZQBmFNaNbNiNeKxkZk@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi0TbTbZQBpFNaNbNiNeKObbZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi0TbTbZQBpFNaNbNiNeKbbZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi0TmTiZQBpFNaNbNiNeKOmiZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi0TmTiZQBpFNaNbNiNeKmiZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TPOS2rt8monitor_7MonitorTQyZQCmFNaNbNiNeKOPQBoQBtZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TPOS2rt8monitor_7MonitorTQyZQCmFNaNbNiNeKQBoQBrZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TPOS2rt9critical_18D_CRITICAL_SECTIONTQBlZQDaFNaNbNiNeKOPQCcQChZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TPOS2rt9critical_18D_CRITICAL_SECTIONTQBlZQDaFNaNbNiNeKQCcQCfZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TmTmZQBpFNaNbNiNeKOmmZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TmTmZQBpFNaNbNiNeKmmZv@Base 12 ++ _D4core6atomic__T14atomicFetchAddVEQBhQBf11MemoryOrderi5TkZQBqFNaNbNiNeKOkmZk@Base 12 ++ _D4core6atomic__T14atomicFetchAddVEQBhQBf11MemoryOrderi5TkZQBqFNaNbNiNeKkmZk@Base 12 ++ _D4core6atomic__T14atomicFetchAddVEQBhQBf11MemoryOrderi5TmZQBqFNaNbNiNeKOmmZm@Base 12 ++ _D4core6atomic__T14atomicFetchAddVEQBhQBf11MemoryOrderi5TmZQBqFNaNbNiNeKmmZm@Base 12 ++ _D4core6atomic__T14atomicFetchSubVEQBhQBf11MemoryOrderi5TkZQBqFNaNbNiNeKOkmZk@Base 12 ++ _D4core6atomic__T14atomicFetchSubVEQBhQBf11MemoryOrderi5TkZQBqFNaNbNiNeKkmZk@Base 12 ++ _D4core6atomic__T14atomicFetchSubVEQBhQBf11MemoryOrderi5TmZQBqFNaNbNiNeKOmmZm@Base 12 ++ _D4core6atomic__T14atomicFetchSubVEQBhQBf11MemoryOrderi5TmZQBqFNaNbNiNeKmmZm@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOhZQBgFNaNbNiNfPOhZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOkZQBgFNaNbNiNfPOkZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOmZQBgFNaNbNiNfPOmZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOtZQBgFNaNbNiNfPOtZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedThZQBfFNaNbNiNfPhZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTkZQBfFNaNbNiNfPkZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTmZQBfFNaNbNiNfPmZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTtZQBfFNaNbNiNfPtZb@Base 12 ++ _D4core6atomic__T28atomicValueIsProperlyAlignedTOkZQBiFNaNbNiNeKOkZb@Base 12 ++ _D4core6atomic__T28atomicValueIsProperlyAlignedTOmZQBiFNaNbNiNeKOmZb@Base 12 ++ _D4core6atomic__T28atomicValueIsProperlyAlignedTkZQBhFNaNbNiNeKkZb@Base 12 ++ _D4core6atomic__T28atomicValueIsProperlyAlignedTmZQBhFNaNbNiNeKmZb@Base 12 ++ _D4core6atomic__T3casZ__TQiThThThZQrFNaNbNiNePOhhhZb@Base 12 ++ _D4core6atomic__T3casZ__TQiThThThZQrFNaNbNiNePhhhZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTmTmTmZQrFNaNbNiNePOmmmZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTmTmTmZQrFNaNbNiNePmmmZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTtTtTtZQrFNaNbNiNePOtttZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTtTtTtZQrFNaNbNiNePtttZb@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2b3dTkTiZQzFNaNbNiNfKOkiZk@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2b3dTmTiZQzFNaNbNiNfKOmiZm@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2b3dTmTmZQzFNaNbNiNfKOmmZm@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2d3dTkTiZQzFNaNbNiNfKOkiZk@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2d3dTmTiZQzFNaNbNiNfKOmiZm@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2d3dTmTmZQzFNaNbNiNfKOmmZm@Base 12 ++ _D4core6int12811__moduleRefZ@Base 12 ++ _D4core6int12812__ModuleInfoZ@Base 12 ++ _D4core6int1282geFNaNbNiNfSQzQw4CentQkZb@Base 12 ++ _D4core6int1282gtFNaNbNiNfSQzQw4CentQkZb@Base 12 ++ _D4core6int1282leFNaNbNiNfSQzQw4CentQkZb@Base 12 ++ _D4core6int1282ltFNaNbNiNfSQzQw4CentQkZb@Base 12 ++ _D4core6int1282orFNaNbNiNfSQzQw4CentQkZQn@Base 12 ++ _D4core6int1283addFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283andFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283comFNaNbNiNfSQBaQy4CentZQm@Base 12 ++ _D4core6int1283decFNaNbNiNfSQBaQy4CentZQm@Base 12 ++ _D4core6int1283divFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283incFNaNbNiNfSQBaQy4CentZQm@Base 12 ++ _D4core6int1283mulFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283negFNaNbNiNfSQBaQy4CentZQm@Base 12 ++ _D4core6int1283rolFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283rorFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283sarFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283shlFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283shrFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283subFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283tstFNaNbNiNfSQBaQy4CentZb@Base 12 ++ _D4core6int1283ugeFNaNbNiNfSQBaQy4CentQlZb@Base 12 ++ _D4core6int1283ugtFNaNbNiNfSQBaQy4CentQlZb@Base 12 ++ _D4core6int1283uleFNaNbNiNfSQBaQy4CentQlZb@Base 12 ++ _D4core6int1283ultFNaNbNiNfSQBaQy4CentQlZb@Base 12 ++ _D4core6int1283xorFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1284Cent6__initZ@Base 12 ++ _D4core6int1284rol1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284ror1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284sar1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284shl1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284shr1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284udivFNaNbNiNfSQBbQz4CentQlZQo@Base 12 ++ _D4core6int1286divmodFNaNbNiNfSQBdQBb4CentQmJQpZQs@Base 12 ++ _D4core6int1287udivmodFNaNbNiNfSQBeQBc4CentQmJQpZ13udivmod128_64FNaNbNiNfQBqmJmZm@Base 12 ++ _D4core6int1287udivmodFNaNbNiNfSQBeQBc4CentQmJQpZ13udivmod128_64FQBimJmZ9udiv96_64FNaNbNiNfmkmZk@Base 12 ++ _D4core6int1287udivmodFNaNbNiNfSQBeQBc4CentQmJQpZQs@Base 12 ++ _D4core6memory10initialize@Base 12 ++ _D4core6memory11__moduleRefZ@Base 12 ++ _D4core6memory12__ModuleInfoZ@Base 12 ++ _D4core6memory2GC12ProfileStats6__initZ@Base 12 ++ _D4core6memory2GC12profileStatsFNbNiNfZSQBmQBkQBg12ProfileStats@Base 12 ++ _D4core6memory2GC5Stats6__initZ@Base 12 ++ _D4core6memory2GC5queryFNaNbNkMPvZSQBhQBf8BlkInfo_@Base 12 ++ _D4core6memory2GC5queryFNbNkMxPvZSQBgQBe8BlkInfo_@Base 12 ++ _D4core6memory2GC5statsFNbNiNfZSQBeQBcQy5Stats@Base 12 ++ _D4core6memory2GC6__initZ@Base 12 ++ _D4core6memory2GC6addrOfFNaNbNiNePNgvZQf@Base 12 ++ _D4core6memory2GC6addrOfFNaNbNiNePvZQd@Base 12 ++ _D4core6memory2GC6sizeOfFNaNbNiPvZm@Base 12 ++ _D4core6memory2GC6sizeOfFNbNiMxPvZm@Base 12 ++ _D4core6memory2GC7clrAttrFNaNbPvkZk@Base 12 ++ _D4core6memory2GC7clrAttrFNbMxPvkZk@Base 12 ++ _D4core6memory2GC7getAttrFNaNbPvZk@Base 12 ++ _D4core6memory2GC7getAttrFNbMxPvZk@Base 12 ++ _D4core6memory2GC7setAttrFNaNbPvkZk@Base 12 ++ _D4core6memory2GC7setAttrFNbMxPvkZk@Base 12 ++ _D4core6memory8BlkInfo_6__initZ@Base 12 ++ _D4core6memory8pageSizeym@Base 12 ++ _D4core6stdcpp11string_view11__moduleRefZ@Base 12 ++ _D4core6stdcpp11string_view12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp11string_view__T11char_traitsTaZQq6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T11char_traitsTuZQq6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T11char_traitsTwZQq6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T17basic_string_viewTaTSQBzQBxQBt__T11char_traitsTaZQqZQCc6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T17basic_string_viewTuTSQBzQBxQBt__T11char_traitsTuZQqZQCc6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T17basic_string_viewTwTSQBzQBxQBt__T11char_traitsTwZQqZQCc6__initZ@Base 12 ++ _D4core6stdcpp11type_traits11__moduleRefZ@Base 12 ++ _D4core6stdcpp11type_traits12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp11type_traits__T17integral_constantTbVbi0ZQBa6__initZ@Base 12 ++ _D4core6stdcpp11type_traits__T17integral_constantTbVbi1ZQBa6__initZ@Base 12 ++ _D4core6stdcpp4new_11__moduleRefZ@Base 12 ++ _D4core6stdcpp4new_11align_val_t6__initZ@Base 12 ++ _D4core6stdcpp4new_11std_nothrowySQBgQBeQBa9nothrow_t@Base 12 ++ _D4core6stdcpp4new_12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp4new_9bad_alloc6__initZ@Base 12 ++ _D4core6stdcpp4new_9bad_alloc6__vtblZ@Base 12 ++ _D4core6stdcpp4new_9bad_alloc7__ClassZ@Base 12 ++ _D4core6stdcpp4new_9nothrow_t6__initZ@Base 12 ++ _D4core6stdcpp5array11__moduleRefZ@Base 12 ++ _D4core6stdcpp5array12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp6memory11__moduleRefZ@Base 12 ++ _D4core6stdcpp6memory12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp6string11__moduleRefZ@Base 12 ++ _D4core6stdcpp6string12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp6vector11__moduleRefZ@Base 12 ++ _D4core6stdcpp6vector12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp7utility11__moduleRefZ@Base 12 ++ _D4core6stdcpp7utility12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp8typeinfo10bad_typeid6__ctorMFNbNiZCQBwQBuQBqQBk@Base 12 ++ _D4core6stdcpp8typeinfo10bad_typeid6__initZ@Base 12 ++ _D4core6stdcpp8typeinfo10bad_typeid6__vtblZ@Base 12 ++ _D4core6stdcpp8typeinfo10bad_typeid7__ClassZ@Base 12 ++ _D4core6stdcpp8typeinfo11__moduleRefZ@Base 12 ++ _D4core6stdcpp8typeinfo12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp8typeinfo8bad_cast6__ctorMFNbNiZCQBtQBrQBnQBh@Base 12 ++ _D4core6stdcpp8typeinfo8bad_cast6__initZ@Base 12 ++ _D4core6stdcpp8typeinfo8bad_cast6__vtblZ@Base 12 ++ _D4core6stdcpp8typeinfo8bad_cast7__ClassZ@Base 12 ++ _D4core6stdcpp8typeinfo9type_info6__ctorMFNiPxaZCQBvQBtQBpQBj@Base 12 ++ _D4core6stdcpp8typeinfo9type_info6__initZ@Base 12 ++ _D4core6stdcpp8typeinfo9type_info6__vtblZ@Base 12 ++ _D4core6stdcpp8typeinfo9type_info7__ClassZ@Base 12 ++ _D4core6stdcpp8xutility11__moduleRefZ@Base 12 ++ _D4core6stdcpp8xutility12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp8xutility14CppStdRevision6__initZ@Base 12 ++ _D4core6stdcpp9allocator11__moduleRefZ@Base 12 ++ _D4core6stdcpp9allocator12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp9exception11__moduleRefZ@Base 12 ++ _D4core6stdcpp9exception12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp9exception13bad_exception6__ctorMFNbNiPxaZCQCdQCbQBxQBq@Base 12 ++ _D4core6stdcpp9exception13bad_exception6__initZ@Base 12 ++ _D4core6stdcpp9exception13bad_exception6__vtblZ@Base 12 ++ _D4core6stdcpp9exception13bad_exception7__ClassZ@Base 12 ++ _D4core6stdcpp9exceptionQk6__ctorMFNbNiPxaiZCQBrQBpQBlQBo@Base 12 ++ _D4core6stdcpp9exceptionQk6__ctorMFNbNiZCQBnQBlQBhQBk@Base 12 ++ _D4core6stdcpp9exceptionQk6__initZ@Base 12 ++ _D4core6stdcpp9exceptionQk6__vtblZ@Base 12 ++ _D4core6stdcpp9exceptionQk7__ClassZ@Base 12 ++ _D4core6thread10threadbase10ThreadBase10popContextMFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase10topContextMFNbNiZPSQCfQCd7context12StackContext@Base 12 ++ _D4core6thread10threadbase10ThreadBase11pushContextMFNbNiPSQCfQCd7context12StackContextZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase12isMainThreadMFNbNdNiZb@Base 12 ++ _D4core6thread10threadbase10ThreadBase13nAboutToStartm@Base 12 ++ _D4core6thread10threadbase10ThreadBase13pAboutToStartPCQCbQBzQBvQBm@Base 12 ++ _D4core6thread10threadbase10ThreadBase13tlsGCdataInitMFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase15initDataStorageMFNbZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase18criticalRegionLockFNbNdNiZCQCn4sync5mutex5Mutex@Base 12 ++ _D4core6thread10threadbase10ThreadBase18destroyDataStorageMFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase18destructBeforeDtorMFNbNiZb@Base 12 ++ _D4core6thread10threadbase10ThreadBase19_criticalRegionLockG72v@Base 12 ++ _D4core6thread10threadbase10ThreadBase25destroyDataStorageIfAvailMFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase2idMFNdNiNfZm@Base 12 ++ _D4core6thread10threadbase10ThreadBase3addFNbNiCQBuQBsQBoQBfbZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase3addFNbNiPSQBvQBt7context12StackContextZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase3runMFZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase4nameMFNdNiNfAyaZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase4nameMFNdNiNfZAya@Base 12 ++ _D4core6thread10threadbase10ThreadBase5slockFNbNdNiZCQBz4sync5mutex5Mutex@Base 12 ++ _D4core6thread10threadbase10ThreadBase5yieldFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__ctorMFNaNbNiNfDFZvmZCQCiQCgQCcQBt@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__ctorMFNaNbNiNfPFZvmZCQCiQCgQCcQBt@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__ctorMFNaNbNiNfmZCQCeQCcQByQBp@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__initZ@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__vtblZ@Base 12 ++ _D4core6thread10threadbase10ThreadBase6_slockG72v@Base 12 ++ _D4core6thread10threadbase10ThreadBase6getAllFZ6resizeFNaNbNfKACQCkQCiQCeQBvmZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase6getAllFZACQBvQBtQBpQBg@Base 12 ++ _D4core6thread10threadbase10ThreadBase6removeFNbNiCQBxQBvQBrQBiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase6removeFNbNiPSQByQBw7context12StackContextZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase7__ClassZ@Base 12 ++ _D4core6thread10threadbase10ThreadBase7getThisFNbNiNfZCQCbQBzQBvQBm@Base 12 ++ _D4core6thread10threadbase10ThreadBase7opApplyFMDFKCQByQBwQBsQBjZiZ6resizeFNbNiKAQBemZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase7opApplyFMDFKCQByQBwQBsQBjZiZi@Base 12 ++ _D4core6thread10threadbase10ThreadBase7setThisFNbNiCQByQBwQBsQBjZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_cbegPSQBuQBs7context12StackContext@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_mainCQBtQBrQBnQBe@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_tbegCQBtQBrQBnQBe@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_thisCQBtQBrQBnQBe@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_tlenm@Base 12 ++ _D4core6thread10threadbase10ThreadBase8isDaemonMFNdNiNfZb@Base 12 ++ _D4core6thread10threadbase10ThreadBase8isDaemonMFNdNiNfbZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase9initLocksFNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase9isRunningMFNbNdNiZb@Base 12 ++ _D4core6thread10threadbase10ThreadBase9termLocksFNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase__T10getAllImplS_DQCcQCaQBwQBn6getAllFZ6resizeFNaNbNfKACQDoQDmQDiQCzmZvZQCrFZQx@Base 12 ++ _D4core6thread10threadbase10ThreadBase__T10getAllImplS_DQCcQCaQBwQBn7opApplyFMDFKCQDcQDaQCwQCnZiZ6resizeFNbNiKAQBemZvZQCzFNiZQp@Base 12 ++ _D4core6thread10threadbase11ThreadError6__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDcQDaQCwQCn@Base 12 ++ _D4core6thread10threadbase11ThreadError6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDcQDaQCwQCn@Base 12 ++ _D4core6thread10threadbase11ThreadError6__initZ@Base 12 ++ _D4core6thread10threadbase11ThreadError6__vtblZ@Base 12 ++ _D4core6thread10threadbase11ThreadError7__ClassZ@Base 12 ++ _D4core6thread10threadbase11__moduleRefZ@Base 12 ++ _D4core6thread10threadbase11ll_nThreadsm@Base 12 ++ _D4core6thread10threadbase11ll_pThreadsPSQBnQBl5types13ll_ThreadData@Base 12 ++ _D4core6thread10threadbase12__ModuleInfoZ@Base 12 ++ _D4core6thread10threadbase12lowlevelLockFNbNdNiZCQBv4sync5mutex5Mutex@Base 12 ++ _D4core6thread10threadbase12suspendDepthk@Base 12 ++ _D4core6thread10threadbase13onThreadErrorFNbNiAyaZ5errorCQCdQCbQBx11ThreadError@Base 12 ++ _D4core6thread10threadbase13onThreadErrorFNbNiAyaZv@Base 12 ++ _D4core6thread10threadbase15ThreadException6__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDgQDeQDaQCr@Base 12 ++ _D4core6thread10threadbase15ThreadException6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDgQDeQDaQCr@Base 12 ++ _D4core6thread10threadbase15ThreadException6__initZ@Base 12 ++ _D4core6thread10threadbase15ThreadException6__vtblZ@Base 12 ++ _D4core6thread10threadbase15ThreadException7__ClassZ@Base 12 ++ _D4core6thread10threadbase15ll_removeThreadFNbNimZv@Base 12 ++ _D4core6thread10threadbase15scanAllTypeImplFNbMDFNbEQByQBwQBs8ScanTypePvQcZvQgZv@Base 12 ++ _D4core6thread10threadbase17multiThreadedFlagb@Base 12 ++ _D4core6thread10threadbase17thread_findByAddrFmZCQBvQBtQBp10ThreadBase@Base 12 ++ _D4core6thread10threadbase18findLowLevelThreadFNbNimZb@Base 12 ++ _D4core6thread10threadbase19initLowlevelThreadsFNiZv@Base 12 ++ _D4core6thread10threadbase19termLowlevelThreadsFNiZv@Base 12 ++ _D4core6thread10threadbase25_sharedStaticDtor_L948_C1FZv@Base 12 ++ _D4core6thread10threadbase7ll_lockG72v@Base 12 ++ _D4core6thread10threadbase__T15thread_term_tplTCQBuQBs8osthread6ThreadTG177vZQBwFNiKQnZv@Base 12 ++ _D4core6thread10threadbase__T21thread_attachThis_tplTCQCaQBy8osthread6ThreadZQBwFNbZQBf@Base 12 ++ _D4core6thread11__moduleRefZ@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup3addMFCQBtQBr8osthread6ThreadZv@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6__initZ@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6__vtblZ@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6createMFDFZvZCQCbQBz8osthread6Thread@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6createMFPFZvZCQCbQBz8osthread6Thread@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6removeMFCQBwQBu8osthread6ThreadZv@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup7__ClassZ@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup7joinAllMFbZv@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup7opApplyMFMDFKCQCbQBz8osthread6ThreadZiZi@Base 12 ++ _D4core6thread11threadgroup11__moduleRefZ@Base 12 ++ _D4core6thread11threadgroup12__ModuleInfoZ@Base 12 ++ _D4core6thread12__ModuleInfoZ@Base 12 ++ _D4core6thread5fiber11__moduleRefZ@Base 12 ++ _D4core6thread5fiber12__ModuleInfoZ@Base 12 ++ _D4core6thread5fiber5Fiber10allocStackMFNbmmZv@Base 12 ++ _D4core6thread5fiber5Fiber13yieldAndThrowFNbNiC6object9ThrowableZv@Base 12 ++ _D4core6thread5fiber5Fiber19_staticCtor_L924_C9FZv@Base 12 ++ _D4core6thread5fiber5Fiber3runMFZv@Base 12 ++ _D4core6thread5fiber5Fiber4callMFEQBgQBeQBaQx7RethrowZC6object9Throwable@Base 12 ++ _D4core6thread5fiber5Fiber5resetMFNbNiDFZvZv@Base 12 ++ _D4core6thread5fiber5Fiber5resetMFNbNiPFZvZv@Base 12 ++ _D4core6thread5fiber5Fiber5resetMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber5stateMxFNaNbNdNiNfZEQBtQBrQBnQBk5State@Base 12 ++ _D4core6thread5fiber5Fiber5yieldFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber6__ctorMFNbDFZvmmZCQBrQBpQBlQBi@Base 12 ++ _D4core6thread5fiber5Fiber6__ctorMFNbPFZvmmZCQBrQBpQBlQBi@Base 12 ++ _D4core6thread5fiber5Fiber6__dtorMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber6__initZ@Base 12 ++ _D4core6thread5fiber5Fiber6__vtblZ@Base 12 ++ _D4core6thread5fiber5Fiber7__ClassZ@Base 12 ++ _D4core6thread5fiber5Fiber7getThisFNbNiNfZCQBpQBnQBjQBg@Base 12 ++ _D4core6thread5fiber5Fiber7setThisFNbNiCQBmQBkQBgQBdZv@Base 12 ++ _D4core6thread5fiber5Fiber7sm_thisCQBhQBfQBbQy@Base 12 ++ _D4core6thread5fiber5Fiber7sm_utxtSQBh3sys5posix8ucontext10ucontext_t@Base 12 ++ _D4core6thread5fiber5Fiber8callImplMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber8switchInMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber9freeStackMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber9initStackMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber9switchOutMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber__T4callVEQBiQBgQBcQz7Rethrowi0ZQBdMFNbNiZC6object9Throwable@Base 12 ++ _D4core6thread5fiber5Fiber__T4callVEQBiQBgQBcQz7Rethrowi1ZQBdMFNiZC6object9Throwable@Base 12 ++ _D4core6thread5types11__moduleRefZ@Base 12 ++ _D4core6thread5types12__ModuleInfoZ@Base 12 ++ _D4core6thread5types13ll_ThreadData6__initZ@Base 12 ++ _D4core6thread5types17PTHREAD_STACK_MINym@Base 12 ++ _D4core6thread5types24_sharedStaticCtor_L54_C1FZv@Base 12 ++ _D4core6thread5types8PAGESIZEym@Base 12 ++ _D4core6thread7context11__moduleRefZ@Base 12 ++ _D4core6thread7context12StackContext6__initZ@Base 12 ++ _D4core6thread7context12__ModuleInfoZ@Base 12 ++ _D4core6thread7context8Callable6__initZ@Base 12 ++ _D4core6thread7context8Callable6opCallMFZv@Base 12 ++ _D4core6thread7context8Callable8opAssignMFNaNbNiNfDFZvZv@Base 12 ++ _D4core6thread7context8Callable8opAssignMFNaNbNiNfPFZvZv@Base 12 ++ _D4core6thread8osthread11__moduleRefZ@Base 12 ++ _D4core6thread8osthread11getStackTopFNbNiZPv@Base 12 ++ _D4core6thread8osthread11swapContextFNbNiPvZQd@Base 12 ++ _D4core6thread8osthread12__ModuleInfoZ@Base 12 ++ _D4core6thread8osthread12attachThreadFNbNiCQBpQBn10threadbase10ThreadBaseZQBg@Base 12 ++ _D4core6thread8osthread12suspendCountSQBk3sys5posix9semaphore5sem_t@Base 12 ++ _D4core6thread8osthread12thread_yieldFNbNiZv@Base 12 ++ _D4core6thread8osthread14getStackBottomFNbNiZPv@Base 12 ++ _D4core6thread8osthread15adjustStackSizeFNbNimZm@Base 12 ++ _D4core6thread8osthread16_mainThreadStoreG177v@Base 12 ++ _D4core6thread8osthread17thread_entryPointUNbPvZ21thread_cleanupHandlerUNaNbNiQBhZv@Base 12 ++ _D4core6thread8osthread18callWithStackShellFNbMDFNbPvZvZv@Base 12 ++ _D4core6thread8osthread18joinLowLevelThreadFNbNimZv@Base 12 ++ _D4core6thread8osthread18resumeSignalNumberi@Base 12 ++ _D4core6thread8osthread19suspendSignalNumberi@Base 12 ++ _D4core6thread8osthread20createLowLevelThreadFNbNiDFNbZvkQhZ20thread_lowlevelEntryUNbPvZQd@Base 12 ++ _D4core6thread8osthread20createLowLevelThreadFNbNiDFNbZvkQhZm@Base 12 ++ _D4core6thread8osthread6Thread12PRIORITY_MAXFNaNbNdNiNeZxi@Base 12 ++ _D4core6thread8osthread6Thread12PRIORITY_MINFNaNbNdNiNeZi@Base 12 ++ _D4core6thread8osthread6Thread14loadPrioritiesFNbNiNeZSQCbQBzQBvQBp8Priority@Base 12 ++ _D4core6thread8osthread6Thread16PRIORITY_DEFAULTFNaNbNdNiNeZi@Base 12 ++ _D4core6thread8osthread6Thread3runMFZv@Base 12 ++ _D4core6thread8osthread6Thread4joinMFbZC6object9Throwable@Base 12 ++ _D4core6thread8osthread6Thread5cacheOSQBkQBiQBeQy8Priority@Base 12 ++ _D4core6thread8osthread6Thread5sleepFNbNiSQBo4time8DurationZv@Base 12 ++ _D4core6thread8osthread6Thread5startMFNbZCQBoQBmQBiQBc@Base 12 ++ _D4core6thread8osthread6Thread5yieldFNbNiZv@Base 12 ++ _D4core6thread8osthread6Thread6__ctorMFNaNbNiNfDFZvmZCQCaQByQBuQBo@Base 12 ++ _D4core6thread8osthread6Thread6__ctorMFNaNbNiNfPFZvmZCQCaQByQBuQBo@Base 12 ++ _D4core6thread8osthread6Thread6__ctorMFNaNbNiNfmZCQBwQBuQBqQBk@Base 12 ++ _D4core6thread8osthread6Thread6__dtorMFNbNiZv@Base 12 ++ _D4core6thread8osthread6Thread6__initZ@Base 12 ++ _D4core6thread8osthread6Thread6__vtblZ@Base 12 ++ _D4core6thread8osthread6Thread7__ClassZ@Base 12 ++ _D4core6thread8osthread6Thread7getThisFNbNiNfZCQBtQBrQBnQBh@Base 12 ++ _D4core6thread8osthread6Thread8Priority6__initZ@Base 12 ++ _D4core6thread8osthread6Thread8priorityMFNdZi@Base 12 ++ _D4core6thread8osthread6Thread8priorityMFNdiZv@Base 12 ++ _D4core6thread8osthread6Thread9isRunningMFNbNdNiZb@Base 12 ++ _D4core6thread8osthread6Thread__T10loadGlobalVAyaa12_5052494f524954595f4d4158ZQBtFNbNiNfZi@Base 12 ++ _D4core6thread8osthread6Thread__T10loadGlobalVAyaa12_5052494f524954595f4d494eZQBtFNbNiNfZi@Base 12 ++ _D4core6thread8osthread6Thread__T10loadGlobalVAyaa16_5052494f524954595f44454641554c54ZQCbFNbNiNfZi@Base 12 ++ _D4core6thread8osthread6resumeFNbNiCQBiQBg10threadbase10ThreadBaseZv@Base 12 ++ _D4core6thread8osthread7suspendFNbNiCQBjQBhQBd6ThreadZb@Base 12 ++ _D4core6thread8osthread8toThreadFNaNbNiNeNkMCQBrQBp10threadbase10ThreadBaseZCQCxQCvQCr6Thread@Base 12 ++ _D4core6vararg11__moduleRefZ@Base 12 ++ _D4core6vararg12__ModuleInfoZ@Base 12 ++ _D4core7runtime11__moduleRefZ@Base 12 ++ _D4core7runtime12__ModuleInfoZ@Base 12 ++ _D4core7runtime14UnitTestResult6__initZ@Base 12 ++ _D4core7runtime18runModuleUnitTestsUZ19unittestSegvHandlerUiPSQCi3sys5posix6signal9siginfo_tPvZv@Base 12 ++ _D4core7runtime19defaultTraceHandlerFPvZC6object9Throwable9TraceInfo@Base 12 ++ _D4core7runtime25_sharedStaticCtor_L119_C1FZv@Base 12 ++ _D4core7runtime5CArgs6__initZ@Base 12 ++ _D4core7runtime7Runtime10initializeFZb@Base 12 ++ _D4core7runtime7Runtime16moduleUnitTesterFNdPFZbZv@Base 12 ++ _D4core7runtime7Runtime16moduleUnitTesterFNdZPFZb@Base 12 ++ _D4core7runtime7Runtime19sm_moduleUnitTesterPFZb@Base 12 ++ _D4core7runtime7Runtime22sm_extModuleUnitTesterPFZSQBxQBv14UnitTestResult@Base 12 ++ _D4core7runtime7Runtime24extendedModuleUnitTesterFNdPFZSQCcQCa14UnitTestResultZv@Base 12 ++ _D4core7runtime7Runtime24extendedModuleUnitTesterFNdZPFZSQCdQCb14UnitTestResult@Base 12 ++ _D4core7runtime7Runtime6__initZ@Base 12 ++ _D4core7runtime7Runtime9terminateFZb@Base 12 ++ _D4core8builtins11__ctfeWriteFNaNbNiNfMAxaZv@Base 12 ++ _D4core8builtins11__moduleRefZ@Base 12 ++ _D4core8builtins12__ModuleInfoZ@Base 12 ++ _D4core8demangle11__moduleRefZ@Base 12 ++ _D4core8demangle12__ModuleInfoZ@Base 12 ++ _D4core8demangle12demangleTypeFNaNbNfAxaAaZQd@Base 12 ++ _D4core8demangle15decodeDmdStringFNaNbNfAxaKmZAya@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks10parseLNameMFNaNlNfMKSQDeQDc__T8DemangleTSQDyQDwQDqFNaNbNfNkMQDcZQDcZQBmZb@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11Replacement6__initZ@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11__xopEqualsMxFKxSQDaQCyQCsFNaNbNfNkMQCeZQCeZb@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks13encodeBackrefMFNaNbNlNfmZv@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks13flushPositionMFNaNbNlNfKSQDiQDg__T8DemangleTSQEcQEaQDuFNaNbNfNkMQDgZQDgZQBmZv@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks16positionInResultMFNaNbNiNlNfmZm@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks6__initZ@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks9__xtoHashFNbNeKxSQCzQCxQCrFNaNbNfNkMQCdZQCdZm@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks9parseTypeMFNaNjNfKSQDbQCz__T8DemangleTSQDvQDtQDnFNaNbNfNkMQCzZQCzZQBmAaZQd@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZAa@Base 12 ++ _D4core8demangle7NoHooks6__initZ@Base 12 ++ _D4core8demangleQjFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFMDFyPS6object10ModuleInfoZiZiTQBfZQByFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbMDFNbPvZvZvTQpZQBhFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiAyaMDFNbNiQkZQnbZQrTQzZQBrFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiAyakQeQgmZvTQrZQBjFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiCQBm6thread10threadbase10ThreadBaseZQBkTQBtZQCmFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiCQBm6thread10threadbase10ThreadBaseZvTQBrZQCkFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiPvZQdTQlZQBdFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiPvZvTQkZQBcFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiZPvTQjZQBbFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiZmTQiZQBaFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiZvTQiZQBaFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbPvMDFNbQhQjZvZvTQtZQBlFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbPvMDFNbQhZiZvTQrZQBjFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQEgQEe__TQDyTQDuZQEgFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQEfQEd__TQDxTQDtZQEfFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDpQDn__TQDhTQDdZQDpFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDoQDm__TQDgTQDcZQDoFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQEaQDy__TQDsTQDoZQEaFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDzQDx__TQDrTQDnZQDzFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDrQDp__TQDjTQDfZQDrFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDqQDo__TQDiTQDeZQDqFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQEuQEs__TQEmTQEiZQEuFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQEtQEr__TQElTQEhZQEtFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQEsQEq__TQEkTQEgZQEsFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQErQEp__TQEjTQEfZQErFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDlQDj__TQDdTQCzZQDlFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDkQDi__TQDcTQCyZQDkFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDkQDi__TQDcTQCyZQDkFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDjQDh__TQDbTQCxZQDjFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDjQDh__TQDbTQCxZQDjFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDiQDg__TQDaTQCwZQDiFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDiQDg__TQDaTQCwZQDiFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDhQDf__TQCzTQCvZQDhFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDiQDg__TQDaTQCwZQDiFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDhQDf__TQCzTQCvZQDhFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDuQDs__TQDmTQDiZQDuFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDtQDr__TQDlTQDhZQDtFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDrQDp__TQDjTQDfZQDrFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDqQDo__TQDiTQDeZQDqFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl10isHexDigitFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl10parseLNameMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl10parseValueMFNaNlNfMAaaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl11__xopEqualsMxFKxSQDyQDw__TQDqTQDkZQDyZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl11peekBackrefMFNaNfZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl11sliceNumberMFNaNjNfZQBs@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl12decodeNumberMFNaNlNfMQBtZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl12decodeNumberMFNaNlNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl12demangleNameMFNaNbNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl12demangleTypeMFNaNbNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl13parseFuncAttrMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl13parseModifierMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl14ParseException6__ctorMFNaNbNiNfAyaZCQErQEp__TQEjTQEdZQErQCg@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl14ParseException6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl14ParseException6__vtblZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl14ParseException7__ClassZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl15parseSymbolNameMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl16isCallConventionFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl16parseMangledNameMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl16parseMangledNameMFNaNlNfbmZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17OverflowException6__ctorMFNaNbNiNfAyaZCQEuQEs__TQEmTQEgZQEuQCj@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17OverflowException6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17OverflowException6__vtblZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17OverflowException7__ClassZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17isSymbolNameFrontMFNaNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17parseIntegerValueMFNaNlNfMAaaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17parseTemplateArgsMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17parseTypeFunctionMFNaNjNfAaEQEjQEh__TQEbTQDvZQEj10IsDelegateZQBk@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl18parseFuncArgumentsMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl18parseQualifiedNameMFNaNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl19mayBeMangledNameArgMFNaNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl19parseCallConventionMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl19parseMangledNameArgMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl25mayBeTemplateInstanceNameMFNaNlNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl25parseFunctionTypeNoReturnMFNaNjNfbZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl25parseTemplateInstanceNameMFNaNlNfbZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl3eatMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl3padMFNaNfQBgZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl3putMFNaNjNfMQBjZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl3putMFNaNjNfaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl4peekMFNaNbNiNfmZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl4testMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5emptyMFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5errorFNaNeAyaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5frontMFNaNbNdNiNfZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5matchMFNaNfQBiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5matchMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5shiftMFNaNiNfQBkZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6__ctorMFNaNbNcNiNfNkMQBsEQEfQEd__TQDxTQDrZQEf7AddTypeNkMAaZSQFoQFm__TQFgTQFaZQFo@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6__ctorMFNaNbNcNiNfNkMQBsNkMAaZSQElQEj__TQEdTQDxZQEl@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6appendMFNaNjNfQBlZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6removeMFNaNbNiNfQBnZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6silentMFNaNfDFNaNfZvZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl7isAlphaFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl7isDigitFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8containsFNaNbNiNeQBoQBrZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8overflowFNaNiNeAyaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8popFrontMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8popFrontMFNaNfiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8putAsHexMFNaNfmiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8putCommaMFNaNfmZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9__xtoHashFNbNeKxSQDxQDv__TQDpTQDjZQDxZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9ascii2hexFNaNfaZh@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9copyInputMFNaNbNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9parseRealMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9parseTypeMFNaNjNfAaZ10primitivesyG23Aa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9parseTypeMFNaNjNfAaZQd@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl__T10doDemangleSQDvQDt__TQDnTQDhZQDv16parseMangledNameZQCaMFNaNbNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl__T10doDemangleS_DQDxQDv__TQDpTQDjZQDx9parseTypeMFNaNjNfAaZQdZQChMFNaNbNjNfZQu@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl__T13decodeBackrefVii0ZQuMFNaNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl__T13decodeBackrefVmi1ZQuMFNaNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa10isHexDigitFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa10parseLNameMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa10parseValueMFNaNlNfMAaaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa11__xopEqualsMxFKxSQCnQCl__TQCfTQBzZQCnZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa11peekBackrefMFNaNfZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa11sliceNumberMFNaNjNfZAxa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa12decodeNumberMFNaNlNfMAxaZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa12decodeNumberMFNaNlNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa12demangleNameMFNaNbNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa12demangleTypeMFNaNbNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa13parseFuncAttrMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa13parseModifierMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa14ParseException6__ctorMFNaNbNiNfAyaZCQDgQDe__TQCyTQCsZQDgQCg@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa14ParseException6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa14ParseException6__vtblZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa14ParseException7__ClassZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa15parseSymbolNameMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa16isCallConventionFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa16parseMangledNameMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa16parseMangledNameMFNaNlNfbmZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17OverflowException6__ctorMFNaNbNiNfAyaZCQDjQDh__TQDbTQCvZQDjQCj@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17OverflowException6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17OverflowException6__vtblZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17OverflowException7__ClassZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17isSymbolNameFrontMFNaNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17parseIntegerValueMFNaNlNfMAaaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17parseTemplateArgsMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17parseTypeFunctionMFNaNjNfAaEQCyQCw__TQCqTQCkZQCy10IsDelegateZQBk@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa18parseFuncArgumentsMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa18parseQualifiedNameMFNaNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa19mayBeMangledNameArgMFNaNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa19parseCallConventionMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa19parseMangledNameArgMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa25mayBeTemplateInstanceNameMFNaNlNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa25parseFunctionTypeNoReturnMFNaNjNfbZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa25parseTemplateInstanceNameMFNaNlNfbZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa3eatMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa3padMFNaNfAxaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa3putMFNaNjNfMAxaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa3putMFNaNjNfaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa4peekMFNaNbNiNfmZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa4testMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5emptyMFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5errorFNaNeAyaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5frontMFNaNbNdNiNfZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5matchMFNaNfAxaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5matchMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5shiftMFNaNiNfAxaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6__ctorMFNaNbNcNiNfNkMAxaEQCuQCs__TQCmTQCgZQCu7AddTypeNkMAaZSQEdQEb__TQDvTQDpZQEd@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6__ctorMFNaNbNcNiNfNkMAxaNkMAaZSQDaQCy__TQCsTQCmZQDa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6appendMFNaNjNfAxaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6removeMFNaNbNiNfAxaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6silentMFNaNfDFNaNfZvZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa7isAlphaFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa7isDigitFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8containsFNaNbNiNeAxaQdZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8overflowFNaNiNeAyaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8popFrontMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8popFrontMFNaNfiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8putAsHexMFNaNfmiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8putCommaMFNaNfmZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9__xtoHashFNbNeKxSQCmQCk__TQCeTQByZQCmZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9ascii2hexFNaNfaZh@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9copyInputMFNaNbNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9parseRealMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9parseTypeMFNaNjNfAaZ10primitivesyG23Aa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9parseTypeMFNaNjNfAaZQd@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa__T10doDemangleSQCkQCi__TQCcTQBwZQCk16parseMangledNameZQCaMFNaNbNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa__T10doDemangleS_DQCmQCk__TQCeTQByZQCm9parseTypeMFNaNjNfAaZQdZQChMFNaNbNjNfZQu@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa__T13decodeBackrefVii0ZQuMFNaNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa__T13decodeBackrefVmi1ZQuMFNaNfZm@Base 12 ++ _D4core8internal10attributes11__moduleRefZ@Base 12 ++ _D4core8internal10attributes12__ModuleInfoZ@Base 12 ++ _D4core8internal10entrypoint11__moduleRefZ@Base 12 ++ _D4core8internal10entrypoint12__ModuleInfoZ@Base 12 ++ _D4core8internal11destruction11__moduleRefZ@Base 12 ++ _D4core8internal11destruction12__ModuleInfoZ@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTS3gcc8sections3elf9ThreadDSOZQBvFNaNbNiNfKQBqZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBx2gc11gcinterface4RootZQBsFNaNbNiNfKQBnZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBx2gc11gcinterface5RangeZQBtFNaNbNiNfKQBoZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBxQBv9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQDlFNaNbNiNfKQDgZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBxQBv9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQDnFNaNbNiNfKQDiZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBxQBv9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQDlFNaNbNiNfKQDgZv@Base 12 ++ _D4core8internal12parseoptions10parseErrorFNbNiMxAaMxQeMxQiAxaZb@Base 12 ++ _D4core8internal12parseoptions11__moduleRefZ@Base 12 ++ _D4core8internal12parseoptions12__ModuleInfoZ@Base 12 ++ _D4core8internal12parseoptions15overflowedErrorFNbNiMxAaMxQeZb@Base 12 ++ _D4core8internal12parseoptions3minFNbNimmZm@Base 12 ++ _D4core8internal12parseoptions5parseFNbNiAxaKANgaKQfQlZb@Base 12 ++ _D4core8internal12parseoptions5parseFNbNiAxaKANgaKbQkZb@Base 12 ++ _D4core8internal12parseoptions5parseFNbNiAxaKANgaKfQkZb@Base 12 ++ _D4core8internal12parseoptions6MemVal6__initZ@Base 12 ++ _D4core8internal12parseoptions8optErrorFNbNiMxAaMxQeAxaZb@Base 12 ++ _D4core8internal12parseoptions__T12parseOptionsTSQBv2gc6config6ConfigZQBlFNbNiKQBfAyaZb@Base 12 ++ _D4core8internal12parseoptions__T14rt_parseOptionTbZQtFNbNiAxaKANgaKbQkZb@Base 12 ++ _D4core8internal12parseoptions__T17initConfigOptionsTSQCa2gc6config6ConfigZQBqFNbNiKQBfAyaZb@Base 12 ++ _D4core8internal12parseoptions__T4skipX7isspaceZQpFNaNbNiNfANgaZQf@Base 12 ++ _D4core8internal12parseoptions__T5parseHThZQkFNbNiAxaKANgaKhQkbZb@Base 12 ++ _D4core8internal12parseoptions__T5parseHTkZQkFNbNiAxaKANgaKkQkbZb@Base 12 ++ _D4core8internal12parseoptions__T5parseHTmZQkFNbNiAxaKANgaKmQkbZb@Base 12 ++ _D4core8internal2gc2os10isLowOnMemFNbNimZb@Base 12 ++ _D4core8internal2gc2os10os_mem_mapFNbNimbZPv@Base 12 ++ _D4core8internal2gc2os11__moduleRefZ@Base 12 ++ _D4core8internal2gc2os12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc2os12os_mem_unmapFNbNiPvmZi@Base 12 ++ _D4core8internal2gc2os15os_physical_memFNbNiZm@Base 12 ++ _D4core8internal2gc2os8wait_pidFNbNiibZEQBmQBkQBeQBe11ChildStatus@Base 12 ++ _D4core8internal2gc4bits11__moduleRefZ@Base 12 ++ _D4core8internal2gc4bits12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc4bits6GCBits10clearWordsMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits10copyRangeZMFNbNimmPxmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits16copyWordsShiftedMFNbNimmmPxmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits18copyRangeRepeatingMFNbNimmPxmmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits3setMFNaNbNiNlNemZi@Base 12 ++ _D4core8internal2gc4bits6GCBits4DtorMFNbNibZv@Base 12 ++ _D4core8internal2gc4bits6GCBits4copyMFNbNiPSQBqQBoQBiQBiQBgZv@Base 12 ++ _D4core8internal2gc4bits6GCBits4testMxFNaNbNiNlNemZm@Base 12 ++ _D4core8internal2gc4bits6GCBits4zeroMFNbNiZv@Base 12 ++ _D4core8internal2gc4bits6GCBits5allocMFNbNimbZv@Base 12 ++ _D4core8internal2gc4bits6GCBits5clearMFNaNbNiNlNemZi@Base 12 ++ _D4core8internal2gc4bits6GCBits6__initZ@Base 12 ++ _D4core8internal2gc4bits6GCBits6nwordsMxFNaNbNdNiZm@Base 12 ++ _D4core8internal2gc4bits6GCBits6setAllMFNbNiZv@Base 12 ++ _D4core8internal2gc4bits6GCBits8clrRangeMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits8setRangeMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits8setWordsMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits9clrRangeZMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits9copyRangeMFNbNimmPxmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits9copyWordsMFNbNimmPxmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits9setLockedMFNaNbNiNlNemZm@Base 12 ++ _D4core8internal2gc4bits6GCBits9setRangeZMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10baseOffsetFNbNimEQCfQCdQBxQBxQBvQCg4BinsZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10extendTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10initializeFZCQCbQBq11gcinterface2GC@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10mallocTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10numExtendsl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10numMallocsl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw11__moduleRefZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw11calcBinBaseFZG15G256s@Base 12 ++ _D4core8internal2gc4impl12conservativeQw11numReallocsl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw11reallocTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector10initializeFNbPSQCrQCpQCjQCjQChQCs3GcxZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector10log_mallocFNbPvmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector10log_parentFNbPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector11log_collectFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector8log_freeFNbNiPvmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12maxPauseTimeSQCb4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12sentinel_addFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12sentinel_subFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw13maxPoolMemorym@Base 12 ++ _D4core8internal2gc4impl12conservativeQw13sentinel_initFNbNiPvmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw13sentinel_sizeFNbNixPvmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC10freeNoSyncMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC10removeRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11checkNoSyncMFNbPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11fullCollectMFNbZ2goFNbPSQDcQDaQCuQCuQCsQDd3GcxZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11fullCollectMFNbZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11inFinalizerMFNbNiNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11queryNoSyncMFNbPvZSQCx6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11removeRangeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12_inFinalizerb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12addrOfNoSyncMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12extendNoSyncMFNbPvmmxC8TypeInfoZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12mallocNoSyncMFNbmkKmxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12profileStatsMFNbNiNeZSQDa6memory2GC12ProfileStats@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12sizeOfNoSyncMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC13reallocNoSyncMFNbPvmKkKmxC8TypeInfoZQt@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC13reserveNoSyncMFNbmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC13runFinalizersMFNbMxAvZ2goFNbPSQDiQDgQDaQDaQCyQDj3GcxMxQBjZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC14collectNoStackMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC14getStatsNoSyncMFNbNiNeJSQDc6memory2GC5StatsZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC18fullCollectNoStackMFNbZ2goFNbPSQDjQDhQDbQDbQCzQDk3GcxZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC18fullCollectNoStackMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC4filePa@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC4freeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC4linem@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC5checkMFNbPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC5queryMFNbPvZSQCq6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC5statsMFNbNiNfZSQCs6memory2GC5Stats@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6__ctorMFZCQCnQClQCfQCfQCdQCoQBt@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6__dtorMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6__vtblZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6addrOfMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6callocMFNbmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6enableMFZ2goFNaNbNiNfPSQDaQCyQCsQCsQCqQDb3GcxZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6enableMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6extendMFNbPvmmxC8TypeInfoZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6gcLockOSQClQCj8spinlock15AlignedSpinLock@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6lockNRFNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6mallocMFNbmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6qallocMFNbmkMxC8TypeInfoZSQDd6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6sizeOfMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7__ClassZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7addRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7clrAttrMFNbPvkZ2goFNbPSQDaQCyQCsQCsQCqQDb3GcxQBikZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7clrAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7collectMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7disableMFZ2goFNaNbNiNfPSQDbQCzQCtQCtQCrQDc3GcxZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7disableMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7getAttrMFNbPvZ2goFNbPSQCzQCxQCrQCrQCpQDa3GcxQBhZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7getAttrMFNbPvZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7reallocMFNbPvmkxC8TypeInfoZQq@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7reserveMFNbmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7setAttrMFNbPvkZ2goFNbPSQDaQCyQCsQCsQCqQDb3GcxQBikZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7setAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC8minimizeMFNbZ2goFNbPSQCyQCwQCqQCqQCoQCz3GcxZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC8minimizeMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC8rootIterMFNdNiZDFMDFNbKSQDbQCq11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC9isPreciseb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC9rangeIterMFNdNiZDFMDFNbKSQDcQCr11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy10freeNoSyncMFNbNiPvZvS_DQEmQEkQEeQEeQEcQEn8freeTimelS_DQFrQFpQFjQFjQFhQFs8numFreeslTQCpZQEtMFNbNiKQDdZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy11checkNoSyncMFNbPvZvS_DQElQEjQEdQEdQEbQEm9otherTimelS_DQFrQFpQFjQFjQFhQFs9numOtherslTQCrZQEuMFNbKQDdZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy11fullCollectMFNbZ2goFNbPSQEnQElQEfQEfQEdQEo3GcxZmTQBbZQDlMFNbKQBnZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy11queryNoSyncMFNbPvZSQEi6memory8BlkInfo_S_DQFeQFcQEwQEwQEuQFf9otherTimelS_DQGkQGiQGcQGcQGaQGl9numOtherslTQDkZQFnMFNbKQDwZQDx@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy12addrOfNoSyncMFNbNiPvZQdS_DQEpQEnQEhQEhQEfQEq9otherTimelS_DQFvQFtQFnQFnQFlQFw9numOtherslTQCsZQEyMFNbNiKQDgZQDk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy12extendNoSyncMFNbPvmmxC8TypeInfoZmS_DQEzQExQErQErQEpQFa10extendTimelS_DQGhQGfQFzQFzQFxQGi10numExtendslTQDiTmTmTxQDmZQFvMFNbKQEdKmKmKxQEhZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy12mallocNoSyncMFNbmkKmxC8TypeInfoZPvS_DQFaQEyQEsQEsQEqQFb10mallocTimelS_DQGiQGgQGaQGaQFyQGj10numMallocslTmTkTmTxQDlZQFuMFNbKmKkKmKxQEeZQDx@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy12sizeOfNoSyncMFNbNiPvZmS_DQEoQEmQEgQEgQEeQEp9otherTimelS_DQFuQFsQFmQFmQFkQFv9numOtherslTQCrZQExMFNbNiKQDfZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy13reallocNoSyncMFNbPvmKkKmxC8TypeInfoZQtS_DQFeQFcQEwQEwQEuQFf10mallocTimelS_DQGmQGkQGeQGeQGcQGn10numMallocslTQDmTmTkTmTxQDpZQGcMFNbKQEjKmKkKmKxQEmZQEy@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy13reserveNoSyncMFNbmZmS_DQEmQEkQEeQEeQEcQEn9otherTimelS_DQFsQFqQFkQFkQFiQFt9numOtherslTmZQEtMFNbKmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy13runFinalizersMFNbMxAvZ2goFNbPSQEtQErQElQElQEjQEu3GcxMxQBjZvS_DQFzQFxQFrQFrQFpQGa9otherTimelS_DQHfQHdQGxQGxQGvQHg9numOtherslTQDsTxQEgZQGnMFNbKQEjKxQExZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy14getStatsNoSyncMFNbNiNeJSQEn6memory2GC5StatsZvS_DQFlQFjQFdQFdQFbQFm9otherTimelS_DQGrQGpQGjQGjQGhQGs9numOtherslTQDjZQFuMFNbNiNfKQDzZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy18fullCollectNoStackMFNbZ2goFNbPSQEuQEsQEmQEmQEkQEv3GcxZmTQBbZQDsMFNbKQBnZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy6enableMFZ2goFNaNbNiNfPSQElQEjQEdQEdQEbQEm3GcxZvS_DQFmQFkQFeQFeQFcQFn9otherTimelS_DQGsQGqQGkQGkQGiQGt9numOtherslTQDnZQFvMFNbNiNfKQEdZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy7clrAttrMFNbPvkZ2goFNbPSQElQEjQEdQEdQEbQEm3GcxQBikZkS_DQFqQFoQFiQFiQFgQFr9otherTimelS_DQGwQGuQGoQGoQGmQGx9numOtherslTQDrTQEfTkZQGfMFNbKQEjKQExKkZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy7disableMFZ2goFNaNbNiNfPSQEmQEkQEeQEeQEcQEn3GcxZvS_DQFnQFlQFfQFfQFdQFo9otherTimelS_DQGtQGrQGlQGlQGjQGu9numOtherslTQDnZQFwMFNbNiNfKQEdZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy7getAttrMFNbPvZ2goFNbPSQEkQEiQEcQEcQEaQEl3GcxQBhZkS_DQFoQFmQFgQFgQFeQFp9otherTimelS_DQGuQGsQGmQGmQGkQGv9numOtherslTQDqTQEdZQGbMFNbKQEgKQEtZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy7setAttrMFNbPvkZ2goFNbPSQElQEjQEdQEdQEbQEm3GcxQBikZkS_DQFqQFoQFiQFiQFgQFr9otherTimelS_DQGwQGuQGoQGoQGmQGx9numOtherslTQDrTQEfTkZQGfMFNbKQEjKQExKkZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy8minimizeMFNbZ2goFNbPSQEjQEhQEbQEbQDzQEk3GcxZvS_DQFkQFiQFcQFcQFaQFl9otherTimelS_DQGqQGoQGiQGiQGgQGr9numOtherslTQDnZQFtMFNbKQDzZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14SENTINEL_EXTRAxk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14baseOffsetBitsyG14G4m@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14bytesAllocatedm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14numCollectionsm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool10allocPagesMFNbmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool18setFreePageOffsetsMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool7getInfoMFNbPvZSQCt6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool7getSizeMxFNbNimZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool8getPagesMxFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool9freePagesMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool__T20mergeFreePageOffsetsVbi0Vbi1ZQBfMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool__T20mergeFreePageOffsetsVbi1Vbi1ZQBfMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool7getInfoMFNbPvZSQCt6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool7getSizeMxFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool9allocPageMFNbEQCsQCqQCkQCkQCiQCt4BinsZPSQDsQDqQDkQDkQDiQDt4List@Base 12 ++ _D4core8internal2gc4impl12conservativeQw17maxCollectionTimeSQCg4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw18initialize_preciseFZCQCjQBy11gcinterface2GC@Base 12 ++ _D4core8internal2gc4impl12conservativeQw18sentinel_InvariantFNbNixPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10initializeMFZ23atforkHandlersInstalledb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10initializeMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10removeRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10rootsApplyMFNbMDFNbKSQCnQCc11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10smallAllocMFNbmKmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11__xopEqualsMxFKxSQCjQChQCbQCbQBzQCkQBpZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11collectForkMFNbbZEQCkQCiQCc2os11ChildStatus@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11disableForkMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11fullcollectMFNbbbbZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11rangesApplyMFNbMDFNbKSQCoQCd11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11recoverPageMFNbPSQCjQChQCbQCbQBzQCk15SmallObjectPoolmEQDuQDsQDmQDmQDkQDv4BinsZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11removeRangeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx12collectRootsMFNbNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx12markParallelMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx14ScanThreadData6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx14scanBackgroundMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx15collectAllRootsMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx15fork_needs_lockb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx15recoverNextPageMFNbEQCmQCkQCeQCeQCcQCn4BinsZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx15stopScanThreadsMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx16startScanThreadsMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx17collectInProgressMxFNbNdZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx17pullFromScanStackMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx18maxParallelThreadsMFNbZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx18setNextRecoverPoolMFNbEQCpQCnQChQChQCfQCq4BinsmZPSQDqQDoQDiQDiQDgQDr15SmallObjectPool@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx19_d_gcx_atfork_childUZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx20_d_gcx_atfork_parentUZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx21_d_gcx_atfork_prepareUZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx23updateCollectThresholdsMFNbZ11smoothDecayFNaNbNiNfffZf@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx23updateCollectThresholdsMFNbZ3maxFNaNbNiNfffZf@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx23updateCollectThresholdsMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx4DtorMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx5allocMFNbmKmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx5sweepMFNbZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx6lowMemMxFNbNdZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7addRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7getInfoMFNbPvZSQCg6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7newPoolMFNbmbZPSQChQCfQBzQBzQBxQCi4Pool@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7prepareMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7reserveMFNbmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8addRangeMFNbNiPvQcxC8TypeInfoZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8bigAllocMFNbmKmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8binTableyG2049EQCgQCeQByQByQBwQCh4Bins@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8ctfeBinsFNbZG2049EQCjQChQCbQCbQBzQCk4Bins@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8findBaseMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8findPoolMFNaNbNiPvZPSQCmQCkQCeQCeQCcQCn4Pool@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8findSizeMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8instancePSQCbQBzQBtQBtQBrQCcQBh@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8isMarkedMFNbNlPvZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8markForkMFNbbbbZ13wrap_delegateUPvZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8markForkMFNbbbbZEQCiQCgQCa2os11ChildStatus@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8minimizeMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx9InvariantMxFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx9__xtoHashFNbNeKxSQCiQCgQCaQCaQByQCjQBoZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx9allocPageMFNbEQCfQCdQBxQBxQBvQCg4BinsZPSQDfQDdQCxQCxQCvQDg4List@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr3popMFNaNbNiZQs@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr4growMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr4pushMFNbNiQqZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr5clearMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr5resetMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr7opIndexMNgFNaNbNcNimZNgPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr8opAssignMFNaNbNcNiNjNeSQDkQDiQDcQDcQDaQDlQCq__TQCpTQCfZQCxZQBl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr9popLockedMFNbNiKQwZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf3popMFNaNbNiZQCh@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf4growMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf4pushMFNbNiQCfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf5clearMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf5resetMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf7opIndexMNgFNaNbNcNimZNgSQFaQEyQEsQEsQEqQFbQEg__TQCsVbi0ZQDa@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf8opAssignMFNaNbNcNiNjNeSQEzQExQErQErQEpQFaQEf__TQEeTQDuZQEmZQBl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf9popLockedMFNbNiKQClZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf3popMFNaNbNiZQCh@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf4growMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf4pushMFNbNiQCfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf5clearMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf5resetMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf7opIndexMNgFNaNbNcNimZNgSQFaQEyQEsQEsQEqQFbQEg__TQCsVbi1ZQDa@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf8opAssignMFNaNbNcNiNjNeSQEzQExQErQErQEpQFaQEf__TQEeTQDuZQEmZQBl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf9popLockedMFNbNiKQClZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11markPreciseVbi0ZQsMFNbNiNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11markPreciseVbi1ZQsMFNbNiNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T16markConservativeVbi0ZQxMFNbNiNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T16markConservativeVbi1ZQxMFNbNiNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T21pullFromScanStackImplVbi0ZQBcMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T21pullFromScanStackImplVbi1ZQBcMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi0Vbi0Vbi0ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi0ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi0Vbi0Vbi1ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi0ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi0Vbi1Vbi1ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi0ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi1Vbi0Vbi0ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi1ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi1Vbi0Vbi1ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi1ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi1Vbi1Vbi1ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi1ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T7markAllS_DQCeQCcQBwQBwQBuQCfQBk__T11markPreciseVbi0ZQsMFNbNiNlPvQcZvZQCsMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T7markAllS_DQCeQCcQBwQBwQBuQCfQBk__T11markPreciseVbi1ZQsMFNbNiNlPvQcZvZQCsMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T7markAllS_DQCeQCcQBwQBwQBuQCfQBk__T16markConservativeVbi0ZQxMFNbNiNlPvQcZvZQCxMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T7markAllS_DQCeQCcQBwQBwQBuQCfQBk__T16markConservativeVbi1ZQxMFNbNiNlPvQcZvZQCxMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T9ScanRangeVbi0ZQp6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T9ScanRangeVbi1ZQp6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3setFNaNbNiKG4mmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4List6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool10initializeMFNbmbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool12freePageBitsMFNbmKxG4mZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool15freeAllPageBitsMFNbmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool16setPointerBitmapMFNbPvmmxC8TypeInfokZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool21setPointerBitmapSmallMFNbPvmmkxC8TypeInfoZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool4DtorMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool6isFreeMxFNaNbNdNiNlNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool7ShiftBy6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool7clrBitsMFNbNimkZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool7getBitsMFNbmZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool7setBitsMFNbmkZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool8findBaseMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool8numPagesFNbNimZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool9InvariantMxFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool9pagenumOfMxFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool9slGetInfoMFNbPvZSQCj6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool9slGetSizeMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw7binbaseyG15G256s@Base 12 ++ _D4core8internal2gc4impl12conservativeQw7binsizeyG15s@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8freeTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8lockTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8markTimeSQBw4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8numFreesl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8prepTimeSQBw4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw9numOthersl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw9otherTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw9pauseTimeSQBx4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw9sweepTimeSQBx4time8Duration@Base 12 ++ _D4core8internal2gc4impl5protoQo11__moduleRefZ@Base 12 ++ _D4core8internal2gc4impl5protoQo12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC10removeRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC10rootsApplyMFMDFNbKSQChQBw11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC11inFinalizerMFNbNiNfZb@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC11rangesApplyMFMDFNbKSQCiQBx11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC11removeRangeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC12profileStatsMFNbNiNfZSQCk6memory2GC12ProfileStats@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC14collectNoStackMFNbZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC22transferRangesAndRootsMFZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC4DtorMFZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC4freeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC5queryMFNbPvZSQCa6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC5statsMFNbNiNfZSQCc6memory2GC5Stats@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6__ctorMFZCQBxQBvQBpQBpQBnQByQBl@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6__initZ@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6__vtblZ@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6addrOfMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6callocMFNbmkMxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6enableMFZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6extendMFNbPvmmMxC8TypeInfoZm@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6mallocMFNbmkMxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6qallocMFNbmkMxC8TypeInfoZSQCn6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6sizeOfMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7__ClassZ@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7addRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7clrAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7collectMFNbZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7disableMFZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7getAttrMFNbPvZk@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7reallocMFNbPvmkMxC8TypeInfoZQr@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7reserveMFNbmZm@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7setAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC8minimizeMFNbZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC8rootIterMFNdNiNjZDFMDFNbKSQCnQCc11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC9rangeIterMFNdNiNjZDFMDFNbKSQCoQCd11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl6manualQp10initializeFZCQBuQBj11gcinterface2GC@Base 12 ++ _D4core8internal2gc4impl6manualQp11__moduleRefZ@Base 12 ++ _D4core8internal2gc4impl6manualQp12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC10__aggrDtorMFZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC10removeRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC10rootsApplyMFMDFNbKSQCjQBy11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC11inFinalizerMFNbNiNfZb@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC11rangesApplyMFMDFNbKSQCkQBz11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC11removeRangeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC12profileStatsMFNbNiNfZSQCm6memory2GC12ProfileStats@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC14collectNoStackMFNbZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC4freeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC5queryMFNbPvZSQCc6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC5statsMFNbNiNfZSQCe6memory2GC5Stats@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6__ctorMFZCQBzQBxQBrQBrQBpQCaQBm@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6__dtorMFZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6__initZ@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6__vtblZ@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6addrOfMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6callocMFNbmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6enableMFZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6extendMFNbPvmmxC8TypeInfoZm@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6mallocMFNbmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6qallocMFNbmkMxC8TypeInfoZSQCp6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC6sizeOfMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC7__ClassZ@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC7addRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC7clrAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC7collectMFNbZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC7disableMFZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC7getAttrMFNbPvZk@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC7reallocMFNbPvmkxC8TypeInfoZQq@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC7reserveMFNbmZm@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC7setAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC8minimizeMFNbZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC8rootIterMFNdNiNjZDFMDFNbKSQCpQCe11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC9rangeIterMFNdNiNjZDFMDFNbKSQCqQCf11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc5proxy11__moduleRefZ@Base 12 ++ _D4core8internal2gc5proxy12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc5proxy12instanceLockOSQBnQBl8spinlock8SpinLock@Base 12 ++ _D4core8internal2gc5proxy14isInstanceInitb@Base 12 ++ _D4core8internal2gc5proxy8instanceFNbNiNeZCQBpQBe11gcinterface2GC@Base 12 ++ _D4core8internal2gc5proxy9_instanceCQBiQx11gcinterface2GC@Base 12 ++ _D4core8internal2gc5proxy9proxiedGCCQBiQx11gcinterface2GC@Base 12 ++ _D4core8internal2gc9pooltable11__moduleRefZ@Base 12 ++ _D4core8internal2gc9pooltable12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx4DtorMFNbNiZv@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx6__initZ@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx6insertMFNbNiPQCdZb@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx6lengthMxFNaNbNdNiNlNfZm@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx7maxAddrMxFNaNbNdNiNfZPxv@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx7minAddrMxFNaNbNdNiNfZPxv@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx7opIndexMNgFNaNbNcNiNjNemZNgPSQEiQEgQEaQCsQCqQEjQCf@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx7opSliceMNgFNaNbNiNjNeZANgPSQEgQEeQDyQCqQCoQEhQCd@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx7opSliceMNgFNaNbNiNjNemmZANgPSQEiQEgQEaQCsQCqQEjQCf@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx8findPoolMFNaNbNiPvZPQCk@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx8minimizeMFNaNbNiZ4swapFNaNbNiNfKPQCxKQfZv@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx8minimizeMFNaNbNiZAPQCj@Base 12 ++ _D4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx9InvariantMxFNaNbNiZv@Base 12 ++ _D4core8internal3utf10UTF8strideyAi@Base 12 ++ _D4core8internal3utf10toUCSindexFNaNbNiNfMxAwmZm@Base 12 ++ _D4core8internal3utf10toUCSindexFNaNfMxAamZm@Base 12 ++ _D4core8internal3utf10toUCSindexFNaNfMxAumZm@Base 12 ++ _D4core8internal3utf10toUTFindexFNaNbNiNfMxAumZm@Base 12 ++ _D4core8internal3utf10toUTFindexFNaNbNiNfMxAwmZm@Base 12 ++ _D4core8internal3utf10toUTFindexFNaNfMxAamZm@Base 12 ++ _D4core8internal3utf11__moduleRefZ@Base 12 ++ _D4core8internal3utf12__ModuleInfoZ@Base 12 ++ _D4core8internal3utf12isValidDcharFNaNbNiNfwZb@Base 12 ++ _D4core8internal3utf6decodeFNaNfMxAaKmZw@Base 12 ++ _D4core8internal3utf6decodeFNaNfMxAuKmZw@Base 12 ++ _D4core8internal3utf6decodeFNaNfMxAwKmZw@Base 12 ++ _D4core8internal3utf6encodeFNaNbNfKAawZv@Base 12 ++ _D4core8internal3utf6encodeFNaNbNfKAuwZv@Base 12 ++ _D4core8internal3utf6encodeFNaNbNfKAwwZv@Base 12 ++ _D4core8internal3utf6strideFNaNbNiNfMxAamZk@Base 12 ++ _D4core8internal3utf6strideFNaNbNiNfMxAumZk@Base 12 ++ _D4core8internal3utf6strideFNaNbNiNfMxAwmZk@Base 12 ++ _D4core8internal3utf6toUTF8FNaNbNfNkMAyaZQe@Base 12 ++ _D4core8internal3utf6toUTF8FNaNbNiNfNkMAawZQe@Base 12 ++ _D4core8internal3utf6toUTF8FNaNeMxAuZAya@Base 12 ++ _D4core8internal3utf6toUTF8FNaNeMxAwZAya@Base 12 ++ _D4core8internal3utf7toUTF16FNaNbNeMxAwZAyu@Base 12 ++ _D4core8internal3utf7toUTF16FNaNbNfNkMAyuZQe@Base 12 ++ _D4core8internal3utf7toUTF16FNaNbNiNfNkMAuwZQe@Base 12 ++ _D4core8internal3utf7toUTF16FNaNeMxAaZAyu@Base 12 ++ _D4core8internal3utf7toUTF32FNaNbNfNkMAywZQe@Base 12 ++ _D4core8internal3utf7toUTF32FNaNeMxAaZAyw@Base 12 ++ _D4core8internal3utf7toUTF32FNaNeMxAuZAyw@Base 12 ++ _D4core8internal3utf8toUTF16zFNaNfMxAaZPxu@Base 12 ++ _D4core8internal3utf__T8validateTAyaZQoFNaNfMxAyaZv@Base 12 ++ _D4core8internal3utf__T8validateTAyuZQoFNaNfMxAyuZv@Base 12 ++ _D4core8internal3utf__T8validateTAywZQoFNaNfMxAywZv@Base 12 ++ _D4core8internal4hash11__moduleRefZ@Base 12 ++ _D4core8internal4hash12__ModuleInfoZ@Base 12 ++ _D4core8internal4hash__T13coalesceFloatTdZQsFNaNbNiNfxdZd@Base 12 ++ _D4core8internal4hash__T13coalesceFloatTeZQsFNaNbNiNfxeZe@Base 12 ++ _D4core8internal4hash__T13coalesceFloatTfZQsFNaNbNiNfxfZf@Base 12 ++ _D4core8internal4hash__T6hashOfTAxE2rt4util7utility16__c_complex_realZQBuFNaNbNiNfQBymZm@Base 12 ++ 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_D4core8internal4hash__T6hashOfTAyaZQmFNaNbNiNfMxAyamZm@Base 12 ++ _D4core8internal4hash__T6hashOfTDFZvZQnFNaNbNiNeMxDQsmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTPvZQlFNaNbNiNeMxPvmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTPxvZQmFNaNbNiNeMxPvZm@Base 12 ++ _D4core8internal4hash__T6hashOfTS2rt4util7utility__T8_ComplexTdZQmZQBrFNaNbNiNfQBvmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTS2rt4util7utility__T8_ComplexTeZQmZQBrFNaNbNiNfQBvmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTS2rt4util7utility__T8_ComplexTfZQmZQBrFNaNbNiNfQBvmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTdZQkFNaNbNiNexdZm@Base 12 ++ _D4core8internal4hash__T6hashOfTdZQkFNaNbNiNexdmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTeZQkFNaNbNiNexeZm@Base 12 ++ _D4core8internal4hash__T6hashOfTeZQkFNaNbNiNexemZm@Base 12 ++ _D4core8internal4hash__T6hashOfTfZQkFNaNbNiNexfZm@Base 12 ++ _D4core8internal4hash__T6hashOfTfZQkFNaNbNiNexfmZm@Base 12 ++ _D4core8internal4hash__T6hashOfThZQkFNaNbNiNexhZm@Base 12 ++ _D4core8internal4hash__T6hashOfTkZQkFNaNbNiNexkZm@Base 12 ++ _D4core8internal4hash__T6hashOfTkZQkFNaNbNiNexkmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTmZQkFNaNbNiNexmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTmZQkFNaNbNiNexmmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTtZQkFNaNbNiNextZm@Base 12 ++ _D4core8internal4hash__T6hashOfTxE2rt4util7utility16__c_complex_realZQBtFNaNbNiNfKxQBymZm@Base 12 ++ _D4core8internal4hash__T6hashOfTxE2rt4util7utility17__c_complex_floatZQBuFNaNbNiNfKxQBzmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTxE2rt4util7utility18__c_complex_doubleZQBvFNaNbNiNfKxQCamZm@Base 12 ++ _D4core8internal4hash__T9bytesHashVbi0ZQpFNaNbNiNeMAxhmZm@Base 12 ++ _D4core8internal4hash__T9bytesHashVbi1ZQpFNaNbNiNeMAxhmZm@Base 12 ++ _D4core8internal4hash__T9get32bitsZQlFNaNbNiMPxhZk@Base 12 ++ _D4core8internal4util4math11__moduleRefZ@Base 12 ++ _D4core8internal4util4math12__ModuleInfoZ@Base 12 ++ _D4core8internal4util4math__T3maxTmZQhFNaNbNiNfmmZm@Base 12 ++ _D4core8internal4util4math__T3minTkZQhFNaNbNiNfkkZk@Base 12 ++ _D4core8internal4util5array10arrayToPtrFNbNexAvZm@Base 12 ++ _D4core8internal4util5array11__moduleRefZ@Base 12 ++ _D4core8internal4util5array12__ModuleInfoZ@Base 12 ++ _D4core8internal4util5array17_enforceNoOverlapFNbNfxAammxmZv@Base 12 ++ _D4core8internal4util5array18_enforceSameLengthFNbNfxAaxmxmZv@Base 12 ++ _D4core8internal4util5array21_enforceNoOverlapNogcFNbNfKxAammxmZv@Base 12 ++ _D4core8internal4util5array22_enforceSameLengthNogcFNbNfKxAaxmxmZv@Base 12 ++ _D4core8internal4util5array27enforceRawArraysConformableFNbNfxAaxmxAvxQdxbZv@Base 12 ++ _D4core8internal4util5array31enforceRawArraysConformableNogcFNbNfxAaxmxAvxQdxbZv@Base 12 ++ _D4core8internal4util5array6_storeG256a@Base 12 ++ _D4core8internal4util5array__T12errorMessageTxmTxmZQvFNbNiNeMxPaxAaxmxmZAa@Base 12 ++ _D4core8internal5abort11__moduleRefZ@Base 12 ++ _D4core8internal5abort12__ModuleInfoZ@Base 12 ++ _D4core8internal5abortQgFNbNiNfMAyaMQemZ8writeStrFNbNiNeMAAxaXv@Base 12 ++ _D4core8internal5abortQgFNbNiNfMAyaMQemZv@Base 12 ++ _D4core8internal5array10comparison11__moduleRefZ@Base 12 ++ _D4core8internal5array10comparison12__ModuleInfoZ@Base 12 ++ _D4core8internal5array10comparison__T5__cmpTaZQjFNaNbNiNeMxAaMxQeZi@Base 12 ++ _D4core8internal5array10operations10isBinaryOpFNaNbNiNfMAyaZb@Base 12 ++ _D4core8internal5array10operations11__moduleRefZ@Base 12 ++ _D4core8internal5array10operations12__ModuleInfoZ@Base 12 ++ _D4core8internal5array10operations16isBinaryAssignOpFAyaZb@Base 12 ++ _D4core8internal5array10operations8toStringFmZAya@Base 12 ++ _D4core8internal5array10operations9isUnaryOpFNaNbNiNfMAyaZb@Base 12 ++ _D4core8internal5array12construction11__moduleRefZ@Base 12 ++ _D4core8internal5array12construction12__ModuleInfoZ@Base 12 ++ _D4core8internal5array13concatenation11__moduleRefZ@Base 12 ++ _D4core8internal5array13concatenation12__ModuleInfoZ@Base 12 ++ _D4core8internal5array5utils11__moduleRefZ@Base 12 ++ _D4core8internal5array5utils11gcStatsPureFNaNbZSQBu6memory2GC5Stats@Base 12 ++ _D4core8internal5array5utils12__ModuleInfoZ@Base 12 ++ _D4core8internal5array5utils14accumulatePureFNaNbAyaiQeQgmZ12impureBypassFNbNiQBdiQBhQBkmZm@Base 12 ++ _D4core8internal5array5utils14accumulatePureFNaNbAyaiQeQgmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTACQBy6thread10threadbase10ThreadBaseS_DQDjQDhQDb8capacity__T22_d_arraysetlengthTImplHTQDiTQDlZ18_d_arraysetlengthTFNaNbNeNkMKQEvmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQMfFNaNbNeQGuiQGyNkMKQMhmZm@Base 12 ++ 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_D4core8internal5array5utils__T16_d_HookTraceImplTAaS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaTaZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAwS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaTwZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array7casting11__moduleRefZ@Base 12 ++ _D4core8internal5array7casting12__ModuleInfoZ@Base 12 ++ _D4core8internal5array8capacity11__moduleRefZ@Base 12 ++ _D4core8internal5array8capacity12__ModuleInfoZ@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTACQCi6thread10threadbase10ThreadBaseTQBkZ18_d_arraysetlengthTFNaNbNeNkMKQCumZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAaTaZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAwTwZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8equality11__moduleRefZ@Base 12 ++ _D4core8internal5array8equality12__ModuleInfoZ@Base 12 ++ _D4core8internal5array8equality__T8__equalsTPxvTQeZQrFNaNbNiNeMxAPvMxQfZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTPyS6object10ModuleInfoTQxZQBkFNaNbNiNeMxAPyQBpMxQiZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTaTaZQoFNaNbNiNeMxAaMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTdTdZQoFNaNbNiNeMxAdMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTeTeZQoFNaNbNiNeMxAeMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTfTfZQoFNaNbNiNeMxAfMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsThThZQoFNaNbNiNeMxAhMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTiTiZQoFNaNbNiNeMxAiMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTkTkZQoFNaNbNiNeMxAkMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTmTmZQoFNaNbNiNeMxAmMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTtTtZQoFNaNbNiNeMxAtMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxAyaTxQfZQtFNaNbNiNfMAxQwMQfZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxDFNbC6ObjectZvTxQqZQBeFNaNbNiNfMAxQBiMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxE2rt4util7utility16__c_complex_realTxQBlZQCaFNaNbNiNfMAxQCeMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxE2rt4util7utility17__c_complex_floatTxQBmZQCbFNaNbNiNfMAxQCfMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxE2rt4util7utility18__c_complex_doubleTxQBnZQCcFNaNbNiNfMAxQCgMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS2rt3aaA6BucketTxQrZQBfFNaNbNiNfMAxQBjMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxSQBs8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11ReplacementTxQCvZQDkFNaNbNiNfMAxQDoMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxvTxvZQqFNaNbNiNfMAxvMQeZb@Base 12 ++ _D4core8internal5array9appending11__moduleRefZ@Base 12 ++ _D4core8internal5array9appending12__ModuleInfoZ@Base 12 ++ _D4core8internal5array9appending__T19_d_arrayappendTImplHTAOaTOaZ15_d_arrayappendTFNaNbNcNeMNkKQBlMQBpZQBt@Base 12 ++ _D4core8internal5array9appending__T19_d_arrayappendTImplHTAOuTOuZ15_d_arrayappendTFNaNbNcNeMNkKQBlMQBpZQBt@Base 12 ++ _D4core8internal5array9appending__T21_d_arrayappendcTXImplHTAOaTOaZ17_d_arrayappendcTXFNaNbNcNeMNkKQBnmZQBs@Base 12 ++ _D4core8internal5array9appending__T21_d_arrayappendcTXImplHTAOuTOuZ17_d_arrayappendcTXFNaNbNcNeMNkKQBnmZQBs@Base 12 ++ _D4core8internal5qsort11__moduleRefZ@Base 12 ++ _D4core8internal5qsort12__ModuleInfoZ@Base 12 ++ _D4core8internal5qsort7_adSortUNkMAvC8TypeInfoZ3cmpUMxPvMxQeMPvZi@Base 12 ++ _D4core8internal6atomic11__moduleRefZ@Base 12 ++ _D4core8internal6atomic12__ModuleInfoZ@Base 12 ++ _D4core8internal6atomic12simpleFormatFAyaMAQfZQi@Base 12 ++ _D4core8internal6atomic5pauseFNaNbNiNeZv@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi0TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNePNgPONgSQCcQCcQBvZNgQr@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi0TmZQBmFNaNbNiNePNgmZNgm@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi2TPOS2rt8monitor_7MonitorZQCiFNaNbNiNePNgPONgSQBpQBpQBjZNgQr@Base 12 ++ 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_D4core8internal6atomic__T14atomicFetchAddVEQBqQBf11MemoryOrderi5Vbi1TkZQBuFNaNbNiNePkkZk@Base 12 ++ _D4core8internal6atomic__T14atomicFetchAddVEQBqQBf11MemoryOrderi5Vbi1TmZQBuFNaNbNiNePmmZm@Base 12 ++ _D4core8internal6atomic__T14atomicFetchSubVEQBqQBf11MemoryOrderi5Vbi1TkZQBuFNaNbNiNePkkZk@Base 12 ++ _D4core8internal6atomic__T14atomicFetchSubVEQBqQBf11MemoryOrderi5Vbi1TmZQBuFNaNbNiNePmmZm@Base 12 ++ _D4core8internal6atomic__T25atomicCompareExchangeImplVEQCbQBq11MemoryOrderi5VQxi5Vbi0ThZQCkFNaNbNiNePhQchZb@Base 12 ++ _D4core8internal6atomic__T25atomicCompareExchangeImplVEQCbQBq11MemoryOrderi5VQxi5Vbi0TmZQCkFNaNbNiNePmQcmZb@Base 12 ++ _D4core8internal6atomic__T25atomicCompareExchangeImplVEQCbQBq11MemoryOrderi5VQxi5Vbi0TtZQCkFNaNbNiNePtQctZb@Base 12 ++ _D4core8internal6atomic__T35atomicCompareExchangeStrongNoResultVEQClQCa11MemoryOrderi5VQxi5ThZQCqFNaNbNiNePhxhhZb@Base 12 ++ _D4core8internal6atomic__T35atomicCompareExchangeStrongNoResultVEQClQCa11MemoryOrderi5VQxi5TmZQCqFNaNbNiNePmxmmZb@Base 12 ++ _D4core8internal6atomic__T35atomicCompareExchangeStrongNoResultVEQClQCa11MemoryOrderi5VQxi5TtZQCqFNaNbNiNePtxttZb@Base 12 ++ _D4core8internal6moving11__moduleRefZ@Base 12 ++ _D4core8internal6moving12__ModuleInfoZ@Base 12 ++ _D4core8internal6string11__moduleRefZ@Base 12 ++ _D4core8internal6string12__ModuleInfoZ@Base 12 ++ _D4core8internal6string__T17TempStringNoAllocVhi20ZQz3getMNgFNaNbNiNjNfZANga@Base 12 ++ _D4core8internal6string__T17TempStringNoAllocVhi20ZQz6__initZ@Base 12 ++ _D4core8internal6string__T18signedToTempStringVki10ZQBaFNaNbNiNflZSQCnQClQCf__T17TempStringNoAllocVhi20ZQz@Base 12 ++ _D4core8internal6string__T20unsignedToTempStringVii10ZQBcFNaNbNiNfmNkMAaZQd@Base 12 ++ _D4core8internal6string__T20unsignedToTempStringVii16ZQBcFNaNbNiNfmNkMAaZQd@Base 12 ++ _D4core8internal6string__T20unsignedToTempStringVki10ZQBcFNaNbNiNfmNkMAaZQd@Base 12 ++ _D4core8internal6string__T20unsignedToTempStringVki10ZQBcFNaNbNiNfmZSQCpQCnQCh__T17TempStringNoAllocVhi20ZQz@Base 12 ++ _D4core8internal6string__T7dstrcmpZQjFNaNbNiNeMxAaMxQeZi@Base 12 ++ _D4core8internal6string__T9numDigitsVki10ZQqFNaNbNiNfmZi@Base 12 ++ _D4core8internal6traits11__moduleRefZ@Base 12 ++ _D4core8internal6traits12__ModuleInfoZ@Base 12 ++ _D4core8internal6traits23__InoutWorkaroundStruct6__initZ@Base 12 ++ _D4core8internal7convert10ctfe_allocFNaNbNiNemZ5allocFNaNbNfmZAh@Base 12 ++ _D4core8internal7convert10ctfe_allocFNaNbNiNemZAh@Base 12 ++ _D4core8internal7convert11__moduleRefZ@Base 12 ++ _D4core8internal7convert11shiftrRoundFNaNbNiNfmZm@Base 12 ++ _D4core8internal7convert12__ModuleInfoZ@Base 12 ++ _D4core8internal7convert5Float6__initZ@Base 12 ++ _D4core8internal7convert7binPow2FNaNbNiNfiZ10binPosPow2FNaNbNiNfiZe@Base 12 ++ _D4core8internal7convert7binPow2FNaNbNiNfiZe@Base 12 ++ _D4core8internal7convert__T20denormalizedMantissaTeZQzFNaNbNiNfekZSQCnQClQCf5Float@Base 12 ++ _D4core8internal7convert__T5parseVbi0HTeZQoFNaNbNiNfeZSQCbQBzQBt5Float@Base 12 ++ _D4core8internal7convert__T5parseVbi0HTxeZQpFNaNbNiNfxeZSQCdQCbQBv5Float@Base 12 ++ _D4core8internal7convert__T7binLog2TeZQlFNaNbNiNfxeZk@Base 12 ++ _D4core8internal7convert__T7toUbyteTPxvZQnFNaNbNiNeNkMxAPvZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTPyS6object10ModuleInfoZQBgFNaNbNiNeNkMxAPyQBoZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTaZQlFNaNbNiNeNkMxAaZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTeZQlFNaNbNiNeKxeZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteThZQlFNaNbNiNeNkMxAhZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTkZQlFNaNbNiNeKxkZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTkZQlFNaNbNiNeNkMxAkZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTmZQlFNaNbNiNeKxmZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTmZQlFNaNbNiNeNkMxAmZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTtZQlFNaNbNiNeKxtZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTtZQlFNaNbNiNeNkMxAtZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTvZQlFNaNbNiNeNkMxAvZAxh@Base 12 ++ _D4core8internal7dassert11__moduleRefZ@Base 12 ++ _D4core8internal7dassert12__ModuleInfoZ@Base 12 ++ _D4core8internal7dassert15invertCompTokenFNaNbNiNfMAyaZQe@Base 12 ++ _D4core8internal7dassert16calcFieldOverlapFMxAmZAb@Base 12 ++ _D4core8internal7dassert7combineFNaNbNiNfMxAAyaMxQfMxQkZ11formatTupleFNaNbNiNfMAaKmIQBpIbZv@Base 12 ++ _D4core8internal7dassert7combineFNaNbNiNfMxAAyaMxQfMxQkZAya@Base 12 ++ _D4core8internal7dassert9pureAllocFNaNbNiNfmZAh@Base 12 ++ _D4core8internal7dassert9pureAllocFmZ5allocFNaNbNfmZAh@Base 12 ++ _D4core8internal7dassert__T20assumeFakeAttributesTPFNaNbNfmZAhZQBkFNaNbNiNeQzZPFNaNbNiNfmZQBe@Base 12 ++ _D4core8internal7switch_11__moduleRefZ@Base 12 ++ _D4core8internal7switch_12__ModuleInfoZ@Base 12 ++ _D4core8internal7switch___T14__switchSearchTyaZQuFNaNbNiNfMxAAyaMxQfZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia5_61626f7274VxQza5_7072696e74VxQBqa6_69676e6f7265VxQCka9_646570726563617465ZQDxFNaNbNiNfMxQDxZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia5_61626f7274ZQBmFNaNbNiNfMxQBmZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia7_70726563697365VxQBda12_636f6e736572766174697665ZQCxFNaNbNiNfMxQCxZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia8_72756e2d6d61696eVxQBfa9_746573742d6f6e6c79VxQCfa12_746573742d6f722d6d61696eZQDzFNaNbNiNfMxQDzZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia8_72756e2d6d61696eZQBsFNaNbNiNfMxQBsZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_ZQvFNaNbNiNfMxQuZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa12_636f6e736572766174697665ZQBuFNaNbNiNfMxQBuZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa12_746573742d6f722d6d61696eZQBuFNaNbNiNfMxQBuZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa1_3cVxQka1_3eVxQta2_213dVxQBea2_3c3dVxQBqa2_3d3dVxQCca2_3e3dVxQCoa2_696eVxQDaa2_6973VxQDma3_21696eVxQEaa3_216973ZQFbFNaNbNiNfMxQFbZ5casesyG10Aa@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa1_3cVxQka1_3eVxQta2_213dVxQBea2_3c3dVxQBqa2_3d3dVxQCca2_3e3dVxQCoa2_696eVxQDaa2_6973VxQDma3_21696eVxQEaa3_216973ZQFbFNaNbNiNfMxQFbZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa2_6763VxQma4_666f726bVxQBba7_636c65616e7570VxQBxa7_64697361626c65VxQCta7_70726f66696c65VxQDpa8_706172616c6c656cVxQEna11_696e63506f6f6c53697a65VxQFsa11_696e697452657365727665VxQGxa11_6d6178506f6f6c53697a65VxQIca11_6d696e506f6f6c53697a65VxQJha14_6865617053697a65466163746f72ZQLfFNaNbNiNfMxQLfZ5casesyG11Aa@Base 12 ++ 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_D4core8internal8lifetime12__ModuleInfoZ@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTS3gcc8sections3elf9ThreadDSOZQByFNaNbNiNeMKQBrZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBw2gc11gcinterface4RootZQBvFNaNbNiNeMKQBoZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBw2gc11gcinterface5RangeZQBwFNaNbNiNeMKQBpZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBwQBu9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQDoFNaNbNiNeMKQDhZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBwQBu9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQDqFNaNbNiNeMKQDjZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBwQBu9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQDoFNaNbNiNeMKQDhZv@Base 12 ++ _D4core8internal8postblit11__moduleRefZ@Base 12 ++ _D4core8internal8postblit12__ModuleInfoZ@Base 12 ++ _D4core8internal8spinlock11__moduleRefZ@Base 12 ++ _D4core8internal8spinlock12__ModuleInfoZ@Base 12 ++ _D4core8internal8spinlock15AlignedSpinLock6__ctorMOFNbNcNiNeEQChQCfQBz8SpinLock10ContentionZOSQDoQDmQDgQDa@Base 12 ++ _D4core8internal8spinlock15AlignedSpinLock6__initZ@Base 12 ++ _D4core8internal8spinlock8SpinLock4lockMOFNbNiNeZv@Base 12 ++ _D4core8internal8spinlock8SpinLock5yieldMOFNbNiNemZv@Base 12 ++ _D4core8internal8spinlock8SpinLock6__ctorMOFNbNcNiNeEQBzQBxQBrQBl10ContentionZOSQDaQCyQCsQCm@Base 12 ++ _D4core8internal8spinlock8SpinLock6__initZ@Base 12 ++ _D4core8internal8spinlock8SpinLock6unlockMOFNbNiNeZv@Base 12 ++ _D4core8internal9container5array11__moduleRefZ@Base 12 ++ _D4core8internal9container5array12__ModuleInfoZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk4backMNgFNaNbNcNdNiZNgAv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk4swapMFNaNbNiNfKSQCkQCiQCcQBv__TQBsTQBpZQCaZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk5frontMNgFNaNbNcNdNiNfZNgAv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk7opIndexMNgFNaNbNcNimZNgAv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk7opSliceMNgFNaNbNiZANgAv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk7opSliceMNgFNaNbNimmZANgAv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk8opAssignMFNbNcNiNjSQCnQClQCfQBy__TQBvTQBsZQCdZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk__T10insertBackZQnMFNbNiQBdZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf4backMNgFNaNbNcNdNiZNgPSQBxQBwQBqQBp@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf4swapMFNaNbNiNfKSQDgQDeQCyQCr__TQCoTQClZQCwZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf5frontMNgFNaNbNcNdNiNfZNgPSQCaQBzQBtQBs@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf7opIndexMNgFNaNbNcNimZNgPSQBzQByQBsQBr@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf7opSliceMNgFNaNbNiZANgPSQBxQBwQBqQBp@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf7opSliceMNgFNaNbNimmZANgPSQBzQByQBsQBr@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf8opAssignMFNbNcNiNjSQDjQDhQDbQCu__TQCrTQCoZQCzZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf__T10insertBackZQnMFNbNiKQCaZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu4backMNgFNaNbNcNdNiZNgPSQFcQFaQEuQDm__TQDhTQDcTQDcZQDtQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu4swapMFNaNbNiNfKSQEvQEtQEnQEg__TQEdTQEaZQElZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu5frontMNgFNaNbNcNdNiNfZNgPSQFfQFdQExQDp__TQDkTQDfTQDfZQDwQCo@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu7opIndexMNgFNaNbNcNimZNgPSQFeQFcQEwQDo__TQDjTQDeTQDeZQDvQCn@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu7opSliceMNgFNaNbNiZANgPSQFcQFaQEuQDm__TQDhTQDcTQDcZQDtQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu7opSliceMNgFNaNbNimmZANgPSQFeQFcQEwQDo__TQDjTQDeTQDeZQDvQCn@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu8opAssignMFNbNcNiNjSQEyQEwQEqQEj__TQEgTQEdZQEoZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw4backMNgFNaNbNcNdNiZNgPSQFeQFcQEwQDo__TQDjTQDeTQDfZQDvQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw4swapMFNaNbNiNfKSQExQEvQEpQEi__TQEfTQEcZQEnZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw5frontMNgFNaNbNcNdNiNfZNgPSQFhQFfQEzQDr__TQDmTQDhTQDiZQDyQCo@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw7opIndexMNgFNaNbNcNimZNgPSQFgQFeQEyQDq__TQDlTQDgTQDhZQDxQCn@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw7opSliceMNgFNaNbNiZANgPSQFeQFcQEwQDo__TQDjTQDeTQDfZQDvQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw7opSliceMNgFNaNbNimmZANgPSQFgQFeQEyQDq__TQDlTQDgTQDhZQDxQCn@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw8opAssignMFNbNcNiNjSQFaQEyQEsQEl__TQEiTQEfZQEqZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu4backMNgFNaNbNcNdNiZNgPSQFcQFaQEuQDm__TQDhTQDcTiZQDrQCj@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu4swapMFNaNbNiNfKSQEvQEtQEnQEg__TQEdTQEaZQElZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu5frontMNgFNaNbNcNdNiNfZNgPSQFfQFdQExQDp__TQDkTQDfTiZQDuQCm@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu7opIndexMNgFNaNbNcNimZNgPSQFeQFcQEwQDo__TQDjTQDeTiZQDtQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu7opSliceMNgFNaNbNiZANgPSQFcQFaQEuQDm__TQDhTQDcTiZQDrQCj@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu7opSliceMNgFNaNbNimmZANgPSQFeQFcQEwQDo__TQDjTQDeTiZQDtQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu8opAssignMFNbNcNiNjSQEyQEwQEqQEj__TQEgTQEdZQEoZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk4backMNgFNaNbNcNdNiZNgSQCcQCbQBvQBu@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk4swapMFNaNbNiNfKSQDlQDjQDdQCw__TQCtTQCqZQDbZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk5frontMNgFNaNbNcNdNiNfZNgSQCfQCeQByQBx@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk7opIndexMNgFNaNbNcNimZNgSQCeQCdQBxQBw@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk7opSliceMNgFNaNbNiZANgSQCcQCbQBvQBu@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk7opSliceMNgFNaNbNimmZANgSQCeQCdQBxQBw@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk8opAssignMFNbNcNiNjSQDoQDmQDgQCz__TQCwTQCtZQDeZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk__T10insertBackZQnMFNbNiQCeZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh4backMNgFNaNbNcNdNiZNgSQDoQBzQBzQBp@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh4swapMFNaNbNiNfKSQDiQDgQDaQCt__TQCqTQCnZQCyZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh5frontMNgFNaNbNcNdNiNfZNgSQDrQCcQCcQBs@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh7opIndexMNgFNaNbNcNimZNgSQDqQCbQCbQBr@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh7opSliceMNgFNaNbNiZANgSQDoQBzQBzQBp@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh7opSliceMNgFNaNbNimmZANgSQDqQCbQCbQBr@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh8opAssignMFNbNcNiNjSQDlQDjQDdQCw__TQCtTQCqZQDbZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh__T10insertBackZQnMFNbNiQCbZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi4backMNgFNaNbNcNdNiZNgSQDpQCaQCaQBq@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi4swapMFNaNbNiNfKSQDjQDhQDbQCu__TQCrTQCoZQCzZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi5frontMNgFNaNbNcNdNiNfZNgSQDsQCdQCdQBt@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi7opIndexMNgFNaNbNcNimZNgSQDrQCcQCcQBs@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi7opSliceMNgFNaNbNiZANgSQDpQCaQCaQBq@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi7opSliceMNgFNaNbNimmZANgSQDrQCcQCcQBs@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi8opAssignMFNbNcNiNjSQDmQDkQDeQCx__TQCuTQCrZQDcZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi__T10insertBackZQnMFNbNiQCcZv@Base 12 ++ _D4core8internal9container5treap11__moduleRefZ@Base 12 ++ _D4core8internal9container5treap12__ModuleInfoZ@Base 12 ++ _D4core8internal9container5treap4Rand5frontMFNaNbNdNiNfZk@Base 12 ++ _D4core8internal9container5treap4Rand6__initZ@Base 12 ++ _D4core8internal9container5treap4Rand6opCallMFNaNbNiNfZk@Base 12 ++ _D4core8internal9container5treap4Rand8popFrontMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh10initializeMFNaNbNiNfmZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh13opApplyHelperFNbxPSQDmQDkQDeQCx__TQCuTQCrZQDc4NodeMDFNbKxSQEzQDkQDkQDaZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh4Node6__initZ@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6__initZ@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6insertMFNbNiPSQDgQDeQCyQCr__TQCoTQClZQCw4NodeQCxZQBl@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6insertMFNbNiQBqZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6removeFNbNiPPSQDgQDeQCyQCr__TQCoTQClZQCw4NodeQCxZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6removeMFNbNiQBqZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh7opApplyMFNbMDFNbKQBvZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh7opApplyMxFNbMDFNbKxSQDmQBxQBxQBnZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh7rotateLFNaNbNiNfPSQDkQDiQDcQCv__TQCsTQCpZQDa4NodeZQBi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh7rotateRFNaNbNiNfPSQDkQDiQDcQCv__TQCsTQCpZQDa4NodeZQBi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh8freeNodeFNbNiPSQDhQDfQCzQCs__TQCpTQCmZQCx4NodeZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh8opAssignMFNbNcNiNjSQDlQDjQDdQCw__TQCtTQCqZQDbZQBc@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh9allocNodeMFNbNiQBtZPSQDnQDlQDfQCy__TQCvTQCsZQDd4Node@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh9removeAllFNbNiPSQDiQDgQDaQCt__TQCqTQCnZQCy4NodeZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh9removeAllMFNbNiZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi10initializeMFNaNbNiNfmZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi13opApplyHelperFNbxPSQDnQDlQDfQCy__TQCvTQCsZQDd4NodeMDFNbKxSQFaQDlQDlQDbZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node11__xopEqualsMxFKxSQDqQDoQDiQDb__TQCyTQCvZQDgQByZb@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node6__initZ@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node9__xtoHashFNbNeKxSQDpQDnQDhQDa__TQCxTQCuZQDfQBxZm@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6__initZ@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6insertMFNbNiPSQDhQDfQCzQCs__TQCpTQCmZQCx4NodeQCyZQBl@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6insertMFNbNiQBrZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6removeFNbNiPPSQDhQDfQCzQCs__TQCpTQCmZQCx4NodeQCyZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6removeMFNbNiQBrZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi7opApplyMFNbMDFNbKQBwZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi7opApplyMxFNbMDFNbKxSQDnQByQByQBoZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi7rotateLFNaNbNiNfPSQDlQDjQDdQCw__TQCtTQCqZQDb4NodeZQBi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi7rotateRFNaNbNiNfPSQDlQDjQDdQCw__TQCtTQCqZQDb4NodeZQBi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi8freeNodeFNbNiPSQDiQDgQDaQCt__TQCqTQCnZQCy4NodeZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi8opAssignMFNbNcNiNjSQDmQDkQDeQCx__TQCuTQCrZQDcZQBc@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi9allocNodeMFNbNiQBuZPSQDoQDmQDgQCz__TQCwTQCtZQDe4Node@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi9removeAllFNbNiPSQDjQDhQDbQCu__TQCrTQCoZQCz4NodeZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi9removeAllMFNbNiZv@Base 12 ++ _D4core8internal9container6common11__moduleRefZ@Base 12 ++ _D4core8internal9container6common12__ModuleInfoZ@Base 12 ++ _D4core8internal9container6common7xmallocFNbNimZPv@Base 12 ++ _D4core8internal9container6common8xreallocFNbNiPvmZQe@Base 12 ++ _D4core8internal9container6common__T10initializeTAvZQqFNaNbNiNfKQpZv@Base 12 ++ _D4core8internal9container6common__T10initializeTPS3gcc8sections3elf3DSOZQBlFNaNbNiNfKQBlZv@Base 12 ++ _D4core8internal9container6common__T10initializeTPSQBxQBvQBp7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQDaFNaNbNiNfKQDaZv@Base 12 ++ _D4core8internal9container6common__T10initializeTPSQBxQBvQBp7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQDcFNaNbNiNfKQDcZv@Base 12 ++ _D4core8internal9container6common__T10initializeTPSQBxQBvQBp7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQDaFNaNbNiNfKQDaZv@Base 12 ++ _D4core8internal9container6common__T10initializeTS3gcc8sections3elf9ThreadDSOZQBqFNaNbNiNfKQBqZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBw2gc11gcinterface4RootZQBnFNaNbNiNfKQBnZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBw2gc11gcinterface5RangeZQBoFNaNbNiNfKQBoZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBwQBuQBo7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCzFNaNbNiNfKQCzZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBwQBuQBo7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQDbFNaNbNiNfKQDbZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBwQBuQBo7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCzFNaNbNiNfKQCzZv@Base 12 ++ _D4core8internal9container6common__T7destroyTAvZQmFNaNbNiNfKQpZv@Base 12 ++ _D4core8internal9container6common__T7destroyTPS3gcc8sections3elf3DSOZQBhFNaNbNiNfKQBlZv@Base 12 ++ _D4core8internal9container6common__T7destroyTPSQBtQBrQBl7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCwFNaNbNiNfKQDaZv@Base 12 ++ _D4core8internal9container6common__T7destroyTPSQBtQBrQBl7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCyFNaNbNiNfKQDcZv@Base 12 ++ _D4core8internal9container6common__T7destroyTPSQBtQBrQBl7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCwFNaNbNiNfKQDaZv@Base 12 ++ _D4core8internal9container6common__T7destroyTS3gcc8sections3elf9ThreadDSOZQBmFNaNbNiNfKQBqZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBs2gc11gcinterface4RootZQBjFNaNbNiNfKQBnZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBs2gc11gcinterface5RangeZQBkFNaNbNiNfKQBoZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBsQBqQBk7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCvFNaNbNiNfKQCzZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBsQBqQBk7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCxFNaNbNiNfKQDbZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBsQBqQBk7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCvFNaNbNiNfKQCzZv@Base 12 ++ _D4core8internal9container7hashtab11__moduleRefZ@Base 12 ++ _D4core8internal9container7hashtab12__ModuleInfoZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi10__aggrDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi13opIndexAssignMFNbNiQBtQCaZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi18ensureNotInOpApplyMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi3getMFNbNiQBmZPQBn@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node11__xopEqualsMxFKxSQDsQDqQDkQDd__TQCyTQCtTQCtZQDkQCcZb@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node9__xtoHashFNbNeKxSQDrQDpQDjQDc__TQCxTQCsTQCsZQDjQCbZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4growMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4maskMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi5resetMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6hashOfFNaNbNiNeMKxAaZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6removeMFNbNiIAaZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6shrinkMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi7opApplyMFMDFKQBqKQBqZiZi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi7opIndexMNgFNaNbNcNiQBwZNgSQByQByQBr@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi8opAssignMFNbNcNiNjSQDoQDmQDgQCz__TQCuTQCpTQCpZQDgZQBg@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi__T13opBinaryRightVAyaa2_696eZQBbMNgFNaNbNiMxAaZPNgSQCxQCxQCq@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk10__aggrDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk13opIndexAssignMFNbNiQBwQCcZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk18ensureNotInOpApplyMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk3getMFNbNiQBoZPQBq@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4Node6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4growMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4maskMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk5resetMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6hashOfFNaNbNiNeMKxPvZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6removeMFNbNiIPvZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6shrinkMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk7opApplyMFMDFKQBsKQBtZiZi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk7opIndexMNgFNaNbNcNiQByZNgPSQCbQCaQBuQBt@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk8opAssignMFNbNcNiNjSQDqQDoQDiQDb__TQCwTQCrTQCsZQDiZQBg@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk__T13opBinaryRightVAyaa2_696eZQBbMNgFNaNbNiMxPvZPNgPSQDaQCzQCtQCs@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi10__aggrDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi13opIndexAssignMFNbNiiQByZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi18ensureNotInOpApplyMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi3getMFNbNiQBmZPi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4Node6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4growMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4maskMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi5resetMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6hashOfFNaNbNiNeMKxPyQBvZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6removeMFNbNiIPyQBqZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6shrinkMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi7opApplyMFMDFKQBqKiZiZi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi7opIndexMNgFNaNbNcNiQBwZNgi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi8opAssignMFNbNcNiNjSQDoQDmQDgQCz__TQCuTQCpTiZQDeZQBe@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi__T13opBinaryRightVAyaa2_696eZQBbMNgFNaNbNiMxPyQCvZPNgi@Base 12 ++ _D4core8lifetime11__moduleRefZ@Base 12 ++ _D4core8lifetime12__ModuleInfoZ@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb4sync5mutex5MutexZQBfFNbNiAvZQBh@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb4sync5mutex5MutexZQBfFNbNiNfQBgZQBk@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb8internal2gc4impl12conservativeQw14ConservativeGCZQClFQCgZQCk@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb8internal2gc4impl6manualQp8ManualGCZQBxFQBsZQBw@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception10RangeErrorTAyaTmTnZQBsFNaNbNiNfQBvKQyKmKQxZQCh@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception11AssertErrorTAyaTQeTmZQBuFNaNbNiNfQBxKQzKQBcKmZQCk@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception11AssertErrorTAyaTmZQBrFNaNbNiNfQBuKQwKmZQCd@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception13FinalizeErrorTC8TypeInfoTC6object9ThrowableTAyaTmZQCxFNaNbNiNfQDaKQCaKQBtKQBeKmZQDs@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception15ArrayIndexErrorTmTmTAyaTmTnZQCbFNaNbNiNfQCeKmKmKQBcKmKQBcZQCw@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception15ArraySliceErrorTmTmTmTAyaTmTnZQCdFNaNbNiNfQCgKmKmKmKQBeKmKQBeZQDa@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception16OutOfMemoryErrorTbZQBsFNaNbNiNfQBvKbZQCb@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception16OutOfMemoryErrorZQBqFNaNbNiNfQBtZQBx@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception27InvalidMemoryOperationErrorZQCbFNaNbNiNfQCeZQCi@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception9ForkErrorTAyaTmTnZQBqFNaNbNiNfQBtKQyKmKQxZQCf@Base 12 ++ _D4core8volatile11__moduleRefZ@Base 12 ++ _D4core8volatile12__ModuleInfoZ@Base 12 ++ _D4core9attribute11__moduleRefZ@Base 12 ++ _D4core9attribute12__ModuleInfoZ@Base 12 ++ _D4core9attribute9gnuAbiTag11__xopEqualsMxFKxSQBsQBqQBjZb@Base 12 ++ _D4core9attribute9gnuAbiTag6__ctorMFNcAAyaXSQBqQBoQBh@Base 12 ++ _D4core9attribute9gnuAbiTag6__initZ@Base 12 ++ _D4core9attribute9gnuAbiTag9__xtoHashFNbNeKxSQBrQBpQBiZm@Base 12 ++ _D4core9exception10RangeError6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQCsQCqQCj@Base 12 ++ _D4core9exception10RangeError6__ctorMFNaNbNiNfAyamC6object9ThrowableZCQCqQCoQCh@Base 12 ++ _D4core9exception10RangeError6__initZ@Base 12 ++ _D4core9exception10RangeError6__vtblZ@Base 12 ++ _D4core9exception10RangeError7__ClassZ@Base 12 ++ _D4core9exception11AssertError6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQCtQCrQCk@Base 12 ++ _D4core9exception11AssertError6__ctorMFNaNbNiNfAyamZCQBzQBxQBq@Base 12 ++ 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_D4core9exception13FinalizeError8toStringMxFNfZAya@Base 12 ++ _D4core9exception13assertHandlerFNbNdNiNePFNbAyamQeZvZv@Base 12 ++ _D4core9exception13assertHandlerFNbNdNiNeZPFNbAyamQeZv@Base 12 ++ _D4core9exception14_assertHandlerPFNbAyamQeZv@Base 12 ++ _D4core9exception15ArrayIndexError6__ctorMFNaNbNiNfmmAyamC6object9ThrowableZCQCxQCvQCo@Base 12 ++ _D4core9exception15ArrayIndexError6__initZ@Base 12 ++ _D4core9exception15ArrayIndexError6__vtblZ@Base 12 ++ _D4core9exception15ArrayIndexError7__ClassZ@Base 12 ++ _D4core9exception15ArraySliceError6__ctorMFNaNbNiNfmmmAyamC6object9ThrowableZCQCyQCwQCp@Base 12 ++ _D4core9exception15ArraySliceError6__initZ@Base 12 ++ _D4core9exception15ArraySliceError6__vtblZ@Base 12 ++ _D4core9exception15ArraySliceError7__ClassZ@Base 12 ++ _D4core9exception16OutOfMemoryError13superToStringMFNeZAya@Base 12 ++ _D4core9exception16OutOfMemoryError6__ctorMFNaNbNiNfAyamC6object9ThrowableZCQCwQCuQCn@Base 12 ++ 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_D6object14TypeInfo_Tuple7compareMxFIPvIQdZi@Base 12 ++ _D6object14TypeInfo_Tuple7destroyMxFPvZv@Base 12 ++ _D6object14TypeInfo_Tuple7getHashMxFNbNfMxPvZm@Base 12 ++ _D6object14TypeInfo_Tuple8opEqualsMFC6ObjectZb@Base 12 ++ _D6object14TypeInfo_Tuple8postblitMxFPvZv@Base 12 ++ _D6object14TypeInfo_Tuple8toStringMxFNbNfZAya@Base 12 ++ _D6object15TypeInfo_Shared8toStringMxFNbNfZAya@Base 12 ++ _D6object15TypeInfo_Struct11StructFlags6__initZ@Base 12 ++ _D6object15TypeInfo_Struct11_memberFunc6__initZ@Base 12 ++ _D6object15TypeInfo_Struct11initializerMxFNaNbNiNfZAxv@Base 12 ++ _D6object15TypeInfo_Struct4nameMxFNbNdNeZ19demangledNamesCacheHPxvAya@Base 12 ++ _D6object15TypeInfo_Struct4nameMxFNbNdNeZAya@Base 12 ++ _D6object15TypeInfo_Struct5flagsMxFNaNbNdNiNfZk@Base 12 ++ _D6object15TypeInfo_Struct5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D6object15TypeInfo_Struct6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D6object15TypeInfo_Struct6rtInfoMxFNaNbNdNiNfZPyv@Base 12 ++ _D6object15TypeInfo_Struct6talignMxFNaNbNdNiNfZm@Base 12 ++ _D6object15TypeInfo_Struct6toHashMxFNbNfZm@Base 12 ++ _D6object15TypeInfo_Struct7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D6object15TypeInfo_Struct7destroyMxFPvZv@Base 12 ++ _D6object15TypeInfo_Struct7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D6object15TypeInfo_Struct8opEqualsMFC6ObjectZb@Base 12 ++ _D6object15TypeInfo_Struct8postblitMxFPvZv@Base 12 ++ _D6object15TypeInfo_Struct8toStringMxFNbNfZAya@Base 12 ++ _D6object15TypeInfo_Vector11initializerMxFNaNbNiNfZAxv@Base 12 ++ _D6object15TypeInfo_Vector4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D6object15TypeInfo_Vector4swapMxFPvQcZv@Base 12 ++ _D6object15TypeInfo_Vector5flagsMxFNaNbNdNiNfZk@Base 12 ++ _D6object15TypeInfo_Vector5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D6object15TypeInfo_Vector6equalsMxFIPvIQdZb@Base 12 ++ _D6object15TypeInfo_Vector6talignMxFNaNbNdNiNfZm@Base 12 ++ _D6object15TypeInfo_Vector7compareMxFIPvIQdZi@Base 12 ++ _D6object15TypeInfo_Vector7getHashMxFNbNfMxPvZm@Base 12 ++ _D6object15TypeInfo_Vector8opEqualsMFC6ObjectZb@Base 12 ++ _D6object15TypeInfo_Vector8toStringMxFNbNfZAya@Base 12 ++ _D6object16TypeInfo_Pointer11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D6object16TypeInfo_Pointer4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D6object16TypeInfo_Pointer4swapMxFPvQcZv@Base 12 ++ _D6object16TypeInfo_Pointer5flagsMxFNaNbNdNiNfZk@Base 12 ++ _D6object16TypeInfo_Pointer5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D6object16TypeInfo_Pointer6equalsMxFIPvIQdZb@Base 12 ++ _D6object16TypeInfo_Pointer7compareMxFIPvIQdZi@Base 12 ++ _D6object16TypeInfo_Pointer7getHashMxFNbNeMxPvZm@Base 12 ++ _D6object16TypeInfo_Pointer8opEqualsMFC6ObjectZb@Base 12 ++ _D6object16TypeInfo_Pointer8toStringMxFNbNfZAya@Base 12 ++ _D6object17TypeInfo_Delegate11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D6object17TypeInfo_Delegate5flagsMxFNaNbNdNiNfZk@Base 12 ++ _D6object17TypeInfo_Delegate5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D6object17TypeInfo_Delegate6equalsMxFIPvIQdZb@Base 12 ++ _D6object17TypeInfo_Delegate6rtInfoMxFNaNbNdNiNfZPyv@Base 12 ++ _D6object17TypeInfo_Delegate6talignMxFNaNbNdNiNfZm@Base 12 ++ _D6object17TypeInfo_Delegate7compareMxFIPvIQdZi@Base 12 ++ _D6object17TypeInfo_Delegate7getHashMxFNbNeMxPvZm@Base 12 ++ _D6object17TypeInfo_Delegate8opEqualsMFC6ObjectZb@Base 12 ++ _D6object17TypeInfo_Delegate8toStringMxFNaNbNeZAya@Base 12 ++ _D6object17TypeInfo_Function11initializerMxFNaNbNiNfZAxv@Base 12 ++ _D6object17TypeInfo_Function5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D6object17TypeInfo_Function6rtInfoMxFNaNbNdNiNfZPyv@Base 12 ++ _D6object17TypeInfo_Function8opEqualsMFC6ObjectZb@Base 12 ++ _D6object17TypeInfo_Function8toStringMxFNaNbNeZAya@Base 12 ++ _D6object18TypeInfo_Interface11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D6object18TypeInfo_Interface5flagsMxFNaNbNdNiNfZk@Base 12 ++ _D6object18TypeInfo_Interface5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D6object18TypeInfo_Interface6equalsMxFIPvIQdZb@Base 12 ++ _D6object18TypeInfo_Interface7compareMxFIPvIQdZi@Base 12 ++ _D6object18TypeInfo_Interface7getHashMxFNbNeMxPvZm@Base 12 ++ _D6object18TypeInfo_Interface8isBaseOfMxFNaNbNiNeMxC14TypeInfo_ClassZb@Base 12 ++ _D6object18TypeInfo_Interface8isBaseOfMxFNaNbNiNeMxCQBrZb@Base 12 ++ _D6object18TypeInfo_Interface8opEqualsMFC6ObjectZb@Base 12 ++ _D6object18TypeInfo_Interface8toStringMxFNaNbNfZAya@Base 12 ++ _D6object18TypeInfo_Invariant8toStringMxFNbNfZAya@Base 12 ++ _D6object19__cpp_type_info_ptr6__initZ@Base 12 ++ _D6object19__cpp_type_info_ptr6__vtblZ@Base 12 ++ _D6object19__cpp_type_info_ptr7__ClassZ@Base 12 ++ _D6object20TypeInfo_StaticArray11initializerMxFNaNbNiNfZAxv@Base 12 ++ _D6object20TypeInfo_StaticArray4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D6object20TypeInfo_StaticArray4swapMxFPvQcZv@Base 12 ++ _D6object20TypeInfo_StaticArray5flagsMxFNaNbNdNiNfZk@Base 12 ++ _D6object20TypeInfo_StaticArray5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D6object20TypeInfo_StaticArray6equalsMxFIPvIQdZb@Base 12 ++ _D6object20TypeInfo_StaticArray6rtInfoMxFNaNbNdNiNfZPyv@Base 12 ++ _D6object20TypeInfo_StaticArray6talignMxFNaNbNdNiNfZm@Base 12 ++ _D6object20TypeInfo_StaticArray7compareMxFIPvIQdZi@Base 12 ++ _D6object20TypeInfo_StaticArray7destroyMxFPvZv@Base 12 ++ _D6object20TypeInfo_StaticArray7getHashMxFNbNeMxPvZm@Base 12 ++ _D6object20TypeInfo_StaticArray8opEqualsMFC6ObjectZb@Base 12 ++ _D6object20TypeInfo_StaticArray8postblitMxFPvZv@Base 12 ++ _D6object20TypeInfo_StaticArray8toStringMxFNbNfZAya@Base 12 ++ _D6object25TypeInfo_AssociativeArray11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D6object25TypeInfo_AssociativeArray4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D6object25TypeInfo_AssociativeArray5flagsMxFNaNbNdNiNfZk@Base 12 ++ _D6object25TypeInfo_AssociativeArray5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D6object25TypeInfo_AssociativeArray6equalsMxFNeIPvIQdZb@Base 12 ++ _D6object25TypeInfo_AssociativeArray6talignMxFNaNbNdNiNfZm@Base 12 ++ _D6object25TypeInfo_AssociativeArray7getHashMxFNbNeMxPvZm@Base 12 ++ _D6object25TypeInfo_AssociativeArray8opEqualsMFC6ObjectZb@Base 12 ++ _D6object25TypeInfo_AssociativeArray8toStringMxFNbNfZAya@Base 12 ++ _D6object2AA6__initZ@Base 12 ++ _D6object5Error6__ctorMFNaNbNiNfAyaCQBi9ThrowableZCQBxQBt@Base 12 ++ _D6object5Error6__ctorMFNaNbNiNfAyaQdmCQBl9ThrowableZCQCaQBw@Base 12 ++ _D6object5Error6__initZ@Base 12 ++ _D6object5Error6__vtblZ@Base 12 ++ _D6object5Error7__ClassZ@Base 12 ++ _D6object6Object5opCmpMFCQqZi@Base 12 ++ _D6object6Object6toHashMFNbNeZm@Base 12 ++ _D6object6Object7Monitor11__InterfaceZ@Base 12 ++ _D6object6Object7factoryFAyaZCQv@Base 12 ++ _D6object6Object8opEqualsMFCQtZb@Base 12 ++ _D6object6Object8toStringMFZAya@Base 12 ++ _D6object7AARange6__initZ@Base 12 ++ _D6object7_xopCmpFIPvIQdZb@Base 12 ++ _D6object8TypeInfo4nextMNgFNaNbNdNiZNgCQBe@Base 12 ++ _D6object8TypeInfo4swapMxFPvQcZv@Base 12 ++ _D6object8TypeInfo5flagsMxFNaNbNdNiNfZk@Base 12 ++ _D6object8TypeInfo5offTiMxFZAxSQBd14OffsetTypeInfo@Base 12 ++ _D6object8TypeInfo5opCmpMFC6ObjectZi@Base 12 ++ _D6object8TypeInfo5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D6object8TypeInfo6equalsMxFIPvIQdZb@Base 12 ++ _D6object8TypeInfo6rtInfoMxFNaNbNdNiNfZPyv@Base 12 ++ _D6object8TypeInfo6talignMxFNaNbNdNiNfZm@Base 12 ++ _D6object8TypeInfo6toHashMxFNbNeZm@Base 12 ++ _D6object8TypeInfo7compareMxFIPvIQdZi@Base 12 ++ _D6object8TypeInfo7destroyMxFPvZv@Base 12 ++ _D6object8TypeInfo7getHashMxFNbNeMxPvZm@Base 12 ++ _D6object8TypeInfo8opEqualsMFC6ObjectZb@Base 12 ++ _D6object8TypeInfo8opEqualsMxFNbNfxCQBbZb@Base 12 ++ _D6object8TypeInfo8postblitMxFPvZv@Base 12 ++ _D6object8TypeInfo8toStringMxFNbNfZAya@Base 12 ++ _D6object9Exception6__ctorMFNaNbNiNfAyaCQBm9ThrowableQrmZCQBx@Base 12 ++ _D6object9Exception6__ctorMFNaNbNiNfAyaQdmCQBp9ThrowableZCQBx@Base 12 ++ _D6object9Interface11__xopEqualsMxFKxSQBkQBgZb@Base 12 ++ _D6object9Interface6__initZ@Base 12 ++ _D6object9Interface9__xtoHashFNbNeKxSQBjQBfZm@Base 12 ++ _D6object9Throwable13chainTogetherFNaNbNiNkMCQBrQBnNkMQkZQn@Base 12 ++ _D6object9Throwable4nextMFNaNbNdNiNlNfCQBlQBhZv@Base 12 ++ _D6object9Throwable4nextMNgFNaNbNdNiNjNfZNgCQBqQBm@Base 12 ++ _D6object9Throwable6__ctorMFNaNbNiNfAyaCQBmQBiZQi@Base 12 ++ _D6object9Throwable6__ctorMFNaNbNiNfAyaQdmCQBpQBlZQi@Base 12 ++ _D6object9Throwable6__dtorMFNbNeZv@Base 12 ++ _D6object9Throwable6__initZ@Base 12 ++ _D6object9Throwable6__vtblZ@Base 12 ++ _D6object9Throwable7__ClassZ@Base 12 ++ _D6object9Throwable7messageMxFNbNfZAxa@Base 12 ++ _D6object9Throwable7opApplyMFMDFCQBfQBbZiZi@Base 12 ++ _D6object9Throwable8refcountMFNaNbNcNiNjZk@Base 12 ++ _D6object9Throwable8toStringMFZAya@Base 12 ++ _D6object9Throwable8toStringMxFMDFIAaZvZv@Base 12 ++ _D6object9Throwable9TraceInfo11__InterfaceZ@Base 12 ++ _D6object__T10RTInfoImplVAmA2i104i2048ZQBbyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i112i11274ZQBcyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i112i3ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i112i721ZQBayG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i120i16424ZQBcyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i120i21610ZQBcyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i120i4ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i128i12ZQzyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i128i512ZQBayG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i12i1ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i152i347816ZQBdyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i168i4244ZQBbyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i16i1ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i16i2ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i16i3ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i176i3931280ZQBeyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i177i3931280ZQBeyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i204i1448ZQBbyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i216i8011774ZQBeyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i232i1448ZQBbyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i24i1ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i24i2ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i24i3ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i24i4ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i24i5ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i24i6ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i24i7ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i256i8388608ZQBeyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i272i2158144171ZQBhyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i10ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i11ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i12ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i13ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i14ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i15ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i1ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i2ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i4ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i5ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i7ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i8ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i32i9ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i40i15ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i40i18ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i40i20ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i40i22ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i40i24ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i40i2ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i40i30ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i44i12ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i48i1ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i48i24ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i48i31ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i48i32ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i48i42ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i48i44ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i48i56ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i48i59ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i48i63ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i56i10ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i56i123ZQzyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i56i21ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i56i40ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i56i64ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i56i84ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i64i10ZQyyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i64i134ZQzyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i64i9ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i72i256ZQzyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i72i4ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i72i5ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i76i424ZQzyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i80i248ZQzyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i80i2ZQxyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i80i516ZQzyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i88i1448ZQBayG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i88i424ZQzyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i8i1ZQwyG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i96i1023ZQBayG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i96i1154ZQBayG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA2i96i3496ZQBayG2m@Base 12 ++ _D6object__T10RTInfoImplVAmA3i968i268435462i0ZQBiyG3m@Base 12 ++ _D6object__T10RTInfoImplVAmA4i1064i549755827528i0i16ZQBpyG4m@Base 12 ++ _D6object__T10RTInfoImplVAmA4i1152i144107491482206208i565149010231808i0ZQCiyG4m@Base 12 ++ _D6object__T3dupTaZQhFNaNbNdNfAxaZAa@Base 12 ++ _D6object__T4_dupTaTyaZQlFNaNbNeMAaZAya@Base 12 ++ _D6object__T4_dupTxaTaZQlFNaNbNeMAxaZAa@Base 12 ++ _D6object__T4idupTaZQiFNaNbNdNfAaZAya@Base 12 ++ _D6object__T4keysHTHC4core6thread8osthread6ThreadQBdTQBhTQBlZQBxFNaNbNdNfQCcZAQCg@Base 12 ++ _D6object__T7destroyVbi1TC4core2gc11gcinterface2GCZQBnFNbQBgZv@Base 12 ++ _D6object__T7destroyVbi1TC6ObjectZQwFNbQoZv@Base 12 ++ _D6object__T7destroyVbi1TS3gcc8sections3elf9ThreadDSOZQBqFNaNbNiNfKQBqZv@Base 12 ++ _D6object__T7destroyVbi1TS4core2gc11gcinterface4RootZQBpFNaNbNiNfKQBpZv@Base 12 ++ _D6object__T7destroyVbi1TS4core2gc11gcinterface5RangeZQBqFNaNbNiNfKQBqZv@Base 12 ++ _D6object__T7destroyVbi1TS4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQDoFNaNbNiNfKQDoZv@Base 12 ++ _D6object__T7destroyVbi1TS4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQDqFNaNbNiNfKQDqZv@Base 12 ++ _D6object__T7destroyVbi1TS4core8internal9container7hashtab__T7HashTabTPySQCt10ModuleInfoTiZQBe4NodeZQDkFNaNbNiNfKQDkZv@Base 12 ++ _D6object__T7reserveTuZQlFNaNbNeKAumZm@Base 12 ++ _D6object__T8_dupCtfeTaTyaZQpFNaNbNfMAaZAya@Base 12 ++ _D6object__T8_dupCtfeTxaTaZQpFNaNbNfMAxaZAa@Base 12 ++ _D6object__T8opEqualsTC14TypeInfo_ClassTQsZQBfFNbNfQBdQBgZb@Base 12 ++ _D6object__T8opEqualsTC6ObjectTQjZQwFQpQrZb@Base 12 ++ _D6object__T8opEqualsTC8TypeInfoTxCQmZQBaFNbNfQyxQpZb@Base 12 ++ _D6object__T8opEqualsTxC14TypeInfo_ClassTxQtZQBhFNbNfxQBfxQBjZb@Base 12 ++ _D6object__T8opEqualsTxC15TypeInfo_StructTxQuZQBiFxQBcxQBgZb@Base 12 ++ _D6object__T8opEqualsTxC6ObjectTxQkZQyFxQrxQuZb@Base 12 ++ _D6object__T8opEqualsTxC8TypeInfoTxQmZQBaFNbNfxQyxQBbZb@Base 12 ++ _D6object__T8opEqualsTxCQw9ThrowableTxQpZQBdFxQxxQBaZb@Base 12 ++ _D70TypeInfo_G14PxS4core8internal2gc4impl12conservativeQw15SmallObjectPool6__initZ@Base 12 ++ _D70TypeInfo_PxS4core8internal2gc4impl12conservativeQw3Gcx14ScanThreadData6__initZ@Base 12 ++ _D70TypeInfo_xG14PS4core8internal2gc4impl12conservativeQw15SmallObjectPool6__initZ@Base 12 ++ _D70TypeInfo_xPS4core8internal2gc4impl12conservativeQw3Gcx14ScanThreadData6__initZ@Base 12 ++ _D70TypeInfo_xS4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks6__initZ@Base 12 ++ _D72TypeInfo_S4core8internal2gc4impl12conservativeQw3Gcx__T9ScanRangeVbi0ZQp6__initZ@Base 12 ++ _D72TypeInfo_S4core8internal2gc4impl12conservativeQw3Gcx__T9ScanRangeVbi1ZQp6__initZ@Base 12 ++ _D74TypeInfo_S4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr6__initZ@Base 12 ++ _D75TypeInfo_S2rt5minfo11ModuleGroup9sortCtorsMFAyaZ8findDepsMFmPmZ10stackFrame6__initZ@Base 12 ++ _D75TypeInfo_xS4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr6__initZ@Base 12 ++ _D77TypeInfo_S4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D77TypeInfo_S4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D77TypeInfo_S4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf6__initZ@Base 12 ++ _D78TypeInfo_S4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D78TypeInfo_xS4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf6__initZ@Base 12 ++ _D79TypeInfo_S4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D79TypeInfo_S4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6__initZ@Base 12 ++ _D79TypeInfo_S4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6__initZ@Base 12 ++ _D80TypeInfo_S4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D80TypeInfo_S4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6__initZ@Base 12 ++ _D80TypeInfo_S4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6__initZ@Base 12 ++ _D80TypeInfo_xS4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6__initZ@Base 12 ++ _D81TypeInfo_xS4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6__initZ@Base 12 ++ _D82TypeInfo_S4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11Replacement6__initZ@Base 12 ++ _D82TypeInfo_S4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6__initZ@Base 12 ++ _D82TypeInfo_S4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6__initZ@Base 12 ++ _D82TypeInfo_S4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6__initZ@Base 12 ++ _D83TypeInfo_AS4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11Replacement6__initZ@Base 12 ++ _D83TypeInfo_xS4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11Replacement6__initZ@Base 12 ++ _D84TypeInfo_AxS4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11Replacement6__initZ@Base 12 ++ _D84TypeInfo_S4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D84TypeInfo_S4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh4Node6__initZ@Base 12 ++ _D84TypeInfo_S4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6__initZ@Base 12 ++ _D84TypeInfo_xAS4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11Replacement6__initZ@Base 12 ++ _D85TypeInfo_S4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node6__initZ@Base 12 ++ _D86TypeInfo_S4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D86TypeInfo_S4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D86TypeInfo_xS4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node6__initZ@Base 12 ++ _D87TypeInfo_PxS4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node6__initZ@Base 12 ++ _D87TypeInfo_S4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node6__initZ@Base 12 ++ _D87TypeInfo_S4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4Node6__initZ@Base 12 ++ _D87TypeInfo_xPS4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node6__initZ@Base 12 ++ _D88TypeInfo_xS4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node6__initZ@Base 12 ++ _D89TypeInfo_PxS4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node6__initZ@Base 12 ++ _D89TypeInfo_S4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D89TypeInfo_S4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4Node6__initZ@Base 12 ++ _D89TypeInfo_xPS4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node6__initZ@Base 12 ++ _D8TypeInfo6__initZ@Base 12 ++ _D8TypeInfo6__vtblZ@Base 12 ++ _D8TypeInfo7__ClassZ@Base 12 ++ _D92TypeInfo_S4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx6__initZ@Base 12 ++ _D93TypeInfo_S4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6__initZ@Base 12 ++ _D93TypeInfo_xS4core8internal2gc9pooltable__T9PoolTableTSQBqQBoQBi4impl12conservativeQCe4PoolZQBx6__initZ@Base 12 ++ _D95TypeInfo_S3gcc8sections3elf18findDSOInfoForAddrFNbNiIPvPS4core3sys5linux4link12dl_phdr_infoZ2DG6__initZ@Base 12 ++ _D95TypeInfo_S4core6stdcpp11string_view__T17basic_string_viewTaTSQBzQBxQBt__T11char_traitsTaZQqZQCc6__initZ@Base 12 ++ _D95TypeInfo_S4core6stdcpp11string_view__T17basic_string_viewTuTSQBzQBxQBt__T11char_traitsTuZQqZQCc6__initZ@Base 12 ++ _D95TypeInfo_S4core6stdcpp11string_view__T17basic_string_viewTwTSQBzQBxQBt__T11char_traitsTwZQqZQCc6__initZ@Base 12 ++ _D95TypeInfo_S4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D9Exception6__initZ@Base 12 ++ _D9Exception6__vtblZ@Base 12 ++ _D9Exception7__ClassZ@Base 12 ++ _D9invariant11__moduleRefZ@Base 12 ++ _D9invariant12__ModuleInfoZ@Base 12 ++ _D9invariant12_d_invariantFC6ObjectZv@Base 12 ++ _DTi16_D3gcc9backtrace12LibBacktrace7opApplyMxFMDFKmKxAaZiZi@Base 12 ++ _DTi16_D3gcc9backtrace12LibBacktrace7opApplyMxFMDFKxAaZiZi@Base 12 ++ _DTi16_D3gcc9backtrace12LibBacktrace8toStringMxFZAya@Base 12 ++ _DTi16_D4core4sync5mutex5Mutex4lockMFNeZv@Base 12 ++ _DTi16_D4core4sync5mutex5Mutex6unlockMFNeZv@Base 12 ++ _DTi16_D4core4sync7rwmutex14ReadWriteMutex6Reader4lockMFNeZv@Base 12 ++ _DTi16_D4core4sync7rwmutex14ReadWriteMutex6Reader6unlockMFNeZv@Base 12 ++ _DTi16_D4core4sync7rwmutex14ReadWriteMutex6Writer4lockMFNeZv@Base 12 ++ _DTi16_D4core4sync7rwmutex14ReadWriteMutex6Writer6unlockMFNeZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC10removeRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC11inFinalizerMFNbNiNfZb@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC11removeRangeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC12profileStatsMFNbNiNeZSQDa6memory2GC12ProfileStats@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC13runFinalizersMFNbMxAvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC14collectNoStackMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC4freeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC5queryMFNbPvZSQCq6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC5statsMFNbNiNfZSQCs6memory2GC5Stats@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6addrOfMFNbNiPvZQd@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6callocMFNbmkxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6enableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6extendMFNbPvmmxC8TypeInfoZm@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6mallocMFNbmkxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6qallocMFNbmkMxC8TypeInfoZSQDd6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6sizeOfMFNbNiPvZm@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7addRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7clrAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7collectMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7disableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7getAttrMFNbPvZk@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7reallocMFNbPvmkxC8TypeInfoZQq@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7reserveMFNbmZm@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7setAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC8minimizeMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC8rootIterMFNdNiZDFMDFNbKSQDbQCq11gcinterface4RootZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC9rangeIterMFNdNiZDFMDFNbKSQDcQCr11gcinterface5RangeZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC10removeRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC11inFinalizerMFNbNiNfZb@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC11removeRangeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC12profileStatsMFNbNiNfZSQCk6memory2GC12ProfileStats@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC13runFinalizersMFNbMxAvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC14collectNoStackMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC4freeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC5queryMFNbPvZSQCa6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC5statsMFNbNiNfZSQCc6memory2GC5Stats@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6addrOfMFNbNiPvZQd@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6callocMFNbmkMxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6enableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6extendMFNbPvmmMxC8TypeInfoZm@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6mallocMFNbmkMxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6qallocMFNbmkMxC8TypeInfoZSQCn6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6sizeOfMFNbNiPvZm@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7addRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7clrAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7collectMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7disableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7getAttrMFNbPvZk@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7reallocMFNbPvmkMxC8TypeInfoZQr@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7reserveMFNbmZm@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7setAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC8minimizeMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC8rootIterMFNdNiNjZDFMDFNbKSQCnQCc11gcinterface4RootZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC9rangeIterMFNdNiNjZDFMDFNbKSQCoQCd11gcinterface5RangeZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC10removeRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC11inFinalizerMFNbNiNfZb@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC11removeRangeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC12profileStatsMFNbNiNfZSQCm6memory2GC12ProfileStats@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC13runFinalizersMFNbMxAvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC14collectNoStackMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC4freeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC5queryMFNbPvZSQCc6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC5statsMFNbNiNfZSQCe6memory2GC5Stats@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6addrOfMFNbNiPvZQd@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6callocMFNbmkxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6enableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6extendMFNbPvmmxC8TypeInfoZm@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6mallocMFNbmkxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6qallocMFNbmkMxC8TypeInfoZSQCp6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6sizeOfMFNbNiPvZm@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7addRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7clrAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7collectMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7disableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7getAttrMFNbPvZk@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7reallocMFNbPvmkxC8TypeInfoZQq@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7reserveMFNbmZm@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7setAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC8minimizeMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC8rootIterMFNdNiNjZDFMDFNbKSQCpQCe11gcinterface4RootZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC9rangeIterMFNdNiNjZDFMDFNbKSQCqQCf11gcinterface5RangeZiZi@Base 12 ++ _DTi16_D4core9exception17SuppressTraceInfo7opApplyMxFMDFKmKxAaZiZi@Base 12 ++ _DTi16_D4core9exception17SuppressTraceInfo7opApplyMxFMDFKxAaZiZi@Base 12 ++ _DTi16_D4core9exception17SuppressTraceInfo8toStringMxFZAya@Base 12 ++ _ZNKSt10bad_typeid4whatEv@Base 12 ++ _ZNKSt13bad_exception4whatEv@Base 12 ++ _ZNKSt8bad_cast4whatEv@Base 12 ++ _ZNKSt9exception4whatEv@Base 12 ++ _ZNKSt9type_info4nameEv@Base 12 ++ _ZNKSt9type_info6beforeEPKS_@Base 12 ++ _ZNSt9bad_allocC1Ev@Base 12 ++ _ZNSt9exceptionD1Ev@Base 12 ++ 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++ _D11TypeInfo_Aa6__initZ@Base 12 ++ _D11TypeInfo_Aa6__vtblZ@Base 12 ++ _D11TypeInfo_Aa7__ClassZ@Base 12 ++ _D11TypeInfo_Ab6__initZ@Base 12 ++ _D11TypeInfo_Ab6__vtblZ@Base 12 ++ _D11TypeInfo_Ab7__ClassZ@Base 12 ++ _D11TypeInfo_Ac6__initZ@Base 12 ++ _D11TypeInfo_Ac6__vtblZ@Base 12 ++ _D11TypeInfo_Ac7__ClassZ@Base 12 ++ _D11TypeInfo_Ad6__initZ@Base 12 ++ _D11TypeInfo_Ad6__vtblZ@Base 12 ++ _D11TypeInfo_Ad7__ClassZ@Base 12 ++ _D11TypeInfo_Ae6__initZ@Base 12 ++ _D11TypeInfo_Ae6__vtblZ@Base 12 ++ _D11TypeInfo_Ae7__ClassZ@Base 12 ++ _D11TypeInfo_Af6__initZ@Base 12 ++ _D11TypeInfo_Af6__vtblZ@Base 12 ++ _D11TypeInfo_Af7__ClassZ@Base 12 ++ _D11TypeInfo_Ag6__initZ@Base 12 ++ _D11TypeInfo_Ag6__vtblZ@Base 12 ++ _D11TypeInfo_Ag7__ClassZ@Base 12 ++ _D11TypeInfo_Ah6__initZ@Base 12 ++ _D11TypeInfo_Ah6__vtblZ@Base 12 ++ _D11TypeInfo_Ah7__ClassZ@Base 12 ++ _D11TypeInfo_Ai6__initZ@Base 12 ++ _D11TypeInfo_Ai6__vtblZ@Base 12 ++ _D11TypeInfo_Ai7__ClassZ@Base 12 ++ _D11TypeInfo_Aj6__initZ@Base 12 ++ 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12 ++ _D131TypeInfo_S3std3uni__T4TrieThTwVmi1114112TSQBgQBf__T9sliceBitsVmi13Vmi21ZQvTSQCoQCn__TQBiVmi6Vmi13ZQBvTSQDpQDo__TQCjVmi0Vmi6ZQCvZQEd6__initZ@Base 12 ++ _D131TypeInfo_S3std3uni__T4TrieTtTwVmi1114112TSQBgQBf__T9sliceBitsVmi13Vmi21ZQvTSQCoQCn__TQBiVmi5Vmi13ZQBvTSQDpQDo__TQCjVmi0Vmi5ZQCvZQEd6__initZ@Base 12 ++ _D131TypeInfo_S3std3uni__T4TrieTtTwVmi1114112TSQBgQBf__T9sliceBitsVmi13Vmi21ZQvTSQCoQCn__TQBiVmi6Vmi13ZQBvTSQDpQDo__TQCjVmi0Vmi6ZQCvZQEd6__initZ@Base 12 ++ _D133TypeInfo_S3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result6__initZ@Base 12 ++ _D133TypeInfo_S3std5range__T5chainTSQv3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result6__initZ@Base 12 ++ _D134TypeInfo_E3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi13parseCharTermMFZ5State6__initZ@Base 12 ++ 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_D2rt4util7utility12__ModuleInfoZ@Base 12 ++ _D2rt4util7utility__T8_ComplexTdZQm11__xopEqualsMxFKxSQCaQCaQBy__TQBtTdZQBzZb@Base 12 ++ _D2rt4util7utility__T8_ComplexTdZQm6__initZ@Base 12 ++ _D2rt4util7utility__T8_ComplexTdZQm9__xtoHashFNbNeKxSQBzQBzQBx__TQBsTdZQByZm@Base 12 ++ _D2rt4util7utility__T8_ComplexTeZQm11__xopEqualsMxFKxSQCaQCaQBy__TQBtTeZQBzZb@Base 12 ++ _D2rt4util7utility__T8_ComplexTeZQm6__initZ@Base 12 ++ _D2rt4util7utility__T8_ComplexTeZQm9__xtoHashFNbNeKxSQBzQBzQBx__TQBsTeZQByZm@Base 12 ++ _D2rt4util7utility__T8_ComplexTfZQm11__xopEqualsMxFKxSQCaQCaQBy__TQBtTfZQBzZb@Base 12 ++ _D2rt4util7utility__T8_ComplexTfZQm6__initZ@Base 12 ++ _D2rt4util7utility__T8_ComplexTfZQm9__xtoHashFNbNeKxSQBzQBzQBx__TQBsTfZQByZm@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_c8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_j8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n4swapMxFNaNbNiNfPvQcZv@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n5tsizeMxFNaNbNdNiNfZm@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n6equalsMxFNaNbNiNfIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n6rtInfoMxFNaNbNdNiNfZPyv@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n7compareMxFNaNbNiNfIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n7getHashMxFNaNbNiNfMxPvZm@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_n8toStringMxFNaNbNiNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_o8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_p8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_q8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_r8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_v5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_v7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo10TypeInfo_v8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Ac8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Aj8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Ao8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Ap8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Aq8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Ar8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Av4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo11TypeInfo_Av8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo11__moduleRefZ@Base 12 ++ _D2rt4util8typeinfo12TypeInfo_Aya8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo12__ModuleInfoZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe11initializerMxFNaNbNeZ1cyG1EQEeQEeQCrQCm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility16__c_complex_realTQBiZQCe8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf11initializerMxFNaNbNeZ1cyG1EQEfQEfQCsQCn@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility17__c_complex_floatTQBjZQCf8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg11initializerMxFNaNbNeZ1cyG1EQEgQEgQCtQCo@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTEQBnQBn7utility18__c_complex_doubleTQBkZQCg8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw11initializerMxFNaNbNeZ1cyG1a@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTaThZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTbThZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw11initializerMxFNaNbNeZ1cyG1d@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTdTdZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw11initializerMxFNaNbNeZ1cyG1e@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTeTeZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw11initializerMxFNaNbNeZ1cyG1f@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw5flagsMxFNaNbNdNiNeZk@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTfTfZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTgThZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericThThZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTiTkZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTkTkZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ 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_D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTmTmZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTsTtZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw4swapMxFNaNbNePvQcZv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw5tsizeMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6equalsMxFNaNbNeIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6rtInfoMxFNaNbNdNiNeZPyv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw6talignMxFNaNbNdNiNeZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw7getHashMxFNaNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTtTtZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw11initializerMxFNaNbNeZ1cyG1u@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTuTtZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw11initializerMxFNaNbNeZ1cyG1w@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw11initializerMxFNaNbNiNeZAxv@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw6__initZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw7compareMxFNaNbNeIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T15TypeInfoGenericTwTkZQw8toStringMxFNaNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility16__c_complex_realTQBiZQCj8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility17__c_complex_floatTQBjZQCk8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTEQBsQBs7utility18__c_complex_doubleTQBkZQCl8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTaThZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTbThZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTdTdZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTeTeZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTfTfZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTgThZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericThThZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTiTkZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTkTkZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTlTmZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTlTmZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTlTmZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTlTmZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTlTmZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTlTmZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTmTmZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTmTmZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTmTmZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTmTmZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTmTmZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTmTmZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTmTmZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTmTmZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTmTmZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTsTtZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTsTtZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTsTtZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTsTtZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTsTtZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTsTtZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb6equalsMxFIPvIQdZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb7__ClassZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb7compareMxFIPvIQdZi@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb7getHashMxFNbNeMxPvZm@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb8opEqualsMxFNbNfxC6ObjectZb@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTtTtZQBb8toStringMxFNbNfZAya@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTuTtZQBb4nextMNgFNaNbNdNiZNgC8TypeInfo@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTuTtZQBb6__initZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTuTtZQBb6__vtblZ@Base 12 ++ _D2rt4util8typeinfo__T20TypeInfoArrayGenericTuTtZQBb7__ClassZ@Base 12 ++ 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_D3std10functional__T6safeOpVAyaa1_3cZ__T8unsafeOpTmTiZQoFNaNbNiNfmiZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__T8unsafeOpTmTlZQoFNaNbNiNfmlZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__T8unsafeOpTmTyiZQpFNaNbNiNfmyiZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__T8unsafeOpTyiTmZQpFNaNbNiNfyimZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__TQuTiTmZQBbFNaNbNiNfKiKmZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__TQuTmTiZQBbFNaNbNiNfKmKiZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__TQuTmTlZQBbFNaNbNiNfKmKlZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__TQuTmTyiZQBcFNaNbNiNfKmKyiZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__TQuTmTymZQBcFNaNbNiNfKmKymZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__TQuTyiTmZQBcFNaNbNiNfKyiKmZb@Base 12 ++ _D3std10functional__T6safeOpVAyaa1_3cZ__TQuTymTmZQBcFNaNbNiNfKymKmZb@Base 12 ++ _D3std10functional__T7memoizeS_DQBe5regex__T9regexImplTAyaZQpFNfxAyaAxaZSQCtQBp8internal2ir__T5RegexTaZQjVii8ZQDlFxQByQByZ11initializedAm@Base 12 ++ _D3std10functional__T7memoizeS_DQBe5regex__T9regexImplTAyaZQpFNfxAyaAxaZSQCtQBp8internal2ir__T5RegexTaZQjVii8ZQDlFxQByQByZ4memoASQExQEw__TQEnS_DQFmQEi__TQEfTQDyZQEnQDzVii8ZQFvFxQEiQEiZ5Value@Base 12 ++ _D3std10functional__T7memoizeS_DQBe5regex__T9regexImplTAyaZQpFNfxAyaAxaZSQCtQBp8internal2ir__T5RegexTaZQjVii8ZQDlFxQByQByZ5Value11__xopEqualsMxFKxSQFpQFo__TQFfS_DQGeQFa__TQExTQEqZQFfQErVii8ZQGnFxQFaQFaZQDcZb@Base 12 ++ _D3std10functional__T7memoizeS_DQBe5regex__T9regexImplTAyaZQpFNfxAyaAxaZSQCtQBp8internal2ir__T5RegexTaZQjVii8ZQDlFxQByQByZ5Value6__initZ@Base 12 ++ _D3std10functional__T7memoizeS_DQBe5regex__T9regexImplTAyaZQpFNfxAyaAxaZSQCtQBp8internal2ir__T5RegexTaZQjVii8ZQDlFxQByQByZ5Value9__xtoHashFNbNeKxSQFoQFn__TQFeS_DQGdQEz__TQEwTQEpZQFeQEqVii8ZQGmFxQEzQEzZQDbZm@Base 12 ++ _D3std10functional__T7memoizeS_DQBe5regex__T9regexImplTAyaZQpFNfxAyaAxaZSQCtQBp8internal2ir__T5RegexTaZQjVii8ZQDlFxQByQByZQBy@Base 12 ++ _D3std10functional__T8unaryFunVAyaa11_6120213d20612e4f70656eVQBea1_61Z__TQCaTEQCy3uni__T16UnicodeSetParserTSQEc5regex8internal6parser__T6ParserTQEjTSQFrQBpQBmQBg7CodeGenZQBiZQDi8OperatorZQGkFNaNbNiNfKQEtZb@Base 12 ++ _D3std10functional__T8unaryFunVAyaa11_615b305d203e2030783830VQBea1_61Z__TQCaTxSQCz3uni17CodepointIntervalZQDhFNaNbNiNfKxQBqZb@Base 12 ++ _D3std10functional__T8unaryFunVAyaa12_61203d3d20612e556e696f6eVQBga1_61Z__TQCcTEQDa3uni__T16UnicodeSetParserTSQEe5regex8internal6parser__T6ParserTQElTSQFtQBpQBmQBg7CodeGenZQBiZQDi8OperatorZQGmFNaNbNiNfKQEtZb@Base 12 ++ _D3std10functional__T8unaryFunVAyaa4_615b305dVQpa1_61Z__TQBkTSQCi3uni17CodepointIntervalZQCqFNaNbNiNfQBoZk@Base 12 ++ _D3std10functional__T8unaryFunVAyaa4_615b315dVQpa1_61Z__TQBkTSQCi3uni17CodepointIntervalZQCqFNaNbNiNfQBoZk@Base 12 ++ _D3std10functional__T8unaryFunVAyaa5_612e726873VQra1_61Z__TQBmTySQCl8internal14unicode_tables9CompEntryZQDfFNaNbNiNfKyQCcZyw@Base 12 ++ _D3std10functional__T8unaryFunVAyaa6_6120213d2030VQta1_61Z__TQBoTkZQBuFNaNbNiNfKkZb@Base 12 ++ _D3std10functional__T8unaryFunVAyaa6_6120213d2030VQta1_61Z__TQBoTxkZQBvFNaNbNiNfKxkZb@Base 12 ++ _D3std10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61Z__TQBoTySQCn8internal14unicode_tables15UnicodePropertyZQDoFNaNbNiNfKyQCjZyAa@Base 12 ++ _D3std10functional__T9binaryFunVAyaa11_62203c20612e74696d6554VQBea1_61VQBna1_62Z__TQCkTySQDj8datetime8timezone13PosixTimeZone10LeapSecondTylZQEqFNaNbNiNfKyQCpKylZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa11_62203c20612e74696d6554VQBea1_61VQBna1_62Z__TQCkTySQDj8datetime8timezone13PosixTimeZone10TransitionTlZQEpFNaNbNiNfKyQCoKlZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa11_62203c20612e74696d6554VQBea1_61VQBna1_62Z__TQCkTySQDj8datetime8timezone13PosixTimeZone10TransitionTylZQEqFNaNbNiNfKyQCpKylZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa15_612e6e616d65203c20622e6e616d65VQBma1_61VQBva1_62Z__TQCsTSQDq5regex8internal2ir10NamedGroupTQBjZQEjFNaNbNiNfKQCaKQCeZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa17_612e74696d6554203c20622e74696d6554VQBqa1_61VQBza1_62Z__TQCwTSQDu8datetime8timezone13PosixTimeZone10LeapSecondTQByZQFcFNaNbNiNfKQCpKQCtZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa17_612e74696d6554203c20622e74696d6554VQBqa1_61VQBza1_62Z__TQCwTSQDu8datetime8timezone13PosixTimeZone14TempTransitionTQCcZQFgFNaNbNiNfKQCtKQCxZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa5_61202b2062VQra1_61VQza1_62Z__TQBvTkTkZQCdFNaNbNiNfKkKkZk@Base 12 ++ _D3std10functional__T9binaryFunVAyaa5_61203c2062VQra1_61VQza1_62Z__TQBvTQBoTQBsZQChFNaNbNiNfKQCjKQCnZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa5_61203c2062VQra1_61VQza1_62Z__TQBvTkTiZQCdFNaNbNiNfKkKiZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa5_61203c2062VQra1_61VQza1_62Z__TQBvTywTwZQCeFNaNbNiNfKywKwZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203c3d2062VQta1_61VQBba1_62Z__TQByTkTkZQCgFNaNbNiNfKkKkZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203c3d2062VQta1_61VQBba1_62Z__TQByTkTyiZQChFNaNbNiNfKkKyiZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203c3d2062VQta1_61VQBba1_62Z__TQByTxkTkZQChFNaNbNiNfKxkKkZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTQBrTQBvZQCkFNaNbNiNfKQCmKQCqZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTSQCw3uni__T13InversionListTSQDxQBb8GcPolicyZQBhTQBwZQEcFNaNbNiNfKQCnKQCrZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTaTaZQCgFNaNbNiNfaaZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByThThZQCgFNaNbNiNfKhKhZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTkTkZQCgFNaNbNiNfKkKkZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTwTaZQCgFNaNbNiNfKwKaZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTyAaTQBvZQCkFNaNbNiNfKyQvKQCqZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTyaTaZQChFNaNbNiNfKyaKaZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTyaTwZQChFNaNbNiNfKyawZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTyaTyaZQCiFNaNbNiNfKyaKyaZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTyhTwZQChFNaNbNiNfKyhKwZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTyhTwZQChFNaNbNiNfKyhwZb@Base 12 ++ _D3std10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62Z__TQByTyhTxhZQCiFNaNbNiNfKyhKxhZb@Base 12 ++ _D3std11__moduleRefZ@Base 12 ++ _D3std11concurrency10MessageBox10setMaxMsgsMFNaNiNfmPFSQCbQCa3TidZbZv@Base 12 ++ _D3std11concurrency10MessageBox12isControlMsgMFNaNbNiNfKSQCdQCc7MessageZb@Base 12 ++ _D3std11concurrency10MessageBox13isLinkDeadMsgMFNaNbNiNfKSQCeQCd7MessageZb@Base 12 ++ _D3std11concurrency10MessageBox13isPriorityMsgMFNaNbNiNfKSQCeQCd7MessageZb@Base 12 ++ _D3std11concurrency10MessageBox14updateMsgCountMFNaNbNiNfZv@Base 12 ++ _D3std11concurrency10MessageBox3putMFKSQBlQBk7MessageZv@Base 12 ++ _D3std11concurrency10MessageBox5closeMFZ13onLinkDeadMsgFKSQCeQCd7MessageZv@Base 12 ++ _D3std11concurrency10MessageBox5closeMFZ5sweepFKSQBvQBu__T4ListTSQClQCk7MessageZQwZv@Base 12 ++ _D3std11concurrency10MessageBox5closeMFZv@Base 12 ++ _D3std11concurrency10MessageBox6__ctorMFNbNeZCQBsQBrQBh@Base 12 ++ _D3std11concurrency10MessageBox6__initZ@Base 12 ++ _D3std11concurrency10MessageBox6__vtblZ@Base 12 ++ _D3std11concurrency10MessageBox7__ClassZ@Base 12 ++ _D3std11concurrency10MessageBox8isClosedMFNaNdNiNfZb@Base 12 ++ _D3std11concurrency10MessageBox8mboxFullMFNaNbNiNfZb@Base 12 ++ _D3std11concurrency10ThreadInfo11__xopEqualsMxFKxSQBwQBvQBlZb@Base 12 ++ _D3std11concurrency10ThreadInfo6__initZ@Base 12 ++ _D3std11concurrency10ThreadInfo7cleanupMFZv@Base 12 ++ _D3std11concurrency10ThreadInfo8thisInfoFNbNcNdNiNfZSQBzQByQBo@Base 12 ++ _D3std11concurrency10ThreadInfo8thisInfoFNbNcNdZ3valSQBzQByQBo@Base 12 ++ _D3std11concurrency10ThreadInfo9__xtoHashFNbNeKxSQBvQBuQBkZm@Base 12 ++ _D3std11concurrency10namesByTidHSQBfQBe3TidAAya@Base 12 ++ _D3std11concurrency10unregisterFAyaZb@Base 12 ++ _D3std11concurrency11IsGenerator11__InterfaceZ@Base 12 ++ _D3std11concurrency11MailboxFull6__ctorMFNaNbNiNfSQBwQBv3TidAyaZCQClQCkQCa@Base 12 ++ _D3std11concurrency11MailboxFull6__initZ@Base 12 ++ _D3std11concurrency11MailboxFull6__vtblZ@Base 12 ++ _D3std11concurrency11MailboxFull7__ClassZ@Base 12 ++ _D3std11concurrency11__moduleRefZ@Base 12 ++ _D3std11concurrency12__ModuleInfoZ@Base 12 ++ _D3std11concurrency12initOnceLockFNdZ4lockOC4core4sync5mutex5Mutex@Base 12 ++ _D3std11concurrency12initOnceLockFNdZOC4core4sync5mutex5Mutex@Base 12 ++ _D3std11concurrency12registryLockFNdZ4implC4core4sync5mutex5Mutex@Base 12 ++ _D3std11concurrency12registryLockFNdZC4core4sync5mutex5Mutex@Base 12 ++ _D3std11concurrency12unregisterMeFKSQBiQBh10ThreadInfoZv@Base 12 ++ _D3std11concurrency14FiberScheduler12newConditionMFNbC4core4sync5mutex5MutexZCQyQv9condition9Condition@Base 12 ++ _D3std11concurrency14FiberScheduler14FiberCondition13switchContextMFNbZv@Base 12 ++ _D3std11concurrency14FiberScheduler14FiberCondition4waitMFNbS4core4time8DurationZb@Base 12 ++ _D3std11concurrency14FiberScheduler14FiberCondition4waitMFNbZv@Base 12 ++ _D3std11concurrency14FiberScheduler14FiberCondition6__ctorMFNbC4core4sync5mutex5MutexZCQDhQDgQCwQCj@Base 12 ++ _D3std11concurrency14FiberScheduler14FiberCondition6__initZ@Base 12 ++ _D3std11concurrency14FiberScheduler14FiberCondition6__vtblZ@Base 12 ++ _D3std11concurrency14FiberScheduler14FiberCondition6notifyMFNbZv@Base 12 ++ _D3std11concurrency14FiberScheduler14FiberCondition7__ClassZ@Base 12 ++ _D3std11concurrency14FiberScheduler14FiberCondition9notifyAllMFNbZv@Base 12 ++ _D3std11concurrency14FiberScheduler5spawnMFNbDFZvZv@Base 12 ++ _D3std11concurrency14FiberScheduler5startMFDFZvZv@Base 12 ++ _D3std11concurrency14FiberScheduler5yieldMFNbZv@Base 12 ++ _D3std11concurrency14FiberScheduler6__initZ@Base 12 ++ _D3std11concurrency14FiberScheduler6__vtblZ@Base 12 ++ _D3std11concurrency14FiberScheduler6createMFNbDFZvZv@Base 12 ++ _D3std11concurrency14FiberScheduler7__ClassZ@Base 12 ++ _D3std11concurrency14FiberScheduler8dispatchMFZv@Base 12 ++ _D3std11concurrency14FiberScheduler8thisInfoMFNbNcNdZSQCaQBz10ThreadInfo@Base 12 ++ _D3std11concurrency14FiberScheduler9InfoFiber6__ctorMFNbDFZvZCQCiQChQBxQBk@Base 12 ++ _D3std11concurrency14FiberScheduler9InfoFiber6__ctorMFNbDFZvmZCQCjQCiQByQBl@Base 12 ++ _D3std11concurrency14FiberScheduler9InfoFiber6__initZ@Base 12 ++ _D3std11concurrency14FiberScheduler9InfoFiber6__vtblZ@Base 12 ++ _D3std11concurrency14FiberScheduler9InfoFiber7__ClassZ@Base 12 ++ _D3std11concurrency14LinkTerminated6__ctorMFNaNbNiNfSQBzQBy3TidAyaZCQCoQCnQCd@Base 12 ++ _D3std11concurrency14LinkTerminated6__initZ@Base 12 ++ _D3std11concurrency14LinkTerminated6__vtblZ@Base 12 ++ _D3std11concurrency14LinkTerminated7__ClassZ@Base 12 ++ _D3std11concurrency15MessageMismatch6__ctorMFNaNbNiNfAyaZCQCeQCdQBt@Base 12 ++ _D3std11concurrency15MessageMismatch6__initZ@Base 12 ++ _D3std11concurrency15MessageMismatch6__vtblZ@Base 12 ++ _D3std11concurrency15MessageMismatch7__ClassZ@Base 12 ++ _D3std11concurrency15OwnerTerminated6__ctorMFNaNbNiNfSQCaQBz3TidAyaZCQCpQCoQCe@Base 12 ++ _D3std11concurrency15OwnerTerminated6__initZ@Base 12 ++ _D3std11concurrency15OwnerTerminated6__vtblZ@Base 12 ++ _D3std11concurrency15OwnerTerminated7__ClassZ@Base 12 ++ _D3std11concurrency15ThreadScheduler12newConditionMFNbC4core4sync5mutex5MutexZCQyQv9condition9Condition@Base 12 ++ _D3std11concurrency15ThreadScheduler5spawnMFDFZvZv@Base 12 ++ _D3std11concurrency15ThreadScheduler5startMFDFZvZv@Base 12 ++ _D3std11concurrency15ThreadScheduler5yieldMFNbZv@Base 12 ++ _D3std11concurrency15ThreadScheduler6__initZ@Base 12 ++ _D3std11concurrency15ThreadScheduler6__vtblZ@Base 12 ++ _D3std11concurrency15ThreadScheduler7__ClassZ@Base 12 ++ _D3std11concurrency15ThreadScheduler8thisInfoMFNbNcNdZSQCbQCa10ThreadInfo@Base 12 ++ _D3std11concurrency15onCrowdingBlockFNaNbNiNfSQBsQBr3TidZb@Base 12 ++ _D3std11concurrency15onCrowdingThrowFNaNfSQBoQBn3TidZb@Base 12 ++ _D3std11concurrency16onCrowdingIgnoreFNaNbNiNfSQBtQBs3TidZb@Base 12 ++ _D3std11concurrency17setMaxMailboxSizeFNaNfSQBqQBp3TidmEQCcQCb10OnCrowdingZv@Base 12 ++ _D3std11concurrency17setMaxMailboxSizeFSQBmQBl3TidmPFQoZbZv@Base 12 ++ _D3std11concurrency19TidMissingException6__initZ@Base 12 ++ _D3std11concurrency19TidMissingException6__vtblZ@Base 12 ++ _D3std11concurrency19TidMissingException7__ClassZ@Base 12 ++ _D3std11concurrency19TidMissingException8__mixin26__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDmQDlQDb@Base 12 ++ _D3std11concurrency19TidMissingException8__mixin26__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDmQDlQDb@Base 12 ++ _D3std11concurrency19_staticDtor_L266_C1FZv@Base 12 ++ _D3std11concurrency24PriorityMessageException11__fieldDtorMFNeZv@Base 12 ++ _D3std11concurrency24PriorityMessageException6__ctorMFSQCb7variant__T8VariantNVmi32ZQpZCQDiQDhQCx@Base 12 ++ _D3std11concurrency24PriorityMessageException6__initZ@Base 12 ++ _D3std11concurrency24PriorityMessageException6__vtblZ@Base 12 ++ _D3std11concurrency24PriorityMessageException7__ClassZ@Base 12 ++ _D3std11concurrency3Tid11__xopEqualsMxFKxSQBoQBnQBdZb@Base 12 ++ _D3std11concurrency3Tid6__ctorMFNaNbNcNiNfCQBpQBo10MessageBoxZSQCjQCiQBy@Base 12 ++ _D3std11concurrency3Tid6__initZ@Base 12 ++ _D3std11concurrency3Tid9__xtoHashFNbNeKxSQBnQBmQBcZm@Base 12 ++ _D3std11concurrency3Tid__T8toStringTSQBj5array__T8AppenderTAyaZQoZQBoMxFNaNfKQBpZv@Base 12 ++ _D3std11concurrency5yieldFNbZv@Base 12 ++ _D3std11concurrency6locateFAyaZSQBeQBd3Tid@Base 12 ++ _D3std11concurrency7Message11__fieldDtorMFNeZv@Base 12 ++ _D3std11concurrency7Message11__xopEqualsMxFKxSQBsQBrQBhZb@Base 12 ++ _D3std11concurrency7Message15__fieldPostblitMFNlZv@Base 12 ++ _D3std11concurrency7Message6__initZ@Base 12 ++ _D3std11concurrency7Message8opAssignMFNcNjSQBpQBoQBeZQl@Base 12 ++ _D3std11concurrency7Message9__xtoHashFNbNeKxSQBrQBqQBgZm@Base 12 ++ _D3std11concurrency7Message__T10convertsToTSQBqQBp3TidZQzMFNdZb@Base 12 ++ _D3std11concurrency7Message__T3getTSQBiQBh3TidZQrMFNdZQt@Base 12 ++ _D3std11concurrency7Message__T6__ctorTSQBlQBk3TidZQuMFNcEQCdQCc7MsgTypeQBhZSQCwQCvQCl@Base 12 ++ _D3std11concurrency7thisTidFNdNfZ4trusFNeZSQBpQBo3Tid@Base 12 ++ _D3std11concurrency7thisTidFNdNfZSQBgQBf3Tid@Base 12 ++ _D3std11concurrency8ownerTidFNdZSQBfQBe3Tid@Base 12 ++ _D3std11concurrency8registerFAyaSQBfQBe3TidZb@Base 12 ++ _D3std11concurrency8thisInfoFNbNcNdZSQBjQBi10ThreadInfo@Base 12 ++ _D3std11concurrency9Scheduler11__InterfaceZ@Base 12 ++ _D3std11concurrency9schedulerCQBcQBb9Scheduler@Base 12 ++ _D3std11concurrency9tidByNameHAyaSQBgQBf3Tid@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw3putMFNaNbNiNfKSQCiQCh__TQBxTQBvZQCfZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw3putMFNaNbNiNfPSQCiQCh__TQBxTQBvZQCf4NodeZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw3putMFQyZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw4Node11__fieldDtorMFNeZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw4Node11__xopEqualsMxFKxSQCqQCp__TQCfTQCdZQCnQBsZb@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw4Node15__fieldPostblitMFNlZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw4Node6__ctorMFNcQBiZSQCnQCm__TQCcTQCaZQCkQBp@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw4Node6__initZ@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw4Node8opAssignMFNcNjSQCnQCm__TQCcTQCaZQCkQBpZQz@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw4Node9__xtoHashFNbNeKxSQCpQCo__TQCeTQCcZQCmQBrZm@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw5Range5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw5Range5frontMFNaNcNdNfZQBp@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw5Range5frontMFNdQBiZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw5Range6__ctorMFNaNbNcNiNfPSQCtQCs__TQCiTQCgZQCq4NodeZSQDuQDt__TQDjTQDhZQDrQCw@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw5Range6__initZ@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw5Range8popFrontMFNaNfZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw5clearMFNaNbNiNfZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw6__initZ@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw7newNodeMFQBcZPSQCiQCh__TQBxTQBvZQCf4Node@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw7opSliceMFNaNbNiZSQCkQCj__TQBzTQBxZQCh5Range@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw7sm_headOPSQCdQCc__TQBsTQBqZQCa4Node@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw7sm_lockOSQCcQCb__TQBrTQBpZQBz8SpinLock@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw8SpinLock4lockMOFNbNiZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw8SpinLock6__initZ@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw8SpinLock6unlockMOFNaNbNiNfZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw8freeNodeMFPSQCfQCe__TQBuTQBsZQCc4NodeZv@Base 12 ++ _D3std11concurrency__T4ListTSQBbQBa7MessageZQw8removeAtMFSQCeQCd__TQBtTQBrZQCb5RangeZv@Base 12 ++ _D3std11concurrency__T5_sendTSQBcQBb3TidZQtFEQBrQBq7MsgTypeQBeQBhZv@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg11parallelism8taskPoolFNdNeZ4poolCQCrQBl8TaskPoolZQCnFNcLQyOC4core4sync5mutex5MutexZ4flagOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg11parallelism8taskPoolFNdNeZ4poolCQCrQBl8TaskPoolZQCnFNcLQyOC4core4sync5mutex5MutexZQBz@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg11parallelism8taskPoolFNdNeZ4poolCQCrQBl8TaskPoolZQCnFNcLQyZQBb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg12experimental6logger4core22stdSharedDefaultLoggerCQDiQCcQBrQBn6LoggerZQDiFNcLQBcOCQCk4sync5mutex5MutexZ4flagOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg12experimental6logger4core22stdSharedDefaultLoggerCQDiQCcQBrQBn6LoggerZQDiFNcLQBcOCQCk4sync5mutex5MutexZQCc@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg12experimental6logger4core22stdSharedDefaultLoggerCQDiQCcQBrQBn6LoggerZQDiFNcLQBcZQBg@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg12experimental9allocator17_processAllocatorOSQDcQBwQBl18RCISharedAllocatorZQDmFNcLOQBnOC4core4sync5mutex5MutexZ4flagOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg12experimental9allocator17_processAllocatorOSQDcQBwQBl18RCISharedAllocatorZQDmFNcLOQBnZOQBs@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg12experimental9allocator17_processAllocatorOSQDcQBwQBl18RCISharedAllocatorZQDmFNcNfLOQBpOC4core4sync5mutex5MutexZOQCs@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg3net4curl7CurlAPI7_handlePvZQBrFNcLQkOC4core4sync5mutex5MutexZ4flagOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg3net4curl7CurlAPI7_handlePvZQBrFNcLQkOC4core4sync5mutex5MutexZQBl@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg3net4curl7CurlAPI7_handlePvZQBrFNcLQkZQn@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg8datetime8timezone9LocalTime9singletonFNeZ5guardObZQCoFNcLObOC4core4sync5mutex5MutexZ4flagOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg8datetime8timezone9LocalTime9singletonFNeZ5guardObZQCoFNcLObZOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg8datetime8timezone9LocalTime9singletonFNeZ5guardObZQCoFNcNfLObOC4core4sync5mutex5MutexZOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg8encoding14EncodingScheme6createFAyaZ11initializedObZQCqFNcLObOC4core4sync5mutex5MutexZ4flagOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg8encoding14EncodingScheme6createFAyaZ11initializedObZQCqFNcLObZOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBg8encoding14EncodingScheme6createFAyaZ11initializedObZQCqFNcNfLObOC4core4sync5mutex5MutexZOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBgQBf12registryLockFNdZ4implC4core4sync5mutex5MutexZQCnFNcLQBfOCQBjQBhQBfQBcZ4flagOb@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBgQBf12registryLockFNdZ4implC4core4sync5mutex5MutexZQCnFNcLQBfOCQBjQBhQBfQBcZQBx@Base 12 ++ _D3std11concurrency__T8initOnceS_DQBgQBf12registryLockFNdZ4implC4core4sync5mutex5MutexZQCnFNcLQBfZQBj@Base 12 ++ _D3std11mathspecial11__moduleRefZ@Base 12 ++ _D3std11mathspecial11logmdigammaFNaNbNiNfeZe@Base 12 ++ _D3std11mathspecial12__ModuleInfoZ@Base 12 ++ _D3std11mathspecial14betaIncompleteFNaNbNiNfeeeZe@Base 12 ++ _D3std11mathspecial15gammaIncompleteFNaNbNiNfeeZe@Base 12 ++ _D3std11mathspecial18logmdigammaInverseFNaNbNiNfeZe@Base 12 ++ _D3std11mathspecial18normalDistributionFNaNbNiNfeZe@Base 12 ++ _D3std11mathspecial20gammaIncompleteComplFNaNbNiNfeeZe@Base 12 ++ _D3std11mathspecial21betaIncompleteInverseFNaNbNiNfeeeZe@Base 12 ++ _D3std11mathspecial25normalDistributionInverseFNaNbNiNfeZe@Base 12 ++ _D3std11mathspecial27gammaIncompleteComplInverseFNaNbNiNfeeZe@Base 12 ++ _D3std11mathspecial3erfFNaNbNiNfeZe@Base 12 ++ _D3std11mathspecial4betaFNaNbNiNfeeZe@Base 12 ++ _D3std11mathspecial4erfcFNaNbNiNfeZe@Base 12 ++ _D3std11mathspecial5gammaFNaNbNiNfeZe@Base 12 ++ _D3std11mathspecial7digammaFNaNbNiNfeZe@Base 12 ++ _D3std11mathspecial8logGammaFNaNbNiNfeZe@Base 12 ++ _D3std11mathspecial8sgnGammaFNaNbNiNfeZe@Base 12 ++ _D3std11parallelism10foreachErrFZv@Base 12 ++ _D3std11parallelism11__moduleRefZ@Base 12 ++ _D3std11parallelism12AbstractTask11__xopEqualsMxFKxSQByQBxQBnZb@Base 12 ++ _D3std11parallelism12AbstractTask3jobMFZv@Base 12 ++ _D3std11parallelism12AbstractTask4doneMFNdZb@Base 12 ++ _D3std11parallelism12AbstractTask6__initZ@Base 12 ++ _D3std11parallelism12AbstractTask9__xtoHashFNbNeKxSQBxQBwQBmZm@Base 12 ++ _D3std11parallelism12__ModuleInfoZ@Base 12 ++ _D3std11parallelism13totalCPUsImplFNbNiNeZk@Base 12 ++ _D3std11parallelism16submitAndExecuteFCQBlQBk8TaskPoolMDFZvZv@Base 12 ++ _D3std11parallelism17ParallelismThread6__ctorMFDFZvZCQBzQByQBo@Base 12 ++ _D3std11parallelism17ParallelismThread6__initZ@Base 12 ++ _D3std11parallelism17ParallelismThread6__vtblZ@Base 12 ++ _D3std11parallelism17ParallelismThread7__ClassZ@Base 12 ++ _D3std11parallelism17cacheLineSizeImplFNbNiNeZm@Base 12 ++ _D3std11parallelism18defaultPoolThreadsFNdNeZk@Base 12 ++ _D3std11parallelism18defaultPoolThreadsFNdNekZv@Base 12 ++ _D3std11parallelism19_defaultPoolThreadsOk@Base 12 ++ _D3std11parallelism20ParallelForeachError6__ctorMFZCQByQBxQBn@Base 12 ++ _D3std11parallelism20ParallelForeachError6__initZ@Base 12 ++ _D3std11parallelism20ParallelForeachError6__vtblZ@Base 12 ++ _D3std11parallelism20ParallelForeachError7__ClassZ@Base 12 ++ _D3std11parallelism26_sharedStaticDtor_L1074_C1FZv@Base 12 ++ _D3std11parallelism8TaskPool10deleteItemMFPSQBqQBp12AbstractTaskZb@Base 12 ++ _D3std11parallelism8TaskPool10waiterLockMFZv@Base 12 ++ _D3std11parallelism8TaskPool11abstractPutMFPSQBrQBq12AbstractTaskZv@Base 12 ++ _D3std11parallelism8TaskPool11queueUnlockMFZv@Base 12 ++ _D3std11parallelism8TaskPool11threadIndexm@Base 12 ++ _D3std11parallelism8TaskPool11workerIndexMxFNbNdNfZm@Base 12 ++ _D3std11parallelism8TaskPool12doSingleTaskMFZv@Base 12 ++ _D3std11parallelism8TaskPool12waiterUnlockMFZv@Base 12 ++ _D3std11parallelism8TaskPool13notifyWaitersMFZv@Base 12 ++ _D3std11parallelism8TaskPool13startWorkLoopMFZv@Base 12 ++ _D3std11parallelism8TaskPool15executeWorkLoopMFZv@Base 12 ++ _D3std11parallelism8TaskPool16deleteItemNoSyncMFPSQBwQBv12AbstractTaskZb@Base 12 ++ _D3std11parallelism8TaskPool16tryDeleteExecuteMFPSQBwQBv12AbstractTaskZv@Base 12 ++ _D3std11parallelism8TaskPool17abstractPutNoSyncMFPSQBxQBw12AbstractTaskZv@Base 12 ++ _D3std11parallelism8TaskPool17nextInstanceIndexm@Base 12 ++ _D3std11parallelism8TaskPool19defaultWorkUnitSizeMxFNaNbNfmZm@Base 12 ++ _D3std11parallelism8TaskPool19waitUntilCompletionMFZv@Base 12 ++ _D3std11parallelism8TaskPool22abstractPutGroupNoSyncMFPSQCcQCb12AbstractTaskQwZv@Base 12 ++ _D3std11parallelism8TaskPool3popMFZPSQBjQBi12AbstractTask@Base 12 ++ _D3std11parallelism8TaskPool4sizeMxFNaNbNdNfZm@Base 12 ++ _D3std11parallelism8TaskPool4stopMFNeZv@Base 12 ++ _D3std11parallelism8TaskPool4waitMFZv@Base 12 ++ _D3std11parallelism8TaskPool5doJobMFPSQBkQBj12AbstractTaskZv@Base 12 ++ _D3std11parallelism8TaskPool6__ctorMFNeZCQBnQBmQBc@Base 12 ++ _D3std11parallelism8TaskPool6__ctorMFNemZCQBoQBnQBd@Base 12 ++ _D3std11parallelism8TaskPool6__ctorMFPSQBlQBk12AbstractTaskiZCQCiQChQBx@Base 12 ++ _D3std11parallelism8TaskPool6__initZ@Base 12 ++ _D3std11parallelism8TaskPool6__vtblZ@Base 12 ++ _D3std11parallelism8TaskPool6finishMFNebZv@Base 12 ++ _D3std11parallelism8TaskPool6notifyMFZv@Base 12 ++ _D3std11parallelism8TaskPool7__ClassZ@Base 12 ++ _D3std11parallelism8TaskPool8isDaemonMFNdNeZb@Base 12 ++ _D3std11parallelism8TaskPool8isDaemonMFNdNebZv@Base 12 ++ _D3std11parallelism8TaskPool8priorityMFNdNeZi@Base 12 ++ _D3std11parallelism8TaskPool8priorityMFNdNeiZv@Base 12 ++ _D3std11parallelism8TaskPool9notifyAllMFZv@Base 12 ++ _D3std11parallelism8TaskPool9popNoSyncMFZPSQBpQBo12AbstractTask@Base 12 ++ _D3std11parallelism8TaskPool9queueLockMFZv@Base 12 ++ _D3std11parallelism8taskPoolFNdNeZ4poolCQBmQBl8TaskPool@Base 12 ++ _D3std11parallelism8taskPoolFNdNeZ9__lambda2FNfZCQBvQBu8TaskPool@Base 12 ++ _D3std11parallelism8taskPoolFNdNeZCQBhQBg8TaskPool@Base 12 ++ _D3std11parallelism__T10scopedTaskTDFZvZQsFMQjZSQBuQBt__T4TaskSQCjQCi3runTQBnZQv@Base 12 ++ _D3std11parallelism__T14atomicCasUbyteTEQBmQBl8TaskPool9PoolStateZQBsFNaNbNiKQBmQBpQBsZb@Base 12 ++ _D3std11parallelism__T14atomicSetUbyteTEQBmQBl8TaskPool9PoolStateZQBsFNaNbNiKQBmQBpZv@Base 12 ++ _D3std11parallelism__T14atomicSetUbyteThZQtFNaNbNiKhhZv@Base 12 ++ _D3std11parallelism__T15atomicReadUbyteTEQBnQBm8TaskPool9PoolStateZQBtFNaNbNiKQBmZh@Base 12 ++ _D3std11parallelism__T15atomicReadUbyteThZQuFNaNbNiKhZh@Base 12 ++ _D3std11parallelism__T27__lazilyInitializedConstantTykVki4294967295S_DQCqQCp13totalCPUsImplFNbNiNeZkZQDbFNaNbNdNiNfZyk@Base 12 ++ _D3std11parallelism__T27__lazilyInitializedConstantTykVki4294967295S_DQCqQCp13totalCPUsImplFNbNiNeZkZQDbFNaNdZ4implFNbNiNfZyk@Base 12 ++ _D3std11parallelism__T27__lazilyInitializedConstantTykVki4294967295S_DQCqQCp13totalCPUsImplFNbNiNeZkZQDbFNaNdZ4implFNbZ3tlsk@Base 12 ++ _D3std11parallelism__T27__lazilyInitializedConstantTykVki4294967295S_DQCqQCp13totalCPUsImplFNbNiNeZkZQDbFNaNdZ4implFNbZ6resultOk@Base 12 ++ _D3std11parallelism__T27__lazilyInitializedConstantTymVmN1S_DQChQCg17cacheLineSizeImplFNbNiNeZmZQCwFNaNbNdNiNfZym@Base 12 ++ _D3std11parallelism__T27__lazilyInitializedConstantTymVmN1S_DQChQCg17cacheLineSizeImplFNbNiNeZmZQCwFNaNdZ4implFNbNiNfZym@Base 12 ++ _D3std11parallelism__T27__lazilyInitializedConstantTymVmN1S_DQChQCg17cacheLineSizeImplFNbNiNeZmZQCwFNaNdZ4implFNbZ3tlsm@Base 12 ++ _D3std11parallelism__T27__lazilyInitializedConstantTymVmN1S_DQChQCg17cacheLineSizeImplFNbNiNeZmZQCwFNaNdZ4implFNbZ6resultOm@Base 12 ++ _D3std11parallelism__T3runTDFZvZQkFQiZv@Base 12 ++ _D3std11parallelism__T4TaskSQBaQz3runTDFZvZQv10yieldForceMFNcNdNeZv@Base 12 ++ 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_D3std11parallelism__T4TaskSQBaQz3runTDFZvZQv9__xtoHashFNbNeKxSQCjQCi__TQBySQCwQCvQBxTQBwZQCqZm@Base 12 ++ _D3std11parallelism__T4TaskSQBaQz3runTDFZvZQv9spinForceMFNcNdNeZv@Base 12 ++ _D3std11parallelism__T4TaskSQBaQz3runTDFZvZQv9workForceMFNcNdNeZv@Base 12 ++ _D3std12__ModuleInfoZ@Base 12 ++ _D3std12experimental10checkedint11__moduleRefZ@Base 12 ++ _D3std12experimental10checkedint12__ModuleInfoZ@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger10logMsgPartMFNfMAxaZv@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger11__fieldDtorMFNeZv@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger11beginLogMsgMFNfAyaiQeQgQiEQCzQCyQCn4core8LogLevelSQDx11concurrency3TidSQEs8datetime7systime7SysTimeCQFvQFuQFjQCw6LoggerZv@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger11getFilenameMFZAya@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger11writeLogMsgMFNfKSQCqQCpQCe4core6Logger8LogEntryZv@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger12finishLogMsgMFNfZv@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger4fileMFNdNfZSQCk5stdio4File@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger6__ctorMFNfSQCj5stdio4FilexEQCzQCyQCn4core8LogLevelZCQDyQDxQDmQDiQCz@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger6__ctorMFNfxAyaxEQCoQCnQCc4core8LogLevelEQDm8typecons__T4FlagVAyaa12_437265617465466f6c646572ZQBmZCQFsQFrQFgQFcQEt@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger6__ctorMFNfxAyaxEQCoQCnQCc4core8LogLevelZCQDnQDmQDbQCxQCo@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger6__initZ@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger6__vtblZ@Base 12 ++ _D3std12experimental6logger10filelogger10FileLogger7__ClassZ@Base 12 ++ _D3std12experimental6logger10filelogger11__moduleRefZ@Base 12 ++ _D3std12experimental6logger10filelogger12__ModuleInfoZ@Base 12 ++ _D3std12experimental6logger10nulllogger10NullLogger11writeLogMsgMFNiNfKSQCsQCrQCg4core6Logger8LogEntryZv@Base 12 ++ _D3std12experimental6logger10nulllogger10NullLogger6__ctorMFNfxEQCkQCjQBy4core8LogLevelZCQDjQDiQCxQCtQCk@Base 12 ++ _D3std12experimental6logger10nulllogger10NullLogger6__initZ@Base 12 ++ _D3std12experimental6logger10nulllogger10NullLogger6__vtblZ@Base 12 ++ _D3std12experimental6logger10nulllogger10NullLogger7__ClassZ@Base 12 ++ _D3std12experimental6logger10nulllogger11__moduleRefZ@Base 12 ++ _D3std12experimental6logger10nulllogger12__ModuleInfoZ@Base 12 ++ _D3std12experimental6logger11__moduleRefZ@Base 12 ++ _D3std12experimental6logger11multilogger11MultiLogger11writeLogMsgMFNfKSQCsQCrQCg4core6Logger8LogEntryZv@Base 12 ++ _D3std12experimental6logger11multilogger11MultiLogger12insertLoggerMFNfAyaCQCvQCuQCj4core6LoggerZv@Base 12 ++ _D3std12experimental6logger11multilogger11MultiLogger12removeLoggerMFNfIAaZCQCwQCvQCk4core6Logger@Base 12 ++ _D3std12experimental6logger11multilogger11MultiLogger6__ctorMFNfxEQCmQClQCa4core8LogLevelZCQDlQDkQCzQCvQCl@Base 12 ++ _D3std12experimental6logger11multilogger11MultiLogger6__initZ@Base 12 ++ _D3std12experimental6logger11multilogger11MultiLogger6__vtblZ@Base 12 ++ _D3std12experimental6logger11multilogger11MultiLogger7__ClassZ@Base 12 ++ _D3std12experimental6logger11multilogger11__moduleRefZ@Base 12 ++ _D3std12experimental6logger11multilogger12__ModuleInfoZ@Base 12 ++ _D3std12experimental6logger11multilogger16MultiLoggerEntry11__xopEqualsMxFKxSQCxQCwQClQChQBxZb@Base 12 ++ _D3std12experimental6logger11multilogger16MultiLoggerEntry6__initZ@Base 12 ++ _D3std12experimental6logger11multilogger16MultiLoggerEntry9__xtoHashFNbNeKxSQCwQCvQCkQCgQBwZm@Base 12 ++ _D3std12experimental6logger12__ModuleInfoZ@Base 12 ++ _D3std12experimental6logger4core10TestLogger11writeLogMsgMFNfKSQCjQCiQBxQBt6Logger8LogEntryZv@Base 12 ++ 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_D3std12experimental6logger4core16StdForwardLogger6__vtblZ@Base 12 ++ _D3std12experimental6logger4core16StdForwardLogger7__ClassZ@Base 12 ++ _D3std12experimental6logger4core17stdThreadLocalLogFNdNfCQCdQCcQBrQBn6LoggerZv@Base 12 ++ _D3std12experimental6logger4core17stdThreadLocalLogFNdNfZCQCeQCdQBsQBo6Logger@Base 12 ++ _D3std12experimental6logger4core21stdLoggerThreadLoggerCQCcQCbQBqQBm6Logger@Base 12 ++ _D3std12experimental6logger4core21stdThreadLocalLogImplFNdNeZ7_bufferG23Pv@Base 12 ++ _D3std12experimental6logger4core21stdThreadLocalLogImplFNdNeZCQCiQChQBwQBs6Logger@Base 12 ++ _D3std12experimental6logger4core22stdSharedDefaultLoggerCQCdQCcQBrQBn6Logger@Base 12 ++ _D3std12experimental6logger4core23defaultSharedLoggerImplFNdNeZ7_bufferG224v@Base 12 ++ _D3std12experimental6logger4core23defaultSharedLoggerImplFNdNeZ9__lambda2FZCQCwQCvQCk10filelogger10FileLogger@Base 12 ++ _D3std12experimental6logger4core23defaultSharedLoggerImplFNdNeZCQCkQCjQByQBu6Logger@Base 12 ++ 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_D3std12experimental6logger4core6Logger7__ClassZ@Base 12 ++ _D3std12experimental6logger4core6Logger8LogEntry11__xopEqualsMxFKxSQCnQCmQCbQBxQBvQBrZb@Base 12 ++ _D3std12experimental6logger4core6Logger8LogEntry6__initZ@Base 12 ++ _D3std12experimental6logger4core6Logger8LogEntry8opAssignMFNaNbNcNiNjNfSQCsQCrQCgQCcQCaQBwZQu@Base 12 ++ _D3std12experimental6logger4core6Logger8LogEntry9__xtoHashFNbNeKxSQCmQClQCaQBwQBuQBqZm@Base 12 ++ _D3std12experimental6logger4core6Logger8logLevelMFNdNiNfxEQCeQCdQBsQBo8LogLevelZv@Base 12 ++ _D3std12experimental6logger4core6Logger8logLevelMxFNaNdNiNfZEQChQCgQBvQBr8LogLevel@Base 12 ++ _D3std12experimental6logger4core8LogLevel6__initZ@Base 12 ++ _D3std12experimental6logger4core8MsgRange11__xopEqualsMxFKxSQCgQCfQBuQBqQBoZb@Base 12 ++ _D3std12experimental6logger4core8MsgRange3putMFNfwZv@Base 12 ++ _D3std12experimental6logger4core8MsgRange6__ctorMFNcNfCQCbQCaQBpQBl6LoggerZSQCwQCvQCkQCgQCe@Base 12 ++ _D3std12experimental6logger4core8MsgRange6__initZ@Base 12 ++ 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_D3std12experimental9allocator10mallocator17AlignedMallocator10reallocateMOFNbNiKAvmZb@Base 12 ++ _D3std12experimental9allocator10mallocator17AlignedMallocator15alignedAllocateMOFNbNiNemkZAv@Base 12 ++ _D3std12experimental9allocator10mallocator17AlignedMallocator17alignedReallocateMOFNbNiKAvmkZb@Base 12 ++ _D3std12experimental9allocator10mallocator17AlignedMallocator6__initZ@Base 12 ++ _D3std12experimental9allocator10mallocator17AlignedMallocator8allocateMOFNbNiNemZAv@Base 12 ++ _D3std12experimental9allocator10mallocator17AlignedMallocator8instanceOSQCsQCrQCgQBzQBq@Base 12 ++ _D3std12experimental9allocator11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator12RCIAllocator10__postblitMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator12RCIAllocator10deallocateMFNbAvZb@Base 12 ++ _D3std12experimental9allocator12RCIAllocator10reallocateMFNbKAvmZb@Base 12 ++ _D3std12experimental9allocator12RCIAllocator11__xopEqualsMxFKxSQCjQCiQBxQBqZb@Base 12 ++ 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_D3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe5emptyMxFNaNbNiNfZSQHm8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe6__ctorMFNaNbNcNiNfKQElZSQHsQHrQHgQGzQGl__TQFyTQFmTQDvZQGk@Base 12 ++ _D3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe6__ctorMFNaNbNcNiNfQEkZSQHrQHqQHfQGyQGk__TQFxTQFlTQDuZQGj@Base 12 ++ _D3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe6__dtorMFNaNbNiZv@Base 12 ++ _D3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe6__initZ@Base 12 ++ _D3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe6expandMFNaNbNiNfKAvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe8allocateMFNaNbNimZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe8opAssignMFNaNbNcNiNjSQHpQHoQHdQGwQGi__TQFvTQFjTQDsZQGhZQBj@Base 12 ++ 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_D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector11__xopEqualsMxFKxSQDnQDmQDbQCuQCgQBsZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector13find1BackwardMFNaNbNiNfmZm@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector13opIndexAssignMFNaNbNiNfbmZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector13opSliceAssignMFNaNbNiNfbZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector13opSliceAssignMFNaNbNiNfbmmZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector5find1MFNaNbNiNfmZm@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector6__ctorMFNaNbNcNiNfAmZSQDrQDqQDfQCyQCkQBw@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector6__initZ@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector6lengthMxFNaNbNiNfZm@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector7allAre0MxFNaNbNiNfZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector7allAre1MxFNaNbNiNfZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector7opIndexMFNaNbNiNfmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector9__xtoHashFNbNeKxSQDmQDlQDaQCtQCfQBrZm@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9BitVector9findZerosMFNaNbNiNfymmZm@Base 12 ++ _D3std12experimental9allocator15building_blocks15bitmapped_block9resetBitsFNaNbNiNfKmkkZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector7Options6__initZ@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq10deallocateMFNaNbNiAvZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq10reallocateMFNaNbNiKAvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq11__fieldDtorMFNaNbNiZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq13deallocateAllMFNaNbNiNfZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq15alignedAllocateMFNaNbNiNfmkZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq4ownsMFNaNbNiNfAvZSQJzQDu7Ternary@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq5emptyMFNaNbNiNfZSQJyQDt7Ternary@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq6__initZ@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq6defineFNaNbNfQCuAQCyXQDc@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq6expandMFNaNbNiNfKAvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq8allocateMFNaNbNiNfmZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq8opAssignMFNaNbNcNiNjSQKcQKbQJqQJjQIv__TQIhTQHuVmi4096Vmi0ZQJaZQBq@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq9bytesUsedMxFNaNbNiNfZxm@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T10addPerCallVQCwnVki0VQDfa13_6e756d4465616c6c6f63617465VQEna15_6279746573436f6e74726163746564ZQDqMFNaNbNiNfAmXv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T10addPerCallVQCwnVki0VQDfa13_6e756d5265616c6c6f63617465VQEna15_6e756d5265616c6c6f636174654f4bVQFza20_6e756d5265616c6c6f63617465496e506c616365VQHva13_62797465734e6f744d6f766564VQJda13_6279746573457870616e646564VQKla15_6279746573436f6e74726163746564VQLxa10_62797465734d6f766564ZQKqMFNaNbNiNfAmXv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T10addPerCallVQCwnVki0VQDfa16_6e756d4465616c6c6f63617465416c6cZQCkMFNaNbNiNfAmXv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T10addPerCallVQCwnVki0VQDfa7_6e756d4f776e73ZQBrMFNaNbNiNfAmXv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T10addPerCallVQCwnVki0VQDfa9_6e756d457870616e64VQEea11_6e756d457870616e644f4bVQFia13_6279746573457870616e646564VQGqa14_6279746573416c6c6f6361746564ZQFrMFNaNbNiNfAmXv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T10addPerCallVQCwnVmi0VQDfa11_6e756d416c6c6f63617465VQEja13_6e756d416c6c6f636174654f4bVQFra14_6279746573416c6c6f6361746564ZQEsMFNaNbNiNfAmXv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T10addPerCallVQCwnVmi0VQDfa18_6e756d416c69676e6564416c6c6f63617465VQExa20_6e756d416c69676e6564416c6c6f636174654f6bVQGta14_6279746573416c6c6f6361746564ZQFuMFNaNbNiNfAmXv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T10expandImplVnnVii0ZQuMFNaNbNiNfKAvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T12allocateImplVnnVii0ZQwMFNaNbNiNfmZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T14deallocateImplVnnVii0ZQyMFNaNbNiAvZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T14reallocateImplVnnVii0ZQyMFNaNbNiKAvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T17deallocateAllImplVnnVii0ZQBbMFNaNbNiNfZb@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T19alignedAllocateImplVnnVii0ZQBdMFNaNbNiNfmkZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna11_6e756d416c6c6f63617465ZQBiMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna11_6e756d457870616e644f4bZQBiMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna13_6e756d4465616c6c6f63617465ZQBmMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna13_6e756d5265616c6c6f63617465ZQBmMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna15_6e756d5265616c6c6f636174654f4bZQBqMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna16_6e756d4465616c6c6f63617465416c6cZQBsMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna18_6e756d416c69676e6564416c6c6f63617465ZQBwMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna20_6e756d5265616c6c6f63617465496e506c616365ZQCaMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna7_6e756d4f776e73ZQzMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T2upVQCna9_6e756d457870616e64ZQBdMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa10_62797465734d6f766564ZQBhMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa10_6279746573536c61636bZQBhMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa11_6e756d416c6c6f63617465ZQBjMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa11_6e756d457870616e644f4bZQBjMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa13_6279746573457870616e646564ZQBnMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa13_62797465734e6f744d6f766564ZQBnMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa13_6e756d416c6c6f636174654f4bZQBnMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa13_6e756d4465616c6c6f63617465ZQBnMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa13_6e756d5265616c6c6f63617465ZQBnMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa14_6279746573416c6c6f6361746564ZQBpMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa15_6279746573436f6e74726163746564ZQBrMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa15_6e756d5265616c6c6f636174654f4bZQBrMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa16_6e756d4465616c6c6f63617465416c6cZQBtMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa18_6e756d416c69676e6564416c6c6f63617465ZQBxMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa20_6e756d416c69676e6564416c6c6f636174654f6bZQCbMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa20_6e756d5265616c6c6f63617465496e506c616365ZQCbMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa7_6e756d4f776e73ZQBaMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa9_627974657355736564ZQBeMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T3addVQCoa9_6e756d457870616e64ZQBeMFNaNbNiNflZv@Base 12 ++ _D3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGq__T8ownsImplVnnVii0ZQrMFNaNbNiNfAvZSQKqQEl7Ternary@Base 12 ++ _D3std12experimental9allocator15building_blocks16scoped_allocator11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks16scoped_allocator12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator15building_blocks17kernighan_ritchie11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks17kernighan_ritchie12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator15building_blocks18aligned_block_list11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks18aligned_block_list12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator15building_blocks18fallback_allocator11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks18fallback_allocator12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator15alignedAllocateMFNbNimkZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator5emptyMFNbNiZSQEf8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator6__dtorMFNbNiZv@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator6__initZ@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator6expandMFNbNiKAvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator8allocateMFNbNimZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator8opAssignMFNbNcNiNjSQElQEkQDzQDsQDeQChZQu@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator9__mixin1510deallocateMFNbNiAvZb@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator9__mixin1513deallocateAllMFNbNiZb@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator9__mixin1513goodAllocSizeMFNbNimZm@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator9__mixin1516getAvailableSizeMFNbNiZm@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator9__mixin1522extendMemoryProtectionMFNbNiPvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator9__mixin154ownsMFNbNiAvZSQEq8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator22AscendingPageAllocator9__mixin156__ctorMFNbNcNimZSQEtQEsQEhQEaQDmQCp@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator12allocateImplMOFNbNimkZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator15alignedAllocateMOFNbNimkZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator6__initZ@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator6expandMOFNbNiKAvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator8allocateMOFNbNimZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator9__mixin1510deallocateMOFNbNiAvZb@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator9__mixin1513deallocateAllMOFNbNiZb@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator9__mixin1513goodAllocSizeMOFNbNimZm@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator9__mixin1516getAvailableSizeMOFNbNiZm@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator9__mixin1522extendMemoryProtectionMOFNbNiPvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator9__mixin154ownsMOFNbNiAvZSQEx8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator15building_blocks24ascending_page_allocator28SharedAscendingPageAllocator9__mixin156__ctorMOFNbNcNimZOSQFbQFaQEpQEiQDuQCx@Base 12 ++ _D3std12experimental9allocator15building_blocks6region11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks6region12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn10deallocateMFNaNbNiAvZb@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn10roundedEndMxFNaNbNiNeZPv@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn11allocateAllMFNaNbNiNeZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn12roundedBeginMxFNaNbNiNeZPv@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn13deallocateAllMFNaNbNiNfZb@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn13goodAllocSizeMxFNaNbNiNfmZm@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn15alignedAllocateMFNaNbNiNemkZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn4ownsMxFNaNbNiNexAvZSQHoQDh7Ternary@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn5emptyMxFNaNbNiNfZSQHmQDf7Ternary@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn6__ctorMFNaNbNcNiAhZSQHoQHnQHcQGvQGh__TQGdTQFzVki16VQEni0ZQGw@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn6__ctorMFNaNbNcNimZSQHnQHmQHbQGuQGg__TQGcTQFyVki16VQEmi0ZQGv@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn6__dtorMFNaNbNiZv@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn6__initZ@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn6expandMFNaNbNiNfKAvmZb@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn8allocateMFNaNbNiNemZAv@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn8opAssignMFNaNbNcNiNjSQHpQHoQHdQGwQGi__TQGeTQGaVki16VQEoi0ZQGxZQBq@Base 12 ++ _D3std12experimental9allocator15building_blocks6region__T6RegionTSQCmQClQCa14mmap_allocator13MmapAllocatorVki16VEQEh8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn9availableMxFNaNbNiNfZm@Base 12 ++ _D3std12experimental9allocator15building_blocks9free_list11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks9free_list12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator15building_blocks9free_tree11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks9free_tree12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator15building_blocks9quantizer11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator15building_blocks9quantizer12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator16ISharedAllocator11__InterfaceZ@Base 12 ++ _D3std12experimental9allocator16_threadAllocatorSQBvQBuQBj12RCIAllocator@Base 12 ++ _D3std12experimental9allocator16processAllocatorFNbNcNdNiNeZ15forceAttributesFZPOSQDcQDbQCq18RCISharedAllocator@Base 12 ++ _D3std12experimental9allocator16processAllocatorFNbNcNdNiNeZOSQCiQChQBw18RCISharedAllocator@Base 12 ++ _D3std12experimental9allocator16processAllocatorFNbNdNiKOSQCeQCdQBs18RCISharedAllocatorZv@Base 12 ++ _D3std12experimental9allocator17_processAllocatorOSQBxQBwQBl18RCISharedAllocator@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator10__postblitMOFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator10deallocateMOFNbAvZb@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator10reallocateMOFNbKAvmZb@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator11__xopEqualsMxFKOxSQCqQCpQCeQBxZb@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator11allocateAllMOFNbZAv@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator13deallocateAllMOFNbZb@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator13goodAllocSizeMOFNbmZm@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator15alignedAllocateMOFNbmkZAv@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator17alignedReallocateMOFNbKAvmkZb@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator22resolveInternalPointerMOFNbxPvKAvZSQDh8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator4ownsMOFNbAvZSQCk8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator5emptyMOFNbZSQCj8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator6__ctorMOFNaNbNcNiNfOCQCsQCrQCg16ISharedAllocatorZOSQDwQDvQDkQDd@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator6__dtorMOFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator6__initZ@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator6expandMOFNbKAvmZb@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator8allocateMOFNbmC8TypeInfoZAv@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator9__xtoHashFNbNeKOxSQCpQCoQCdQBwZm@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator9alignmentMOFNbNdZk@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator__T6isNullTOSQCjQCiQBxQBqZQxMOFNaNbNiNfZb@Base 12 ++ _D3std12experimental9allocator18RCISharedAllocator__T8opAssignZQkMOFNaNbNcNiNfOSQDaQCzQCoQChZOQp@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator10deallocateMFNbAvZb@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator10reallocateMFNbKAvmZb@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator11__fieldDtorMFNaNbNiNeZv@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator11allocateAllMFNbZAv@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator13deallocateAllMFNbZb@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator13goodAllocSizeMFNbmZm@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator15alignedAllocateMFNbmkZAv@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator17alignedReallocateMFNbKAvmkZb@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator22resolveInternalPointerMFNbxPvKAvZSQEj8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator4ownsMFNbAvZSQDm8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator5emptyMFNbZSQDl8typecons7Ternary@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator6__ctorMFNaNbNiNfKOSQDtQDsQDh18RCISharedAllocatorZCQEyQExQEmQEfFNbNcNiNfZQDm@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator6__initZ@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator6__vtblZ@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator6decRefMFNaNbNiNfZb@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator6expandMFNbKAvmZb@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator6incRefMFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator7__ClassZ@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator8allocateMFNbmC8TypeInfoZAv@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocator9alignmentMFNbNdZk@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ21_threadAllocatorStateG4m@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ9__lambda3FNbNiNeZv@Base 12 ++ _D3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZSQCjQCiQBx12RCIAllocator@Base 12 ++ _D3std12experimental9allocator5typed11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator5typed12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator6common11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator6common11alignDownToFNaNbNiNkMPvkZQe@Base 12 ++ _D3std12experimental9allocator6common12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator6common13divideRoundUpFNaNbNiNfmmZm@Base 12 ++ _D3std12experimental9allocator6common13trailingZerosFNaNbNiNfmZk@Base 12 ++ _D3std12experimental9allocator6common15forwardToMemberFAyaAQeXQh@Base 12 ++ _D3std12experimental9allocator6common17roundUpToPowerOf2FNaNbNiNfmZm@Base 12 ++ _D3std12experimental9allocator6common18effectiveAlignmentFNaNbNiPvZm@Base 12 ++ _D3std12experimental9allocator6common18roundUpToAlignmentFNaNbNiAvkZQe@Base 12 ++ _D3std12experimental9allocator6common18roundUpToAlignmentFNaNbNiNfmkZm@Base 12 ++ _D3std12experimental9allocator6common19roundUpToMultipleOfFNaNbNiNfmkZm@Base 12 ++ _D3std12experimental9allocator6common20roundDownToAlignmentFNaNbNiNfmkZm@Base 12 ++ _D3std12experimental9allocator6common21isGoodStaticAlignmentFNaNbNiNfkZb@Base 12 ++ _D3std12experimental9allocator6common22isGoodDynamicAlignmentFNaNbNiNfkZb@Base 12 ++ _D3std12experimental9allocator6common22roundStartToMultipleOfFNaNbNiAvkZQe@Base 12 ++ _D3std12experimental9allocator6common9alignUpToFNaNbNiNkMPvkZQe@Base 12 ++ _D3std12experimental9allocator6common__T10reallocateTSQCaQBzQBo15building_blocks6region__T6RegionTSQDtQDsQDh14mmap_allocator13MmapAllocatorVki16VEQFo8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnZQGpFNaNbNiKQGnKAvmZb@Base 12 ++ _D3std12experimental9allocator6common__T13goodAllocSizeTSQCdQCcQBr15building_blocks15stats_collector__T14StatsCollectorTSQEpQEoQEdQCm6region__T6RegionTSQFuQFtQFi14mmap_allocator13MmapAllocatorVki16VEQHp8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGqZQJfFNaNbNiNfKQJcmZm@Base 12 ++ _D3std12experimental9allocator6common__T9alignedAtTvZQnFNaNbNiNfPvkZb@Base 12 ++ _D3std12experimental9allocator8showcase11__moduleRefZ@Base 12 ++ _D3std12experimental9allocator8showcase12__ModuleInfoZ@Base 12 ++ _D3std12experimental9allocator8showcase14mmapRegionListFmZ7Factory6__ctorMFNcmZSQDaQCzQCoQChQCbFmZQBo@Base 12 ++ _D3std12experimental9allocator8showcase14mmapRegionListFmZ7Factory6__initZ@Base 12 ++ _D3std12experimental9allocator8showcase14mmapRegionListFmZ7Factory6opCallMFNaNbNimZSQDeQDdQCs15building_blocks6region__T6RegionTSQExQEwQEl14mmap_allocator13MmapAllocatorVki16VEQGs8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEn@Base 12 ++ _D3std12experimental9allocator8showcase14mmapRegionListFmZSQCfQCeQBt15building_blocks14allocator_list__T13AllocatorListTSQEpQEoQEdQDwQDqFmZ7FactoryTSQFrQFqQFfQDm14null_allocator13NullAllocatorZQDl@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk10deallocateMOFNbAvZb@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk10reallocateMOFNbKAvmZb@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk11allocateAllMOFNbZAv@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk13deallocateAllMOFNbZb@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk13goodAllocSizeMOFNbmZm@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk15alignedAllocateMOFNbmkZAv@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk17alignedReallocateMOFNbKAvmkZb@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk22resolveInternalPointerMOFNbxPvKAvZSQHdQDm7Ternary@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk4ownsMOFNbAvZSQGgQCp7Ternary@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk5emptyMOFNbZSQGfQCo7Ternary@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk6__initZ@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk6__vtblZ@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk6decRefMOFNaNbNiNeZb@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk6expandMOFNbKAvmZb@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk6incRefMOFNaNbNiNfZv@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk7__ClassZ@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk8allocateMOFNbmC8TypeInfoZAv@Base 12 ++ _D3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEk9alignmentMOFNbNdZk@Base 12 ++ _D3std12experimental9allocator__T21sharedAllocatorObjectTOxSQCgQCfQBu12gc_allocator11GCAllocatorZQCmFNbKOxQBvZ5stateOG3m@Base 12 ++ _D3std12experimental9allocator__T21sharedAllocatorObjectTOxSQCgQCfQBu12gc_allocator11GCAllocatorZQCmFNbKOxQBvZ6resultOSQEnQEmQEb18RCISharedAllocator@Base 12 ++ _D3std12experimental9allocator__T21sharedAllocatorObjectTOxSQCgQCfQBu12gc_allocator11GCAllocatorZQCmFNbNiKOxQBxZOSQEiQEhQDw18RCISharedAllocator@Base 12 ++ _D3std3csv11__moduleRefZ@Base 12 ++ _D3std3csv12CSVException6__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQCnQCmQCl@Base 12 ++ _D3std3csv12CSVException6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQCnQCmQCl@Base 12 ++ _D3std3csv12CSVException6__ctorMFNaNbNiNfAyammC6object9ThrowableQxmZCQCpQCoQCn@Base 12 ++ _D3std3csv12CSVException6__initZ@Base 12 ++ _D3std3csv12CSVException6__vtblZ@Base 12 ++ _D3std3csv12CSVException7__ClassZ@Base 12 ++ _D3std3csv12CSVException8toStringMxFNaNfZAya@Base 12 ++ _D3std3csv12__ModuleInfoZ@Base 12 ++ _D3std3csv23HeaderMismatchException6__initZ@Base 12 ++ _D3std3csv23HeaderMismatchException6__vtblZ@Base 12 ++ _D3std3csv23HeaderMismatchException7__ClassZ@Base 12 ++ _D3std3csv23HeaderMismatchException8__mixin16__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDhQDgQDf@Base 12 ++ _D3std3csv23HeaderMismatchException8__mixin16__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDhQDgQDf@Base 12 ++ _D3std3csv23IncompleteCellException6__initZ@Base 12 ++ _D3std3csv23IncompleteCellException6__vtblZ@Base 12 ++ _D3std3csv23IncompleteCellException7__ClassZ@Base 12 ++ _D3std3csv23IncompleteCellException8__mixin26__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDhQDgQDf@Base 12 ++ _D3std3csv23IncompleteCellException8__mixin26__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDhQDgQDf@Base 12 ++ _D3std3net4curl11__moduleRefZ@Base 12 ++ _D3std3net4curl12AutoProtocol6__initZ@Base 12 ++ _D3std3net4curl12__ModuleInfoZ@Base 12 ++ _D3std3net4curl13CurlException6__ctorMFNaNbNfAyaQdmC6object9ThrowableZCQCrQCqQCpQCn@Base 12 ++ _D3std3net4curl13CurlException6__initZ@Base 12 ++ _D3std3net4curl13CurlException6__vtblZ@Base 12 ++ _D3std3net4curl13CurlException7__ClassZ@Base 12 ++ _D3std3net4curl19HTTPStatusException6__ctorMFNaNbNfiAyaQdmC6object9ThrowableZCQCyQCxQCwQCu@Base 12 ++ _D3std3net4curl19HTTPStatusException6__initZ@Base 12 ++ _D3std3net4curl19HTTPStatusException6__vtblZ@Base 12 ++ _D3std3net4curl19HTTPStatusException7__ClassZ@Base 12 ++ _D3std3net4curl20CurlTimeoutException6__ctorMFNaNbNfAyaQdmC6object9ThrowableZCQCyQCxQCwQCu@Base 12 ++ _D3std3net4curl20CurlTimeoutException6__initZ@Base 12 ++ _D3std3net4curl20CurlTimeoutException6__vtblZ@Base 12 ++ _D3std3net4curl20CurlTimeoutException7__ClassZ@Base 12 ++ _D3std3net4curl3FTP10addCommandMFAxaZv@Base 12 ++ _D3std3net4curl3FTP10initializeMFZv@Base 12 ++ _D3std3net4curl3FTP11__fieldDtorMFZv@Base 12 ++ _D3std3net4curl3FTP13clearCommandsMFZv@Base 12 ++ _D3std3net4curl3FTP13contentLengthMFNdmZv@Base 12 ++ _D3std3net4curl3FTP15__fieldPostblitMFNaNbNiNlZv@Base 12 ++ _D3std3net4curl3FTP3dupMFZSQzQxQvQs@Base 12 ++ _D3std3net4curl3FTP3urlMFNdAxaZv@Base 12 ++ _D3std3net4curl3FTP4Impl11__xopEqualsMxFKxSQBpQBoQBnQBlQBkZb@Base 12 ++ _D3std3net4curl3FTP4Impl6__dtorMFZv@Base 12 ++ _D3std3net4curl3FTP4Impl6__initZ@Base 12 ++ _D3std3net4curl3FTP4Impl8opAssignMFNcNjSQBmQBlQBkQBiQBhZQr@Base 12 ++ _D3std3net4curl3FTP4Impl9__xtoHashFNbNeKxSQBoQBnQBmQBkQBjZm@Base 12 ++ _D3std3net4curl3FTP6__initZ@Base 12 ++ _D3std3net4curl3FTP6opCallFAxaZSQBeQBdQBcQBa@Base 12 ++ _D3std3net4curl3FTP6opCallFZSQBbQBaQzQw@Base 12 ++ _D3std3net4curl3FTP7performMFEQBc8typecons__T4FlagVAyaa12_7468726f774f6e4572726f72ZQBmZi@Base 12 ++ _D3std3net4curl3FTP8encodingMFNdAyaZv@Base 12 ++ _D3std3net4curl3FTP8encodingMFNdZAya@Base 12 ++ _D3std3net4curl3FTP8opAssignMFNcNjSQBhQBgQBfQBdZQo@Base 12 ++ _D3std3net4curl3FTP9__mixin1910dnsTimeoutMFNdS4core4time8DurationZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1910onProgressMFNdDFmmmmZiZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1910setNoProxyMFAyaZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1910tcpNoDelayMFNdbZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1910verifyHostMFNdbZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1910verifyPeerMFNdbZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1911dataTimeoutMFNdS4core4time8DurationZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1912netInterfaceMFNdAxaZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1912netInterfaceMFNdCQBu6socket15InternetAddressZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1912netInterfaceMFNdxG4hZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1914connectTimeoutMFNdS4core4time8DurationZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1914localPortRangeMFNdtZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1916operationTimeoutMFNdS4core4time8DurationZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1917setAuthenticationMFAxaQdQfZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1922setProxyAuthenticationMFAxaQdZv@Base 12 ++ _D3std3net4curl3FTP9__mixin1928defaultAsyncStringBufferSizek@Base 12 ++ _D3std3net4curl3FTP9__mixin195proxyMFNdAxaZv@Base 12 ++ _D3std3net4curl3FTP9__mixin196handleMFNcNdNjZSQBsQBrQBq4Curl@Base 12 ++ _D3std3net4curl3FTP9__mixin196onSendMFNdDFAvZmZv@Base 12 ++ _D3std3net4curl3FTP9__mixin197verboseMFNdbZv@Base 12 ++ _D3std3net4curl3FTP9__mixin198shutdownMFZv@Base 12 ++ _D3std3net4curl3FTP9__mixin199isStoppedMFNdZb@Base 12 ++ _D3std3net4curl3FTP9__mixin199localPortMFNdtZv@Base 12 ++ _D3std3net4curl3FTP9__mixin199onReceiveMFNdDFAhZmZv@Base 12 ++ _D3std3net4curl3FTP9__mixin199proxyPortMFNdtZv@Base 12 ++ _D3std3net4curl3FTP9__mixin199proxyTypeMFNdE3etc1cQBo9CurlProxyZv@Base 12 ++ _D3std3net4curl3FTP9getTimingMFE3etc1cQBc8CurlInfoKdZi@Base 12 ++ _D3std3net4curl4Curl10initializeMFZv@Base 12 ++ _D3std3net4curl4Curl10onProgressMFNdDFmmmmZiZv@Base 12 ++ _D3std3net4curl4Curl11errorStringMFiZAya@Base 12 ++ _D3std3net4curl4Curl13_seekCallbackUPvliZi@Base 12 ++ _D3std3net4curl4Curl13_sendCallbackUPammPvZm@Base 12 ++ _D3std3net4curl4Curl14onSocketOptionMFNdDFEQBp6socket8socket_tE3etc1cQCh12CurlSockTypeZiZv@Base 12 ++ _D3std3net4curl4Curl14throwOnStoppedMFAyaZv@Base 12 ++ _D3std3net4curl4Curl15onReceiveHeaderMFNdDFIAaZvZv@Base 12 ++ _D3std3net4curl4Curl16_receiveCallbackUxPammPvZm@Base 12 ++ _D3std3net4curl4Curl16clearIfSupportedMFE3etc1cQBl10CurlOptionZv@Base 12 ++ _D3std3net4curl4Curl17_progressCallbackUPvddddZi@Base 12 ++ _D3std3net4curl4Curl21_socketOptionCallbackUPvEQBt6socket8socket_tiZi@Base 12 ++ _D3std3net4curl4Curl22_receiveHeaderCallbackUxPammPvZm@Base 12 ++ _D3std3net4curl4Curl3dupMFZSQBaQzQxQu@Base 12 ++ _D3std3net4curl4Curl3setMFE3etc1cQx10CurlOptionAxaZv@Base 12 ++ _D3std3net4curl4Curl3setMFE3etc1cQx10CurlOptionPvZv@Base 12 ++ _D3std3net4curl4Curl3setMFE3etc1cQx10CurlOptionlZv@Base 12 ++ _D3std3net4curl4Curl5clearMFE3etc1cQz10CurlOptionZv@Base 12 ++ _D3std3net4curl4Curl5pauseMFbbZv@Base 12 ++ _D3std3net4curl4Curl6__initZ@Base 12 ++ _D3std3net4curl4Curl6_checkMFiZv@Base 12 ++ _D3std3net4curl4Curl6onSeekMFNdDFlE3etc1cQBf11CurlSeekPosZEQyQwQCb8CurlSeekZv@Base 12 ++ _D3std3net4curl4Curl6onSendMFNdDFAvZmZv@Base 12 ++ _D3std3net4curl4Curl7performMFEQBd8typecons__T4FlagVAyaa12_7468726f774f6e4572726f72ZQBmZi@Base 12 ++ _D3std3net4curl4Curl7stoppedMxFNdZb@Base 12 ++ _D3std3net4curl4Curl8shutdownMFZv@Base 12 ++ _D3std3net4curl4Curl9getTimingMFE3etc1cQBd8CurlInfoKdZi@Base 12 ++ _D3std3net4curl4Curl9onReceiveMFNdDFAhZmZv@Base 12 ++ _D3std3net4curl4CurlQkFNcNdZSQBbQBaQz7CurlAPI3API@Base 12 ++ _D3std3net4curl4HTTP10StatusLine11__xopEqualsMxFKxSQBxQBwQBvQBtQBrZb@Base 12 ++ _D3std3net4curl4HTTP10StatusLine5resetMFNfZv@Base 12 ++ _D3std3net4curl4HTTP10StatusLine6__initZ@Base 12 ++ _D3std3net4curl4HTTP10StatusLine8toStringMxFZAya@Base 12 ++ _D3std3net4curl4HTTP10StatusLine9__xtoHashFNbNeKxSQBwQBvQBuQBsQBqZm@Base 12 ++ _D3std3net4curl4HTTP10initializeMFZv@Base 12 ++ _D3std3net4curl4HTTP10statusLineMFNdZSQBkQBjQBiQBg10StatusLine@Base 12 ++ _D3std3net4curl4HTTP11__fieldDtorMFZv@Base 12 ++ _D3std3net4curl4HTTP11setPostDataMFAxvAyaZv@Base 12 ++ _D3std3net4curl4HTTP12maxRedirectsMFNdkZv@Base 12 ++ _D3std3net4curl4HTTP12setCookieJarMFAxaZv@Base 12 ++ _D3std3net4curl4HTTP12setUserAgentMFAxaZv@Base 12 ++ _D3std3net4curl4HTTP13contentLengthMFNdmZv@Base 12 ++ _D3std3net4curl4HTTP14flushCookieJarMFZv@Base 12 ++ _D3std3net4curl4HTTP15__fieldPostblitMFNaNbNiNlZv@Base 12 ++ _D3std3net4curl4HTTP15clearAllCookiesMFZv@Base 12 ++ _D3std3net4curl4HTTP15onReceiveHeaderMFNdDFIAaIQdZvZv@Base 12 ++ _D3std3net4curl4HTTP15parseStatusLineFNfxAaJSQBrQBqQBpQBn10StatusLineZb@Base 12 ++ _D3std3net4curl4HTTP15responseHeadersMFNdZHAyaQd@Base 12 ++ _D3std3net4curl4HTTP16addRequestHeaderMFAxaQdZv@Base 12 ++ _D3std3net4curl4HTTP16defaultUserAgentFNdZ3bufG63a@Base 12 ++ _D3std3net4curl4HTTP16defaultUserAgentFNdZ9userAgentAya@Base 12 ++ _D3std3net4curl4HTTP16defaultUserAgentFNdZAya@Base 12 ++ _D3std3net4curl4HTTP16setTimeConditionMFE3etc1cQBl12CurlTimeCondSQCl8datetime7systime7SysTimeZv@Base 12 ++ _D3std3net4curl4HTTP19clearRequestHeadersMFZv@Base 12 ++ _D3std3net4curl4HTTP19clearSessionCookiesMFZv@Base 12 ++ _D3std3net4curl4HTTP19defaultMaxRedirectsk@Base 12 ++ _D3std3net4curl4HTTP19onReceiveStatusLineMFNdDFSQBuQBtQBsQBq10StatusLineZvZv@Base 12 ++ _D3std3net4curl4HTTP20authenticationMethodMFNdE3etc1cQBr8CurlAuthZv@Base 12 ++ _D3std3net4curl4HTTP3dupMFZSQBaQzQxQu@Base 12 ++ _D3std3net4curl4HTTP3urlMFNdAxaZv@Base 12 ++ _D3std3net4curl4HTTP4Impl11__xopEqualsMxFKxSQBqQBpQBoQBmQBkZb@Base 12 ++ _D3std3net4curl4HTTP4Impl15onReceiveHeaderMFNdDFIAaIQdZvZv@Base 12 ++ _D3std3net4curl4HTTP4Impl6__dtorMFZv@Base 12 ++ _D3std3net4curl4HTTP4Impl6__initZ@Base 12 ++ _D3std3net4curl4HTTP4Impl8opAssignMFNcNjSQBnQBmQBlQBjQBhZQr@Base 12 ++ _D3std3net4curl4HTTP4Impl9__xtoHashFNbNeKxSQBpQBoQBnQBlQBjZm@Base 12 ++ _D3std3net4curl4HTTP6__initZ@Base 12 ++ _D3std3net4curl4HTTP6caInfoMFNdAxaZv@Base 12 ++ _D3std3net4curl4HTTP6methodMFNdEQBeQBdQBcQBa6MethodZv@Base 12 ++ _D3std3net4curl4HTTP6methodMFNdZEQBfQBeQBdQBb6Method@Base 12 ++ _D3std3net4curl4HTTP6opCallFAxaZSQBfQBeQBdQBb@Base 12 ++ _D3std3net4curl4HTTP6opCallFZSQBcQBbQBaQy@Base 12 ++ _D3std3net4curl4HTTP7performMFEQBd8typecons__T4FlagVAyaa12_7468726f774f6e4572726f72ZQBmZi@Base 12 ++ _D3std3net4curl4HTTP8opAssignMFNcNjSQBiQBhQBgQBeZQo@Base 12 ++ _D3std3net4curl4HTTP8postDataMFNdAxaZv@Base 12 ++ _D3std3net4curl4HTTP8postDataMFNdAxvZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4610dnsTimeoutMFNdS4core4time8DurationZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4610onProgressMFNdDFmmmmZiZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4610setNoProxyMFAyaZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4610tcpNoDelayMFNdbZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4610verifyHostMFNdbZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4610verifyPeerMFNdbZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4611dataTimeoutMFNdS4core4time8DurationZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4612netInterfaceMFNdAxaZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4612netInterfaceMFNdCQBv6socket15InternetAddressZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4612netInterfaceMFNdxG4hZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4614connectTimeoutMFNdS4core4time8DurationZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4614localPortRangeMFNdtZv@Base 12 ++ _D3std3net4curl4HTTP9__mixin4616operationTimeoutMFNdS4core4time8DurationZv@Base 12 ++ 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_D3std3uni11__moduleRefZ@Base 12 ++ _D3std3uni11caseEncloseFNaNfSQBbQBa__T13InversionListTSQCbQCa8GcPolicyZQBhZQBv@Base 12 ++ _D3std3uni11composeJamoFNaNbNiNfwwwZw@Base 12 ++ _D3std3uni11isGraphicalFNaNbNiNfwZb@Base 12 ++ _D3std3uni11isSurrogateFNaNbNiNfwZb@Base 12 ++ _D3std3uni11safeWrite24FNaNbNiMPhkmZv@Base 12 ++ _D3std3uni11toTitlecaseFNaNbNiNfwZw@Base 12 ++ _D3std3uni12__ModuleInfoZ@Base 12 ++ _D3std3uni12fullCaseTrieFNaNbNdNiNfZ3resySQBoQBn__T4TrieTtTwVmi1114112TSQCsQCr__T9sliceBitsVmi13Vmi21ZQvTSQEaQDz__TQBiVmi6Vmi13ZQBvTSQFbQFa__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni12fullCaseTrieFNaNbNdNiNfZySQBkQBj__T4TrieTtTwVmi1114112TSQCoQCn__T9sliceBitsVmi13Vmi21ZQvTSQDwQDv__TQBiVmi6Vmi13ZQBvTSQExQEw__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni12isPow2OrZeroFNaNbNiNfmZb@Base 12 ++ _D3std3uni12isPrivateUseFNaNbNiNfwZb@Base 12 ++ _D3std3uni12toLowerIndexFNaNbNiNewZt@Base 12 ++ _D3std3uni12toTitleIndexFNaNbNiNewZt@Base 12 ++ _D3std3uni12toUpperIndexFNaNbNiNewZt@Base 12 ++ _D3std3uni13ReallocPolicy6__initZ@Base 12 ++ _D3std3uni13ReallocPolicy__T5allocTkZQjFNaNbNiNemZAk@Base 12 ++ _D3std3uni13ReallocPolicy__T6appendTkTiZQmFNaNbNiNfKAkiZv@Base 12 ++ _D3std3uni13ReallocPolicy__T7destroyTkZQlFNaNbNiNeMKAkZv@Base 12 ++ _D3std3uni13ReallocPolicy__T7reallocTkZQlFNaNbNiNeNkMAkmZQe@Base 12 ++ _D3std3uni13getUnicodeSetFNfMxAabbZSQBiQBh__T13InversionListTSQCiQCh8GcPolicyZQBh@Base 12 ++ _D3std3uni13graphicalTrieFNaNbNdNiNfZ3resySQBpQBo__T4TrieTSQCfQCe__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDvQDu__T9sliceBitsVmi13Vmi21ZQvTSQFdQFc__TQBiVmi8Vmi13ZQBvTSQGeQGd__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni13graphicalTrieFNaNbNdNiNfZySQBlQBk__T4TrieTSQCbQCa__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDrQDq__T9sliceBitsVmi13Vmi21ZQvTSQEzQEy__TQBiVmi8Vmi13ZQBvTSQGaQFz__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni13isPunctuationFNaNbNiNfwZb@Base 12 ++ _D3std3uni13isSurrogateHiFNaNbNiNfwZb@Base 12 ++ _D3std3uni13isSurrogateLoFNaNbNiNfwZb@Base 12 ++ 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_D3std3uni14decompressFromFNaNfMAxhKmZk@Base 12 ++ _D3std3uni14isNonCharacterFNaNbNiNfwZb@Base 12 ++ _D3std3uni14simpleCaseTrieFNaNbNdNiNfZ3resySQBqQBp__T4TrieTtTwVmi1114112TSQCuQCt__T9sliceBitsVmi13Vmi21ZQvTSQEcQEb__TQBiVmi6Vmi13ZQBvTSQFdQFc__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni14simpleCaseTrieFNaNbNdNiNfZySQBmQBl__T4TrieTtTwVmi1114112TSQCqQCp__T9sliceBitsVmi13Vmi21ZQvTSQDyQDx__TQBiVmi6Vmi13ZQBvTSQEzQEy__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni14toLowerInPlaceFNaNfKAaZv@Base 12 ++ _D3std3uni14toLowerInPlaceFNaNfKAuZv@Base 12 ++ _D3std3uni14toLowerInPlaceFNaNfKAwZv@Base 12 ++ _D3std3uni14toUpperInPlaceFNaNfKAaZv@Base 12 ++ _D3std3uni14toUpperInPlaceFNaNfKAuZv@Base 12 ++ _D3std3uni14toUpperInPlaceFNaNfKAwZv@Base 12 ++ _D3std3uni15decomposeHangulFNfwZSQBfQBe8Grapheme@Base 12 ++ _D3std3uni15hangulRecomposeFNaNbNiNfMAwZv@Base 12 ++ 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_D3std3uni16toTitleIndexTrieFNaNbNdNiNfZySQBoQBn__T4TrieTtTwVmi1114112TSQCsQCr__T9sliceBitsVmi13Vmi21ZQvTSQEaQDz__TQBiVmi6Vmi13ZQBvTSQFbQFa__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni16toUpperIndexTrieFNaNbNdNiNfZ3resySQBsQBr__T4TrieTtTwVmi1114112TSQCwQCv__T9sliceBitsVmi13Vmi21ZQvTSQEeQEd__TQBiVmi6Vmi13ZQBvTSQFfQFe__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni16toUpperIndexTrieFNaNbNdNiNfZySQBoQBn__T4TrieTtTwVmi1114112TSQCsQCr__T9sliceBitsVmi13Vmi21ZQvTSQEaQDz__TQBiVmi6Vmi13ZQBvTSQFbQFa__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni16unalignedWrite24FNaNbNiMPhkmZv@Base 12 ++ _D3std3uni17CodepointInterval11__xopEqualsMxFKxSQBuQBtQBsZb@Base 12 ++ _D3std3uni17CodepointInterval1aMNgFNaNbNcNdNiNjNfZNgk@Base 12 ++ _D3std3uni17CodepointInterval1bMNgFNaNbNcNdNiNjNfZNgk@Base 12 ++ _D3std3uni17CodepointInterval6__ctorMFNaNbNcNiNfkkZSQByQBxQBw@Base 12 ++ _D3std3uni17CodepointInterval6__initZ@Base 12 ++ _D3std3uni17CodepointInterval__T8opEqualsTxSQBqQBpQBoZQwMxFNaNbNiNfxQzZb@Base 12 ++ _D3std3uni17compatMappingTrieFNaNbNdNiNfZ3resySQBtQBs__T4TrieTtTwVmi1114112TSQCxQCw__T9sliceBitsVmi13Vmi21ZQvTSQEfQEe__TQBiVmi5Vmi13ZQBvTSQFgQFf__TQCjVmi0Vmi5ZQCvZQEd@Base 12 ++ _D3std3uni17compatMappingTrieFNaNbNdNiNfZySQBpQBo__T4TrieTtTwVmi1114112TSQCtQCs__T9sliceBitsVmi13Vmi21ZQvTSQEbQEa__TQBiVmi5Vmi13ZQBvTSQFcQFb__TQCjVmi0Vmi5ZQCvZQEd@Base 12 ++ _D3std3uni18combiningClassTrieFNaNbNdNiNfZ3resySQBuQBt__T4TrieThTwVmi1114112TSQCyQCx__T9sliceBitsVmi13Vmi21ZQvTSQEgQEf__TQBiVmi6Vmi13ZQBvTSQFhQFg__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni18combiningClassTrieFNaNbNdNiNfZySQBqQBp__T4TrieThTwVmi1114112TSQCuQCt__T9sliceBitsVmi13Vmi21ZQvTSQEcQEb__TQBiVmi6Vmi13ZQBvTSQFdQFc__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni18graphemeExtendTrieFNaNbNdNiNfZ3resySQBuQBt__T4TrieTSQCkQCj__T9BitPackedTbVmi1ZQrTwVmi1114112TSQEaQDz__T9sliceBitsVmi13Vmi21ZQvTSQFiQFh__TQBiVmi8Vmi13ZQBvTSQGjQGi__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni18graphemeExtendTrieFNaNbNdNiNfZySQBqQBp__T4TrieTSQCgQCf__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDwQDv__T9sliceBitsVmi13Vmi21ZQvTSQFeQFd__TQBiVmi8Vmi13ZQBvTSQGfQGe__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni18simpleCaseFoldingsFNaNbNiNfwZSQBoQBnQBmFNfwZ5Range@Base 12 ++ _D3std3uni18simpleCaseFoldingsFNfwZ5Range5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3uni18simpleCaseFoldingsFNfwZ5Range5frontMxFNaNbNdNiNfZw@Base 12 ++ _D3std3uni18simpleCaseFoldingsFNfwZ5Range6__ctorMFNaNbNcNiNfkkZSQCkQCjQCiFNfwZQBr@Base 12 ++ _D3std3uni18simpleCaseFoldingsFNfwZ5Range6__ctorMFNaNbNcNiNfwZSQCjQCiQChFNfwZQBq@Base 12 ++ _D3std3uni18simpleCaseFoldingsFNfwZ5Range6__initZ@Base 12 ++ _D3std3uni18simpleCaseFoldingsFNfwZ5Range6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni18simpleCaseFoldingsFNfwZ5Range7isSmallMxFNaNbNdNiNfZb@Base 12 ++ _D3std3uni18simpleCaseFoldingsFNfwZ5Range8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3uni18toLowerSimpleIndexFNaNbNiNewZt@Base 12 ++ _D3std3uni18toTitleSimpleIndexFNaNbNiNewZt@Base 12 ++ _D3std3uni18toUpperSimpleIndexFNaNbNiNewZt@Base 12 ++ _D3std3uni19compositionJumpTrieFNaNbNdNiNfZ3resySQBvQBu__T4TrieTtTwVmi1114112TSQCzQCy__T9sliceBitsVmi9Vmi21ZQuTSQEgQEf__TQBhVmi0Vmi9ZQBtZQDb@Base 12 ++ _D3std3uni19compositionJumpTrieFNaNbNdNiNfZySQBrQBq__T4TrieTtTwVmi1114112TSQCvQCu__T9sliceBitsVmi9Vmi21ZQuTSQEcQEb__TQBhVmi0Vmi9ZQBtZQDb@Base 12 ++ _D3std3uni19decompressIntervalsFNaNfAxhZSQBnQBm21DecompressedIntervals@Base 12 ++ _D3std3uni19hangulSyllableIndexFNaNbNiNfwZi@Base 12 ++ _D3std3uni19isRegionalIndicatorFNaNbNiNfwZb@Base 12 ++ _D3std3uni21DecompressedIntervals11__xopEqualsMxFKxSQByQBxQBwZb@Base 12 ++ _D3std3uni21DecompressedIntervals4saveMFNaNdNjNfZSQBwQBvQBu@Base 12 ++ _D3std3uni21DecompressedIntervals5emptyMxFNaNdNfZb@Base 12 ++ _D3std3uni21DecompressedIntervals5frontMFNaNdNfZSQBvQBu17CodepointInterval@Base 12 ++ _D3std3uni21DecompressedIntervals6__ctorMFNaNcNfAxhZSQBzQByQBx@Base 12 ++ _D3std3uni21DecompressedIntervals6__initZ@Base 12 ++ _D3std3uni21DecompressedIntervals8popFrontMFNaNfZv@Base 12 ++ _D3std3uni21DecompressedIntervals9__xtoHashFNbNeKxSQBxQBwQBvZm@Base 12 ++ _D3std3uni22toLowerSimpleIndexTrieFNaNbNdNiNfZ3resySQByQBx__T4TrieTtTwVmi1114112TSQDcQDb__T9sliceBitsVmi13Vmi21ZQvTSQEkQEj__TQBiVmi6Vmi13ZQBvTSQFlQFk__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni22toLowerSimpleIndexTrieFNaNbNdNiNfZySQBuQBt__T4TrieTtTwVmi1114112TSQCyQCx__T9sliceBitsVmi13Vmi21ZQvTSQEgQEf__TQBiVmi6Vmi13ZQBvTSQFhQFg__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni22toTitleSimpleIndexTrieFNaNbNdNiNfZ3resySQByQBx__T4TrieTtTwVmi1114112TSQDcQDb__T9sliceBitsVmi13Vmi21ZQvTSQEkQEj__TQBiVmi6Vmi13ZQBvTSQFlQFk__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni22toTitleSimpleIndexTrieFNaNbNdNiNfZySQBuQBt__T4TrieTtTwVmi1114112TSQCyQCx__T9sliceBitsVmi13Vmi21ZQvTSQEgQEf__TQBiVmi6Vmi13ZQBvTSQFhQFg__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni22toUpperSimpleIndexTrieFNaNbNdNiNfZ3resySQByQBx__T4TrieTtTwVmi1114112TSQDcQDb__T9sliceBitsVmi13Vmi21ZQvTSQEkQEj__TQBiVmi6Vmi13ZQBvTSQFlQFk__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni22toUpperSimpleIndexTrieFNaNbNdNiNfZySQBuQBt__T4TrieTtTwVmi1114112TSQCyQCx__T9sliceBitsVmi13Vmi21ZQvTSQEgQEf__TQBiVmi6Vmi13ZQBvTSQFhQFg__TQCjVmi0Vmi6ZQCvZQEd@Base 12 ++ _D3std3uni23genUnrolledSwitchSearchFNaNbNfmZAya@Base 12 ++ _D3std3uni4icmpFNaNbNiNfAxaQdZi@Base 12 ++ _D3std3uni4icmpFNaNbNiNfAxuQdZi@Base 12 ++ _D3std3uni4icmpFNaNbNiNfAxwQdZi@Base 12 ++ _D3std3uni5asSetFNaNfAxhZSQyQw__T13InversionListTSQBwQBv8GcPolicyZQBh@Base 12 ++ _D3std3uni5low_8FNaNbNiNfkZk@Base 12 ++ _D3std3uni5sicmpFNaNbNiNfMAxaMQeZi@Base 12 ++ _D3std3uni5sicmpFNaNbNiNfMAxuMQeZi@Base 12 ++ _D3std3uni5sicmpFNaNbNiNfMAxwMQeZi@Base 12 ++ _D3std3uni6hangLVFNaNbNdNiNfZ3resySQBhQBg__T4TrieTSQBxQBw__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDnQDm__T9sliceBitsVmi13Vmi21ZQvTSQEvQEu__TQBiVmi8Vmi13ZQBvTSQFwQFv__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni6hangLVFNaNbNdNiNfZySQBdQBc__T4TrieTSQBtQBs__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDjQDi__T9sliceBitsVmi13Vmi21ZQvTSQErQEq__TQBiVmi8Vmi13ZQBvTSQFsQFr__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni6isMarkFNaNbNiNfwZb@Base 12 ++ _D3std3uni6mcTrieFNaNbNdNiNfZ3resySQBhQBg__T4TrieTSQBxQBw__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDnQDm__T9sliceBitsVmi13Vmi21ZQvTSQEvQEu__TQBiVmi8Vmi13ZQBvTSQFwQFv__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni6mcTrieFNaNbNdNiNfZySQBdQBc__T4TrieTSQBtQBs__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDjQDi__T9sliceBitsVmi13Vmi21ZQvTSQErQEq__TQBiVmi8Vmi13ZQBvTSQFsQFr__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni6read24FNaNbNiMxPhmZk@Base 12 ++ _D3std3uni7composeFNaNbNfwwZw@Base 12 ++ _D3std3uni7hangLVTFNaNbNdNiNfZ3resySQBiQBh__T4TrieTSQByQBx__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDoQDn__T9sliceBitsVmi13Vmi21ZQvTSQEwQEv__TQBiVmi8Vmi13ZQBvTSQFxQFw__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni7hangLVTFNaNbNdNiNfZySQBeQBd__T4TrieTSQBuQBt__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDkQDj__T9sliceBitsVmi13Vmi21ZQvTSQEsQEr__TQBiVmi8Vmi13ZQBvTSQFtQFs__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni7isAlphaFNaNbNiNfwZb@Base 12 ++ _D3std3uni7isJamoLFNaNbNiNfwZb@Base 12 ++ _D3std3uni7isJamoTFNaNbNiNfwZb@Base 12 ++ _D3std3uni7isJamoVFNaNbNiNfwZb@Base 12 ++ _D3std3uni7isLowerFNaNbNiNfwZb@Base 12 ++ _D3std3uni7isSpaceFNaNbNiNfwZb@Base 12 ++ _D3std3uni7isUpperFNaNbNiNfwZb@Base 12 ++ _D3std3uni7isWhiteFNaNbNiNfwZb@Base 12 ++ _D3std3uni7toLowerFNaNbNiNfwZw@Base 12 ++ _D3std3uni7toLowerFNaNfNkMAyaZQe@Base 12 ++ _D3std3uni7toLowerFNaNfNkMAyuZQe@Base 12 ++ _D3std3uni7toLowerFNaNfNkMAywZQe@Base 12 ++ _D3std3uni7toUpperFNaNbNiNfwZw@Base 12 ++ _D3std3uni7toUpperFNaNfNkMAyaZQe@Base 12 ++ _D3std3uni7toUpperFNaNfNkMAyuZQe@Base 12 ++ _D3std3uni7toUpperFNaNfNkMAywZQe@Base 12 ++ _D3std3uni7unicode18hangulSyllableType6__initZ@Base 12 ++ _D3std3uni7unicode5block6__initZ@Base 12 ++ _D3std3uni7unicode6__initZ@Base 12 ++ _D3std3uni7unicode6script6__initZ@Base 12 ++ _D3std3uni7unicode7findAnyFNfAyaZb@Base 12 ++ _D3std3uni7unicode__T10opDispatchVAyaa10_416c7068616265746963ZQBpFNaNdNfZSQCuQCt__T13InversionListTSQDuQDt8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T10opDispatchVAyaa11_57686974655f5370616365ZQBrFNaNdNfZSQCwQCv__T13InversionListTSQDwQDv8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T10opDispatchVAyaa2_4c43ZQyFNaNdNfZSQCcQCb__T13InversionListTSQDcQDb8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T10opDispatchVAyaa2_4d63ZQyFNaNdNfZSQCcQCb__T13InversionListTSQDcQDb8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T10opDispatchVAyaa2_4d65ZQyFNaNdNfZSQCcQCb__T13InversionListTSQDcQDb8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T10opDispatchVAyaa2_4d6eZQyFNaNdNfZSQCcQCb__T13InversionListTSQDcQDb8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T10opDispatchVAyaa2_4e64ZQyFNaNdNfZSQCcQCb__T13InversionListTSQDcQDb8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T10opDispatchVAyaa2_5063ZQyFNaNdNfZSQCcQCb__T13InversionListTSQDcQDb8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T10opDispatchVAyaa5_4153434949ZQBeFNaNdNfZSQCjQCi__T13InversionListTSQDjQDi8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T16parseControlCodeTSQBn5regex8internal6parser__T6ParserTAyaTSQDcQBpQBmQBg7CodeGenZQBiZQDiFNaNfKQCyZw@Base 12 ++ _D3std3uni7unicode__T16parseControlCodeTSQBnQBm__T16UnicodeSetParserTSQCq5regex8internal6parser__T6ParserTAyaTSQEfQBpQBmQBg7CodeGenZQBiZQDiZQEpFNaNfKQEfZw@Base 12 ++ _D3std3uni7unicode__T17parsePropertySpecTSQBo5regex8internal6parser__T6ParserTAyaTSQDdQBpQBmQBg7CodeGenZQBiZQDjFNfKQCwbbZSQEqQEp__T13InversionListTSQFqQFp8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T17parsePropertySpecTSQBoQBn__T16UnicodeSetParserTSQCr5regex8internal6parser__T6ParserTAyaTSQEgQBpQBmQBg7CodeGenZQBiZQDiZQEqFNfKQEdbbZSQFxQFw__T13InversionListTSQGxQGw8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T6opCallTaZQkFNaNfMxAaZSQBqQBp__T13InversionListTSQCqQCp8GcPolicyZQBh@Base 12 ++ _D3std3uni7unicode__T7loadAnyTSQBdQBc__T13InversionListTSQCdQCc8GcPolicyZQBhTaZQCgFNaNfMxAaZQCk@Base 12 ++ _D3std3uni7unicode__T8parseSetTSQBe5regex8internal6parser__T6ParserTAyaTSQCtQBpQBmQBg7CodeGenZQBiZQCzFNfKQCwbZSQEfQEe__T13InversionListTSQFfQFe8GcPolicyZQBh@Base 12 ++ _D3std3uni7write24FNaNbNiMPhkmZv@Base 12 ++ _D3std3uni8GcPolicy6__initZ@Base 12 ++ _D3std3uni8GcPolicy__T5allocTkZQjFNaNbNfmZAk@Base 12 ++ _D3std3uni8GcPolicy__T6appendTkTiZQmFNaNbNfKAkiZv@Base 12 ++ _D3std3uni8GcPolicy__T7destroyTAkZQmFNaNbNiNfKQpZv@Base 12 ++ _D3std3uni8GcPolicy__T7reallocTkZQlFNaNbNfAkmZQe@Base 12 ++ _D3std3uni8Grapheme10__postblitMFNaNbNiNeZv@Base 12 ++ _D3std3uni8Grapheme11smallLengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni8Grapheme12convertToBigMFNaNbNiNeZv@Base 12 ++ _D3std3uni8Grapheme13opIndexAssignMFNaNbNiNewmZv@Base 12 ++ _D3std3uni8Grapheme5isBigMxFNaNbNdNiNfZh@Base 12 ++ _D3std3uni8Grapheme6__dtorMFNaNbNiNeZv@Base 12 ++ _D3std3uni8Grapheme6__initZ@Base 12 ++ _D3std3uni8Grapheme6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni8Grapheme6setBigMFNaNbNiNfZv@Base 12 ++ _D3std3uni8Grapheme7opIndexMxFNaNbNiNemZw@Base 12 ++ _D3std3uni8Grapheme7opSliceMFNaNbNiNjNfZSQBnQBm__T16SliceOverIndexedTSQCqQCpQCoZQBe@Base 12 ++ _D3std3uni8Grapheme7opSliceMFNaNbNiNjNfmmZSQBpQBo__T16SliceOverIndexedTSQCsQCrQCqZQBe@Base 12 ++ _D3std3uni8Grapheme8opAssignMFNaNbNcNiNjNeSQBpQBoQBnZQl@Base 12 ++ _D3std3uni8Grapheme__T10opOpAssignVAyaa1_7eTAxiZQBaMFNaNbNcNiNfMQuZSQCoQCnQCm@Base 12 ++ _D3std3uni8Grapheme__T10opOpAssignVAyaa1_7eTAxwZQBaMFNaNbNcNiNfMQuZSQCoQCnQCm@Base 12 ++ _D3std3uni8Grapheme__T10opOpAssignVAyaa1_7eZQwMFNaNbNcNiNewZSQChQCgQCf@Base 12 ++ _D3std3uni8Grapheme__T6__ctorTiZQkMFNaNbNcNiNfMxAiXSQByQBxQBw@Base 12 ++ _D3std3uni8Grapheme__T6__ctorTwZQkMFNaNbNcNiNfMxAwXSQByQBxQBw@Base 12 ++ _D3std3uni8encodeToFNaNbNiNeMAamwZm@Base 12 ++ _D3std3uni8encodeToFNaNbNiNeMAwmwZm@Base 12 ++ _D3std3uni8encodeToFNaNeMAumwZm@Base 12 ++ _D3std3uni8isFormatFNaNbNiNfwZb@Base 12 ++ _D3std3uni8isNumberFNaNbNiNfwZb@Base 12 ++ _D3std3uni8isSymbolFNaNbNiNfwZb@Base 12 ++ _D3std3uni8markTrieFNaNbNdNiNfZ3resySQBjQBi__T4TrieTSQBzQBy__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDpQDo__T9sliceBitsVmi13Vmi21ZQvTSQExQEw__TQBiVmi8Vmi13ZQBvTSQFyQFx__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni8markTrieFNaNbNdNiNfZySQBfQBe__T4TrieTSQBvQBu__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDlQDk__T9sliceBitsVmi13Vmi21ZQvTSQEtQEs__TQBiVmi8Vmi13ZQBvTSQFuQFt__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni8midlow_8FNaNbNiNfkZk@Base 12 ++ _D3std3uni9alphaTrieFNaNbNdNiNfZ3resySQBkQBj__T4TrieTSQCaQBz__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDqQDp__T9sliceBitsVmi13Vmi21ZQvTSQEyQEx__TQBiVmi8Vmi13ZQBvTSQFzQFy__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni9alphaTrieFNaNbNdNiNfZySQBgQBf__T4TrieTSQBwQBv__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDmQDl__T9sliceBitsVmi13Vmi21ZQvTSQEuQEt__TQBiVmi8Vmi13ZQBvTSQFvQFu__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni9isControlFNaNbNiNfwZb@Base 12 ++ _D3std3uni9nfcQCTrieFNaNbNdNiNfZ3resySQBkQBj__T4TrieTSQCaQBz__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDqQDp__T9sliceBitsVmi13Vmi21ZQvTSQEyQEx__TQBiVmi8Vmi13ZQBvTSQFzQFy__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni9nfcQCTrieFNaNbNdNiNfZySQBgQBf__T4TrieTSQBwQBv__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDmQDl__T9sliceBitsVmi13Vmi21ZQvTSQEuQEt__TQBiVmi8Vmi13ZQBvTSQFvQFu__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni9nfdQCTrieFNaNbNdNiNfZ3resySQBkQBj__T4TrieTSQCaQBz__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDqQDp__T9sliceBitsVmi13Vmi21ZQvTSQEyQEx__TQBiVmi8Vmi13ZQBvTSQFzQFy__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni9nfdQCTrieFNaNbNdNiNfZySQBgQBf__T4TrieTSQBwQBv__T9BitPackedTbVmi1ZQrTwVmi1114112TSQDmQDl__T9sliceBitsVmi13Vmi21ZQvTSQEuQEt__TQBiVmi8Vmi13ZQBvTSQFvQFu__TQCjVmi0Vmi8ZQCvZQFf@Base 12 ++ _D3std3uni9recomposeFNaNbNfmMAwMAhZm@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs11__xopEqualsMxFKxSQCzQCy__TQCxTQCoTtZQDhZb@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs6__ctorMFNaNbNcNfAmXSQDbQDa__TQCzTQCqTtZQDj@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs6__ctorMxFNaNbNcNiNjNfAxmQdNkMQiZxSQDpQDo__TQDnTQDeTtZQDx@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs6__initZ@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs9__xtoHashFNbNeKxSQCyQCx__TQCwTQCnTtZQDgZm@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T3ptrVmi0ZQjMNgFNaNbNdNiZNgSQDkQDj__T13PackedPtrImplTQDlVmi16ZQz@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T3ptrVmi1ZQjMNgFNaNbNdNiZNgSQDkQDj__T13PackedPtrImplTtVmi16ZQx@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T5sliceVmi0ZQlMNgFNaNbNdNiZNgSQDmQDl__T19PackedArrayViewImplTQDtVmi16ZQBf@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T5sliceVmi1ZQlMNgFNaNbNdNiZNgSQDmQDl__T19PackedArrayViewImplTtVmi16ZQBd@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T6lengthVmi0ZQmMFNaNbNdmZv@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T6lengthVmi0ZQmMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T6lengthVmi1ZQmMFNaNbNdNfmZv@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T6lengthVmi1ZQmMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T7raw_ptrVmi0ZQnMNgFNaNbNdNiZPNgm@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi12ZQsTtZQBs__T7raw_ptrVmi1ZQnMNgFNaNbNdNiZPNgm@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi13ZQsTSQCcQCb__TQBfTbVmi1ZQBpZQCo11__xopEqualsMxFKxSQDvQDu__TQDtTQDkTQClZQEfZb@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi13ZQsTSQCcQCb__TQBfTbVmi1ZQBpZQCo6__ctorMFNaNbNcNfAmXSQDxQDw__TQDvTQDmTQCnZQEh@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi13ZQsTSQCcQCb__TQBfTbVmi1ZQBpZQCo6__ctorMxFNaNbNcNiNjNfAxmQdNkMQiZxSQElQEk__TQEjTQEaTQDbZQEv@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi13ZQsTSQCcQCb__TQBfTbVmi1ZQBpZQCo6__initZ@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi13ZQsTSQCcQCb__TQBfTbVmi1ZQBpZQCo9__xtoHashFNbNeKxSQDuQDt__TQDsTQDjTQCkZQEeZm@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi13ZQsTSQCcQCb__TQBfTbVmi1ZQBpZQCo__T3ptrVmi0ZQjMNgFNaNbNdNiZNgSQEgQEf__T13PackedPtrImplTQEhVmi16ZQz@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi13ZQsTSQCcQCb__TQBfTbVmi1ZQBpZQCo__T3ptrVmi1ZQjMNgFNaNbNdNiZNgSQEgQEf__T13PackedPtrImplTQDeVmi1ZQy@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi13ZQsTSQCcQCb__TQBfTbVmi1ZQBpZQCo__T5sliceVmi0ZQlMNgFNaNbNdNiZNgSQEiQEh__T19PackedArrayViewImplTQEpVmi16ZQBf@Base 12 ++ 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12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi8ZQrTSQCbQCa__TQBeTkVmi13ZQBpTSQDaQCz__TQCdTbVmi1ZQCnZQDm__T3ptrVmi2ZQjMNgFNaNbNdNiZNgSQFeQFd__T13PackedPtrImplTQDeVmi1ZQy@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi8ZQrTSQCbQCa__TQBeTkVmi13ZQBpTSQDaQCz__TQCdTbVmi1ZQCnZQDm__T5sliceVmi0ZQlMNgFNaNbNdNiZNgSQFgQFf__T19PackedArrayViewImplTQFnVmi8ZQBe@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi8ZQrTSQCbQCa__TQBeTkVmi13ZQBpTSQDaQCz__TQCdTbVmi1ZQCnZQDm__T5sliceVmi1ZQlMNgFNaNbNdNiZNgSQFgQFf__T19PackedArrayViewImplTQElVmi16ZQBf@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi8ZQrTSQCbQCa__TQBeTkVmi13ZQBpTSQDaQCz__TQCdTbVmi1ZQCnZQDm__T5sliceVmi2ZQlMNgFNaNbNdNiZNgSQFgQFf__T19PackedArrayViewImplTQDmVmi1ZQBe@Base 12 ++ _D3std3uni__T10MultiArrayTSQzQx__T9BitPackedTkVmi8ZQrTSQCbQCa__TQBeTkVmi13ZQBpTSQDaQCz__TQCdTbVmi1ZQCnZQDm__T6lengthVmi0ZQmMFNaNbNdmZv@Base 12 ++ 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_D3std3uni__T12mapTrieIndexTSQBbQBa__T9sliceBitsVmi14Vmi21ZQvTSQCjQCi__TQBiVmi10Vmi14ZQBwTSQDlQDk__TQCkVmi6Vmi10ZQCxTSQEmQEl__TQDlVmi0Vmi6ZQDxZ__TQFdTiZQFjFNaNbNiNfiZm@Base 12 ++ _D3std3uni__T12mapTrieIndexTSQBbQBa__T9sliceBitsVmi14Vmi21ZQvTSQCjQCi__TQBiVmi10Vmi14ZQBwTSQDlQDk__TQCkVmi6Vmi10ZQCxTSQEmQEl__TQDlVmi0Vmi6ZQDxZ__TQFdTwZQFjFNaNbNiNfwZm@Base 12 ++ _D3std3uni__T12mapTrieIndexTSQBbQBa__T9sliceBitsVmi8Vmi21ZQuTSQCiQCh__TQBhVmi0Vmi8ZQBtZ__TQCzTiZQDfFNaNbNiNfiZm@Base 12 ++ _D3std3uni__T12mapTrieIndexTSQBbQBa__T9sliceBitsVmi8Vmi21ZQuTSQCiQCh__TQBhVmi0Vmi8ZQBtZ__TQCzTwZQDfFNaNbNiNfwZm@Base 12 ++ _D3std3uni__T12mapTrieIndexTSQBbQBa__T9sliceBitsVmi9Vmi21ZQuTSQCiQCh__TQBhVmi0Vmi9ZQBtZ__TQCzTiZQDfFNaNbNiNfiZm@Base 12 ++ _D3std3uni__T12mapTrieIndexTSQBbQBa__T9sliceBitsVmi9Vmi21ZQuTSQCiQCh__TQBhVmi0Vmi9ZQBtZ__TQCzTwZQDfFNaNbNiNfwZm@Base 12 ++ _D3std3uni__T12toCaseLengthS_DQBcQBb12toLowerIndexFNaNbNiNewZtVki1043S_DQCsQCr10toLowerTabFNaNbNiNemZwZ__TQDpTaZQDvFNaNfMxAaZm@Base 12 ++ _D3std3uni__T12toCaseLengthS_DQBcQBb12toLowerIndexFNaNbNiNewZtVki1043S_DQCsQCr10toLowerTabFNaNbNiNemZwZ__TQDpTuZQDvFNaNfMxAuZm@Base 12 ++ _D3std3uni__T12toCaseLengthS_DQBcQBb12toLowerIndexFNaNbNiNewZtVki1043S_DQCsQCr10toLowerTabFNaNbNiNemZwZ__TQDpTwZQDvFNaNfMxAwZm@Base 12 ++ _D3std3uni__T12toCaseLengthS_DQBcQBb12toUpperIndexFNaNbNiNewZtVki1051S_DQCsQCr10toUpperTabFNaNbNiNemZwZ__TQDpTaZQDvFNaNfMxAaZm@Base 12 ++ _D3std3uni__T12toCaseLengthS_DQBcQBb12toUpperIndexFNaNbNiNewZtVki1051S_DQCsQCr10toUpperTabFNaNbNiNemZwZ__TQDpTuZQDvFNaNfMxAuZm@Base 12 ++ _D3std3uni__T12toCaseLengthS_DQBcQBb12toUpperIndexFNaNbNiNewZtVki1051S_DQCsQCr10toUpperTabFNaNbNiNemZwZ__TQDpTwZQDvFNaNfMxAwZm@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh10byIntervalMFNaNbNdNlNfZSQCvQCu__TQCtTQChZQDb__T9IntervalsTAkZQo@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11__fieldDtorMFNaNbNiNeZv@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11__xopEqualsMxFKxSQCoQCn__TQCmTQCaZQCuZb@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11addIntervalMFNaNbNlNfiimZm@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11byCodepointMFNaNbNdNfZSQCuQCt__TQCsTQCgZQDaQBtMFNdNfZ14CodepointRange@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11byCodepointMFNdNfZ14CodepointRange11__xopEqualsMxFKxSQDyQDx__TQDwTQDkZQEeQCxMFNdNfZQCnZb@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11byCodepointMFNdNfZ14CodepointRange5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11byCodepointMFNdNfZ14CodepointRange5frontMxFNaNbNdNiNfZw@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11byCodepointMFNdNfZ14CodepointRange6__ctorMFNaNbNcNfSQDxQDw__TQDvTQDjZQEdZSQEtQEs__TQErTQEfZQEzQDsMFNdNfZQDi@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11byCodepointMFNdNfZ14CodepointRange6__initZ@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11byCodepointMFNdNfZ14CodepointRange8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh11byCodepointMFNdNfZ14CodepointRange9__xtoHashFNbNeKxSQDxQDw__TQDvTQDjZQEdQCwMFNdNfZQCmZm@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh12toSourceCodeFNfAxSQCpQCo17CodepointIntervalAyaZQe@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh12toSourceCodeFNfAxSQCpQCo17CodepointIntervalAyaZ__T11binaryScopeTQBxZQsFNfQCgQBhZQBl@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh12toSourceCodeFNfAxSQCpQCo17CodepointIntervalAyaZ__T11linearScopeTQBxZQsFNaNfQCiQBjZQBn@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh12toSourceCodeFNfAxSQCpQCo17CodepointIntervalAyaZ__T6bisectTQBrZQmFNfQCamQBcZQBg@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh12toSourceCodeMFNfAyaZQe@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh15__fieldPostblitMFNaNbNiNlNeZv@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh5emptyMxFNaNbNdNiNfZb@Base 12 ++ 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_D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T13fromIntervalsZQqFNaNbNfAkXSQDbQDa__TQCzTQCnZQDh@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T3addTSQCeQCd__TQCcTQBqZQCkZQBbMFNaNbNcNfQBjZQBn@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T3addZQfMFNaNbNcNfkkZSQCtQCs__TQCrTQCfZQCz@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T3subTSQCeQCd__TQCcTQBqZQCkZQBbMFNaNbNcNfQBjZQBn@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T6__ctorTSQChQCg__TQCfTQBtZQCnZQBeMFNaNbNcNfQBjZQBn@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T7scanForZQjMxFNaNbNiNfwZm@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T8opBinaryVAyaa1_26TSQCsQCr__TQCqTQCeZQCyZQBpMFNaNbNfQBhZQBl@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T8opBinaryVAyaa1_7cTSQCsQCr__TQCqTQCeZQCyZQBpMFNaNbNfQBhZQBl@Base 12 ++ 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12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAkZQo6__ctorMFNaNbNcNiNlNfQBaZSQDoQDn__TQDmTQDaZQDu__TQCnTQCgZQCv@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAkZQo6__ctorMFNaNbNcNiNlNfQBammZSQDqQDp__TQDoTQDcZQDw__TQCpTQCiZQCx@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAkZQo6__initZ@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAkZQo6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAkZQo7opIndexMxFNaNbNiNfmZSQDkQDj17CodepointInterval@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAkZQo7opSliceMFNaNbNiNfmmZSQDkQDj__TQDiTQCwZQDq__TQCjTQCcZQCr@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAkZQo7popBackMFNaNbNiNfZv@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAkZQo8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAkZQo9__xtoHashFNbNeKxSQDgQDf__TQDeTQCsZQDm__TQCfTQByZQCnZm@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAxkZQp11__xopEqualsMxFKxSQDiQDh__TQDgTQCuZQDo__TQChTQCaZQCpZb@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAxkZQp4backMxFNaNbNdNiNfZSQDjQDi17CodepointInterval@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAxkZQp4saveMFNaNbNdNiNfZSQDiQDh__TQDgTQCuZQDo__TQChTQCaZQCp@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAxkZQp5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAxkZQp5frontMxFNaNbNdNiNfZSQDkQDj17CodepointInterval@Base 12 ++ _D3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBh__T9IntervalsTAxkZQp6__ctorMFNaNbNcNiNlNfQBbZSQDpQDo__TQDnTQDbZQDv__TQCoTQChZQCw@Base 12 ++ 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_D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi11ZQsVmi16ZQCa11simpleWriteMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi11ZQsVmi16ZQCa13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi11ZQsVmi16ZQCa13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi11ZQsVmi16ZQCa6__ctorMNgFNaNbNcNiNfPNgmZNgSQDrQDq__TQDpTQDdVmi16ZQEc@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi11ZQsVmi16ZQCa6__initZ@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi11ZQsVmi16ZQCa7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi12ZQsVmi16ZQCa11simpleIndexMNgFNaNbNimZQCm@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi12ZQsVmi16ZQCa11simpleWriteMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi12ZQsVmi16ZQCa13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi12ZQsVmi16ZQCa13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi12ZQsVmi16ZQCa6__ctorMNgFNaNbNcNiNfPNgmZNgSQDrQDq__TQDpTQDdVmi16ZQEc@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi12ZQsVmi16ZQCa6__initZ@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi12ZQsVmi16ZQCa7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi13ZQsVmi16ZQCa11simpleIndexMNgFNaNbNimZQCm@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi13ZQsVmi16ZQCa11simpleWriteMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi13ZQsVmi16ZQCa13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi13ZQsVmi16ZQCa13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi13ZQsVmi16ZQCa6__ctorMNgFNaNbNcNiNfPNgmZNgSQDrQDq__TQDpTQDdVmi16ZQEc@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi13ZQsVmi16ZQCa6__initZ@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi13ZQsVmi16ZQCa7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi14ZQsVmi16ZQCa11simpleIndexMNgFNaNbNimZQCm@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi14ZQsVmi16ZQCa11simpleWriteMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi14ZQsVmi16ZQCa13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi14ZQsVmi16ZQCa13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi14ZQsVmi16ZQCa6__ctorMNgFNaNbNcNiNfPNgmZNgSQDrQDq__TQDpTQDdVmi16ZQEc@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi14ZQsVmi16ZQCa6__initZ@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi14ZQsVmi16ZQCa7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi15ZQsVmi16ZQCa11simpleIndexMNgFNaNbNimZQCm@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi15ZQsVmi16ZQCa11simpleWriteMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi15ZQsVmi16ZQCa13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi15ZQsVmi16ZQCa13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi15ZQsVmi16ZQCa6__ctorMNgFNaNbNcNiNfPNgmZNgSQDrQDq__TQDpTQDdVmi16ZQEc@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi15ZQsVmi16ZQCa6__initZ@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi15ZQsVmi16ZQCa7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi16ZQsVmi16ZQCa11simpleIndexMNgFNaNbNimZQCm@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi16ZQsVmi16ZQCa11simpleWriteMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi16ZQsVmi16ZQCa13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi16ZQsVmi16ZQCa13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi16ZQsVmi16ZQCa6__ctorMNgFNaNbNcNiNfPNgmZNgSQDrQDq__TQDpTQDdVmi16ZQEc@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi16ZQsVmi16ZQCa6__initZ@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi16ZQsVmi16ZQCa7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi7ZQrVmi8ZQBy11simpleIndexMNgFNaNbNimZQCk@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi7ZQrVmi8ZQBy11simpleWriteMFNaNbNikmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi7ZQrVmi8ZQBy13opIndexAssignMFNaNbNiQCimZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi7ZQrVmi8ZQBy13opIndexAssignMFNaNbNikmZv@Base 12 ++ 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_D3std3uni__T13PackedPtrImplTSQBcQBb__T9BitPackedTkVmi8ZQrVmi8ZQBy7opIndexMNgFNaNbNimZQCf@Base 12 ++ _D3std3uni__T13PackedPtrImplThVmi8ZQw11simpleIndexMNgFNaNbNimZh@Base 12 ++ _D3std3uni__T13PackedPtrImplThVmi8ZQw11simpleWriteMFNaNbNihmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplThVmi8ZQw13opIndexAssignMFNaNbNihmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplThVmi8ZQw6__ctorMNgFNaNbNcNiNfPNgmZNgSQCmQCl__TQCkThVmi8ZQCu@Base 12 ++ _D3std3uni__T13PackedPtrImplThVmi8ZQw6__initZ@Base 12 ++ _D3std3uni__T13PackedPtrImplThVmi8ZQw7opIndexMNgFNaNbNimZh@Base 12 ++ _D3std3uni__T13PackedPtrImplTtVmi16ZQx11simpleIndexMNgFNaNbNimZt@Base 12 ++ _D3std3uni__T13PackedPtrImplTtVmi16ZQx11simpleWriteMFNaNbNitmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTtVmi16ZQx13opIndexAssignMFNaNbNitmZv@Base 12 ++ _D3std3uni__T13PackedPtrImplTtVmi16ZQx6__ctorMNgFNaNbNcNiNfPNgmZNgSQCnQCm__TQClTtVmi16ZQCw@Base 12 ++ _D3std3uni__T13PackedPtrImplTtVmi16ZQx6__initZ@Base 12 ++ _D3std3uni__T13PackedPtrImplTtVmi16ZQx7opIndexMNgFNaNbNimZt@Base 12 ++ _D3std3uni__T13copyBackwardsTkTkZQuFNaNbNiNfAkQcZv@Base 12 ++ _D3std3uni__T13copyBackwardsTmTmZQuFNaNbNiNfAmQcZv@Base 12 ++ _D3std3uni__T13replicateBitsVmi1Vmi64ZQzFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T13replicateBitsVmi2Vmi32ZQzFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T13replicateBitsVmi4Vmi16ZQzFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T13replicateBitsVmi64Vmi1ZQzFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T13replicateBitsVmi8Vmi8ZQyFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toLowerIndexFNaNbNiNewZtVii1043S_DQCtQCs10toLowerTabFNaNbNiNemZwTaZQDpFNaNeKAaZ6moveToFNaNbNiNfQtmmmZm@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toLowerIndexFNaNbNiNewZtVii1043S_DQCtQCs10toLowerTabFNaNbNiNemZwTaZQDpFNaNeKAaZv@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toLowerIndexFNaNbNiNewZtVii1043S_DQCtQCs10toLowerTabFNaNbNiNemZwTuZQDpFNaNeKAuZ6moveToFNaNbNiNfQtmmmZm@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toLowerIndexFNaNbNiNewZtVii1043S_DQCtQCs10toLowerTabFNaNbNiNemZwTuZQDpFNaNeKAuZv@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toLowerIndexFNaNbNiNewZtVii1043S_DQCtQCs10toLowerTabFNaNbNiNemZwTwZQDpFNaNeKAwZ6moveToFNaNbNiNfQtmmmZm@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toLowerIndexFNaNbNiNewZtVii1043S_DQCtQCs10toLowerTabFNaNbNiNemZwTwZQDpFNaNeKAwZv@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toUpperIndexFNaNbNiNewZtVii1051S_DQCtQCs10toUpperTabFNaNbNiNemZwTaZQDpFNaNeKAaZ6moveToFNaNbNiNfQtmmmZm@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toUpperIndexFNaNbNiNewZtVii1051S_DQCtQCs10toUpperTabFNaNbNiNemZwTaZQDpFNaNeKAaZv@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toUpperIndexFNaNbNiNewZtVii1051S_DQCtQCs10toUpperTabFNaNbNiNemZwTuZQDpFNaNeKAuZ6moveToFNaNbNiNfQtmmmZm@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toUpperIndexFNaNbNiNewZtVii1051S_DQCtQCs10toUpperTabFNaNbNiNemZwTuZQDpFNaNeKAuZv@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toUpperIndexFNaNbNiNewZtVii1051S_DQCtQCs10toUpperTabFNaNbNiNemZwTwZQDpFNaNeKAwZ6moveToFNaNbNiNfQtmmmZm@Base 12 ++ _D3std3uni__T13toCaseInPlaceS_DQBdQBc12toUpperIndexFNaNbNiNewZtVii1051S_DQCtQCs10toUpperTabFNaNbNiNemZwTwZQDpFNaNeKAwZv@Base 12 ++ _D3std3uni__T14findUnicodeSetS_DQBe8internal14unicode_tables6blocks3tabFNaNdNfZAySQDcQByQBs15UnicodePropertyTaZQDuFNaNfMxAaZl@Base 12 ++ _D3std3uni__T14findUnicodeSetS_DQBe8internal14unicode_tables7scripts3tabFNaNbNdNiNfZAySQDhQCdQBx15UnicodePropertyTaZQDzFNaNfMxAaZl@Base 12 ++ _D3std3uni__T14findUnicodeSetS_DQBe8internal14unicode_tables8uniProps3tabFNaNdNfZAySQDeQCaQBu15UnicodePropertyTaZQDwFNaNfMxAaZl@Base 12 ++ _D3std3uni__T14genericReplaceTvTSQBfQBe__T8CowArrayTSQBzQBy8GcPolicyZQBbTAiZQClFNaNbNeKQCdmmQtZm@Base 12 ++ _D3std3uni__T14genericReplaceTvTSQBfQBe__T8CowArrayTSQBzQBy8GcPolicyZQBbTAkZQClFNaNbNeKQCdmmQtZm@Base 12 ++ _D3std3uni__T14graphemeStrideTaZQtFNaNfMxAamZm@Base 12 ++ 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_D3std3uni__T15packedArrayViewTSQBeQBd__T9BitPackedTkVmi7ZQrZQBwFNaNbNiNfPNgmmZNgSQDcQDb__T19PackedArrayViewImplTQDeVmi8ZQBe@Base 12 ++ _D3std3uni__T15packedArrayViewTSQBeQBd__T9BitPackedTkVmi8ZQrZQBwFNaNbNiNfPNgmmZNgSQDcQDb__T19PackedArrayViewImplTQDeVmi8ZQBe@Base 12 ++ _D3std3uni__T15packedArrayViewThZQuFNaNbNiNfPNgmmZNgSQBzQBy__T19PackedArrayViewImplThVmi8ZQBc@Base 12 ++ _D3std3uni__T15packedArrayViewTtZQuFNaNbNiNfPNgmmZNgSQBzQBy__T19PackedArrayViewImplTtVmi16ZQBd@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk11__xopEqualsMxFKxSQCrQCq__TQCpTQCaZQCxZb@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk13opIndexAssignMFNaNbNiNfwmZv@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk4backMFNaNbNdNiNfwZv@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk4backMxFNaNbNdNiNfZw@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk4saveMNgFNaNbNdNiNfZNgSQCvQCu__TQCtTQCeZQDb@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk5frontMFNaNbNdNiNfwZv@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk5frontMxFNaNbNdNiNfZw@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk6__initZ@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk7opIndexMxFNaNbNiNfmZw@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk7opSliceMFNaNbNiNfZSQCsQCr__TQCqTQCbZQCy@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk7opSliceMFNaNbNiNfmmZSQCuQCt__TQCsTQCdZQDa@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk7popBackMFNaNbNiNfZv@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3uni__T16SliceOverIndexedTSQBfQBe8GraphemeZQBk__T8opEqualsTxSQCnQCm__TQClTQBwZQCtZQBhMxFNaNbNiNfKxQBmZb@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi11__xopEqualsMxFKxSQEpQEo__TQEnTQDyZQEvZb@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi13parseCharTermMFNfZSQEr8typecons__T5TupleTSQFoQFn__T13InversionListTSQGoQGn8GcPolicyZQBhTEQHjQHi__TQHhTQGsZQHp8OperatorZQDh@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi13parseCharTermMFZ18twinSymbolOperatorFNaNbNiNfwZEQFuQFt__TQFsTQFdZQGa8Operator@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi5frontMFNaNbNdNiNfZw@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi6__initZ@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi8parseSetMFNfZSQElQEk__T13InversionListTSQFlQFk8GcPolicyZQBh@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi8parseSetMFZ5applyFNfEQEsQEr__TQEqTQEbZQEy8OperatorKSQFxQFw__T5StackTSQGoQGn__T13InversionListTSQHoQHn8GcPolicyZQBhZQCcZb@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi8parseSetMFZ__T11unrollWhileSQEz10functional__T8unaryFunVQDma11_6120213d20612e4f70656eVQEqa1_61ZQBxZQDhFNfKSQIaQHz__T5StackTSQIrQIq__T13InversionListTSQJrQJq8GcPolicyZQBhZQCcKSQKqQKp__TQCqTEQLeQLd__TQLcTQKnZQLk8OperatorZQDzZb@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi8parseSetMFZ__T11unrollWhileSQEz10functional__T8unaryFunVQDma12_61203d3d20612e556e696f6eVQEsa1_61ZQBzZQDjFNfKSQIcQIb__T5StackTSQItQIs__T13InversionListTSQJtQJs8GcPolicyZQBhZQCcKSQKsQKr__TQCqTEQLgQLf__TQLeTQKpZQLm8OperatorZQDzZb@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi8popFrontMFNaNfZv@Base 12 ++ _D3std3uni__T16UnicodeSetParserTSQBf5regex8internal6parser__T6ParserTAyaTSQCuQBpQBmQBg7CodeGenZQBiZQDi9__xtoHashFNbNeKxSQEoQEn__TQEmTQDxZQEuZm@Base 12 ++ _D3std3uni__T16codepointSetTrieVii13Vii8Z__TQBfTSQBvQBu__T13InversionListTSQCvQCu8GcPolicyZQBhZQDeFNaNfQCdZSQEcQEb__T4TrieTSQEsQEr__T9BitPackedTbVmi1ZQrTwVmi1114112TSQGiQGh__T9sliceBitsVmi8Vmi21ZQuTSQHpQHo__TQBhVmi0Vmi8ZQBtZQEd@Base 12 ++ _D3std3uni__T16propertyNameLessTaTaZQxFNaNfAxaQdZb@Base 12 ++ _D3std3uni__T16sliceOverIndexedTSQBfQBe8GraphemeZQBkFNaNbNiNfmmPQBgZSQCpQCo__T16SliceOverIndexedTQCnZQx@Base 12 ++ _D3std3uni__T18toCaseInPlaceAllocS_DQBiQBh12toLowerIndexFNaNbNiNewZtVki1043S_DQCyQCx10toLowerTabFNaNbNiNemZwZ__TQDvTaZQEbFNaNeKAammZv@Base 12 ++ _D3std3uni__T18toCaseInPlaceAllocS_DQBiQBh12toLowerIndexFNaNbNiNewZtVki1043S_DQCyQCx10toLowerTabFNaNbNiNemZwZ__TQDvTuZQEbFNaNeKAummZv@Base 12 ++ _D3std3uni__T18toCaseInPlaceAllocS_DQBiQBh12toLowerIndexFNaNbNiNewZtVki1043S_DQCyQCx10toLowerTabFNaNbNiNemZwZ__TQDvTwZQEbFNaNeKAwmmZv@Base 12 ++ _D3std3uni__T18toCaseInPlaceAllocS_DQBiQBh12toUpperIndexFNaNbNiNewZtVki1051S_DQCyQCx10toUpperTabFNaNbNiNemZwZ__TQDvTaZQEbFNaNeKAammZv@Base 12 ++ _D3std3uni__T18toCaseInPlaceAllocS_DQBiQBh12toUpperIndexFNaNbNiNewZtVki1051S_DQCyQCx10toUpperTabFNaNbNiNemZwZ__TQDvTuZQEbFNaNeKAummZv@Base 12 ++ _D3std3uni__T18toCaseInPlaceAllocS_DQBiQBh12toUpperIndexFNaNbNiNewZtVki1051S_DQCyQCx10toUpperTabFNaNbNiNemZwZ__TQDvTwZQEbFNaNeKAwmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe11__xopEqualsMxFKxSQDlQDk__TQDjTQCrVmi1ZQDvZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe13opIndexAssignMFNaNbNiQCimZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe13opIndexAssignMFNaNbNibmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe13opSliceAssignMFNaNbNiQCimmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe13opSliceAssignMFNaNbNibmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe5zerosMFNaNbNimmZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe6__ctorMNgFNaNbNcNiNfPNgmmmZNgSQDxQDw__TQDvTQDdVmi1ZQEh@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe6__initZ@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe7opIndexMNgFNaNbNimZQCf@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe7opSliceMFNaNbNiNfZSQDmQDl__TQDkTQCsVmi1ZQDw@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe7opSliceMNgFNaNbNiNfmmZNgSQDsQDr__TQDqTQCyVmi1ZQEc@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe__T7roundUpZQjMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe__T8opEqualsTxSQDhQDg__TQDfTQCnVmi1ZQDrZQBlMxFNaNbNiKxQBoZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTbVmi1ZQrVmi1ZQCe__T9roundDownZQlMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg11__xopEqualsMxFKxSQDnQDm__TQDlTQCtVmi16ZQDyZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg13opSliceAssignMFNaNbNiQCkmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg13opSliceAssignMFNaNbNikmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg5zerosMFNaNbNimmZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg6__ctorMNgFNaNbNcNiNfPNgmmmZNgSQDzQDy__TQDxTQDfVmi16ZQEk@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg6__initZ@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg7opSliceMFNaNbNiNfZSQDoQDn__TQDmTQCuVmi16ZQDz@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg7opSliceMNgFNaNbNiNfmmZNgSQDuQDt__TQDsTQDaVmi16ZQEf@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg__T7roundUpZQjMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg__T8opEqualsTxSQDjQDi__TQDhTQCpVmi16ZQDuZQBmMxFNaNbNiKxQBpZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi11ZQsVmi16ZQCg__T9roundDownZQlMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg11__xopEqualsMxFKxSQDnQDm__TQDlTQCtVmi16ZQDyZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg13opSliceAssignMFNaNbNiQCkmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg13opSliceAssignMFNaNbNikmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg5zerosMFNaNbNimmZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg6__ctorMNgFNaNbNcNiNfPNgmmmZNgSQDzQDy__TQDxTQDfVmi16ZQEk@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg6__initZ@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg7opSliceMFNaNbNiNfZSQDoQDn__TQDmTQCuVmi16ZQDz@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg7opSliceMNgFNaNbNiNfmmZNgSQDuQDt__TQDsTQDaVmi16ZQEf@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg__T7roundUpZQjMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg__T8opEqualsTxSQDjQDi__TQDhTQCpVmi16ZQDuZQBmMxFNaNbNiKxQBpZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi12ZQsVmi16ZQCg__T9roundDownZQlMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg11__xopEqualsMxFKxSQDnQDm__TQDlTQCtVmi16ZQDyZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg13opSliceAssignMFNaNbNiQCkmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg13opSliceAssignMFNaNbNikmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg5zerosMFNaNbNimmZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg6__ctorMNgFNaNbNcNiNfPNgmmmZNgSQDzQDy__TQDxTQDfVmi16ZQEk@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg6__initZ@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg7opSliceMFNaNbNiNfZSQDoQDn__TQDmTQCuVmi16ZQDz@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg7opSliceMNgFNaNbNiNfmmZNgSQDuQDt__TQDsTQDaVmi16ZQEf@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg__T7roundUpZQjMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg__T8opEqualsTxSQDjQDi__TQDhTQCpVmi16ZQDuZQBmMxFNaNbNiKxQBpZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi13ZQsVmi16ZQCg__T9roundDownZQlMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg11__xopEqualsMxFKxSQDnQDm__TQDlTQCtVmi16ZQDyZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg13opSliceAssignMFNaNbNiQCkmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg13opSliceAssignMFNaNbNikmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg5zerosMFNaNbNimmZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg6__ctorMNgFNaNbNcNiNfPNgmmmZNgSQDzQDy__TQDxTQDfVmi16ZQEk@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg6__initZ@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg7opSliceMFNaNbNiNfZSQDoQDn__TQDmTQCuVmi16ZQDz@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg7opSliceMNgFNaNbNiNfmmZNgSQDuQDt__TQDsTQDaVmi16ZQEf@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg__T7roundUpZQjMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg__T8opEqualsTxSQDjQDi__TQDhTQCpVmi16ZQDuZQBmMxFNaNbNiKxQBpZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi14ZQsVmi16ZQCg__T9roundDownZQlMFNaNbNiNfmZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg11__xopEqualsMxFKxSQDnQDm__TQDlTQCtVmi16ZQDyZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg13opIndexAssignMFNaNbNiQCkmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg13opIndexAssignMFNaNbNikmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg13opSliceAssignMFNaNbNiQCkmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg13opSliceAssignMFNaNbNikmmZv@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg5zerosMFNaNbNimmZb@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg6__ctorMNgFNaNbNcNiNfPNgmmmZNgSQDzQDy__TQDxTQDfVmi16ZQEk@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg6__initZ@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg7opIndexMNgFNaNbNimZQCh@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg7opSliceMFNaNbNiNfZSQDoQDn__TQDmTQCuVmi16ZQDz@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg7opSliceMNgFNaNbNiNfmmZNgSQDuQDt__TQDsTQDaVmi16ZQEf@Base 12 ++ _D3std3uni__T19PackedArrayViewImplTSQBiQBh__T9BitPackedTkVmi15ZQsVmi16ZQCg__T7roundUpZQjMFNaNbNiNfmZm@Base 12 ++ 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_D3std3uni__T9sliceBitsVmi0Vmi5ZQt__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi5ZQt__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi6ZQt6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi6ZQt__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi6ZQt__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi7ZQt6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi7ZQt__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi7ZQt__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi8ZQt6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi8ZQt__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi8ZQt__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi9ZQt6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi9ZQt__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi0Vmi9ZQt__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi10Vmi14ZQv6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi10Vmi14ZQv__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi10Vmi14ZQv__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi13Vmi21ZQv6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi13Vmi21ZQv__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi13Vmi21ZQv__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi14Vmi21ZQv6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi14Vmi21ZQv__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi14Vmi21ZQv__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi5Vmi13ZQu6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi5Vmi13ZQu__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi5Vmi13ZQu__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi6Vmi10ZQu6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi6Vmi10ZQu__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi6Vmi10ZQu__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi6Vmi13ZQu6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi6Vmi13ZQu__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi6Vmi13ZQu__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi7Vmi13ZQu6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi7Vmi13ZQu__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi7Vmi13ZQu__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi8Vmi13ZQu6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi8Vmi13ZQu__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi8Vmi13ZQu__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi8Vmi21ZQu6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi8Vmi21ZQu__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi8Vmi21ZQu__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi9Vmi13ZQu6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi9Vmi13ZQu__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi9Vmi13ZQu__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uni__T9sliceBitsVmi9Vmi21ZQu6__initZ@Base 12 ++ _D3std3uni__T9sliceBitsVmi9Vmi21ZQu__T6opCallTiZQkFNaNbNiNfiZi@Base 12 ++ _D3std3uni__T9sliceBitsVmi9Vmi21ZQu__T6opCallTwZQkFNaNbNiNfwZk@Base 12 ++ _D3std3uri10URI_EncodeFNaNfAywkZAya@Base 12 ++ _D3std3uri11__moduleRefZ@Base 12 ++ _D3std3uri12URIException6__initZ@Base 12 ++ _D3std3uri12URIException6__vtblZ@Base 12 ++ _D3std3uri12URIException7__ClassZ@Base 12 ++ _D3std3uri12URIException8__mixin26__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQCwQCvQCu@Base 12 ++ _D3std3uri12URIException8__mixin26__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQCwQCvQCu@Base 12 ++ _D3std3uri12__ModuleInfoZ@Base 12 ++ _D3std3uri9ascii2hexFNaNbNiNfwZk@Base 12 ++ _D3std3uri9hex2asciiyG16a@Base 12 ++ _D3std3uri9uri_flagsyG128h@Base 12 ++ _D3std3uri9urlEncodeFNaNfMHAyaQdZQg@Base 12 ++ _D3std3uri__T15encodeComponentTaZQuFNaNfMAxaZAya@Base 12 ++ _D3std3utf10strideImplFNaNeamZk@Base 12 ++ _D3std3utf11__moduleRefZ@Base 12 ++ _D3std3utf12UTFException11setSequenceMFNaNbNiNjNfMAkXCQCaQBzQBy@Base 12 ++ _D3std3utf12UTFException6__ctorMFNaNbNfAyamQemC6object9ThrowableZCQCmQClQCk@Base 12 ++ _D3std3utf12UTFException6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQCnQCmQCl@Base 12 ++ _D3std3utf12UTFException6__initZ@Base 12 ++ _D3std3utf12UTFException6__vtblZ@Base 12 ++ _D3std3utf12UTFException7__ClassZ@Base 12 ++ _D3std3utf12UTFException8toStringMxFZAya@Base 12 ++ _D3std3utf12__ModuleInfoZ@Base 12 ++ _D3std3utf12isValidDcharFNaNbNiNfwZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFNaNbNiNfQoZSQBqQBp__TQBoTQBfZQBwFQBnZ14ByCodeUnitImpl@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl11__xopEqualsMxFKxSQCqQCp__TQCoTQCfZQCwFQCnZQCiZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl4backMNgFNaNbNcNdNiNfZNga@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl4saveMFNaNbNdNiNfZSQCqQCp__TQCoTQCfZQCwFQCnZQCi@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl5frontMNgFNaNbNcNdNiNfZNga@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl6__initZ@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl7opIndexMNgFNaNbNcNiNfmZNga@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl7opSliceMFNaNbNiNfmmZSQCtQCs__TQCrTQCiZQCzFQCqZQCl@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl7popBackMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImpl9__xtoHashFNbNeKxSQCpQCo__TQCnTQCeZQCvFQCmZQChZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFNaNbNiNfQpZSQBrQBq__TQBpTQBgZQBxFQBoZ14ByCodeUnitImpl@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl11__xopEqualsMxFKxSQCrQCq__TQCpTQCgZQCxFQCoZQCiZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl4backMNgFNaNbNcNdNiNfZNgxa@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl4saveMFNaNbNdNiNfZSQCrQCq__TQCpTQCgZQCxFQCoZQCi@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl5frontMNgFNaNbNcNdNiNfZNgxa@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl6__initZ@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl7opIndexMNgFNaNbNcNiNfmZNgxa@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl7opSliceMFNaNbNiNfmmZSQCuQCt__TQCsTQCjZQDaFQCrZQCl@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl7popBackMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImpl9__xtoHashFNbNeKxSQCqQCp__TQCoTQCfZQCwFQCnZQChZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFNaNbNiNfQpZSQBrQBq__TQBpTQBgZQBxFQBoZ14ByCodeUnitImpl@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl11__xopEqualsMxFKxSQCrQCq__TQCpTQCgZQCxFQCoZQCiZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl4backMNgFNaNbNcNdNiNfZNgxu@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl4saveMFNaNbNdNiNfZSQCrQCq__TQCpTQCgZQCxFQCoZQCi@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl5frontMNgFNaNbNcNdNiNfZNgxu@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl6__initZ@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl7opIndexMNgFNaNbNcNiNfmZNgxu@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl7opSliceMFNaNbNiNfmmZSQCuQCt__TQCsTQCjZQDaFQCrZQCl@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl7popBackMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImpl9__xtoHashFNbNeKxSQCqQCp__TQCoTQCfZQCwFQCnZQChZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAxwZQrFNaNbNiNfQpZQs@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFNaNbNiNfQpZSQBrQBq__TQBpTQBgZQBxFQBoZ14ByCodeUnitImpl@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl11__xopEqualsMxFKxSQCrQCq__TQCpTQCgZQCxFQCoZQCiZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl4backMNgFNaNbNcNdNiNfZya@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl4saveMFNaNbNdNiNfZSQCrQCq__TQCpTQCgZQCxFQCoZQCi@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl5frontMNgFNaNbNcNdNiNfZya@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl6__initZ@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl7opIndexMNgFNaNbNcNiNfmZya@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl7opSliceMFNaNbNiNfmmZSQCuQCt__TQCsTQCjZQDaFQCrZQCl@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl7popBackMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImpl9__xtoHashFNbNeKxSQCqQCp__TQCoTQCfZQCwFQCnZQChZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFNaNbNiNfQpZSQBrQBq__TQBpTQBgZQBxFQBoZ14ByCodeUnitImpl@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl11__xopEqualsMxFKxSQCrQCq__TQCpTQCgZQCxFQCoZQCiZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl4backMNgFNaNbNcNdNiNfZyu@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl4saveMFNaNbNdNiNfZSQCrQCq__TQCpTQCgZQCxFQCoZQCi@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl5frontMNgFNaNbNcNdNiNfZyu@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl6__initZ@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl7opIndexMNgFNaNbNcNiNfmZyu@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl7opSliceMFNaNbNiNfmmZSQCuQCt__TQCsTQCjZQDaFQCrZQCl@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl7popBackMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImpl9__xtoHashFNbNeKxSQCqQCp__TQCoTQCfZQCwFQCnZQChZm@Base 12 ++ _D3std3utf__T10byCodeUnitTAywZQrFNaNbNiNfQpZQs@Base 12 ++ _D3std3utf__T10byCodeUnitTSQz4path__T16asNormalizedPathTSQCd5range__T5chainTSQCxQCw__TQCvTAyaZQDdFQiZ14ByCodeUnitImplTSQEnQCk__T10OnlyResultTaZQpTQCsZQDdFQDaQBnQDgZ6ResultZQFfFNkMQEtZQtZQGrFNaNbNiNfQGqZQGu@Base 12 ++ _D3std3utf__T10byCodeUnitTSQz5range__T5chainTSQBsQBr__TQBqTAxaZQByFQiZ14ByCodeUnitImplTSQDiQCk__T10OnlyResultTaZQpTQCsZQDdFQDaQBnQDgZ6ResultZQEyFNaNbNiNfQExZQFb@Base 12 ++ _D3std3utf__T10byCodeUnitTSQzQx__TQvTAaZQBbFQhZ14ByCodeUnitImplZQBzFNaNbNiNfQByZQCc@Base 12 ++ _D3std3utf__T10byCodeUnitTSQzQx__TQvTAxaZQBcFQiZ14ByCodeUnitImplZQCaFNaNbNiNfQBzZQCd@Base 12 ++ _D3std3utf__T10byCodeUnitTSQzQx__TQvTAyaZQBcFQiZ14ByCodeUnitImplZQCaFNaNbNiNfQBzZQCd@Base 12 ++ _D3std3utf__T10codeLengthTaZQpFNaNbNiNfwZh@Base 12 ++ _D3std3utf__T10codeLengthTuZQpFNaNbNiNfwZh@Base 12 ++ _D3std3utf__T10codeLengthTwZQpFNaNbNiNfwZh@Base 12 ++ _D3std3utf__T10codeLengthTxaZQqFNaNbNiNfwZh@Base 12 ++ _D3std3utf__T10codeLengthTyaZQqFNaNbNiNfwZh@Base 12 ++ _D3std3utf__T10codeLengthTyuZQqFNaNbNiNfwZh@Base 12 ++ _D3std3utf__T10codeLengthTywZQqFNaNbNiNfwZh@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQFfFNaNfKQCgJmZw@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQFfFNaNfKQCgZw@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQFgFNaNfKQChJmZw@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQFgFNaNfKQChZw@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImplZQFgFNaNbNiNfKQClJmZw@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImplZQFgFNaNbNiNfKQClZw@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQFgFNaNbNiNfKQClJmZw@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQFgFNaNbNiNfKQClZw@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTQCxZQrFQDeZ14ByCodeUnitImplZQFhFNaNfKQCiJmZw@Base 12 ++ _D3std3utf__T10decodeBackVEQz8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDuQDt__T10byCodeUnitTQCxZQrFQDeZ14ByCodeUnitImplZQFhFNaNfKQCiZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxaZQDrFKQjKmZ__T9exceptionTQBcZQpFNaNbNfQBpQDsZCQFvQFu12UTFException@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxaZQDrFNaKQlKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxaZQDrFNaQkKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxaZQDrFQiKmZ__T9exceptionTQBbZQpFNaNbNfQBoQDrZCQFuQFt12UTFException@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxuZQDrFNaKQlKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxuZQDrFNaQkKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxwZQDrFNaKQlKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxwZQDrFNaQkKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxaZQDrFNaNbNiKQpKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxaZQDrFNaNbNiQoKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxuZQDrFNaNbNiKQpKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxwZQDrFNaNbNiKQpKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDzQDy__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQFkFNaNbNiNfKQCkKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDzQDy__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQFlFNaNbNiNfKQClKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDzQDy__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImplZQFlFNaNbNiNfKQClKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDzQDy__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQFlFNaNbNiNfKQClKmZw@Base 12 ++ _D3std3utf__T10decodeImplVbi1VEQBd8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDzQDy__T10byCodeUnitTQCxZQrFQDeZ14ByCodeUnitImplZQFmFNaNbNiNfKQCmKmZw@Base 12 ++ _D3std3utf__T10strideBackTANgaZQsFNaNfKQnmZk@Base 12 ++ _D3std3utf__T10strideBackTAxaZQrFNaNfKQmmZk@Base 12 ++ _D3std3utf__T10strideBackTSQzQx__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQCiFNaNfKQCeZk@Base 12 ++ _D3std3utf__T10strideBackTSQzQx__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQCiFNaNfKQCemZk@Base 12 ++ _D3std3utf__T10strideBackTSQzQx__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQCjFNaNfKQCfZk@Base 12 ++ _D3std3utf__T10strideBackTSQzQx__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQCjFNaNfKQCfmZk@Base 12 ++ _D3std3utf__T10strideBackTSQzQx__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImplZQCjFNaNbNiNfKQCjZk@Base 12 ++ _D3std3utf__T10strideBackTSQzQx__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQCjFNaNfKQCfZk@Base 12 ++ _D3std3utf__T10strideBackTSQzQx__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQCjFNaNfKQCfmZk@Base 12 ++ _D3std3utf__T10strideBackTSQzQx__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQCjFNaNbNiNfKQCjZk@Base 12 ++ _D3std3utf__T10toUTFzImplTPaTAxaZQuFNaNbNfNkMQqZQw@Base 12 ++ _D3std3utf__T10toUTFzImplTPaTAyaZQuFNaNbNfNkMQqZQw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAaZQDnFNaNeMKQnJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAaZQDnFNaNfKQmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAwZQDnFNaNeMKQnJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAwZQDnFNaNfKQmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxaZQDoFNaNbNiNeMKQsJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxaZQDoFNaNbNiNfKQrZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxuZQDoFNaNbNiNeMKQsJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxuZQDoFNaNbNiNfKQrZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxwZQDoFNaNbNiNeMKQsJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TAxwZQDoFNaNbNiNfKQrZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQFhFNaNbNiNfKQCkJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQFhFNaNbNiNfKQCkZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQFiFNaNbNiNfKQClJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQFiFNaNbNiNfKQClZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImplZQFiFNaNbNiNfKQClJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImplZQFiFNaNbNiNfKQClZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQFiFNaNbNiNfKQClJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQFiFNaNbNiNfKQClZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTQCxZQrFQDeZ14ByCodeUnitImplZQFjFNaNbNiNfKQCmJmZw@Base 12 ++ _D3std3utf__T11decodeFrontVEQBa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TSQDwQDv__T10byCodeUnitTQCxZQrFQDeZ14ByCodeUnitImplZQFjFNaNbNiNfKQCmZw@Base 12 ++ _D3std3utf__T13_utfExceptionVEQBc8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0ZQDmFNaNfQCiwZw@Base 12 ++ _D3std3utf__T13_utfExceptionVEQBc8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1ZQDmFNaNbNiNfQCmwZw@Base 12 ++ _D3std3utf__T20canSearchInCodeUnitsTaZQzFNaNbNiNfwZb@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTAaZQDoFNaNbNiNfQpZSQEpQEo__T10byCodeUnitTQBpZQrFQBwZ14ByCodeUnitImpl@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTAxaZQDpFNaNbNiNfQqZSQEqQEp__T10byCodeUnitTQBqZQrFQBxZ14ByCodeUnitImpl@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTQChZQDpFNaNbNiNfQCxZSQErQEq__T10byCodeUnitTQDyZQrFQEfZ14ByCodeUnitImpl@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx4path__T16asNormalizedPathTSQFc5range__T5chainTSQFwQFv__T10byCodeUnitTQFdZQrFQFkZ14ByCodeUnitImplTSQHvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQtZQJzFNaNbNiNfQHaZQHe@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx5range__T5chainTSQErQEq__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQGpQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6ResultZQIfFNaNbNiNfQFgZQFk@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNaNbNiNfQFyZSQJzQJy__TQJxTaVQJui1Z__TQKmTQHfZQKuFNcQHpZQDc@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNcQFsZQBf11__xopEqualsMxFKxSQKoQKn__TQKmTaVQKji1Z__TQLbTQHuZQLjFNcQIeZQDrZb@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNcQFsZQBf4saveMFNaNbNdNiNfZSQKoQKn__TQKmTaVQKji1Z__TQLbTQHuZQLjFNcQIeZQDr@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNcQFsZQBf5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNcQFsZQBf5frontMFNaNbNdNiNlNfZa@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNcQFsZQBf6__ctorMFNaNbNcNiNfNkMQGvZSQKwQKv__TQKuTaVQKri1Z__TQLjTQIcZQLrFNcQImZQDz@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNcQFsZQBf6__ctorMFNaNbNcNiNfNkMQGvttG4aZSQLbQLa__TQKzTaVQKwi1Z__TQLoTQIhZQLwFNcQIrZQEe@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNcQFsZQBf6__initZ@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNcQFsZQBf8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDx6string__T14rightJustifierTSQFcQFb__TQFaTwVQExi1Z__TQFpTSQGfQGe__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHsFNcQCfZ6ResultZQElFQDymwZQsZQIxFNcQFsZQBf9__xtoHashFNbNeKxSQKnQKm__TQKlTaVQKii1Z__TQLaTQHtZQLiFNcQIdZQDqZm@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQFiFNaNbNiNfQCjZQCn@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQFjFNaNbNiNfQCkZQCo@Base 12 ++ _D3std3utf__T5byUTFTaVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNaNbNiNfQClZQCp@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTAaZQDoFNaNbNiNfQpZSQEpQEo__TQEnTwVQEki1Z__TQFcTSQFsQFr__T10byCodeUnitTQCsZQrFQCzZ14ByCodeUnitImplZQHfFNcQCfZ6Result@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTAxaZQDpFNaNbNiNfQqZSQEqQEp__TQEoTwVQEli1Z__TQFdTSQFtQFs__T10byCodeUnitTQCtZQrFQDaZ14ByCodeUnitImplZQHgFNcQCfZ6Result@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTAxuZQDpFNaNbNiNfQqZSQEqQEp__TQEoTwVQEli1Z__TQFdTSQFtQFs__T10byCodeUnitTQCtZQrFQDaZ14ByCodeUnitImplZQHgFNcQCfZ6Result@Base 12 ++ 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_D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQFjFNcQCeZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQFjFNcQCeZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQFjFNcQCeZ6Result9__xtoHashFNbNeKxSQHdQHc__TQHbTwVQGyi1Z__TQHqTQEjZQHyFNcQEtZQCpZm@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNaNbNiNfQClZSQGmQGl__TQGkTwVQGhi1Z__TQGzTQDsZQHhFNcQEcZ6Result@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result11__xopEqualsMxFKxSQHfQHe__TQHdTwVQHai1Z__TQHsTQElZQIaFNcQEvZQCqZb@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result4backMFNaNdNlNfZw@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result4saveMFNaNbNdNiNfZSQHfQHe__TQHdTwVQHai1Z__TQHsTQElZQIaFNcQEvZQCq@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result5frontMFNaNbNdNiNlNfZw@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result6__ctorMFNaNbNcNiNfNkMQDmZSQHnQHm__TQHlTwVQHii1Z__TQIaTQEtZQIiFNcQFdZQCy@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result6__ctorMFNaNbNcNiNfNkMQDmkZSQHoQHn__TQHmTwVQHji1Z__TQIbTQEuZQIjFNcQFeZQCz@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result6__ctorMFNaNbNcNiNfNkMQDmkkZSQHpQHo__TQHnTwVQHki1Z__TQIcTQEvZQIkFNcQFfZQDa@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result6__initZ@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result7popBackMFNaNfZv@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std3utf__T5byUTFTwVEQv8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDhTSQDxQDw__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFkFNcQCfZ6Result9__xtoHashFNbNeKxSQHeQHd__TQHcTwVQGzi1Z__TQHrTQEkZQHzFNcQEuZQCpZm@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAaZQDgFNaNeMKQnKmZw@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAuZQDgFNaNeMKQnKmZw@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAwZQDgFNaNeMKQnKmZw@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxaZQDhFNaNeMKQoKmZw@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TAxuZQDhFNaNeMKQoKmZw@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TQCaZQDhFNaNeMKQCoKmZw@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TxAaZQDhFNaNeMKxQoKmZw@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TxAuZQDhFNaNeMKxQoKmZw@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0TxAwZQDhFNaNeMKxQoKmZw@Base 12 ++ _D3std3utf__T6decodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1TQCaZQDhFNaNbNiNeMKQCsKmZw@Base 12 ++ _D3std3utf__T6encodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0ZQDdFNaNfJG1wwZm@Base 12 ++ _D3std3utf__T6encodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0ZQDdFNaNfJG2uwZm@Base 12 ++ _D3std3utf__T6encodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0ZQDdFNaNfJG4awZm@Base 12 ++ _D3std3utf__T6encodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai0ZQDdFNaNfMKAawZv@Base 12 ++ _D3std3utf__T6encodeVEQu8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1ZQDdFNaNbNiNfJG4awZm@Base 12 ++ _D3std3utf__T6strideTAaZQlFNaNfQkZk@Base 12 ++ _D3std3utf__T6strideTAxaZQmFNaNfQlmZk@Base 12 ++ _D3std3utf__T6strideTAyaZQmFNaNfKQmmZk@Base 12 ++ _D3std3utf__T6toUTFzTPaZ__TQoTAyaZQvFNaNbNfQnZQz@Base 12 ++ _D3std3utf__T7toUTF32TAxaZQnFNaNbNfMQoZAyw@Base 12 ++ _D3std3utf__T7toUTF32TAyaZQnFNaNbNfMQoZAyw@Base 12 ++ _D3std3utf__T9toUTFImplTAywTAxaZQtFNaNbNfMQoZQv@Base 12 ++ _D3std3utf__T9toUTFImplTAywTAyaZQtFNaNbNfMQoZQv@Base 12 ++ _D3std3xml10DigitTableyAi@Base 12 ++ _D3std3xml10checkCharsFNaNfKAyaZv@Base 12 ++ _D3std3xml10checkSpaceFNaNfKAyaZv@Base 12 ++ _D3std3xml10isBaseCharFNaNbNiNfwZb@Base 12 ++ _D3std3xml10isExtenderFNaNbNiNfwZb@Base 12 ++ _D3std3xml11PIException6__ctorMFNaNfAyaZCQBnQBmQBl@Base 12 ++ _D3std3xml11PIException6__initZ@Base 12 ++ _D3std3xml11PIException6__vtblZ@Base 12 ++ _D3std3xml11PIException7__ClassZ@Base 12 ++ _D3std3xml11XIException6__ctorMFNaNfAyaZCQBnQBmQBl@Base 12 ++ _D3std3xml11XIException6__initZ@Base 12 ++ _D3std3xml11XIException6__vtblZ@Base 12 ++ _D3std3xml11XIException7__ClassZ@Base 12 ++ _D3std3xml11__moduleRefZ@Base 12 ++ _D3std3xml11checkCDSectFNaNfKAyaZv@Base 12 ++ _D3std3xml11checkPrologFNaNfKAyaZv@Base 12 ++ _D3std3xml11checkSDDeclFNaNfKAyaZv@Base 12 ++ _D3std3xml12TagException6__ctorMFNaNfAyaZCQBoQBnQBm@Base 12 ++ _D3std3xml12TagException6__initZ@Base 12 ++ _D3std3xml12TagException6__vtblZ@Base 12 ++ _D3std3xml12TagException7__ClassZ@Base 12 ++ _D3std3xml12XMLException6__ctorMFNaNfAyaZCQBoQBnQBm@Base 12 ++ _D3std3xml12XMLException6__initZ@Base 12 ++ _D3std3xml12XMLException6__vtblZ@Base 12 ++ _D3std3xml12XMLException7__ClassZ@Base 12 ++ _D3std3xml12__ModuleInfoZ@Base 12 ++ _D3std3xml12checkCharRefFNaNfKAyaJwZv@Base 12 ++ _D3std3xml12checkCommentFNaNfKAyaZv@Base 12 ++ _D3std3xml12checkContentFNaNfKAyaZv@Base 12 ++ _D3std3xml12checkElementFNaNfKAyaZv@Base 12 ++ _D3std3xml12checkEncNameFNaNfKAyaZv@Base 12 ++ _D3std3xml12checkLiteralFNaNfAyaKQeZv@Base 12 ++ _D3std3xml12checkXMLDeclFNaNfKAyaZv@Base 12 ++ _D3std3xml12requireOneOfFNaNfKAyaQdZa@Base 12 ++ _D3std3xml13BaseCharTableyAi@Base 12 ++ _D3std3xml13ElementParser3tagMxFNaNbNdNiNfZxCQBrQBq3Tag@Base 12 ++ _D3std3xml13ElementParser4onPIMFNaNbNdNiNfDFAyaZvZv@Base 12 ++ _D3std3xml13ElementParser4onXIMFNaNbNdNiNfDFAyaZvZv@Base 12 ++ _D3std3xml13ElementParser5parseMFZv@Base 12 ++ _D3std3xml13ElementParser6__ctorMFNaNbNiNfCQBpQBo3TagPAyaZCQCfQCeQCd@Base 12 ++ _D3std3xml13ElementParser6__ctorMFNaNbNiNfCQBpQBoQBnZQl@Base 12 ++ _D3std3xml13ElementParser6__ctorMFNaNbNiNfZCQBqQBpQBo@Base 12 ++ _D3std3xml13ElementParser6__initZ@Base 12 ++ _D3std3xml13ElementParser6__vtblZ@Base 12 ++ _D3std3xml13ElementParser6onTextMFNaNbNdNiNfDFAyaZvZv@Base 12 ++ _D3std3xml13ElementParser7__ClassZ@Base 12 ++ _D3std3xml13ElementParser7onCDataMFNaNbNdNiNfDFAyaZvZv@Base 12 ++ _D3std3xml13ElementParser8toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std3xml13ElementParser9onCommentMFNaNbNdNiNfDFAyaZvZv@Base 12 ++ _D3std3xml13ElementParser9onTextRawMFNaNbNiNfDFAyaZvZv@Base 12 ++ _D3std3xml13ExtenderTableyAi@Base 12 ++ _D3std3xml13TextException6__ctorMFNaNfAyaZCQBpQBoQBn@Base 12 ++ _D3std3xml13TextException6__initZ@Base 12 ++ _D3std3xml13TextException6__vtblZ@Base 12 ++ _D3std3xml13TextException7__ClassZ@Base 12 ++ _D3std3xml13checkAttValueFNaNfKAyaZv@Base 12 ++ _D3std3xml13checkCharDataFNaNfKAyaZv@Base 12 ++ _D3std3xml13checkDocumentFNaNfKAyaZv@Base 12 ++ _D3std3xml13isIdeographicFNaNbNiNfwZb@Base 12 ++ _D3std3xml14CDataException6__ctorMFNaNfAyaZCQBqQBpQBo@Base 12 ++ _D3std3xml14CDataException6__initZ@Base 12 ++ _D3std3xml14CDataException6__vtblZ@Base 12 ++ _D3std3xml14CDataException7__ClassZ@Base 12 ++ _D3std3xml14CheckException6__ctorMFNaNfAyaQdCQBrQBqQBpZQl@Base 12 ++ _D3std3xml14CheckException6__initZ@Base 12 ++ _D3std3xml14CheckException6__vtblZ@Base 12 ++ _D3std3xml14CheckException7__ClassZ@Base 12 ++ _D3std3xml14CheckException8completeMFNaNfAyaZv@Base 12 ++ _D3std3xml14CheckException8toStringMxFNaNfZAya@Base 12 ++ _D3std3xml14DocumentParser6__ctorMFAyaZCQBmQBlQBk@Base 12 ++ _D3std3xml14DocumentParser6__initZ@Base 12 ++ _D3std3xml14DocumentParser6__vtblZ@Base 12 ++ _D3std3xml14DocumentParser7__ClassZ@Base 12 ++ _D3std3xml14XMLInstruction10isEmptyXMLMxFNaNbNdNiNlNfZb@Base 12 ++ _D3std3xml14XMLInstruction5opCmpMxFNlNfMxC6ObjectZi@Base 12 ++ _D3std3xml14XMLInstruction6__ctorMFNaNfAyaZCQBqQBpQBo@Base 12 ++ _D3std3xml14XMLInstruction6__initZ@Base 12 ++ _D3std3xml14XMLInstruction6__vtblZ@Base 12 ++ _D3std3xml14XMLInstruction6toHashMxFNbNlNfZm@Base 12 ++ _D3std3xml14XMLInstruction7__ClassZ@Base 12 ++ _D3std3xml14XMLInstruction8opEqualsMxFNfMxC6ObjectZb@Base 12 ++ _D3std3xml14XMLInstruction8toStringMxFNaNbNlNfZAya@Base 12 ++ _D3std3xml14checkAttributeFNaNfKAyaZv@Base 12 ++ _D3std3xml14checkEntityRefFNaNfKAyaZv@Base 12 ++ _D3std3xml14checkReferenceFNaNfKAyaZv@Base 12 ++ _D3std3xml15DecodeException6__ctorMFNaNfAyaZCQBrQBqQBp@Base 12 ++ _D3std3xml15DecodeException6__initZ@Base 12 ++ _D3std3xml15DecodeException6__vtblZ@Base 12 ++ _D3std3xml15DecodeException7__ClassZ@Base 12 ++ _D3std3xml15checkVersionNumFNaNfKAyaZv@Base 12 ++ _D3std3xml15isCombiningCharFNaNbNiNfwZb@Base 12 ++ _D3std3xml16CommentException6__ctorMFNaNfAyaZCQBsQBrQBq@Base 12 ++ _D3std3xml16CommentException6__initZ@Base 12 ++ _D3std3xml16CommentException6__vtblZ@Base 12 ++ _D3std3xml16CommentException7__ClassZ@Base 12 ++ _D3std3xml16IdeographicTableyAi@Base 12 ++ _D3std3xml16checkDocTypeDeclFNaNfKAyaZv@Base 12 ++ _D3std3xml16checkVersionInfoFNaNfKAyaZv@Base 12 ++ _D3std3xml17checkEncodingDeclFNaNfKAyaZv@Base 12 ++ _D3std3xml18CombiningCharTableyAi@Base 12 ++ _D3std3xml20InvalidTypeException6__ctorMFNaNfAyaZCQBwQBvQBu@Base 12 ++ _D3std3xml20InvalidTypeException6__initZ@Base 12 ++ _D3std3xml20InvalidTypeException6__vtblZ@Base 12 ++ _D3std3xml20InvalidTypeException7__ClassZ@Base 12 ++ _D3std3xml21ProcessingInstruction10isEmptyXMLMxFNaNbNdNiNlNfZb@Base 12 ++ _D3std3xml21ProcessingInstruction5opCmpMxFNlNfMxC6ObjectZi@Base 12 ++ _D3std3xml21ProcessingInstruction6__ctorMFNaNfAyaZCQBxQBwQBv@Base 12 ++ _D3std3xml21ProcessingInstruction6__initZ@Base 12 ++ _D3std3xml21ProcessingInstruction6__vtblZ@Base 12 ++ _D3std3xml21ProcessingInstruction6toHashMxFNbNlNfZm@Base 12 ++ _D3std3xml21ProcessingInstruction7__ClassZ@Base 12 ++ _D3std3xml21ProcessingInstruction8opEqualsMxFNfMxC6ObjectZb@Base 12 ++ _D3std3xml21ProcessingInstruction8toStringMxFNaNbNlNfZAya@Base 12 ++ _D3std3xml3Tag11__invariantMxFZv@Base 12 ++ _D3std3xml3Tag11toEndStringMxFNfZAya@Base 12 ++ _D3std3xml3Tag12__invariant0MxFZv@Base 12 ++ _D3std3xml3Tag13toEmptyStringMxFNfZAya@Base 12 ++ _D3std3xml3Tag13toStartStringMxFNfZAya@Base 12 ++ _D3std3xml3Tag14toNonEndStringMxFNfZAya@Base 12 ++ _D3std3xml3Tag5isEndMxFNaNbNdNiNfZb@Base 12 ++ _D3std3xml3Tag5opCmpMxFC6ObjectZi@Base 12 ++ _D3std3xml3Tag6__ctorMFNaNfAyaEQBdQBc7TagTypeZCQBtQBsQBr@Base 12 ++ _D3std3xml3Tag6__ctorMFNaNfKAyabZCQBgQBfQBe@Base 12 ++ _D3std3xml3Tag6__initZ@Base 12 ++ _D3std3xml3Tag6__vtblZ@Base 12 ++ _D3std3xml3Tag6toHashMxFNbNfZm@Base 12 ++ _D3std3xml3Tag7__ClassZ@Base 12 ++ _D3std3xml3Tag7isEmptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std3xml3Tag7isStartMxFNaNbNdNiNfZb@Base 12 ++ _D3std3xml3Tag8opEqualsMxFMC6ObjectZb@Base 12 ++ _D3std3xml3Tag8toStringMxFNfZAya@Base 12 ++ _D3std3xml4Item6__initZ@Base 12 ++ _D3std3xml4Item6__vtblZ@Base 12 ++ _D3std3xml4Item6prettyMxFNlNfkZAAya@Base 12 ++ _D3std3xml4Item7__ClassZ@Base 12 ++ _D3std3xml4Text10isEmptyXMLMxFNaNbNdNiNlNfZb@Base 12 ++ _D3std3xml4Text5opCmpMxFNlNfMxC6ObjectZi@Base 12 ++ _D3std3xml4Text6__ctorMFNaNfAyaZCQBfQBeQBd@Base 12 ++ _D3std3xml4Text6__initZ@Base 12 ++ _D3std3xml4Text6__vtblZ@Base 12 ++ _D3std3xml4Text6toHashMxFNbNlNfZm@Base 12 ++ _D3std3xml4Text7__ClassZ@Base 12 ++ _D3std3xml4Text8opEqualsMxFNfMxC6ObjectZb@Base 12 ++ _D3std3xml4Text8toStringMxFNaNbNiNlNfZAya@Base 12 ++ _D3std3xml4chopFNaNbNfKAyamZQf@Base 12 ++ _D3std3xml4exitFAyaZv@Base 12 ++ _D3std3xml4optcFNaNbNfKAyaaZb@Base 12 ++ _D3std3xml4reqcFNaNfKAyaaZv@Base 12 ++ _D3std3xml5CData10isEmptyXMLMxFNaNbNdNiNlNfZb@Base 12 ++ _D3std3xml5CData5opCmpMxFNlNfMxC6ObjectZi@Base 12 ++ _D3std3xml5CData6__ctorMFNaNfAyaZCQBgQBfQBe@Base 12 ++ _D3std3xml5CData6__initZ@Base 12 ++ _D3std3xml5CData6__vtblZ@Base 12 ++ _D3std3xml5CData6toHashMxFNbNlNfZm@Base 12 ++ _D3std3xml5CData7__ClassZ@Base 12 ++ _D3std3xml5CData8opEqualsMxFNfMxC6ObjectZb@Base 12 ++ _D3std3xml5CData8toStringMxFNaNbNlNfZAya@Base 12 ++ _D3std3xml5checkFNaNfAyaZv@Base 12 ++ _D3std3xml6decodeFNaNfAyaEQyQw10DecodeModeZQv@Base 12 ++ _D3std3xml6isCharFNaNbNiNfwZb@Base 12 ++ _D3std3xml6lookupFNaNbNiNfAxiiZb@Base 12 ++ _D3std3xml7Comment10isEmptyXMLMxFNaNbNdNiNlNfZb@Base 12 ++ _D3std3xml7Comment5opCmpMxFNlNfMxC6ObjectZi@Base 12 ++ _D3std3xml7Comment6__ctorMFNaNfAyaZCQBiQBhQBg@Base 12 ++ _D3std3xml7Comment6__initZ@Base 12 ++ _D3std3xml7Comment6__vtblZ@Base 12 ++ _D3std3xml7Comment6toHashMxFNbNlNfZm@Base 12 ++ _D3std3xml7Comment7__ClassZ@Base 12 ++ _D3std3xml7Comment8opEqualsMxFNfMxC6ObjectZb@Base 12 ++ _D3std3xml7Comment8toStringMxFNaNbNlNfZAya@Base 12 ++ _D3std3xml7Element10appendItemMFNaNfCQBjQBi4ItemZv@Base 12 ++ _D3std3xml7Element10isEmptyXMLMxFNaNbNdNiNlNfZb@Base 12 ++ _D3std3xml7Element4textMxFEQzQx10DecodeModeZAya@Base 12 ++ _D3std3xml7Element5opCmpMxFNfMxC6ObjectZi@Base 12 ++ _D3std3xml7Element5parseMFCQzQx13ElementParserZv@Base 12 ++ _D3std3xml7Element6__ctorMFNaNfAyaQdZCQBkQBjQBi@Base 12 ++ _D3std3xml7Element6__ctorMFNaNfxCQBfQBe3TagZCQBrQBqQBp@Base 12 ++ _D3std3xml7Element6__initZ@Base 12 ++ _D3std3xml7Element6__vtblZ@Base 12 ++ _D3std3xml7Element6prettyMxFNlNfkZAAya@Base 12 ++ _D3std3xml7Element6toHashMxFNbNlNfZm@Base 12 ++ _D3std3xml7Element7__ClassZ@Base 12 ++ _D3std3xml7Element8opEqualsMxFNfMxC6ObjectZb@Base 12 ++ _D3std3xml7Element8toStringMxFNlNfZAya@Base 12 ++ _D3std3xml7Element__T10opOpAssignVAyaa1_7eZQwMFNaNfCQByQBx21ProcessingInstructionZv@Base 12 ++ _D3std3xml7Element__T10opOpAssignVAyaa1_7eZQwMFNaNfCQByQBx4TextZv@Base 12 ++ _D3std3xml7Element__T10opOpAssignVAyaa1_7eZQwMFNaNfCQByQBx5CDataZv@Base 12 ++ _D3std3xml7Element__T10opOpAssignVAyaa1_7eZQwMFNaNfCQByQBx7CommentZv@Base 12 ++ _D3std3xml7Element__T10opOpAssignVAyaa1_7eZQwMFNaNfCQByQBxQBwZv@Base 12 ++ _D3std3xml7checkEqFNaNfKAyaZv@Base 12 ++ _D3std3xml7checkPIFNaNfKAyaZv@Base 12 ++ _D3std3xml7isDigitFNaNbNiNfwZb@Base 12 ++ _D3std3xml7isSpaceFNaNbNiNfwZb@Base 12 ++ _D3std3xml7startOfFNaNbNfAyaZQe@Base 12 ++ _D3std3xml8Document5opCmpMxFNlNfMxC6ObjectZi@Base 12 ++ _D3std3xml8Document6__ctorMFAyaZCQBfQBeQBd@Base 12 ++ _D3std3xml8Document6__ctorMFxCQBcQBb3TagZCQBoQBnQBm@Base 12 ++ _D3std3xml8Document6__initZ@Base 12 ++ _D3std3xml8Document6__vtblZ@Base 12 ++ _D3std3xml8Document6toHashMxFNbNlNeZm@Base 12 ++ _D3std3xml8Document7__ClassZ@Base 12 ++ _D3std3xml8Document8opEqualsMxFNfMxC6ObjectZb@Base 12 ++ _D3std3xml8Document8toStringMxFNlNfZAya@Base 12 ++ _D3std3xml8checkEndFNaNfAyaKQeZv@Base 12 ++ _D3std3xml8checkTagFNaNfKAyaJQeJQhZv@Base 12 ++ _D3std3xml8isLetterFNaNbNiNfwZb@Base 12 ++ _D3std3xml9CharTableyAi@Base 12 ++ _D3std3xml9checkETagFNaNfKAyaJQeZv@Base 12 ++ _D3std3xml9checkMiscFNaNfKAyaZv@Base 12 ++ _D3std3xml9checkNameFNaNfKAyaJQeZv@Base 12 ++ _D3std3xml__T3optS_DQsQq10checkSpaceFNaNfKAyaZvZQBjQp@Base 12 ++ _D3std3xml__T3optS_DQsQq11checkSDDeclFNaNfKAyaZvZQBkQp@Base 12 ++ _D3std3xml__T3optS_DQsQq12checkXMLDeclFNaNfKAyaZvZQBlQp@Base 12 ++ _D3std3xml__T3optS_DQsQq17checkEncodingDeclFNaNfKAyaZvZQBqQp@Base 12 ++ _D3std3xml__T3optS_DQsQq__T3seqS_DQBgQBf16checkDocTypeDeclFNaNfKAyaZvS_DQCsQCr__T4starS_DQDjQDi9checkMiscQBvZQBcQCcZQDlQCjZQEgQCq@Base 12 ++ _D3std3xml__T3seqS_DQsQq10checkSpaceFNaNfKAyaZvS_DQBwQBv14checkAttributeQBkZQClQBr@Base 12 ++ _D3std3xml__T3seqS_DQsQq16checkDocTypeDeclFNaNfKAyaZvS_DQCcQCb__T4starS_DQCtQCs9checkMiscQBvZQBcQCcZQDjQCj@Base 12 ++ _D3std3xml__T4starS_DQtQr9checkMiscFNaNfKAyaZvZQBiQp@Base 12 ++ _D3std3xml__T4starS_DQtQr__T3seqS_DQBhQBg10checkSpaceFNaNfKAyaZvS_DQCnQCm14checkAttributeQBkZQCnQBrZQDjQBy@Base 12 ++ _D3std3xml__T6encodeTAyaZQmFNaNbNfQnZQq@Base 12 ++ _D3std3xml__T6quotedS_DQvQt12checkEncNameFNaNfKAyaZvZQBoQp@Base 12 ++ _D3std3xml__T6quotedS_DQvQt15checkVersionNumFNaNfKAyaZvZQBrQp@Base 12 ++ _D3std3xml__T6toTypeTxCQvQt3TagZQtFNaNfNkMNgC6ObjectZNgxCQCdQCcQBk@Base 12 ++ _D3std3xml__T6toTypeTxCQvQt4ItemZQuFNaNfNkMNgC6ObjectZNgxCQCeQCdQBl@Base 12 ++ _D3std3xml__T6toTypeTxCQvQt7ElementZQxFNaNfNkMNgC6ObjectZNgxCQChQCgQBo@Base 12 ++ _D3std3xml__T6toTypeTxCQvQt8DocumentZQyFNaNfNkMNgC6ObjectZNgxCQCiQChQBp@Base 12 ++ _D3std3zip10ZipArchive12deleteMemberMFNfCQBnQBm13ArchiveMemberZv@Base 12 ++ _D3std3zip10ZipArchive12totalEntriesMxFNaNbNdNiNfZk@Base 12 ++ _D3std3zip10ZipArchive13removeSegmentMFNaNfkkZv@Base 12 ++ _D3std3zip10ZipArchive19zip64ExtractVersionxt@Base 12 ++ _D3std3zip10ZipArchive24endOfCentralDirSignatureyAh@Base 12 ++ _D3std3zip10ZipArchive24localFileHeaderSignatureyAh@Base 12 ++ _D3std3zip10ZipArchive25archiveExtraDataSignatureyAh@Base 12 ++ _D3std3zip10ZipArchive25digitalSignatureSignatureyAh@Base 12 ++ _D3std3zip10ZipArchive25findEndOfCentralDirRecordMFZk@Base 12 ++ _D3std3zip10ZipArchive26centralFileHeaderSignatureyAh@Base 12 ++ _D3std3zip10ZipArchive29zip64EndOfCentralDirSignatureyAh@Base 12 ++ _D3std3zip10ZipArchive36zip64EndOfCentralDirLocatorSignatureyAh@Base 12 ++ _D3std3zip10ZipArchive4dataMFNaNbNdNiNfZAh@Base 12 ++ _D3std3zip10ZipArchive5buildMFNaNfZAv@Base 12 ++ _D3std3zip10ZipArchive6__ctorMFAvZCQBhQBgQBf@Base 12 ++ _D3std3zip10ZipArchive6__ctorMFNaNbNiNfZCQBnQBmQBl@Base 12 ++ _D3std3zip10ZipArchive6__initZ@Base 12 ++ _D3std3zip10ZipArchive6__vtblZ@Base 12 ++ _D3std3zip10ZipArchive6expandMFCQBeQBd13ArchiveMemberZAh@Base 12 ++ _D3std3zip10ZipArchive7Segment6__initZ@Base 12 ++ _D3std3zip10ZipArchive7__ClassZ@Base 12 ++ _D3std3zip10ZipArchive7getUintMFNaNbNiNfkZk@Base 12 ++ _D3std3zip10ZipArchive7isZip64MFNaNbNdNiNfbZv@Base 12 ++ _D3std3zip10ZipArchive7isZip64MxFNaNbNdNiNfZb@Base 12 ++ _D3std3zip10ZipArchive7putUintMFNaNbNiNfkkZv@Base 12 ++ _D3std3zip10ZipArchive8getUlongMFNaNbNiNfkZm@Base 12 ++ _D3std3zip10ZipArchive8putUlongMFNaNbNiNfkmZv@Base 12 ++ _D3std3zip10ZipArchive9addMemberMFNfCQBjQBi13ArchiveMemberZv@Base 12 ++ _D3std3zip10ZipArchive9directoryMFNaNbNdNiNfZHAyaCQBwQBv13ArchiveMember@Base 12 ++ _D3std3zip10ZipArchive9getUshortMFNaNbNiNfkZt@Base 12 ++ _D3std3zip10ZipArchive9putUshortMFNaNbNiNfktZv@Base 12 ++ _D3std3zip11__moduleRefZ@Base 12 ++ _D3std3zip12ZipException6__initZ@Base 12 ++ _D3std3zip12ZipException6__vtblZ@Base 12 ++ _D3std3zip12ZipException7__ClassZ@Base 12 ++ _D3std3zip12ZipException8__mixin26__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQCwQCvQCu@Base 12 ++ _D3std3zip12ZipException8__mixin26__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQCwQCvQCu@Base 12 ++ _D3std3zip12__ModuleInfoZ@Base 12 ++ _D3std3zip13ArchiveMember12expandedDataMFNaNbNdNiNfZAh@Base 12 ++ _D3std3zip13ArchiveMember12expandedDataMFNdNfAhZv@Base 12 ++ _D3std3zip13ArchiveMember12expandedSizeMxFNaNbNdNiNfZk@Base 12 ++ _D3std3zip13ArchiveMember14compressedDataMFNaNbNdNiNfZAh@Base 12 ++ _D3std3zip13ArchiveMember14compressedSizeMxFNaNbNdNiNfZk@Base 12 ++ _D3std3zip13ArchiveMember14extractVersionMxFNaNbNdNiNfZt@Base 12 ++ _D3std3zip13ArchiveMember14fileAttributesMFNdNfkZv@Base 12 ++ _D3std3zip13ArchiveMember14fileAttributesMxFNbNdNiZk@Base 12 ++ _D3std3zip13ArchiveMember17compressionMethodMFNaNdNfEQBzQBy17CompressionMethodZv@Base 12 ++ _D3std3zip13ArchiveMember17compressionMethodMxFNaNbNdNiNfZEQCfQCe17CompressionMethod@Base 12 ++ _D3std3zip13ArchiveMember4timeMFNaNbNdNiNfkZv@Base 12 ++ _D3std3zip13ArchiveMember4timeMFNdSQBh8datetime7systime7SysTimeZv@Base 12 ++ _D3std3zip13ArchiveMember4timeMxFNaNbNdNiNfZk@Base 12 ++ _D3std3zip13ArchiveMember5crc32MxFNaNbNdNiNfZk@Base 12 ++ _D3std3zip13ArchiveMember5indexMFNaNbNdNiNfkZk@Base 12 ++ _D3std3zip13ArchiveMember5indexMxFNaNbNdNiNfZk@Base 12 ++ _D3std3zip13ArchiveMember6__initZ@Base 12 ++ _D3std3zip13ArchiveMember6__vtblZ@Base 12 ++ _D3std3zip13ArchiveMember7__ClassZ@Base 12 ++ _D3std4conv10parseErrorFNaNfLAyaQdmZCQBjQBi13ConvException@Base 12 ++ _D3std4conv11__moduleRefZ@Base 12 ++ _D3std4conv11hexToStringFNaNbNfAyaZQe@Base 12 ++ _D3std4conv11hexToStringFNaNbNfAyuZQe@Base 12 ++ _D3std4conv11hexToStringFNaNbNfAywZQe@Base 12 ++ _D3std4conv12__ModuleInfoZ@Base 12 ++ _D3std4conv13ConvException6__initZ@Base 12 ++ _D3std4conv13ConvException6__vtblZ@Base 12 ++ _D3std4conv13ConvException7__ClassZ@Base 12 ++ _D3std4conv13ConvException8__mixin26__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQCyQCxQCv@Base 12 ++ _D3std4conv13ConvException8__mixin26__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQCyQCxQCv@Base 12 ++ _D3std4conv14isOctalLiteralFNaNbNiNfxAyaZb@Base 12 ++ _D3std4conv20strippedOctalLiteralFAyaZQe@Base 12 ++ _D3std4conv21ConvOverflowException6__ctorMFNaNbNfAyaQdmZCQCdQCcQCa@Base 12 ++ _D3std4conv21ConvOverflowException6__initZ@Base 12 ++ _D3std4conv21ConvOverflowException6__vtblZ@Base 12 ++ _D3std4conv21ConvOverflowException7__ClassZ@Base 12 ++ _D3std4conv__T13hexStrLiteralTAyaZQuFNaNbNeMQoZAa@Base 12 ++ _D3std4conv__T13hexStrLiteralTAyuZQuFNaNbNeMQoZAu@Base 12 ++ _D3std4conv__T13hexStrLiteralTAywZQuFNaNbNeMQoZAw@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTAaZQrFNaNbNfQmZQz@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTAxaZQsFNaNbNfQnZQBa@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTEQBb12experimental6logger4core8LogLevelZQCcFNaNfQBwZQCk@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTEQBb5regex8internal2ir2IRZQBoFNaNfQBiZQBw@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTEQBb6socket12SocketOptionZQBoFNaNfQBiZQBw@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTPSQBc11parallelism12AbstractTaskZQBvFNaNfQBpZQCd@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTPaZQrFNaNbQkZQx@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTPxaZQsFNaNbQlZQy@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTPxhZQsFNaNfQlZQy@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTQkZQrFNaNbNiNfQyZQBb@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTSQBb11concurrency3TidZQBkFNaNfQBeZQBs@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTSQBb4path__T16asNormalizedPathTSQCg5range__T5chainTSQDa3utf__T10byCodeUnitTQDhZQrFQDoZ14ByCodeUnitImplTSQFaQCu__T10OnlyResultTaZQpTQDcZQDnFQDkQBnQDqZ6ResultZQFpFNkMQFdZQtZQHdFNaNfQGxZQHl@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTSQBb5range__T5chainTSQBv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQDuQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFjFNaNfQFdZQFr@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlThZQqFNaNbNfhZQx@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTiZQqFNaNbNfiZQx@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTkZQqFNaNbNfkZQx@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTmZQqFNaNbNfmZQx@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTtZQqFNaNbNftZQx@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTxkZQrFNaNbNfxkZQz@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTxlZQrFNaNbNfxlZQz@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTxmZQrFNaNbNfxmZQz@Base 12 ++ _D3std4conv__T2toTAyaZ__TQlTykZQrFNaNbNfykZQz@Base 12 ++ _D3std4conv__T2toThZ__TQjTxkZQpFNaNfxkZh@Base 12 ++ _D3std4conv__T2toTiZ__TQjTEQz3net7isemail15EmailStatusCodeZQBtFNaNbNiNfQBtZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTEQz8datetime4date5MonthZQBkFNaNbNiNfQBkZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjThZQoFNaNbNiNfhZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTiZQoFNaNbNiNfiZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTkZQoFNaNfkZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTmZQoFNaNfmZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTsZQoFNaNbNiNfsZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTxEQBa8datetime4date5MonthZQBmFNaNbNiNfxQBmZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTxhZQpFNaNbNiNfxhZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTxkZQpFNaNfxkZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTxlZQpFNaNfxlZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTxmZQpFNaNfxmZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTxsZQpFNaNbNiNfxsZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTxtZQpFNaNbNiNfxtZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTykZQpFNaNfykZi@Base 12 ++ _D3std4conv__T2toTiZ__TQjTymZQpFNaNfymZi@Base 12 ++ _D3std4conv__T2toTkZ__TQjTkZQoFNaNbNiNfkZk@Base 12 ++ _D3std4conv__T2toTkZ__TQjTmZQoFNaNfmZk@Base 12 ++ _D3std4conv__T2toTlZ__TQjTlZQoFNaNbNiNflZl@Base 12 ++ _D3std4conv__T2toTlZ__TQjTmZQoFNaNfmZl@Base 12 ++ _D3std4conv__T2toTmZ__TQjTkZQoFNaNbNiNfkZm@Base 12 ++ _D3std4conv__T2toTmZ__TQjTmZQoFNaNbNiNfmZm@Base 12 ++ _D3std4conv__T2toTtZ__TQjTAxaZQqFNaNfQlZt@Base 12 ++ _D3std4conv__T2toTwZ__TQjTwZQoFNaNbNiNfwZw@Base 12 ++ _D3std4conv__T4textTAxaTAyaTQiZQrFNaNbNfQuQsQyZQx@Base 12 ++ _D3std4conv__T4textTAyaTAxaTQiZQrFNaNbNfQuQsQyZQBb@Base 12 ++ _D3std4conv__T4textTAyaTAxaZQoFNaNbNfQrQpZQw@Base 12 ++ _D3std4conv__T4textTAyaTQeTQhTAxaTQoZQxFNaNbNfQBaQBdQBgQzQBlZQBp@Base 12 ++ _D3std4conv__T4textTAyaTQeTQhTQkTkZQvFNaNbNfQyQBaQBdQBgkZQBl@Base 12 ++ _D3std4conv__T4textTAyaTQeTQhTQkZQtFNaNbNfQwQyQBaQBdZQBh@Base 12 ++ _D3std4conv__T4textTAyaTQeTQhZQqFNaNbNfQtQvQxZQBa@Base 12 ++ _D3std4conv__T4textTAyaTQeTiTQjTiTQoZQxFNaNbNfQBaQBdiQBhiQBlZQBp@Base 12 ++ _D3std4conv__T4textTAyaTQeZQnFNaNbNfQqQsZQv@Base 12 ++ _D3std4conv__T4textTAyaTaZQmFNaNbNfQpaZQt@Base 12 ++ _D3std4conv__T4textTAyaThTaTaTQkTmZQvFNaNbNfQyhaaQBdmZQBi@Base 12 ++ _D3std4conv__T4textTAyaTiTQgZQpFNaNbNfQsiQvZQy@Base 12 ++ _D3std4conv__T4textTAyaTiZQmFNaNbNfQpiZQt@Base 12 ++ _D3std4conv__T4textTAyaTkTQgTkZQrFNaNbNfQukQxkZQBb@Base 12 ++ _D3std4conv__T4textTAyaTkTQgTmTQlZQuFNaNbNfQxkQBamQBeZQBi@Base 12 ++ _D3std4conv__T4textTAyaTmTQgZQpFNaNbNfQsmQvZQy@Base 12 ++ _D3std4conv__T4textTAyaTwTQgZQpFNaNfQqwQtZQw@Base 12 ++ _D3std4conv__T4textTAyaTxaTQhZQqFNaNbNfQtxaQxZQBa@Base 12 ++ _D3std4conv__T4textTAyaTxaZQnFNaNbNfQqxaZQv@Base 12 ++ _D3std4conv__T4textTAyaZQkFNaNbNiNfQpZQs@Base 12 ++ _D3std4conv__T4textTEQt5regex8internal2ir2IRZQBfFNaNfQBhZAya@Base 12 ++ _D3std4conv__T4textTPSQu11parallelism12AbstractTaskTaTQBiZQBsFNaNfQBuaQByZAya@Base 12 ++ _D3std4conv__T4textTPxhTAyaTQiZQrFNaNfQsQqQwZQv@Base 12 ++ _D3std4conv__T5octalTiZQjFNaNbNfxAyaZi@Base 12 ++ _D3std4conv__T5parseThTAxaVEQBa8typecons__T4FlagVAyaa7_646f436f756e74ZQBbi0ZQCkFNaNfMKQClZh@Base 12 ++ _D3std4conv__T5parseTiTAxaVEQBa8typecons__T4FlagVAyaa7_646f436f756e74ZQBbi0ZQCkFNaNfMKQClZi@Base 12 ++ _D3std4conv__T5parseTkTAxaVEQBa8typecons__T4FlagVAyaa7_646f436f756e74ZQBbi0ZQCkFNaNfMKQClZk@Base 12 ++ _D3std4conv__T5parseTkTAxaVEQBa8typecons__T4FlagVAyaa7_646f436f756e74ZQBbi1ZQCkFNaNfMKQClZSQDlQCl__T5TupleTkVQCia4_64617461TmVQCza5_636f756e74ZQBr@Base 12 ++ _D3std4conv__T5parseTtTAxaVEQBa8typecons__T4FlagVAyaa7_646f436f756e74ZQBbi0ZQCkFNaNfMKQClZt@Base 12 ++ _D3std4conv__T5toStrTAyaTPSQz11parallelism12AbstractTaskZQBrFNaNfQBoZQBw@Base 12 ++ _D3std4conv__T5toStrTAyaTPxhZQpFNaNfQlZQs@Base 12 ++ _D3std4conv__T5toStrTAyaTSQy11concurrency3TidZQBgFNaNfQBdZQBl@Base 12 ++ _D3std4conv__T5toStrTAyaTSQy4path__T16asNormalizedPathTSQCc5range__T5chainTSQCw3utf__T10byCodeUnitTQDaZQrFQDhZ14ByCodeUnitImplTSQEwQCu__T10OnlyResultTaZQpTQDcZQDnFQDkQBnQDqZ6ResultZQFpFNkMQFdZQtZQGzFNaNfQGwZQHe@Base 12 ++ _D3std4conv__T5toStrTAyaTSQy5range__T5chainTSQBr3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQDqQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFfFNaNfQFcZQFk@Base 12 ++ _D3std4conv__T5toStrTyAaTEQy12experimental6logger4core8LogLevelZQByFNaNfQBvZyQCd@Base 12 ++ _D3std4conv__T5toStrTyAaTEQy5regex8internal2ir2IRZQBkFNaNfQBhZyQBp@Base 12 ++ _D3std4conv__T5toStrTyAaTEQy6socket12SocketOptionZQBkFNaNfQBhZyQBp@Base 12 ++ _D3std4conv__T6toImplTAyaTAaZQpFNaNbNfQmZQt@Base 12 ++ _D3std4conv__T6toImplTAyaTAxaZQqFNaNbNfQnZQu@Base 12 ++ _D3std4conv__T6toImplTAyaTEQz12experimental6logger4core8LogLevelZQBzFNaNfQBvZQCd@Base 12 ++ _D3std4conv__T6toImplTAyaTEQz5regex8internal2ir2IRZQBlFNaNfQBhZQBp@Base 12 ++ _D3std4conv__T6toImplTAyaTEQz6socket12SocketOptionZQBlFNaNfQBhZQBp@Base 12 ++ _D3std4conv__T6toImplTAyaTPSQBa11parallelism12AbstractTaskZQBtFNaNfQBpZQBx@Base 12 ++ _D3std4conv__T6toImplTAyaTPaZQpFNaNbQkZQr@Base 12 ++ _D3std4conv__T6toImplTAyaTPxaZQqFNaNbQlZQs@Base 12 ++ _D3std4conv__T6toImplTAyaTPxhZQqFNaNfQlZQs@Base 12 ++ _D3std4conv__T6toImplTAyaTQeZQpFNaNbNiNfQsZQv@Base 12 ++ _D3std4conv__T6toImplTAyaTSQz11concurrency3TidZQBhFNaNfQBdZQBl@Base 12 ++ _D3std4conv__T6toImplTAyaTSQz4path__T16asNormalizedPathTSQCd5range__T5chainTSQCx3utf__T10byCodeUnitTQDaZQrFQDhZ14ByCodeUnitImplTSQExQCu__T10OnlyResultTaZQpTQDcZQDnFQDkQBnQDqZ6ResultZQFpFNkMQFdZQtZQHaFNaNfQGwZQHe@Base 12 ++ _D3std4conv__T6toImplTAyaTSQz5range__T5chainTSQBs3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQDrQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFgFNaNfQFcZQFk@Base 12 ++ _D3std4conv__T6toImplTAyaThZQoFNaNbNehkEQBm5ascii10LetterCaseZQBo@Base 12 ++ _D3std4conv__T6toImplTAyaThZQoFNaNbNfhZQr@Base 12 ++ _D3std4conv__T6toImplTAyaTiZQoFNaNbNeikEQBm5ascii10LetterCaseZQBo@Base 12 ++ _D3std4conv__T6toImplTAyaTiZQoFNaNbNfiZQr@Base 12 ++ _D3std4conv__T6toImplTAyaTkZQoFNaNbNekkEQBm5ascii10LetterCaseZQBo@Base 12 ++ _D3std4conv__T6toImplTAyaTkZQoFNaNbNfkZQr@Base 12 ++ _D3std4conv__T6toImplTAyaTmZQoFNaNbNemkEQBm5ascii10LetterCaseZQBo@Base 12 ++ _D3std4conv__T6toImplTAyaTmZQoFNaNbNfmZQr@Base 12 ++ _D3std4conv__T6toImplTAyaTtZQoFNaNbNetkEQBm5ascii10LetterCaseZQBo@Base 12 ++ _D3std4conv__T6toImplTAyaTtZQoFNaNbNftZQr@Base 12 ++ _D3std4conv__T6toImplTAyaTxkZQpFNaNbNexkkEQBo5ascii10LetterCaseZQBq@Base 12 ++ _D3std4conv__T6toImplTAyaTxkZQpFNaNbNfxkZQt@Base 12 ++ _D3std4conv__T6toImplTAyaTxlZQpFNaNbNexlkEQBo5ascii10LetterCaseZQBq@Base 12 ++ _D3std4conv__T6toImplTAyaTxlZQpFNaNbNfxlZQt@Base 12 ++ _D3std4conv__T6toImplTAyaTxmZQpFNaNbNexmkEQBo5ascii10LetterCaseZQBq@Base 12 ++ _D3std4conv__T6toImplTAyaTxmZQpFNaNbNfxmZQt@Base 12 ++ _D3std4conv__T6toImplTAyaTykZQpFNaNbNeykkEQBo5ascii10LetterCaseZQBq@Base 12 ++ _D3std4conv__T6toImplTAyaTykZQpFNaNbNfykZQt@Base 12 ++ _D3std4conv__T6toImplThTxkZQnFNaNfxkZh@Base 12 ++ _D3std4conv__T6toImplTiTEQx3net7isemail15EmailStatusCodeZQBrFNaNbNiNfQBtZi@Base 12 ++ _D3std4conv__T6toImplTiTEQx8datetime4date5MonthZQBiFNaNbNiNfQBkZi@Base 12 ++ _D3std4conv__T6toImplTiThZQmFNaNbNiNfhZi@Base 12 ++ _D3std4conv__T6toImplTiTiZQmFNaNbNiNfiZi@Base 12 ++ _D3std4conv__T6toImplTiTkZQmFNaNfkZi@Base 12 ++ _D3std4conv__T6toImplTiTmZQmFNaNfmZi@Base 12 ++ _D3std4conv__T6toImplTiTsZQmFNaNbNiNfsZi@Base 12 ++ _D3std4conv__T6toImplTiTxEQy8datetime4date5MonthZQBjFNaNbNiNfxQBlZi@Base 12 ++ _D3std4conv__T6toImplTiTxhZQnFNaNbNiNfxhZi@Base 12 ++ _D3std4conv__T6toImplTiTxkZQnFNaNfxkZi@Base 12 ++ _D3std4conv__T6toImplTiTxlZQnFNaNfxlZi@Base 12 ++ _D3std4conv__T6toImplTiTxmZQnFNaNfxmZi@Base 12 ++ _D3std4conv__T6toImplTiTxsZQnFNaNbNiNfxsZi@Base 12 ++ _D3std4conv__T6toImplTiTxtZQnFNaNbNiNfxtZi@Base 12 ++ _D3std4conv__T6toImplTiTykZQnFNaNfykZi@Base 12 ++ _D3std4conv__T6toImplTiTymZQnFNaNfymZi@Base 12 ++ _D3std4conv__T6toImplTkTkZQmFNaNbNiNfkZk@Base 12 ++ _D3std4conv__T6toImplTkTmZQmFNaNfmZk@Base 12 ++ _D3std4conv__T6toImplTlTlZQmFNaNbNiNflZl@Base 12 ++ _D3std4conv__T6toImplTlTmZQmFNaNfmZl@Base 12 ++ _D3std4conv__T6toImplTmTkZQmFNaNbNiNfkZm@Base 12 ++ _D3std4conv__T6toImplTmTmZQmFNaNbNiNfmZm@Base 12 ++ _D3std4conv__T6toImplTtTAxaZQoFNaNfQlZt@Base 12 ++ _D3std4conv__T6toImplTwTwZQmFNaNbNiNfwZw@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa12experimental6logger4core8LogLevelVQBoi128ZQCjyQCd@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa12experimental6logger4core8LogLevelVQBoi160ZQCjyQCd@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa12experimental6logger4core8LogLevelVQBoi192ZQCjyQCd@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa12experimental6logger4core8LogLevelVQBoi1ZQChyQCb@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa12experimental6logger4core8LogLevelVQBoi255ZQCjyQCd@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa12experimental6logger4core8LogLevelVQBoi32ZQCiyQCc@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa12experimental6logger4core8LogLevelVQBoi64ZQCiyQCc@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa12experimental6logger4core8LogLevelVQBoi96ZQCiyQCc@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai128ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai129ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai130ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai132ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai133ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai134ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai136ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai137ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai138ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai140ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai141ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai142ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai144ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai145ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai146ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai148ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai149ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai150ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai152ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai153ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai154ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai156ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai157ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai158ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai160ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai161ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai162ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai164ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai165ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai166ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai168ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai172ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai176ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai180ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai184ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai188ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai192ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa5regex8internal2ir2IRVQBai196ZQBvyQBp@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai10ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai13ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai16ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai17ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai18ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai19ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai1ZQBtyQBn@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai20ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai21ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai26ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai2ZQBtyQBn@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai30ZQBuyQBo@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai3ZQBtyQBn@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai4ZQBtyQBn@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai5ZQBtyQBn@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai6ZQBtyQBn@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai7ZQBtyQBn@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai8ZQBtyQBn@Base 12 ++ _D3std4conv__T7enumRepTyAaTEQBa6socket12SocketOptionVQBai9ZQBtyQBn@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result10initializeMFNaNbNiNfiZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result4saveMFNaNbNdNiNfZSQDrQDq__TQDoVii10TaVQDji1TiZQEhFNaNbNiNfiZQCq@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result7opSliceMFNaNbNiNfmmZSQDuQDt__TQDrVii10TaVQDmi1TiZQEkFNaNbNiNfiZQCt@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZSQCsQCr__TQCpVii10TaVQCki1TiZQDiFNaNbNiNfiZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result10initializeMFNaNbNiNfkZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result4saveMFNaNbNdNiNfZSQDrQDq__TQDoVii10TaVQDji1TkZQEhFNaNbNiNfkZQCq@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result7opSliceMFNaNbNiNfmmZSQDuQDt__TQDrVii10TaVQDmi1TkZQEkFNaNbNiNfkZQCt@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZSQCsQCr__TQCpVii10TaVQCki1TkZQDiFNaNbNiNfkZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result10initializeMFNaNbNiNflZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result4saveMFNaNbNdNiNfZSQDrQDq__TQDoVii10TaVQDji1TlZQEhFNaNbNiNflZQCq@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result7opSliceMFNaNbNiNfmmZSQDuQDt__TQDrVii10TaVQDmi1TlZQEkFNaNbNiNflZQCt@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TlZQBrFNaNbNiNflZSQCsQCr__TQCpVii10TaVQCki1TlZQDiFNaNbNiNflZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result10initializeMFNaNbNiNfmZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result4saveMFNaNbNdNiNfZSQDrQDq__TQDoVii10TaVQDji1TmZQEhFNaNbNiNfmZQCq@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result7opSliceMFNaNbNiNfmmZSQDuQDt__TQDrVii10TaVQDmi1TmZQEkFNaNbNiNfmZQCt@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZSQCsQCr__TQCpVii10TaVQCki1TmZQDiFNaNbNiNfmZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result4saveMFNaNbNdNiNfZSQDrQDq__TQDoVii16TaVQDji0TkZQEhFNaNbNiNfkZQCq@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result6__ctorMFNaNbNcNiNfkZSQDuQDt__TQDrVii16TaVQDmi0TkZQEkFNaNbNiNfkZQCt@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result7opSliceMFNaNbNiNfmmZSQDuQDt__TQDrVii16TaVQDmi0TkZQEkFNaNbNiNfkZQCt@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TkZQBrFNaNbNiNfkZSQCsQCr__TQCpVii16TaVQCki0TkZQDiFNaNbNiNfkZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result4saveMFNaNbNdNiNfZSQDrQDq__TQDoVii16TaVQDji0TmZQEhFNaNbNiNfmZQCq@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result6__ctorMFNaNbNcNiNfmZSQDuQDt__TQDrVii16TaVQDmi0TmZQEkFNaNbNiNfmZQCt@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result7opSliceMFNaNbNiNfmmZSQDuQDt__TQDrVii16TaVQDmi0TmZQEkFNaNbNiNfmZQCt@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei0TmZQBrFNaNbNiNfmZSQCsQCr__TQCpVii16TaVQCki0TmZQDiFNaNbNiNfmZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result4saveMFNaNbNdNiNfZSQDrQDq__TQDoVii16TaVQDji1TkZQEhFNaNbNiNfkZQCq@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result6__ctorMFNaNbNcNiNfkZSQDuQDt__TQDrVii16TaVQDmi1TkZQEkFNaNbNiNfkZQCt@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result7opSliceMFNaNbNiNfmmZSQDuQDt__TQDrVii16TaVQDmi1TkZQEkFNaNbNiNfkZQCt@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TkZQBrFNaNbNiNfkZSQCsQCr__TQCpVii16TaVQCki1TkZQDiFNaNbNiNfkZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result4saveMFNaNbNdNiNfZSQDrQDq__TQDoVii16TaVQDji1TmZQEhFNaNbNiNfmZQCq@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result6__ctorMFNaNbNcNiNfmZSQDuQDt__TQDrVii16TaVQDmi1TmZQEkFNaNbNiNfmZQCt@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result7opSliceMFNaNbNiNfmmZSQDuQDt__TQDrVii16TaVQDmi1TmZQEkFNaNbNiNfmZQCt@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii16TaVEQBd5ascii10LetterCasei1TmZQBrFNaNbNiNfmZSQCsQCr__TQCpVii16TaVQCki1TmZQDiFNaNbNiNfmZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result4saveMFNaNbNdNiNfZSQDqQDp__TQDnVii2TaVQDii1TkZQEfFNaNbNiNfkZQCp@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result6__ctorMFNaNbNcNiNfkZSQDtQDs__TQDqVii2TaVQDli1TkZQEiFNaNbNiNfkZQCs@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result7opSliceMFNaNbNiNfmmZSQDtQDs__TQDqVii2TaVQDli1TkZQEiFNaNbNiNfkZQCs@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZSQCrQCq__TQCoVii2TaVQCji1TkZQDgFNaNbNiNfkZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result4saveMFNaNbNdNiNfZSQDqQDp__TQDnVii2TaVQDii1TmZQEfFNaNbNiNfmZQCp@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result6__ctorMFNaNbNcNiNfmZSQDtQDs__TQDqVii2TaVQDli1TmZQEiFNaNbNiNfmZQCs@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result7opSliceMFNaNbNiNfmmZSQDtQDs__TQDqVii2TaVQDli1TmZQEiFNaNbNiNfmZQCs@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii2TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZSQCrQCq__TQCoVii2TaVQCji1TmZQDgFNaNbNiNfmZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result4saveMFNaNbNdNiNfZSQDqQDp__TQDnVii8TaVQDii1TkZQEfFNaNbNiNfkZQCp@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result6__ctorMFNaNbNcNiNfkZSQDtQDs__TQDqVii8TaVQDli1TkZQEiFNaNbNiNfkZQCs@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result7opSliceMFNaNbNiNfmmZSQDtQDs__TQDqVii8TaVQDli1TkZQEiFNaNbNiNfkZQCs@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TkZQBqFNaNbNiNfkZSQCrQCq__TQCoVii8TaVQCji1TkZQDgFNaNbNiNfkZ6Result@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result4backMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result4saveMFNaNbNdNiNfZSQDqQDp__TQDnVii8TaVQDii1TmZQEfFNaNbNiNfmZQCp@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result6__ctorMFNaNbNcNiNfmZSQDtQDs__TQDqVii8TaVQDli1TmZQEiFNaNbNiNfmZQCs@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result6__initZ@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result7opSliceMFNaNbNiNfmmZSQDtQDs__TQDqVii8TaVQDli1TmZQEiFNaNbNiNfmZQCs@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4conv__T7toCharsVii8TaVEQBc5ascii10LetterCasei1TmZQBqFNaNbNiNfmZSQCrQCq__TQCoVii8TaVQCji1TmZQDgFNaNbNiNfmZ6Result@Base 12 ++ _D3std4conv__T8textImplTAyaTAxaTQiTQhZQyFNaNbNfQtQzQxZQBe@Base 12 ++ _D3std4conv__T8textImplTAyaTEQBb5regex8internal2ir2IRZQBoFNaNfQBiZQBq@Base 12 ++ _D3std4conv__T8textImplTAyaTPSQBc11parallelism12AbstractTaskTaTQBjZQCbFNaNfQBvaQBzZQCh@Base 12 ++ _D3std4conv__T8textImplTAyaTPxhTQiTQhZQyFNaNfQrQxQvZQBc@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTAxaTQlZQyFNaNbNfQxQsQBbZQBf@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTAxaZQvFNaNbNfQuQpZQz@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTQhTQkTAxaTQrZQBeFNaNbNfQBeQBhQBkQBaQBqZQBu@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTQhTQkTQnTkZQBcFNaNbNfQBcQBfQBiQBlkZQBq@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTQhTQkTQnZQBaFNaNbNfQBaQBdQBgQBjZQBn@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTQhTQkZQxFNaNbNfQwQyQBaZQBe@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTQhTiTQmTiTQrZQBeFNaNbNfQBeQBhiQBliQBpZQBt@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTQhZQuFNaNbNfQtQvZQy@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTaZQtFNaNbNfQsaZQw@Base 12 ++ _D3std4conv__T8textImplTAyaTQeThTaTaTQnTmZQBcFNaNbNfQBchaaQBimZQBn@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTiTQjZQwFNaNbNfQviQyZQBb@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTiZQtFNaNbNfQsiZQw@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTkTQjTkZQyFNaNbNfQxkQBakZQBf@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTkTQjTmTQoZQBbFNaNbNfQBbkQBfmQBjZQBn@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTmTQjZQwFNaNbNfQvmQyZQBb@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTwTQjZQwFNaNfQtwQwZQz@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTxaTQkZQxFNaNbNfQwxaQBaZQBe@Base 12 ++ _D3std4conv__T8textImplTAyaTQeTxaZQuFNaNbNfQtxaZQy@Base 12 ++ _D3std4conv__T8textImplTAyaTQeZQrFNaNbNiNfQsZQv@Base 12 ++ _D3std4conv__T8textImplTAyaTiZQqFNaNbNfiZQr@Base 12 ++ _D3std4conv__T8textImplTAyaTkZQqFNaNbNfkZQr@Base 12 ++ _D3std4conv__T8textImplTAyaTmZQqFNaNbNfmZQr@Base 12 ++ _D3std4conv__T8unsignedThZQmFNaNbNiNfhZh@Base 12 ++ _D3std4conv__T8unsignedTiZQmFNaNbNiNfiZk@Base 12 ++ _D3std4conv__T8unsignedTkZQmFNaNbNiNfkZk@Base 12 ++ _D3std4conv__T8unsignedTlZQmFNaNbNiNflZm@Base 12 ++ _D3std4conv__T8unsignedTmZQmFNaNbNiNfmZm@Base 12 ++ _D3std4conv__T8unsignedTtZQmFNaNbNiNftZt@Base 12 ++ _D3std4conv__T8unsignedTxkZQnFNaNbNiNfxkZk@Base 12 ++ _D3std4conv__T8unsignedTxlZQnFNaNbNiNfxlZm@Base 12 ++ _D3std4conv__T8unsignedTxmZQnFNaNbNiNfxmZm@Base 12 ++ _D3std4conv__T8unsignedTykZQnFNaNbNiNfykZk@Base 12 ++ _D3std4conv__T9convErrorTAxaTiZQrFNaNfQnAyamZCQBsQBr13ConvException@Base 12 ++ _D3std4conv__T9convErrorTAxaTkZQrFNaNfQnAyamZCQBsQBr13ConvException@Base 12 ++ _D3std4conv__T9convErrorTAxaTtZQrFNaNfQnAyamZCQBsQBr13ConvException@Base 12 ++ _D3std4file10attrIsFileFNaNbNiNfkZb@Base 12 ++ _D3std4file10dirEntriesFAyaEQBaQz8SpanModebZSQBrQBq11DirIterator@Base 12 ++ _D3std4file10dirEntriesFAyaQdEQBcQBb8SpanModebZ1fMFNaNbNfSQCeQCd8DirEntryZb@Base 12 ++ _D3std4file10dirEntriesFAyaQdEQBcQBb8SpanModebZSQBu9algorithm9iteration__T12FilterResultS_DQDlQDkQDiFQCzQDcQDabZ1fMFNaNbNfSQErQEq8DirEntryZbTSQFkQFj11DirIteratorZQDk@Base 12 ++ _D3std4file10existsImplFNbNiNeMPxaZb@Base 12 ++ _D3std4file10removeImplFNeMAxaMPxaZv@Base 12 ++ _D3std4file10renameImplFNeMAxaMQeMPxaMQeZv@Base 12 ++ _D3std4file11DirIterator11__fieldDtorMFZv@Base 12 ++ _D3std4file11DirIterator15__fieldPostblitMFNaNbNiNlZv@Base 12 ++ _D3std4file11DirIterator5emptyMFNdNfZb@Base 12 ++ _D3std4file11DirIterator5frontMFNdNfZSQBkQBj8DirEntry@Base 12 ++ _D3std4file11DirIterator6__ctorMFNcNeAyaEQBnQBm8SpanModebZSQCfQCeQCc@Base 12 ++ _D3std4file11DirIterator6__initZ@Base 12 ++ _D3std4file11DirIterator8opAssignMFNcNjSQBmQBlQBjZQl@Base 12 ++ _D3std4file11DirIterator8popFrontMFNfZv@Base 12 ++ _D3std4file11__moduleRefZ@Base 12 ++ _D3std4file11thisExePathFNeZAya@Base 12 ++ _D3std4file12__ModuleInfoZ@Base 12 ++ _D3std4file12mkdirRecurseFNfMAxaZv@Base 12 ++ _D3std4file12rmdirRecurseFNfKSQBcQBb8DirEntryZv@Base 12 ++ _D3std4file12rmdirRecurseFNfMAxaZv@Base 12 ++ _D3std4file12rmdirRecurseFNfSQBbQBa8DirEntryZv@Base 12 ++ _D3std4file12setTimesImplFNeMAxaMPxaSQBj8datetime7systime7SysTimeQBdZv@Base 12 ++ _D3std4file13FileException6__ctorMFNaNfMAxaMQeAyamZCQByQBxQBv@Base 12 ++ _D3std4file13FileException6__ctorMFNaNfMAxaMQeAyamkZCQBzQByQBw@Base 12 ++ _D3std4file13FileException6__ctorMFNeMAxakAyamZCQBuQBtQBr@Base 12 ++ _D3std4file13FileException6__initZ@Base 12 ++ _D3std4file13FileException6__vtblZ@Base 12 ++ _D3std4file13FileException7__ClassZ@Base 12 ++ _D3std4file13attrIsSymlinkFNaNbNiNfkZb@Base 12 ++ _D3std4file15DirIteratorImpl11__xopEqualsMxFKxSQBtQBsQBqZb@Base 12 ++ _D3std4file15DirIteratorImpl11popDirStackMFNeZv@Base 12 ++ _D3std4file15DirIteratorImpl15releaseDirStackMFNeZv@Base 12 ++ _D3std4file15DirIteratorImpl4nextMFNeZb@Base 12 ++ _D3std4file15DirIteratorImpl5emptyMFNdNfZb@Base 12 ++ _D3std4file15DirIteratorImpl5frontMFNdNfZSQBoQBn8DirEntry@Base 12 ++ _D3std4file15DirIteratorImpl6__dtorMFNfZv@Base 12 ++ _D3std4file15DirIteratorImpl6__initZ@Base 12 ++ _D3std4file15DirIteratorImpl6stepInMFNfAyaZ14trustedOpendirFNbNiNeQBbZPS4core3sys5posix6dirent3DIR@Base 12 ++ _D3std4file15DirIteratorImpl6stepInMFNfAyaZb@Base 12 ++ _D3std4file15DirIteratorImpl8hasExtraMFNfZb@Base 12 ++ _D3std4file15DirIteratorImpl8opAssignMFNcNjNeSQBsQBrQBpZQl@Base 12 ++ _D3std4file15DirIteratorImpl8popExtraMFNfZSQBpQBo8DirEntry@Base 12 ++ _D3std4file15DirIteratorImpl8popFrontMFNfZv@Base 12 ++ _D3std4file15DirIteratorImpl9DirHandle11__xopEqualsMxFKxSQCdQCcQCaQBmZb@Base 12 ++ _D3std4file15DirIteratorImpl9DirHandle6__initZ@Base 12 ++ _D3std4file15DirIteratorImpl9DirHandle9__xtoHashFNbNeKxSQCcQCbQBzQBlZm@Base 12 ++ _D3std4file15DirIteratorImpl9__xtoHashFNbNeKxSQBsQBrQBpZm@Base 12 ++ _D3std4file15DirIteratorImpl9mayStepInMFNfZb@Base 12 ++ _D3std4file15DirIteratorImpl9pushExtraMFNfSQBpQBo8DirEntryZv@Base 12 ++ _D3std4file15DirIteratorImpl__T6__ctorTAyaZQmMFNcNfQmEQCaQBz8SpanModebZSQCsQCrQCp@Base 12 ++ _D3std4file21getAvailableDiskSpaceFNfMAxaZm@Base 12 ++ _D3std4file6getcwdFNeZAya@Base 12 ++ _D3std4file7tempDirFNeZ12addSeparatorFNaNbNfAyaZQe@Base 12 ++ _D3std4file7tempDirFNeZ5cacheAya@Base 12 ++ _D3std4file7tempDirFNeZAya@Base 12 ++ _D3std4file7tempDirFNeZ__T15findExistingDirTAyaTQeTQhTQkTQnTQqZQBlFNfLQBaLQBeLQBiLQBmLQBqLQBuZQBy@Base 12 ++ _D3std4file8DirEntry10attributesMFNdNlNfZk@Base 12 ++ _D3std4file8DirEntry11__xopEqualsMxFKxSQBlQBkQBiZb@Base 12 ++ _D3std4file8DirEntry14linkAttributesMFNdNlNfZk@Base 12 ++ _D3std4file8DirEntry15_ensureStatDoneMFNlNeZv@Base 12 ++ _D3std4file8DirEntry16_ensureLStatDoneMFNlNeZv@Base 12 ++ _D3std4file8DirEntry16timeLastAccessedMFNdNlNfZSQBu8datetime7systime7SysTime@Base 12 ++ _D3std4file8DirEntry16timeLastModifiedMFNdNlNfZSQBu8datetime7systime7SysTime@Base 12 ++ _D3std4file8DirEntry17timeStatusChangedMFNdNlNfZSQBv8datetime7systime7SysTime@Base 12 ++ _D3std4file8DirEntry22_ensureStatOrLStatDoneMFNlNeZv@Base 12 ++ _D3std4file8DirEntry4nameMxFNaNbNdNjNfZAya@Base 12 ++ _D3std4file8DirEntry4sizeMFNdNlNfZm@Base 12 ++ _D3std4file8DirEntry5isDirMFNdNlNfZb@Base 12 ++ _D3std4file8DirEntry6__ctorMFNcNfAyaPS4core3sys5posix6direntQhZSQCkQCjQCh@Base 12 ++ _D3std4file8DirEntry6__ctorMFNcNfAyaZSQBkQBjQBh@Base 12 ++ _D3std4file8DirEntry6__initZ@Base 12 ++ _D3std4file8DirEntry6isFileMFNdNlNfZb@Base 12 ++ _D3std4file8DirEntry7statBufMFNdNlNfZS4core3sys5posixQk4stat6stat_t@Base 12 ++ _D3std4file8DirEntry9__xtoHashFNbNeKxSQBkQBjQBhZm@Base 12 ++ _D3std4file8DirEntry9isSymlinkMFNdNlNfZb@Base 12 ++ _D3std4file8copyImplFNeMAxaMQeMPxaMQeEQBk8typecons__T4FlagVAyaa18_707265736572766541747472696275746573ZQByZv@Base 12 ++ _D3std4file8deletemeFNdNfZ8fileNameAya@Base 12 ++ _D3std4file8deletemeFNdNfZAya@Base 12 ++ _D3std4file8readImplFNeMAxaMPxamZAv@Base 12 ++ _D3std4file9attrIsDirFNaNbNiNfkZb@Base 12 ++ _D3std4file9writeImplFNeMAxaMPxaMAxvbZv@Base 12 ++ _D3std4file__T13getAttributesTAxaZQuFNfQjZk@Base 12 ++ _D3std4file__T13getAttributesTAyaZQuFNfQjZk@Base 12 ++ _D3std4file__T15ensureDirExistsZQsFNfMAxaZb@Base 12 ++ _D3std4file__T17statTimeToStdTimeVai109ZQBaFNaNbNfKxS4core3sys5posixQk4stat6stat_tZSQDe8datetime7systime7SysTime@Base 12 ++ _D3std4file__T17statTimeToStdTimeVai97ZQzFNaNbNfKxS4core3sys5posixQk4stat6stat_tZSQDc8datetime7systime7SysTime@Base 12 ++ _D3std4file__T17statTimeToStdTimeVai99ZQzFNaNbNfKxS4core3sys5posixQk4stat6stat_tZSQDc8datetime7systime7SysTime@Base 12 ++ _D3std4file__T5isDirTAxaZQlFNdNfQlZb@Base 12 ++ _D3std4file__T5isDirTAyaZQlFNdNfQlZb@Base 12 ++ _D3std4file__T5rmdirTAyaZQlFNfQjZv@Base 12 ++ _D3std4file__T5rmdirTAyaZQlFQhZ12trustedRmdirFNbNiNeMPxaZb@Base 12 ++ _D3std4file__T6existsTAxaZQmFNbNiNfQnZb@Base 12 ++ _D3std4file__T6existsTAyaZQmFNbNiNfQnZb@Base 12 ++ _D3std4file__T6isFileTAyaZQmFNdNfQlZb@Base 12 ++ _D3std4file__T6removeTAyaZQmFNfQjZv@Base 12 ++ _D3std4file__T8cenforceTPS4core3sys5posix6dirent3DIRZQBnFNfQBjMLAxaAyamZQBw@Base 12 ++ _D3std4file__T8cenforceTPaZQnFNfQiMLAxaAyamZQu@Base 12 ++ _D3std4file__T8cenforceTbZQmFNebMAxaMPxaAyamZb@Base 12 ++ _D3std4file__T8cenforceTbZQmFNfbMLAxaAyamZb@Base 12 ++ _D3std4file__T8readLinkTAyaZQoFNfQjZQm@Base 12 ++ _D3std4json11__moduleRefZ@Base 12 ++ _D3std4json12__ModuleInfoZ@Base 12 ++ _D3std4json13JSONException6__ctorMFNaNbNfAyaQdmZCQBvQBuQBs@Base 12 ++ _D3std4json13JSONException6__ctorMFNaNbNfAyaiiZCQBuQBtQBr@Base 12 ++ _D3std4json13JSONException6__initZ@Base 12 ++ _D3std4json13JSONException6__vtblZ@Base 12 ++ _D3std4json13JSONException7__ClassZ@Base 12 ++ _D3std4json16JSONFloatLiteral6__initZ@Base 12 ++ _D3std4json6toJSONFNfKxSQwQu9JSONValueIbIEQBoQBn11JSONOptionsZAya@Base 12 ++ _D3std4json9JSONValue10arrayNoRefMNgFNaNdNeZNgASQBuQBtQBr@Base 12 ++ _D3std4json9JSONValue11objectNoRefMNgFNaNdNeZNgHAyaSQByQBxQBv@Base 12 ++ _D3std4json9JSONValue14toPrettyStringMxFNfIEQBqQBp11JSONOptionsZAya@Base 12 ++ _D3std4json9JSONValue3strMFNaNbNdNiNjNeNkMAyaZQe@Base 12 ++ _D3std4json9JSONValue3strMxFNaNdNjNeZAya@Base 12 ++ _D3std4json9JSONValue4typeMxFNaNbNdNiNfZEQBnQBm8JSONType@Base 12 ++ _D3std4json9JSONValue5Store6__initZ@Base 12 ++ _D3std4json9JSONValue5arrayMFNaNbNdNiNlNeNkMASQBsQBrQBpZQm@Base 12 ++ _D3std4json9JSONValue5arrayMNgFNaNcNdNjZNgASQBqQBpQBn@Base 12 ++ _D3std4json9JSONValue6__initZ@Base 12 ++ _D3std4json9JSONValue6isNullMxFNaNbNdNiNfZb@Base 12 ++ _D3std4json9JSONValue6objectMFNaNbNdNiNeNkMHAyaSQBuQBtQBrZQp@Base 12 ++ _D3std4json9JSONValue6objectMNgFNaNcNdNjZNgHAyaSQBuQBtQBr@Base 12 ++ _D3std4json9JSONValue7booleanMFNaNbNdNiNfbZb@Base 12 ++ _D3std4json9JSONValue7booleanMxFNaNdNfZb@Base 12 ++ _D3std4json9JSONValue7integerMFNaNbNdNiNflZl@Base 12 ++ _D3std4json9JSONValue7integerMxFNaNdNfZl@Base 12 ++ _D3std4json9JSONValue7opApplyMFMDFAyaKSQBlQBkQBiZiZi@Base 12 ++ _D3std4json9JSONValue7opApplyMFMDFmKSQBjQBiQBgZiZi@Base 12 ++ _D3std4json9JSONValue7opIndexMNgFNaNcNfNkMAyaZNgSQBvQBuQBs@Base 12 ++ _D3std4json9JSONValue7opIndexMNgFNaNcNfmZNgSQBqQBpQBn@Base 12 ++ _D3std4json9JSONValue8floatingMFNaNbNdNiNfdZd@Base 12 ++ _D3std4json9JSONValue8floatingMxFNaNdNfZd@Base 12 ++ _D3std4json9JSONValue8opEqualsMxFNaNbNiNeKxSQBqQBpQBnZb@Base 12 ++ _D3std4json9JSONValue8opEqualsMxFNaNbNiNfxSQBpQBoQBmZb@Base 12 ++ _D3std4json9JSONValue8toStringMxFNfIEQBjQBi11JSONOptionsZAya@Base 12 ++ _D3std4json9JSONValue8uintegerMFNaNbNdNiNfmZm@Base 12 ++ _D3std4json9JSONValue8uintegerMxFNaNdNfZm@Base 12 ++ _D3std4json9JSONValue__T6assignTASQBgQBfQBdZQuMFNaNbNiNfQyZv@Base 12 ++ _D3std4json9JSONValue__T6assignTAyaZQmMFNaNbNiNfQqZv@Base 12 ++ _D3std4json9JSONValue__T6assignTHAyaSQBjQBiQBgZQxMFNaNbNiNfQBbZv@Base 12 ++ _D3std4json9JSONValue__T6assignTbZQkMFNaNbNiNfbZv@Base 12 ++ _D3std4json9JSONValue__T6assignTdZQkMFNaNbNiNfdZv@Base 12 ++ _D3std4json9JSONValue__T6assignTlZQkMFNaNbNiNflZv@Base 12 ++ _D3std4json9JSONValue__T6assignTmZQkMFNaNbNiNfmZv@Base 12 ++ _D3std4json__T6toJSONTSQv5array__T8AppenderTAyaZQoZQBlFNfKQBkKxSQCkQCj9JSONValueIbIEQDeQDd11JSONOptionsZv@Base 12 ++ _D3std4math10operations11__moduleRefZ@Base 12 ++ _D3std4math10operations12__ModuleInfoZ@Base 12 ++ _D3std4math10operations13getNaNPayloadFNaNbNiNeeZm@Base 12 ++ _D3std4math10operations3NaNFNaNbNiNemZe@Base 12 ++ _D3std4math10operations3fmaFNaNbNiNfeeeZe@Base 12 ++ _D3std4math10operations4fdimFNaNbNiNfeeZe@Base 12 ++ _D3std4math10operations6nextUpFNaNbNiNedZd@Base 12 ++ _D3std4math10operations6nextUpFNaNbNiNeeZe@Base 12 ++ _D3std4math10operations6nextUpFNaNbNiNefZf@Base 12 ++ _D3std4math10operations8nextDownFNaNbNiNfdZd@Base 12 ++ _D3std4math10operations8nextDownFNaNbNiNfeZe@Base 12 ++ _D3std4math10operations8nextDownFNaNbNiNffZf@Base 12 ++ _D3std4math10operations__T17extractBitpatternTdZQwFNaNbNiNexdZSQCjQCiQCg__T23FloatingPointBitpatternTdZQBc@Base 12 ++ _D3std4math10operations__T17extractBitpatternTeZQwFNaNbNiNexeZSQCjQCiQCg__T23FloatingPointBitpatternTeZQBc@Base 12 ++ _D3std4math10operations__T23FloatingPointBitpatternTdZQBc6__initZ@Base 12 ++ _D3std4math10operations__T23FloatingPointBitpatternTeZQBc6__initZ@Base 12 ++ _D3std4math11__moduleRefZ@Base 12 ++ _D3std4math11exponential10logCoeffsPyG7e@Base 12 ++ _D3std4math11exponential10logCoeffsQyG7e@Base 12 ++ _D3std4math11exponential10logCoeffsRyG4e@Base 12 ++ _D3std4math11exponential10logCoeffsSyG4e@Base 12 ++ _D3std4math11exponential11__moduleRefZ@Base 12 ++ _D3std4math11exponential12__ModuleInfoZ@Base 12 ++ _D3std4math11exponential3expFNaNbNiNeeZe@Base 12 ++ _D3std4math11exponential3expFNaNbNiNfdZd@Base 12 ++ _D3std4math11exponential3expFNaNbNiNffZf@Base 12 ++ _D3std4math11exponential3logFNaNbNiNfeZe@Base 12 ++ _D3std4math11exponential4exp2FNaNbNiNeeZe@Base 12 ++ _D3std4math11exponential4exp2FNaNbNiNfdZd@Base 12 ++ _D3std4math11exponential4exp2FNaNbNiNffZf@Base 12 ++ _D3std4math11exponential4log2FNaNbNiNfeZe@Base 12 ++ _D3std4math11exponential4logbFNbNiNeeZe@Base 12 ++ _D3std4math11exponential5expm1FNaNbNiNeeZe@Base 12 ++ _D3std4math11exponential5expm1FNaNbNiNfdZd@Base 12 ++ _D3std4math11exponential5expm1FNaNbNiNffZf@Base 12 ++ _D3std4math11exponential5ldexpFNaNbNiNfdiZd@Base 12 ++ _D3std4math11exponential5ldexpFNaNbNiNfeiZe@Base 12 ++ _D3std4math11exponential5ldexpFNaNbNiNffiZf@Base 12 ++ _D3std4math11exponential5log10FNaNbNiNfeZe@Base 12 ++ _D3std4math11exponential5log1pFNaNbNiNfeZe@Base 12 ++ _D3std4math11exponential6scalbnFNaNbNiNfdiZd@Base 12 ++ _D3std4math11exponential6scalbnFNaNbNiNfeiZe@Base 12 ++ _D3std4math11exponential6scalbnFNaNbNiNffiZf@Base 12 ++ _D3std4math11exponential__T3powTdTdZQjFNaNbNiNeddZ4implFNaNbNiNfeeZe@Base 12 ++ _D3std4math11exponential__T3powTdTdZQjFNaNbNiNeddZd@Base 12 ++ _D3std4math11exponential__T3powTeTeZQjFNaNbNiNeeeZ4implFNaNbNiNfeeZe@Base 12 ++ _D3std4math11exponential__T3powTeTeZQjFNaNbNiNeeeZe@Base 12 ++ _D3std4math11exponential__T3powTeTiZQjFNaNbNiNeeiZe@Base 12 ++ _D3std4math11exponential__T3powTeTlZQjFNaNbNiNeelZe@Base 12 ++ _D3std4math11exponential__T3powTiTiZQjFNaNbNiNeiiZi@Base 12 ++ _D3std4math11exponential__T3powTmTmZQjFNaNbNiNemmZm@Base 12 ++ _D3std4math11exponential__T5frexpTeZQjFNaNbNiNexeJiZe@Base 12 ++ _D3std4math11exponential__T7expImplTdZQlFNaNbNiNfdZ1PyG3d@Base 12 ++ _D3std4math11exponential__T7expImplTdZQlFNaNbNiNfdZ1QyG4d@Base 12 ++ _D3std4math11exponential__T7expImplTdZQlFNaNbNiNfdZd@Base 12 ++ _D3std4math11exponential__T7expImplTeZQlFNaNbNiNfeZ1PyG3e@Base 12 ++ _D3std4math11exponential__T7expImplTeZQlFNaNbNiNfeZ1QyG4e@Base 12 ++ _D3std4math11exponential__T7expImplTeZQlFNaNbNiNfeZe@Base 12 ++ _D3std4math11exponential__T7expImplTfZQlFNaNbNiNffZ1PyG6f@Base 12 ++ _D3std4math11exponential__T7expImplTfZQlFNaNbNiNffZf@Base 12 ++ _D3std4math11exponential__T8exp2ImplTdZQmFNaNbNiNfdZ1PyG3d@Base 12 ++ _D3std4math11exponential__T8exp2ImplTdZQmFNaNbNiNfdZ1QyG3d@Base 12 ++ _D3std4math11exponential__T8exp2ImplTdZQmFNaNbNiNfdZd@Base 12 ++ _D3std4math11exponential__T8exp2ImplTeZQmFNaNbNiNfeZ1PyG3e@Base 12 ++ _D3std4math11exponential__T8exp2ImplTeZQmFNaNbNiNfeZ1QyG4e@Base 12 ++ _D3std4math11exponential__T8exp2ImplTeZQmFNaNbNiNfeZe@Base 12 ++ _D3std4math11exponential__T8exp2ImplTfZQmFNaNbNiNffZ1PyG6f@Base 12 ++ _D3std4math11exponential__T8exp2ImplTfZQmFNaNbNiNffZf@Base 12 ++ _D3std4math11exponential__T9expm1ImplTdZQnFNaNbNiNfdZ1PyG3d@Base 12 ++ _D3std4math11exponential__T9expm1ImplTdZQnFNaNbNiNfdZ1QyG4d@Base 12 ++ _D3std4math11exponential__T9expm1ImplTdZQnFNaNbNiNfdZd@Base 12 ++ _D3std4math11exponential__T9expm1ImplTeZQnFNaNbNiNfeZ1PyG5e@Base 12 ++ _D3std4math11exponential__T9expm1ImplTeZQnFNaNbNiNfeZ1QyG6e@Base 12 ++ _D3std4math11exponential__T9expm1ImplTeZQnFNaNbNiNfeZe@Base 12 ++ _D3std4math12__ModuleInfoZ@Base 12 ++ _D3std4math12trigonometry11__moduleRefZ@Base 12 ++ _D3std4math12trigonometry12__ModuleInfoZ@Base 12 ++ _D3std4math12trigonometry3cosFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry3cosFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry3cosFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry3sinFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry3sinFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry3sinFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry3tanFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry3tanFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry3tanFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry4acosFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry4acosFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry4acosFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry4asinFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry4asinFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry4asinFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry4atanFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry4atanFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry4atanFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry4coshFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry4coshFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry4coshFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry4sinhFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry4sinhFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry4sinhFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry4tanhFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry4tanhFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry4tanhFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry5acoshFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry5acoshFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry5acoshFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry5asinhFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry5asinhFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry5asinhFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry5atan2FNaNbNiNeeeZe@Base 12 ++ _D3std4math12trigonometry5atan2FNaNbNiNfddZd@Base 12 ++ _D3std4math12trigonometry5atan2FNaNbNiNfffZf@Base 12 ++ _D3std4math12trigonometry5atanhFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry5atanhFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry5atanhFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry__T5_sinhTdZQjFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry__T5_sinhTeZQjFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry__T5_sinhTfZQjFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry__T5_tanhTdZQjFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry__T5_tanhTeZQjFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry__T5_tanhTfZQjFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry__T6_acoshTdZQkFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry__T6_acoshTeZQkFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry__T6_acoshTfZQkFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry__T6_asinhTdZQkFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry__T6_asinhTeZQkFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry__T6_asinhTfZQkFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry__T7tanImplTdZQlFNaNbNiNfdZ1PyG3d@Base 12 ++ _D3std4math12trigonometry__T7tanImplTdZQlFNaNbNiNfdZ1QyG5d@Base 12 ++ _D3std4math12trigonometry__T7tanImplTdZQlFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry__T7tanImplTeZQlFNaNbNiNfeZ1PyG3e@Base 12 ++ _D3std4math12trigonometry__T7tanImplTeZQlFNaNbNiNfeZ1QyG5e@Base 12 ++ _D3std4math12trigonometry__T7tanImplTeZQlFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry__T7tanImplTfZQlFNaNbNiNffZ1PyG6f@Base 12 ++ _D3std4math12trigonometry__T7tanImplTfZQlFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry__T8atanImplTdZQmFNaNbNiNfdZ1PyG5d@Base 12 ++ _D3std4math12trigonometry__T8atanImplTdZQmFNaNbNiNfdZ1QyG6d@Base 12 ++ _D3std4math12trigonometry__T8atanImplTdZQmFNaNbNiNfdZd@Base 12 ++ _D3std4math12trigonometry__T8atanImplTeZQmFNaNbNiNfeZ1PyG5e@Base 12 ++ _D3std4math12trigonometry__T8atanImplTeZQmFNaNbNiNfeZ1QyG6e@Base 12 ++ _D3std4math12trigonometry__T8atanImplTeZQmFNaNbNiNfeZe@Base 12 ++ _D3std4math12trigonometry__T8atanImplTfZQmFNaNbNiNffZ1PyG4f@Base 12 ++ _D3std4math12trigonometry__T8atanImplTfZQmFNaNbNiNffZf@Base 12 ++ _D3std4math12trigonometry__T9atan2ImplTdZQnFNaNbNiNfddZd@Base 12 ++ _D3std4math12trigonometry__T9atan2ImplTeZQnFNaNbNiNfeeZe@Base 12 ++ _D3std4math12trigonometry__T9atan2ImplTfZQnFNaNbNiNfffZf@Base 12 ++ _D3std4math6traits11__moduleRefZ@Base 12 ++ _D3std4math6traits11isIdenticalFNaNbNiNeeeZb@Base 12 ++ _D3std4math6traits12__ModuleInfoZ@Base 12 ++ _D3std4math6traits__T10isInfinityTdZQpFNaNbNiNedZb@Base 12 ++ _D3std4math6traits__T10isInfinityTeZQpFNaNbNiNeeZb@Base 12 ++ _D3std4math6traits__T10isInfinityTfZQpFNaNbNiNefZb@Base 12 ++ _D3std4math6traits__T10isInfinityTxdZQqFNaNbNiNexdZb@Base 12 ++ _D3std4math6traits__T10isPowerOf2TkZQpFNaNbNiNfxkZb@Base 12 ++ _D3std4math6traits__T10isPowerOf2TmZQpFNaNbNiNfxmZb@Base 12 ++ _D3std4math6traits__T11isSubnormalTxeZQrFNaNbNiNexeZb@Base 12 ++ _D3std4math6traits__T5isNaNTdZQjFNaNbNiNedZb@Base 12 ++ _D3std4math6traits__T5isNaNTeZQjFNaNbNiNeeZb@Base 12 ++ _D3std4math6traits__T5isNaNTfZQjFNaNbNiNefZb@Base 12 ++ _D3std4math6traits__T5isNaNTxdZQkFNaNbNiNexdZb@Base 12 ++ _D3std4math6traits__T5isNaNTxeZQkFNaNbNiNexeZb@Base 12 ++ _D3std4math6traits__T7signbitTdZQlFNaNbNiNedZi@Base 12 ++ _D3std4math6traits__T7signbitTeZQlFNaNbNiNeeZi@Base 12 ++ _D3std4math6traits__T7signbitTfZQlFNaNbNiNefZi@Base 12 ++ _D3std4math6traits__T7signbitTxeZQmFNaNbNiNexeZi@Base 12 ++ _D3std4math6traits__T7signbitTyeZQmFNaNbNiNeyeZi@Base 12 ++ _D3std4math6traits__T8copysignTdTdZQoFNaNbNiNeddZd@Base 12 ++ _D3std4math6traits__T8copysignTdTiZQoFNaNbNiNeidZd@Base 12 ++ _D3std4math6traits__T8copysignTeTdZQoFNaNbNiNeedZe@Base 12 ++ _D3std4math6traits__T8copysignTeTeZQoFNaNbNiNeeeZe@Base 12 ++ _D3std4math6traits__T8copysignTeTfZQoFNaNbNiNeefZe@Base 12 ++ _D3std4math6traits__T8copysignTeTiZQoFNaNbNiNeieZe@Base 12 ++ _D3std4math6traits__T8copysignTfTfZQoFNaNbNiNeffZf@Base 12 ++ _D3std4math6traits__T8copysignTfTiZQoFNaNbNiNeifZf@Base 12 ++ _D3std4math8hardware11__moduleRefZ@Base 12 ++ _D3std4math8hardware12__ModuleInfoZ@Base 12 ++ _D3std4math8hardware14resetIeeeFlagsFNbNiNeZv@Base 12 ++ _D3std4math8hardware20FloatingPointControl10initializeMFNbNiNfZv@Base 12 ++ _D3std4math8hardware20FloatingPointControl15clearExceptionsFNbNiNfZv@Base 12 ++ _D3std4math8hardware20FloatingPointControl15getControlStateFNaNbNiNeZt@Base 12 ++ _D3std4math8hardware20FloatingPointControl15setControlStateFNbNiNetZv@Base 12 ++ _D3std4math8hardware20FloatingPointControl16enableExceptionsMFNbNiNekZv@Base 12 ++ _D3std4math8hardware20FloatingPointControl17disableExceptionsMFNbNiNekZv@Base 12 ++ _D3std4math8hardware20FloatingPointControl17enabledExceptionsFNaNbNdNiNeZk@Base 12 ++ _D3std4math8hardware20FloatingPointControl17hasExceptionTrapsFNaNbNdNiNfZb@Base 12 ++ _D3std4math8hardware20FloatingPointControl6__dtorMFNbNiNeZv@Base 12 ++ _D3std4math8hardware20FloatingPointControl6__initZ@Base 12 ++ _D3std4math8hardware20FloatingPointControl8opAssignMFNbNcNiNjNeSQCkQCjQChQCbZQo@Base 12 ++ _D3std4math8hardware20FloatingPointControl8roundingFNaNbNdNiNeZk@Base 12 ++ _D3std4math8hardware20FloatingPointControl8roundingMFNbNdNiNekZv@Base 12 ++ _D3std4math8hardware9IeeeFlags12getIeeeFlagsFNaNbNiNeZk@Base 12 ++ _D3std4math8hardware9IeeeFlags14resetIeeeFlagsFNbNiNeZv@Base 12 ++ _D3std4math8hardware9IeeeFlags6__initZ@Base 12 ++ _D3std4math8hardware9IeeeFlags7inexactMxFNbNdNiNfZb@Base 12 ++ _D3std4math8hardware9IeeeFlags7invalidMxFNbNdNiNfZb@Base 12 ++ _D3std4math8hardware9IeeeFlags8overflowMxFNbNdNiNfZb@Base 12 ++ _D3std4math8hardware9IeeeFlags9divByZeroMxFNbNdNiNfZb@Base 12 ++ _D3std4math8hardware9IeeeFlags9underflowMxFNbNdNiNfZb@Base 12 ++ _D3std4math8hardware9ieeeFlagsFNaNbNdNiNeZSQBpQBoQBm9IeeeFlags@Base 12 ++ _D3std4math8rounding11__moduleRefZ@Base 12 ++ _D3std4math8rounding12__ModuleInfoZ@Base 12 ++ _D3std4math8rounding4ceilFNaNbNiNedZd@Base 12 ++ _D3std4math8rounding4ceilFNaNbNiNeeZe@Base 12 ++ _D3std4math8rounding4ceilFNaNbNiNefZf@Base 12 ++ _D3std4math8rounding4rintFNaNbNiNfdZd@Base 12 ++ _D3std4math8rounding4rintFNaNbNiNfeZe@Base 12 ++ _D3std4math8rounding4rintFNaNbNiNffZf@Base 12 ++ _D3std4math8rounding5floorFNaNbNiNedZd@Base 12 ++ _D3std4math8rounding5floorFNaNbNiNeeZe@Base 12 ++ _D3std4math8rounding5floorFNaNbNiNefZf@Base 12 ++ _D3std4math8rounding5lrintFNaNbNiNeeZl@Base 12 ++ _D3std4math8rounding5roundFNaNbNiNeeZe@Base 12 ++ _D3std4math8rounding5truncFNaNbNiNeeZe@Base 12 ++ _D3std4math8rounding6lroundFNbNiNeeZl@Base 12 ++ _D3std4math8rounding6rndtolFNaNbNiNfdZl@Base 12 ++ _D3std4math8rounding6rndtolFNaNbNiNfeZl@Base 12 ++ _D3std4math8rounding6rndtolFNaNbNiNffZl@Base 12 ++ _D3std4math8rounding9nearbyintFNaNbNiNfeZe@Base 12 ++ _D3std4math8rounding__T9floorImplTdZQnFNaNbNiNexdZ9floatBits6__initZ@Base 12 ++ _D3std4math8rounding__T9floorImplTdZQnFNaNbNiNexdZd@Base 12 ++ _D3std4math8rounding__T9floorImplTeZQnFNaNbNiNexeZ9floatBits6__initZ@Base 12 ++ _D3std4math8rounding__T9floorImplTeZQnFNaNbNiNexeZe@Base 12 ++ _D3std4math8rounding__T9floorImplTfZQnFNaNbNiNexfZ9floatBits6__initZ@Base 12 ++ _D3std4math8rounding__T9floorImplTfZQnFNaNbNiNexfZf@Base 12 ++ _D3std4math9algebraic11__moduleRefZ@Base 12 ++ _D3std4math9algebraic12__ModuleInfoZ@Base 12 ++ _D3std4math9algebraic4cbrtFNbNiNeeZe@Base 12 ++ _D3std4math9algebraic4fabsFNaNbNiNfdZd@Base 12 ++ _D3std4math9algebraic4fabsFNaNbNiNfeZe@Base 12 ++ _D3std4math9algebraic4fabsFNaNbNiNffZf@Base 12 ++ _D3std4math9algebraic4sqrtFNaNbNiNfdZd@Base 12 ++ _D3std4math9algebraic4sqrtFNaNbNiNfeZe@Base 12 ++ _D3std4math9algebraic4sqrtFNaNbNiNffZf@Base 12 ++ _D3std4math9algebraic8polyImplFNaNbNiNeeIAeZe@Base 12 ++ _D3std4math9algebraic__T12polyImplBaseTeTeZQtFNaNbNiNeeIAeZe@Base 12 ++ _D3std4math9algebraic__T4polyTdTdVii3ZQoFNaNbNiNfdKxG3dZd@Base 12 ++ _D3std4math9algebraic__T4polyTdTdVii4ZQoFNaNbNiNfdKxG4dZd@Base 12 ++ _D3std4math9algebraic__T4polyTdTdVii5ZQoFNaNbNiNfdKxG5dZd@Base 12 ++ _D3std4math9algebraic__T4polyTdTdVii6ZQoFNaNbNiNfdKxG6dZd@Base 12 ++ _D3std4math9algebraic__T4polyTeTeVii3ZQoFNaNbNiNfeKxG3eZe@Base 12 ++ _D3std4math9algebraic__T4polyTeTeVii4ZQoFNaNbNiNfeKxG4eZe@Base 12 ++ _D3std4math9algebraic__T4polyTeTeVii5ZQoFNaNbNiNfeKxG5eZe@Base 12 ++ _D3std4math9algebraic__T4polyTeTeVii6ZQoFNaNbNiNfeKxG6eZe@Base 12 ++ _D3std4math9algebraic__T4polyTeTeVii7ZQoFNaNbNiNfeKxG7eZe@Base 12 ++ _D3std4math9algebraic__T4polyTeTeVii8ZQoFNaNbNiNfeKxG8eZe@Base 12 ++ _D3std4math9algebraic__T4polyTeTeVii9ZQoFNaNbNiNfeKxG9eZe@Base 12 ++ _D3std4math9algebraic__T4polyTeTeZQkFNaNbNiNeeIAeZe@Base 12 ++ _D3std4math9algebraic__T4polyTfTfVii6ZQoFNaNbNiNffKxG6fZf@Base 12 ++ _D3std4math9algebraic__T4polyTxdTdVii3ZQpFNaNbNiNfxdKxG3dZd@Base 12 ++ _D3std4math9algebraic__T4polyTxdTdVii4ZQpFNaNbNiNfxdKxG4dZd@Base 12 ++ _D3std4math9algebraic__T4polyTxdTdVii5ZQpFNaNbNiNfxdKxG5dZd@Base 12 ++ _D3std4math9algebraic__T4polyTxeTeVii3ZQpFNaNbNiNfxeKxG3eZe@Base 12 ++ _D3std4math9algebraic__T4polyTxeTeVii4ZQpFNaNbNiNfxeKxG4eZe@Base 12 ++ _D3std4math9algebraic__T4polyTxeTeVii5ZQpFNaNbNiNfxeKxG5eZe@Base 12 ++ _D3std4math9algebraic__T4polyTxeTeVii6ZQpFNaNbNiNfxeKxG6eZe@Base 12 ++ _D3std4math9algebraic__T4polyTxfTfVii4ZQpFNaNbNiNfxfKxG4fZf@Base 12 ++ _D3std4math9algebraic__T4polyTxfTfVii6ZQpFNaNbNiNfxfKxG6fZf@Base 12 ++ _D3std4math9algebraic__T4polyTyeTeVii7ZQpFNaNbNiNfyeKxG7eZe@Base 12 ++ _D3std4math9algebraic__T8nextPow2TmZQmFNaNbNiNfxmZm@Base 12 ++ _D3std4math9algebraic__T9truncPow2TmZQnFNaNbNiNfxmZm@Base 12 ++ _D3std4math9constants11__moduleRefZ@Base 12 ++ _D3std4math9constants12__ModuleInfoZ@Base 12 ++ _D3std4math9remainder11__moduleRefZ@Base 12 ++ _D3std4math9remainder12__ModuleInfoZ@Base 12 ++ _D3std4math9remainder4fmodFNbNiNeeeZe@Base 12 ++ _D3std4math9remainder4modfFNbNiNeeKeZe@Base 12 ++ _D3std4math9remainder6remquoFNbNiNeeeJiZe@Base 12 ++ _D3std4math9remainderQkFNbNiNeeeZe@Base 12 ++ _D3std4math__T8ieeeMeanTeZQmFNaNbNiNexexeZe@Base 12 ++ _D3std4meta11__moduleRefZ@Base 12 ++ _D3std4meta12__ModuleInfoZ@Base 12 ++ _D3std4path11__moduleRefZ@Base 12 ++ _D3std4path11expandTildeFNbNfAyaZ18expandFromDatabaseFNbNfQBdZQBh@Base 12 ++ _D3std4path11expandTildeFNbNfAyaZ21combineCPathWithDPathFNaNbNePaQBkmZQBp@Base 12 ++ _D3std4path11expandTildeFNbNfAyaZ21expandFromEnvironmentFNbNfQBgZ9__lambda2FNbNiNeZPa@Base 12 ++ _D3std4path11expandTildeFNbNfAyaZ21expandFromEnvironmentFNbNfQBgZQBk@Base 12 ++ _D3std4path11expandTildeFNbNfAyaZQe@Base 12 ++ _D3std4path12__ModuleInfoZ@Base 12 ++ _D3std4path12absolutePathFNaNfAyaLQeZQh@Base 12 ++ _D3std4path14isDirSeparatorFNaNbNiNfwZb@Base 12 ++ _D3std4path16isDriveSeparatorFNaNbNiNfwZb@Base 12 ++ _D3std4path__T10stripDriveTxaZQqFNaNbNiNfAxaZQe@Base 12 ++ _D3std4path__T10stripDriveTyaZQqFNaNbNiNfAyaZQe@Base 12 ++ _D3std4path__T11_stripDriveTAxaZQsFNaNbNiNfQpZQs@Base 12 ++ _D3std4path__T11_stripDriveTAyaZQsFNaNbNiNfQpZQs@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFNaNbNiNfQFhZSQGnQGm__TQGkTQFzZQGsFQGhZ12PathSplitter@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter11__xopEqualsMxFKxSQHlQHk__TQHiTQGxZQHqFQHfZQCgZb@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter4backMFNaNbNdNiNfZQGj@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter4saveMFNaNbNdNiNfZSQHlQHk__TQHiTQGxZQHqFQHfZQCg@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter5frontMFNaNbNdNiNfZQGk@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter5ltrimMFNaNbNiNfmmZm@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter5rtrimMFNaNbNiNfmmZm@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter6__ctorMFNaNbNcNiNfQGkZSQHqQHp__TQHnTQHcZQHvFQHkZQCl@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter6__initZ@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter7popBackMFNaNbNiNfZv@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4path__T12pathSplitterTSQBc5range__T5chainTSQBw3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDvQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFQEzZ12PathSplitter9__xtoHashFNbNeKxSQHkQHj__TQHhTQGwZQHpFQHeZQCfZm@Base 12 ++ _D3std4path__T13lastSeparatorTAxaZQuFNaNbNiNfQpZl@Base 12 ++ _D3std4path__T13lastSeparatorTAyaZQuFNaNbNiNfQpZl@Base 12 ++ _D3std4path__T15extSeparatorPosTAyaZQwFNaNbNiNfxAyaZl@Base 12 ++ _D3std4path__T15filenameCharCmpVEQBfQBe13CaseSensitivei1ZQBrFNaNbNiNfwwZi@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNaNbNiNfNkMQFkZSQGuQGt__TQGrTQGcZQGzFNkMQGnZQCe@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt11__xopEqualsMxFKxSQHgQHf__TQHdTQGoZQHlFNkMQGzZQCqZb@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt11getElement0MFNaNbNiNfZa@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt4saveMFNaNbNdNiNfZSQHgQHf__TQHdTQGoZQHlFNkMQGzZQCq@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt5isDotFNaNbNiNfQFxZb@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt6__ctorMFNaNbNcNiNfQGbZSQHlQHk__TQHiTQGtZQHqFNkMQHeZQCv@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt6__initZ@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt8isDotDotFNaNbNiNfQGaZb@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std4path__T16asNormalizedPathTSQBg5range__T5chainTSQCa3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDzQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQt9__xtoHashFNbNeKxSQHfQHe__TQHcTQGnZQHkFNkMQGyZQCpZm@Base 12 ++ _D3std4path__T18rtrimDirSeparatorsTAxaZQzFNaNbNiNfQpZQs@Base 12 ++ _D3std4path__T18rtrimDirSeparatorsTAyaZQzFNaNbNiNfQpZQs@Base 12 ++ _D3std4path__T7dirNameTxaZQmFNaNbNiNfNkMAxaZQe@Base 12 ++ _D3std4path__T7dirNameTyaZQmFNaNbNiNfNkMAyaZQe@Base 12 ++ _D3std4path__T8_dirNameTAxaZQoFNaNbNiNfNkMQsZQv@Base 12 ++ _D3std4path__T8_dirNameTAxaZQoFNkMQkZ6resultFNaNbNiNfbQBeZQBi@Base 12 ++ _D3std4path__T8_dirNameTAyaZQoFNaNbNiNfNkMQsZQv@Base 12 ++ _D3std4path__T8_dirNameTAyaZQoFNkMQkZ6resultFNaNbNiNfbQBeZQBi@Base 12 ++ _D3std4path__T8baseNameTxaZQnFNaNbNiNfNkMAxaZQe@Base 12 ++ _D3std4path__T8baseNameTyaZQnFNaNbNiNfNkMAyaZQe@Base 12 ++ _D3std4path__T8isRootedTAxaZQoFNaNbNiNfQpZb@Base 12 ++ _D3std4path__T8isRootedTAyaZQoFNaNbNiNfQpZb@Base 12 ++ _D3std4path__T8isRootedTSQx5range__T5chainTSQBq3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDpQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFeFNaNbNiNfQFgZb@Base 12 ++ _D3std4path__T8rootNameTSQx5range__T5chainTSQBq3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDpQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFeFNaNbNiNfQFgZQFk@Base 12 ++ _D3std4path__T9_baseNameTAxaZQpFNaNbNiNfNkMQsZQv@Base 12 ++ _D3std4path__T9_baseNameTAyaZQpFNaNbNiNfNkMQsZQv@Base 12 ++ _D3std4path__T9_rootNameTSQy5range__T5chainTSQBr3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDqQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFfFNaNbNiNfQFgZQFk@Base 12 ++ _D3std4path__T9buildPathTAAxaZQqFMQjZ__T11trustedCastTAyaTAaZQvFNaNbNiNeQoZQv@Base 12 ++ _D3std4path__T9buildPathTAAxaZQqFNaNbNfMQpZAya@Base 12 ++ _D3std4path__T9buildPathTaZQnFNaNbNfAAxaXAya@Base 12 ++ _D3std4path__T9chainPathTAaTAxaZQsFNaNbNiNfQsQrZSQBv5range__T5chainTSQCp3utf__T10byCodeUnitTQCpZQrFQCwZ14ByCodeUnitImplTSQEpQCu__T10OnlyResultTaZQpTSQFrQDc__TQDbTQFeZQDjFQFmZQCtZQEnFQEkQCnQBoZ6Result@Base 12 ++ _D3std4path__T9chainPathTAxaTQeZQsFNaNbNiNfQsQuZSQBv5range__T5chainTSQCp3utf__T10byCodeUnitTQCpZQrFQCwZ14ByCodeUnitImplTSQEpQCu__T10OnlyResultTaZQpTQDcZQDnFQDkQBnQDqZ6Result@Base 12 ++ _D3std4path__T9chainPathTAyaTQeZQsFNaNbNiNfQsQuZSQBv5range__T5chainTSQCp3utf__T10byCodeUnitTQCpZQrFQCwZ14ByCodeUnitImplTSQEpQCu__T10OnlyResultTaZQpTQDcZQDnFQDkQBnQDqZ6Result@Base 12 ++ _D3std4path__T9extensionTAyaZQpFNaNbNiNfQpZQs@Base 12 ++ _D3std4path__T9globMatchVEQyQw13CaseSensitivei1TaTAyaZQBoFNaNbNfQoAxaZb@Base 12 ++ _D3std4path__T9globMatchVEQyQw13CaseSensitivei1TaTSQBx3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDjFNaNbNfQCjAxaZb@Base 12 ++ _D3std4uuid10randomUUIDFNfZSQBaQz4UUID@Base 12 ++ _D3std4uuid11__moduleRefZ@Base 12 ++ _D3std4uuid12__ModuleInfoZ@Base 12 ++ _D3std4uuid20UUIDParsingException6__ctorMFNaNeAyamEQBxQBwQBu6ReasonQvC6object9ThrowableQBpmZCQDnQDmQDk@Base 12 ++ _D3std4uuid20UUIDParsingException6__initZ@Base 12 ++ _D3std4uuid20UUIDParsingException6__vtblZ@Base 12 ++ _D3std4uuid20UUIDParsingException7__ClassZ@Base 12 ++ _D3std4uuid4UUID11uuidVersionMxFNaNbNdNiNfZEQBqQBpQBn7Version@Base 12 ++ _D3std4uuid4UUID4swapMFNaNbNiNfKSQBfQBeQBcZv@Base 12 ++ _D3std4uuid4UUID5emptyMxFNaNbNdNiNeZb@Base 12 ++ _D3std4uuid4UUID5opCmpMxFNaNbNiNfKxSQBiQBhQBfZi@Base 12 ++ _D3std4uuid4UUID5opCmpMxFNaNbNiNfxSQBhQBgQBeZi@Base 12 ++ _D3std4uuid4UUID6__ctorMFNaNbNcNiNfKxG16hZSQBpQBoQBm@Base 12 ++ _D3std4uuid4UUID6__ctorMFNaNbNcNiNfxG16hZSQBoQBnQBl@Base 12 ++ _D3std4uuid4UUID6__initZ@Base 12 ++ _D3std4uuid4UUID6toHashMxFNaNbNiNfZm@Base 12 ++ _D3std4uuid4UUID7Version6__initZ@Base 12 ++ _D3std4uuid4UUID7variantMxFNaNbNdNiNfZEQBlQBkQBi7Variant@Base 12 ++ _D3std4uuid4UUID8opAssignMFNaNbNiNfKxSQBkQBjQBhZSQBvQBuQBs@Base 12 ++ _D3std4uuid4UUID8opAssignMFNaNbNiNfxSQBjQBiQBgZSQBuQBtQBr@Base 12 ++ _D3std4uuid4UUID8opEqualsMxFNaNbNiNfKxSQBlQBkQBiZb@Base 12 ++ _D3std4uuid4UUID8opEqualsMxFNaNbNiNfxSQBkQBjQBhZb@Base 12 ++ _D3std4uuid4UUID8toStringMxFNaNbNeZAya@Base 12 ++ _D3std4uuid4UUID__T6__ctorTaZQkMFNaNcNfIAaZSQBqQBpQBn@Base 12 ++ _D3std4uuid4UUID__T6__ctorTaZQkMFNcIAaZ7skipIndyAi@Base 12 ++ _D3std4uuid4UUID__T6toCharTaZQkMxFNaNbNiNfmZa@Base 12 ++ _D3std4uuid4UUID__T8toStringTAaZQnMxFNaNbNiNfMQrZv@Base 12 ++ _D3std4uuid4UUID__T9asArrayOfTkZQnMFNaNbNcNiNjNeZG4k@Base 12 ++ _D3std4uuid7md5UUIDFNaNbNiNfxAaxSQBfQBe4UUIDZSQBsQBrQn@Base 12 ++ _D3std4uuid7md5UUIDFNaNbNiNfxAhxSQBfQBe4UUIDZSQBsQBrQn@Base 12 ++ _D3std4uuid8sha1UUIDFNaNbNiNfMAxaxSQBhQBg4UUIDZSQBuQBtQn@Base 12 ++ _D3std4uuid8sha1UUIDFNaNbNiNfMAxhxSQBhQBg4UUIDZSQBuQBtQn@Base 12 ++ _D3std4uuid__T10randomUUIDTSQBa6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFcZQGhFNaNbNiNfKQGhZSQHlQHk4UUID@Base 12 ++ _D3std4zlib10UnCompress10uncompressMFAxvZQe@Base 12 ++ _D3std4zlib10UnCompress5emptyMxFNdZb@Base 12 ++ _D3std4zlib10UnCompress5errorMFiZv@Base 12 ++ _D3std4zlib10UnCompress5flushMFZAv@Base 12 ++ _D3std4zlib10UnCompress6__ctorMFEQBfQBe12HeaderFormatZCQCbQCaQBy@Base 12 ++ _D3std4zlib10UnCompress6__ctorMFkZCQBhQBgQBe@Base 12 ++ _D3std4zlib10UnCompress6__dtorMFZv@Base 12 ++ _D3std4zlib10UnCompress6__initZ@Base 12 ++ _D3std4zlib10UnCompress6__vtblZ@Base 12 ++ _D3std4zlib10UnCompress7__ClassZ@Base 12 ++ _D3std4zlib10uncompressFAxvmiZAv@Base 12 ++ _D3std4zlib11__moduleRefZ@Base 12 ++ _D3std4zlib12__ModuleInfoZ@Base 12 ++ _D3std4zlib13ZlibException6__ctorMFiZCQBkQBjQBh@Base 12 ++ _D3std4zlib13ZlibException6__initZ@Base 12 ++ _D3std4zlib13ZlibException6__vtblZ@Base 12 ++ _D3std4zlib13ZlibException6getmsgFNaNbNiNfiZAya@Base 12 ++ _D3std4zlib13ZlibException7__ClassZ@Base 12 ++ _D3std4zlib5crc32FkAxvZk@Base 12 ++ _D3std4zlib7adler32FkAxvZk@Base 12 ++ _D3std4zlib8Compress5errorMFiZv@Base 12 ++ _D3std4zlib8Compress5flushMFiZAv@Base 12 ++ _D3std4zlib8Compress6__ctorMFEQBcQBb12HeaderFormatZCQByQBxQBv@Base 12 ++ _D3std4zlib8Compress6__ctorMFiEQBdQBc12HeaderFormatZCQBzQByQBw@Base 12 ++ _D3std4zlib8Compress6__dtorMFZv@Base 12 ++ _D3std4zlib8Compress6__initZ@Base 12 ++ _D3std4zlib8Compress6__vtblZ@Base 12 ++ _D3std4zlib8Compress7__ClassZ@Base 12 ++ _D3std4zlib8Compress8compressMFAxvZQe@Base 12 ++ _D3std4zlib8compressFAxvZAh@Base 12 ++ _D3std4zlib8compressFAxviZAh@Base 12 ++ _D3std5array11__moduleRefZ@Base 12 ++ _D3std5array12__ModuleInfoZ@Base 12 ++ _D3std5array__T11replaceIntoTxaTSQBfQBe__T8AppenderTAxaZQoTAyaTQeZQBzFNaNbNfQBsQBbQxQzZv@Base 12 ++ _D3std5array__T11replaceIntoTyaTSQBfQBe__T8AppenderTAyaZQoTQhTQkZQByFNaNbNfQBrQBaQBdQBgZv@Base 12 ++ _D3std5array__T13copyBackwardsTSQBe5regex8internal2ir10NamedGroupZQBzFNaAQBqQeZv@Base 12 ++ _D3std5array__T13copyBackwardsTSQBe5regex8internal2ir8BytecodeZQBwFNaAQBnQeZv@Base 12 ++ _D3std5array__T13insertInPlaceTSQBe5regex8internal2ir10NamedGroupTQBjZQCdFNaNfKAQBxmQCbZv@Base 12 ++ _D3std5array__T13insertInPlaceTSQBe5regex8internal2ir8BytecodeTQBgTQBkZQCeFNaNfKAQBymQCcQCfZv@Base 12 ++ _D3std5array__T13insertInPlaceTSQBe5regex8internal2ir8BytecodeTQBgZQCaFNaNfKAQBumQByZv@Base 12 ++ _D3std5array__T14arrayAllocImplVbi0TASQBk3uni17CodepointIntervalTmZQCaFNaNbmZQBp@Base 12 ++ _D3std5array__T14arrayAllocImplVbi0TAaTmZQBaFNaNbmZQp@Base 12 ++ _D3std5array__T14arrayAllocImplVbi0TAfTmZQBaFNaNbmZQp@Base 12 ++ _D3std5array__T14arrayAllocImplVbi0TAhTmZQBaFNaNbmZQp@Base 12 ++ _D3std5array__T14arrayAllocImplVbi0TAkTmZQBaFNaNbmZQp@Base 12 ++ _D3std5array__T18uninitializedArrayTASQBk3uni17CodepointIntervalTmZQCaFNaNbNemZQBr@Base 12 ++ _D3std5array__T18uninitializedArrayTASQBk3uni17CodepointIntervalTxmZQCbFNaNbNexmZQBt@Base 12 ++ _D3std5array__T18uninitializedArrayTASQBk3uni17CodepointIntervalTyiZQCbFNaNbNeyiZQBt@Base 12 ++ _D3std5array__T18uninitializedArrayTAaTmZQBaFNaNbNemZQr@Base 12 ++ _D3std5array__T18uninitializedArrayTAaTxmZQBbFNaNbNexmZQt@Base 12 ++ _D3std5array__T18uninitializedArrayTAfTmZQBaFNaNbNemZQr@Base 12 ++ _D3std5array__T18uninitializedArrayTAhTkZQBaFNaNbNekZQr@Base 12 ++ _D3std5array__T18uninitializedArrayTAhTmZQBaFNaNbNemZQr@Base 12 ++ _D3std5array__T18uninitializedArrayTAkTxmZQBbFNaNbNexmZQt@Base 12 ++ _D3std5array__T19appenderNewCapacityVmi16ZQBbFNaNbNiNfmmZm@Base 12 ++ _D3std5array__T19appenderNewCapacityVmi1ZQBaFNaNbNiNfmmZm@Base 12 ++ _D3std5array__T19appenderNewCapacityVmi2ZQBaFNaNbNiNfmmZm@Base 12 ++ _D3std5array__T19appenderNewCapacityVmi40ZQBbFNaNbNiNfmmZm@Base 12 ++ _D3std5array__T19appenderNewCapacityVmi4ZQBaFNaNbNiNfmmZm@Base 12 ++ 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_D3std5array__TQjTS6object__T7byValueHTHAyaCQBq3zip13ArchiveMemberTQBbTQBcZQBuFNaNbNiNfQBwZ6ResultZQDpFNaNbNfQDnZAQCt@Base 12 ++ _D3std5array__TQjTSQr3uni__T13InversionListTSQBrQBb8GcPolicyZQBh__T9IntervalsTAkZQoZQDaFNaNbNfQCyZASQDuQDe17CodepointInterval@Base 12 ++ _D3std5array__TQjTSQr3uni__T13InversionListTSQBrQBb8GcPolicyZQBh__T9IntervalsTAxkZQpZQDbFNaNbNfQCzZASQDvQDf17CodepointInterval@Base 12 ++ _D3std5array__TQjTSQr3uni__T8CowArrayTSQBlQv8GcPolicyZQBaZQCaFNaNbNfQByZAk@Base 12 ++ _D3std5array__TQjTSQr3utf__T5byUTFTaVEQBk8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQEn6string__T14rightJustifierTSQFsQFc__TQFbTwVQEyi1Z__TQFqTSQGvQGf__T10byCodeUnitTQFmZQrFQFtZ14ByCodeUnitImplZQHtFNcQCfZ6ResultZQElFQDymwZQsZQIyFNcQFsZQBfZQKiFNaNbNfQKgZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii10TaVEQBs5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6ResultZQDkFNaNbNfQDiZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii10TaVEQBs5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6ResultZQDkFNaNbNfQDiZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii10TaVEQBs5ascii10LetterCasei1TlZQBrFNaNbNiNflZ6ResultZQDkFNaNbNfQDiZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii10TaVEQBs5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6ResultZQDkFNaNbNfQDiZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii16TaVEQBs5ascii10LetterCasei0TkZQBrFNaNbNiNfkZ6ResultZQDkFNaNbNfQDiZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii16TaVEQBs5ascii10LetterCasei0TmZQBrFNaNbNiNfmZ6ResultZQDkFNaNbNfQDiZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii16TaVEQBs5ascii10LetterCasei1TkZQBrFNaNbNiNfkZ6ResultZQDkFNaNbNfQDiZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii16TaVEQBs5ascii10LetterCasei1TmZQBrFNaNbNiNfmZ6ResultZQDkFNaNbNfQDiZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii2TaVEQBr5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6ResultZQDjFNaNbNfQDhZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii2TaVEQBr5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6ResultZQDjFNaNbNfQDhZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii8TaVEQBr5ascii10LetterCasei1TkZQBqFNaNbNiNfkZ6ResultZQDjFNaNbNfQDhZAa@Base 12 ++ _D3std5array__TQjTSQr4conv__T7toCharsVii8TaVEQBr5ascii10LetterCasei1TmZQBqFNaNbNiNfmZ6ResultZQDjFNaNbNfQDhZAa@Base 12 ++ _D3std5array__TQjTSQr5range__T5chainTSQBk3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQDjQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFgFNaNbNfQFeZAxa@Base 12 ++ _D3std5array__TQjTSQr9algorithm9iteration__T10UniqResultSQCd10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62ZQBvTSQEv5range__T11SortedRangeTAQCqVQCua5_61203c2062VEQGsQBx18SortedRangeOptionsi0ZQCoZQGjZQHzFNaNbNfQHxZQCw@Base 12 ++ _D3std5array__TQjTSQr9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCu8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6ResultZQGcFNaNbNfQGaZAQEv@Base 12 ++ _D3std5ascii10isAlphaNumFNaNbNiNfwZb@Base 12 ++ _D3std5ascii10isHexDigitFNaNbNiNfwZb@Base 12 ++ _D3std5ascii10whitespaceyAa@Base 12 ++ _D3std5ascii11__moduleRefZ@Base 12 ++ _D3std5ascii11isGraphicalFNaNbNiNfwZb@Base 12 ++ _D3std5ascii11isPrintableFNaNbNiNfwZb@Base 12 ++ _D3std5ascii11octalDigitsyAa@Base 12 ++ _D3std5ascii12__ModuleInfoZ@Base 12 ++ _D3std5ascii12isOctalDigitFNaNbNiNfwZb@Base 12 ++ _D3std5ascii13fullHexDigitsyAa@Base 12 ++ _D3std5ascii13isPunctuationFNaNbNiNfwZb@Base 12 ++ _D3std5ascii14lowerHexDigitsyAa@Base 12 ++ _D3std5ascii6digitsyAa@Base 12 ++ _D3std5ascii7isASCIIFNaNbNiNfwZb@Base 12 ++ _D3std5ascii7isAlphaFNaNbNiNfwZb@Base 12 ++ _D3std5ascii7isDigitFNaNbNiNfwZb@Base 12 ++ _D3std5ascii7isLowerFNaNbNiNfwZb@Base 12 ++ _D3std5ascii7isUpperFNaNbNiNfwZb@Base 12 ++ _D3std5ascii7isWhiteFNaNbNiNfwZb@Base 12 ++ _D3std5ascii7lettersyAa@Base 12 ++ _D3std5ascii7newlineyAa@Base 12 ++ _D3std5ascii9hexDigitsyAa@Base 12 ++ _D3std5ascii9isControlFNaNbNiNfwZb@Base 12 ++ _D3std5ascii9lowercaseyAa@Base 12 ++ _D3std5ascii9uppercaseyAa@Base 12 ++ _D3std5ascii__T7toLowerTwZQlFNaNbNiNfwZw@Base 12 ++ _D3std5ascii__T7toLowerTxaZQmFNaNbNiNfxaZa@Base 12 ++ _D3std5ascii__T7toLowerTxuZQmFNaNbNiNfxuZu@Base 12 ++ _D3std5ascii__T7toLowerTxwZQmFNaNbNiNfxwZw@Base 12 ++ _D3std5ascii__T7toLowerTyaZQmFNaNbNiNfyaZa@Base 12 ++ _D3std5ascii__T7toLowerTywZQmFNaNbNiNfywZw@Base 12 ++ _D3std5ascii__T7toUpperTwZQlFNaNbNiNfwZw@Base 12 ++ _D3std5range10interfaces11__moduleRefZ@Base 12 ++ _D3std5range10interfaces12__ModuleInfoZ@Base 12 ++ _D3std5range10interfaces22UnsupportedRangeMethod6__initZ@Base 12 ++ _D3std5range10interfaces22UnsupportedRangeMethod6__vtblZ@Base 12 ++ _D3std5range10interfaces22UnsupportedRangeMethod7__ClassZ@Base 12 ++ _D3std5range10interfaces22UnsupportedRangeMethod8__mixin26__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDuQDtQDqQDh@Base 12 ++ _D3std5range10interfaces22UnsupportedRangeMethod8__mixin26__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDuQDtQDqQDh@Base 12 ++ _D3std5range10primitives11__moduleRefZ@Base 12 ++ _D3std5range10primitives12__ModuleInfoZ@Base 12 ++ _D3std5range10primitives__T10walkLengthTAyaZQrFNaNbNiNfQpZm@Base 12 ++ _D3std5range10primitives__T10walkLengthTSQBn4path__T16asNormalizedPathTSQCsQCr__T5chainTSQDj3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQFiQFh__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFlFNkMQEzZQtZQGyFNaNbNiNfQGxZm@Base 12 ++ _D3std5range10primitives__T10walkLengthTSQBnQBm__T10roundRobinTSQCk9algorithm9iteration__T9MapResultSQDv10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQFz3uni21DecompressedIntervalsZQDuTSQHjQEzQEs__TQElSQHzQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQIaFQHrQCvZ6ResultZQJqFNaNfQJlZm@Base 12 ++ _D3std5range10primitives__T10walkLengthTSQBnQBm__T4TakeTSQCd3utf__T5byUTFTwVEQCx8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQGaQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQGuZQHvFNaNbNiNfQHuxmZm@Base 12 ++ _D3std5range10primitives__T14popBackExactlyTAAyaZQwFNaNbNiNfKQrmZv@Base 12 ++ _D3std5range10primitives__T14popBackExactlyTAC4core6thread5fiber5FiberZQBsFNaNbNiNfKQBomZv@Base 12 ++ _D3std5range10primitives__T14popBackExactlyTSQBr3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQCpFNaNbNiNfKQClmZv@Base 12 ++ _D3std5range10primitives__T14popBackExactlyTSQBr3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQCqFNaNbNiNfKQCmmZv@Base 12 ++ _D3std5range10primitives__T14popBackExactlyTSQBr3utf__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImplZQCqFNaNbNiNfKQCmmZv@Base 12 ++ _D3std5range10primitives__T14popBackExactlyTSQBr3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQCqFNaNbNiNfKQCmmZv@Base 12 ++ _D3std5range10primitives__T14popBackExactlyTSQBr3utf__T10byCodeUnitTAyuZQrFQhZ14ByCodeUnitImplZQCqFNaNbNiNfKQCmmZv@Base 12 ++ _D3std5range10primitives__T15popFrontExactlyTAAyaZQxFNaNbNiNfKQrmZv@Base 12 ++ _D3std5range10primitives__T15popFrontExactlyTAC4core6thread5fiber5FiberZQBtFNaNbNiNfKQBomZv@Base 12 ++ _D3std5range10primitives__T3putTAkTkZQkFNaNbNiNfKQrkZv@Base 12 ++ _D3std5range10primitives__T3putTDFMAxaZvTAaZQrFKQqQjZv@Base 12 ++ _D3std5range10primitives__T3putTDFMAxaZvTAyaZQsFKQrQkZv@Base 12 ++ _D3std5range10primitives__T3putTDFMAxaZvTQgZQrFKQqQpZv@Base 12 ++ _D3std5range10primitives__T3putTDFNaNbNfAxaZvTAaZQwFNaNbNfKQBbQqZv@Base 12 ++ _D3std5range10primitives__T3putTDFNaNbNfAxaZvTAyaZQxFNaNbNfKQBcQrZv@Base 12 ++ _D3std5range10primitives__T3putTDFNaNbNfAxaZvTaZQvFNaNbNfKQBaaZv@Base 12 ++ _D3std5range10primitives__T3putTDFNaNbNfAxaZvTxaZQwFNaNbNfKQBbxaZv@Base 12 ++ _D3std5range10primitives__T3putTDFNaNbNfAxaZvTxwZQwFNaNfKQzxwZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAAyaZQpTQhZQBnFNaNbNfKQBtQyZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTAaZQBmFNaNbNfKQBsQrZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTAwZQBmFNaNfKQBqQpZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTAxaZQBnFNaNbNfKQBtQsZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTQhZQBmFNaNbNfKQBsQyZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTSQCj4path__T16asNormalizedPathTSQDoQDn__T5chainTSQEf3utf__T10byCodeUnitTQDbZQrFQDiZ14ByCodeUnitImplTSQGfQGe__T10OnlyResultTaZQpTQDcZQDnFQDkQBnQDqZ6ResultZQFmFNkMQFaZQtZQHvFNaNbNfKQIbQHaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTSQCjQCi__T5chainTSQDa3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQEzQEy__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQGbFNaNbNfKQGhQFgZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTSQCjQCi__T5chainTSQDaQCz__T4TakeTSQDqQDp__T6RepeatTaZQkZQBdTSQEr4conv__T7toCharsVii10TaVEQFt5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6ResultZQExFQEuQDgZQtZQHeFNaNbNfKQHkQGjZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTaZQBlFNaNbNfKQBraZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTxaZQBmFNaNbNfKQBsxaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTxwZQBmFNaNfKQBqxwZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTAyaZQoTyaZQBmFNaNbNfKQBsyaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTyAaZQoTAaZQBmFNaNbNfKQBsQrZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTyAaZQoTAwZQBmFNaNfKQBqQpZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTyAaZQoTAxaZQBnFNaNbNfKQBtQsZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTyAaZQoTAyaZQBnFNaNbNfKQBtQsZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTyAaZQoTaZQBlFNaNbNfKQBraZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTyAaZQoTxaZQBmFNaNbNfKQBsxaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTyAaZQoTxwZQBmFNaNfKQBqxwZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5array__T8AppenderTyAaZQoTyaZQBmFNaNbNfKQBsyaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5stdio4File17LockingTextWriterTAaZQBrFNfKQBtQnZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5stdio4File17LockingTextWriterTAwZQBrFNfKQBtQnZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5stdio4File17LockingTextWriterTAxaZQBsFNfKQBuQoZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5stdio4File17LockingTextWriterTAyaZQBsFNfKQBuQoZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5stdio4File17LockingTextWriterTaZQBqFNfKQBsaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5stdio4File17LockingTextWriterTxaZQBrFNfKQBtxaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5stdio4File17LockingTextWriterTxwZQBrFNfKQBtxwZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf5stdio4File17LockingTextWriterTyaZQBrFNfKQBtyaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format4spec__T10singleSpecTyaZQqFAyaZ16DummyOutputRangeTAxaZQCsFNaNbNiNfKQDaQuZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format8NoOpSinkTAaZQBdFNaNbNiNfKQBlQtZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format8NoOpSinkTAxaZQBeFNaNbNiNfKQBmQuZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format8NoOpSinkTAyaZQBeFNaNbNiNfKQBmQuZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format8NoOpSinkTaZQBcFNaNbNiNfKQBkaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format8NoOpSinkTxaZQBdFNaNbNiNfKQBlxaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format8NoOpSinkTxwZQBdFNaNbNiNfKQBlxwZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTAyaZQCgFNaNbNfKQCmQsZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTQmZQCfFNaNbNfKQClQBdZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTQpZQCfFNaNbNfKQClQBgZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTaZQCeFNaNfKQCiaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTxaZQCfFNaNfKQCjxaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTxwZQCfFNaNfKQCjxwZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTAyaZQCuFNaNbNfKQDaQsZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTQrZQCtFNaNbNfKQCzQBiZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTQuZQCtFNaNbNfKQCzQBlZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTaZQCsFNaNfKQCwaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTxaZQCtFNaNfKQCxxaZv@Base 12 ++ _D3std5range10primitives__T3putTSQBf6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTxwZQCtFNaNfKQCxxwZv@Base 12 ++ _D3std5range10primitives__T4backTAyaZQkFNaNbNcNdNiNfNkMANgAyaZNgQg@Base 12 ++ _D3std5range10primitives__T4backTCQBg3zip13ArchiveMemberZQBeFNaNbNcNdNiNfNkMANgCQDaQBuQBtZNgQn@Base 12 ++ _D3std5range10primitives__T4backTSQBg12experimental6logger11multilogger16MultiLoggerEntryZQClFNaNbNcNdNiNfNkMANgSQEhQDbQCqQCmQCcZNgQt@Base 12 ++ _D3std5range10primitives__T4backTSQBg5regex8internal2ir10NamedGroupZQBpFNaNbNcNdNiNfNkMANgSQDlQCfQCcQBwQBwZNgQt@Base 12 ++ _D3std5range10primitives__T4backTSQBg8datetime8timezone13PosixTimeZone10LeapSecondZQCeFNaNbNcNdNiNfNkMANgSQEaQCuQCoQCiQBwZNgQt@Base 12 ++ _D3std5range10primitives__T4backTSQBg8datetime8timezone13PosixTimeZone10TransitionZQCeFNaNbNcNdNiNfNkMANgSQEaQCuQCoQCiQBwZNgQt@Base 12 ++ _D3std5range10primitives__T4backTSQBg8datetime8timezone13PosixTimeZone14TempTransitionZQCiFNaNbNcNdNiNfNkMANgSQEeQCyQCsQCmQCaZNgQt@Base 12 ++ _D3std5range10primitives__T4backTSQBg8internal14unicode_tables15UnicodePropertyZQCbFNaNbNcNdNiNfNkMANgSQDxQCrQClQByZNgQq@Base 12 ++ _D3std5range10primitives__T4backTSQBg8internal14unicode_tables9CompEntryZQBuFNaNbNcNdNiNfNkMANgSQDqQCkQCeQBrZNgQq@Base 12 ++ _D3std5range10primitives__T4backTaZQiFNaNdNfMAxaZw@Base 12 ++ _D3std5range10primitives__T4backTkZQiFNaNbNcNdNiNfNkMANgkZNgk@Base 12 ++ _D3std5range10primitives__T4saveTAxaZQkFNaNbNdNiNfNkMANgANgxaZQj@Base 12 ++ _D3std5range10primitives__T4saveTAyaZQkFNaNbNdNiNfNkMANgAyaZQh@Base 12 ++ _D3std5range10primitives__T4saveTCQBg3zip13ArchiveMemberZQBeFNaNbNdNiNfNkMANgCQCyQBsQBrZQo@Base 12 ++ _D3std5range10primitives__T4saveTSQBg5regex8internal2ir10NamedGroupZQBpFNaNbNdNiNfNkMANgSQDjQCdQCaQBuQBuZQu@Base 12 ++ _D3std5range10primitives__T4saveTSQBg8datetime8timezone13PosixTimeZone10LeapSecondZQCeFNaNbNdNiNfNkMANgSQDyQCsQCmQCgQBuZQu@Base 12 ++ _D3std5range10primitives__T4saveTSQBg8datetime8timezone13PosixTimeZone10TransitionZQCeFNaNbNdNiNfNkMANgSQDyQCsQCmQCgQBuZQu@Base 12 ++ _D3std5range10primitives__T4saveTSQBg8datetime8timezone13PosixTimeZone14TempTransitionZQCiFNaNbNdNiNfNkMANgSQEcQCwQCqQCkQByZQu@Base 12 ++ _D3std5range10primitives__T4saveTSQBg8internal14unicode_tables15UnicodePropertyZQCbFNaNbNdNiNfNkMANgSQDvQCpQCjQBwZQr@Base 12 ++ _D3std5range10primitives__T4saveTSQBg8internal14unicode_tables9CompEntryZQBuFNaNbNdNiNfNkMANgSQDoQCiQCcQBpZQr@Base 12 ++ _D3std5range10primitives__T4saveTaZQiFNaNbNdNiNfNkMANgaZQf@Base 12 ++ _D3std5range10primitives__T4saveTfZQiFNaNbNdNiNfNkMANgfZQf@Base 12 ++ _D3std5range10primitives__T4saveThZQiFNaNbNdNiNfNkMANghZQf@Base 12 ++ _D3std5range10primitives__T4saveTkZQiFNaNbNdNiNfNkMANgkZQf@Base 12 ++ _D3std5range10primitives__T4saveTuZQiFNaNbNdNiNfNkMANguZQf@Base 12 ++ _D3std5range10primitives__T5doPutTAkTkZQmFNaNbNiNfKQrKkZv@Base 12 ++ _D3std5range10primitives__T5doPutTDFMAxaZvTAaZQtFKQqKQkZv@Base 12 ++ _D3std5range10primitives__T5doPutTDFMAxaZvTAyaZQuFKQrKQlZv@Base 12 ++ _D3std5range10primitives__T5doPutTDFMAxaZvTQgZQtFKQqKQqZv@Base 12 ++ _D3std5range10primitives__T5doPutTDFNaNbNfAxaZvTAaZQyFNaNbNfKQBbKQrZv@Base 12 ++ _D3std5range10primitives__T5doPutTDFNaNbNfAxaZvTAaZQyFNaNbNfKQBbQqZv@Base 12 ++ _D3std5range10primitives__T5doPutTDFNaNbNfAxaZvTAyaZQzFNaNbNfKQBcKQsZv@Base 12 ++ _D3std5range10primitives__T5doPutTDFNaNbNfAxaZvTQgZQyFNaNbNfKQBbQwZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAAyaZQpTQhZQBpFNaNbNfKQBtKQzZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTAaZQBoFNaNbNfKQBsKQsZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTAwZQBoFNaNfKQBqKQqZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTAxaZQBpFNaNbNfKQBtKQtZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTQhZQBoFNaNbNfKQBsKQzZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTSQCl4path__T16asNormalizedPathTSQDqQDp__T5chainTSQEh3utf__T10byCodeUnitTQDbZQrFQDiZ14ByCodeUnitImplTSQGhQGg__T10OnlyResultTaZQpTQDcZQDnFQDkQBnQDqZ6ResultZQFmFNkMQFaZQtZQHxFNaNbNfKQIbKQHbZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTSQClQCk__T5chainTSQDc3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQFbQFa__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQGdFNaNbNfKQGhKQFhZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTSQClQCk__T5chainTSQDcQDb__T4TakeTSQDsQDr__T6RepeatTaZQkZQBdTSQEt4conv__T7toCharsVii10TaVEQFv5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6ResultZQExFQEuQDgZQtZQHgFNaNbNfKQHkKQGkZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTaZQBnFNaNbNfKQBrKaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTxaZQBoFNaNbNfKQBsKxaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTxwZQBoFNaNfKQBqKxwZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTAyaZQoTyaZQBoFNaNbNfKQBsKyaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTyAaZQoTAaZQBoFNaNbNfKQBsKQsZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTyAaZQoTAwZQBoFNaNfKQBqKQqZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTyAaZQoTAxaZQBpFNaNbNfKQBtKQtZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTyAaZQoTAyaZQBpFNaNbNfKQBtKQtZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTyAaZQoTaZQBnFNaNbNfKQBrKaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTyAaZQoTxaZQBoFNaNbNfKQBsKxaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTyAaZQoTxwZQBoFNaNfKQBqKxwZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5array__T8AppenderTyAaZQoTyaZQBoFNaNbNfKQBsKyaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5stdio4File17LockingTextWriterTAaZQBtFNfKQBtKQoZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5stdio4File17LockingTextWriterTAwZQBtFNfKQBtKQoZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5stdio4File17LockingTextWriterTAxaZQBuFNfKQBuKQpZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5stdio4File17LockingTextWriterTAyaZQBuFNfKQBuKQpZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5stdio4File17LockingTextWriterTaZQBsFNfKQBsKaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5stdio4File17LockingTextWriterTxaZQBtFNfKQBtKxaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5stdio4File17LockingTextWriterTxwZQBtFNfKQBtKxwZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh5stdio4File17LockingTextWriterTyaZQBtFNfKQBtKyaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format4spec__T10singleSpecTyaZQqFAyaZ16DummyOutputRangeTAxaZQCuFNaNbNiNfKQDaKQvZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format8NoOpSinkTAaZQBfFNaNbNiNfKQBlKQuZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format8NoOpSinkTAxaZQBgFNaNbNiNfKQBmKQvZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format8NoOpSinkTAyaZQBgFNaNbNiNfKQBmKQvZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format8NoOpSinkTaZQBeFNaNbNiNfKQBkKaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format8NoOpSinkTxaZQBfFNaNbNiNfKQBlKxaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format8NoOpSinkTxwZQBfFNaNbNiNfKQBlKxwZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTAyaZQCiFNaNbNfKQCmKQtZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTQmZQChFNaNbNfKQClKQBeZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTQpZQChFNaNbNfKQClKQBhZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTaZQCgFNaNfKQCiKaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTxaZQChFNaNfKQCjKxaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTxwZQChFNaNfKQCjKxwZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTAyaZQCwFNaNbNfKQDaKQtZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTQrZQCvFNaNbNfKQCzKQBjZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTQuZQCvFNaNbNfKQCzKQBmZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTaZQCuFNaNfKQCwKaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTxaZQCvFNaNfKQCxKxaZv@Base 12 ++ _D3std5range10primitives__T5doPutTSQBh6format__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTxwZQCvFNaNfKQCxKxwZv@Base 12 ++ _D3std5range10primitives__T5emptyTAAxaZQmFNaNbNdNiNfMKQuZb@Base 12 ++ _D3std5range10primitives__T5emptyTAAyaZQmFNaNbNdNiNfMKQuZb@Base 12 ++ _D3std5range10primitives__T5emptyTACQBi3zip13ArchiveMemberZQBgFNaNbNdNiNfMKQBpZb@Base 12 ++ _D3std5range10primitives__T5emptyTAEQBi3uni__T16UnicodeSetParserTSQCm5regex8internal6parser__T6ParserTAyaTSQEbQBpQBmQBg7CodeGenZQBiZQDi8OperatorZQEoFNaNbNdNiNfMKQExZb@Base 12 ++ _D3std5range10primitives__T5emptyTASQBi3uni__T13InversionListTSQCjQBb8GcPolicyZQBhZQCeFNaNbNdNiNfMKQCnZb@Base 12 ++ _D3std5range10primitives__T5emptyTASQBi5regex8internal2ir10NamedGroupZQBrFNaNbNdNiNfMKQCaZb@Base 12 ++ _D3std5range10primitives__T5emptyTASQBi5regex8internal2ir__T5GroupTmZQjZQBtFNaNbNdNiNfMKQCcZb@Base 12 ++ _D3std5range10primitives__T5emptyTASQBi5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThreadZQCpFNaNbNdNiNfMKQCyZb@Base 12 ++ _D3std5range10primitives__T5emptyTASQBi8datetime8timezone13PosixTimeZone10LeapSecondZQCgFNaNbNdNiNfMKQCpZb@Base 12 ++ _D3std5range10primitives__T5emptyTASQBi8datetime8timezone13PosixTimeZone10TransitionZQCgFNaNbNdNiNfMKQCpZb@Base 12 ++ _D3std5range10primitives__T5emptyTASQBi8datetime8timezone13PosixTimeZone14TempTransitionZQCkFNaNbNdNiNfMKQCtZb@Base 12 ++ _D3std5range10primitives__T5emptyTASQBi8typecons__T5TupleTkTkTkZQnZQBoFNaNbNdNiNfMKQBxZb@Base 12 ++ _D3std5range10primitives__T5emptyTAaZQkFNaNbNdNiNfMKQsZb@Base 12 ++ _D3std5range10primitives__T5emptyTAaZQkFNaNbNdNiNfMQrZb@Base 12 ++ _D3std5range10primitives__T5emptyTAbZQkFNaNbNdNiNfMKQsZb@Base 12 ++ _D3std5range10primitives__T5emptyTAhZQkFNaNbNdNiNfMKQsZb@Base 12 ++ _D3std5range10primitives__T5emptyTAkZQkFNaNbNdNiNfMKQsZb@Base 12 ++ _D3std5range10primitives__T5emptyTAkZQkFNaNbNdNiNfMQrZb@Base 12 ++ _D3std5range10primitives__T5emptyTAwZQkFNaNbNdNiNfMKQsZb@Base 12 ++ _D3std5range10primitives__T5emptyTAwZQkFNaNbNdNiNfMQrZb@Base 12 ++ _D3std5range10primitives__T5emptyTAxAaZQmFNaNbNdNiNfMKQuZb@Base 12 ++ _D3std5range10primitives__T5emptyTAxSQBj5regex8internal2ir8BytecodeZQBpFNaNbNdNiNfMKQByZb@Base 12 ++ _D3std5range10primitives__T5emptyTAxaZQlFNaNbNdNiNfMKQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTAxaZQlFNaNbNdNiNfMQsZb@Base 12 ++ _D3std5range10primitives__T5emptyTAxhZQlFNaNbNdNiNfMKQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTAxkZQlFNaNbNdNiNfMKQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTAxkZQlFNaNbNdNiNfMQsZb@Base 12 ++ _D3std5range10primitives__T5emptyTAxuZQlFNaNbNdNiNfMKQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTAxwZQlFNaNbNdNiNfMKQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTAyAaZQmFNaNbNdNiNfMKQuZb@Base 12 ++ _D3std5range10primitives__T5emptyTAyAaZQmFNaNbNdNiNfMQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTAySQBj8internal14unicode_tables15UnicodePropertyZQCeFNaNbNdNiNfMKQCnZb@Base 12 ++ _D3std5range10primitives__T5emptyTAySQBj8internal14unicode_tables9CompEntryZQBxFNaNbNdNiNfMKQCgZb@Base 12 ++ _D3std5range10primitives__T5emptyTAyaZQlFNaNbNdNiNfMKQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTAyaZQlFNaNbNdNiNfMQsZb@Base 12 ++ _D3std5range10primitives__T5emptyTAyhZQlFNaNbNdNiNfMKQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTAyhZQlFNaNbNdNiNfMQsZb@Base 12 ++ _D3std5range10primitives__T5emptyTAywZQlFNaNbNdNiNfMKQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTxASQBj4json9JSONValueZQBdFNaNbNdNiNfMKxQBmZb@Base 12 ++ _D3std5range10primitives__T5emptyTxAaZQlFNaNbNdNiNfMKxQtZb@Base 12 ++ _D3std5range10primitives__T5emptyTyASQBj8datetime8timezone13PosixTimeZone10LeapSecondZQChFNaNbNdNiNfMKyQCqZb@Base 12 ++ _D3std5range10primitives__T5emptyTyASQBj8datetime8timezone13PosixTimeZone10TransitionZQChFNaNbNdNiNfMKyQCqZb@Base 12 ++ _D3std5range10primitives__T5frontTAaZQkFNaNbNcNdNiNfNkMANgAaZNgQf@Base 12 ++ _D3std5range10primitives__T5frontTAyaZQlFNaNbNcNdNiNfNkMANgAyaZNgQg@Base 12 ++ _D3std5range10primitives__T5frontTCQBh3zip13ArchiveMemberZQBfFNaNbNcNdNiNfNkMANgCQDbQBuQBtZNgQn@Base 12 ++ _D3std5range10primitives__T5frontTSQBh5regex8internal2ir10NamedGroupZQBqFNaNbNcNdNiNfNkMANgSQDmQCfQCcQBwQBwZNgQt@Base 12 ++ _D3std5range10primitives__T5frontTSQBh8datetime8timezone13PosixTimeZone10LeapSecondZQCfFNaNbNcNdNiNfNkMANgSQEbQCuQCoQCiQBwZNgQt@Base 12 ++ _D3std5range10primitives__T5frontTSQBh8datetime8timezone13PosixTimeZone10TransitionZQCfFNaNbNcNdNiNfNkMANgSQEbQCuQCoQCiQBwZNgQt@Base 12 ++ _D3std5range10primitives__T5frontTSQBh8datetime8timezone13PosixTimeZone14TempTransitionZQCjFNaNbNcNdNiNfNkMANgSQEfQCyQCsQCmQCaZNgQt@Base 12 ++ _D3std5range10primitives__T5frontTSQBh8internal14unicode_tables15UnicodePropertyZQCcFNaNbNcNdNiNfNkMANgSQDyQCrQClQByZNgQq@Base 12 ++ _D3std5range10primitives__T5frontTSQBh8internal14unicode_tables9CompEntryZQBvFNaNbNcNdNiNfNkMANgSQDrQCkQCeQBrZNgQq@Base 12 ++ _D3std5range10primitives__T5frontTaZQjFNaNdNfMAxaZw@Base 12 ++ _D3std5range10primitives__T5frontThZQjFNaNbNcNdNiNfNkMANghZNgh@Base 12 ++ _D3std5range10primitives__T5frontTkZQjFNaNbNcNdNiNfNkMANgkZNgk@Base 12 ++ _D3std5range10primitives__T5frontTuZQjFNaNdNfMAxuZw@Base 12 ++ _D3std5range10primitives__T5frontTwZQjFNaNbNcNdNiNfNkMANgwZNgw@Base 12 ++ _D3std5range10primitives__T6moveAtTASQBj8datetime8timezone13PosixTimeZone10TransitionZQChFNaNbNiNfQClmZQCp@Base 12 ++ _D3std5range10primitives__T6moveAtTSQBi3uni__T13InversionListTSQCjQBb8GcPolicyZQBh__T9IntervalsTAkZQoZQCxFNaNbNiNfQDbmZSQEoQDg17CodepointInterval@Base 12 ++ _D3std5range10primitives__T6moveAtTSQBi3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQCgFNaNbNiNfQCkmZa@Base 12 ++ _D3std5range10primitives__T6moveAtTSQBi3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQChFNaNbNiNfQClmZxa@Base 12 ++ _D3std5range10primitives__T6moveAtTSQBi3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQChFNaNbNiNfQClmZya@Base 12 ++ _D3std5range10primitives__T6moveAtTSQBi4conv__T7toCharsVii10TaVEQCk5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6ResultZQDhFNaNbNiNfQDlmZa@Base 12 ++ _D3std5range10primitives__T6moveAtTSQBiQBh__T10OnlyResultTaZQpZQBkFNaNbNiNfQBomZa@Base 12 ++ _D3std5range10primitives__T6moveAtTSQBiQBh__T6RepeatTaZQkZQBfFNaNbNiNfQBjmZa@Base 12 ++ _D3std5range10primitives__T7popBackTAyaZQnFNaNbNiNfMKANgAyaZv@Base 12 ++ _D3std5range10primitives__T7popBackTCQBj3zip13ArchiveMemberZQBhFNaNbNiNfMKANgCQCyQBpQBoZv@Base 12 ++ _D3std5range10primitives__T7popBackTSQBj12experimental6logger11multilogger16MultiLoggerEntryZQCoFNaNbNiNfMKANgSQEfQCwQClQChQBxZv@Base 12 ++ _D3std5range10primitives__T7popBackTSQBj4file15DirIteratorImpl9DirHandleZQBuFNaNbNiNfMKANgSQDlQCcQCaQBmZv@Base 12 ++ _D3std5range10primitives__T7popBackTSQBj4file8DirEntryZQBcFNaNbNiNfMKANgSQCtQBkQBiZv@Base 12 ++ _D3std5range10primitives__T7popBackTSQBj5regex8internal2ir10NamedGroupZQBsFNaNbNiNfMKANgSQDjQCaQBxQBrQBrZv@Base 12 ++ _D3std5range10primitives__T7popBackTSQBj8datetime8timezone13PosixTimeZone10LeapSecondZQChFNaNbNiNfMKANgSQDyQCpQCjQCdQBrZv@Base 12 ++ _D3std5range10primitives__T7popBackTSQBj8datetime8timezone13PosixTimeZone10TransitionZQChFNaNbNiNfMKANgSQDyQCpQCjQCdQBrZv@Base 12 ++ _D3std5range10primitives__T7popBackTSQBj8datetime8timezone13PosixTimeZone14TempTransitionZQClFNaNbNiNfMKANgSQEcQCtQCnQChQBvZv@Base 12 ++ _D3std5range10primitives__T7popBackTSQBj8internal14unicode_tables15UnicodePropertyZQCeFNaNbNiNfMKANgSQDvQCmQCgQBtZv@Base 12 ++ _D3std5range10primitives__T7popBackTSQBj8internal14unicode_tables9CompEntryZQBxFNaNbNiNfMKANgSQDoQCfQBzQBmZv@Base 12 ++ _D3std5range10primitives__T7popBackTaZQlFNaNfMKANgaZv@Base 12 ++ _D3std5range10primitives__T7popBackTkZQlFNaNbNiNfMKANgkZv@Base 12 ++ _D3std5range10primitives__T7putCharTDFNaNbNfAxaZvTxwZQBaFNaNfKQBaxwZv@Base 12 ++ _D3std5range10primitives__T8moveBackTASQBl8datetime8timezone13PosixTimeZone10TransitionZQCjFNaNbNiNfQClZQCo@Base 12 ++ _D3std5range10primitives__T8moveBackTSQBk3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQCiFNaNbNiNfQCkZa@Base 12 ++ _D3std5range10primitives__T8moveBackTSQBk3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQCjFNaNbNiNfQClZxa@Base 12 ++ _D3std5range10primitives__T8moveBackTSQBk3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQCjFNaNbNiNfQClZya@Base 12 ++ _D3std5range10primitives__T8moveBackTSQBk4conv__T7toCharsVii10TaVEQCm5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6ResultZQDjFNaNbNiNfQDlZa@Base 12 ++ _D3std5range10primitives__T8moveBackTSQBkQBj__T10OnlyResultTaZQpZQBmFNaNbNiNfQBoZa@Base 12 ++ _D3std5range10primitives__T8popFrontTAaZQnFNaNbNiNfMKANgAaZv@Base 12 ++ _D3std5range10primitives__T8popFrontTAyaZQoFNaNbNiNfMKANgAyaZv@Base 12 ++ _D3std5range10primitives__T8popFrontTCQBk3zip13ArchiveMemberZQBiFNaNbNiNfMKANgCQCzQBpQBoZv@Base 12 ++ _D3std5range10primitives__T8popFrontTSQBk5regex8internal2ir10NamedGroupZQBtFNaNbNiNfMKANgSQDkQCaQBxQBrQBrZv@Base 12 ++ _D3std5range10primitives__T8popFrontTSQBk8datetime8timezone13PosixTimeZone10LeapSecondZQCiFNaNbNiNfMKANgSQDzQCpQCjQCdQBrZv@Base 12 ++ _D3std5range10primitives__T8popFrontTSQBk8datetime8timezone13PosixTimeZone10TransitionZQCiFNaNbNiNfMKANgSQDzQCpQCjQCdQBrZv@Base 12 ++ _D3std5range10primitives__T8popFrontTSQBk8datetime8timezone13PosixTimeZone14TempTransitionZQCmFNaNbNiNfMKANgSQEdQCtQCnQChQBvZv@Base 12 ++ _D3std5range10primitives__T8popFrontTSQBk8internal14unicode_tables15UnicodePropertyZQCfFNaNbNiNfMKANgSQDwQCmQCgQBtZv@Base 12 ++ _D3std5range10primitives__T8popFrontTSQBk8internal14unicode_tables9CompEntryZQByFNaNbNiNfMKANgSQDpQCfQBzQBmZv@Base 12 ++ _D3std5range10primitives__T8popFrontTaZQmFNaNbNeMKANgaZ12charWidthTabyAh@Base 12 ++ _D3std5range10primitives__T8popFrontTaZQmFNaNbNiNeMKANgaZv@Base 12 ++ _D3std5range10primitives__T8popFrontThZQmFNaNbNiNfMKANghZv@Base 12 ++ _D3std5range10primitives__T8popFrontTkZQmFNaNbNiNfMKANgkZv@Base 12 ++ _D3std5range10primitives__T8popFrontTuZQmFNaNbNiNeMKANguZv@Base 12 ++ _D3std5range10primitives__T8popFrontTwZQmFNaNbNiNfMKANgwZv@Base 12 ++ _D3std5range10primitives__T9moveFrontTASQBm8datetime8timezone13PosixTimeZone10TransitionZQCkFNaNbNiNfQClZQCo@Base 12 ++ _D3std5range10primitives__T9moveFrontTSQBl3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplZQCjFNaNbNiNfQCkZa@Base 12 ++ _D3std5range10primitives__T9moveFrontTSQBl3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQCkFNaNbNiNfQClZxa@Base 12 ++ _D3std5range10primitives__T9moveFrontTSQBl3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQCkFNaNbNiNfQClZya@Base 12 ++ _D3std5range10primitives__T9moveFrontTSQBl3utf__T5byUTFTwVEQCf8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFiQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQGzFNaNbNiNfQHaZw@Base 12 ++ _D3std5range10primitives__T9moveFrontTSQBl4conv__T7toCharsVii10TaVEQCn5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6ResultZQDkFNaNbNiNfQDlZa@Base 12 ++ _D3std5range10primitives__T9moveFrontTSQBl9algorithm9iteration__T12FilterResultSQDa8bitmanip8BitArray7bitsSetMxFNbNdZ9__lambda3TSQExQEw__T4iotaTmTxmZQlFmxmZ6ResultZQDvZQFlFNaNbNiQFkZm@Base 12 ++ _D3std5range10primitives__T9moveFrontTSQBl9algorithm9iteration__T6joinerTSQCuQBjQBc__T9MapResultSQDr8bitmanip8BitArray7bitsSetMxFNbNdZ9__lambda2TSQFoQEdQDw__T12FilterResultSQGpQCyQCsQCmMxFNbNdZ9__lambda1TSQHvQHu__T4iotaTmTmZQkFmmZ6ResultZQDcZQGaZQGzFQGvZQyZQIwFNaNbNiQIvZm@Base 12 ++ _D3std5range10primitives__T9moveFrontTSQBlQBk__T10OnlyResultTaZQpZQBnFNaNbNiNfQBoZa@Base 12 ++ _D3std5range10primitives__T9moveFrontTSQBlQBk__T6RepeatTaZQkZQBiFNaNbNiNfQBjZa@Base 12 ++ _D3std5range10primitives__T9popFrontNTAhZQoFNaNbNiNfKQpmZm@Base 12 ++ _D3std5range10primitives__T9popFrontNTAxSQBn5regex8internal2ir8BytecodeZQBtFNaNbNiNfKQBvmZm@Base 12 ++ _D3std5range10primitives__T9popFrontNTSQBl5regex8internal6parser__T6ParserTAyaTSQDaQBpQBmQBg7CodeGenZQBiZQDaFNaNfKQCymZm@Base 12 ++ _D3std5range11__moduleRefZ@Base 12 ++ _D3std5range12__ModuleInfoZ@Base 12 ++ _D3std5range8NullSink6__initZ@Base 12 ++ _D3std5range8nullSinkFNaNbNcNiNfZSQBgQBf8NullSink@Base 12 ++ _D3std5range8nullSinkFNcZ4sinkSQBdQBc8NullSink@Base 12 ++ _D3std5range__T10OnlyResultTaZQp10fetchFrontMFNaNbNiNeZa@Base 12 ++ _D3std5range__T10OnlyResultTaZQp4backMFNaNbNdNiNfZa@Base 12 ++ _D3std5range__T10OnlyResultTaZQp4saveMFNaNbNdNiNfZSQBxQBw__TQBtTaZQBz@Base 12 ++ _D3std5range__T10OnlyResultTaZQp5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T10OnlyResultTaZQp5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std5range__T10OnlyResultTaZQp6__initZ@Base 12 ++ _D3std5range__T10OnlyResultTaZQp6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T10OnlyResultTaZQp7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std5range__T10OnlyResultTaZQp7opSliceMFNaNbNiNfZSQByQBx__TQBuTaZQCa@Base 12 ++ _D3std5range__T10OnlyResultTaZQp7opSliceMFNaNbNiNfmmZSQCaQBz__TQBwTaZQCc@Base 12 ++ _D3std5range__T10OnlyResultTaZQp7popBackMFNaNbNiNfZv@Base 12 ++ _D3std5range__T10OnlyResultTaZQp8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T10OnlyResultTaZQp__T6__ctorZQiMFNaNbNcNiNfKaZSQChQCg__TQCdTaZQCj@Base 12 ++ _D3std5range__T10roundRobinTSQBb9algorithm9iteration__T9MapResultSQCm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQEq3uni21DecompressedIntervalsZQDuTSQGaQEzQEs__TQElSQGqQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQIaFNaNbNiNfQHzQDdZSQJhQJg__TQJdTQIuTQDzZQJpFQJgQEkZ6Result@Base 12 ++ _D3std5range__T10roundRobinTSQBb9algorithm9iteration__T9MapResultSQCm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQEq3uni21DecompressedIntervalsZQDuTSQGaQEzQEs__TQElSQGqQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQIaFQHrQCvZ6Result11__xopEqualsMxFKxSQJyQJx__TQJuTQJlTQEqZQKgFQJxQFbZQCgZb@Base 12 ++ _D3std5range__T10roundRobinTSQBb9algorithm9iteration__T9MapResultSQCm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQEq3uni21DecompressedIntervalsZQDuTSQGaQEzQEs__TQElSQGqQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQIaFQHrQCvZ6Result4saveMFNaNdNfZSQJuQJt__TQJqTQJhTQEmZQKcFQJtQExZQCc@Base 12 ++ _D3std5range__T10roundRobinTSQBb9algorithm9iteration__T9MapResultSQCm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQEq3uni21DecompressedIntervalsZQDuTSQGaQEzQEs__TQElSQGqQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQIaFQHrQCvZ6Result5emptyMFNaNdNfZb@Base 12 ++ _D3std5range__T10roundRobinTSQBb9algorithm9iteration__T9MapResultSQCm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQEq3uni21DecompressedIntervalsZQDuTSQGaQEzQEs__TQElSQGqQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQIaFQHrQCvZ6Result5frontMFNaNdNfZk@Base 12 ++ _D3std5range__T10roundRobinTSQBb9algorithm9iteration__T9MapResultSQCm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQEq3uni21DecompressedIntervalsZQDuTSQGaQEzQEs__TQElSQGqQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQIaFQHrQCvZ6Result6__initZ@Base 12 ++ _D3std5range__T10roundRobinTSQBb9algorithm9iteration__T9MapResultSQCm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQEq3uni21DecompressedIntervalsZQDuTSQGaQEzQEs__TQElSQGqQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQIaFQHrQCvZ6Result8popFrontMFNaNfZv@Base 12 ++ _D3std5range__T10roundRobinTSQBb9algorithm9iteration__T9MapResultSQCm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQEq3uni21DecompressedIntervalsZQDuTSQGaQEzQEs__TQElSQGqQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQIaFQHrQCvZ6Result9__xtoHashFNbNeKxSQJxQJw__TQJtTQJkTQEpZQKfFQJwQFaZQCfZm@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn11__xopEqualsMxFKxSQDwQDv__TQDsTQDiVQDla5_61203c2062VQDii0ZQExZb@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn4backMFNaNbNcNdNiNfZQCv@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn4saveMFNaNbNdNiNfZSQDwQDv__TQDsTQDiVQDla5_61203c2062VQDii0ZQEx@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn5frontMFNaNbNcNdNiNfZQCw@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn6__ctorMFNaNbNcNiNfQCvZSQEbQEa__TQDxTQDnVQDqa5_61203c2062VQDni0ZQFc@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn6__initZ@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn7opIndexMFNaNbNcNiNfmZQCx@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn7opSliceMFNaNbNiNjNfmmZSQEbQEa__TQDxTQDnVQDqa5_61203c2062VQDni0ZQFc@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn7popBackMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn7releaseMFNaNbNiNjNfZQCx@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn9__mixin246lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T11SortedRangeTAAyaVQea5_61203c2062VEQBxQBw18SortedRangeOptionsi0ZQCn9__xtoHashFNbNeKxSQDvQDu__TQDrTQDhVQDka5_61203c2062VQDhi0ZQEwZm@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg11__xopEqualsMxFKxSQFpQFo__TQFlTQFbSQGgQFdQEhQDyMFNaNfZQDvVQDoi0ZQGwZb@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg4backMFNaNbNcNdNiNfZQEo@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg4saveMFNaNbNdNiNfZSQFpQFo__TQFlTQFbSQGgQFdQEhQDyMFNaNfZQDvVQDoi0ZQGw@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg5frontMFNaNbNcNdNiNfZQEp@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg6__ctorMFNaNbNcNiNfQEoZSQFuQFt__TQFqTQFgSQGlQFiQEmQEdMFNaNfZQEaVQDti0ZQHb@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg6__initZ@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg7opIndexMFNaNbNcNiNfmZQEq@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg7opSliceMFNaNbNiNjNfmmZSQFuQFt__TQFqTQFgSQGlQFiQEmQEdMFNaNfZQEaVQDti0ZQHb@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg7popBackMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg7releaseMFNaNbNiNjNfZQEq@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg9__mixin246lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T11SortedRangeTACQBd3zip13ArchiveMemberSQCaQx10ZipArchive5buildMFNaNfZ9__lambda6VEQDqQDp18SortedRangeOptionsi0ZQEg9__xtoHashFNbNeKxSQFoQFn__TQFkTQFaSQGfQFcQEgQDxMFNaNfZQDuVQDni0ZQGvZm@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo11__xopEqualsMxFKxSQFxQFw__TQFtTQFjVQEda15_612e6e616d65203c20622e6e616d65VQEdi0ZQHtZb@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo4backMFNaNbNcNdNiNfZQEw@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo4saveMFNaNbNdNiNfZSQFxQFw__TQFtTQFjVQEda15_612e6e616d65203c20622e6e616d65VQEdi0ZQHt@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo5frontMFNaNbNcNdNiNfZQEx@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo6__ctorMFNaNbNcNiNfQEwZSQGcQGb__TQFyTQFoVQEia15_612e6e616d65203c20622e6e616d65VQEii0ZQHy@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo6__initZ@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo7opIndexMFNaNbNcNiNfmZQEy@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo7opSliceMFNaNbNiNjNfmmZSQGcQGb__TQFyTQFoVQEia15_612e6e616d65203c20622e6e616d65VQEii0ZQHy@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo7popBackMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo7releaseMFNaNbNiNjNfZQEy@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo9__mixin246lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo9__xtoHashFNbNeKxSQFwQFv__TQFsTQFiVQEca15_612e6e616d65203c20622e6e616d65VQEci0ZQHsZm@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo__T10lowerBoundVEQFvQFu12SearchPolicyi3TQFqZQBpMFNaNbNiNfQGhZSQHoQHn__TQHkTQHaVQFua15_612e6e616d65203c20622e6e616d65VQFui0ZQJk@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo__T18getTransitionIndexVEQGdQGc12SearchPolicyi3SQHaQGz__TQGwTQGmVQFga15_612e6e616d65203c20622e6e616d65VQFgi0ZQIw3geqTQIpZQEoMFNaNbNiNfQJgZm@Base 12 ++ _D3std5range__T11SortedRangeTASQBd5regex8internal2ir10NamedGroupVAyaa15_612e6e616d65203c20622e6e616d65VEQDyQDx18SortedRangeOptionsi0ZQEo__T3geqTQEkTQEoZQnMFNaNbNiNfQFeQFhZb@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh11__xopEqualsMxFKxSQGqQGp__TQGmTQGcVQEha17_612e74696d6554203c20622e74696d6554VQEhi0ZQIqZb@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh4backMFNaNbNcNdNiNfZQFp@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh4saveMFNaNbNdNiNfZSQGqQGp__TQGmTQGcVQEha17_612e74696d6554203c20622e74696d6554VQEhi0ZQIq@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh5frontMFNaNbNcNdNiNfZQFq@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh6__ctorMFNaNbNcNiNfQFpZSQGvQGu__TQGrTQGhVQEma17_612e74696d6554203c20622e74696d6554VQEmi0ZQIv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh6__initZ@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh7opIndexMFNaNbNcNiNfmZQFr@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh7opSliceMFNaNbNiNjNfmmZSQGvQGu__TQGrTQGhVQEma17_612e74696d6554203c20622e74696d6554VQEmi0ZQIv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh7popBackMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh7releaseMFNaNbNiNjNfZQFr@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh9__mixin246lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone10LeapSecondVAyaa17_612e74696d6554203c20622e74696d6554VEQErQEq18SortedRangeOptionsi0ZQFh9__xtoHashFNbNeKxSQGpQGo__TQGlTQGbVQEga17_612e74696d6554203c20622e74696d6554VQEgi0ZQIpZm@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl11__xopEqualsMxFKxSQGuQGt__TQGqTQGgVQEha17_612e74696d6554203c20622e74696d6554VQEhi0ZQIuZb@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl4backMFNaNbNcNdNiNfZQFt@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl4saveMFNaNbNdNiNfZSQGuQGt__TQGqTQGgVQEha17_612e74696d6554203c20622e74696d6554VQEhi0ZQIu@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl5frontMFNaNbNcNdNiNfZQFu@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl6__ctorMFNaNbNcNiNfQFtZSQGzQGy__TQGvTQGlVQEma17_612e74696d6554203c20622e74696d6554VQEmi0ZQIz@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl6__initZ@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl7opIndexMFNaNbNcNiNfmZQFv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl7opSliceMFNaNbNiNjNfmmZSQGzQGy__TQGvTQGlVQEma17_612e74696d6554203c20622e74696d6554VQEmi0ZQIz@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl7popBackMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl7releaseMFNaNbNiNjNfZQFv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl9__mixin246lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T11SortedRangeTASQBd8datetime8timezone13PosixTimeZone14TempTransitionVAyaa17_612e74696d6554203c20622e74696d6554VEQEvQEu18SortedRangeOptionsi0ZQFl9__xtoHashFNbNeKxSQGtQGs__TQGpTQGfVQEga17_612e74696d6554203c20622e74696d6554VQEgi0ZQItZm@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm11__xopEqualsMxFKxSQDvQDu__TQDrTQDhVQDia5_61203c2062VQDii0ZQEwZb@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm4backMFNaNbNcNdNiNfZk@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm4saveMFNaNbNdNiNfZSQDvQDu__TQDrTQDhVQDia5_61203c2062VQDii0ZQEw@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm5frontMFNaNbNcNdNiNfZk@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm6__ctorMFNaNbNcNiNfQCuZSQEaQDz__TQDwTQDmVQDna5_61203c2062VQDni0ZQFb@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm6__initZ@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm7opIndexMFNaNbNcNiNfmZk@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm7opSliceMFNaNbNiNjNfmmZSQEaQDz__TQDwTQDmVQDna5_61203c2062VQDni0ZQFb@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm7popBackMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm7releaseMFNaNbNiNjNfZQCw@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm9__mixin246lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm9__xtoHashFNbNeKxSQDuQDt__TQDqTQDgVQDha5_61203c2062VQDhi0ZQEvZm@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm__T10lowerBoundVEQDtQDs12SearchPolicyi2TiZQBnMFNaNbNiNfiZSQFiQFh__TQFeTQEuVQEva5_61203c2062VQEvi0ZQGj@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm__T18getTransitionIndexVEQEbQEa12SearchPolicyi2SQEyQEx__TQEuTQEkVQEla5_61203c2062VQEli0ZQFz3geqTiZQDrMFNaNbNiNfiZm@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm__T18getTransitionIndexVEQEbQEa12SearchPolicyi3SQEyQEx__TQEuTQEkVQEla5_61203c2062VQEli0ZQFz3geqTiZQDrMFNaNbNiNfiZm@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa5_61203c2062VEQBwQBv18SortedRangeOptionsi0ZQCm__T3geqTkTiZQjMFNaNbNiNfkiZb@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo11__xopEqualsMxFKxSQDxQDw__TQDtTQDjVQDka6_61203c3d2062VQDki0ZQFaZb@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo4backMFNaNbNcNdNiNfZk@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo4saveMFNaNbNdNiNfZSQDxQDw__TQDtTQDjVQDka6_61203c3d2062VQDki0ZQFa@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo5frontMFNaNbNcNdNiNfZk@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo6__ctorMFNaNbNcNiNfQCwZSQEcQEb__TQDyTQDoVQDpa6_61203c3d2062VQDpi0ZQFf@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo6__initZ@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo7opIndexMFNaNbNcNiNfmZk@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo7opSliceMFNaNbNiNjNfmmZSQEcQEb__TQDyTQDoVQDpa6_61203c3d2062VQDpi0ZQFf@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo7popBackMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo7releaseMFNaNbNiNjNfZQCy@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo9__mixin246lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo9__xtoHashFNbNeKxSQDwQDv__TQDsTQDiVQDja6_61203c3d2062VQDji0ZQEzZm@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo__T10lowerBoundVEQDvQDu12SearchPolicyi3TkZQBnMFNaNbNiNfkZSQFkQFj__TQFgTQEwVQExa6_61203c3d2062VQExi0ZQGn@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo__T10lowerBoundVEQDvQDu12SearchPolicyi3TyiZQBoMFNaNbNiNfyiZSQFmQFl__TQFiTQEyVQEza6_61203c3d2062VQEzi0ZQGp@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo__T18getTransitionIndexVEQEdQEc12SearchPolicyi3SQFaQEz__TQEwTQEmVQEna6_61203c3d2062VQEni0ZQGd3geqTkZQDtMFNaNbNiNfkZm@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo__T18getTransitionIndexVEQEdQEc12SearchPolicyi3SQFaQEz__TQEwTQEmVQEna6_61203c3d2062VQEni0ZQGd3geqTyiZQDuMFNaNbNiNfyiZm@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo__T3geqTkTkZQjMFNaNbNiNfkkZb@Base 12 ++ _D3std5range__T11SortedRangeTAkVAyaa6_61203c3d2062VEQByQBx18SortedRangeOptionsi0ZQCo__T3geqTkTyiZQkMFNaNbNiNfkyiZb@Base 12 ++ _D3std5range__T11SortedRangeTSQBc3uni__T13InversionListTSQCdQBb8GcPolicyZQBh__T9IntervalsTAkZQoSQDqQCo__TQCnTQCbZQCv8sanitizeMFNfZ9__lambda2VEQFkQFj18SortedRangeOptionsi0ZQGa11__xopEqualsMxFKxSQHjQHi__TQHfTQGvSQIaQGy__TQGxTQGlZQHfQEkMFNfZQEeVQDxi0ZQIzZb@Base 12 ++ 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_D3std5range__T4iotaTmTxmZQlFNaNbNiNfmxmZSQBoQBn__TQBkTmTxmZQBtFmxmZ6Result@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result4backMNgFNaNbNdNiNfZNgm@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result4saveMFNaNbNdNiNfZSQCfQCe__TQCbTmTxmZQCkFmxmZQCa@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result5frontMNgFNaNbNdNiNfZNgm@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result6__ctorMFNaNbNcNiNfmmZSQCjQCi__TQCfTmTxmZQCoFmxmZQCe@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result6__initZ@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result7opIndexMNgFNaNbNiNfmZNgm@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result7opSliceMNgFNaNbNiNfZNgSQCkQCj__TQCgTmTxmZQCpFmxmZQCf@Base 12 ++ _D3std5range__T4iotaTmTxmZQlFmxmZ6Result7opSliceMNgFNaNbNiNfmmZNgSQCmQCl__TQCiTmTxmZQCrFmxmZQCh@Base 12 ++ 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_D3std5range__T5chainTSQv3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplTSQCsQCr__T10OnlyResultTaZQpTSQDuQDa__TQCzTAxaZQDhFQiZQCsZQEjFQEgQCmQBnZ6Result8moveBackMFNaNbNiNfZxa@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplTSQCsQCr__T10OnlyResultTaZQpTSQDuQDa__TQCzTAxaZQDhFQiZQCsZQEjFQEgQCmQBnZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplTSQCsQCr__T10OnlyResultTaZQpTSQDuQDa__TQCzTAxaZQDhFQiZQCsZQEjFQEgQCmQBnZ6Result9__xtoHashFNbNeKxSQGjQGi__TQGfTQGcTQEjTQDlZQGvFQGsQEyQDzZQCmZm@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAaZQqFQgZ14ByCodeUnitImplTSQCsQCr__T10OnlyResultTaZQpTSQDuQDa__TQCzTAxaZQDhFQiZQCsZQEjFQEgQCmQBnZ6Result9moveFrontMFNaNbNiNfZxa@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFNaNbNiNfQDqQBvQDwZSQEvQEu__TQErTQEoTQCuTQEwZQFhFQFeQDjQFkZ6Result@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result11__xopEqualsMxFKxSQFmQFl__TQFiTQFfTQDlTQFnZQFyFQFvQEaQGbZQCnZb@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result4backMFNaNbNdNiNfZxa@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result4saveMFNaNbNdNiNfZSQFmQFl__TQFiTQFfTQDlTQFnZQFyFQFvQEaQGbZQCn@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result5frontMFNaNbNdNiNfZxa@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result6__ctorMFNaNbNcNiNfQEsQCxQEyZSQFxQFw__TQFtTQFqTQDwTQFyZQGjFQGgQElQGmZQCy@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result6__initZ@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result6fixRefFNaNbNiNfxaZxa@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result6lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result6moveAtMFNaNbNiNfmZxa@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result7opIndexMFNaNbNiNfmZxa@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result7opSliceMFNaNbNiNjNfmmZSQFrQFq__TQFnTQFkTQDqTQFsZQGdFQGaQEfQGgZQCs@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result7popBackMFNaNbNiNfZv@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result8moveBackMFNaNbNiNfZxa@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5range__T5chainTSQv3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQCtQCs__T10OnlyResultTaZQpTQDaZQDlFQDiQBnQDoZ6Result9__xtoHashFNbNeKxSQFlQFk__TQFhTQFeTQDkTQFmZQFxFQFuQDzQGaZQCmZm@Base 12 ++ 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_D3std5regex8internal12backtracking9CtContext10ctGenGroupMFKAxSQCjQCiQCf2ir8BytecodeiZSQDhQDgQDdQCxQCm7CtState@Base 12 ++ _D3std5regex8internal12backtracking9CtContext10ctGenRegExMFAxSQCiQChQCe2ir8BytecodeZAya@Base 12 ++ _D3std5regex8internal12backtracking9CtContext10lookaroundMFkkZSQCjQCiQCfQBzQBo@Base 12 ++ _D3std5regex8internal12backtracking9CtContext11__xopEqualsMxFKxSQCkQCjQCgQCaQBpZb@Base 12 ++ _D3std5regex8internal12backtracking9CtContext11ctQuickTestMFAxSQCjQCiQCf2ir8BytecodeiZAya@Base 12 ++ _D3std5regex8internal12backtracking9CtContext11restoreCodeMFZAya@Base 12 ++ _D3std5regex8internal12backtracking9CtContext14ctGenFixupCodeMFAxSQCmQClQCi2ir8BytecodeiiZAya@Base 12 ++ _D3std5regex8internal12backtracking9CtContext14ctGenFixupCodeMFKAxSQCnQCmQCj2ir8BytecodeiiZAya@Base 12 ++ _D3std5regex8internal12backtracking9CtContext16ctGenAlternationMFAxSQCoQCnQCk2ir8BytecodeiZSQDmQDlQDiQDcQCr7CtState@Base 12 ++ _D3std5regex8internal12backtracking9CtContext6__initZ@Base 12 ++ _D3std5regex8internal12backtracking9CtContext7CtState11__xopEqualsMxFKxSQCsQCrQCoQCiQBxQBqZb@Base 12 ++ _D3std5regex8internal12backtracking9CtContext7CtState6__initZ@Base 12 ++ _D3std5regex8internal12backtracking9CtContext7CtState9__xtoHashFNbNeKxSQCrQCqQCnQChQBwQBpZm@Base 12 ++ _D3std5regex8internal12backtracking9CtContext8saveCodeMFkAyaZQe@Base 12 ++ _D3std5regex8internal12backtracking9CtContext9__xtoHashFNbNeKxSQCjQCiQCfQBzQBoZm@Base 12 ++ _D3std5regex8internal12backtracking9CtContext9ctGenAtomMFKAxSQChQCgQCd2ir8BytecodeiZSQDfQDeQDbQCvQCk7CtState@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl10bwdMatcherMFNaNeKxSQFtQFsQFpQDk__T5RegexTaZQjAvZCQGxQGwQGtQGn__TQGcTaTQEdZQGm@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl10fwdMatcherMFNaNbNeKxSQFvQFuQFrQDm__T5RegexTaZQjAvZCQGzQGyQGvQGp__TQGeTaTQFmZQGo@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl10initializeMFNaNbNiNeKxSQFxQFwQFtQDo__T5RegexTaZQjQEpAvZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl10stackAvailMFNaNbNdNiNeZm@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl13initialMemoryFNaNbNiNeKxSQFzQFyQFvQDq__T5RegexTaZQjZm@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl13matchFinalizeMFNaNeZi@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl18initExternalMemoryMFNaNbNiNeAvZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl4nextMFNaNeZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl5State6__initZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl5Trace4markMFNaNbNiNemZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl5Trace6__initZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl5atEndMFNaNdNeZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl5dupToMFNeCQFjQFiQFfQDa__T7MatcherTaZQlAvZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl5matchMFNaNeASQFmQFlQFiQDd__T5GroupTmZQjZi@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl5rearmMFNeIAaZCQFnQFmQFjQDe__T7MatcherTaZQl@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl6__ctorMFNaNbNiNeKxSQFsQFrQFoQDj__T5RegexTaZQjQEkAvwmZCQHbQHaQGxQGr__TQGgTaTQFoZQGq@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl6__ctorMFNaNeKxSQFoQFnQFkQDf__T5RegexTaZQjPFNaNeCQGvQGuQGrQGl__TQGaTaTQFiZQGkZbQFrAvZQBl@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl6__ctorMFNaNeKxSQFoQFnQFkQDf__T5RegexTaZQjQEgAvZCQGvQGuQGrQGl__TQGaTaTQFiZQGk@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl6__initZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl6__vtblZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl6searchMFNaNeZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl7__ClassZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl7atStartMFNaNbNdNiNeZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl7patternMFNcNdNeZxSQFrQFqQFnQDi__T5RegexTaZQj@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl8newStackMFNaNbNiNeZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl8popStateMFNaNeZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl8refCountMFNcNdNeZm@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl9matchImplMFNaNeZi@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl9prevStackMFNaNbNiNeZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl9pushStateMFNaNbNiNekkZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T14BackLooperImplTSQDqQDpQDmQBh__T5InputTaZQjZQBtZQDl9stackSizeFNaNbNiNeKxSQFuQFtQFqQDl__T5RegexTaZQjZm@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa10bwdMatcherMFNaNeKxSQEiQEhQEeQBz__T5RegexTaZQjAvZCQFmQFlQFiQFc__TQErTaTSQGiQGhQGeQDz__T14BackLooperImplTQFgZQvZQGl@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa10fwdMatcherMFNaNbNeKxSQEkQEjQEgQCb__T5RegexTaZQjAvZCQFoQFnQFkQFe__TQEtTaTQEbZQFd@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa10initializeMFNaNbNiNeKxSQEmQElQEiQCd__T5RegexTaZQjQDeAvZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa10stackAvailMFNaNbNdNiNeZm@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa13initialMemoryFNaNbNiNeKxSQEoQEnQEkQCf__T5RegexTaZQjZm@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa13matchFinalizeMFNaNeZi@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa18initExternalMemoryMFNaNbNiNeAvZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa4nextMFNaNeZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa5State6__initZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa5Trace4markMFNaNbNiNemZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa5Trace6__initZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa5atEndMFNaNbNdNiNeZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa5dupToMFNeCQDyQDxQDuQBp__T7MatcherTaZQlAvZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa5matchMFNaNeASQEbQEaQDxQBs__T5GroupTmZQjZi@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa5rearmMFNeIAaZCQEcQEbQDyQBt__T7MatcherTaZQl@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa6__ctorMFNaNbNiNeKxSQEhQEgQEdQBy__T5RegexTaZQjQCzAvwmZCQFqQFpQFmQFg__TQEvTaTQEdZQFf@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa6__ctorMFNaNeKxSQEdQEcQDzQBu__T5RegexTaZQjPFNaNeCQFkQFjQFgQFa__TQEpTaTQDxZQEzZbQEgAvZQBl@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa6__ctorMFNaNeKxSQEdQEcQDzQBu__T5RegexTaZQjQCvAvZCQFkQFjQFgQFa__TQEpTaTQDxZQEz@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa6__initZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa6__vtblZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa6searchMFNaNeZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa7__ClassZ@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa7atStartMFNaNbNdNiNeZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa7patternMFNcNdNeZxSQEgQEfQEcQBx__T5RegexTaZQj@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa8newStackMFNaNbNiNeZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa8popStateMFNaNeZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa8refCountMFNcNdNeZm@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa9matchImplMFNaNeZi@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa9prevStackMFNaNbNiNeZb@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa9pushStateMFNaNbNiNekkZv@Base 12 ++ _D3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCa9stackSizeFNaNbNiNeKxSQEjQEiQEfQCa__T5RegexTaZQjZm@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeTQhTQkTQnZQxFNaNbNeQzQBbQBeQBhQBkQBnZQBr@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeTQhTQkZQuFNaNbNeQwQyQBaQBdQBgZQBk@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeTQhTxkTxkTiTQsTQvTQyZQBiFNaNbNeQBlQBoQBrQBuxkxkiQCcQCfQCiZQCm@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeTQhZQrFNaNbNeQtQvQxQzZQBc@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeTiTQjTQmTQpTxkTxkTiTQBaTQBeTQBiZQBtFNaNbNeQBwQBzQCciQCgQCjQCmxkxkiQCuQCxQDaZQDe@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeTiTQjTiTQoTiZQBaFNaNbNeQBdQBgQBjiQBniQBriZQBw@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeTiTiTQlZQvFNaNbNeQxQzQBbiiQBgZQBk@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeTiZQqFNaNbNeQsQuQwiZQBa@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeTxkTxkTiTQpTQsTQvZQBfFNaNbNeQBiQBlQBoxkxkiQBwQBzQCcZQCg@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTQeZQoFNaNbNeQqQsQuZQx@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTiTQgTQjTQmTxkTxkTiTQxTQBaTQBeZQBpFNaNbNeQBsQBviQBzQCcQCfxkxkiQCnQCqQCtZQCx@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTiTQgTiTQlTiZQxFNaNbNeQzQBbiQBfiQBjiZQBo@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTiTQgTiZQsFNaNbNeQuQwiQziZQBd@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTiTiTQiTiZQuFNaNbNeQwQyiiQBciZQBh@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTiTiTQiZQsFNaNbNeQuQwiiQBaZQBe@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTiZQnFNaNbNeQpQriZQv@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTxkTxkTiTQmTQpTQsZQBcFNaNbNeQBfQBixkxkiQBqQBtQBwZQCa@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaTykTiZQqFNaNbNeQsQuykiZQBa@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTAyaZQlFNaNbNeQnQpZQs@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTAyaTQeTQhTxkTxkTiTQsTQvTQyZQBkFNaNbNeQBliQBpQBsQBvxkxkiQCdQCgQCjZQCn@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTAyaTQeTQhZQtFNaNbNeQtiQwQyQBaZQBe@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTAyaTQeTiTQjTQmTQpTxkTxkTiTQBaTQBeTQBiZQBvFNaNbNeQBwiQCaQCdiQChQCkQCnxkxkiQCvQCyQDbZQDf@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTAyaTQeTiZQsFNaNbNeQsiQvQxiZQBb@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTAyaTiTQgTiZQuFNaNbNeQuiQxiQBaiZQBf@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTAyaTiZQpFNaNbNeQpiQsiZQw@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTAyaZQnFNaNbNeQniQqZQt@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTiTAyaTiZQrFNaNbNeQpiiQtiZQx@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTiTAyaZQpFNaNbNeQniiQrZQu@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTiZQlFNaNbNeAyaiiZQg@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiTykTiZQoFNaNbNeAyaiykiZQi@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTiZQjFNaNbNeAyaiZQf@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTkTAyaTQeTQhZQtFNaNbNeQtkQwQyQBaZQBe@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTkTAyaTQeZQqFNaNbNeQqkQtQvZQy@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTkTAyaZQnFNaNbNeQnkQqZQt@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTkTkZQlFNaNbNeAyakkZQg@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTkZQjFNaNbNeAyakZQf@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTxkTAyaTQeTiTQjTiTQoTiZQBdFNaNbNeQBdxkQBiQBliQBpiQBtiZQBy@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTxkTAyaTQeTiTiTQlZQyFNaNbNeQxxkQBbQBeiiQBjZQBn@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTxkTiTAyaTQeTQhZQwFNaNbNeQtxkiQyQBaQBdZQBh@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTxkTxkTiTAyaTQeTQhZQzFNaNbNeQtxkxkiQBaQBdQBgZQBk@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTxkTykTiTykTiZQuFNaNbNeAyaxkykiykiZQm@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTykTAyaTykTiZQtFNaNbNeQsykQwykiZQBc@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTykTiTiTAyaTiZQuFNaNbNeQpykiiQviZQz@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTykTiTykTiZQrFNaNbNeAyaykiykiZQk@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTykTiZQmFNaNbNeAyaykiZQh@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubTykZQkFNaNbNeAyaykZQg@Base 12 ++ _D3std5regex8internal12backtracking__T5ctSubZQhFNaNbNiNeAyaZQe@Base 12 ++ _D3std5regex8internal2ir10NamedGroup11__xopEqualsMxFKxSQCbQCaQBxQBrQBrZb@Base 12 ++ _D3std5regex8internal2ir10NamedGroup6__initZ@Base 12 ++ _D3std5regex8internal2ir10NamedGroup9__xtoHashFNbNeKxSQCaQBzQBwQBqQBqZm@Base 12 ++ _D3std5regex8internal2ir10getMatcherFNeSQBm3uni__T13InversionListTSQCnQBb8GcPolicyZQBhZSQDiQDhQDeQCy11CharMatcher@Base 12 ++ _D3std5regex8internal2ir10lengthOfIRFNaNbNiNfEQBsQBrQBoQBi2IRZi@Base 12 ++ _D3std5regex8internal2ir11CharMatcher11__xopEqualsMxFKxSQCcQCbQByQBsQBsZb@Base 12 ++ _D3std5regex8internal2ir11CharMatcher6__ctorMFNcSQBv3uni__T13InversionListTSQCwQBb8GcPolicyZQBhZSQDrQDqQDnQDhQDh@Base 12 ++ _D3std5regex8internal2ir11CharMatcher6__initZ@Base 12 ++ _D3std5regex8internal2ir11CharMatcher9__xtoHashFNbNeKxSQCbQCaQBxQBrQBrZm@Base 12 ++ _D3std5regex8internal2ir11CharMatcher__T7opIndexZQjMxFNaNbNiNfwZb@Base 12 ++ _D3std5regex8internal2ir11RegexOption6__initZ@Base 12 ++ _D3std5regex8internal2ir11__moduleRefZ@Base 12 ++ _D3std5regex8internal2ir11disassembleFNeIASQBpQBoQBlQBf8BytecodekIASQCoQCnQCkQCe10NamedGroupZAya@Base 12 ++ _D3std5regex8internal2ir12__ModuleInfoZ@Base 12 ++ _D3std5regex8internal2ir12matcherCacheHSQBm3uni__T13InversionListTSQCnQBb8GcPolicyZQBhSQDhQDgQDdQCx11CharMatcher@Base 12 ++ _D3std5regex8internal2ir14RegexException6__initZ@Base 12 ++ _D3std5regex8internal2ir14RegexException6__vtblZ@Base 12 ++ _D3std5regex8internal2ir14RegexException7__ClassZ@Base 12 ++ _D3std5regex8internal2ir14RegexException8__mixin16__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDmQDlQDiQDcQDc@Base 12 ++ _D3std5regex8internal2ir14RegexException8__mixin16__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDmQDlQDiQDcQDc@Base 12 ++ _D3std5regex8internal2ir16lengthOfPairedIRFNaNbNiNfEQByQBxQBuQBo2IRZi@Base 12 ++ _D3std5regex8internal2ir17immediateParamsIRFNaNbNiNfEQBzQByQBvQBp2IRZi@Base 12 ++ _D3std5regex8internal2ir2IR6__initZ@Base 12 ++ _D3std5regex8internal2ir7isEndIRFNaNbNiNfEQBoQBnQBkQBe2IRZb@Base 12 ++ _D3std5regex8internal2ir8BitTable6__ctorMFNcSQBr3uni__T13InversionListTSQCsQBb8GcPolicyZQBhZSQDnQDmQDjQDdQDd@Base 12 ++ _D3std5regex8internal2ir8BitTable6__initZ@Base 12 ++ _D3std5regex8internal2ir8BitTable__T3addZQfMFNaNbNiNfwZv@Base 12 ++ _D3std5regex8internal2ir8BitTable__T5indexZQhFNaNbNiNfwZk@Base 12 ++ _D3std5regex8internal2ir8BitTable__T7opIndexZQjMxFNaNbNiNfwZb@Base 12 ++ _D3std5regex8internal2ir8Bytecode11indexOfPairMxFNaNfkZk@Base 12 ++ _D3std5regex8internal2ir8Bytecode11setLocalRefMFNaNfZv@Base 12 ++ _D3std5regex8internal2ir8Bytecode12pairedLengthMxFNaNdNfZk@Base 12 ++ _D3std5regex8internal2ir8Bytecode13backreferenceMxFNaNdNfZb@Base 12 ++ _D3std5regex8internal2ir8Bytecode14setBackrefenceMFNaNfZv@Base 12 ++ _D3std5regex8internal2ir8Bytecode4argsMxFNaNdNfZi@Base 12 ++ _D3std5regex8internal2ir8Bytecode5isEndMxFNaNdNfZb@Base 12 ++ _D3std5regex8internal2ir8Bytecode6__ctorMFNaNcNfEQBvQBuQBrQBl2IRkZSQCnQCmQCjQCdQCd@Base 12 ++ _D3std5regex8internal2ir8Bytecode6__ctorMFNaNcNfEQBvQBuQBrQBl2IRkkZSQCoQCnQCkQCeQCe@Base 12 ++ _D3std5regex8internal2ir8Bytecode6__initZ@Base 12 ++ _D3std5regex8internal2ir8Bytecode6isAtomMxFNaNdNfZb@Base 12 ++ _D3std5regex8internal2ir8Bytecode6lengthMxFNaNdNfZk@Base 12 ++ _D3std5regex8internal2ir8Bytecode6pairedMxFNaNdNfZSQBxQBwQBtQBnQBn@Base 12 ++ _D3std5regex8internal2ir8Bytecode7fromRawFNaNfkZSQBvQBuQBrQBlQBl@Base 12 ++ _D3std5regex8internal2ir8Bytecode7hotspotMxFNaNdNfZb@Base 12 ++ _D3std5regex8internal2ir8Bytecode7isStartMxFNaNdNfZb@Base 12 ++ _D3std5regex8internal2ir8Bytecode8localRefMxFNaNdNfZb@Base 12 ++ _D3std5regex8internal2ir8Bytecode__T4codeZQgMxFNaNbNdNiNfZEQCfQCeQCbQBv2IR@Base 12 ++ _D3std5regex8internal2ir8Bytecode__T4dataZQgMFNaNbNdNiNfkZv@Base 12 ++ _D3std5regex8internal2ir8Bytecode__T4dataZQgMxFNaNbNdNiNfZk@Base 12 ++ _D3std5regex8internal2ir8Bytecode__T8mnemonicZQkMxFNaNdNeZAya@Base 12 ++ _D3std5regex8internal2ir8Bytecode__T8sequenceZQkMxFNaNbNdNiNfZk@Base 12 ++ _D3std5regex8internal2ir8hasMergeFNaNbNiNfEQBpQBoQBlQBf2IRZb@Base 12 ++ _D3std5regex8internal2ir8isAtomIRFNaNbNiNfEQBpQBoQBlQBf2IRZb@Base 12 ++ _D3std5regex8internal2ir8pairedIRFNaNbNiNfEQBpQBoQBlQBf2IRZQr@Base 12 ++ _D3std5regex8internal2ir9RegexInfo6__initZ@Base 12 ++ _D3std5regex8internal2ir9isStartIRFNaNbNiNfEQBqQBpQBmQBg2IRZb@Base 12 ++ _D3std5regex8internal2ir__T11mallocArrayTmZQqFNaNbNimZAm@Base 12 ++ _D3std5regex8internal2ir__T11startOfLineZQoFNaNbNiNfwbZb@Base 12 ++ _D3std5regex8internal2ir__T11wordMatcherZQoFNaNbNcNdNiNfZySQCfQCeQCbQBv11CharMatcher@Base 12 ++ _D3std5regex8internal2ir__T11wordMatcherZQoFNcNdZ7matcherySQCfQCeQCbQBv11CharMatcher@Base 12 ++ _D3std5regex8internal2ir__T12arrayInChunkTPFNaNeCQBvQBuQBr8thompson__T15ThompsonMatcherTaTSQDlQDkQDhQDb__T14BackLooperImplTSQEsQErQEoQEi__T5InputTaZQjZQBtZQDhPSQGcQGbQFyQEh__TQEbTaTQDnZQEl5StateZbZQGoFNaNbNimKAvZAQGp@Base 12 ++ _D3std5regex8internal2ir__T12arrayInChunkTPFNaNeCQBvQBuQBr8thompson__T15ThompsonMatcherTaTSQDlQDkQDhQDb__T5InputTaZQjZQBwPSQErQEqQEnQCw__TQCqTaTQCcZQDa5StateZbZQFdFNaNbNimKAvZAQFe@Base 12 ++ _D3std5regex8internal2ir__T12arrayInChunkTSQBpQBoQBl12backtracking__T19BacktrackingMatcherTaTSQDoQDnQDkQDe__T14BackLooperImplTSQEvQEuQErQEl__T5InputTaZQjZQBtZQDl5TraceZQFlFNaNbNimKAvZAQFm@Base 12 ++ _D3std5regex8internal2ir__T12arrayInChunkTSQBpQBoQBl12backtracking__T19BacktrackingMatcherTaTSQDoQDnQDkQDe__T5InputTaZQjZQCa5TraceZQEaFNaNbNimKAvZAQEb@Base 12 ++ _D3std5regex8internal2ir__T12arrayInChunkTmZQrFNaNbNimKAvZAm@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt11__xopEqualsMxFKxSQDoQDnQDkQDe__TQDeTQCrZQDmZb@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt5atEndMFNaNdNfZb@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt5resetMFNaNbNiNfmZv@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt6__ctorMFNaNbNcNiNfAxaZSQDtQDsQDpQDj__TQDjTQCwZQDr@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt6__ctorMFNaNbNcNiNfQBymZSQDuQDtQDqQDk__TQDkTQCxZQDs@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt6__initZ@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt7opSliceMFNaNbNiNfmmZAxa@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt8loopBackMFNaNbNiNfmZQCa@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt8nextCharMFNaNeKwKmZb@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt9__xtoHashFNbNeKxSQDnQDmQDjQDd__TQDdTQCqZQDlZm@Base 12 ++ _D3std5regex8internal2ir__T14BackLooperImplTSQBrQBqQBnQBh__T5InputTaZQjZQBt9lastIndexMFNaNbNdNiNfZm@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm3dupMxFNeCQDyQDxQDuQDo__T7MatcherTaZQlIAaZCQFfQFeQFbQDp__TQDhTaTSQGbQGaQFxQFr__T5InputTaZQjZQEp@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm6__initZ@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm6__vtblZ@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm6createMxFNeKxSQEdQEcQDzQDt__T5RegexTaZQjIAaZCQFiQFhQFeQDs__TQDkTaTSQGeQGdQGaQFu__T5InputTaZQjZQEs@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm6decRefMxFNeCQEbQEaQDxQDr__T7MatcherTaZQlZm@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm6incRefMxFNfCQEbQEaQDxQDr__T7MatcherTaZQlZm@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm7__ClassZ@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm8thompson15ThompsonMatcherTaZQCd3dupMxFNeCQDpQDoQDlQDf__T7MatcherTaZQlIAaZCQEwQEvQEsQDg__TQDdTaTSQFsQFrQFoQFi__T5InputTaZQjZQEl@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm8thompson15ThompsonMatcherTaZQCd6__initZ@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm8thompson15ThompsonMatcherTaZQCd6__vtblZ@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm8thompson15ThompsonMatcherTaZQCd6createMxFNeKxSQDuQDtQDqQDk__T5RegexTaZQjIAaZCQEzQEyQEvQDj__TQDgTaTSQFvQFuQFrQFl__T5InputTaZQjZQEo@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm8thompson15ThompsonMatcherTaZQCd6decRefMxFNeCQDsQDrQDoQDi__T7MatcherTaZQlZm@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm8thompson15ThompsonMatcherTaZQCd6incRefMxFNfCQDsQDrQDoQDi__T7MatcherTaZQlZm@Base 12 ++ _D3std5regex8internal2ir__T14GenericFactorySQBqQBpQBm8thompson15ThompsonMatcherTaZQCd7__ClassZ@Base 12 ++ _D3std5regex8internal2ir__T14MatcherFactoryTaZQt11__InterfaceZ@Base 12 ++ _D3std5regex8internal2ir__T14RuntimeFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm6__initZ@Base 12 ++ _D3std5regex8internal2ir__T14RuntimeFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm6__vtblZ@Base 12 ++ _D3std5regex8internal2ir__T14RuntimeFactorySQBqQBpQBm12backtracking19BacktrackingMatcherTaZQCm7__ClassZ@Base 12 ++ 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12 ++ _D3std5regex8internal2ir__T14defaultFactoryTaZQtFNaNdNfKxSQCeQCdQCaQBu__T5RegexTaZQjZ8pureImplFNaNbNeKxQBuZCQEcQEbQDyQDs__T14MatcherFactoryTaZQt@Base 12 ++ _D3std5regex8internal2ir__T15SmallFixedArrayTSQBsQBrQBoQBi__T5GroupTmZQjVki3ZQBy10__postblitMFNaNbNiNfZv@Base 12 ++ _D3std5regex8internal2ir__T15SmallFixedArrayTSQBsQBrQBoQBi__T5GroupTmZQjVki3ZQBy10abandonRefMFNaNbNiNeZv@Base 12 ++ _D3std5regex8internal2ir__T15SmallFixedArrayTSQBsQBrQBoQBi__T5GroupTmZQjVki3ZQBy13internalSliceMNgFNaNbNdNiNeZANgSQEiQEhQEeQDy__TQCqTmZQCw@Base 12 ++ _D3std5regex8internal2ir__T15SmallFixedArrayTSQBsQBrQBoQBi__T5GroupTmZQjVki3ZQBy5isBigMxFNaNbNdNiNfZb@Base 12 ++ _D3std5regex8internal2ir__T15SmallFixedArrayTSQBsQBrQBoQBi__T5GroupTmZQjVki3ZQBy6__ctorMFNaNbNcNimZSQDuQDtQDqQDk__TQDkTQCwVki3ZQDw@Base 12 ++ _D3std5regex8internal2ir__T15SmallFixedArrayTSQBsQBrQBoQBi__T5GroupTmZQjVki3ZQBy6__dtorMFNaNbNiNfZv@Base 12 ++ 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_D3std5regex8internal6parser__T6ParserTAyaTSQBqQBpQBmQBg7CodeGenZQBi9skipSpaceMFNaNfZv@Base 12 ++ _D3std5regex8internal6parser__T6ParserTAyaTSQBqQBpQBmQBg7CodeGenZQBi__T10parseFlagsTAxaZQrMFNaNeQmZv@Base 12 ++ _D3std5regex8internal6parser__T6ParserTAyaTSQBqQBpQBmQBg7CodeGenZQBi__T6__ctorTAxaZQmMFNcNeQCaQpZSQDsQDrQDoQDi__TQDeTQDaTQDaZQDq@Base 12 ++ _D3std5regex8internal6parser__T8optimizeTaZQmFKSQBuQBtQBq2ir__T5RegexTaZQjZv@Base 12 ++ _D3std5regex8internal6parser__T9makeRegexTAyaTSQBtQBsQBpQBj7CodeGenZQBlFNfSQCvQCuQCrQCl__T6ParserTQCeTQCeZQqZSQEeQEdQEa2ir__T5RegexTaZQj@Base 12 ++ _D3std5regex8internal6tests211__moduleRefZ@Base 12 ++ _D3std5regex8internal6tests212__ModuleInfoZ@Base 12 ++ _D3std5regex8internal8thompson11__moduleRefZ@Base 12 ++ _D3std5regex8internal8thompson12__ModuleInfoZ@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp10insertBackMFNaNbNiNfPSQCuQCtQCqQCk__T6ThreadTmZQkZv@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp11ThreadRange5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp11ThreadRange5frontMFNaNbNdNiNfZPxSQDfQDeQDbQCv__T6ThreadTmZQk@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp11ThreadRange6__ctorMFNaNbNcNiNfSQDdQDcQCzQCt__TQCnTmZQCtZSQEdQEcQDzQDt__TQDnTmZQDtQDf@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp11ThreadRange6__initZ@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp11ThreadRange8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp11insertFrontMFNaNbNiNfPSQCvQCuQCrQCl__T6ThreadTmZQkZv@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp5fetchMFNaNbNiNfZPSQCpQCoQClQCf__T6ThreadTmZQk@Base 12 ++ _D3std5regex8internal8thompson__T10ThreadListTmZQp6__initZ@Base 12 ++ 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_D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh5State__T8popStateTCQFjQFiQFfQEz__TQEtTaTQEfZQFdZQBoMFNaNbNiNeQBrZb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh5atEndMFNaNdNeZb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh5dupToMFNeCQFaQEzQEwQDa__T7MatcherTaZQlAvZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh5matchMFNaNeASQFdQFcQEzQDd__T5GroupTmZQjZi@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh5rearmMFNeIAaZCQFeQFdQFaQDe__T7MatcherTaZQl@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh6__ctorMFNaNbNeCQFfQFeQFbQEv__TQEpTaTQCuZQEzmmkQElZCQGpQGoQGlQGf__TQFzTaTQFlZQGj@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh6__ctorMFNaNbNeCQFfQFeQFbQEv__TQEpTaTQEbZQEzmmkQElZQBk@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh6__initZ@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh6__vtblZ@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh6finishMFNaNbNiNePxSQFjQFiQFfQEz__T6ThreadTmZQkASQGmQGlQGiQEm__T5GroupTmZQjiZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh7__ClassZ@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh7atStartMFNaNbNdNiNeZb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh7patternMFNcNdNfZxSQFiQFhQFeQDi__T5RegexTaZQj@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh7recycleMFNaNbNiNeKSQFjQFiQFfQEz__T10ThreadListTmZQpZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh7recycleMFNaNbNiNePSQFjQFiQFfQEz__T6ThreadTmZQkZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh8allocateMFNaNbNiNeZPSQFlQFkQFhQFb__T6ThreadTmZQk@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh8refCountMFNcNdNfZm@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh__T10bwdMatcherZQnMFNaNemmkmZCQFtQFsQFpQFj__TQFdTaTQDiZQFn@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh__T10fwdMatcherZQnMFNaNbNemmkmZCQFvQFuQFrQFl__TQFfTaTQErZQFp@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh__T4evalVbi0ZQkMFNaNePSQFmQFlQFiQFc__TQEwTaTQEiZQFg5StateZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh__T4evalVbi1ZQkMFNaNePSQFmQFlQFiQFc__TQEwTaTQEiZQFg5StateZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T14BackLooperImplTSQDhQDgQDdQBh__T5InputTaZQjZQBtZQDh__T9matchImplVbi0ZQpMFNaNeASQFrQFqQFnQDr__T5GroupTmZQjZi@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw11createStartMFNaNbNiNemkZPSQEgQEfQEcQDw__T6ThreadTmZQk@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw12matchOneShotMFNaNeASQEaQDzQDwQCa__T5GroupTmZQjkZi@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw13getThreadSizeFNaNbNiNeKxSQEfQEeQEbQCf__T5RegexTaZQjZm@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw13initialMemoryFNaNbNiNeKxSQEfQEeQEbQCf__T5RegexTaZQjZm@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw15prepareFreeListMFNaNbNiNemKAvZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw18initExternalMemoryMFNaNeAvZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw4forkMFNaNbNiNePSQDvQDuQDrQDl__T6ThreadTmZQkkkZQBg@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw4nextMFNaNeZb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw5State11__xopEqualsMxFKxSQEdQEcQDzQDt__TQDnTaTQCzZQDxQCbZb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw5State6__initZ@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw5State9__xtoHashFNbNeKxSQEcQEbQDyQDs__TQDmTaTQCyZQDwQCaZm@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw5State__T8popStateTCQDyQDxQDuQDo__TQDiTaTQCuZQDsZQBoMFNaNbNiNeQBrZb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw5atEndMFNaNbNdNiNeZb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw5dupToMFNeCQDpQDoQDlQBp__T7MatcherTaZQlAvZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw5matchMFNaNeASQDsQDrQDoQBs__T5GroupTmZQjZi@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw5rearmMFNeIAaZCQDtQDsQDpQBt__T7MatcherTaZQl@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw6__ctorMFNaNbNeCQDuQDtQDqQDk__TQDeTaTQCqZQDommkQDaZQBk@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw6__ctorMFNaNbNeCQDuQDtQDqQDk__TQDeTaTSQEqQEpQEmQCq__T14BackLooperImplTQDxZQvZQEymmkQEkZCQGoQGnQGkQGe__TQFyTaTQFkZQGi@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw6__initZ@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw6__vtblZ@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw6finishMFNaNbNiNePxSQDyQDxQDuQDo__T6ThreadTmZQkASQFbQFaQExQDb__T5GroupTmZQjiZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw6searchMFNaNeZb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw7__ClassZ@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw7atStartMFNaNbNdNiNeZb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw7patternMFNcNdNfZxSQDxQDwQDtQBx__T5RegexTaZQj@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw7recycleMFNaNbNiNeKSQDyQDxQDuQDo__T10ThreadListTmZQpZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw7recycleMFNaNbNiNePSQDyQDxQDuQDo__T6ThreadTmZQkZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw8allocateMFNaNbNiNeZPSQEaQDzQDwQDq__T6ThreadTmZQk@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw8refCountMFNcNdNfZm@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw__T10bwdMatcherZQnMFNaNemmkmZCQEiQEhQEeQDy__TQDsTaTSQFeQFdQFaQDe__T14BackLooperImplTQElZQvZQFm@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw__T10fwdMatcherZQnMFNaNbNemmkmZCQEkQEjQEgQEa__TQDuTaTQDgZQEe@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw__T4evalVbi0ZQkMFNaNePSQEbQEaQDxQDr__TQDlTaTQCxZQDv5StateZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw__T4evalVbi1ZQkMFNaNePSQEbQEaQDxQDr__TQDlTaTQCxZQDv5StateZv@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw__T6__ctorZQiMFNaNeKxSQEaQDzQDwQCa__T5RegexTaZQjQDbAvZCQFhQFgQFdQEx__TQErTaTQEdZQFb@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw__T9matchImplVbi0ZQpMFNaNeASQEgQEfQEcQCg__T5GroupTmZQjZi@Base 12 ++ _D3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBw__T9matchImplVbi1ZQpMFNaNeASQEgQEfQEcQCg__T5GroupTmZQjZi@Base 12 ++ _D3std5regex8internal8thompson__T6ThreadTmZQk6__initZ@Base 12 ++ _D3std5regex8internal9generator11__moduleRefZ@Base 12 ++ _D3std5regex8internal9generator12__ModuleInfoZ@Base 12 ++ _D3std5regex8internal9kickstart11__moduleRefZ@Base 12 ++ _D3std5regex8internal9kickstart12__ModuleInfoZ@Base 12 ++ _D3std5regex8internal9kickstart__T13effectiveSizeTaZQsFNaNbNiNfZk@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread10setInvMaskMFNaNbNiNfkkZv@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread11__xopEqualsMxFKxSQCzQCyQCvQCp__TQCiTaZQCoQCeZb@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread3addMFNaNfwZv@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread4fullMFNaNbNdNiNfZb@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread6__ctorMFNaNbNcNiNfkkAkZSQDfQDeQDbQCv__TQCoTaZQCuQCk@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread6__initZ@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread7advanceMFNaNbNiNfkZv@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread7setMaskMFNaNbNiNfkkZv@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread9__xtoHashFNbNeKxSQCyQCxQCuQCo__TQChTaZQCnQCdZm@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11ShiftThread__T3setS_DQCqQCpQCmQCg__TQBzTaZQCfQBv10setInvMaskMFNaNbNiNfkkZvZQCjMFNaNfwZv@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl11__xopEqualsMxFKxSQCmQClQCiQCc__TQBvTaZQCbZb@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl4forkFNaNbNiNfSQCiQChQCeQBy__TQBrTaZQBx11ShiftThreadkkZQBp@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl5fetchFNbNeKASQChQCgQCdQBx__TQBqTaZQBw11ShiftThreadZQBn@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl6__ctorMFNcNeKSQCiQChQCe2ir__T5RegexTaZQjAkZ10codeBoundsyAi@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl6__ctorMFNcNeKSQCiQChQCe2ir__T5RegexTaZQjAkZSQDmQDlQDiQDc__TQCvTaZQDb@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl6__initZ@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl6lengthMxFNaNbNdNiNfZk@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl6searchMxFNaNeAxamZm@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl7charLenFNaNbNiNfkZk@Base 12 ++ _D3std5regex8internal9kickstart__T7ShiftOrTaZQl9__xtoHashFNbNeKxSQClQCkQChQCb__TQBuTaZQCaZm@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq10__aggrDtorMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq10__postblitMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq11__fieldDtorMFNaNbNiNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq14__aggrPostblitMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq15__fieldPostblitMFNaNbNiNlNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq3hitMFNaNbNdNiNeZQw@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq3preMFNaNbNdNiNeZQw@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq4postMFNaNbNdNiNeZQx@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq4saveMFNbNeZSQBsQBr__TQBoTQBfZQBw@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq5emptyMxFNaNbNdNiNeZb@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq5frontMNgFNaNbNdNiNeZNgSQCdQCc__T8CapturesTQBwZQo@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq6__dtorMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq6__initZ@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq8capturesMNgFNaNbNdNiNeZNgSQCgQCf__T8CapturesTQBzZQo@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq8opAssignMFNcNjNeSQBxQBw__TQBtTQBkZQCbZQw@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq8popFrontMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq9__xtoHashFNbNeKxSQBxQBw__TQBtTQBkZQCbZm@Base 12 ++ _D3std5regex__T10RegexMatchTAaZQq__T6__ctorTSQBrQBq8internal2ir__T5RegexTaZQjZQBqMFNcNeQChQBuZSQDpQDo__TQDlTQDcZQDt@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr10__aggrDtorMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr10__postblitMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr11__fieldDtorMFNaNbNiNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr14__aggrPostblitMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr15__fieldPostblitMFNaNbNiNlNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr3hitMFNaNbNdNiNeZQx@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr3preMFNaNbNdNiNeZQx@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr4postMFNaNbNdNiNeZQy@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr4saveMFNbNeZSQBtQBs__TQBpTQBgZQBx@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr5emptyMxFNaNbNdNiNeZb@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr5frontMNgFNaNbNdNiNeZNgSQCeQCd__T8CapturesTQBxZQo@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr6__dtorMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr6__initZ@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr8capturesMNgFNaNbNdNiNeZNgSQChQCg__T8CapturesTQCaZQo@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr8opAssignMFNcNjNeSQByQBx__TQBuTQBlZQCcZQw@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr8popFrontMFNeZv@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr9__xtoHashFNbNeKxSQByQBx__TQBuTQBlZQCcZm@Base 12 ++ _D3std5regex__T10RegexMatchTAxaZQr__T6__ctorTSQBsQBr8internal2ir__T5RegexTaZQjZQBqMFNcNeQCiQBuZSQDqQDp__TQDmTQDdZQDu@Base 12 ++ _D3std5regex__T5matchTAaTSQyQw8internal2ir__T5RegexTaZQjZQBqFNfQBpQBpZSQCrQCq__T10RegexMatchTQCtZQr@Base 12 ++ _D3std5regex__T5matchTAxaTSQzQx8internal2ir__T5RegexTaZQjZQBrFNfQBqQBpZSQCsQCr__T10RegexMatchTQCuZQr@Base 12 ++ _D3std5regex__T8CapturesTAaZQn11__fieldDtorMFNaNbNiNeZv@Base 12 ++ _D3std5regex__T8CapturesTAaZQn12whichPatternMxFNaNbNdNiNfZi@Base 12 ++ _D3std5regex__T8CapturesTAaZQn15__fieldPostblitMFNaNbNiNlNeZv@Base 12 ++ _D3std5regex__T8CapturesTAaZQn3hitMFNaNbNdNiNeZQw@Base 12 ++ _D3std5regex__T8CapturesTAaZQn3preMFNaNbNdNiNeZQw@Base 12 ++ _D3std5regex__T8CapturesTAaZQn4backMFNaNbNdNiNeZQx@Base 12 ++ _D3std5regex__T8CapturesTAaZQn4postMFNaNbNdNiNeZQx@Base 12 ++ _D3std5regex__T8CapturesTAaZQn5emptyMxFNaNbNdNiNeZb@Base 12 ++ _D3std5regex__T8CapturesTAaZQn5frontMFNaNbNdNiNeZQy@Base 12 ++ _D3std5regex__T8CapturesTAaZQn6__ctorMFNaNbNcNiNeQykAxSQCbQCa8internal2ir10NamedGroupZSQDhQDg__TQDdTQCxZQDl@Base 12 ++ _D3std5regex__T8CapturesTAaZQn6__ctorMFNcNeKSQBrQBq__T10RegexMatchTQBqZQrZSQCvQCu__TQCrTQClZQCz@Base 12 ++ _D3std5regex__T8CapturesTAaZQn6__initZ@Base 12 ++ _D3std5regex__T8CapturesTAaZQn6lengthMxFNaNbNdNiNeZm@Base 12 ++ _D3std5regex__T8CapturesTAaZQn7popBackMFNaNbNiNeZv@Base 12 ++ _D3std5regex__T8CapturesTAaZQn8capturesMFNaNbNcNdNiNeZSQCbQCa__TQBxTQBrZQCf@Base 12 ++ _D3std5regex__T8CapturesTAaZQn8getMatchMNgFNaNbNiNemZNgAa@Base 12 ++ _D3std5regex__T8CapturesTAaZQn8opAssignMFNaNbNcNiNjNeSQCaQBz__TQBwTQBqZQCeZQw@Base 12 ++ _D3std5regex__T8CapturesTAaZQn8popFrontMFNaNbNiNeZv@Base 12 ++ _D3std5regex__T8CapturesTAaZQn9__xtoHashFNbNeKxSQBuQBt__TQBqTQBkZQByZm@Base 12 ++ _D3std5regex__T8CapturesTAaZQn__T7opIndexZQjMNgFNaNbNemZNgAa@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo11__fieldDtorMFNaNbNiNeZv@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo12whichPatternMxFNaNbNdNiNfZi@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo15__fieldPostblitMFNaNbNiNlNeZv@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo3hitMFNaNbNdNiNeZQx@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo3preMFNaNbNdNiNeZQx@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo4backMFNaNbNdNiNeZQy@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo4postMFNaNbNdNiNeZQy@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo5emptyMxFNaNbNdNiNeZb@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo5frontMFNaNbNdNiNeZQz@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo6__ctorMFNaNbNcNiNeQzkAxSQCcQCb8internal2ir10NamedGroupZSQDiQDh__TQDeTQCyZQDm@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo6__ctorMFNcNeKSQBsQBr__T10RegexMatchTQBrZQrZSQCwQCv__TQCsTQCmZQDa@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo6__initZ@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo6lengthMxFNaNbNdNiNeZm@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo7popBackMFNaNbNiNeZv@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo8capturesMFNaNbNcNdNiNeZSQCcQCb__TQByTQBsZQCg@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo8getMatchMNgFNaNbNiNemZNgANgxa@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo8opAssignMFNaNbNcNiNjNeSQCbQCa__TQBxTQBrZQCfZQw@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo8popFrontMFNaNbNiNeZv@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo9__xtoHashFNbNeKxSQBvQBu__TQBrTQBlZQBzZm@Base 12 ++ _D3std5regex__T8CapturesTAxaZQo__T7opIndexZQjMNgFNaNbNemZNgANgxa@Base 12 ++ _D3std5regex__T9regexImplTAyaZQpFNfxAyaAxaZSQBqQBp8internal2ir__T5RegexTaZQj@Base 12 ++ _D3std5regex__TQjHTAyaTyaZQuFNexAAyaAxaZSQBnQBm8internal2ir__T5RegexTaZQj@Base 12 ++ _D3std5regex__TQjTAyaZQqFNeQjAxaZSQBgQBf8internal2ir__T5RegexTaZQj@Base 12 ++ _D3std5stdio10ChunksImpl11__fieldDtorMFNeZv@Base 12 ++ _D3std5stdio10ChunksImpl11__xopEqualsMxFKxSQBpQBoQBlZb@Base 12 ++ _D3std5stdio10ChunksImpl15__fieldPostblitMFNbNlNeZv@Base 12 ++ _D3std5stdio10ChunksImpl6__ctorMFNcSQBiQBh4FilemZSQBwQBvQBs@Base 12 ++ _D3std5stdio10ChunksImpl6__initZ@Base 12 ++ _D3std5stdio10ChunksImpl8opAssignMFNcNjNeSQBoQBnQBkZQl@Base 12 ++ _D3std5stdio10ChunksImpl9__xtoHashFNbNeKxSQBoQBnQBkZm@Base 12 ++ _D3std5stdio10readlnImplFPOS4core4stdcQBg8_IO_FILEKAawEQCbQCa4File11OrientationZ1nm@Base 12 ++ _D3std5stdio10readlnImplFPOS4core4stdcQBg8_IO_FILEKAawEQCbQCa4File11OrientationZ7lineptrPa@Base 12 ++ _D3std5stdio10readlnImplFPOS4core4stdcQBg8_IO_FILEKAawEQCbQCa4File11OrientationZm@Base 12 ++ _D3std5stdio11__moduleRefZ@Base 12 ++ _D3std5stdio11openNetworkFAyatZSQBeQBd4File@Base 12 ++ _D3std5stdio12__ModuleInfoZ@Base 12 ++ _D3std5stdio13StdFileHandle6__initZ@Base 12 ++ _D3std5stdio13trustedStdoutFNdNeZSQBgQBf4File@Base 12 ++ _D3std5stdio14ReadlnAppender10initializeMFAaZv@Base 12 ++ _D3std5stdio14ReadlnAppender11__xopEqualsMxFKxSQBtQBsQBpZb@Base 12 ++ _D3std5stdio14ReadlnAppender24reserveWithoutAllocatingMFmZb@Base 12 ++ _D3std5stdio14ReadlnAppender4dataMFNdNeZAa@Base 12 ++ _D3std5stdio14ReadlnAppender6__initZ@Base 12 ++ _D3std5stdio14ReadlnAppender7putcharMFNeaZv@Base 12 ++ _D3std5stdio14ReadlnAppender7putonlyMFNeAaZv@Base 12 ++ _D3std5stdio14ReadlnAppender7reserveMFNemZv@Base 12 ++ _D3std5stdio14ReadlnAppender8putdcharMFNewZv@Base 12 ++ _D3std5stdio14ReadlnAppender9__xtoHashFNbNeKxSQBsQBrQBoZm@Base 12 ++ _D3std5stdio14StdioException6__ctorMFNeAyakZCQBrQBqQBn@Base 12 ++ _D3std5stdio14StdioException6__initZ@Base 12 ++ _D3std5stdio14StdioException6__vtblZ@Base 12 ++ _D3std5stdio14StdioException6opCallFAyaZv@Base 12 ++ _D3std5stdio14StdioException6opCallFZv@Base 12 ++ _D3std5stdio14StdioException7__ClassZ@Base 12 ++ _D3std5stdio17LockingTextReader10__aggrDtorMFZv@Base 12 ++ _D3std5stdio17LockingTextReader10__postblitMFZv@Base 12 ++ _D3std5stdio17LockingTextReader11__fieldDtorMFNeZv@Base 12 ++ _D3std5stdio17LockingTextReader11__xopEqualsMxFKxSQBwQBvQBsZb@Base 12 ++ _D3std5stdio17LockingTextReader14__aggrPostblitMFZv@Base 12 ++ _D3std5stdio17LockingTextReader15__fieldPostblitMFNbNlNeZv@Base 12 ++ _D3std5stdio17LockingTextReader5emptyMFNdZb@Base 12 ++ _D3std5stdio17LockingTextReader5frontMFNdZa@Base 12 ++ _D3std5stdio17LockingTextReader6__ctorMFNcSQBpQBo4FileZSQCcQCbQBy@Base 12 ++ _D3std5stdio17LockingTextReader6__dtorMFZv@Base 12 ++ _D3std5stdio17LockingTextReader6__initZ@Base 12 ++ _D3std5stdio17LockingTextReader8opAssignMFSQBpQBoQBlZv@Base 12 ++ _D3std5stdio17LockingTextReader8popFrontMFZv@Base 12 ++ _D3std5stdio17LockingTextReader9__xtoHashFNbNeKxSQBvQBuQBrZm@Base 12 ++ _D3std5stdio4File10__postblitMFNbNfZv@Base 12 ++ _D3std5stdio4File11ByChunkImpl11__fieldDtorMFNeZv@Base 12 ++ _D3std5stdio4File11ByChunkImpl11__xopEqualsMxFKxSQBvQBuQBrQBpZb@Base 12 ++ _D3std5stdio4File11ByChunkImpl15__fieldPostblitMFNbNlNeZv@Base 12 ++ _D3std5stdio4File11ByChunkImpl5emptyMxFNbNdZb@Base 12 ++ _D3std5stdio4File11ByChunkImpl5frontMFNbNdZAh@Base 12 ++ _D3std5stdio4File11ByChunkImpl5primeMFZv@Base 12 ++ _D3std5stdio4File11ByChunkImpl6__ctorMFNcSQBoQBnQBkAhZSQCbQCaQBxQBv@Base 12 ++ _D3std5stdio4File11ByChunkImpl6__ctorMFNcSQBoQBnQBkmZSQCaQBzQBwQBu@Base 12 ++ _D3std5stdio4File11ByChunkImpl6__initZ@Base 12 ++ _D3std5stdio4File11ByChunkImpl8opAssignMFNcNjNeSQBuQBtQBqQBoZQo@Base 12 ++ _D3std5stdio4File11ByChunkImpl8popFrontMFZv@Base 12 ++ _D3std5stdio4File11ByChunkImpl9__xtoHashFNbNeKxSQBuQBtQBqQBoZm@Base 12 ++ _D3std5stdio4File11__xopEqualsMxFKxSQBiQBhQBeZb@Base 12 ++ _D3std5stdio4File12closeHandlesMFNeZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter10__aggrDtorMFNeZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter10__postblitMFNeZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter11__fieldDtorMFNeZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter11__xopEqualsMxFKxSQCbQCaQBxQBvZb@Base 12 ++ _D3std5stdio4File17LockingTextWriter14__aggrPostblitMFNeZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter15__fieldPostblitMFNbNlNeZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter26highSurrogateShouldBeEmptyMFNfZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter6__ctorMFNcNeKSQBxQBwQBtZSQCiQChQCeQCc@Base 12 ++ _D3std5stdio4File17LockingTextWriter6__dtorMFNeZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter6__initZ@Base 12 ++ _D3std5stdio4File17LockingTextWriter7handle_MFNdNeZPS4core4stdcQCf8_IO_FILE@Base 12 ++ _D3std5stdio4File17LockingTextWriter8opAssignMFNcNjNeSQCaQBzQBwQBuZQo@Base 12 ++ _D3std5stdio4File17LockingTextWriter9__xtoHashFNbNeKxSQCaQBzQBwQBuZm@Base 12 ++ _D3std5stdio4File17LockingTextWriter__T3putTAaZQiMFNfMQkZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter__T3putTAwZQiMFNfMQkZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter__T3putTAxaZQjMFNfMQlZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter__T3putTAyaZQjMFNfMQlZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter__T3putTaZQhMFNfaZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter__T3putTwZQhMFNfwZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter__T3putTxaZQiMFNfxaZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter__T3putTxwZQiMFNfxwZv@Base 12 ++ _D3std5stdio4File17LockingTextWriter__T3putTyaZQiMFNfyaZv@Base 12 ++ _D3std5stdio4File17lockingTextWriterMFNfZSQBoQBnQBk17LockingTextWriter@Base 12 ++ _D3std5stdio4File19lockingBinaryWriterMFZSQBoQBnQBk__T16BinaryWriterImplVbi1ZQx@Base 12 ++ _D3std5stdio4File3eofMxFNaNdNeZb@Base 12 ++ _D3std5stdio4File4Impl6__initZ@Base 12 ++ _D3std5stdio4File4lockMFEQxQv8LockTypemmZv@Base 12 ++ _D3std5stdio4File4nameMxFNaNbNdNjNfZAya@Base 12 ++ _D3std5stdio4File4openMFNeAyaMAxaZv@Base 12 ++ _D3std5stdio4File4seekMFNeliZv@Base 12 ++ _D3std5stdio4File4sizeMFNdNfZm@Base 12 ++ _D3std5stdio4File4syncMFNeZv@Base 12 ++ _D3std5stdio4File4tellMxFNdNeZm@Base 12 ++ _D3std5stdio4File5closeMFNeZv@Base 12 ++ _D3std5stdio4File5errorMxFNaNbNdNeZb@Base 12 ++ _D3std5stdio4File5flushMFNeZv@Base 12 ++ _D3std5stdio4File5getFPMFNaNfZPOS4core4stdcQBl8_IO_FILE@Base 12 ++ _D3std5stdio4File5popenMFNfAyaMAxaZv@Base 12 ++ _D3std5stdio4File6__ctorMFNcNePOS4core4stdcQBl8_IO_FILEAyakbZSQCiQChQCe@Base 12 ++ _D3std5stdio4File6__ctorMFNcNfAyaMAxaZSQBlQBkQBh@Base 12 ++ _D3std5stdio4File6__dtorMFNfZv@Base 12 ++ _D3std5stdio4File6__initZ@Base 12 ++ _D3std5stdio4File6detachMFNeZv@Base 12 ++ _D3std5stdio4File6fdopenMFNeiMAxaAyaZv@Base 12 ++ _D3std5stdio4File6fdopenMFNfiMAxaZv@Base 12 ++ _D3std5stdio4File6filenoMxFNdNeZi@Base 12 ++ _D3std5stdio4File6isOpenMxFNaNbNdNfZb@Base 12 ++ _D3std5stdio4File6reopenMFNeAyaMAxaZv@Base 12 ++ _D3std5stdio4File6rewindMFNfZv@Base 12 ++ _D3std5stdio4File6unlockMFmmZv@Base 12 ++ _D3std5stdio4File7byChunkMFAhZSQBdQBcQz11ByChunkImpl@Base 12 ++ _D3std5stdio4File7byChunkMFmZSQBcQBbQy11ByChunkImpl@Base 12 ++ _D3std5stdio4File7setvbufMFNeAviZv@Base 12 ++ _D3std5stdio4File7setvbufMFNemiZv@Base 12 ++ _D3std5stdio4File7tmpfileFNfZSQBcQBbQy@Base 12 ++ _D3std5stdio4File7tryLockMFEQBaQz8LockTypemmZb@Base 12 ++ _D3std5stdio4File8clearerrMFNaNbNfZv@Base 12 ++ _D3std5stdio4File8initImplMFPOS4core4stdcQBj8_IO_FILEAyakbZv@Base 12 ++ _D3std5stdio4File8lockImplMFismmZi@Base 12 ++ _D3std5stdio4File8opAssignMFNcNjNfSQBhQBgQBdZQl@Base 12 ++ _D3std5stdio4File8wrapFileFNfPOS4core4stdcQBk8_IO_FILEZSQCcQCbQBy@Base 12 ++ _D3std5stdio4File9__xtoHashFNbNeKxSQBhQBgQBdZm@Base 12 ++ _D3std5stdio4File9resetFileMFNeAyaMAxabZv@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx10__aggrDtorMFZv@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx10__postblitMFNbNiZv@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx11__fieldDtorMFNeZv@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx11__xopEqualsMxFKxSQCkQCjQCg__TQCeVbi1ZQCmZb@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx14__aggrPostblitMFNbZv@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx15__fieldPostblitMFNbNlNeZv@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx6__ctorMFNcMKSQCfQCeQCbZSQCqQCpQCm__TQCkVbi1ZQCs@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx6__dtorMFNbNiZv@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx6__initZ@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx8opAssignMFNcNjSQChQCgQCd__TQCbVbi1ZQCjZQz@Base 12 ++ _D3std5stdio4File__T16BinaryWriterImplVbi1ZQx9__xtoHashFNbNeKxSQCjQCiQCf__TQCdVbi1ZQClZm@Base 12 ++ _D3std5stdio4File__T6readlnTAyaZQmMFwZQk@Base 12 ++ _D3std5stdio4File__T6readlnTaZQkMFKAawZm@Base 12 ++ _D3std5stdio4File__T7rawReadTaZQlMFNfAaZQd@Base 12 ++ _D3std5stdio4File__T7rawReadTbZQlMFNfAbZQd@Base 12 ++ _D3std5stdio4File__T7rawReadThZQlMFNfAhZQd@Base 12 ++ _D3std5stdio4File__T7rawReadTiZQlMFNfAiZQd@Base 12 ++ _D3std5stdio4File__T7rawReadTlZQlMFNfAlZQd@Base 12 ++ _D3std5stdio4File__T8writeflnTaTAyaTmTQgTQjTxlZQBbMFNfIAaQzmQBcQBfxlZv@Base 12 ++ _D3std5stdio4File__T8writeflnTaTAyaTmTQgTQjTxmZQBbMFNfIAaQzmQBcQBfxmZv@Base 12 ++ _D3std5stdio4File__T8writeflnTaTAyaTmTQgTxmZQyMFNfIAaQvmQyxmZv@Base 12 ++ _D3std5stdio4File__T8writeflnTaTAyaTxmTQhTQkTmZQBbMFNfIAaQzxmQBdQBgmZv@Base 12 ++ _D3std5stdio4File__T8writeflnTaTAyaTxmTQhTxmZQzMFNfIAaQwxmQBaxmZv@Base 12 ++ _D3std5stdio5lines11__fieldDtorMFNeZv@Base 12 ++ _D3std5stdio5lines11__xopEqualsMxFKxSQBjQBiQBfZb@Base 12 ++ _D3std5stdio5lines15__fieldPostblitMFNbNlNeZv@Base 12 ++ _D3std5stdio5lines6__ctorMFNcSQBcQBb4FilewZSQBqQBpQBm@Base 12 ++ _D3std5stdio5lines6__initZ@Base 12 ++ _D3std5stdio5lines8opAssignMFNcNjNeSQBiQBhQBeZQl@Base 12 ++ _D3std5stdio5lines9__xtoHashFNbNeKxSQBiQBhQBeZm@Base 12 ++ _D3std5stdio6chunksFSQtQr4FilemZSQBfQBe10ChunksImpl@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea21_636f72652e737464632e737464696f2e737464696eZQDeFNbNcNdNiZSQEfQEe4File@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea21_636f72652e737464632e737464696f2e737464696eZQDeFNcNdZ4implSQEgQEf4File4Impl@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea21_636f72652e737464632e737464696f2e737464696eZQDeFNcNdZ6resultSQEiQEh4File@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea21_636f72652e737464632e737464696f2e737464696eZQDeFNcNdZ8spinlockOk@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea22_636f72652e737464632e737464696f2e737464657272ZQDgFNbNcNdNiZSQEhQEg4File@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea22_636f72652e737464632e737464696f2e737464657272ZQDgFNcNdZ4implSQEiQEh4File4Impl@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea22_636f72652e737464632e737464696f2e737464657272ZQDgFNcNdZ6resultSQEkQEj4File@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea22_636f72652e737464632e737464696f2e737464657272ZQDgFNcNdZ8spinlockOk@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea22_636f72652e737464632e737464696f2e7374646f7574ZQDgFNbNcNdNiZSQEhQEg4File@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea22_636f72652e737464632e737464696f2e7374646f7574ZQDgFNcNdZ4implSQEiQEh4File4Impl@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea22_636f72652e737464632e737464696f2e7374646f7574ZQDgFNcNdZ6resultSQEkQEj4File@Base 12 ++ _D3std5stdio__T10makeGlobalVEQBbQBa13StdFileHandlea22_636f72652e737464632e737464696f2e7374646f7574ZQDgFNcNdZ8spinlockOk@Base 12 ++ _D3std5stdio__T12trustedFreadTaZQrFNbNiNePOS4core4stdcQBw8_IO_FILEAaZm@Base 12 ++ _D3std5stdio__T12trustedFreadTbZQrFNbNiNePOS4core4stdcQBw8_IO_FILEAbZm@Base 12 ++ _D3std5stdio__T12trustedFreadThZQrFNbNiNePOS4core4stdcQBw8_IO_FILEAhZm@Base 12 ++ _D3std5stdio__T12trustedFreadTiZQrFNbNiNePOS4core4stdcQBw8_IO_FILEAiZm@Base 12 ++ _D3std5stdio__T12trustedFreadTlZQrFNbNiNePOS4core4stdcQBw8_IO_FILEAlZm@Base 12 ++ _D3std5stdio__T13trustedFwriteTaZQsFNbNiNePOS4core4stdcQBx8_IO_FILExAaZm@Base 12 ++ _D3std5stdio__T6_fopenTAyaTAxaZQqFNbNiNfQrQpZPOS4core4stdcQCa8_IO_FILE@Base 12 ++ _D3std5stdio__T6_fopenTAyaTAxaZQqFQlQjZ10_fopenImplFNbNiNeMPxaMQeZPOS4core4stdcQCv8_IO_FILE@Base 12 ++ _D3std5stdio__T6_popenTAyaTAxaZQqFNbNiNeQrQpZ9popenImplFNbNiNePxaQdZPOS4core4stdcQCx8_IO_FILE@Base 12 ++ _D3std5stdio__T6_popenTAyaTAxaZQqFNbNiNeQrQpZPOS4core4stdcQCa8_IO_FILE@Base 12 ++ _D3std6base6411__moduleRefZ@Base 12 ++ _D3std6base6412__ModuleInfoZ@Base 12 ++ _D3std6base6415Base64Exception6__ctorMFNaNbNfAyaQdmZCQBzQByQBu@Base 12 ++ _D3std6base6415Base64Exception6__initZ@Base 12 ++ _D3std6base6415Base64Exception6__vtblZ@Base 12 ++ _D3std6base6415Base64Exception7__ClassZ@Base 12 ++ _D3std6base64__T10Base64ImplVai43Vai47Vai61Z12decodeLengthFNaNbNfImZm@Base 12 ++ _D3std6base64__T10Base64ImplVai43Vai47Vai61Z12encodeLengthFNaNbNiNfImZm@Base 12 ++ _D3std6base64__T10Base64ImplVai43Vai47Vai61Z9DecodeMapyG256i@Base 12 ++ _D3std6base64__T10Base64ImplVai43Vai47Vai61Z9EncodeMapyAa@Base 12 ++ _D3std6base64__T10Base64ImplVai45Vai95Vai0Z12decodeLengthFNaNbNfImZm@Base 12 ++ _D3std6base64__T10Base64ImplVai45Vai95Vai0Z12encodeLengthFNaNbNiNfImZm@Base 12 ++ _D3std6base64__T10Base64ImplVai45Vai95Vai0Z9DecodeMapyG256i@Base 12 ++ _D3std6base64__T10Base64ImplVai45Vai95Vai0Z9EncodeMapyAa@Base 12 ++ _D3std6base64__T10Base64ImplVai45Vai95Vai61Z12decodeLengthFNaNbNfImZm@Base 12 ++ _D3std6base64__T10Base64ImplVai45Vai95Vai61Z12encodeLengthFNaNbNiNfImZm@Base 12 ++ _D3std6base64__T10Base64ImplVai45Vai95Vai61Z9DecodeMapyG256i@Base 12 ++ _D3std6base64__T10Base64ImplVai45Vai95Vai61Z9EncodeMapyAa@Base 12 ++ _D3std6bigint11__moduleRefZ@Base 12 ++ _D3std6bigint12__ModuleInfoZ@Base 12 ++ _D3std6bigint15toDecimalStringFNaNbNfxSQBlQBk6BigIntZAya@Base 12 ++ _D3std6bigint5toHexFNfxSQwQu6BigIntZAya@Base 12 ++ _D3std6bigint6BigInt10uintLengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std6bigint6BigInt11__xopEqualsMxFKxSQBlQBkQBgZb@Base 12 ++ _D3std6bigint6BigInt11ulongLengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std6bigint6BigInt14checkDivByZeroMxFNaNbNlNfZv@Base 12 ++ _D3std6bigint6BigInt5opCmpMxFNaNbNiNfKxSQBmQBlQBhZi@Base 12 ++ _D3std6bigint6BigInt5toIntMxFNaNbNiNfZi@Base 12 ++ _D3std6bigint6BigInt6__initZ@Base 12 ++ _D3std6bigint6BigInt6isZeroMxFNaNbNiNlNfZb@Base 12 ++ _D3std6bigint6BigInt6negateMFNaNbNiNlNfZv@Base 12 ++ _D3std6bigint6BigInt6toHashMxFNaNbNiNfZm@Base 12 ++ _D3std6bigint6BigInt6toLongMxFNaNbNiNfZl@Base 12 ++ _D3std6bigint6BigInt8toStringMxFMDFMAxaZvAyaZv@Base 12 ++ _D3std6bigint6BigInt8toStringMxFMDFMAxaZvMKxSQBr6format4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6bigint6BigInt__T10opOpAssignVAyaa1_25TSQBsQBrQBnZQBhMFNaNbNjNfQyZQBb@Base 12 ++ _D3std6bigint6BigInt__T10opOpAssignVAyaa1_2aTSQBsQBrQBnZQBhMFNaNbNjNfQyZQBb@Base 12 ++ _D3std6bigint6BigInt__T10opOpAssignVAyaa2_3e3eTiZQBaMFNaNbNjNfiZSQClQCkQCg@Base 12 ++ _D3std6bigint6BigInt__T5opCmpHTSQBeQBdQzZQsMxFNaNbNiNfxSQCcQCbQBxZi@Base 12 ++ _D3std6bigint6BigInt__T6__ctorTiZQkMFNaNbNcNfiZSQBuQBtQBp@Base 12 ++ _D3std6bigint6BigInt__T6opCastHTbZQlMxFNaNbNiNfZb@Base 12 ++ _D3std6bigint6BigInt__T8opAssignHTSQBhQBgQBcZQwMFNaNbNiNfQxZQBa@Base 12 ++ _D3std6bigint6BigInt__T8opAssignTiZQmMFNaNbNfiZSQBuQBtQBp@Base 12 ++ _D3std6bigint6BigInt__T8opBinaryVAyaa1_25TSQBpQBoQBkZQBeMxFNaNbNjNfQzZQBc@Base 12 ++ _D3std6bigint6BigInt__T8opBinaryVAyaa1_2aTSQBpQBoQBkZQBeMxFNaNbNjNfQzZQBc@Base 12 ++ _D3std6bigint6BigInt__T8opEqualsZQkMxFNaNbNiNfKxSQBvQBuQBqZb@Base 12 ++ _D3std6bigint6BigInt__T8toStringTDFMAxaZvZQtMxFMKQqAyaZv@Base 12 ++ _D3std6bigint6BigInt__T8toStringTDFMAxaZvZQtMxFMKQqMKxSQCb6format4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6bigint6BigInt__T8toStringTSQBg5array__T8AppenderTAyaZQoZQBoMxFNaNfMKQBqMKxSQDc6format4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6bigint6BigInt__T8toStringTSQBg5array__T8AppenderTAyaZQoZQBoMxFNaNfMKQBqQwZv@Base 12 ++ _D3std6bigint6divModFNaNbNfxSQBbQBa6BigIntxQpJSQBtQBsQsJQkZv@Base 12 ++ _D3std6bigint6powmodFNaNbNfSQBaQz6BigIntQnQpZQs@Base 12 ++ _D3std6bigint__T9absUnsignTiZQnFNaNbNiNfiZk@Base 12 ++ _D3std6digest10murmurhash11__moduleRefZ@Base 12 ++ _D3std6digest10murmurhash12__ModuleInfoZ@Base 12 ++ _D3std6digest11__moduleRefZ@Base 12 ++ _D3std6digest12__ModuleInfoZ@Base 12 ++ _D3std6digest2md11__moduleRefZ@Base 12 ++ _D3std6digest2md12__ModuleInfoZ@Base 12 ++ _D3std6digest2md3MD51FFNaNbNiNfkkkZk@Base 12 ++ _D3std6digest2md3MD51GFNaNbNiNfkkkZk@Base 12 ++ _D3std6digest2md3MD51HFNaNbNiNfkkkZk@Base 12 ++ _D3std6digest2md3MD51IFNaNbNiNfkkkZk@Base 12 ++ _D3std6digest2md3MD52FFFNaNbNiNfKkkkkkkkZv@Base 12 ++ _D3std6digest2md3MD52GGFNaNbNiNfKkkkkkkkZv@Base 12 ++ _D3std6digest2md3MD52HHFNaNbNiNfKkkkkkkkZv@Base 12 ++ _D3std6digest2md3MD52IIFNaNbNiNfKkkkkkkkZv@Base 12 ++ _D3std6digest2md3MD53putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest2md3MD55startMFNaNbNiNfZv@Base 12 ++ _D3std6digest2md3MD56__initZ@Base 12 ++ _D3std6digest2md3MD56finishMFNaNbNiNeZG16h@Base 12 ++ _D3std6digest2md3MD58_paddingyG64h@Base 12 ++ _D3std6digest2md3MD59transformMFNaNbNiPxG64hZv@Base 12 ++ _D3std6digest3crc11__moduleRefZ@Base 12 ++ _D3std6digest3crc12__ModuleInfoZ@Base 12 ++ _D3std6digest3crc__T3CRCVki32Vmi3988292384ZQx3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3crc__T3CRCVki32Vmi3988292384ZQx4peekMxFNaNbNiNfZG4h@Base 12 ++ _D3std6digest3crc__T3CRCVki32Vmi3988292384ZQx5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3crc__T3CRCVki32Vmi3988292384ZQx6__initZ@Base 12 ++ _D3std6digest3crc__T3CRCVki32Vmi3988292384ZQx6finishMFNaNbNiNfZG4h@Base 12 ++ _D3std6digest3crc__T3CRCVki32Vmi3988292384ZQx6tablesyG8G256k@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN2882303761517117440ZQBg3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN2882303761517117440ZQBg4peekMxFNaNbNiNfZG8h@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN2882303761517117440ZQBg5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN2882303761517117440ZQBg6__initZ@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN2882303761517117440ZQBg6finishMFNaNbNiNfZG8h@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN2882303761517117440ZQBg6tablesyG8G256m@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN3932672073523589310ZQBg3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN3932672073523589310ZQBg4peekMxFNaNbNiNfZG8h@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN3932672073523589310ZQBg5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN3932672073523589310ZQBg6__initZ@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN3932672073523589310ZQBg6finishMFNaNbNiNfZG8h@Base 12 ++ _D3std6digest3crc__T3CRCVki64VmN3932672073523589310ZQBg6tablesyG8G256m@Base 12 ++ _D3std6digest3crc__T9genTablesTkZQnFNaNbNiNfkZG8G256k@Base 12 ++ _D3std6digest3crc__T9genTablesTmZQnFNaNbNiNfmZG8G256m@Base 12 ++ _D3std6digest3sha11__moduleRefZ@Base 12 ++ _D3std6digest3sha12__ModuleInfoZ@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs12transformX86FNaNbNiPG5kPxG64hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs6T_0_15FNaNbNiiPxG64hKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs6__initZ@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs6finishMFNaNbNiNeZG28h@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs7T_16_19FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs7T_20_39FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs7T_40_59FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs7T_60_79FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs7paddingyG128h@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs9constantsyG80m@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs__T12T_SHA2_16_79TmZQrFNaNbNiNfiKG16mmmmKmmmmKmmZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki224ZQs__T13transformSHA2TmZQsFNaNbNiPG8mPxG128hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs12transformX86FNaNbNiPG5kPxG64hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs6T_0_15FNaNbNiiPxG64hKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs6__initZ@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs6finishMFNaNbNiNeZG32h@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs7T_16_19FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs7T_20_39FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs7T_40_59FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs7T_60_79FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs7paddingyG128h@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs9constantsyG80m@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs__T12T_SHA2_16_79TmZQrFNaNbNiNfiKG16mmmmKmmmmKmmZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki256ZQs__T13transformSHA2TmZQsFNaNbNiPG8mPxG128hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs12transformX86FNaNbNiPG5kPxG64hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs6T_0_15FNaNbNiiPxG64hKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs6__initZ@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs6finishMFNaNbNiNeZG48h@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs7T_16_19FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs7T_20_39FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs7T_40_59FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs7T_60_79FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs7paddingyG128h@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs9constantsyG80m@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs__T12T_SHA2_16_79TmZQrFNaNbNiNfiKG16mmmmKmmmmKmmZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki384ZQs__T13transformSHA2TmZQsFNaNbNiPG8mPxG128hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs12transformX86FNaNbNiPG5kPxG64hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs6T_0_15FNaNbNiiPxG64hKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs6__initZ@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs6finishMFNaNbNiNeZG64h@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs7T_16_19FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs7T_20_39FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs7T_40_59FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs7T_60_79FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs7paddingyG128h@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs9constantsyG80m@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs__T12T_SHA2_16_79TmZQrFNaNbNiNfiKG16mmmmKmmmmKmmZv@Base 12 ++ _D3std6digest3sha__T3SHAVki1024Vki512ZQs__T13transformSHA2TmZQsFNaNbNiPG8mPxG128hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr12transformX86FNaNbNiPG5kPxG64hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr6T_0_15FNaNbNiiPxG64hKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr6__initZ@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr6finishMFNaNbNiNeZG20h@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr7T_16_19FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr7T_20_39FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr7T_40_59FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr7T_60_79FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr7paddingyG128h@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki160ZQr9constantsyG64k@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr12transformX86FNaNbNiPG5kPxG64hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr6T_0_15FNaNbNiiPxG64hKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr6__initZ@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr6finishMFNaNbNiNeZG28h@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr7T_16_19FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr7T_20_39FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr7T_40_59FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr7T_60_79FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr7paddingyG128h@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr9constantsyG64k@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr__T12T_SHA2_16_79TkZQrFNaNbNiNfiKG16kkkkKkkkkKkkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki224ZQr__T13transformSHA2TkZQsFNaNbNiPG8kPxG64hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr12transformX86FNaNbNiPG5kPxG64hZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr3putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr5startMFNaNbNiNfZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr6T_0_15FNaNbNiiPxG64hKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr6__initZ@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr6finishMFNaNbNiNeZG32h@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr7T_16_19FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr7T_20_39FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr7T_40_59FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr7T_60_79FNaNbNiNfiKG16kkKkkkkKkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr7paddingyG128h@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr9constantsyG64k@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr__T12T_SHA2_16_79TkZQrFNaNbNiNfiKG16kkkkKkkkkKkkZv@Base 12 ++ _D3std6digest3sha__T3SHAVki512Vki256ZQr__T13transformSHA2TkZQsFNaNbNiPG8kPxG64hZv@Base 12 ++ _D3std6digest4hmac11__moduleRefZ@Base 12 ++ _D3std6digest4hmac12__ModuleInfoZ@Base 12 ++ _D3std6digest6Digest11__InterfaceZ@Base 12 ++ _D3std6digest6DigestQoMFNbNeMAxAvXAh@Base 12 ++ _D3std6digest6ripemd11__moduleRefZ@Base 12 ++ _D3std6digest6ripemd12__ModuleInfoZ@Base 12 ++ _D3std6digest6ripemd9RIPEMD1601FFNaNbNiNfkkkZk@Base 12 ++ _D3std6digest6ripemd9RIPEMD1601GFNaNbNiNfkkkZk@Base 12 ++ _D3std6digest6ripemd9RIPEMD1601HFNaNbNiNfkkkZk@Base 12 ++ _D3std6digest6ripemd9RIPEMD1601IFNaNbNiNfkkkZk@Base 12 ++ _D3std6digest6ripemd9RIPEMD1601JFNaNbNiNfkkkZk@Base 12 ++ _D3std6digest6ripemd9RIPEMD1602FFFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1602GGFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1602HHFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1602IIFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1602JJFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1603FFFFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1603GGGFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1603HHHFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1603IIIFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1603JJJFNaNbNiNfKkkKkkkkkZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1603putMFNaNbNiNeMAxhXv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1605startMFNaNbNiNfZv@Base 12 ++ _D3std6digest6ripemd9RIPEMD1606__initZ@Base 12 ++ _D3std6digest6ripemd9RIPEMD1606finishMFNaNbNiNeZG20h@Base 12 ++ _D3std6digest6ripemd9RIPEMD1608_paddingyG64h@Base 12 ++ _D3std6digest6ripemd9RIPEMD1609transformMFNaNbNiPxG64hZv@Base 12 ++ _D3std6digestQh11__moduleRefZ@Base 12 ++ _D3std6digestQh12__ModuleInfoZ@Base 12 ++ _D3std6digest__T11toHexStringVEQBdQBc5Orderi1VEQBt5ascii10LetterCasei0ZQCdFNaNbNfIAhZAya@Base 12 ++ _D3std6digest__T11toHexStringVEQBdQBc5Orderi1Vmi16VEQBy5ascii10LetterCasei0ZQCiFNaNbNiNfxG16hZG32a@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf3putMFNbNeMAxhXv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf5resetMFNbNeZv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf6__ctorMFNaNbNiNfZCQCpQCo__TQCkTQByZQCs@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf6__initZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf6__vtblZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf6finishMFNbAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf6finishMFNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf6lengthMxFNaNbNdNeZm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf7__ClassZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe3putMFNbNeMAxhXv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe4peekMxFNaNbNeAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe4peekMxFNaNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe5resetMFNbNeZv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe6__ctorMFNaNbNiNfZCQDoQDn__TQDjTQCxZQDr@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe6__initZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe6__vtblZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe6finishMFNbAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe6finishMFNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe6lengthMxFNaNbNdNeZm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe7__ClassZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo3putMFNbNeMAxhXv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo4peekMxFNaNbNeAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo4peekMxFNaNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo5resetMFNbNeZv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo6__ctorMFNaNbNiNfZCQDyQDx__TQDtTQDhZQEb@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo6__initZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo6__vtblZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo6finishMFNbAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo6finishMFNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo6lengthMxFNaNbNdNeZm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo7__ClassZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo3putMFNbNeMAxhXv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo4peekMxFNaNbNeAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo4peekMxFNaNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo5resetMFNbNeZv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo6__ctorMFNaNbNiNfZCQDyQDx__TQDtTQDhZQEb@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo6__initZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo6__vtblZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo6finishMFNbAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo6finishMFNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo6lengthMxFNaNbNdNeZm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo7__ClassZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz3putMFNbNeMAxhXv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz5resetMFNbNeZv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz6__ctorMFNaNbNiNfZCQDjQDi__TQDeTQCsZQDm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz6__initZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz6__vtblZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz6finishMFNbAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz6finishMFNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz6lengthMxFNaNbNdNeZm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz7__ClassZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz3putMFNbNeMAxhXv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz5resetMFNbNeZv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz6__ctorMFNaNbNiNfZCQDjQDi__TQDeTQCsZQDm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz6__initZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz6__vtblZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz6finishMFNbAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz6finishMFNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz6lengthMxFNaNbNdNeZm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz7__ClassZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz3putMFNbNeMAxhXv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz5resetMFNbNeZv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz6__ctorMFNaNbNiNfZCQDjQDi__TQDeTQCsZQDm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz6__initZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz6__vtblZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz6finishMFNbAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz6finishMFNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz6lengthMxFNaNbNdNeZm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz7__ClassZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz3putMFNbNeMAxhXv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz5resetMFNbNeZv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz6__ctorMFNaNbNiNfZCQDjQDi__TQDeTQCsZQDm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz6__initZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz6__vtblZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz6finishMFNbAhZQd@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz6finishMFNbNeZAh@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz6lengthMxFNaNbNdNeZm@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz7__ClassZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy3putMFNbNeMAxhXv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy5resetMFNbNeZv@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy6__ctorMFNaNbNiNfZCQDiQDh__TQDdTQCrZQDl@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy6__initZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy6__vtblZ@Base 12 ++ _D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy6finishMFNbAhZQd@Base 12 ++ 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_D3std6format5write__T11formatValueTSQBj5array__T8AppenderTAyaZQoTxtTaZQBxFNaNfKQBsKxtMKxSQDkQDj4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format5write__T11formatValueTSQBj5array__T8AppenderTAyaZQoTyAaTaZQByFNaNfKQBtKyQtMKxSQDmQDl4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format5write__T11formatValueTSQBj5array__T8AppenderTAyaZQoTyaTaZQBxFNaNfKQBsKyaMKxSQDkQDj4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format5write__T11formatValueTSQBj5array__T8AppenderTAyaZQoTymTaZQBxFNaNfKQBsKymMKxSQDkQDj4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format5write__T11formatValueTSQBj5array__T8AppenderTyAaZQoTEQCn12experimental6logger4core8LogLevelTaZQDiFNaNfKQDdKQCdMKxSQEwQEv4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format5write__T11formatValueTSQBj5array__T8AppenderTyAaZQoTEQCn5regex8internal2ir2IRTaZQCuFNaNfKQCpKQBpMKxSQEiQEh4spec__T10FormatSpecTaZQpZv@Base 12 ++ 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_D3std6format8internal5write__T15formatValueImplTSQBw5array__T8AppenderTyAaZQoTaTaZQCaFNaNfKQBrxaMKxSQDvQDu4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5array__T8AppenderTyAaZQoThTaZQCaFNaNfKQBrxhMKxSQDvQDu4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5array__T8AppenderTyAaZQoTiTaZQCaFNaNfKQBrxiMKxSQDvQDu4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5array__T8AppenderTyAaZQoTkTaZQCaFNaNfKQBrxkMKxSQDvQDu4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5array__T8AppenderTyAaZQoTwTaZQCaFNaNfKQBrxwMKxSQDvQDu4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTAxaTaZQChFNfKQBwMxAaMKxSQEcQEb4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTAyaTaZQChFNfKQBwMxAyaMKxSQEdQEc4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTEQDf8datetime4date5MonthTaZQDcFNfKQCrxEQErQBmQBgQBeMKxSQFhQFg4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTaTaZQCfFNfKQBuxaMKxSQDyQDx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterThTaZQCfFNfKQBuxhMKxSQDyQDx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTiTaZQCfFNfKQBuxiMKxSQDyQDx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTkTaZQCfFNfKQBuxkMKxSQDyQDx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTlTaZQCfFNfKQBuxlMKxSQDyQDx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTmTaZQCfFNfKQBuxmMKxSQDyQDx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTsTaZQCfFNfKQBuxsMKxSQDyQDx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBw5stdio4File17LockingTextWriterTwTaZQCfFNfKQBuxwMKxSQDyQDx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBwQBv8NoOpSinkTdTaZQBnFNaNfKQBexdMKxSQDiQDh4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBwQBv8NoOpSinkThTaZQBnFNaNfKQBexhMKxSQDiQDh4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBwQBv8NoOpSinkTmTaZQBnFNaNfKQBexmMKxSQDiQDh4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBwQBv__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTdTaZQCpFNaNfKQCgxdMKxSQEkQEj4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T15formatValueImplTSQBwQBv__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTkTaZQDdFNaNfKQCuxkMKxSQEyQEx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T19needToSwapEndianessTaZQyFNaNbNiNfMKxSQCqQCp4spec__T10FormatSpecTaZQpZb@Base 12 ++ _D3std6format8internal5write__T20formatValueImplUlongTSQCb5array__T8AppenderTAyaZQoTaZQCdFNaNfKQBpmIbMKxSQDzQDy4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T20formatValueImplUlongTSQCb5array__T8AppenderTyAaZQoTaZQCdFNaNfKQBpmIbMKxSQDzQDy4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T20formatValueImplUlongTSQCb5stdio4File17LockingTextWriterTaZQCiFNfKQBsmIbMKxSQEcQEb4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T20formatValueImplUlongTSQCbQCa8NoOpSinkTaZQBqFNaNfKQBcmIbMKxSQDmQDl4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T20formatValueImplUlongTSQCbQCa__T7sformatTaTykTykTkTkTkZQxFNkMAaMAxaykykkkkZ4SinkTaZQDgFNaNfKQCsmIbMKxSQFcQFb4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T22enforceValidFormatSpecTC14TypeInfo_ClassTaZQBtFNaNfMKxSQDiQDh4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T22enforceValidFormatSpecTSQCd11concurrency3TidTaZQBxFNaNfMKxSQDmQDl4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T22enforceValidFormatSpecTSQCd4path__T16asNormalizedPathTSQDi5range__T5chainTSQEc3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQGbQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQtTaZQHpFNaNbNiNfMKxSQJiQJh4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T22enforceValidFormatSpecTSQCd5range__T5chainTSQCx3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQEwQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultTaZQFwFNaNbNiNfMKxSQHpQHo4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal5write__T5roundTG1077aZQoFNaNbNiNfKQtmmEQCiQChQCdQBx13RoundingClassbaZb@Base 12 ++ _D3std6format8internal5write__T5roundTG1078aZQoFNaNbNiNfKQtmmEQCiQChQCdQBx13RoundingClassbaZb@Base 12 ++ _D3std6format8internal5write__T5roundTG15aZQmFNaNbNiNfKQrmmEQCgQCfQCbQBv13RoundingClassbaZb@Base 12 ++ _D3std6format8internal5write__T5roundTG16448aZQpFNaNbNiNfKQummEQCjQCiQCeQBy13RoundingClassbaZb@Base 12 ++ _D3std6format8internal5write__T5roundTG16449aZQpFNaNbNiNfKQummEQCjQCiQCeQBy13RoundingClassbaZb@Base 12 ++ _D3std6format8internal5write__T5roundTG18aZQmFNaNbNiNfKQrmmEQCgQCfQCbQBv13RoundingClassbaZb@Base 12 ++ _D3std6format8internal5write__T5roundTG64aZQmFNaNbNiNfKQrmmEQCgQCfQCbQBv13RoundingClassbaZb@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTAaTPvZQCvFNaNfkQpQoZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTAxaTQeZQCwFNaNfkQqQsZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTAxaZQCtFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTAxhZQCtFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTAyAaZQCuFNaNfkQoZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTC14TypeInfo_ClassTkTkZQDlFNaNfkQBfkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTEQDt8datetime4date5MonthZQDoFNaNfkQBiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTPvZQCsFNaNfkQmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTQClTQCpZQDbFNaNfkQDcQDfQDiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTQClTiTQCrZQDdFNaNfkQDeQDhiQDlZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTQClTmZQCzFNaNfkQDaQDdmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTQClZQCxFNaNfkQCyQDbZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTkZQCvFNaNfkQCwkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTmTQCnTQCrTxlZQDgFNaNfkQDhmQDlQDoxlZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTmTQCnTQCrTxmZQDgFNaNfkQDhmQDlQDoxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTmTQCnTxmZQDcFNaNfkQDdmQDhxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTxkTQCoZQDaFNaNfkQDbxkQDgZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTxkTkZQCyFNaNfkQCzxkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTxkZQCwFNaNfkQCxxkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTxmTQCoTQCsTmZQDgFNaNfkQDhxmQDmQDpmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChTxmTQCoTxmZQDdFNaNfkQDexmQDjxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTQChZQCtFNaNfkQCuZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTbTQCjTQCnTEQEd3net7isemail15EmailStatusCodeZQEhFNaNfkbQEjQEmQByZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTiTEQDv8datetime4date5MonthTiZQDsFNaNfkiQBliZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTiTiZQCtFNaNfkiiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTiZQCrFNaNfkiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTkTkTkZQCvFNaNfkkkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTkTxkTxkTxkZQDaFNaNfkkxkxkxkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTkZQCrFNaNfkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTmTQCjTmTQCpTmTQCvTQCzZQDlFNaNfkmQDnmQDrmQDvQDyZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTmTmTymZQCwFNaNfkmmymZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTmTmZQCtFNaNfkmmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTmZQCrFNaNfkmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTsTEQDv8datetime4date5MonthThThThThTxlZQEbFNaNfksQBuhhhhxlZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTwTkTkZQCvFNaNfkwkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTwTkZQCtFNaNfkwkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTwZQCrFNaNfkwZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTxdZQCsFNaNfkxdZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTxhTxhTxhTxhZQDbFNaNfkxhxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTxhTxhTxhZQCyFNaNfkxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTxkZQCsFNaNfkxkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTxmTxmZQCvFNaNfkxmxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTxsTQCkTxhZQCzFNaNfkxsQDcxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTxsTxEQDx8datetime4date5MonthTxhZQDvFNaNfkxsxQBoxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTxsZQCsFNaNfkxsZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTxtTQCkTxtTxtZQDcFNaNfkxtQDfxtxtZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa13_696e7465676572207769647468SQCt6traits10isIntegralTiTykTykTkTkTkZQDbFNaNfkykykkkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTAaTPvZQDdFNaNfkQpQoZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTAxaTQeZQDeFNaNfkQqQsZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTAxaZQDbFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTAxhZQDbFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTAyAaZQDcFNaNfkQoZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTC14TypeInfo_ClassTkTkZQDtFNaNfkQBfkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTEQEb8datetime4date5MonthZQDwFNaNfkQBiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTPvZQDaFNaNfkQmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTQCtTQCxZQDjFNaNfkQDkQDnQDqZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTQCtTiTQCzZQDlFNaNfkQDmQDpiQDtZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTQCtTmZQDhFNaNfkQDiQDlmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTQCtZQDfFNaNfkQDgQDjZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTkZQDdFNaNfkQDekZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTmTQCvTQCzTxlZQDoFNaNfkQDpmQDtQDwxlZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTmTQCvTQCzTxmZQDoFNaNfkQDpmQDtQDwxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTmTQCvTxmZQDkFNaNfkQDlmQDpxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTxkTQCwZQDiFNaNfkQDjxkQDoZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTxkTkZQDgFNaNfkQDhxkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTxkZQDeFNaNfkQDfxkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTxmTQCwTQDaTmZQDoFNaNfkQDpxmQDuQDxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpTxmTQCwTxmZQDlFNaNfkQDmxmQDrxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTQCpZQDbFNaNfkQDcZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTbTQCrTQCvTEQEl3net7isemail15EmailStatusCodeZQEpFNaNfkbQErQEuQByZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTiTEQEd8datetime4date5MonthTiZQEaFNaNfkiQBliZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTiTiZQDbFNaNfkiiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTiZQCzFNaNfkiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTkTkTkZQDdFNaNfkkkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTkTxkTxkTxkZQDiFNaNfkkxkxkxkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTkZQCzFNaNfkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTmTQCrTmTQCxTmTQDdTQDhZQDtFNaNfkmQDvmQDzmQEdQEgZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTmTmTymZQDeFNaNfkmmymZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTmTmZQDbFNaNfkmmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTmZQCzFNaNfkmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTsTEQEd8datetime4date5MonthThThThThTxlZQEjFNaNfksQBuhhhhxlZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTwTkTkZQDdFNaNfkwkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTwTkZQDbFNaNfkwkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTwZQCzFNaNfkwZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTxdZQDaFNaNfkxdZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTxhTxhTxhTxhZQDjFNaNfkxhxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTxhTxhTxhZQDgFNaNfkxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTxkZQDaFNaNfkxkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTxmTxmZQDdFNaNfkxmxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTxsTQCsTxhZQDhFNaNfkxsQDkxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTxsTxEQEf8datetime4date5MonthTxhZQEdFNaNfkxsxQBoxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTxsZQDaFNaNfkxsZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTxtTQCsTxtTxtZQDkFNaNfkxtQDnxtxtZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa17_696e746567657220707265636973696f6eSQDb6traits10isIntegralTiTykTykTkTkTkZQDjFNaNfkykykkkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTAaTPvZQDhFNaNfkQpQoZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTAxaTQeZQDiFNaNfkQqQsZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTAxaZQDfFNaNfkQnZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTAxhZQDfFNaNfkQnZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTAyAaZQDgFNaNfkQoZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTC14TypeInfo_ClassTkTkZQDxFNaNfkQBfkkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTEQEf8datetime4date5MonthZQEaFNaNfkQBiZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTPvZQDeFNaNfkQmZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTQCxTQDbZQDnFNaNfkQDoQDrQDuZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTQCxTiTQDdZQDpFNaNfkQDqQDtiQDxZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTQCxTmZQDlFNaNfkQDmQDpmZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTQCxZQDjFNaNfkQDkQDnZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTkZQDhFNaNfkQDikZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTmTQCzTQDdTxlZQDsFNaNfkQDtmQDxQEaxlZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTmTQCzTQDdTxmZQDsFNaNfkQDtmQDxQEaxmZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTmTQCzTxmZQDoFNaNfkQDpmQDtxmZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTxkTQDaZQDmFNaNfkQDnxkQDsZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTxkTkZQDkFNaNfkQDlxkkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTxkZQDiFNaNfkQDjxkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTxmTQDaTQDeTmZQDsFNaNfkQDtxmQDyQEbmZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtTxmTQDaTxmZQDpFNaNfkQDqxmQDvxmZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTQCtZQDfFNaNfkQDgZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTbTQCvTQCzTEQEp3net7isemail15EmailStatusCodeZQEtFNaNfkbQEvQEyQByZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTiTEQEh8datetime4date5MonthTiZQEeFNaNfkiQBliZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTiTiZQDfFNaNfkiiZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTiZQDdFNaNfkiZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTkTkTkZQDhFNaNfkkkkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTkTxkTxkTxkZQDmFNaNfkkxkxkxkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTkZQDdFNaNfkkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTmTQCvTmTQDbTmTQDhTQDlZQDxFNaNfkmQDzmQEdmQEhQEkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTmTmTymZQDiFNaNfkmmymZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTmTmZQDfFNaNfkmmZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTmZQDdFNaNfkmZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTsTEQEh8datetime4date5MonthThThThThTxlZQEnFNaNfksQBuhhhhxlZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTwTkTkZQDhFNaNfkwkkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTwTkZQDfFNaNfkwkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTwZQDdFNaNfkwZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTxdZQDeFNaNfkxdZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTxhTxhTxhTxhZQDnFNaNfkxhxhxhxhZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTxhTxhTxhZQDkFNaNfkxhxhxhZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTxkZQDeFNaNfkxkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTxmTxmZQDhFNaNfkxmxmZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTxsTQCwTxhZQDlFNaNfkxsQDoxhZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTxsTxEQEj8datetime4date5MonthTxhZQEhFNaNfkxsxQBoxhZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTxsZQDeFNaNfkxsZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTxtTQCwTxtTxtZQDoFNaNfkxtQDrxtxtZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa19_736570617261746f7220636861726163746572SQDf6traits10isSomeCharTwTykTykTkTkTkZQDnFNaNfkykykkkkZw@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTAaTPvZQDlFNaNfkQpQoZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTAxaTQeZQDmFNaNfkQqQsZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTAxaZQDjFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTAxhZQDjFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTAyAaZQDkFNaNfkQoZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTC14TypeInfo_ClassTkTkZQEbFNaNfkQBfkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTEQEj8datetime4date5MonthZQEeFNaNfkQBiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTPvZQDiFNaNfkQmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTQDbTQDfZQDrFNaNfkQDsQDvQDyZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTQDbTiTQDhZQDtFNaNfkQDuQDxiQEbZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTQDbTmZQDpFNaNfkQDqQDtmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTQDbZQDnFNaNfkQDoQDrZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTkZQDlFNaNfkQDmkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTmTQDdTQDhTxlZQDwFNaNfkQDxmQEbQEexlZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTmTQDdTQDhTxmZQDwFNaNfkQDxmQEbQEexmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTmTQDdTxmZQDsFNaNfkQDtmQDxxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTxkTQDeZQDqFNaNfkQDrxkQDwZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTxkTkZQDoFNaNfkQDpxkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTxkZQDmFNaNfkQDnxkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTxmTQDeTQDiTmZQDwFNaNfkQDxxmQEcQEfmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxTxmTQDeTxmZQDtFNaNfkQDuxmQDzxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTQCxZQDjFNaNfkQDkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTbTQCzTQDdTEQEt3net7isemail15EmailStatusCodeZQExFNaNfkbQEzQFcQByZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTiTEQEl8datetime4date5MonthTiZQEiFNaNfkiQBliZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTiTiZQDjFNaNfkiiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTiZQDhFNaNfkiZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTkTkTkZQDlFNaNfkkkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTkTxkTxkTxkZQDqFNaNfkkxkxkxkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTkZQDhFNaNfkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTmTQCzTmTQDfTmTQDlTQDpZQEbFNaNfkmQEdmQEhmQElQEoZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTmTmTymZQDmFNaNfkmmymZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTmTmZQDjFNaNfkmmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTmZQDhFNaNfkmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTsTEQEl8datetime4date5MonthThThThThTxlZQErFNaNfksQBuhhhhxlZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTwTkTkZQDlFNaNfkwkkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTwTkZQDjFNaNfkwkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTwZQDhFNaNfkwZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTxdZQDiFNaNfkxdZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTxhTxhTxhTxhZQDrFNaNfkxhxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTxhTxhTxhZQDoFNaNfkxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTxkZQDiFNaNfkxkZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTxmTxmZQDlFNaNfkxmxmZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTxsTQDaTxhZQDpFNaNfkxsQDsxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTxsTxEQEn8datetime4date5MonthTxhZQElFNaNfkxsxQBoxhZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTxsZQDiFNaNfkxsZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTxtTQDaTxtTxtZQDsFNaNfkxtQDvxtxtZi@Base 12 ++ _D3std6format8internal5write__T6getNthVAyaa21_736570617261746f72206469676974207769647468SQDj6traits10isIntegralTiTykTykTkTkTkZQDrFNaNfkykykkkkZi@Base 12 ++ _D3std6format8internal5write__T8getWidthTAaZQnFNaNfQkZl@Base 12 ++ _D3std6format8internal5write__T8getWidthTAwZQnFNaNbNiNfQoZl@Base 12 ++ _D3std6format8internal5write__T8getWidthTAxaZQoFNaNfQlZl@Base 12 ++ _D3std6format8internal5write__T8getWidthTAyaZQoFNaNfQlZl@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TAaTPvZQBzFNaNfkQpQoZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TAxaTQeZQCaFNaNfkQqQsZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TAxaZQBxFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TAxhZQBxFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TAyAaZQByFNaNfkQoZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TC14TypeInfo_ClassTkTkZQCpFNaNfkQBfkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TEQCx8datetime4date5MonthZQCsFNaNfkQBiZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TPvZQBwFNaNfkQmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTQBmTQBqZQCfFNaNfkQCdQCgQCjZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTQBmTiTQBsZQChFNaNfkQCfQCiiQCmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTQBmTmZQCdFNaNfkQCbQCemZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTQBmZQCbFNaNfkQBzQCcZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTkZQBzFNaNfkQBxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTmTQBoTQBsTxlZQCkFNaNfkQCimQCmQCpxlZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTmTQBoTQBsTxmZQCkFNaNfkQCimQCmQCpxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTmTQBoTxmZQCgFNaNfkQCemQCixmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTxkTQBpZQCeFNaNfkQCcxkQChZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTxkTkZQCcFNaNfkQCaxkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTxkZQCaFNaNfkQByxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTxmTQBpTQBtTmZQCkFNaNfkQCixmQCnQCqmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiTxmTQBpTxmZQChFNaNfkQCfxmQCkxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TQBiZQBxFNaNfkQBvZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TbTQBkTQBoTEQDh3net7isemail15EmailStatusCodeZQDlFNaNfkbQDkQDnQByZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TiTEQCz8datetime4date5MonthTiZQCwFNaNfkiQBliZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TiTiZQBxFNaNfkiiZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TiZQBvFNaNfkiZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TkTkTkZQBzFNaNfkkkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TkTxkTxkTxkZQCeFNaNfkkxkxkxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TkZQBvFNaNfkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TmTQBkTmTQBqTmTQBwTQCaZQCpFNaNfkmQComQCsmQCwQCzZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TmTmTymZQCaFNaNfkmmymZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TmTmZQBxFNaNfkmmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TmZQBvFNaNfkmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TsTEQCz8datetime4date5MonthThThThThTxlZQDfFNaNfksQBuhhhhxlZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TwTkTkZQBzFNaNfkwkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TwTkZQBxFNaNfkwkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TwZQBvFNaNfkwZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TxdZQBwFNaNfkxdZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TxhTxhTxhTxhZQCfFNaNfkxhxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TxhTxhTxhZQCcFNaNfkxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TxkZQBwFNaNfkxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TxmTxmZQBzFNaNfkxmxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TxsTQBlTxhZQCdFNaNfkxsQCdxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TxsTxEQDb8datetime4date5MonthTxhZQCzFNaNfkxsxQBoxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TxsZQBwFNaNfkxsZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TxtTQBlTxtTxtZQCgFNaNfkxtQCgxtxtZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa13_696e7465676572207769647468TykTykTkTkTkZQCfFNaNfkykykkkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTAaTPvZQChFNaNfkQpQoZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTAxaTQeZQCiFNaNfkQqQsZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTAxaZQCfFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTAxhZQCfFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTAyAaZQCgFNaNfkQoZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTC14TypeInfo_ClassTkTkZQCxFNaNfkQBfkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTEQDf8datetime4date5MonthZQDaFNaNfkQBiZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTPvZQCeFNaNfkQmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTQBuTQByZQCnFNaNfkQClQCoQCrZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTQBuTiTQCaZQCpFNaNfkQCnQCqiQCuZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTQBuTmZQClFNaNfkQCjQCmmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTQBuZQCjFNaNfkQChQCkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTkZQChFNaNfkQCfkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTmTQBwTQCaTxlZQCsFNaNfkQCqmQCuQCxxlZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTmTQBwTQCaTxmZQCsFNaNfkQCqmQCuQCxxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTmTQBwTxmZQCoFNaNfkQCmmQCqxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTxkTQBxZQCmFNaNfkQCkxkQCpZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTxkTkZQCkFNaNfkQCixkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTxkZQCiFNaNfkQCgxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTxmTQBxTQCbTmZQCsFNaNfkQCqxmQCvQCymZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqTxmTQBxTxmZQCpFNaNfkQCnxmQCsxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTQBqZQCfFNaNfkQCdZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTbTQBsTQBwTEQDp3net7isemail15EmailStatusCodeZQDtFNaNfkbQDsQDvQByZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTiTEQDh8datetime4date5MonthTiZQDeFNaNfkiQBliZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTiTiZQCfFNaNfkiiZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTiZQCdFNaNfkiZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTkTkTkZQChFNaNfkkkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTkTxkTxkTxkZQCmFNaNfkkxkxkxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTkZQCdFNaNfkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTmTQBsTmTQByTmTQCeTQCiZQCxFNaNfkmQCwmQDamQDeQDhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTmTmTymZQCiFNaNfkmmymZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTmTmZQCfFNaNfkmmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTmZQCdFNaNfkmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTsTEQDh8datetime4date5MonthThThThThTxlZQDnFNaNfksQBuhhhhxlZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTwTkTkZQChFNaNfkwkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTwTkZQCfFNaNfkwkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTwZQCdFNaNfkwZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTxdZQCeFNaNfkxdZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTxhTxhTxhTxhZQCnFNaNfkxhxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTxhTxhTxhZQCkFNaNfkxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTxkZQCeFNaNfkxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTxmTxmZQChFNaNfkxmxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTxsTQBtTxhZQClFNaNfkxsQClxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTxsTxEQDj8datetime4date5MonthTxhZQDhFNaNfkxsxQBoxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTxsZQCeFNaNfkxsZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTxtTQBtTxtTxtZQCoFNaNfkxtQCoxtxtZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa17_696e746567657220707265636973696f6eTykTykTkTkTkZQCnFNaNfkykykkkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TAaTPvZQCpFNaNfkQpQoZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TAxaTQeZQCqFNaNfkQqQsZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TAxaZQCnFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TAxhZQCnFNaNfkQnZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TAyAaZQCoFNaNfkQoZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TC14TypeInfo_ClassTkTkZQDfFNaNfkQBfkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TEQDn8datetime4date5MonthZQDiFNaNfkQBiZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TPvZQCmFNaNfkQmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTQCcTQCgZQCvFNaNfkQCtQCwQCzZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTQCcTiTQCiZQCxFNaNfkQCvQCyiQDcZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTQCcTmZQCtFNaNfkQCrQCumZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTQCcZQCrFNaNfkQCpQCsZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTkZQCpFNaNfkQCnkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTmTQCeTQCiTxlZQDaFNaNfkQCymQDcQDfxlZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTmTQCeTQCiTxmZQDaFNaNfkQCymQDcQDfxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTmTQCeTxmZQCwFNaNfkQCumQCyxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTxkTQCfZQCuFNaNfkQCsxkQCxZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTxkTkZQCsFNaNfkQCqxkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTxkZQCqFNaNfkQCoxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTxmTQCfTQCjTmZQDaFNaNfkQCyxmQDdQDgmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByTxmTQCfTxmZQCxFNaNfkQCvxmQDaxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TQByZQCnFNaNfkQClZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TbTQCaTQCeTEQDx3net7isemail15EmailStatusCodeZQEbFNaNfkbQEaQEdQByZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TiTEQDp8datetime4date5MonthTiZQDmFNaNfkiQBliZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TiTiZQCnFNaNfkiiZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TiZQClFNaNfkiZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TkTkTkZQCpFNaNfkkkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TkTxkTxkTxkZQCuFNaNfkkxkxkxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TkZQClFNaNfkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TmTQCaTmTQCgTmTQCmTQCqZQDfFNaNfkmQDemQDimQDmQDpZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TmTmTymZQCqFNaNfkmmymZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TmTmZQCnFNaNfkmmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TmZQClFNaNfkmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TsTEQDp8datetime4date5MonthThThThThTxlZQDvFNaNfksQBuhhhhxlZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TwTkTkZQCpFNaNfkwkkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TwTkZQCnFNaNfkwkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TwZQClFNaNfkwZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TxdZQCmFNaNfkxdZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TxhTxhTxhTxhZQCvFNaNfkxhxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TxhTxhTxhZQCsFNaNfkxhxhxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TxkZQCmFNaNfkxkZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TxmTxmZQCpFNaNfkxmxmZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TxsTQCbTxhZQCtFNaNfkxsQCtxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TxsTxEQDr8datetime4date5MonthTxhZQDpFNaNfkxsxQBoxhZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TxsZQCmFNaNfkxsZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TxtTQCbTxtTxtZQCwFNaNfkxtQCwxtxtZi@Base 12 ++ _D3std6format8internal5write__T9getNthIntVAyaa21_736570617261746f72206469676974207769647468TykTykTkTkTkZQCvFNaNfkykykkkkZi@Base 12 ++ _D3std6format8internal6floats11__moduleRefZ@Base 12 ++ _D3std6format8internal6floats12__ModuleInfoZ@Base 12 ++ _D3std6format8internal6floats__T10printFloatTDFNaNbNfAxaZvTeTaZQBfFNaNfKQBbxeSQCyQCx4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal6floats__T10printFloatTSQBsQBr8NoOpSinkTdTaZQBiFNaNfKQBexdSQDbQDa4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal6floats__T10printFloatTSQBsQBr__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTdTaZQCkFNaNfKQCgxdSQEdQEc4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatATDFNaNbNfAxaZvTeTaZQBgFNaNfKQBbxeSQCzQCy4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatATSQBtQBs8NoOpSinkTdTaZQBjFNaNfKQBexdSQDcQDb4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatATSQBtQBs__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTdTaZQClFNaNfKQCgxdSQEeQEd4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatEVbi0TDFNaNbNfAxaZvTeTaZQBkFNaNfKQBbxeSQDdQDc4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatEVbi0TSQBxQBw8NoOpSinkTdTaZQBnFNaNfKQBexdSQDgQDf4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatEVbi0TSQBxQBw__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTdTaZQCpFNaNfKQCgxdSQEiQEh4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatEVbi1TDFNaNbNfAxaZvTeTaZQBkFNaNfKQBbxeSQDdQDc4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatEVbi1TSQBxQBw8NoOpSinkTdTaZQBnFNaNfKQBexdSQDgQDf4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatEVbi1TSQBxQBw__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTdTaZQCpFNaNfKQCgxdSQEiQEh4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatFVbi0TDFNaNbNfAxaZvTeTaZQBkFNaNfKQBbxeSQDdQDc4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format8internal6floats__T11printFloatFVbi0TSQBxQBw8NoOpSinkTdTaZQBnFNaNfKQBexdSQDgQDf4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ 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_D3std6format8internal6floats__T11printFloatGTSQBtQBs__T7sformatTaTxdZQoFNkMAaMAxaxdZ4SinkTdTaZQClFNaNfKQCgxdSQEeQEd4spec__T10FormatSpecTaZQpAyaimbZv@Base 12 ++ _D3std6format__T11guessLengthTaTAyaZQuFNaNfQlZm@Base 12 ++ _D3std6format__T7sformatTaTxdZQoFNaNfNkMAaMAxaxdZQj@Base 12 ++ _D3std6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4Sink11__xopEqualsMxFKxSQCpQCo__TQCkTaTxdZQCtFNkMQCgMQChxdZQChZb@Base 12 ++ _D3std6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4Sink3putMFNaNbNfMQyZv@Base 12 ++ _D3std6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4Sink3putMFNaNfMAxuZv@Base 12 ++ _D3std6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4Sink3putMFNaNfMAxwZv@Base 12 ++ _D3std6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4Sink3putMFNaNfwZv@Base 12 ++ _D3std6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4Sink6__initZ@Base 12 ++ _D3std6format__T7sformatTaTxdZQoFNkMAaMAxaxdZ4Sink9__xtoHashFNbNeKxSQCoQCn__TQCjTaTxdZQCsFNkMQCfMQCgxdZQCgZm@Base 12 ++ _D3std6format__T7sformatTaTykTykTkTkTkZQxFNaNfNkMAaMAxaykykkkkZQo@Base 12 ++ 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_D3std6format__TQkTaTAyaTQeTmZQyFNaNfIAaQtQvmZQz@Base 12 ++ _D3std6format__TQkTaTAyaTQeZQwFNaNfIAaQrQtZQw@Base 12 ++ _D3std6format__TQkTaTAyaTxkTQhZQzFNaNfIAaQuxkQyZQBb@Base 12 ++ _D3std6format__TQkTaTAyaTxkTkZQyFNaNfIAaQtxkkZQz@Base 12 ++ _D3std6format__TQkTaTAyaTxkZQwFNaNfIAaQrxkZQw@Base 12 ++ _D3std6format__TQkTaTAyaZQtFNaNfIAaQoZQr@Base 12 ++ _D3std6format__TQkTaTC14TypeInfo_ClassTkTkZQBlFNaNfIAaQBhkkZAya@Base 12 ++ _D3std6format__TQkTaTEQu8datetime4date5MonthZQBnFNaNfIAaQBjZAya@Base 12 ++ _D3std6format__TQkTaTbTAyaTQeTEQBd3net7isemail15EmailStatusCodeZQCgFNaNfIAabQCbQCeQCaZQCl@Base 12 ++ _D3std6format__TQkTaTiTEQw8datetime4date5MonthTiZQBrFNaNfIAaiQBmiZAya@Base 12 ++ _D3std6format__TQkTaTiZQrFNaNfIAaiZAya@Base 12 ++ _D3std6format__TQkTaTwZQrFNaNfIAawZAya@Base 12 ++ _D3std6format__TQkTaTxhTxhTxhTxhZQBbFNaNfIAaxhxhxhxhZAya@Base 12 ++ _D3std6format__TQkTaTxhTxhTxhZQyFNaNfIAaxhxhxhZAya@Base 12 ++ _D3std6format__TQkTaTxmTxmZQvFNaNfIAaxmxmZAya@Base 12 ++ _D3std6format__TQkTaTxsTxEQy8datetime4date5MonthTxhZQBuFNaNfIAaxsxQBpxhZAya@Base 12 ++ _D3std6format__TQkTaTxsZQsFNaNfIAaxsZAya@Base 12 ++ _D3std6format__TQkTaTxtTAyaTxtTxtZQBcFNaNfIAaxtQxxtxtZQBe@Base 12 ++ _D3std6format__TQkVAyaa35_737461636b2e6c656e677468202d206174202573206d7573742062652032206f722033TmZQDpFNaNfmZQDm@Base 12 ++ _D3std6format__TQkVAyaa39_7372632e6c656e677468202573206d75737420657175616c20646573742e6c656e677468202573TmTmZQDzFNaNfmmZQDx@Base 12 ++ _D3std6format__TQkVAyaa42_74656d702e6c656e677468202573203e3d2072616e67652e6c656e677468202573202d206d6964202573TmTmTymZQEiFNaNfmmymZQEi@Base 12 ++ _D3std6getopt10assignCharw@Base 12 ++ _D3std6getopt10optionCharw@Base 12 ++ _D3std6getopt11__moduleRefZ@Base 12 ++ _D3std6getopt11splitAndGetFNaNbNeAyaZSQBkQBj6Option@Base 12 ++ _D3std6getopt12GetoptResult11__xopEqualsMxFKxSQBsQBrQBnZb@Base 12 ++ _D3std6getopt12GetoptResult6__initZ@Base 12 ++ _D3std6getopt12GetoptResult9__xtoHashFNbNeKxSQBrQBqQBmZm@Base 12 ++ _D3std6getopt12__ModuleInfoZ@Base 12 ++ _D3std6getopt12endOfOptionsAya@Base 12 ++ _D3std6getopt13configuration11passThroughMFNaNbNdNiNfbZv@Base 12 ++ _D3std6getopt13configuration11passThroughMxFNaNbNdNiNfZb@Base 12 ++ _D3std6getopt13configuration13caseSensitiveMFNaNbNdNiNfbZv@Base 12 ++ _D3std6getopt13configuration13caseSensitiveMxFNaNbNdNiNfZb@Base 12 ++ _D3std6getopt13configuration16keepEndOfOptionsMFNaNbNdNiNfbZv@Base 12 ++ _D3std6getopt13configuration16keepEndOfOptionsMxFNaNbNdNiNfZb@Base 12 ++ _D3std6getopt13configuration20stopOnFirstNonOptionMFNaNbNdNiNfbZv@Base 12 ++ _D3std6getopt13configuration20stopOnFirstNonOptionMxFNaNbNdNiNfZb@Base 12 ++ _D3std6getopt13configuration6__initZ@Base 12 ++ _D3std6getopt13configuration8bundlingMFNaNbNdNiNfbZv@Base 12 ++ _D3std6getopt13configuration8bundlingMxFNaNbNdNiNfZb@Base 12 ++ _D3std6getopt13configuration8requiredMFNaNbNdNiNfbZv@Base 12 ++ _D3std6getopt13configuration8requiredMxFNaNbNdNiNfZb@Base 12 ++ _D3std6getopt15GetOptException6__initZ@Base 12 ++ _D3std6getopt15GetOptException6__vtblZ@Base 12 ++ _D3std6getopt15GetOptException7__ClassZ@Base 12 ++ _D3std6getopt15GetOptException8__mixin16__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDcQDbQCx@Base 12 ++ _D3std6getopt15GetOptException8__mixin16__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDcQDbQCx@Base 12 ++ _D3std6getopt20defaultGetoptPrinterFNfAyaASQBpQBo6OptionZ9__lambda3FNeZSQCs5stdio4File17LockingTextWriter@Base 12 ++ _D3std6getopt20defaultGetoptPrinterFNfAyaASQBpQBo6OptionZv@Base 12 ++ _D3std6getopt6Option11__xopEqualsMxFKxSQBlQBkQBgZb@Base 12 ++ _D3std6getopt6Option6__initZ@Base 12 ++ _D3std6getopt6Option9__xtoHashFNbNeKxSQBkQBjQBfZm@Base 12 ++ _D3std6getopt8arraySepAya@Base 12 ++ _D3std6getopt8optMatchFNfAyaMQeKQhSQBhQBg13configurationZb@Base 12 ++ _D3std6getopt9setConfigFNaNbNiNfKSQBgQBf13configurationEQCcQCb6configZv@Base 12 ++ _D3std6getopt__T22defaultGetoptFormatterTSQBo5stdio4File17LockingTextWriterZQCiFNfQBpAyaASQDkQDj6OptionQsZv@Base 12 ++ _D3std6int12811__moduleRefZ@Base 12 ++ _D3std6int12812__ModuleInfoZ@Base 12 ++ _D3std6int1286Int12811__xopEqualsMxFKxSQBlQBkQBgZb@Base 12 ++ _D3std6int1286Int1285opCmpMxFNaNbNiNfSQBkQBjQBfZi@Base 12 ++ _D3std6int1286Int1285opCmpMxFNaNbNiNflZi@Base 12 ++ _D3std6int1286Int1286__ctorMFNaNbNcNiNfS4coreQBn4CentZSQCbQCaQBw@Base 12 ++ _D3std6int1286Int1286__ctorMFNaNbNcNiNflZSQBoQBnQBj@Base 12 ++ _D3std6int1286Int1286__ctorMFNaNbNcNiNfllZSQBpQBoQBk@Base 12 ++ _D3std6int1286Int1286__ctorMFNaNbNcNiNfmZSQBoQBnQBj@Base 12 ++ _D3std6int1286Int1286__initZ@Base 12 ++ _D3std6int1286Int1286toHashMxFNaNbNiNfZm@Base 12 ++ _D3std6int1286Int1288__xopCmpMxFKxSQBhQBgQBcZi@Base 12 ++ _D3std6int1286Int1288opEqualsMxFNaNbNiNfSQBnQBmQBiZb@Base 12 ++ _D3std6int1286Int1288opEqualsMxFNaNbNiNflZb@Base 12 ++ _D3std6int1286Int1288opEqualsMxFNaNbNiNfmZb@Base 12 ++ _D3std6mmfile11__moduleRefZ@Base 12 ++ _D3std6mmfile12__ModuleInfoZ@Base 12 ++ _D3std6mmfile6MmFile10__aggrDtorMFZv@Base 12 ++ _D3std6mmfile6MmFile11__fieldDtorMFNeZv@Base 12 ++ _D3std6mmfile6MmFile12ensureMappedMFmZv@Base 12 ++ _D3std6mmfile6MmFile12ensureMappedMFmmZv@Base 12 ++ _D3std6mmfile6MmFile13opIndexAssignMFhmZh@Base 12 ++ _D3std6mmfile6MmFile3mapMFmmZv@Base 12 ++ _D3std6mmfile6MmFile4modeMFZEQBbQBaQw4Mode@Base 12 ++ _D3std6mmfile6MmFile5flushMFZv@Base 12 ++ _D3std6mmfile6MmFile5unmapMFZv@Base 12 ++ _D3std6mmfile6MmFile6__ctorMFAyaEQBfQBeQBa4ModemPvmZCQBzQByQBu@Base 12 ++ _D3std6mmfile6MmFile6__ctorMFAyaZCQBgQBfQBb@Base 12 ++ _D3std6mmfile6MmFile6__ctorMFSQBc5stdio4FileEQBrQBqQBm4ModemPvmZCQClQCkQCg@Base 12 ++ _D3std6mmfile6MmFile6__ctorMFiEQBdQBcQy4ModemPvmZCQBwQBvQBr@Base 12 ++ _D3std6mmfile6MmFile6__dtorMFZv@Base 12 ++ _D3std6mmfile6MmFile6__initZ@Base 12 ++ _D3std6mmfile6MmFile6__vtblZ@Base 12 ++ _D3std6mmfile6MmFile6lengthMxFNdZm@Base 12 ++ _D3std6mmfile6MmFile6mappedMFmZi@Base 12 ++ _D3std6mmfile6MmFile7__ClassZ@Base 12 ++ _D3std6mmfile6MmFile7opIndexMFmZh@Base 12 ++ _D3std6mmfile6MmFile7opSliceMFZAv@Base 12 ++ _D3std6mmfile6MmFile7opSliceMFmmZAv@Base 12 ++ _D3std6random11__moduleRefZ@Base 12 ++ _D3std6random12__ModuleInfoZ@Base 12 ++ _D3std6random12fallbackSeedFNbNiZ11initializedOb@Base 12 ++ _D3std6random12fallbackSeedFNbNiZ4seedOm@Base 12 ++ _D3std6random12fallbackSeedFNbNiZ6fmix64FNaNbNiNfmZm@Base 12 ++ _D3std6random12fallbackSeedFNbNiZm@Base 12 ++ _D3std6random13bootstrapSeedFNbNiZm@Base 12 ++ _D3std6random17unpredictableSeedFNbNdNiNeZk@Base 12 ++ _D3std6random18RandomCoverChoices10__postblitMFNaNbNiNeZv@Base 12 ++ _D3std6random18RandomCoverChoices13opIndexAssignMFNaNbNiNebmZv@Base 12 ++ _D3std6random18RandomCoverChoices6__ctorMFNaNbNcNiNemZSQCbQCaQBw@Base 12 ++ _D3std6random18RandomCoverChoices6__dtorMFNaNbNiNeZv@Base 12 ++ _D3std6random18RandomCoverChoices6__initZ@Base 12 ++ _D3std6random18RandomCoverChoices6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std6random18RandomCoverChoices7opIndexMxFNaNbNiNemZb@Base 12 ++ _D3std6random6rndGenFNbNcNdNiNfZ11initializedb@Base 12 ++ _D3std6random6rndGenFNbNcNdNiNfZ6resultSQBmQBl__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc@Base 12 ++ _D3std6random6rndGenFNbNcNdNiNfZSQBfQBe__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc@Base 12 ++ _D3std6random__T12initMTEngineTSQBeQBd__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFcZQGfFNbNiNfKQGbZv@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki128Vii11ViN8ViN19ZQBn4saveMxFNaNbNdNiNfZSQCyQCx__TQCtTkVki128Vii11ViN8ViN19ZQDt@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki128Vii11ViN8ViN19ZQBn5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki128Vii11ViN8ViN19ZQBn6__initZ@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki128Vii11ViN8ViN19ZQBn8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki160Vii2ViN1ViN4ZQBl4saveMxFNaNbNdNiNfZSQCwQCv__TQCrTkVki160Vii2ViN1ViN4ZQDp@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki160Vii2ViN1ViN4ZQBl5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki160Vii2ViN1ViN4ZQBl6__initZ@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki160Vii2ViN1ViN4ZQBl8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki192ViN2Vii1Vii4ZQBl4saveMxFNaNbNdNiNfZSQCwQCv__TQCrTkVki192ViN2Vii1Vii4ZQDp@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki192ViN2Vii1Vii4ZQBl5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki192ViN2Vii1Vii4ZQBl6__initZ@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki192ViN2Vii1Vii4ZQBl8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki32Vii13ViN17Vii15ZQBn4saveMxFNaNbNdNiNfZSQCyQCx__TQCtTkVki32Vii13ViN17Vii15ZQDt@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki32Vii13ViN17Vii15ZQBn5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki32Vii13ViN17Vii15ZQBn6__initZ@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki32Vii13ViN17Vii15ZQBn8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki64Vii10ViN13ViN10ZQBn4saveMxFNaNbNdNiNfZSQCyQCx__TQCtTkVki64Vii10ViN13ViN10ZQDt@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki64Vii10ViN13ViN10ZQBn5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki64Vii10ViN13ViN10ZQBn6__initZ@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki64Vii10ViN13ViN10ZQBn8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki96Vii10ViN5ViN26ZQBm4saveMxFNaNbNdNiNfZSQCxQCw__TQCsTkVki96Vii10ViN5ViN26ZQDr@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki96Vii10ViN5ViN26ZQBm5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki96Vii10ViN5ViN26ZQBm6__initZ@Base 12 ++ _D3std6random__T14XorshiftEngineTkVki96Vii10ViN5ViN26ZQBm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6random__T17unpredictableSeedTmZQwFNbNdNiNeZm@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc12defaultStateFNaNbNiNfZSQGsQGr__TQGnTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQKv5State@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc12popFrontImplFNaNbNiNfKSQGsQGr__TQGnTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQKv5StateZv@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc4saveMxFNaNbNdNiNfZSQGnQGm__TQGiTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQKq@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc5State6__initZ@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc6__ctorMFNaNbNcNiNfkZSQGpQGo__TQGkTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQKs@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc6__initZ@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc8seedImplFNaNbNiNfkKSQGoQGn__TQGjTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQKr5StateZv@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTkVmi32Vmi624Vmi397Vmi31Vki2567483615Vmi11Vki4294967295Vmi7Vki2636928640Vmi15Vki4022730752Vmi18Vki1812433253ZQFc__T4seedZQgMFNaNbNiNfkZv@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt12defaultStateFNaNbNiNfZSQIjQIi__TQIeTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQOd5State@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt12popFrontImplFNaNbNiNfKSQIjQIi__TQIeTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQOd5StateZv@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt4saveMxFNaNbNdNiNfZSQIeQId__TQHzTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQNy@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt5State6__initZ@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt5frontMxFNaNbNdNiNfZm@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt6__ctorMFNaNbNcNiNfmZSQIgQIf__TQIbTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQOa@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt6__initZ@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt8seedImplFNaNbNiNfmKSQIfQIe__TQIaTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQNz5StateZv@Base 12 ++ _D3std6random__T21MersenneTwisterEngineTmVmi64Vmi312Vmi156Vmi31VmN5403634167711393303Vmi29Vmi6148914691236517205Vmi17Vmi8202884508482404352Vmi37VmN2270628950310912Vmi43Vmi6364136223846793005ZQGt__T4seedZQgMFNaNbNiNfmZv@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki16807Vki0Vki2147483647ZQCc16primeFactorsOnlyFNaNbNiNfmZm@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki16807Vki0Vki2147483647ZQCc34properLinearCongruentialParametersFNaNbNiNfmmmZb@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki16807Vki0Vki2147483647ZQCc3gcdFNaNbNiNfmmZm@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki16807Vki0Vki2147483647ZQCc4saveMxFNaNbNdNiNfZSQDnQDm__TQDiTkVki16807Vki0Vki2147483647ZQEn@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki16807Vki0Vki2147483647ZQCc4seedMFNaNbNiNfkZv@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki16807Vki0Vki2147483647ZQCc5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki16807Vki0Vki2147483647ZQCc6__ctorMFNaNbNcNiNfkZSQDpQDo__TQDkTkVki16807Vki0Vki2147483647ZQEp@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki16807Vki0Vki2147483647ZQCc6__initZ@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki16807Vki0Vki2147483647ZQCc8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki48271Vki0Vki2147483647ZQCc16primeFactorsOnlyFNaNbNiNfmZm@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki48271Vki0Vki2147483647ZQCc34properLinearCongruentialParametersFNaNbNiNfmmmZb@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki48271Vki0Vki2147483647ZQCc3gcdFNaNbNiNfmmZm@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki48271Vki0Vki2147483647ZQCc4saveMxFNaNbNdNiNfZSQDnQDm__TQDiTkVki48271Vki0Vki2147483647ZQEn@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki48271Vki0Vki2147483647ZQCc4seedMFNaNbNiNfkZv@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki48271Vki0Vki2147483647ZQCc5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki48271Vki0Vki2147483647ZQCc6__ctorMFNaNbNcNiNfkZSQDpQDo__TQDkTkVki48271Vki0Vki2147483647ZQEp@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki48271Vki0Vki2147483647ZQCc6__initZ@Base 12 ++ _D3std6random__T24LinearCongruentialEngineTkVki48271Vki0Vki2147483647ZQCc8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6socket10SocketType6__initZ@Base 12 ++ _D3std6socket10getAddressFNfMAxaMQeZACQBkQBj7Address@Base 12 ++ _D3std6socket10getAddressFNfMAxatZACQBiQBh7Address@Base 12 ++ _D3std6socket10socketPairFNeZG2CQBeQBd6Socket@Base 12 ++ _D3std6socket11AddressInfo11__xopEqualsMxFKxSQBrQBqQBmZb@Base 12 ++ _D3std6socket11AddressInfo6__initZ@Base 12 ++ _D3std6socket11AddressInfo9__xtoHashFNbNeKxSQBqQBpQBlZm@Base 12 ++ _D3std6socket11UnixAddress10setNameLenMFNekZv@Base 12 ++ _D3std6socket11UnixAddress4nameMFNaNbNdNiNjNfZPS4core3sys5posixQkQCh8sockaddr@Base 12 ++ _D3std6socket11UnixAddress4nameMxFNaNbNdNiNjNfZPxS4core3sys5posixQkQCj8sockaddr@Base 12 ++ _D3std6socket11UnixAddress4pathMxFNaNdNeZAya@Base 12 ++ _D3std6socket11UnixAddress6__ctorMFNaNbNiNfS4core3sys5posixQk2un11sockaddr_unZCQCzQCyQCu@Base 12 ++ _D3std6socket11UnixAddress6__ctorMFNaNbNiNfZCQBrQBqQBm@Base 12 ++ _D3std6socket11UnixAddress6__ctorMFNaNeMAxaZCQBrQBqQBm@Base 12 ++ _D3std6socket11UnixAddress6__initZ@Base 12 ++ _D3std6socket11UnixAddress6__vtblZ@Base 12 ++ _D3std6socket11UnixAddress7__ClassZ@Base 12 ++ _D3std6socket11UnixAddress7nameLenMxFNaNbNdNiNeZk@Base 12 ++ _D3std6socket11UnixAddress8toStringMxFNaNfZAya@Base 12 ++ _D3std6socket11__moduleRefZ@Base 12 ++ _D3std6socket12InternetHost12validHostentMFNfIPS4core3sys5posix5netdb7hostentZv@Base 12 ++ _D3std6socket12InternetHost13getHostByAddrMFNeMAxaZb@Base 12 ++ _D3std6socket12InternetHost13getHostByAddrMFNekZb@Base 12 ++ _D3std6socket12InternetHost13getHostByNameMFNeMAxaZb@Base 12 ++ _D3std6socket12InternetHost6__initZ@Base 12 ++ _D3std6socket12InternetHost6__vtblZ@Base 12 ++ _D3std6socket12InternetHost7__ClassZ@Base 12 ++ _D3std6socket12InternetHost8populateMFNaNbPS4core3sys5posix5netdb7hostentZv@Base 12 ++ _D3std6socket12InternetHost__T13getHostNoSyncVAyaa118_0a2020202020202020202020206175746f2078203d2068746f6e6c28706172616d293b0a2020202020202020202020206175746f206865203d20676574686f73746279616464722826782c20342c206361737428696e7429204164647265737346616d696c792e494e4554293b0a2020202020202020TkZQKdMFkZb@Base 12 ++ _D3std6socket12InternetHost__T13getHostNoSyncVAyaa245_0a2020202020202020202020206175746f2078203d20696e65745f6164647228706172616d2e74656d7043537472696e672829293b0a202020202020202020202020656e666f726365287820213d20494e414444525f4e4f4e452c0a202020202020202020202020202020206e657720536f636b6574506172616d65746572457863657074696f6e2822496e76616c6964204950763420616464726573732229293b0a2020202020202020202020206175746f206865203d20676574686f73746279616464722826782c20342c206361737428696e7429204164647265737346616d696c792e494e4554293b0a2020202020202020TAxaZQTzMFQjZb@Base 12 ++ _D3std6socket12InternetHost__T13getHostNoSyncVAyaa75_0a202020202020202020202020202020206175746f206865203d20676574686f737462796e616d6528706172616d2e74656d7043537472696e672829293b0a202020202020202020202020TAxaZQGwMFQjZb@Base 12 ++ _D3std6socket12InternetHost__T7getHostVAyaa118_0a2020202020202020202020206175746f2078203d2068746f6e6c28706172616d293b0a2020202020202020202020206175746f206865203d20676574686f73746279616464722826782c20342c206361737428696e7429204164647265737346616d696c792e494e4554293b0a2020202020202020TkZQJwMFkZb@Base 12 ++ _D3std6socket12InternetHost__T7getHostVAyaa245_0a2020202020202020202020206175746f2078203d20696e65745f6164647228706172616d2e74656d7043537472696e672829293b0a202020202020202020202020656e666f726365287820213d20494e414444525f4e4f4e452c0a202020202020202020202020202020206e657720536f636b6574506172616d65746572457863657074696f6e2822496e76616c6964204950763420616464726573732229293b0a2020202020202020202020206175746f206865203d20676574686f73746279616464722826782c20342c206361737428696e7429204164647265737346616d696c792e494e4554293b0a2020202020202020TAxaZQTsMFQjZb@Base 12 ++ _D3std6socket12InternetHost__T7getHostVAyaa75_0a202020202020202020202020202020206175746f206865203d20676574686f737462796e616d6528706172616d2e74656d7043537472696e672829293b0a202020202020202020202020TAxaZQGpMFQjZb@Base 12 ++ _D3std6socket12SocketOption6__initZ@Base 12 ++ _D3std6socket12__ModuleInfoZ@Base 12 ++ _D3std6socket12parseAddressFNfMAxaMQeZCQBlQBk7Address@Base 12 ++ _D3std6socket12parseAddressFNfMAxatZCQBjQBi7Address@Base 12 ++ _D3std6socket13HostException6__initZ@Base 12 ++ _D3std6socket13HostException6__vtblZ@Base 12 ++ _D3std6socket13HostException7__ClassZ@Base 12 ++ _D3std6socket13HostException8__mixin16__ctorMFNfAyaC6object9ThrowableQvmiZCQCvQCuQCq@Base 12 ++ _D3std6socket13HostException8__mixin16__ctorMFNfAyaQdmC6object9ThrowableiZCQCvQCuQCq@Base 12 ++ _D3std6socket13HostException8__mixin16__ctorMFNfAyaiQemC6object9ThrowableZCQCvQCuQCq@Base 12 ++ _D3std6socket13_SOCKET_ERRORxi@Base 12 ++ _D3std6socket13serviceToPortFNfMAxaZt@Base 12 ++ _D3std6socket14UnknownAddress4nameMFNaNbNdNiNjNfZPS4core3sys5posixQkQCk8sockaddr@Base 12 ++ _D3std6socket14UnknownAddress4nameMxFNaNbNdNiNjNfZPxS4core3sys5posixQkQCm8sockaddr@Base 12 ++ _D3std6socket14UnknownAddress6__initZ@Base 12 ++ _D3std6socket14UnknownAddress6__vtblZ@Base 12 ++ _D3std6socket14UnknownAddress7__ClassZ@Base 12 ++ _D3std6socket14UnknownAddress7nameLenMxFNaNbNdNiNfZk@Base 12 ++ _D3std6socket14formatGaiErrorFNeiZ12__critsec136OPv@Base 12 ++ _D3std6socket14formatGaiErrorFNeiZAya@Base 12 ++ _D3std6socket15InternetAddress12addrToStringFNbNekZAya@Base 12 ++ _D3std6socket15InternetAddress12toAddrStringMxFNeZAya@Base 12 ++ _D3std6socket15InternetAddress12toPortStringMxFNfZAya@Base 12 ++ _D3std6socket15InternetAddress16toHostNameStringMxFNfZAya@Base 12 ++ _D3std6socket15InternetAddress4addrMxFNaNbNdNiNfZk@Base 12 ++ _D3std6socket15InternetAddress4nameMFNaNbNdNiNjNfZPS4core3sys5posixQkQCl8sockaddr@Base 12 ++ _D3std6socket15InternetAddress4nameMxFNaNbNdNiNjNfZPxS4core3sys5posixQkQCn8sockaddr@Base 12 ++ _D3std6socket15InternetAddress4portMxFNaNbNdNiNfZt@Base 12 ++ _D3std6socket15InternetAddress5parseFNbNeMAxaZk@Base 12 ++ _D3std6socket15InternetAddress6__ctorMFNaNbNiNfS4core3sys5posix7netinet3in_11sockaddr_inZCQDkQDjQDf@Base 12 ++ _D3std6socket15InternetAddress6__ctorMFNaNbNiNfZCQBvQBuQBq@Base 12 ++ _D3std6socket15InternetAddress6__ctorMFNaNbNiNfktZCQBxQBwQBs@Base 12 ++ _D3std6socket15InternetAddress6__ctorMFNaNbNiNftZCQBwQBvQBr@Base 12 ++ _D3std6socket15InternetAddress6__ctorMFNfMAxatZCQBuQBtQBp@Base 12 ++ _D3std6socket15InternetAddress6__initZ@Base 12 ++ _D3std6socket15InternetAddress6__vtblZ@Base 12 ++ _D3std6socket15InternetAddress7__ClassZ@Base 12 ++ _D3std6socket15InternetAddress7nameLenMxFNaNbNdNiNfZk@Base 12 ++ _D3std6socket15InternetAddress8opEqualsMxFNfC6ObjectZb@Base 12 ++ _D3std6socket15SocketException6__initZ@Base 12 ++ _D3std6socket15SocketException6__vtblZ@Base 12 ++ _D3std6socket15SocketException7__ClassZ@Base 12 ++ _D3std6socket15SocketException8__mixin16__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDcQDbQCx@Base 12 ++ _D3std6socket15SocketException8__mixin16__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDcQDbQCx@Base 12 ++ _D3std6socket15lastSocketErrorFNdNfZAya@Base 12 ++ _D3std6socket16AddressException6__initZ@Base 12 ++ _D3std6socket16AddressException6__vtblZ@Base 12 ++ _D3std6socket16AddressException7__ClassZ@Base 12 ++ _D3std6socket16AddressException8__mixin16__ctorMFNfAyaC6object9ThrowableQvmiZCQCyQCxQCt@Base 12 ++ _D3std6socket16AddressException8__mixin16__ctorMFNfAyaQdmC6object9ThrowableiZCQCyQCxQCt@Base 12 ++ _D3std6socket16AddressException8__mixin16__ctorMFNfAyaiQemC6object9ThrowableZCQCyQCxQCt@Base 12 ++ _D3std6socket16AddressInfoFlags6__initZ@Base 12 ++ _D3std6socket16Internet6Address4addrMxFNaNbNdNiNfZG16h@Base 12 ++ _D3std6socket16Internet6Address4nameMFNaNbNdNiNjNfZPS4core3sys5posixQkQCm8sockaddr@Base 12 ++ _D3std6socket16Internet6Address4nameMxFNaNbNdNiNjNfZPxS4core3sys5posixQkQCo8sockaddr@Base 12 ++ _D3std6socket16Internet6Address4portMxFNaNbNdNiNfZt@Base 12 ++ _D3std6socket16Internet6Address5parseFNeMAxaZG16h@Base 12 ++ _D3std6socket16Internet6Address6__ctorMFNaNbNiNfG16htZCQCbQCaQBw@Base 12 ++ _D3std6socket16Internet6Address6__ctorMFNaNbNiNfS4core3sys5posix7netinet3in_12sockaddr_in6ZCQDmQDlQDh@Base 12 ++ _D3std6socket16Internet6Address6__ctorMFNaNbNiNfZCQBwQBvQBr@Base 12 ++ _D3std6socket16Internet6Address6__ctorMFNaNbNiNftZCQBxQBwQBs@Base 12 ++ _D3std6socket16Internet6Address6__ctorMFNeMAxaMQeZCQBxQBwQBs@Base 12 ++ _D3std6socket16Internet6Address6__ctorMFNfMAxatZCQBvQBuQBq@Base 12 ++ _D3std6socket16Internet6Address6__initZ@Base 12 ++ _D3std6socket16Internet6Address6__vtblZ@Base 12 ++ _D3std6socket16Internet6Address7__ClassZ@Base 12 ++ _D3std6socket16Internet6Address7nameLenMxFNaNbNdNiNfZk@Base 12 ++ _D3std6socket16Internet6Address8ADDR_ANYFNaNbNcNdNiNfZxG16h@Base 12 ++ _D3std6socket16wouldHaveBlockedFNbNiNfZb@Base 12 ++ _D3std6socket17SocketOSException6__ctorMFNfAyaC6object9ThrowableQvmiPFNeiZQBfZCQCzQCyQCu@Base 12 ++ _D3std6socket17SocketOSException6__ctorMFNfAyaQdmC6object9ThrowableiPFNeiZQBfZCQCzQCyQCu@Base 12 ++ _D3std6socket17SocketOSException6__ctorMFNfAyaiPFNeiZQkQmmC6object9ThrowableZCQCyQCxQCt@Base 12 ++ _D3std6socket17SocketOSException6__initZ@Base 12 ++ _D3std6socket17SocketOSException6__vtblZ@Base 12 ++ _D3std6socket17SocketOSException7__ClassZ@Base 12 ++ _D3std6socket17SocketOptionLevel6__initZ@Base 12 ++ _D3std6socket17formatSocketErrorFNeiZAya@Base 12 ++ _D3std6socket18getAddressInfoImplFMAxaMQePS4core3sys5posix5netdb8addrinfoZASQCwQCv11AddressInfo@Base 12 ++ _D3std6socket18getaddrinfoPointeryPUNbNiPxaQdPxS4core3sys5posix5netdb8addrinfoPPSQBhQBfQBeQBbQyZi@Base 12 ++ _D3std6socket18getnameinfoPointeryPUNbNiPxS4core3sys5posixQkQCc8sockaddrkPakQdkiZi@Base 12 ++ _D3std6socket19freeaddrinfoPointeryPUNbNiPS4core3sys5posix5netdb8addrinfoZv@Base 12 ++ _D3std6socket21SocketAcceptException6__initZ@Base 12 ++ _D3std6socket21SocketAcceptException6__vtblZ@Base 12 ++ _D3std6socket21SocketAcceptException7__ClassZ@Base 12 ++ _D3std6socket21SocketAcceptException8__mixin16__ctorMFNfAyaC6object9ThrowableQvmiZCQDdQDcQCy@Base 12 ++ _D3std6socket21SocketAcceptException8__mixin16__ctorMFNfAyaQdmC6object9ThrowableiZCQDdQDcQCy@Base 12 ++ _D3std6socket21SocketAcceptException8__mixin16__ctorMFNfAyaiQemC6object9ThrowableZCQDdQDcQCy@Base 12 ++ _D3std6socket22SocketFeatureException6__initZ@Base 12 ++ _D3std6socket22SocketFeatureException6__vtblZ@Base 12 ++ _D3std6socket22SocketFeatureException7__ClassZ@Base 12 ++ _D3std6socket22SocketFeatureException8__mixin16__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDjQDiQDe@Base 12 ++ _D3std6socket22SocketFeatureException8__mixin16__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDjQDiQDe@Base 12 ++ _D3std6socket23UnknownAddressReference4nameMFNaNbNdNiNfZPS4core3sys5posixQkQCr8sockaddr@Base 12 ++ _D3std6socket23UnknownAddressReference4nameMxFNaNbNdNiNfZPxS4core3sys5posixQkQCt8sockaddr@Base 12 ++ _D3std6socket23UnknownAddressReference6__ctorMFNaNbNiNfPS4core3sys5posixQkQCq8sockaddrkZCQDjQDiQDe@Base 12 ++ _D3std6socket23UnknownAddressReference6__ctorMFNaNbPxS4core3sys5posixQkQCn8sockaddrkZCQDgQDfQDb@Base 12 ++ _D3std6socket23UnknownAddressReference6__initZ@Base 12 ++ _D3std6socket23UnknownAddressReference6__vtblZ@Base 12 ++ _D3std6socket23UnknownAddressReference7__ClassZ@Base 12 ++ _D3std6socket23UnknownAddressReference7nameLenMxFNaNbNdNiNfZk@Base 12 ++ _D3std6socket24SocketParameterException6__initZ@Base 12 ++ _D3std6socket24SocketParameterException6__vtblZ@Base 12 ++ _D3std6socket24SocketParameterException7__ClassZ@Base 12 ++ _D3std6socket24SocketParameterException8__mixin16__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDlQDkQDg@Base 12 ++ _D3std6socket24SocketParameterException8__mixin16__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDlQDkQDg@Base 12 ++ _D3std6socket25_sharedStaticCtor_L282_C1FZv@Base 12 ++ _D3std6socket25_sharedStaticDtor_L317_C1FNbNiZv@Base 12 ++ _D3std6socket6Linger2onMNgFNaNbNcNdNiNjNfZNgi@Base 12 ++ _D3std6socket6Linger4timeMNgFNaNbNcNdNiNjNfZNgi@Base 12 ++ _D3std6socket6Linger6__initZ@Base 12 ++ _D3std6socket6Socket11receiveFromMFNeAvEQBmQBl11SocketFlagsKCQChQCg7AddressZl@Base 12 ++ _D3std6socket6Socket11receiveFromMFNeAvEQBmQBl11SocketFlagsZl@Base 12 ++ _D3std6socket6Socket11receiveFromMFNfAvKCQBnQBm7AddressZl@Base 12 ++ _D3std6socket6Socket11receiveFromMFNfAvZl@Base 12 ++ _D3std6socket6Socket12getErrorTextMFNfZAya@Base 12 ++ _D3std6socket6Socket12localAddressMFNdNeZCQBoQBn7Address@Base 12 ++ _D3std6socket6Socket12setKeepAliveMFNeiiZv@Base 12 ++ _D3std6socket6Socket13addressFamilyMFNdNfZEQBpQBo13AddressFamily@Base 12 ++ _D3std6socket6Socket13createAddressMFNaNbNfZCQBrQBq7Address@Base 12 ++ _D3std6socket6Socket13remoteAddressMFNdNeZCQBpQBo7Address@Base 12 ++ _D3std6socket6Socket4bindMFNeCQBcQBb7AddressZv@Base 12 ++ _D3std6socket6Socket4sendMFNeAxvEQBfQBe11SocketFlagsZl@Base 12 ++ _D3std6socket6Socket4sendMFNfAxvZl@Base 12 ++ _D3std6socket6Socket5closeMFNbNiNeZv@Base 12 ++ _D3std6socket6Socket6__ctorMFNaNbNiNfEQBkQBj8socket_tEQCaQBz13AddressFamilyZCQCxQCwQCs@Base 12 ++ _D3std6socket6Socket6__ctorMFNaNbNiNfZCQBlQBkQBg@Base 12 ++ _D3std6socket6Socket6__ctorMFNeEQBeQBd13AddressFamilyEQCaQBz10SocketTypeEQCtQCs12ProtocolTypeZCQDpQDoQDk@Base 12 ++ _D3std6socket6Socket6__ctorMFNeEQBeQBd13AddressFamilyEQCaQBz10SocketTypeMAxaZCQCyQCxQCt@Base 12 ++ _D3std6socket6Socket6__ctorMFNfEQBeQBd13AddressFamilyEQCaQBz10SocketTypeZCQCuQCtQCp@Base 12 ++ _D3std6socket6Socket6__ctorMFNfMxSQBgQBf11AddressInfoZCQCbQCaQBw@Base 12 ++ _D3std6socket6Socket6__dtorMFNbNiNfZv@Base 12 ++ _D3std6socket6Socket6__initZ@Base 12 ++ _D3std6socket6Socket6__vtblZ@Base 12 ++ _D3std6socket6Socket6_closeFNbNiEQBfQBe8socket_tZv@Base 12 ++ _D3std6socket6Socket6acceptMFNeZCQBfQBeQBa@Base 12 ++ _D3std6socket6Socket6handleMxFNaNbNdNiNfZEQBoQBn8socket_t@Base 12 ++ _D3std6socket6Socket6listenMFNeiZv@Base 12 ++ _D3std6socket6Socket6selectFNeCQBdQBc9SocketSetQrQtPSQBzQBy7TimeValZi@Base 12 ++ _D3std6socket6Socket6selectFNeCQBdQBc9SocketSetQrQtS4core4time8DurationZi@Base 12 ++ _D3std6socket6Socket6selectFNfCQBdQBc9SocketSetQrQtZi@Base 12 ++ _D3std6socket6Socket6sendToMFNeAxvEQBhQBg11SocketFlagsCQCbQCa7AddressZl@Base 12 ++ _D3std6socket6Socket6sendToMFNeAxvEQBhQBg11SocketFlagsZl@Base 12 ++ _D3std6socket6Socket6sendToMFNfAxvCQBhQBg7AddressZl@Base 12 ++ _D3std6socket6Socket6sendToMFNfAxvZl@Base 12 ++ _D3std6socket6Socket7__ClassZ@Base 12 ++ _D3std6socket6Socket7connectMFNeCQBfQBe7AddressZv@Base 12 ++ _D3std6socket6Socket7isAliveMxFNdNeZb@Base 12 ++ _D3std6socket6Socket7receiveMFNeAvEQBhQBg11SocketFlagsZl@Base 12 ++ _D3std6socket6Socket7receiveMFNfAvZl@Base 12 ++ _D3std6socket6Socket7setSockMFNfEQBfQBe8socket_tZv@Base 12 ++ _D3std6socket6Socket8blockingMFNdNebZv@Base 12 ++ _D3std6socket6Socket8blockingMxFNbNdNiNeZb@Base 12 ++ _D3std6socket6Socket8capToIntFNbNiNfmZi@Base 12 ++ _D3std6socket6Socket8hostNameFNdNeZAya@Base 12 ++ _D3std6socket6Socket8shutdownMFNbNiNeEQBkQBj14SocketShutdownZv@Base 12 ++ _D3std6socket6Socket9acceptingMFNaNbNfZCQBmQBlQBh@Base 12 ++ _D3std6socket6Socket9getOptionMFNeEQBhQBg17SocketOptionLevelEQChQCg12SocketOptionAvZi@Base 12 ++ _D3std6socket6Socket9getOptionMFNeEQBhQBg17SocketOptionLevelEQChQCg12SocketOptionJS4core4time8DurationZv@Base 12 ++ _D3std6socket6Socket9getOptionMFNeEQBhQBg17SocketOptionLevelEQChQCg12SocketOptionJSQDdQDc6LingerZi@Base 12 ++ _D3std6socket6Socket9getOptionMFNeEQBhQBg17SocketOptionLevelEQChQCg12SocketOptionJiZi@Base 12 ++ _D3std6socket6Socket9setOptionMFNeEQBhQBg17SocketOptionLevelEQChQCg12SocketOptionAvZv@Base 12 ++ _D3std6socket6Socket9setOptionMFNeEQBhQBg17SocketOptionLevelEQChQCg12SocketOptionS4core4time8DurationZv@Base 12 ++ _D3std6socket6Socket9setOptionMFNeEQBhQBg17SocketOptionLevelEQChQCg12SocketOptionSQDcQDb6LingerZv@Base 12 ++ _D3std6socket6Socket9setOptionMFNeEQBhQBg17SocketOptionLevelEQChQCg12SocketOptioniZv@Base 12 ++ _D3std6socket7Address10setNameLenMFNfkZv@Base 12 ++ _D3std6socket7Address12toAddrStringMxFNfZAya@Base 12 ++ _D3std6socket7Address12toHostStringMxFNebZAya@Base 12 ++ _D3std6socket7Address12toPortStringMxFNfZAya@Base 12 ++ _D3std6socket7Address13addressFamilyMxFNaNbNdNiNfZEQBxQBw13AddressFamily@Base 12 ++ _D3std6socket7Address15toServiceStringMxFNebZAya@Base 12 ++ _D3std6socket7Address16toHostNameStringMxFNfZAya@Base 12 ++ _D3std6socket7Address19toServiceNameStringMxFNfZAya@Base 12 ++ _D3std6socket7Address6__initZ@Base 12 ++ _D3std6socket7Address6__vtblZ@Base 12 ++ _D3std6socket7Address7__ClassZ@Base 12 ++ _D3std6socket7Address8toStringMxFNfZAya@Base 12 ++ _D3std6socket7Service16getServiceByNameMFNbNeMAxaMQeZb@Base 12 ++ _D3std6socket7Service16getServiceByPortMFNbNetMAxaZb@Base 12 ++ _D3std6socket7Service6__initZ@Base 12 ++ _D3std6socket7Service6__vtblZ@Base 12 ++ _D3std6socket7Service7__ClassZ@Base 12 ++ _D3std6socket7Service8populateMFNaNbPS4core3sys5posix5netdb7serventZv@Base 12 ++ _D3std6socket7TimeVal12microsecondsMNgFNaNbNcNdNiNjNfZNgl@Base 12 ++ _D3std6socket7TimeVal6__initZ@Base 12 ++ _D3std6socket7TimeVal7secondsMNgFNaNbNcNdNiNjNfZNgl@Base 12 ++ _D3std6socket8Protocol17getProtocolByNameMFNbNeMAxaZb@Base 12 ++ _D3std6socket8Protocol17getProtocolByTypeMFNbNeEQBuQBt12ProtocolTypeZb@Base 12 ++ _D3std6socket8Protocol6__initZ@Base 12 ++ _D3std6socket8Protocol6__vtblZ@Base 12 ++ _D3std6socket8Protocol7__ClassZ@Base 12 ++ _D3std6socket8Protocol8populateMFNaNbPS4core3sys5posix5netdb8protoentZv@Base 12 ++ _D3std6socket8_lasterrFNbNiNfZi@Base 12 ++ _D3std6socket8socket_t6__initZ@Base 12 ++ _D3std6socket9SocketSet14setMinCapacityMFNaNbNfmZv@Base 12 ++ _D3std6socket9SocketSet3addMFNaNbNeEQBiQBh8socket_tZv@Base 12 ++ _D3std6socket9SocketSet3addMFNaNbNfCQBiQBh6SocketZv@Base 12 ++ _D3std6socket9SocketSet3maxMxFNaNbNdNiNfZk@Base 12 ++ _D3std6socket9SocketSet4maskFNaNbNiNfkZl@Base 12 ++ _D3std6socket9SocketSet5isSetMxFNaNbNiNfCQBnQBm6SocketZi@Base 12 ++ _D3std6socket9SocketSet5isSetMxFNaNbNiNfEQBnQBm8socket_tZi@Base 12 ++ _D3std6socket9SocketSet5resetMFNaNbNiNfZv@Base 12 ++ _D3std6socket9SocketSet6__ctorMFNaNbNfmZCQBnQBmQBi@Base 12 ++ _D3std6socket9SocketSet6__initZ@Base 12 ++ _D3std6socket9SocketSet6__vtblZ@Base 12 ++ _D3std6socket9SocketSet6removeMFNaNbNfCQBlQBk6SocketZv@Base 12 ++ _D3std6socket9SocketSet6removeMFNaNbNfEQBlQBk8socket_tZv@Base 12 ++ _D3std6socket9SocketSet6resizeMFNaNbNfmZv@Base 12 ++ _D3std6socket9SocketSet7__ClassZ@Base 12 ++ _D3std6socket9SocketSet7selectnMxFNaNbNiNfZi@Base 12 ++ _D3std6socket9SocketSet8capacityMxFNaNbNdNiNfZm@Base 12 ++ _D3std6socket9SocketSet8toFd_setMFNaNbNiNeZPS4core3sys5posixQk6select6fd_set@Base 12 ++ _D3std6socket9SocketSet9lengthForFNaNbNiNfmZm@Base 12 ++ _D3std6socket9TcpSocket6__ctorMFNfCQBhQBg7AddressZCQBxQBwQBs@Base 12 ++ _D3std6socket9TcpSocket6__ctorMFNfEQBhQBg13AddressFamilyZCQCeQCdQBz@Base 12 ++ _D3std6socket9TcpSocket6__ctorMFNfZCQBiQBhQBd@Base 12 ++ _D3std6socket9TcpSocket6__initZ@Base 12 ++ _D3std6socket9TcpSocket6__vtblZ@Base 12 ++ _D3std6socket9TcpSocket7__ClassZ@Base 12 ++ _D3std6socket9UdpSocket6__ctorMFNfEQBhQBg13AddressFamilyZCQCeQCdQBz@Base 12 ++ _D3std6socket9UdpSocket6__ctorMFNfZCQBiQBhQBd@Base 12 ++ _D3std6socket9UdpSocket6__initZ@Base 12 ++ _D3std6socket9UdpSocket6__vtblZ@Base 12 ++ _D3std6socket9UdpSocket7__ClassZ@Base 12 ++ _D3std6socket__T14getAddressInfoTAxaTEQBkQBj13AddressFamilyZQBsFNfMQBiMQBmQBlZASQDaQCz11AddressInfo@Base 12 ++ _D3std6socket__T14getAddressInfoTAxaTEQBkQBj16AddressInfoFlagsZQBvFNfMQBlMQBpQBoZASQDdQDc11AddressInfo@Base 12 ++ _D3std6socket__T14getAddressInfoTAxaZQvFNfMQkMQnZASQBxQBw11AddressInfo@Base 12 ++ _D3std6socket__T14getAddressInfoTEQBgQBf16AddressInfoFlagsZQBrFNfMAxaQBkZASQCvQCu11AddressInfo@Base 12 ++ _D3std6stdint11__moduleRefZ@Base 12 ++ _D3std6stdint12__ModuleInfoZ@Base 12 ++ _D3std6string11__moduleRefZ@Base 12 ++ _D3std6string12__ModuleInfoZ@Base 12 ++ _D3std6string14makeTransTableFNaNbNiNfMAxaMQeZG256a@Base 12 ++ _D3std6string15StringException6__initZ@Base 12 ++ _D3std6string15StringException6__vtblZ@Base 12 ++ _D3std6string15StringException7__ClassZ@Base 12 ++ _D3std6string15StringException8__mixin26__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDcQDbQCx@Base 12 ++ _D3std6string15StringException8__mixin26__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDcQDbQCx@Base 12 ++ _D3std6string6abbrevFNaNfAAyaZHQfQh@Base 12 ++ _D3std6string7soundexFNaNbNfMAxaNkMAaZQd@Base 12 ++ _D3std6string9makeTransFNaNbNeMAxaMQeZAya@Base 12 ++ _D3std6string9toStringzFNaNbNeMAxaZPya@Base 12 ++ _D3std6string__T10stripRightTAyaZQrFNaNbNiNfQpZQs@Base 12 ++ _D3std6string__T11_indexOfStrVEQBd8typecons__T4FlagVAyaa13_6361736553656e736974697665ZQBoi1Z__TQDbTQBvTaZQDlFNaNbNiNfQCnAxaZl@Base 12 ++ _D3std6string__T11lastIndexOfTaZQqFNaNiNfAxaIwIEQBu8typecons__T4FlagVAyaa13_6361736553656e736974697665ZQBoZl@Base 12 ++ _D3std6string__T12LineSplitterVEQBe8typecons__T4FlagVAyaa14_6b6565705465726d696e61746f72ZQBqi0TQBqZQDf11__xopEqualsMxFKxSQEpQEo__TQEkVQDzi0TQDjZQEyZb@Base 12 ++ _D3std6string__T12LineSplitterVEQBe8typecons__T4FlagVAyaa14_6b6565705465726d696e61746f72ZQBqi0TQBqZQDf4saveMFNaNbNdNiNfZSQEpQEo__TQEkVQDzi0TQDjZQEy@Base 12 ++ _D3std6string__T12LineSplitterVEQBe8typecons__T4FlagVAyaa14_6b6565705465726d696e61746f72ZQBqi0TQBqZQDf5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std6string__T12LineSplitterVEQBe8typecons__T4FlagVAyaa14_6b6565705465726d696e61746f72ZQBqi0TQBqZQDf5frontMFNaNbNdNiNfZQCq@Base 12 ++ _D3std6string__T12LineSplitterVEQBe8typecons__T4FlagVAyaa14_6b6565705465726d696e61746f72ZQBqi0TQBqZQDf6__ctorMFNaNbNcNiNfQCqZSQEuQEt__TQEpVQEei0TQDoZQFd@Base 12 ++ _D3std6string__T12LineSplitterVEQBe8typecons__T4FlagVAyaa14_6b6565705465726d696e61746f72ZQBqi0TQBqZQDf6__initZ@Base 12 ++ _D3std6string__T12LineSplitterVEQBe8typecons__T4FlagVAyaa14_6b6565705465726d696e61746f72ZQBqi0TQBqZQDf8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6string__T12LineSplitterVEQBe8typecons__T4FlagVAyaa14_6b6565705465726d696e61746f72ZQBqi0TQBqZQDf9__xtoHashFNbNeKxSQEoQEn__TQEjVQDyi0TQDiZQExZm@Base 12 ++ _D3std6string__T12lineSplitterVEQBe8typecons__T4FlagVAyaa14_6b6565705465726d696e61746f72ZQBqi0TyaZQDeFNaNbNiNfQCfZSQEjQEi__T12LineSplitterVQEei0TQDoZQz@Base 12 ++ _D3std6string__T12rightJustifyTAyaZQtFNaNbNfQnmwZQs@Base 12 ++ _D3std6string__T14representationTxaZQuFNaNbNiNfAxaZAxh@Base 12 ++ _D3std6string__T14representationTyaZQuFNaNbNiNfAyaZAyh@Base 12 ++ _D3std6string__T14rightJustifierTAyaZQvFNaNbNiNfQpmwZSQCa3utf__T5byUTFTaVEQCu8typecons__T4FlagVQCka19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFxQFw__TQFsTSQGlQEl__TQEkTwVQEhi1Z__TQEzTSQHoQFo__T10byCodeUnitTQHfZQrFQHmZ14ByCodeUnitImplZQHcFNcQCfZ6ResultZQJqFQDymwZQsZQIhFNcQFbZQBf@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFNaNbNiNfQHamwZSQImQIl__TQIhTQHuZQIpFQIcmwZQCc@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFQGsmwZQs10initializeMFNaNbNiNfZv@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFQGsmwZQs11__xopEqualsMxFKxSQIyQIx__TQItTQIgZQJbFQIomwZQCoZb@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFQGsmwZQs4saveMFNaNbNdNiNfZSQIyQIx__TQItTQIgZQJbFQIomwZQCo@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFQGsmwZQs5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFQGsmwZQs5frontMFNaNbNdNiNfZw@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFQGsmwZQs6__ctorMFNaNbNcNiNfQHtmwZSQJfQJe__TQJaTQInZQJiFQIvmwZQCv@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFQGsmwZQs6__initZ@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFQGsmwZQs8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std6string__T14rightJustifierTSQBg3utf__T5byUTFTwVEQCa8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFdQDx__T10byCodeUnitTQDeZQrFQDlZ14ByCodeUnitImplZQFlFNcQCfZ6ResultZQHfFQGsmwZQs9__xtoHashFNbNeKxSQIxQIw__TQIsTQIfZQJaFQInmwZQCnZm@Base 12 ++ _D3std6string__T5chompTAxaZQlFNaNbNiNfQpZQs@Base 12 ++ _D3std6string__T5stripTAyaZQlFNaNbNiNfQpZQs@Base 12 ++ _D3std6string__T7indexOfTAyaTaZQpFNaNbNiNfQrAxaZl@Base 12 ++ _D3std6string__T7indexOfTaZQlFNaNbNiNfMAxawEQBq8typecons__T4FlagVAyaa13_6361736553656e736974697665ZQBoZl@Base 12 ++ _D3std6string__T8_indexOfTAxaZQoFNaNbNiNfQpwEQBr8typecons__T4FlagVAyaa13_6361736553656e736974697665ZQBoZl@Base 12 ++ _D3std6string__T8_indexOfTAxaZQoFQhwEQBj8typecons__T4FlagVAyaa13_6361736553656e736974697665ZQBoZ13trustedmemchrFNaNbNiNeQDqaZl@Base 12 ++ _D3std6string__T9isNumericTAxaZQpFNaNbNiNfQpbZb@Base 12 ++ _D3std6string__T9isNumericTAxaZQpFQhbZ__T8asciiCmpTSQBy3utf__T10byCodeUnitTQBwZQrFQCdZ14ByCodeUnitImplZQCkFNaNbNiNfQCmAyaZb@Base 12 ++ _D3std6string__T9soundexerTAxaZQpFNaNbNiNfQpZG4a@Base 12 ++ _D3std6string__T9soundexerTAxaZQpFQhZ3dexyAa@Base 12 ++ _D3std6string__T9stripLeftTAyaZQpFNaNbNiNfQpZQs@Base 12 ++ _D3std6system11__moduleRefZ@Base 12 ++ _D3std6system12__ModuleInfoZ@Base 12 ++ _D3std6system2OS6__initZ@Base 12 ++ _D3std6system2osyEQqQo2OS@Base 12 ++ _D3std6system6endianyEQuQs6Endian@Base 12 ++ _D3std6traits11__moduleRefZ@Base 12 ++ _D3std6traits12__ModuleInfoZ@Base 12 ++ _D3std6traits23__InoutWorkaroundStruct6__initZ@Base 12 ++ _D3std6traits__T18extractAttribFlagsVAyaa4_70757265VQpa7_6e6f7468726f77VQBja5_4073616665ZQCvFNaNbNiNfZEQDxQDw17FunctionAttribute@Base 12 ++ _D3std6traits__T18extractAttribFlagsVAyaa7_6e6f7468726f77VQva5_406e6f6763VQBla5_4073616665ZQCxFNaNbNiNfZEQDzQDy17FunctionAttribute@Base 12 ++ _D3std6traits__T18extractAttribFlagsVAyaa7_6e6f7468726f77VQva5_4073616665ZQCgFNaNbNiNfZEQDiQDh17FunctionAttribute@Base 12 ++ _D3std7complex11__moduleRefZ@Base 12 ++ _D3std7complex12__ModuleInfoZ@Base 12 ++ _D3std7complex4expiFNaNbNiNeeZSQBdQBc__T7ComplexTeZQl@Base 12 ++ _D3std7complex9coshisinhFNaNbNiNfeZSQBiQBh__T7ComplexTeZQl@Base 12 ++ _D3std7complex__T7ComplexTeZQl11__xopEqualsMxFKxSQBvQBu__TQBpTeZQBvZb@Base 12 ++ _D3std7complex__T7ComplexTeZQl6__initZ@Base 12 ++ _D3std7complex__T7ComplexTeZQl8toStringMxFNaNfZAya@Base 12 ++ _D3std7complex__T7ComplexTeZQl8toStringMxFNfZ__T19trustedAssumeUniqueTAaZQzFNaNbNiNeQoZAya@Base 12 ++ _D3std7complex__T7ComplexTeZQl9__xtoHashFNbNeKxSQBuQBt__TQBoTeZQBuZm@Base 12 ++ _D3std7complex__T7ComplexTeZQl__T6__ctorHTeHTeZQoMFNaNbNcNiNfxexeZSQCnQCm__TQChTeZQCn@Base 12 ++ _D3std7complex__T7ComplexTeZQl__T8opEqualsHTeZQnMxFNaNbNiNfSQCgQCf__TQCaTeZQCgZb@Base 12 ++ _D3std7complex__T7ComplexTeZQl__T8toStringTDFNaNbNfAxaZvTaZQBaMxFNaNfMQBbMKxSQCx6format4spec__T10FormatSpecTaZQpZv@Base 12 ++ _D3std7numeric11__moduleRefZ@Base 12 ++ _D3std7numeric12__ModuleInfoZ@Base 12 ++ _D3std7numeric16CustomFloatFlags6__initZ@Base 12 ++ _D3std7numeric18decimalToFactorialFNaNbNiNfmKG21hZm@Base 12 ++ _D3std7numeric20isCorrectCustomFloatFNaNbNiNfkkEQBuQBt16CustomFloatFlagsZb@Base 12 ++ _D3std7numeric3Fft4sizeMxFNdZm@Base 12 ++ _D3std7numeric3Fft6__ctorMFAfZCQBdQBcQx@Base 12 ++ _D3std7numeric3Fft6__ctorMFmZCQBcQBbQw@Base 12 ++ _D3std7numeric3Fft6__initZ@Base 12 ++ _D3std7numeric3Fft6__vtblZ@Base 12 ++ _D3std7numeric3Fft7__ClassZ@Base 12 ++ _D3std7numeric__T13oppositeSignsTyeTeZQvFNaNbNiNfyeeZb@Base 12 ++ _D3std7numeric__T6StrideTAfZQl11__xopEqualsMxFKxSQBvQBu__TQBpTQBlZQBxZb@Base 12 ++ _D3std7numeric__T6StrideTAfZQl11doubleStepsMFNaNbNiNfZv@Base 12 ++ _D3std7numeric__T6StrideTAfZQl4saveMFNaNbNdNiNfZSQBvQBu__TQBpTQBlZQBx@Base 12 ++ _D3std7numeric__T6StrideTAfZQl5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std7numeric__T6StrideTAfZQl5frontMFNaNbNdNiNfZf@Base 12 ++ _D3std7numeric__T6StrideTAfZQl6__ctorMFNaNbNcNiNfQymZSQCaQBz__TQBuTQBqZQCc@Base 12 ++ _D3std7numeric__T6StrideTAfZQl6__initZ@Base 12 ++ _D3std7numeric__T6StrideTAfZQl6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std7numeric__T6StrideTAfZQl6nStepsMFNaNbNdNiNfmZm@Base 12 ++ _D3std7numeric__T6StrideTAfZQl6nStepsMxFNaNbNdNiNfZm@Base 12 ++ _D3std7numeric__T6StrideTAfZQl7opIndexMFNaNbNiNfmZf@Base 12 ++ _D3std7numeric__T6StrideTAfZQl7popHalfMFNaNbNiNfZv@Base 12 ++ _D3std7numeric__T6StrideTAfZQl8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std7numeric__T6StrideTAfZQl9__xtoHashFNbNeKxSQBuQBt__TQBoTQBkZQBwZm@Base 12 ++ _D3std7numeric__T8findRootTeTDFNaNbNiNfeZeTPFNaNbNiNfeeZbZQBpFNaNbNiNfMQBqxexeMQBkZe@Base 12 ++ _D3std7numeric__T8findRootTeTDFNaNbNiNfeZeZQBaFMQtxexeZ9__lambda4FNaNbNiNfeeZb@Base 12 ++ _D3std7numeric__T8findRootTeTDFNaNbNiNfeZeZQBaFNaNbNiNfMQBbxexeZe@Base 12 ++ _D3std7numeric__T8findRootTeTeTDFNaNbNiNfeZeTPFNaNbNiNfeeZbZQBrFMQBixexexexeMQBgZ18secant_interpolateFNaNbNiNfeeeeZe@Base 12 ++ _D3std7numeric__T8findRootTeTeTDFNaNbNiNfeZeTPFNaNbNiNfeeZbZQBrFNaNbNiNfMQBqxexexexeMQBoZSQDk8typecons__T5TupleTeTeTeTeZQp@Base 12 ++ _D3std7process10setCLOEXECFNbNiibZv@Base 12 ++ _D3std7process10spawnShellFNeMAxaMxHAyaAyaSQBpQBo6ConfigMQBbMQzZCQClQCk3Pid@Base 12 ++ _D3std7process10spawnShellFNeMAxaSQBg5stdio4FileQpQrMxHAyaAyaSQCiQCh6ConfigMQBuMQzZCQDeQDd3Pid@Base 12 ++ _D3std7process10toAStringzFIAAyaPPxaZv@Base 12 ++ _D3std7process11__moduleRefZ@Base 12 ++ _D3std7process11environment13opIndexAssignFNeNkMNgAaMAxaZANga@Base 12 ++ _D3std7process11environment3getFNfMAxaAyaZQe@Base 12 ++ _D3std7process11environment4toAAFNeZHAyaQd@Base 12 ++ _D3std7process11environment6__initZ@Base 12 ++ _D3std7process11environment6__vtblZ@Base 12 ++ _D3std7process11environment6removeFNbNiNeMAxaZv@Base 12 ++ _D3std7process11environment7__ClassZ@Base 12 ++ _D3std7process11environment7getImplFNeMAxaMDFNfQiZvZv@Base 12 ++ _D3std7process11environment7opIndexFNfMAxaZAya@Base 12 ++ _D3std7process11environment__T14cachedToStringTaZQtFNbNfMAxaZAya@Base 12 ++ _D3std7process11environment__T14cachedToStringTaZQtFNfMAxaZ10lastResultAya@Base 12 ++ _D3std7process11nativeShellFNaNbNdNiNfZAya@Base 12 ++ _D3std7process11pipeProcessFNfMAxAaEQBiQBh8RedirectxHAyaAyaSQCgQCf6ConfigMAxaZSQCzQCy12ProcessPipes@Base 12 ++ _D3std7process11pipeProcessFNfMAxaEQBhQBg8RedirectxHAyaAyaSQCfQCe6ConfigMQBqZSQCyQCx12ProcessPipes@Base 12 ++ _D3std7process11shellSwitchyAa@Base 12 ++ _D3std7process12ProcessPipes11__fieldDtorMFNeZv@Base 12 ++ _D3std7process12ProcessPipes11__xopEqualsMxFKxSQBtQBsQBnZb@Base 12 ++ _D3std7process12ProcessPipes15__fieldPostblitMFNbNlNeZv@Base 12 ++ _D3std7process12ProcessPipes3pidMFNbNdNfZCQBoQBn3Pid@Base 12 ++ _D3std7process12ProcessPipes5stdinMFNbNdNfZSQBq5stdio4File@Base 12 ++ _D3std7process12ProcessPipes6__initZ@Base 12 ++ _D3std7process12ProcessPipes6stderrMFNbNdNfZSQBr5stdio4File@Base 12 ++ _D3std7process12ProcessPipes6stdoutMFNbNdNfZSQBr5stdio4File@Base 12 ++ _D3std7process12ProcessPipes8opAssignMFNcNjNeSQBsQBrQBmZQl@Base 12 ++ _D3std7process12ProcessPipes9__xtoHashFNbNeKxSQBsQBrQBmZm@Base 12 ++ _D3std7process12__ModuleInfoZ@Base 12 ++ _D3std7process12executeShellFNfMAxaxHAyaAyaSQBqQBp6ConfigmMQBbQzZSQCm8typecons__T5TupleTiVQCba6_737461747573TQCuVQCya6_6f7574707574ZQBz@Base 12 ++ _D3std7process12spawnProcessFNeMAxAaxHAyaAyaSQBrQBq6ConfigMAxaZCQCkQCj3Pid@Base 12 ++ _D3std7process12spawnProcessFNeMAxaSQBi5stdio4FileQpQrxHAyaAyaSQCjQCi6ConfigMQBtZCQDcQDb3Pid@Base 12 ++ _D3std7process12spawnProcessFNeMAxaxHAyaAyaSQBqQBp6ConfigMQBaZCQCjQCi3Pid@Base 12 ++ _D3std7process12spawnProcessFNfMAxAaSQBj5stdio4FileQpQrxHAyaAyaSQCkQCj6ConfigMxQBtZCQDeQDd3Pid@Base 12 ++ _D3std7process12thisThreadIDFNbNdNeZm@Base 12 ++ _D3std7process13charAllocatorFNaNbNfmZAa@Base 12 ++ _D3std7process13getEnvironPtrFNeZxPPa@Base 12 ++ _D3std7process13searchPathForFNfMAxaZAya@Base 12 ++ _D3std7process13thisProcessIDFNbNdNeZi@Base 12 ++ _D3std7process14uniqueTempPathFNfZAya@Base 12 ++ _D3std7process16ProcessException12newFromErrnoFAyaQdmZCQCbQCaQBv@Base 12 ++ _D3std7process16ProcessException12newFromErrnoFiAyaQdmZCQCcQCbQBw@Base 12 ++ _D3std7process16ProcessException6__initZ@Base 12 ++ _D3std7process16ProcessException6__vtblZ@Base 12 ++ _D3std7process16ProcessException7__ClassZ@Base 12 ++ _D3std7process16ProcessException8__mixin36__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDeQDdQCy@Base 12 ++ _D3std7process16ProcessException8__mixin36__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDeQDdQCy@Base 12 ++ _D3std7process17spawnProcessPosixFNeMAxAaSQBo5stdio4FileQpQrMxHAyaAyaSQCqQCp6ConfigMAxaZ12abortOnErrorFNbNiiEQEdQEc13InternalErroriZv@Base 12 ++ _D3std7process17spawnProcessPosixFNeMAxAaSQBo5stdio4FileQpQrMxHAyaAyaSQCqQCp6ConfigMAxaZ5getFDFNfKQCfZi@Base 12 ++ _D3std7process17spawnProcessPosixFNeMAxAaSQBo5stdio4FileQpQrMxHAyaAyaSQCqQCp6ConfigMAxaZCQDjQDi3Pid@Base 12 ++ _D3std7process18escapeShellCommandFNaNfMAxAaXAya@Base 12 ++ _D3std7process19escapePosixArgumentFNaNbNeMAxaZAya@Base 12 ++ _D3std7process19escapeShellFileNameFNaNbNeMAxaZAya@Base 12 ++ _D3std7process20escapeShellArgumentsFNaNbNeMAxAaX9allocatorMFNaNbNfmZAa@Base 12 ++ _D3std7process20escapeShellArgumentsFNaNbNeMAxAaXAya@Base 12 ++ _D3std7process21escapeWindowsArgumentFNaNbNeMAxaZAya@Base 12 ++ _D3std7process24escapeShellCommandStringFNaNfNkMAyaZQe@Base 12 ++ _D3std7process25escapeWindowsShellCommandFNaNfMAxaZAya@Base 12 ++ _D3std7process3Pid11performWaitMFNebZi@Base 12 ++ _D3std7process3Pid6__ctorMFNaNbNfibZCQBjQBiQBd@Base 12 ++ _D3std7process3Pid6__initZ@Base 12 ++ _D3std7process3Pid6__vtblZ@Base 12 ++ _D3std7process3Pid7__ClassZ@Base 12 ++ _D3std7process3Pid8osHandleMFNaNbNdNiNfZi@Base 12 ++ _D3std7process3Pid9processIDMxFNaNbNdNfZi@Base 12 ++ _D3std7process4Pipe11__fieldDtorMFNeZv@Base 12 ++ _D3std7process4Pipe11__xopEqualsMxFKxSQBkQBjQBeZb@Base 12 ++ _D3std7process4Pipe15__fieldPostblitMFNbNlNeZv@Base 12 ++ _D3std7process4Pipe5closeMFNfZv@Base 12 ++ _D3std7process4Pipe6__initZ@Base 12 ++ _D3std7process4Pipe7readEndMFNbNdNfZSQBj5stdio4File@Base 12 ++ _D3std7process4Pipe8opAssignMFNcNjNeSQBjQBiQBdZQl@Base 12 ++ _D3std7process4Pipe8writeEndMFNbNdNfZSQBk5stdio4File@Base 12 ++ _D3std7process4Pipe9__xtoHashFNbNeKxSQBjQBiQBdZm@Base 12 ++ _D3std7process4killFCQtQr3PidZv@Base 12 ++ _D3std7process4killFCQtQr3PidiZv@Base 12 ++ _D3std7process4pipeFNeZSQwQu4Pipe@Base 12 ++ _D3std7process4waitFNfCQvQt3PidZi@Base 12 ++ _D3std7process5execvFIAyaIAQfZi@Base 12 ++ _D3std7process6Config6__initZ@Base 12 ++ _D3std7process6browseFNbNiNfMAxaZ9__lambda4FNbNiNeZPa@Base 12 ++ _D3std7process6browseFNbNiNfMAxaZv@Base 12 ++ _D3std7process6execv_FIAyaIAQfZi@Base 12 ++ _D3std7process6execveFIAyaIAQfIQeZi@Base 12 ++ _D3std7process6execvpFIAyaIAQfZi@Base 12 ++ _D3std7process7executeFNfMAxAaxHAyaAyaSQBlQBk6ConfigmMAxaZSQCf8typecons__T5TupleTiVQBza6_737461747573TQCsVQCwa6_6f7574707574ZQBz@Base 12 ++ _D3std7process7executeFNfMAxaxHAyaAyaSQBkQBj6ConfigmMQBbZSQCe8typecons__T5TupleTiVQBza6_737461747573TQCsVQCwa6_6f7574707574ZQBz@Base 12 ++ _D3std7process7execve_FIAyaIAQfIQeZi@Base 12 ++ _D3std7process7execvp_FIAyaIAQfZi@Base 12 ++ _D3std7process7execvpeFIAyaIAQfIQeZi@Base 12 ++ _D3std7process7tryWaitFNfCQyQw3PidZSQBi8typecons__T5TupleTbVAyaa10_7465726d696e61746564TiVQBea6_737461747573ZQCg@Base 12 ++ _D3std7process8Redirect6__initZ@Base 12 ++ _D3std7process8execvpe_FIAyaIAQfIQeZi@Base 12 ++ _D3std7process9createEnvFxHAyaAyabZPxPa@Base 12 ++ _D3std7process9pipeShellFNfMAxaEQBeQBd8RedirectxHAyaAyaSQCcQCb6ConfigMQBqQyZSQCxQCw12ProcessPipes@Base 12 ++ _D3std7process9userShellFNdNfZAya@Base 12 ++ _D3std7process__T11executeImplSQBdQBc11pipeProcessTAxAaZQBnFNeQlxHAyaAyaSQCtQCs6ConfigmMAxaZSQDn8typecons__T5TupleTiVQBza6_737461747573TQCsVQCwa6_6f7574707574ZQBz@Base 12 ++ _D3std7process__T11executeImplSQBdQBc11pipeProcessTAxaZQBmFNeQkxHAyaAyaSQCsQCr6ConfigmMQBkZSQDm8typecons__T5TupleTiVQBza6_737461747573TQCsVQCwa6_6f7574707574ZQBz@Base 12 ++ _D3std7process__T11executeImplS_DQBfQBe9pipeShellFNfMAxaEQCdQCc8RedirectxHAyaAyaSQDbQDa6ConfigMQBqQyZSQDwQDv12ProcessPipesTQCsTQCbZQEkFNeQDgxQCqQCmmMQDsQDaZSQFz8typecons__T5TupleTiVQEda6_737461747573TQEwVQFaa6_6f7574707574ZQBz@Base 12 ++ _D3std7process__T12isExecutableTSQBf5range__T5chainTSQBz3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQDyQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFkFNbNiNeQFfZb@Base 12 ++ _D3std7process__T15pipeProcessImplSQBhQBg10spawnShellTAxaTAyaZQBtFNeMQpEQCsQCr8RedirectxHQBfAyaSQDqQDp6ConfigMQCeQCdZSQEmQEl12ProcessPipes@Base 12 ++ _D3std7process__T15pipeProcessImplSQBhQBg12spawnProcessTAxAaZQBsFNeMQmEQCrQCq8RedirectxHAyaAyaSQDpQDo6ConfigMAxaZSQEiQEh12ProcessPipes@Base 12 ++ _D3std7process__T15pipeProcessImplSQBhQBg12spawnProcessTAxaZQBrFNeMQlEQCqQCp8RedirectxHAyaAyaSQDoQDn6ConfigMQCaZSQEhQEg12ProcessPipes@Base 12 ++ _D3std7process__T23escapePosixArgumentImplS_DQBrQBq13charAllocatorFNaNbNfmZAaZQCjFNaNbNfMAxaZQs@Base 12 ++ _D3std7process__T25escapeWindowsArgumentImplS_DQBtQBs13charAllocatorFNaNbNfmZAaZQClFNaNbNfMAxaZQs@Base 12 ++ _D3std7signals11__moduleRefZ@Base 12 ++ _D3std7signals12__ModuleInfoZ@Base 12 ++ _D3std7signals6linkinFZv@Base 12 ++ _D3std7sumtype11__moduleRefZ@Base 12 ++ _D3std7sumtype12__ModuleInfoZ@Base 12 ++ _D3std7sumtype14MatchException6__ctorMFNaNbNiNfAyaQdmZCQCbQCaQBv@Base 12 ++ _D3std7sumtype14MatchException6__initZ@Base 12 ++ _D3std7sumtype14MatchException6__vtblZ@Base 12 ++ _D3std7sumtype14MatchException7__ClassZ@Base 12 ++ _D3std7sumtype4This6__initZ@Base 12 ++ _D3std7variant11__moduleRefZ@Base 12 ++ _D3std7variant12__ModuleInfoZ@Base 12 ++ _D3std7variant15FakeComplexReal11__xopEqualsMxFKxSQBwQBvQBqZb@Base 12 ++ _D3std7variant15FakeComplexReal6__initZ@Base 12 ++ _D3std7variant15FakeComplexReal9__xtoHashFNbNeKxSQBvQBuQBpZm@Base 12 ++ _D3std7variant16VariantException6__ctorMFAyaZCQBsQBrQBm@Base 12 ++ _D3std7variant16VariantException6__ctorMFC8TypeInfoQkZCQCbQCaQBv@Base 12 ++ _D3std7variant16VariantException6__initZ@Base 12 ++ _D3std7variant16VariantException6__vtblZ@Base 12 ++ _D3std7variant16VariantException7__ClassZ@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp10__postblitMFZv@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp11SizeChecker6__initZ@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp11__xopEqualsMxFKxSQBzQBy__TQBtVmi32ZQCcZb@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp4typeMxFNbNdNeZC8TypeInfo@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp5opCmpMxFKxSQBsQBr__TQBmVmi32ZQBvZi@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp6__dtorMFNfZv@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp6__initZ@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp6lengthMFNdZm@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp6toHashMxFNbNfZm@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp8hasValueMxFNaNbNdNiNfZb@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp8toStringMFZAya@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp__T10convertsToTSQBx11concurrency3TidZQBjMxFNdZb@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp__T3getTSQBp11concurrency3TidZQBbMNgFNdZNgSQCxQBiQy@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp__T4peekTvZQiMNgFNbNdNfZPNgv@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp__T5opCmpTSQBrQBq__TQBlVmi32ZQBuZQBeMFQBcZi@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp__T6__ctorTSQBs11concurrency3TidZQBeMFNcQBdZSQCzQCy__TQCtVmi32ZQDc@Base 12 ++ _D3std7variant__T8VariantNVmi32ZQp__T7handlerHTvZQmFEQBzQBy__TQBtVmi32ZQCc4OpIDPG32hPvZl@Base 12 ++ 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_D3std7windows8registry12__ModuleInfoZ@Base 12 ++ _D3std7windows8syserror11__moduleRefZ@Base 12 ++ _D3std7windows8syserror12__ModuleInfoZ@Base 12 ++ _D3std8bitmanip10myToStringFNaNfmZAya@Base 12 ++ _D3std8bitmanip11__moduleRefZ@Base 12 ++ _D3std8bitmanip12__ModuleInfoZ@Base 12 ++ _D3std8bitmanip15getBitsForAlignFmZm@Base 12 ++ _D3std8bitmanip8BitArray13opIndexAssignMFNaNbNibmZb@Base 12 ++ _D3std8bitmanip8BitArray13opSliceAssignMFNaNbNibZv@Base 12 ++ _D3std8bitmanip8BitArray13opSliceAssignMFNaNbNibmmZv@Base 12 ++ _D3std8bitmanip8BitArray3dimMxFNaNbNdNiNfZm@Base 12 ++ _D3std8bitmanip8BitArray3dupMxFNaNbNdZSQBlQBkQBe@Base 12 ++ _D3std8bitmanip8BitArray4flipMFNaNbNiZv@Base 12 ++ _D3std8bitmanip8BitArray4flipMFNaNbNimZv@Base 12 ++ _D3std8bitmanip8BitArray4sortMFNaNbNdNiNjZSQBpQBoQBi@Base 12 ++ _D3std8bitmanip8BitArray5countMxFNaNbNiZm@Base 12 ++ _D3std8bitmanip8BitArray5opCmpMxFNaNbNiSQBmQBlQBfZi@Base 12 ++ _D3std8bitmanip8BitArray6__ctorMFNaNbNcIAbZSQBqQBpQBj@Base 12 ++ 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12 ++ _D3std8bitmanip__T8ctfeReadTmZQmFNaNbNiNfxG8hZm@Base 12 ++ _D3std8bitmanip__T8ctfeReadTtZQmFNaNbNiNfxG2hZt@Base 12 ++ _D3std8bitmanip__T9bitfieldsTbVAyaa13_6361736553656e736974697665Vii1TbVQBoa8_62756e646c696e67Vii1TbVQCra11_706173735468726f756768Vii1TbVQEba20_73746f704f6e46697273744e6f6e4f7074696f6eVii1TbVQGda16_6b656570456e644f664f7074696f6e73Vii1TbVQHxa8_7265717569726564Vii1ThVQJaa0_Vii2ZQJyFNaNbNiNfZQJy@Base 12 ++ _D3std8bitmanip__T9bitfieldsTbVAyaa6_666c44617368Vii1TbVQza6_666c5a65726fVii1TbVQBxa7_666c5370616365Vii1TbVQCya6_666c506c7573Vii1TbVQDxa6_666c48617368Vii1TbVQEwa7_666c457175616cVii1TbVQFxa11_666c536570617261746f72Vii1ThVQHha0_Vii1ZQIfFNaNbNiNfZQIf@Base 12 ++ _D3std8bitmanip__T9bitfieldsTkVAyaa8_6672616374696f6eVki23ThVQBea8_6578706f6e656e74Vki8TbVQCha4_7369676eVki1ZQDnFNaNbNiNfZQDn@Base 12 ++ _D3std8bitmanip__T9bitfieldsTmVAyaa8_6672616374696f6eVki52TtVQBea8_6578706f6e656e74Vki11TbVQCia4_7369676eVki1ZQDoFNaNbNiNfZQDo@Base 12 ++ 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_D3std8datetime4date13monthToStringFNaNfEQBnQBmQBg5MonthZAya@Base 12 ++ _D3std8datetime4date13monthsToMonthFNaNfiiZi@Base 12 ++ _D3std8datetime4date14lastDayNonLeapyG13i@Base 12 ++ _D3std8datetime4date14validTimeUnitsFNaNbNiNfAAyaXb@Base 12 ++ _D3std8datetime4date14yearIsLeapYearFNaNbNiNfiZb@Base 12 ++ _D3std8datetime4date15daysToDayOfWeekFNaNbNiNfEQBtQBsQBm9DayOfWeekQuZi@Base 12 ++ _D3std8datetime4date16cmpTimeUnitsCTFEFNaNbNiNfAyaQdZi@Base 12 ++ _D3std8datetime4date4Date10diffMonthsMxFNaNbNiNfSQBvQBuQBoQBmZi@Base 12 ++ _D3std8datetime4date4Date10endOfMonthMxFNaNbNdNfZSQBwQBvQBpQBn@Base 12 ++ _D3std8datetime4date4Date10isLeapYearMxFNaNbNdNiNfZb@Base 12 ++ _D3std8datetime4date4Date11__invariantMxFNaNfZv@Base 12 ++ _D3std8datetime4date4Date11daysInMonthMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date4Date11fromISOWeekFNaNbNiNfshEQBwQBvQBp9DayOfWeekZSQCrQCqQCkQCi@Base 12 ++ _D3std8datetime4date4Date11isoWeekYearMxFNaNbNdNfZs@Base 12 ++ _D3std8datetime4date4Date11toISOStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date4Date12__invariant0MxFNaNfZv@Base 12 ++ _D3std8datetime4date4Date12modJulianDayMxFNaNbNdNiNfZl@Base 12 ++ _D3std8datetime4date4Date14isoWeekAndYearMxFNaNbNdNfZ14ISOWeekAndYear6__initZ@Base 12 ++ _D3std8datetime4date4Date14isoWeekAndYearMxFNaNbNdNfZSQCaQBzQBtQBrQBpMxFNaNbNdNfZ14ISOWeekAndYear@Base 12 ++ _D3std8datetime4date4Date14toISOExtStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date4Date14toSimpleStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date4Date17dayOfGregorianCalMFNaNbNdNiNfiZv@Base 12 ++ _D3std8datetime4date4Date17dayOfGregorianCalMxFNaNbNdNiNfZi@Base 12 ++ _D3std8datetime4date4Date3dayMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date4Date3dayMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date4Date3maxFNaNbNdNiNfZSQBoQBnQBhQBf@Base 12 ++ _D3std8datetime4date4Date3minFNaNbNdNiNfZSQBoQBnQBhQBf@Base 12 ++ _D3std8datetime4date4Date4isADMxFNaNbNdNiNfZb@Base 12 ++ _D3std8datetime4date4Date4yearMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date4Date4yearMxFNaNbNdNiNfZs@Base 12 ++ _D3std8datetime4date4Date5monthMFNaNdNfEQBmQBlQBf5MonthZv@Base 12 ++ _D3std8datetime4date4Date5monthMxFNaNbNdNiNfZEQBsQBrQBl5Month@Base 12 ++ _D3std8datetime4date4Date5opCmpMxFNaNbNiNfSQBpQBoQBiQBgZi@Base 12 ++ _D3std8datetime4date4Date6__ctorMFNaNbNcNiNfiZSQBtQBsQBmQBk@Base 12 ++ _D3std8datetime4date4Date6__ctorMFNaNcNfiiiZSQBrQBqQBkQBi@Base 12 ++ _D3std8datetime4date4Date6__initZ@Base 12 ++ _D3std8datetime4date4Date6_validFNaNbNiNfiiiZb@Base 12 ++ _D3std8datetime4date4Date6yearBCMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date4Date6yearBCMxFNaNdNfZt@Base 12 ++ _D3std8datetime4date4Date7isoWeekMxFNaNbNdNfZh@Base 12 ++ _D3std8datetime4date4Date8__xopCmpMxFKxSQBmQBlQBfQBdZi@Base 12 ++ _D3std8datetime4date4Date8_addDaysMFNaNbNcNiNjNflZSQBxQBwQBqQBo@Base 12 ++ _D3std8datetime4date4Date8toStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date4Date9dayOfWeekMxFNaNbNdNiNfZEQBwQBvQBp9DayOfWeek@Base 12 ++ _D3std8datetime4date4Date9dayOfYearMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date4Date9dayOfYearMxFNaNbNdNiNfZt@Base 12 ++ _D3std8datetime4date4Date9julianDayMxFNaNbNdNiNfZl@Base 12 ++ _D3std8datetime4date4Date__T11toISOStringTSQBp5array__T8AppenderTAyaZQoZQBsMxFNaNfKQBpZv@Base 12 ++ _D3std8datetime4date4Date__T12setDayOfYearVbi0ZQtMFNaNbNiNfiZv@Base 12 ++ _D3std8datetime4date4Date__T12setDayOfYearVbi1ZQtMFNaNfiZv@Base 12 ++ _D3std8datetime4date4Date__T14toISOExtStringTSQBs5array__T8AppenderTAyaZQoZQBvMxFNaNfKQBpZv@Base 12 ++ _D3std8datetime4date4Date__T14toSimpleStringTSQBs5array__T8AppenderTAyaZQoZQBvMxFNaNfKQBpZv@Base 12 ++ _D3std8datetime4date4Date__T8opBinaryVAyaa1_2dZQtMxFNaNbNiNfSQChQCgQCaQByZS4core4time8Duration@Base 12 ++ _D3std8datetime4date5Month6__initZ@Base 12 ++ _D3std8datetime4date6maxDayFNaNbNiNfiiZh@Base 12 ++ _D3std8datetime4date8DateTime10diffMonthsMxFNaNbNiNfSQBzQByQBsQBqZi@Base 12 ++ _D3std8datetime4date8DateTime10endOfMonthMxFNaNbNdNfZSQCaQBzQBtQBr@Base 12 ++ _D3std8datetime4date8DateTime10isLeapYearMxFNaNbNdNiNfZb@Base 12 ++ _D3std8datetime4date8DateTime11_addSecondsMFNaNbNcNiNjNflZSQCfQCeQByQBw@Base 12 ++ _D3std8datetime4date8DateTime11daysInMonthMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date8DateTime11isoWeekYearMxFNaNbNdNfZs@Base 12 ++ _D3std8datetime4date8DateTime11toISOStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date8DateTime12modJulianDayMxFNaNbNdNiNfZl@Base 12 ++ _D3std8datetime4date8DateTime14toISOExtStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date8DateTime14toSimpleStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date8DateTime17dayOfGregorianCalMFNaNbNdNiNfiZv@Base 12 ++ _D3std8datetime4date8DateTime17dayOfGregorianCalMxFNaNbNdNiNfZi@Base 12 ++ _D3std8datetime4date8DateTime3dayMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date8DateTime3dayMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date8DateTime3maxFNaNbNdNiNfZSQBsQBrQBlQBj@Base 12 ++ _D3std8datetime4date8DateTime3minFNaNbNdNiNfZSQBsQBrQBlQBj@Base 12 ++ _D3std8datetime4date8DateTime4hourMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date8DateTime4hourMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date8DateTime4isADMxFNaNbNdNiNfZb@Base 12 ++ _D3std8datetime4date8DateTime4yearMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date8DateTime4yearMxFNaNbNdNiNfZs@Base 12 ++ _D3std8datetime4date8DateTime5monthMFNaNdNfEQBqQBpQBj5MonthZv@Base 12 ++ _D3std8datetime4date8DateTime5monthMxFNaNbNdNiNfZEQBwQBvQBp5Month@Base 12 ++ _D3std8datetime4date8DateTime5opCmpMxFNaNbNiNfSQBtQBsQBmQBkZi@Base 12 ++ _D3std8datetime4date8DateTime6__ctorMFNaNbNcNiNfSQBvQBuQBo4DateSQCkQCjQCd9TimeOfDayZSQDfQDeQCyQCw@Base 12 ++ _D3std8datetime4date8DateTime6__ctorMFNaNcNfiiiiiiZSQByQBxQBrQBp@Base 12 ++ _D3std8datetime4date8DateTime6__initZ@Base 12 ++ _D3std8datetime4date8DateTime6minuteMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date8DateTime6minuteMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date8DateTime6secondMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date8DateTime6secondMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date8DateTime6yearBCMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date8DateTime6yearBCMxFNaNdNfZs@Base 12 ++ _D3std8datetime4date8DateTime7isoWeekMxFNaNbNdNfZh@Base 12 ++ _D3std8datetime4date8DateTime8__xopCmpMxFKxSQBqQBpQBjQBhZi@Base 12 ++ _D3std8datetime4date8DateTime8toStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date8DateTime9dayOfWeekMxFNaNbNdNiNfZEQCaQBzQBt9DayOfWeek@Base 12 ++ _D3std8datetime4date8DateTime9dayOfYearMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date8DateTime9dayOfYearMxFNaNbNdNiNfZt@Base 12 ++ _D3std8datetime4date8DateTime9julianDayMxFNaNbNdNiNfZl@Base 12 ++ _D3std8datetime4date8DateTime9timeOfDayMFNaNbNdNiNfSQByQBxQBr9TimeOfDayZv@Base 12 ++ _D3std8datetime4date8DateTime9timeOfDayMxFNaNbNdNiNfZSQCaQBzQBt9TimeOfDay@Base 12 ++ _D3std8datetime4date8DateTimeQoMFNaNbNdNiNfSQBqQBpQBj4DateZv@Base 12 ++ _D3std8datetime4date8DateTimeQoMxFNaNbNdNiNfZSQBsQBrQBl4Date@Base 12 ++ _D3std8datetime4date8DateTime__T11toISOStringTSQBt5array__T8AppenderTAyaZQoZQBsMxFNaNfKQBpZv@Base 12 ++ _D3std8datetime4date8DateTime__T14toISOExtStringTSQBw5array__T8AppenderTAyaZQoZQBvMxFNaNfKQBpZv@Base 12 ++ _D3std8datetime4date8DateTime__T14toSimpleStringTSQBw5array__T8AppenderTAyaZQoZQBvMxFNaNfKQBpZv@Base 12 ++ _D3std8datetime4date9TimeOfDay11__invariantMxFNaNfZv@Base 12 ++ _D3std8datetime4date9TimeOfDay11_addSecondsMFNaNbNcNiNjNflZSQCgQCfQBzQBx@Base 12 ++ _D3std8datetime4date9TimeOfDay11toISOStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date9TimeOfDay12__invariant0MxFNaNfZv@Base 12 ++ _D3std8datetime4date9TimeOfDay14toISOExtStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date9TimeOfDay3maxFNaNbNdNiNfZSQBtQBsQBmQBk@Base 12 ++ _D3std8datetime4date9TimeOfDay3minFNaNbNdNiNfZSQBtQBsQBmQBk@Base 12 ++ _D3std8datetime4date9TimeOfDay4hourMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date9TimeOfDay4hourMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date9TimeOfDay5opCmpMxFNaNbNiNfSQBuQBtQBnQBlZi@Base 12 ++ _D3std8datetime4date9TimeOfDay6__ctorMFNaNcNfiiiZSQBwQBvQBpQBn@Base 12 ++ _D3std8datetime4date9TimeOfDay6__initZ@Base 12 ++ _D3std8datetime4date9TimeOfDay6_validFNaNbNiNfiiiZb@Base 12 ++ _D3std8datetime4date9TimeOfDay6minuteMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date9TimeOfDay6minuteMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date9TimeOfDay6secondMFNaNdNfiZv@Base 12 ++ _D3std8datetime4date9TimeOfDay6secondMxFNaNbNdNiNfZh@Base 12 ++ _D3std8datetime4date9TimeOfDay8__xopCmpMxFKxSQBrQBqQBkQBiZi@Base 12 ++ _D3std8datetime4date9TimeOfDay8toStringMxFNaNbNfZAya@Base 12 ++ _D3std8datetime4date9TimeOfDay__T11toISOStringTSQBu5array__T8AppenderTAyaZQoZQBsMxFNaNfKQBpZv@Base 12 ++ _D3std8datetime4date9TimeOfDay__T14toISOExtStringTSQBx5array__T8AppenderTAyaZQoZQBvMxFNaNfKQBpZv@Base 12 ++ _D3std8datetime4date9TimeOfDay__T8opBinaryVAyaa1_2dZQtMxFNaNbNiNfSQCmQClQCfQCdZS4core4time8Duration@Base 12 ++ _D3std8datetime4date__T12enforceValidVAyaa4_64617973ZQBeFNaNfiEQCjQCiQCc5MonthiQBpmZv@Base 12 ++ _D3std8datetime4date__T12enforceValidVAyaa5_686f757273ZQBgFNaNfiQBamZv@Base 12 ++ _D3std8datetime4date__T12enforceValidVAyaa6_6d6f6e746873ZQBiFNaNfiQBcmZv@Base 12 ++ _D3std8datetime4date__T12enforceValidVAyaa7_6d696e75746573ZQBkFNaNfiQBemZv@Base 12 ++ _D3std8datetime4date__T12enforceValidVAyaa7_7365636f6e6473ZQBkFNaNfiQBemZv@Base 12 ++ _D3std8datetime4date__T20splitUnitsFromHNSecsVAyaa4_64617973ZQBmFNaNbNiNfKlZl@Base 12 ++ _D3std8datetime4date__T20splitUnitsFromHNSecsVAyaa5_686f757273ZQBoFNaNbNiNfKlZl@Base 12 ++ _D3std8datetime4date__T20splitUnitsFromHNSecsVAyaa7_6d696e75746573ZQBsFNaNbNiNfKlZl@Base 12 ++ _D3std8datetime4date__T20splitUnitsFromHNSecsVAyaa7_7365636f6e6473ZQBsFNaNbNiNfKlZl@Base 12 ++ _D3std8datetime4date__T5validVAyaa4_64617973ZQwFNaNbNiNfiiiZb@Base 12 ++ _D3std8datetime4date__T5validVAyaa5_686f757273ZQyFNaNbNiNfiZb@Base 12 ++ _D3std8datetime4date__T5validVAyaa6_6d6f6e746873ZQBaFNaNbNiNfiZb@Base 12 ++ _D3std8datetime4date__T5validVAyaa7_6d696e75746573ZQBcFNaNbNiNfiZb@Base 12 ++ _D3std8datetime4date__T5validVAyaa7_7365636f6e6473ZQBcFNaNbNiNfiZb@Base 12 ++ _D3std8datetime7systime11__moduleRefZ@Base 12 ++ _D3std8datetime7systime12__ModuleInfoZ@Base 12 ++ _D3std8datetime7systime17unixTimeToStdTimeFNaNbNiNflZl@Base 12 ++ _D3std8datetime7systime19fracSecsToISOStringFNaNbNfiiZAya@Base 12 ++ _D3std8datetime7systime20DosFileTimeToSysTimeFNfkyCQBxQBw8timezone8TimeZoneZSQCxQCwQCq7SysTime@Base 12 ++ _D3std8datetime7systime20SysTimeToDosFileTimeFNfMSQBwQBvQBp7SysTimeZk@Base 12 ++ _D3std8datetime7systime5Clock6__initZ@Base 12 ++ _D3std8datetime7systime5Clock6__vtblZ@Base 12 ++ _D3std8datetime7systime5Clock7__ClassZ@Base 12 ++ _D3std8datetime7systime5Clock__T11currStdTimeVE4core4time9ClockTypei0ZQBmFNbNdNiNeZl@Base 12 ++ _D3std8datetime7systime5Clock__T8currTimeVE4core4time9ClockTypei0ZQBiFNbNfyCQCwQCv8timezone8TimeZoneZSQDwQDvQDp7SysTime@Base 12 ++ _D3std8datetime7systime7SysTime10diffMonthsMxFNbNlNfMSQCaQBzQBtQBoZi@Base 12 ++ _D3std8datetime7systime7SysTime10endOfMonthMxFNbNdNjNfZSQCcQCbQBvQBq@Base 12 ++ _D3std8datetime7systime7SysTime10isLeapYearMxFNbNdNlNfZb@Base 12 ++ _D3std8datetime7systime7SysTime10toTimeSpecMxFNaNbNlNfZS4core3sys5posix6signal8timespec@Base 12 ++ _D3std8datetime7systime7SysTime11__xopEqualsMxFKxSQBwQBvQBpQBkZb@Base 12 ++ _D3std8datetime7systime7SysTime11daysInMonthMxFNbNdNlNfZh@Base 12 ++ _D3std8datetime7systime7SysTime11dstInEffectMxFNbNdNlNfZb@Base 12 ++ _D3std8datetime7systime7SysTime11toISOStringMxFNbNlNfZAya@Base 12 ++ _D3std8datetime7systime7SysTime11toLocalTimeMxFNaNbNlNfZSQCdQCcQBwQBr@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone11dstInEffectMxFNbNiNlNflZb@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone11utcOffsetAtMxFNbNiNlNflZS4core4time8Duration@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone13_initTimeZoneyCQCiQChQCbQBwQBr@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone6__ctorMyFNaNfZyCQCiQChQCbQBwQBr@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone6__initZ@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone6__vtblZ@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone6hasDSTMxFNbNdNiNfZb@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone6opCallFNaNbNiNfZyCQCkQCjQCdQByQBt@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone7__ClassZ@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone7tzToUTCMxFNbNiNlNflZl@Base 12 ++ _D3std8datetime7systime7SysTime12InitTimeZone7utcToTZMxFNbNiNlNflZl@Base 12 ++ _D3std8datetime7systime7SysTime12fromUnixTimeFNaNbNflyCQCbQCa8timezone8TimeZoneZSQDbQDaQCuQCp@Base 12 ++ _D3std8datetime7systime7SysTime12modJulianDayMxFNbNdNlNfZl@Base 12 ++ _D3std8datetime7systime7SysTime14toISOExtStringMxFNbNlNfiZAya@Base 12 ++ _D3std8datetime7systime7SysTime14toSimpleStringMxFNbNlNfZAya@Base 12 ++ _D3std8datetime7systime7SysTime17dayOfGregorianCalMFNbNdNlNfiZv@Base 12 ++ _D3std8datetime7systime7SysTime17dayOfGregorianCalMxFNbNdNlNfZi@Base 12 ++ _D3std8datetime7systime7SysTime3dayMFNdNlNfiZv@Base 12 ++ _D3std8datetime7systime7SysTime3dayMxFNbNdNlNfZh@Base 12 ++ _D3std8datetime7systime7SysTime3maxFNaNbNdNfZSQBsQBrQBlQBg@Base 12 ++ _D3std8datetime7systime7SysTime3minFNaNbNdNfZSQBsQBrQBlQBg@Base 12 ++ _D3std8datetime7systime7SysTime4hourMFNdNlNfiZv@Base 12 ++ _D3std8datetime7systime7SysTime4hourMxFNbNdNlNfZh@Base 12 ++ _D3std8datetime7systime7SysTime4isADMxFNbNdNlNfZb@Base 12 ++ _D3std8datetime7systime7SysTime4toTMMxFNbNlNfZS4core3sys5posix4stdc4time2tm@Base 12 ++ _D3std8datetime7systime7SysTime4yearMFNdNlNfiZv@Base 12 ++ _D3std8datetime7systime7SysTime4yearMxFNbNdNlNfZs@Base 12 ++ _D3std8datetime7systime7SysTime5monthMFNdNlNfEQBsQBr4date5MonthZv@Base 12 ++ _D3std8datetime7systime7SysTime5monthMxFNbNdNlNfZEQBwQBv4date5Month@Base 12 ++ _D3std8datetime7systime7SysTime5toUTCMxFNaNbNlNfZSQBwQBvQBpQBk@Base 12 ++ _D3std8datetime7systime7SysTime6__ctorMFNaNbNcNjNflNkMyCQCcQCb8timezone8TimeZoneZSQDcQDbQCvQCq@Base 12 ++ _D3std8datetime7systime7SysTime6__ctorMFNbNcNjNfSQBvQBu4date4DateNkMyCQCqQCp8timezone8TimeZoneZSQDqQDpQDjQDe@Base 12 ++ _D3std8datetime7systime7SysTime6__ctorMFNbNcNjNfSQBvQBu4date8DateTimeNkMyCQCuQCt8timezone8TimeZoneZSQDuQDtQDnQDi@Base 12 ++ _D3std8datetime7systime7SysTime6__ctorMFNcNjNfSQBtQBs4date8DateTimeS4core4time8DurationNkMyCQDmQDl8timezone8TimeZoneZSQEmQElQEfQEa@Base 12 ++ _D3std8datetime7systime7SysTime6__initZ@Base 12 ++ _D3std8datetime7systime7SysTime6minuteMFNdNlNfiZv@Base 12 ++ _D3std8datetime7systime7SysTime6minuteMxFNbNdNlNfZh@Base 12 ++ _D3std8datetime7systime7SysTime6secondMFNdNlNfiZv@Base 12 ++ _D3std8datetime7systime7SysTime6secondMxFNbNdNlNfZh@Base 12 ++ _D3std8datetime7systime7SysTime6toHashMxFNaNbNiNlNfZm@Base 12 ++ _D3std8datetime7systime7SysTime6yearBCMFNdNlNfiZv@Base 12 ++ _D3std8datetime7systime7SysTime6yearBCMxFNdNlNfZt@Base 12 ++ _D3std8datetime7systime7SysTime7adjTimeMFNbNdNlNflZv@Base 12 ++ _D3std8datetime7systime7SysTime7adjTimeMxFNbNdNlNfZl@Base 12 ++ _D3std8datetime7systime7SysTime7isoWeekMxFNbNdNlNfZh@Base 12 ++ _D3std8datetime7systime7SysTime7stdTimeMFNaNbNdNlNflZv@Base 12 ++ _D3std8datetime7systime7SysTime7stdTimeMxFNaNbNdNiNlNfZl@Base 12 ++ _D3std8datetime7systime7SysTime8__xopCmpMxFKxSQBsQBrQBlQBgZi@Base 12 ++ _D3std8datetime7systime7SysTime8fracSecsMFNdNlNfS4core4time8DurationZv@Base 12 ++ _D3std8datetime7systime7SysTime8fracSecsMxFNbNdNlNfZS4core4time8Duration@Base 12 ++ _D3std8datetime7systime7SysTime8timezoneMFNaNbNdNlNfyCQCaQBzQBd8TimeZoneZv@Base 12 ++ _D3std8datetime7systime7SysTime8timezoneMxFNaNbNdNjNfZyCQCcQCbQBf8TimeZone@Base 12 ++ _D3std8datetime7systime7SysTime8toStringMxFNbNlNfZAya@Base 12 ++ _D3std8datetime7systime7SysTime9_timezoneMFNaNbNdNiNlNfNkMyCQCgQCf8timezone8TimeZoneZv@Base 12 ++ _D3std8datetime7systime7SysTime9_timezoneMxFNaNbNdNiNfZyCQCdQCc8timezone8TimeZone@Base 12 ++ _D3std8datetime7systime7SysTime9dayOfWeekMxFNbNdNlNfZEQCaQBz4date9DayOfWeek@Base 12 ++ _D3std8datetime7systime7SysTime9dayOfYearMFNdNlNfiZv@Base 12 ++ _D3std8datetime7systime7SysTime9dayOfYearMxFNbNdNlNfZt@Base 12 ++ _D3std8datetime7systime7SysTime9julianDayMxFNbNdNlNfZl@Base 12 ++ _D3std8datetime7systime7SysTime9toOtherTZMxFNaNbNlNfyCQCaQBz8timezone8TimeZoneZSQDaQCzQCtQCo@Base 12 ++ _D3std8datetime7systime7SysTime9toTimeValMxFNaNbNlNfZS4core3sys5posixQk4time7timeval@Base 12 ++ _D3std8datetime7systime7SysTime9utcOffsetMxFNbNdNlNfZS4core4time8Duration@Base 12 ++ _D3std8datetime7systime7SysTime__T10toUnixTimeTlZQpMxFNaNbNiNlNfZl@Base 12 ++ _D3std8datetime7systime7SysTime__T11toISOStringTSQBv5array__T8AppenderTAyaZQoZQBsMxFNlNfKQBpZv@Base 12 ++ _D3std8datetime7systime7SysTime__T14toISOExtStringTSQBy5array__T8AppenderTAyaZQoZQBvMxFNlNfKQBpiZv@Base 12 ++ _D3std8datetime7systime7SysTime__T14toSimpleStringTSQBy5array__T8AppenderTAyaZQoZQBvMxFNlNfKQBpZv@Base 12 ++ _D3std8datetime7systime7SysTime__T5opCmpZQhMxFNaNbNiNlNfKxSQCfQCeQByQBtZi@Base 12 ++ _D3std8datetime7systime7SysTime__T6opCastTSQBpQBo4date4DateZQBaMxFNbNlNfZQBf@Base 12 ++ _D3std8datetime7systime7SysTime__T6opCastTSQBpQBo4date8DateTimeZQBeMxFNbNlNfZQBj@Base 12 ++ _D3std8datetime7systime7SysTime__T8opAssignZQkMFNaNbNcNiNjNfKxSQCjQCiQCcQBxZSQCxQCwQCqQCl@Base 12 ++ _D3std8datetime7systime7SysTime__T8opEqualsZQkMxFNaNbNiNlNfKxSQCiQChQCbQBwZb@Base 12 ++ _D3std8datetime7systime__T17stdTimeToUnixTimeTlZQwFNaNbNiNflZl@Base 12 ++ _D3std8datetime7systime__T18getUnitsFromHNSecsVAyaa4_64617973ZQBkFNaNbNiNflZl@Base 12 ++ _D3std8datetime7systime__T18getUnitsFromHNSecsVAyaa5_686f757273ZQBmFNaNbNiNflZl@Base 12 ++ _D3std8datetime7systime__T18getUnitsFromHNSecsVAyaa7_6d696e75746573ZQBqFNaNbNiNflZl@Base 12 ++ _D3std8datetime7systime__T18getUnitsFromHNSecsVAyaa7_7365636f6e6473ZQBqFNaNbNiNflZl@Base 12 ++ _D3std8datetime7systime__T19fracSecsToISOStringTSQBv5array__T8AppenderTAyaZQoZQCaFNaNbNfKQBpiiZv@Base 12 ++ _D3std8datetime7systime__T21removeUnitsFromHNSecsVAyaa4_64617973ZQBnFNaNbNiNflZl@Base 12 ++ _D3std8datetime7systime__T21removeUnitsFromHNSecsVAyaa5_686f757273ZQBpFNaNbNiNflZl@Base 12 ++ _D3std8datetime7systime__T21removeUnitsFromHNSecsVAyaa7_6d696e75746573ZQBtFNaNbNiNflZl@Base 12 ++ _D3std8datetime7systime__T21removeUnitsFromHNSecsVAyaa7_7365636f6e6473ZQBtFNaNbNiNflZl@Base 12 ++ _D3std8datetime8interval11__moduleRefZ@Base 12 ++ _D3std8datetime8interval12__ModuleInfoZ@Base 12 ++ _D3std8datetime8timezone11__moduleRefZ@Base 12 ++ _D3std8datetime8timezone11setTZEnvVarFNbNeAyaZv@Base 12 ++ _D3std8datetime8timezone12__ModuleInfoZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone10LeapSecond6__ctorMFNaNcNfliZSQCqQCpQCjQCdQBr@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone10LeapSecond6__initZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone10TempTTInfo6__ctorMFNaNcNfibhZSQCrQCqQCkQCeQBs@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone10TempTTInfo6__initZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone10Transition6__ctorMFNaNcNflPySQCqQCpQCjQCd6TTInfoZSQDlQDkQDeQCyQCm@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone10Transition6__initZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone11dstInEffectMxFNbNlNflZb@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone11getTimeZoneFNeAyaQdZyCQCjQCiQCcQBw@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone14TempTransition6__ctorMFNaNcNflPySQCuQCtQCnQCh6TTInfoPSQDpQDoQDiQDc14TransitionTypeZSQEtQEsQEmQEgQDu@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone14TempTransition6__initZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone14TransitionType6__ctorMFNaNcNfbbZSQCuQCtQCnQChQBv@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone14TransitionType6__initZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone19_enforceValidTZFileFNaNfbmZv@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone19getInstalledTZNamesFNfAyaQdZAQh@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone20calculateLeapSecondsMxFNaNbNlNflZi@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone6TTInfo11__xopEqualsMxFKxSQClQCkQCeQByQBmZb@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone6TTInfo6__ctorMyFNaNcNfxSQCkQCjQCdQBx10TempTTInfoAyaZySQDoQDnQDhQDbQCp@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone6TTInfo6__initZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone6TTInfo9__xtoHashFNbNeKxSQCkQCjQCdQBxQBlZm@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone6__ctorMyFNaNfyASQCcQCbQBvQBp10TransitionyASQDdQDcQCwQCq10LeapSecondAyaQdQfbZyCQEmQElQEfQDz@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone6__initZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone6__vtblZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone6hasDSTMxFNbNdNfZb@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone7__ClassZ@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone7tzToUTCMxFNbNlNflZl@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone7utcToTZMxFNbNlNflZl@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone__T7readValTAaZQmFNeKSQCh5stdio4FilemZQBa@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone__T7readValTAhZQmFNeKSQCh5stdio4FilemZQBa@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone__T7readValTSQByQBxQBrQBl10TempTTInfoZQBjFNfKSQDf5stdio4FileZQBx@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone__T7readValTaZQlFNeKSQCg5stdio4FileZa@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone__T7readValTbZQlFNeKSQCg5stdio4FileZb@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone__T7readValThZQlFNeKSQCg5stdio4FileZh@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone__T7readValTiZQlFNeKSQCg5stdio4FileZi@Base 12 ++ _D3std8datetime8timezone13PosixTimeZone__T7readValTlZQlFNeKSQCg5stdio4FileZl@Base 12 ++ _D3std8datetime8timezone13TZConversions11__xopEqualsMxFKxSQCeQCdQBxQBrZb@Base 12 ++ _D3std8datetime8timezone13TZConversions6__initZ@Base 12 ++ _D3std8datetime8timezone13TZConversions9__xtoHashFNbNeKxSQCdQCcQBwQBqZm@Base 12 ++ _D3std8datetime8timezone13clearTZEnvVarFNbNeZv@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone11dstInEffectMxFNbNlNflZb@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone11toISOStringFNaNfS4core4time8DurationZAya@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone11utcOffsetAtMxFNbNlNflZS4core4time8Duration@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone14toISOExtStringFNaNfS4core4time8DurationZAya@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone6__ctorMyFNaNfS4core4time8DurationAyaZyCQDaQCzQCtQCn@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone6__initZ@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone6__vtblZ@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone6hasDSTMxFNbNdNfZb@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone7__ClassZ@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone7tzToUTCMxFNbNlNflZl@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone7utcToTZMxFNbNlNflZl@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone9utcOffsetMxFNaNbNdNfZS4core4time8Duration@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone__T11toISOStringTSQCe5array__T8AppenderTAyaZQoZQBsFNaNfKQBnS4core4time8DurationZv@Base 12 ++ _D3std8datetime8timezone14SimpleTimeZone__T14toISOExtStringTSQCh5array__T8AppenderTAyaZQoZQBvFNaNfKQBnS4core4time8DurationZv@Base 12 ++ _D3std8datetime8timezone18parseTZConversionsFNaNfAyaZSQCaQBzQBt13TZConversions@Base 12 ++ _D3std8datetime8timezone3UTC11dstInEffectMxFNbNlNflZb@Base 12 ++ _D3std8datetime8timezone3UTC11utcOffsetAtMxFNbNlNflZS4core4time8Duration@Base 12 ++ _D3std8datetime8timezone3UTC4_utcyCQBhQBgQBaQu@Base 12 ++ _D3std8datetime8timezone3UTC6__ctorMyFNaNfZyCQBrQBqQBkQBe@Base 12 ++ _D3std8datetime8timezone3UTC6__initZ@Base 12 ++ _D3std8datetime8timezone3UTC6__vtblZ@Base 12 ++ _D3std8datetime8timezone3UTC6hasDSTMxFNbNdNfZb@Base 12 ++ _D3std8datetime8timezone3UTC6opCallFNaNbNfZyCQBrQBqQBkQBe@Base 12 ++ _D3std8datetime8timezone3UTC7__ClassZ@Base 12 ++ _D3std8datetime8timezone3UTC7tzToUTCMxFNbNlNflZl@Base 12 ++ _D3std8datetime8timezone3UTC7utcToTZMxFNbNlNflZl@Base 12 ++ _D3std8datetime8timezone8TimeZone11_getOldNameFNaNbNfAyaZQe@Base 12 ++ _D3std8datetime8timezone8TimeZone11utcOffsetAtMxFNbNlNflZS4core4time8Duration@Base 12 ++ _D3std8datetime8timezone8TimeZone4nameMxFNbNdNfZAya@Base 12 ++ _D3std8datetime8timezone8TimeZone6__ctorMyFNaNfAyaQdQfZyCQCdQCcQBwQBq@Base 12 ++ _D3std8datetime8timezone8TimeZone6__initZ@Base 12 ++ _D3std8datetime8timezone8TimeZone6__vtblZ@Base 12 ++ _D3std8datetime8timezone8TimeZone7__ClassZ@Base 12 ++ _D3std8datetime8timezone8TimeZone7dstNameMxFNbNdNlNfZAya@Base 12 ++ _D3std8datetime8timezone8TimeZone7stdNameMxFNbNdNlNfZAya@Base 12 ++ _D3std8datetime8timezone9LocalTime11dstInEffectMxFNbNlNelZb@Base 12 ++ _D3std8datetime8timezone9LocalTime6__ctorMyFNaNfZyCQBxQBwQBqQBk@Base 12 ++ _D3std8datetime8timezone9LocalTime6__initZ@Base 12 ++ _D3std8datetime8timezone9LocalTime6__vtblZ@Base 12 ++ _D3std8datetime8timezone9LocalTime6hasDSTMxFNbNdNeZb@Base 12 ++ _D3std8datetime8timezone9LocalTime6opCallFNaNbNeZyCQBxQBwQBqQBk@Base 12 ++ _D3std8datetime8timezone9LocalTime7__ClassZ@Base 12 ++ _D3std8datetime8timezone9LocalTime7dstNameMxFNbNdNlNeZAya@Base 12 ++ _D3std8datetime8timezone9LocalTime7stdNameMxFNbNdNlNeZAya@Base 12 ++ _D3std8datetime8timezone9LocalTime7tzToUTCMxFNbNlNelZl@Base 12 ++ _D3std8datetime8timezone9LocalTime7utcToTZMxFNbNlNelZl@Base 12 ++ _D3std8datetime8timezone9LocalTime9singletonFNeZ5guardOb@Base 12 ++ _D3std8datetime8timezone9LocalTime9singletonFNeZ8instanceyCQCfQCeQByQBs@Base 12 ++ _D3std8datetime8timezone9LocalTime9singletonFNeZ9__lambda3FNbNiNfZb@Base 12 ++ _D3std8datetime8timezone9LocalTime9singletonFNeZyCQBwQBvQBpQBj@Base 12 ++ _D3std8datetime9stopwatch11__moduleRefZ@Base 12 ++ _D3std8datetime9stopwatch12__ModuleInfoZ@Base 12 ++ _D3std8datetime9stopwatch9StopWatch14setTimeElapsedMFNbNiNfS4core4time8DurationZv@Base 12 ++ _D3std8datetime9stopwatch9StopWatch4peekMxFNbNiNfZS4core4time8Duration@Base 12 ++ _D3std8datetime9stopwatch9StopWatch4stopMFNbNiNfZv@Base 12 ++ _D3std8datetime9stopwatch9StopWatch5resetMFNbNiNfZv@Base 12 ++ _D3std8datetime9stopwatch9StopWatch5startMFNbNiNfZv@Base 12 ++ _D3std8datetime9stopwatch9StopWatch6__ctorMFNbNcNiNfEQBz8typecons__T4FlagVAyaa9_6175746f5374617274ZQBfZSQDyQDxQDrQDk@Base 12 ++ _D3std8datetime9stopwatch9StopWatch6__initZ@Base 12 ++ _D3std8datetime9stopwatch9StopWatch7runningMxFNaNbNdNiNfZb@Base 12 ++ _D3std8demangle11__moduleRefZ@Base 12 ++ _D3std8demangle12__ModuleInfoZ@Base 12 ++ _D3std8demangleQjFNaNbNfAyaZQe@Base 12 ++ _D3std8encoding11__moduleRefZ@Base 12 ++ _D3std8encoding12__ModuleInfoZ@Base 12 ++ _D3std8encoding14EncodingScheme18supportedFactoriesHAyaQd@Base 12 ++ _D3std8encoding14EncodingScheme6__initZ@Base 12 ++ _D3std8encoding14EncodingScheme6__vtblZ@Base 12 ++ _D3std8encoding14EncodingScheme6createFAyaZ11initializedOb@Base 12 ++ _D3std8encoding14EncodingScheme6createFAyaZ24registerDefaultEncodingsFZb@Base 12 ++ _D3std8encoding14EncodingScheme6createFAyaZCQBqQBpQBj@Base 12 ++ _D3std8encoding14EncodingScheme7__ClassZ@Base 12 ++ _D3std8encoding14EncodingScheme7isValidMFAxhZb@Base 12 ++ _D3std8encoding14EncodingScheme8registerFAyaZv@Base 12 ++ _D3std8encoding14EncodingScheme9supportedHAyaPFZCQBvQBuQBo@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr18EncodingSchemeUtf8ZQBnFZ9__lambda5FNaNbNfZCQDrQDqQDk@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr18EncodingSchemeUtf8ZQBnFZv@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr19EncodingSchemeASCIIZQBoFZ9__lambda5FNaNbNfZCQDsQDrQDl@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr19EncodingSchemeASCIIZQBoFZv@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr20EncodingSchemeLatin1ZQBpFZ9__lambda5FNaNbNfZCQDtQDsQDm@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr20EncodingSchemeLatin1ZQBpFZv@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr20EncodingSchemeLatin2ZQBpFZ9__lambda5FNaNbNfZCQDtQDsQDm@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr20EncodingSchemeLatin2ZQBpFZv@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeUtf16NativeZQBuFZ9__lambda5FNaNbNfZCQDyQDxQDr@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeUtf16NativeZQBuFZv@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeUtf32NativeZQBuFZ9__lambda5FNaNbNfZCQDyQDxQDr@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeUtf32NativeZQBuFZv@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeWindows1250ZQBuFZ9__lambda5FNaNbNfZCQDyQDxQDr@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeWindows1250ZQBuFZv@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeWindows1251ZQBuFZ9__lambda5FNaNbNfZCQDyQDxQDr@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeWindows1251ZQBuFZv@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeWindows1252ZQBuFZ9__lambda5FNaNbNfZCQDyQDxQDr@Base 12 ++ _D3std8encoding14EncodingScheme__T8registerHTCQBsQBr25EncodingSchemeWindows1252ZQBuFZv@Base 12 ++ _D3std8encoding16isValidCodePointFNaNbNiNfwZb@Base 12 ++ _D3std8encoding17EncodingException6__ctorMFNaNfAyaZCQByQBxQBr@Base 12 ++ _D3std8encoding17EncodingException6__initZ@Base 12 ++ _D3std8encoding17EncodingException6__vtblZ@Base 12 ++ _D3std8encoding17EncodingException7__ClassZ@Base 12 ++ _D3std8encoding18EncodingSchemeUtf810safeDecodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding18EncodingSchemeUtf813encodedLengthMxFNaNbNiNfwZm@Base 12 ++ _D3std8encoding18EncodingSchemeUtf819replacementSequenceMxFNaNbNdNiNfZAyh@Base 12 ++ _D3std8encoding18EncodingSchemeUtf85namesMxFNaNbNfZAAya@Base 12 ++ _D3std8encoding18EncodingSchemeUtf86__initZ@Base 12 ++ _D3std8encoding18EncodingSchemeUtf86__vtblZ@Base 12 ++ _D3std8encoding18EncodingSchemeUtf86decodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding18EncodingSchemeUtf86encodeMxFNaNbNiNfwAhZm@Base 12 ++ _D3std8encoding18EncodingSchemeUtf87__ClassZ@Base 12 ++ _D3std8encoding18EncodingSchemeUtf88toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std8encoding18EncodingSchemeUtf89canEncodeMxFNaNbNiNfwZb@Base 12 ++ _D3std8encoding19EncodingSchemeASCII10safeDecodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding19EncodingSchemeASCII13encodedLengthMxFNaNbNiNfwZm@Base 12 ++ _D3std8encoding19EncodingSchemeASCII19replacementSequenceMxFNaNbNdNiNfZAyh@Base 12 ++ _D3std8encoding19EncodingSchemeASCII5namesMxFNaNbNfZAAya@Base 12 ++ _D3std8encoding19EncodingSchemeASCII6__initZ@Base 12 ++ _D3std8encoding19EncodingSchemeASCII6__vtblZ@Base 12 ++ _D3std8encoding19EncodingSchemeASCII6decodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding19EncodingSchemeASCII6encodeMxFNaNbNiNfwAhZm@Base 12 ++ _D3std8encoding19EncodingSchemeASCII7__ClassZ@Base 12 ++ _D3std8encoding19EncodingSchemeASCII8toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std8encoding19EncodingSchemeASCII9canEncodeMxFNaNbNiNfwZb@Base 12 ++ _D3std8encoding20EncodingSchemeLatin110safeDecodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding20EncodingSchemeLatin113encodedLengthMxFNaNbNiNfwZm@Base 12 ++ _D3std8encoding20EncodingSchemeLatin119replacementSequenceMxFNaNbNdNiNfZAyh@Base 12 ++ _D3std8encoding20EncodingSchemeLatin15namesMxFNaNbNfZAAya@Base 12 ++ _D3std8encoding20EncodingSchemeLatin16__initZ@Base 12 ++ _D3std8encoding20EncodingSchemeLatin16__vtblZ@Base 12 ++ _D3std8encoding20EncodingSchemeLatin16decodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding20EncodingSchemeLatin16encodeMxFNaNbNiNfwAhZm@Base 12 ++ _D3std8encoding20EncodingSchemeLatin17__ClassZ@Base 12 ++ _D3std8encoding20EncodingSchemeLatin18toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std8encoding20EncodingSchemeLatin19canEncodeMxFNaNbNiNfwZb@Base 12 ++ _D3std8encoding20EncodingSchemeLatin210safeDecodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding20EncodingSchemeLatin213encodedLengthMxFNaNbNiNfwZm@Base 12 ++ _D3std8encoding20EncodingSchemeLatin219replacementSequenceMxFNaNbNdNiNfZAyh@Base 12 ++ _D3std8encoding20EncodingSchemeLatin25namesMxFNaNbNfZAAya@Base 12 ++ _D3std8encoding20EncodingSchemeLatin26__initZ@Base 12 ++ _D3std8encoding20EncodingSchemeLatin26__vtblZ@Base 12 ++ _D3std8encoding20EncodingSchemeLatin26decodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding20EncodingSchemeLatin26encodeMxFNaNbNiNfwAhZm@Base 12 ++ _D3std8encoding20EncodingSchemeLatin27__ClassZ@Base 12 ++ _D3std8encoding20EncodingSchemeLatin28toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std8encoding20EncodingSchemeLatin29canEncodeMxFNaNbNiNfwZb@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native10safeDecodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native13encodedLengthMxFNaNbNiNfwZm@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native19replacementSequenceMxFNaNbNdNiNfZAyh@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native5namesMxFNaNbNfZAAya@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native6__initZ@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native6__vtblZ@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native6decodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native6encodeMxFNaNbNiNfwAhZm@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native7__ClassZ@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native8toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std8encoding25EncodingSchemeUtf16Native9canEncodeMxFNaNbNiNfwZb@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native10safeDecodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native13encodedLengthMxFNaNbNiNfwZm@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native19replacementSequenceMxFNaNbNdNiNfZAyh@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native5namesMxFNaNbNfZAAya@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native6__initZ@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native6__vtblZ@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native6decodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native6encodeMxFNaNbNiNfwAhZm@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native7__ClassZ@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native8toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std8encoding25EncodingSchemeUtf32Native9canEncodeMxFNaNbNiNfwZb@Base 12 ++ _D3std8encoding25EncodingSchemeWindows125010safeDecodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeWindows125013encodedLengthMxFNaNbNiNfwZm@Base 12 ++ _D3std8encoding25EncodingSchemeWindows125019replacementSequenceMxFNaNbNdNiNfZAyh@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12505namesMxFNaNbNfZAAya@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12506__initZ@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12506__vtblZ@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12506decodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12506encodeMxFNaNbNiNfwAhZm@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12507__ClassZ@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12508toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12509canEncodeMxFNaNbNiNfwZb@Base 12 ++ _D3std8encoding25EncodingSchemeWindows125110safeDecodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeWindows125113encodedLengthMxFNaNbNiNfwZm@Base 12 ++ _D3std8encoding25EncodingSchemeWindows125119replacementSequenceMxFNaNbNdNiNfZAyh@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12515namesMxFNaNbNfZAAya@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12516__initZ@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12516__vtblZ@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12516decodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12516encodeMxFNaNbNiNfwAhZm@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12517__ClassZ@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12518toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12519canEncodeMxFNaNbNiNfwZb@Base 12 ++ _D3std8encoding25EncodingSchemeWindows125210safeDecodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeWindows125213encodedLengthMxFNaNbNiNfwZm@Base 12 ++ _D3std8encoding25EncodingSchemeWindows125219replacementSequenceMxFNaNbNdNiNfZAyh@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12525namesMxFNaNbNfZAAya@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12526__initZ@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12526__vtblZ@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12526decodeMxFNaNbNiNfKAxhZw@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12526encodeMxFNaNbNiNfwAhZm@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12527__ClassZ@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12528toStringMxFNaNbNiNfZAya@Base 12 ++ _D3std8encoding25EncodingSchemeWindows12529canEncodeMxFNaNbNiNfwZb@Base 12 ++ _D3std8encoding29UnrecognizedEncodingException6__ctorMFNaNfAyaZCQCkQCjQCd@Base 12 ++ _D3std8encoding29UnrecognizedEncodingException6__initZ@Base 12 ++ _D3std8encoding29UnrecognizedEncodingException6__vtblZ@Base 12 ++ _D3std8encoding29UnrecognizedEncodingException7__ClassZ@Base 12 ++ _D3std8encoding8bomTableyASQz8typecons__T5TupleTEQBvQBu3BOMVAyaa6_736368656d61TAhVQwa8_73657175656e6365ZQCl@Base 12 ++ _D3std8encoding__T10safeDecodeTAxEQBgQBf10Latin1CharZQBjFNaNbNiNfKQBjZw@Base 12 ++ _D3std8encoding__T10safeDecodeTAxEQBgQBf10Latin2CharZQBjFNaNbNiNfKQBjZw@Base 12 ++ _D3std8encoding__T10safeDecodeTAxEQBgQBf15Windows1250CharZQBoFNaNbNiNfKQBoZw@Base 12 ++ _D3std8encoding__T10safeDecodeTAxEQBgQBf15Windows1251CharZQBoFNaNbNiNfKQBoZw@Base 12 ++ _D3std8encoding__T10safeDecodeTAxEQBgQBf15Windows1252CharZQBoFNaNbNiNfKQBoZw@Base 12 ++ _D3std8encoding__T10safeDecodeTAxEQBgQBf9AsciiCharZQBhFNaNbNiNfKQBhZw@Base 12 ++ _D3std8encoding__T10safeDecodeTAxaZQrFNaNbNiNfKQqZw@Base 12 ++ _D3std8encoding__T10safeDecodeTAxuZQrFNaNbNiNfKQqZw@Base 12 ++ _D3std8encoding__T10safeDecodeTAxwZQrFNaNbNiNfKQqZw@Base 12 ++ _D3std8encoding__T13encodedLengthTEQBhQBg10Latin1CharZQBkFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T13encodedLengthTEQBhQBg10Latin2CharZQBkFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T13encodedLengthTEQBhQBg15Windows1250CharZQBpFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T13encodedLengthTEQBhQBg15Windows1251CharZQBpFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T13encodedLengthTEQBhQBg15Windows1252CharZQBpFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T13encodedLengthTEQBhQBg9AsciiCharZQBiFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T13encodedLengthTaZQsFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T13encodedLengthTuZQsFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T13encodedLengthTwZQsFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ13encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ15isValidCodeUnitFNaNbNiNfQBuZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ19replacementSequenceFNaNbNdNiNfZAyEQDnQDmQCd@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ9__mixin1313decodeReverseFNaNbNiNfKAxEQDpQDoQCfZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ9__mixin134skipFNaNbNiNfKAxEQDfQDeQBvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ9__mixin136encodeFNaNbNfwZAQBv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ9__mixin136encodeFNaNbNiNfwKAQBxZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ9__mixin136encodeFwDFQBpZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin1CharZ9canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ12m_charMapEndyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ14m_charMapStartyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ6bstMapyASQCn8typecons__T5TupleTuTaZQl@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ7charMapyAu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ9__mixin1013encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ9__mixin1015isValidCodeUnitFNaNbNiNfQCeZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ9__mixin1019replacementSequenceFNaNbNdNiNfZAyEQDxQDwQCn@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ9__mixin109canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ9__mixin10Qk13decodeReverseFNaNbNiNfKAxEQDrQDqQChZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ9__mixin10Qk4skipFNaNbNiNfKAxEQDhQDgQBxZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ9__mixin10Qk6encodeFNaNbNfwZAQBx@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ9__mixin10Qk6encodeFNaNbNiNfwKAQBzZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj10Latin2CharZ9__mixin10Qk6encodeFwDFQBrZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ12m_charMapEndyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ14m_charMapStartyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ6bstMapyASQCs8typecons__T5TupleTuTaZQl@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ7charMapyAu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ9__mixin1013encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ9__mixin1015isValidCodeUnitFNaNbNiNfQCjZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ9__mixin1019replacementSequenceFNaNbNdNiNfZAyEQEcQEbQCs@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ9__mixin109canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ9__mixin10Qk13decodeReverseFNaNbNiNfKAxEQDwQDvQCmZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ9__mixin10Qk4skipFNaNbNiNfKAxEQDmQDlQCcZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ9__mixin10Qk6encodeFNaNbNfwZAQCc@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ9__mixin10Qk6encodeFNaNbNiNfwKAQCeZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1250CharZ9__mixin10Qk6encodeFwDFQBwZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ12m_charMapEndyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ14m_charMapStartyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ6bstMapyASQCs8typecons__T5TupleTuTaZQl@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ7charMapyAu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ9__mixin1013encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ9__mixin1015isValidCodeUnitFNaNbNiNfQCjZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ9__mixin1019replacementSequenceFNaNbNdNiNfZAyEQEcQEbQCs@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ9__mixin109canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ9__mixin10Qk13decodeReverseFNaNbNiNfKAxEQDwQDvQCmZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ9__mixin10Qk4skipFNaNbNiNfKAxEQDmQDlQCcZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ9__mixin10Qk6encodeFNaNbNfwZAQCc@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ9__mixin10Qk6encodeFNaNbNiNfwKAQCeZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1251CharZ9__mixin10Qk6encodeFwDFQBwZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ12m_charMapEndyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ14m_charMapStartyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ6bstMapyASQCs8typecons__T5TupleTuTaZQl@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ7charMapyAu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ9__mixin1013encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ9__mixin1015isValidCodeUnitFNaNbNiNfQCjZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ9__mixin1019replacementSequenceFNaNbNdNiNfZAyEQEcQEbQCs@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ9__mixin109canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ9__mixin10Qk13decodeReverseFNaNbNiNfKAxEQDwQDvQCmZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ9__mixin10Qk4skipFNaNbNiNfKAxEQDmQDlQCcZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ9__mixin10Qk6encodeFNaNbNfwZAQCc@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ9__mixin10Qk6encodeFNaNbNiNfwKAQCeZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj15Windows1252CharZ9__mixin10Qk6encodeFwDFQBwZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ13encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ15isValidCodeUnitFNaNbNiNfQBsZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ19replacementSequenceFNaNbNdNiNfZAyEQDlQDkQCb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ9__mixin1413decodeReverseFNaNbNiNfKAxEQDnQDmQCdZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ9__mixin144skipFNaNbNiNfKAxEQDdQDcQBtZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ9__mixin146encodeFNaNbNfwZAQBt@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ9__mixin146encodeFNaNbNiNfwKAQBvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ9__mixin146encodeFwDFQBnZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTEQBkQBj9AsciiCharZ9canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ13encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ15isValidCodeUnitFNaNbNiNfaZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ19replacementSequenceFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ5tailsFNaNbNiNfaZi@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ9__mixin1513decodeReverseFNaNbNiNfKAxaZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ9__mixin154skipFNaNbNiNfKAxaZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ9__mixin156encodeFNaNbNfwZAa@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ9__mixin156encodeFNaNbNiNfwKAaZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ9__mixin156encodeFwDFaZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ9canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTaZ9tailTableyG128h@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ13encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ15isValidCodeUnitFNaNbNiNfuZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ19replacementSequenceFNaNbNdNiNfZAyu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ9__mixin1313decodeReverseFNaNbNiNfKAxuZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ9__mixin134skipFNaNbNiNfKAxuZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ9__mixin136encodeFNaNbNfwZAu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ9__mixin136encodeFNaNbNiNfwKAuZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ9__mixin136encodeFwDFuZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTuZ9canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ13encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ15isValidCodeUnitFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ19replacementSequenceFNaNbNdNiNfZAyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ9__mixin1313decodeReverseFNaNbNiNfKAxwZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ9__mixin134skipFNaNbNiNfKAxwZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ9__mixin136encodeFNaNbNfwZAw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ9__mixin136encodeFNaNbNiNfwKAwZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ9__mixin136encodeFwDFwZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTwZ9canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ13encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ15isValidCodeUnitFNaNbNiNfEQDfQDeQBuZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ19replacementSequenceFNaNbNdNiNfZAyEQDoQDnQCd@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ9__mixin1313decodeReverseFNaNbNiNfKAxQCfZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ9__mixin134skipFNaNbNiNfKAxQBvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ9__mixin136encodeFNaNbNfwZAEQDgQDfQBv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ9__mixin136encodeFNaNbNiNfwKAEQDiQDhQBxZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ9__mixin136encodeFwDFEQDaQCzQBpZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ9__mixin13__T10safeDecodeTAxQBwZQtFNaNbNiNfKQsZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ9__mixin13__T6decodeTAxQBrZQoFNaNbNiNfKQsZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin1CharZ9canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ12m_charMapEndyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ14m_charMapStartyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ6bstMapyASQCo8typecons__T5TupleTuTaZQl@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ7charMapyAu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin1013encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin1015isValidCodeUnitFNaNbNiNfEQDpQDoQCeZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin1019replacementSequenceFNaNbNdNiNfZAyEQDyQDxQCn@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin109canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin10Qk13decodeReverseFNaNbNiNfKAxQChZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin10Qk4skipFNaNbNiNfKAxQBxZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin10Qk6encodeFNaNbNfwZAEQDiQDhQBx@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin10Qk6encodeFNaNbNiNfwKAEQDkQDjQBzZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin10Qk6encodeFwDFEQDcQDbQBrZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin10Qk__T10safeDecodeTAxQByZQtFNaNbNiNfKQsZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk10Latin2CharZ9__mixin10Qk__T6decodeTAxQBtZQoFNaNbNiNfKQsZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ12m_charMapEndyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ14m_charMapStartyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ6bstMapyASQCt8typecons__T5TupleTuTaZQl@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ7charMapyAu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin1013encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin1015isValidCodeUnitFNaNbNiNfEQDuQDtQCjZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin1019replacementSequenceFNaNbNdNiNfZAyEQEdQEcQCs@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin109canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin10Qk13decodeReverseFNaNbNiNfKAxQCmZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin10Qk4skipFNaNbNiNfKAxQCcZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin10Qk6encodeFNaNbNfwZAEQDnQDmQCc@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin10Qk6encodeFNaNbNiNfwKAEQDpQDoQCeZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin10Qk6encodeFwDFEQDhQDgQBwZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin10Qk__T10safeDecodeTAxQCdZQtFNaNbNiNfKQsZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1250CharZ9__mixin10Qk__T6decodeTAxQByZQoFNaNbNiNfKQsZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ12m_charMapEndyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ14m_charMapStartyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ6bstMapyASQCt8typecons__T5TupleTuTaZQl@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ7charMapyAu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin1013encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin1015isValidCodeUnitFNaNbNiNfEQDuQDtQCjZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin1019replacementSequenceFNaNbNdNiNfZAyEQEdQEcQCs@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin109canEncodeFNaNbNiNfwZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin10Qk13decodeReverseFNaNbNiNfKAxQCmZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin10Qk4skipFNaNbNiNfKAxQCcZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin10Qk6encodeFNaNbNfwZAEQDnQDmQCc@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin10Qk6encodeFNaNbNiNfwKAEQDpQDoQCeZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin10Qk6encodeFwDFEQDhQDgQBwZvZv@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin10Qk__T10safeDecodeTAxQCdZQtFNaNbNiNfKQsZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1251CharZ9__mixin10Qk__T6decodeTAxQByZQoFNaNbNiNfKQsZw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1252CharZ12encodingNameFNaNbNdNiNfZAya@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1252CharZ12m_charMapEndyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1252CharZ14m_charMapStartyw@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1252CharZ6bstMapyASQCt8typecons__T5TupleTuTaZQl@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1252CharZ7charMapyAu@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1252CharZ9__mixin1013encodedLengthFNaNbNiNfwZm@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1252CharZ9__mixin1015isValidCodeUnitFNaNbNiNfEQDuQDtQCjZb@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1252CharZ9__mixin1019replacementSequenceFNaNbNdNiNfZAyEQEdQEcQCs@Base 12 ++ _D3std8encoding__T15EncoderInstanceHTxEQBlQBk15Windows1252CharZ9__mixin109canEncodeFNaNbNiNfwZb@Base 12 ++ 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_D3std8internal4math11biguintcore7BigUint15toDecimalStringMxFNaNbNlNfiZAa@Base 12 ++ _D3std8internal4math11biguintcore7BigUint3divFNaNbNfNkMSQCcQCbQBvQBtQBjMQrZQu@Base 12 ++ _D3std8internal4math11biguintcore7BigUint3modFNaNbNfNkMSQCcQCbQBvQBtQBjMQrZQu@Base 12 ++ _D3std8internal4math11biguintcore7BigUint3mulFNaNbNfMSQCaQBzQBtQBrQBhMQrZQu@Base 12 ++ _D3std8internal4math11biguintcore7BigUint3powFNaNbNfNkMSQCcQCbQBvQBtQBjmZQs@Base 12 ++ _D3std8internal4math11biguintcore7BigUint6__ctorMFNaNbNcNiNfNkMAykZSQCoQCnQChQCfQBv@Base 12 ++ _D3std8internal4math11biguintcore7BigUint6__initZ@Base 12 ++ _D3std8internal4math11biguintcore7BigUint6divModFNaNbNfSQCcQCbQBvQBtQBjMQrJQuJQxZv@Base 12 ++ _D3std8internal4math11biguintcore7BigUint6isZeroMxFNaNbNiNlNfZb@Base 12 ++ _D3std8internal4math11biguintcore7BigUint6toHashMxFNaNbNiNlNfZm@Base 12 ++ _D3std8internal4math11biguintcore7BigUint8__xopCmpMxFKxSQCcQCbQBvQBtQBjZi@Base 12 ++ _D3std8internal4math11biguintcore7BigUint8addOrSubFNaNbNfMSQCfQCeQByQBwQBmMQrbKbZQx@Base 12 ++ _D3std8internal4math11biguintcore7BigUint8numBytesMxFNaNbNiNlNfZm@Base 12 ++ _D3std8internal4math11biguintcore7BigUint8peekUintMxFNaNbNiNlNfmZk@Base 12 ++ _D3std8internal4math11biguintcore7BigUint9peekUlongMxFNaNbNiNlNfmZm@Base 12 ++ _D3std8internal4math11biguintcore7BigUint__T5opCmpTvZQjMxFNaNbNiNlNfxSQCqQCpQCjQChQBxZi@Base 12 ++ _D3std8internal4math11biguintcore7BigUint__T6divIntTykZQlFNaNbNfNkMSQCoQCnQChQCfQBvykZQt@Base 12 ++ _D3std8internal4math11biguintcore7BigUint__T6modIntTykZQlFNaNbNfMSQCmQClQCfQCdQBtykZk@Base 12 ++ _D3std8internal4math11biguintcore7BigUint__T8opAssignTmZQmMFNaNbNlNfmZv@Base 12 ++ _D3std8internal4math11biguintcore7BigUint__T8opAssignTvZQmMFNaNbNiNlNfSQCrQCqQCkQCiQByZv@Base 12 ++ _D3std8internal4math11biguintcore7BigUint__T8opBinaryVAyaa2_3c3cTmZQxMxFNaNbNlNfmZSQDdQDcQCwQCuQCk@Base 12 ++ _D3std8internal4math11biguintcore7BigUint__T8opBinaryVAyaa2_3e3eTmZQxMxFNaNbNjNfmZSQDdQDcQCwQCuQCk@Base 12 ++ _D3std8internal4math11biguintcore7BigUint__T8opEqualsTvZQmMxFNaNbNiNlNfKxSQCuQCtQCnQClQCbZb@Base 12 ++ _D3std8internal4math11biguintcore7BigUint__T8opEqualsTvZQmMxFNaNbNiNlNfmZb@Base 12 ++ _D3std8internal4math11biguintcore9addSimpleFNaNbNfAkxAkxQdZk@Base 12 ++ _D3std8internal4math11biguintcore9mulSimpleFNaNbNfAkAxkQdZv@Base 12 ++ _D3std8internal4math11biguintcore9subSimpleFNaNbAkAxkQdZk@Base 12 ++ _D3std8internal4math11biguintcore__T6intpowTkZQkFNaNbNiNfkmZk@Base 12 ++ _D3std8internal4math12biguintnoasm11__moduleRefZ@Base 12 ++ _D3std8internal4math12biguintnoasm12__ModuleInfoZ@Base 12 ++ _D3std8internal4math12biguintnoasm12multibyteMulFNaNbNiNfAkAxkkkZk@Base 12 ++ _D3std8internal4math12biguintnoasm12multibyteShlFNaNbNiNfAkAxkkZk@Base 12 ++ _D3std8internal4math12biguintnoasm12multibyteShrFNaNbNiNfAkAxkkZv@Base 12 ++ _D3std8internal4math12biguintnoasm15multibyteSquareFNaNbNiNfAkAxkZv@Base 12 ++ _D3std8internal4math12biguintnoasm18multibyteDivAssignFNaNbNiNfAkkkZk@Base 12 ++ _D3std8internal4math12biguintnoasm27multibyteAddDiagonalSquaresFNaNbNiNfAkAxkZv@Base 12 ++ _D3std8internal4math12biguintnoasm27multibyteMultiplyAccumulateFNaNbNiNfAkAxkQdZv@Base 12 ++ _D3std8internal4math12biguintnoasm27multibyteTriangleAccumulateFNaNbNiNfAkAxkZv@Base 12 ++ _D3std8internal4math12biguintnoasm__T15multibyteAddSubVai43ZQxFNaNbNiNfAkAxkQdkZk@Base 12 ++ _D3std8internal4math12biguintnoasm__T15multibyteAddSubVai45ZQxFNaNbNiNfAkAxkQdkZk@Base 12 ++ _D3std8internal4math12biguintnoasm__T15multibyteMulAddVai43ZQxFNaNbNiNfAkAxkkkZk@Base 12 ++ _D3std8internal4math12biguintnoasm__T15multibyteMulAddVai45ZQxFNaNbNiNfAkAxkkkZk@Base 12 ++ _D3std8internal4math12biguintnoasm__T24multibyteIncrementAssignVai43ZQBgFNaNbNiNfAkkZk@Base 12 ++ _D3std8internal4math12biguintnoasm__T24multibyteIncrementAssignVai45ZQBgFNaNbNiNfAkkZk@Base 12 ++ _D3std8internal4math13errorfunction11__moduleRefZ@Base 12 ++ _D3std8internal4math13errorfunction12__ModuleInfoZ@Base 12 ++ _D3std8internal4math13errorfunction1PyG10e@Base 12 ++ _D3std8internal4math13errorfunction1QyG11e@Base 12 ++ _D3std8internal4math13errorfunction1RyG5e@Base 12 ++ _D3std8internal4math13errorfunction1SyG6e@Base 12 ++ _D3std8internal4math13errorfunction1TyG7e@Base 12 ++ _D3std8internal4math13errorfunction1UyG7e@Base 12 ++ _D3std8internal4math13errorfunction22normalDistributionImplFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13errorfunction25normalDistributionInvImplFNaNbNiNfeZ2P0yG8e@Base 12 ++ _D3std8internal4math13errorfunction25normalDistributionInvImplFNaNbNiNfeZ2P1yG10e@Base 12 ++ _D3std8internal4math13errorfunction25normalDistributionInvImplFNaNbNiNfeZ2P2yG8e@Base 12 ++ _D3std8internal4math13errorfunction25normalDistributionInvImplFNaNbNiNfeZ2P3yG8e@Base 12 ++ _D3std8internal4math13errorfunction25normalDistributionInvImplFNaNbNiNfeZ2Q0yG8e@Base 12 ++ _D3std8internal4math13errorfunction25normalDistributionInvImplFNaNbNiNfeZ2Q1yG10e@Base 12 ++ _D3std8internal4math13errorfunction25normalDistributionInvImplFNaNbNiNfeZ2Q2yG8e@Base 12 ++ _D3std8internal4math13errorfunction25normalDistributionInvImplFNaNbNiNfeZ2Q3yG8e@Base 12 ++ _D3std8internal4math13errorfunction25normalDistributionInvImplFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13errorfunction3erfFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13errorfunction4erfcFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13errorfunction5EXP_2ye@Base 12 ++ _D3std8internal4math13errorfunction5erfceFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13errorfunction5expx2FNaNbNiNfeiZe@Base 12 ++ _D3std8internal4math13errorfunction__T12rationalPolyTeZQrFNaNbNiNfeAxeQdZe@Base 12 ++ _D3std8internal4math13gammafunction10EULERGAMMAye@Base 12 ++ _D3std8internal4math13gammafunction11__moduleRefZ@Base 12 ++ _D3std8internal4math13gammafunction11logmdigammaFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13gammafunction12__ModuleInfoZ@Base 12 ++ _D3std8internal4math13gammafunction13gammaStirlingFNaNbNiNfeZ19LargeStirlingCoeffsyG7e@Base 12 ++ _D3std8internal4math13gammafunction13gammaStirlingFNaNbNiNfeZ19SmallStirlingCoeffsyG9e@Base 12 ++ _D3std8internal4math13gammafunction13gammaStirlingFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13gammafunction14betaIncompleteFNaNbNiNfeeeZe@Base 12 ++ _D3std8internal4math13gammafunction15gammaIncompleteFNaNbNiNfeeZe@Base 12 ++ _D3std8internal4math13gammafunction16GammaSmallCoeffsyG9e@Base 12 ++ _D3std8internal4math13gammafunction16igammaTemmeLargeFNaNbNiNfeeZ4coefyG13Ae@Base 12 ++ _D3std8internal4math13gammafunction16igammaTemmeLargeFNaNbNiNfeeZe@Base 12 ++ _D3std8internal4math13gammafunction17betaIncompleteInvFNaNbNiNfeeeZe@Base 12 ++ _D3std8internal4math13gammafunction17logGammaNumeratoryG7e@Base 12 ++ _D3std8internal4math13gammafunction18betaDistExpansion1FNaNbNiNfeeeZe@Base 12 ++ _D3std8internal4math13gammafunction18betaDistExpansion2FNaNbNiNfeeeZe@Base 12 ++ _D3std8internal4math13gammafunction18logmdigammaInverseFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13gammafunction19GammaSmallNegCoeffsyG9e@Base 12 ++ _D3std8internal4math13gammafunction19betaDistPowerSeriesFNaNbNiNfeeeZe@Base 12 ++ _D3std8internal4math13gammafunction19logGammaDenominatoryG8e@Base 12 ++ _D3std8internal4math13gammafunction20GammaNumeratorCoeffsyG8e@Base 12 ++ _D3std8internal4math13gammafunction20gammaIncompleteComplFNaNbNiNfeeZe@Base 12 ++ _D3std8internal4math13gammafunction22GammaDenominatorCoeffsyG9e@Base 12 ++ _D3std8internal4math13gammafunction22logGammaStirlingCoeffsyG7e@Base 12 ++ _D3std8internal4math13gammafunction23gammaIncompleteComplInvFNaNbNiNfeeZe@Base 12 ++ _D3std8internal4math13gammafunction4Bn_nyG7e@Base 12 ++ _D3std8internal4math13gammafunction5gammaFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13gammafunction7digammaFNaNbNiNfeZe@Base 12 ++ _D3std8internal4math13gammafunction8logGammaFNaNbNiNfeZe@Base 12 ++ _D3std8internal4test10dummyrange11__moduleRefZ@Base 12 ++ _D3std8internal4test10dummyrange12__ModuleInfoZ@Base 12 ++ _D3std8internal4test10dummyrange7TestFoo6__initZ@Base 12 ++ _D3std8internal4test10dummyrange7TestFoo8opEqualsMxFKxSQCbQCaQBuQBsQBjZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi0VQDvi0VQDei1TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi0VQDvi0VQDei1TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5frontMNgFNaNbNcNdNiNfZNgk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni0VQDui0VQDdi1TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi0VQDvi0VQDei2TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4backMNgFNaNbNcNdNiNfZNgk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi0VQDvi0VQDei2TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5frontMNgFNaNbNcNdNiNfZNgk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm7popBackMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni0VQDui0VQDdi2TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi0VQDvi0VQDei3TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm4backMNgFNaNbNcNdNiNfZNgk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi0VQDvi0VQDei3TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm5frontMNgFNaNbNcNdNiNfZNgk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm7opIndexMNgFNaNbNcNiNfmZNgk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm7opSliceMFNaNbNiNfZSQFqQFpQFjQFh__TQEyVQEpi0VQDwi0VQDfi3TQClZQFy@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm7opSliceMFNaNbNiNfmmZSQFsQFrQFlQFj__TQFaVQEri0VQDyi0VQDhi3TQCnZQGa@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm7popBackMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni0VQDui0VQDdi3TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi0VQDvi1VQDei1TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi0VQDvi1VQDei1TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5frontMNgFNaNbNcNdNiNfZNgk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni0VQDui1VQDdi1TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi0VQDvi1VQDei2TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4backMNgFNaNbNcNdNiNfZNgk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi0VQDvi1VQDei2TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5frontMNgFNaNbNcNdNiNfZNgk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm7popBackMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi0VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni0VQDui1VQDdi2TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi1VQDvi0VQDei0TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm5frontMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei0TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni1VQDui0VQDdi0TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi1VQDvi0VQDei1TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi1VQDvi0VQDei1TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5frontMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei1TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni1VQDui0VQDdi1TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi1VQDvi0VQDei2TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4backMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4backMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi1VQDvi0VQDei2TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5frontMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm7popBackMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei2TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni1VQDui0VQDdi2TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi1VQDvi0VQDei3TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm13opIndexAssignMFNaNbNiNfkmZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm4backMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm4backMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi1VQDvi0VQDei3TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm5frontMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm7opIndexMxFNaNbNiNfmZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm7opSliceMFNaNbNiNfZSQFqQFpQFjQFh__TQEyVQEpi1VQDwi0VQDfi3TQClZQFy@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm7opSliceMFNaNbNiNfmmZSQFsQFrQFlQFj__TQFaVQEri1VQDyi0VQDhi3TQCnZQGa@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm7popBackMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi0VEQDrQDqQDkQDi9RangeTypei3TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni1VQDui0VQDdi3TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei0TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi1VQDvi1VQDei0TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei0TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei0TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei0TAkZQDm5frontMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei0TAkZQDm5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei0TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei0TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei0TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei0TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni1VQDui1VQDdi0TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi1VQDvi1VQDei1TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi1VQDvi1VQDei1TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5frontMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei1TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni1VQDui1VQDdi1TQCjZQFwZm@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm11__xopEqualsMxFKxSQFpQFoQFiQFg__TQExVQEoi1VQDvi1VQDei2TQCkZQFxZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm12uinttestDatayAk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4backMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4backMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm4saveMFNaNbNdNiNfZSQFpQFoQFiQFg__TQExVQEoi1VQDvi1VQDei2TQCkZQFx@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5frontMFNaNbNdNiNfkZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm5frontMxFNaNbNdNiNfZk@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6__initZ@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm6reinitMFNaNbNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm7popBackMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std8internal4test10dummyrange__T10DummyRangeVEQBvQBuQBoQBm8ReturnByi1VEQCuQCtQCnQCl6Lengthi1VEQDrQDqQDkQDi9RangeTypei2TAkZQDm9__xtoHashFNbNeKxSQFoQFnQFhQFf__TQEwVQEni1VQDui1VQDdi2TQCjZQFwZm@Base 12 ++ _D3std8internal4test3uda11__moduleRefZ@Base 12 ++ _D3std8internal4test3uda12__ModuleInfoZ@Base 12 ++ _D3std8internal4test3uda17HasPrivateMembers6__initZ@Base 12 ++ _D3std8internal4test5range11__moduleRefZ@Base 12 ++ _D3std8internal4test5range12__ModuleInfoZ@Base 12 ++ _D3std8internal6memory11__moduleRefZ@Base 12 ++ _D3std8internal6memory12__ModuleInfoZ@Base 12 ++ _D3std8internal6memory__T13enforceCallocZQqFNaNbNiNfmmZPv@Base 12 ++ _D3std8internal6memory__T13enforceMallocZQqFNaNbNiNfmZPv@Base 12 ++ _D3std8internal6memory__T14enforceReallocZQrFNaNbNiNkMPvmZQe@Base 12 ++ _D3std8internal7cstring11__moduleRefZ@Base 12 ++ _D3std8internal7cstring12__ModuleInfoZ@Base 12 ++ _D3std8internal7cstring__T11tempCStringTaTANgaZQvFNaNbNiNfMQrZSQCjQCiQCc__T17TempCStringBufferTaZQw@Base 12 ++ _D3std8internal7cstring__T11tempCStringTaTAxaZQuFNaNbNiNfMQqZSQCiQChQCb__T17TempCStringBufferTaZQw@Base 12 ++ _D3std8internal7cstring__T11tempCStringTaTAyaZQuFNaNbNiNfMQqZSQCiQChQCb__T17TempCStringBufferTaZQw@Base 12 ++ _D3std8internal7cstring__T11tempCStringTaTSQBp4path__T16asNormalizedPathTSQCu5range__T5chainTSQDo3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplTSQFnQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFoFNkMQFcZQtZQHeFNaNbNiMQGzZSQIsQIrQIl__T17TempCStringBufferTaZQw@Base 12 ++ _D3std8internal7cstring__T11tempCStringTaTSQBp5range__T5chainTSQCj3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplTSQEiQCt__T10OnlyResultTaZQpTQDbZQDmFQDjQBnQDpZ6ResultZQFlFNaNbNiNfMQFiZSQHbQHaQGu__T17TempCStringBufferTaZQw@Base 12 ++ _D3std8internal7cstring__T14trustedReallocTaZQtFNaNbNiNeNkMAaZQd@Base 12 ++ _D3std8internal7cstring__T17TempCStringBufferTaZQw14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D3std8internal7cstring__T17TempCStringBufferTaZQw15trustedVoidInitFNaNbNiNeZSQCyQCxQCr__TQCmTaZQCs@Base 12 ++ _D3std8internal7cstring__T17TempCStringBufferTaZQw3ptrMxFNaNbNdNiNeZPxa@Base 12 ++ _D3std8internal7cstring__T17TempCStringBufferTaZQw6__dtorMFNaNbNiNeZv@Base 12 ++ _D3std8internal7cstring__T17TempCStringBufferTaZQw6__initZ@Base 12 ++ _D3std8internal7cstring__T17TempCStringBufferTaZQw7buffPtrMNgFNaNbNdNiNjNeZPNga@Base 12 ++ _D3std8internal7cstring__T17TempCStringBufferTaZQw7opIndexMxFNaNbNiNeZAxa@Base 12 ++ _D3std8internal7cstring__T17TempCStringBufferTaZQw8opAssignMFNaNbNcNiNjNeSQCuQCtQCn__TQCiTaZQCoZQx@Base 12 ++ _D3std8internal7cstring__T19trustedReallocStackTaZQyFNaNbNiNeMAamZQe@Base 12 ++ _D3std8internal7windows8advapi3211__moduleRefZ@Base 12 ++ _D3std8internal7windows8advapi3212__ModuleInfoZ@Base 12 ++ _D3std8typecons10Structural11__InterfaceZ@Base 12 ++ _D3std8typecons11__moduleRefZ@Base 12 ++ _D3std8typecons12__ModuleInfoZ@Base 12 ++ _D3std8typecons19NotImplementedError6__ctorMFNaNbNfAyaZCQCcQCbQBv@Base 12 ++ _D3std8typecons19NotImplementedError6__initZ@Base 12 ++ _D3std8typecons19NotImplementedError6__vtblZ@Base 12 ++ _D3std8typecons19NotImplementedError7__ClassZ@Base 12 ++ _D3std8typecons2No6__initZ@Base 12 ++ _D3std8typecons3Yes6__initZ@Base 12 ++ _D3std8typecons7Ternary4makeFNaNbNiNfhZSQBmQBlQBf@Base 12 ++ _D3std8typecons7Ternary6__ctorMFNaNbNcNiNfbZSQBrQBqQBk@Base 12 ++ _D3std8typecons7Ternary6__ctorMFNaNbNcNiNfxSQBqQBpQBjZSQCbQCaQBu@Base 12 ++ _D3std8typecons7Ternary6__initZ@Base 12 ++ _D3std8typecons7Ternary8opAssignMFNaNbNiNfbZv@Base 12 ++ _D3std8typecons__T10RebindableTxCQBf5regex8internal2ir__T14MatcherFactoryTaZQtZQCj11__xopEqualsMxFKxSQDvQDu__TQDoTxQDfZQDxZb@Base 12 ++ _D3std8typecons__T10RebindableTxCQBf5regex8internal2ir__T14MatcherFactoryTaZQtZQCj6__initZ@Base 12 ++ _D3std8typecons__T10RebindableTxCQBf5regex8internal2ir__T14MatcherFactoryTaZQtZQCj8__mixin13getMNgFNaNbNdNiNjNeZNgxCQEkQDfQDcQCw__TQCwTaZQDc@Base 12 ++ _D3std8typecons__T10RebindableTxCQBf5regex8internal2ir__T14MatcherFactoryTaZQtZQCj8__mixin16__ctorMFNaNbNcNiNfxQDbZSQEkQEj__TQEdTxQDuZQEm@Base 12 ++ _D3std8typecons__T10RebindableTxCQBf5regex8internal2ir__T14MatcherFactoryTaZQtZQCj8__mixin18opAssignMFNaNbNiNeSQEfQEe__TQDyTxQDpZQEhZv@Base 12 ++ _D3std8typecons__T10RebindableTxCQBf5regex8internal2ir__T14MatcherFactoryTaZQtZQCj8__mixin18opAssignMFNaNbNiNfNkMxQDeZv@Base 12 ++ _D3std8typecons__T10RebindableTxCQBf5regex8internal2ir__T14MatcherFactoryTaZQtZQCj8__mixin18opEqualsMxFxQCuZb@Base 12 ++ _D3std8typecons__T10RebindableTxCQBf5regex8internal2ir__T14MatcherFactoryTaZQtZQCj8__mixin1__T8opEqualsZQkMxFKxSQEgQEf__TQDzTxQDqZQEiZb@Base 12 ++ _D3std8typecons__T10RebindableTyCQBf8datetime8timezone8TimeZoneZQBu11__xopEqualsMxFKxSQDgQDf__TQCzTyQCqZQDiZb@Base 12 ++ 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_D3std9algorithm8mutation__T15trustedMoveImplTSQBtQBs9iteration__T9MapResultSQCx10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQFh8internal14unicode_tables15UnicodePropertyZQEpZQGfFNaNbNiNeNkMKQGdZQGh@Base 12 ++ _D3std9algorithm8mutation__T4copyTASQBi5regex8internal2ir8BytecodeTQBhZQBrFNaNbNiNfQBxQCaZQCe@Base 12 ++ _D3std9algorithm8mutation__T4copyTAiTAkZQmFNaNbNiNfQrQqZQt@Base 12 ++ _D3std9algorithm8mutation__T4copyTAkTQdZQmFNaNbNiNfQrQtZQw@Base 12 ++ _D3std9algorithm8mutation__T4copyTSQBh3uni__T13InversionListTSQCiQBb8GcPolicyZQBh__T9IntervalsTAkZQoTASQDxQCq17CodepointIntervalZQDxFNaNbNiNfQEdQBrZQBv@Base 12 ++ _D3std9algorithm8mutation__T4copyTSQBh5range__T10roundRobinTSQChQCg9iteration__T9MapResultSQDl10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQFp3uni21DecompressedIntervalsZQDuTSQGzQGyQEs__TQElSQHpQEe__TQDvVQDpa4_615b315dVQEea1_61ZQExTQDqZQGiZQHtFQHkQCvZ6ResultTAkZQJiFNaNfQJkQoZQr@Base 12 ++ _D3std9algorithm8mutation__T4moveTAAyaZQlFNaNbNiNfNkMKQuZQx@Base 12 ++ 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_D3std9algorithm8mutation__T4moveTSQBh3uni17CodepointIntervalZQBiFNaNbNiNfKQBpZQBt@Base 12 ++ _D3std9algorithm8mutation__T4moveTSQBh3uni__T13InversionListTSQCiQBb8GcPolicyZQBh__T9IntervalsTAkZQoZQCvFNaNbNiNfNkMKQDfZQDj@Base 12 ++ _D3std9algorithm8mutation__T4moveTSQBh4file15DirIteratorImplZQBhFKQBgKQBkZv@Base 12 ++ _D3std9algorithm8mutation__T4moveTSQBhQBg9iteration__T9MapResultSQCl10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQEt8internal14unicode_tables9CompEntryZQEgZQFkFNaNbNiNfNkMKQFuZQFy@Base 12 ++ _D3std9algorithm8mutation__T4moveTSQBhQBg9iteration__T9MapResultSQCl10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQEv8internal14unicode_tables15UnicodePropertyZQEpZQFtFNaNbNiNfNkMKQGdZQGh@Base 12 ++ _D3std9algorithm8mutation__T4swapTAAyaZQlFNaNbNiNeKQrKQuZv@Base 12 ++ _D3std9algorithm8mutation__T4swapTACQBi3zip13ArchiveMemberZQBfFNaNbNiNeKQBmKQBqZv@Base 12 ++ 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_D3std9algorithm8mutation__T8moveImplTSQBl3uni17CodepointIntervalZQBmFNaNbNiNfKQBpZQBt@Base 12 ++ _D3std9algorithm8mutation__T8moveImplTSQBl3uni__T13InversionListTSQCmQBb8GcPolicyZQBh__T9IntervalsTAkZQoZQCzFNaNbNiNfNkMKQDfZQDj@Base 12 ++ _D3std9algorithm8mutation__T8moveImplTSQBl4file15DirIteratorImplZQBlFMKQBhNkMKQBoZv@Base 12 ++ _D3std9algorithm8mutation__T8moveImplTSQBlQBk9iteration__T9MapResultSQCp10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQEx8internal14unicode_tables9CompEntryZQEgZQFoFNaNbNiNfNkMKQFuZQFy@Base 12 ++ _D3std9algorithm8mutation__T8moveImplTSQBlQBk9iteration__T9MapResultSQCp10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQEz8internal14unicode_tables15UnicodePropertyZQEpZQFxFNaNbNiNfNkMKQGdZQGh@Base 12 ++ _D3std9algorithm9iteration11__moduleRefZ@Base 12 ++ _D3std9algorithm9iteration12__ModuleInfoZ@Base 12 ++ _D3std9algorithm9iteration__T10UniqResultSQBo10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62ZQBvTSQEg5range__T11SortedRangeTAQCqVQCua5_61203c2062VEQGdQBx18SortedRangeOptionsi0ZQCoZQGj11__xopEqualsMxFKxSQIgQIfQHy__TQHrSQIwQHi__TQGzVQGsa6_61203d3d2062VQHla1_61VQHua1_62ZQIoTQGtZQKbZb@Base 12 ++ _D3std9algorithm9iteration__T10UniqResultSQBo10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62ZQBvTSQEg5range__T11SortedRangeTAQCqVQCua5_61203c2062VEQGdQBx18SortedRangeOptionsi0ZQCoZQGj4backMFNaNbNdNiNfZQFo@Base 12 ++ _D3std9algorithm9iteration__T10UniqResultSQBo10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62ZQBvTSQEg5range__T11SortedRangeTAQCqVQCua5_61203c2062VEQGdQBx18SortedRangeOptionsi0ZQCoZQGj4saveMFNaNbNdNiNfZSQIgQIfQHy__TQHrSQIwQHi__TQGzVQGsa6_61203d3d2062VQHla1_61VQHua1_62ZQIoTQGtZQKb@Base 12 ++ _D3std9algorithm9iteration__T10UniqResultSQBo10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62ZQBvTSQEg5range__T11SortedRangeTAQCqVQCua5_61203c2062VEQGdQBx18SortedRangeOptionsi0ZQCoZQGj5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std9algorithm9iteration__T10UniqResultSQBo10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62ZQBvTSQEg5range__T11SortedRangeTAQCqVQCua5_61203c2062VEQGdQBx18SortedRangeOptionsi0ZQCoZQGj5frontMFNaNbNdNiNfZQFp@Base 12 ++ _D3std9algorithm9iteration__T10UniqResultSQBo10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62ZQBvTSQEg5range__T11SortedRangeTAQCqVQCua5_61203c2062VEQGdQBx18SortedRangeOptionsi0ZQCoZQGj6__ctorMFNaNbNcNiNfQEbZSQIlQIkQId__TQHwSQJbQHn__TQHeVQGxa6_61203d3d2062VQHqa1_61VQHza1_62ZQItTQGyZQKg@Base 12 ++ _D3std9algorithm9iteration__T10UniqResultSQBo10functional__T9binaryFunVAyaa6_61203d3d2062VQta1_61VQBba1_62ZQBvTSQEg5range__T11SortedRangeTAQCqVQCua5_61203c2062VEQGdQBx18SortedRangeOptionsi0ZQCoZQGj6__initZ@Base 12 ++ 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_D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFNaNbNiNfQuQEbZSQFrQFqQFj__TQFcVQEwa6_61203d3d2062VQEwi0TQCqTQFzZQGnFQDcQGkZ6Result@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result11__xopEqualsMxFKxSQGiQGhQGa__TQFtVQFna6_61203d3d2062VQFni0TQDhTQGqZQHeFQDtQHbZQDiZb@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result15separatorLengthMFNaNbNdNiNfZm@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result17ensureFrontLengthMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result4saveMFNaNbNdNiNfZSQGiQGhQGa__TQFtVQFna6_61203d3d2062VQFni0TQDhTQGqZQHeFQDtQHbZQDi@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result5frontMFNaNbNdNiNfZQBs@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result6__ctorMFNaNbNcNiNfQBsQFaZSQGqQGpQGi__TQGbVQFva6_61203d3d2062VQFvi0TQDpTQGyZQHmFQEbQHjZQDq@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result6__initZ@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TAxaTQDjZQDxFQmQDtZ6Result9__xtoHashFNbNeKxSQGhQGgQFz__TQFsVQFma6_61203d3d2062VQFmi0TQDgTQGpZQHdFQDsQHaZQDhZm@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFNaNbNiNfQDzQEcZSQFsQFrQFk__TQFdVQExa6_61203d3d2062VQExi0TQFwTQGaZQGoFQGiQGlZ6Result@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result11__xopEqualsMxFKxSQGjQGiQGb__TQFuVQFoa6_61203d3d2062VQFoi0TQGnTQGrZQHfFQGzQHcZQDiZb@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result15separatorLengthMFNaNbNdNiNfZm@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result17ensureFrontLengthMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result4saveMFNaNbNdNiNfZSQGjQGiQGb__TQFuVQFoa6_61203d3d2062VQFoi0TQGnTQGrZQHfFQGzQHcZQDi@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result5frontMFNaNbNdNiNfZQEy@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result6__ctorMFNaNbNcNiNfQEyQFbZSQGrQGqQGj__TQGcVQFwa6_61203d3d2062VQFwi0TQGvTQGzZQHnFQHhQHkZQDq@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result6__initZ@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T8splitterVAyaa6_61203d3d2062VEQCf8typecons__T4FlagVQBpa14_6b656570536570617261746f7273ZQBqi0TQDfTQDjZQDxFQDrQDuZ6Result9__xtoHashFNbNeKxSQGiQGhQGa__TQFtVQFna6_61203d3d2062VQFni0TQGmTQGqZQHeFQGyQHbZQDhZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu11__xopEqualsMxFKxSQFrQFqQFj__TQFcSQGhQEv__TQEmVQEga4_615b305dVQEva1_61ZQFoTQEhZQGzZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu4saveMFNaNdNfZSQFnQFmQFf__TQEySQGdQEr__TQEiVQEca4_615b305dVQEra1_61ZQFkTQEdZQGv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu5emptyMFNaNdNfZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu5frontMFNaNdNfZk@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu6__ctorMFNaNbNcNiNfQCcZSQFwQFvQFo__TQFhSQGmQFa__TQErVQEla4_615b305dVQFaa1_61ZQFtTQEmZQHe@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu6__initZ@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu8popFrontMFNaNfZv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b305dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu9__xtoHashFNbNeKxSQFqQFpQFi__TQFbSQGgQEu__TQElVQEfa4_615b305dVQEua1_61ZQFnTQEgZQGyZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b315dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu11__xopEqualsMxFKxSQFrQFqQFj__TQFcSQGhQEv__TQEmVQEga4_615b315dVQEva1_61ZQFoTQEhZQGzZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b315dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu4saveMFNaNdNfZSQFnQFmQFf__TQEySQGdQEr__TQEiVQEca4_615b315dVQEra1_61ZQFkTQEdZQGv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b315dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu5emptyMFNaNdNfZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b315dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu5frontMFNaNdNfZk@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b315dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu6__ctorMFNaNbNcNiNfQCcZSQFwQFvQFo__TQFhSQGmQFa__TQErVQEla4_615b315dVQFaa1_61ZQFtTQEmZQHe@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b315dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu6__initZ@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b315dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu8popFrontMFNaNfZv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b315dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDu9__xtoHashFNbNeKxSQFqQFpQFi__TQFbSQGgQEu__TQElVQEfa4_615b315dVQEua1_61ZQFnTQEgZQGyZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg11__xopEqualsMxFKxSQGdQGcQFv__TQFoSQGtQFh__TQEyVQEsa5_612e726873VQFja1_61ZQGcTQEtZQHnZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg4saveMFNaNbNdNiNfZSQGdQGcQFv__TQFoSQGtQFh__TQEyVQEsa5_612e726873VQFja1_61ZQGcTQEtZQHn@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg5frontMFNaNbNdNiNfZyw@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg6__ctorMFNaNbNcNiNfQCmZSQGiQGhQGa__TQFtSQGyQFm__TQFdVQExa5_612e726873VQFoa1_61ZQGhTQEyZQHs@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg6__initZ@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg7opIndexMFNaNbNiNfmZyw@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg7opSliceMFNaNbNiNfmmZSQGgQGfQFy__TQFrSQGwQFk__TQFbVQEva5_612e726873VQFma1_61ZQGfTQEwZQHq@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg9__mixin116lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg9__xtoHashFNbNeKxSQGcQGbQFu__TQFnSQGsQFg__TQExVQEra5_612e726873VQFia1_61ZQGbTQEsZQHmZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg__T4backZQgMFNaNbNdNiNfZyw@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa5_612e726873VQra1_61ZQBjTAySQDu8internal14unicode_tables9CompEntryZQEg__T7popBackZQjMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQDw8internal14unicode_tables15UnicodePropertyZQEp11__xopEqualsMxFKxSQGmQGlQGe__TQFxSQHcQFq__TQFhVQFba6_612e6e616d65VQFua1_61ZQGnTQFcZQHyZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQDw8internal14unicode_tables15UnicodePropertyZQEp4saveMFNaNbNdNiNfZSQGmQGlQGe__TQFxSQHcQFq__TQFhVQFba6_612e6e616d65VQFua1_61ZQGnTQFcZQHy@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQDw8internal14unicode_tables15UnicodePropertyZQEp5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQDw8internal14unicode_tables15UnicodePropertyZQEp5frontMFNaNbNdNiNfZyAa@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQDw8internal14unicode_tables15UnicodePropertyZQEp6__ctorMFNaNbNcNiNfQCtZSQGrQGqQGj__TQGcSQHhQFv__TQFmVQFga6_612e6e616d65VQFza1_61ZQGsTQFhZQId@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQDw8internal14unicode_tables15UnicodePropertyZQEp6__initZ@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQDw8internal14unicode_tables15UnicodePropertyZQEp7opIndexMFNaNbNiNfmZyAa@Base 12 ++ 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_D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQDw8internal14unicode_tables15UnicodePropertyZQEp__T4backZQgMFNaNbNdNiNfZyAa@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa6_612e6e616d65VQta1_61ZQBlTAySQDw8internal14unicode_tables15UnicodePropertyZQEp__T7popBackZQjMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTAxaZQBh11__xopEqualsMxFKxSQDeQDdQCw__TQCpSQDuQCiQCfTQCaZQDhZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTAxaZQBh4saveMFNaNbNdNiNfZSQDeQDdQCw__TQCpSQDuQCiQCfTQCaZQDh@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTAxaZQBh5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTAxaZQBh5frontMFNaNdNfZw@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTAxaZQBh6__ctorMFNaNbNcNiNfQBaZSQDjQDiQDb__TQCuSQDzQCnQCkTQCfZQDm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTAxaZQBh6__initZ@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTAxaZQBh8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTAxaZQBh9__xtoHashFNbNeKxSQDdQDcQCv__TQCoSQDtQChQCeTQBzZQDgZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc11__xopEqualsMxFKxSQEzQEyQEr__TQEkSQFpQEdQEaTQDvZQFcZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc4saveMFNaNbNdNiNfZSQEzQEyQEr__TQEkSQFpQEdQEaTQDvZQFc@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc6__ctorMFNaNbNcNiNfQCvZSQFeQFdQEw__TQEpSQFuQEiQEfTQEaZQFh@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc6__initZ@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc7opSliceMFNaNbNiNfmmZSQFcQFbQEu__TQEnSQFsQEgQEdTQDyZQFf@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc9__mixin116lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQDc9__xtoHashFNbNeKxSQEyQExQEq__TQEjSQFoQEcQDzTQDuZQFbZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc11__xopEqualsMxFKxSQEzQEyQEr__TQEkSQFpQEdQEaTQDvZQFcZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc4saveMFNaNbNdNiNfZSQEzQEyQEr__TQEkSQFpQEdQEaTQDvZQFc@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc5emptyMFNaNbNdNiNfZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc5frontMFNaNbNdNiNfZa@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc6__ctorMFNaNbNcNiNfQCvZSQFeQFdQEw__TQEpSQFuQEiQEfTQEaZQFh@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc6__initZ@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc7opIndexMFNaNbNiNfmZa@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc7opSliceMFNaNbNiNfmmZSQFcQFbQEu__TQEnSQFsQEgQEdTQDyZQFf@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc8popFrontMFNaNbNiNfZv@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc9__mixin116lengthMFNaNbNdNiNfZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm5ascii7toLowerTSQCf3utf__T10byCodeUnitTAyaZQrFQhZ14ByCodeUnitImplZQDc9__xtoHashFNbNeKxSQEyQExQEq__TQEjSQFoQEcQDzTQDuZQFbZm@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm8bitmanip8BitArray7bitsSetMxFNbNdZ9__lambda2TSQDjQDiQDb__T12FilterResultSQEkQCyQCsQCmMxFNbNdZ9__lambda1TSQFq5range__T4iotaTmTmZQkFmmZ6ResultZQDfZQGd4saveMFNaNbNdNiNfZSQIaQHzQHs__TQHlSQIqQHeQGyQGsMxFNbNdZQGnTQGgZQIr@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm8bitmanip8BitArray7bitsSetMxFNbNdZ9__lambda2TSQDjQDiQDb__T12FilterResultSQEkQCyQCsQCmMxFNbNdZ9__lambda1TSQFq5range__T4iotaTmTmZQkFmmZ6ResultZQDfZQGd5emptyMFNaNbNdNiZb@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm8bitmanip8BitArray7bitsSetMxFNbNdZ9__lambda2TSQDjQDiQDb__T12FilterResultSQEkQCyQCsQCmMxFNbNdZ9__lambda1TSQFq5range__T4iotaTmTmZQkFmmZ6ResultZQDfZQGd5frontMFNaNbNdNiZSQHzQGn__T7BitsSetTmZQl@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm8bitmanip8BitArray7bitsSetMxFNbNdZ9__lambda2TSQDjQDiQDb__T12FilterResultSQEkQCyQCsQCmMxFNbNdZ9__lambda1TSQFq5range__T4iotaTmTmZQkFmmZ6ResultZQDfZQGd6__ctorMFNaNbNcNiNfQEsZSQIfQIeQHx__TQHqSQIvQHjQHdQGxMxFNbNdZQGsTQGlZQIw@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm8bitmanip8BitArray7bitsSetMxFNbNdZ9__lambda2TSQDjQDiQDb__T12FilterResultSQEkQCyQCsQCmMxFNbNdZ9__lambda1TSQFq5range__T4iotaTmTmZQkFmmZ6ResultZQDfZQGd6__initZ@Base 12 ++ _D3std9algorithm9iteration__T9MapResultSQBm8bitmanip8BitArray7bitsSetMxFNbNdZ9__lambda2TSQDjQDiQDb__T12FilterResultSQEkQCyQCsQCmMxFNbNdZ9__lambda1TSQFq5range__T4iotaTmTmZQkFmmZ6ResultZQDfZQGd8popFrontMFNaNbNiZv@Base 12 ++ _D3std9algorithm9searching11__moduleRefZ@Base 12 ++ _D3std9algorithm9searching12__ModuleInfoZ@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa11_615b305d203e2030783830TAxSQCv3uni17CodepointIntervalZQCvFNaNbNiNfQBqZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa11_62203c20612e74696d6554TAySQCv8datetime8timezone13PosixTimeZone10LeapSecondTylZQDuFNaNbNiNfQCpylZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa11_62203c20612e74696d6554TAySQCv8datetime8timezone13PosixTimeZone10TransitionTlZQDtFNaNbNiNfQColZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa11_62203c20612e74696d6554TAySQCv8datetime8timezone13PosixTimeZone10TransitionTylZQDuFNaNbNiNfQCpylZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TAQuTQxZQBnFNaNbNiNfQtQBoZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TASQCj3uni__T13InversionListTSQDkQBb8GcPolicyZQBhTQBwZQDhFNaNbNiNfQCnQCpZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TAaTaZQBlFNaNiNfQpaZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TAkTkZQBlFNaNbNiNfQrkZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TAyAaTQyZQBoFNaNbNiNfQuQBpZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TAyhTAxhZQBoFNaNbNiNfQuQsZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtTQCxTQDbTQDfTQDjTQDnTQDrTQDvZQEmFNaNfQDoQEkQEnQEqQEtQEwQEzQFcQFfZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtTQCxTQDbTQDfTQDjTQDnTQDrZQEiFNaNfQDkQEgQEjQEmQEpQEsQEvQEyZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTaTaZQDkFNaNbNiNfQCqaaZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTaZQDiFNaNbNiNfQCoaZl@Base 12 ++ _D3std9algorithm9searching__T10countUntilVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTyaZQDjFNaNbNiNfQCpyaZl@Base 12 ++ _D3std9algorithm9searching__T10startsWithSQBoQBnQBg11__lambda171TAxaTAyaTQeTQhZQByFNaNfQwQuQwQyZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithSQBoQBnQBg11__lambda171TAxaTAyaTQeZQBvFNaNfQtQrQtZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithSQBoQBnQBg11__lambda171TAxaTAyaZQBsFNaNfQqQoZb@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TAxaTQxZQBnFNaNbNiNfQtQBoZb@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TAxaTaZQBmFNaNbNiNfQsaZb@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TAyhTQxZQBnFNaNfQpQBkZb@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TQtTQwZQBmFNaNbNiNfQBlQBoZb@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtTQCxTQDbTQDfTQDjTQDnTQDrTQDvZQEmFNaNfQDoQEkQEnQEqQEtQEwQEzQFcQFfZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtTQCxTQDbTQDfTQDjTQDnTQDrZQEiFNaNfQDkQEgQEjQEmQEpQEsQEvQEyZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtTQCxTQDbTQDfTQDjTQDnZQEeFNaNfQDgQEcQEfQEiQElQEoQErZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtTQCxTQDbTQDfTQDjZQEaFNaNfQDcQDyQEbQEeQEhQEkZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtTQCxTQDbTQDfZQDwFNaNfQCyQDuQDxQEaQEdZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtTQCxTQDbZQDsFNaNfQCuQDqQDtQDwZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtTQCxZQDoFNaNfQCqQDmQDpZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTQCtZQDkFNaNfQCmQDiZb@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTaTaZQDkFNaNbNiNfQCqaaZk@Base 12 ++ _D3std9algorithm9searching__T10startsWithVAyaa6_61203d3d2062TSQCi3utf__T10byCodeUnitTQBrZQrFQByZ14ByCodeUnitImplTaZQDiFNaNbNiNfQCoaZb@Base 12 ++ _D3std9algorithm9searching__T14balancedParensTAxaTaZQxFNaNbNiNfQraamZb@Base 12 ++ _D3std9algorithm9searching__T3anyS_DQBi4path14isDirSeparatorFNaNbNiNfwZbZ__TQBvTAxaZQCdFNaNfQmZb@Base 12 ++ _D3std9algorithm9searching__T3anyVAyaa6_6120213d2030Z__TQBbTAkZQBiFNaNbNiNfQpZb@Base 12 ++ _D3std9algorithm9searching__T3anyVAyaa6_6120213d2030Z__TQBbTAxkZQBjFNaNbNiNfQqZb@Base 12 ++ _D3std9algorithm9searching__T4findS_DQBj4path14isDirSeparatorFNaNbNiNfwZbTAxaZQBxFNaNfQmZQp@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_6120213d2030TAkZQBcFNaNbNiNfQpZQs@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_6120213d2030TAxkZQBdFNaNbNiNfQqZQt@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAaTQdZQBfFNaNbNiNfQsMQvZQy@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAaTQdZQBfFQkMQnZ__T5forceTAhTQBdZQoFNaNbNiNeNgAaZQx@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAaTQdZQBfFQkMQnZ__T5forceTQBaTAhZQoFNaNbNiNeNgAhZQBx@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAaTaZQBeFNaNfQnaZQr@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAaTaZQBeFQjaZ13trustedMemchrFNaNbNiNeNkMKNgAaKxaZNgQi@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAhTQdZQBfFNaNbNiNfQsMQvZQy@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAxaTQxZQBgFNaNbNiNfQtMQBpZQBa@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAxaTQxZQBgFQlMQBhZ__T5forceTAhTAaZQnFNaNbNiNeNgAaZQw@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAxaTQxZQBgFQlMQBhZ__T5forceTQBcTAhZQoFNaNbNiNeNgAhZQBz@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAyAaTQyZQBhFNaNbNiNfQuMQBqZQBb@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAyhTAxhZQBhFNaNbNiNfQuMQtZQBa@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TAyhTQxZQBgFNaNfQpMQBlZQw@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTAaZQBfFNaNbNiNfQBlMQtZQBs@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTAaZQBfFQBdMQlZ__T5forceTAhTQBbZQoFNaNbNiNeNgAaZQx@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTAaZQBfFQBdMQlZ__T5forceTQBuTAhZQoFNaNbNiNeNgAhZQCr@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTQwZQBfFNaNbNiNfQBlMQBpZQBt@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTQwZQBfFQBdMQBhZ__T5forceTAhTAaZQnFNaNbNiNeNgAaZQw@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTQwZQBfFQBdMQBhZ__T5forceTQBvTAhZQoFNaNbNiNeNgAhZQCs@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTaZQBeFNaNfQBgaZQBl@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTaZQBeFQBcaZ13trustedMemchrFNaNbNiNeNkMKNgAyaKxaZNgQj@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTxaZQBfFNaNfQBhxaZQBn@Base 12 ++ _D3std9algorithm9searching__T4findVAyaa6_61203d3d2062TQtTxaZQBfFQBdxaZ13trustedMemchrFNaNbNiNeNkMKNgAyaKxaZNgQj@Base 12 ++ _D3std9algorithm9searching__T5countTAyaZQlFNaNbNiNfQpZm@Base 12 ++ _D3std9algorithm9searching__T5countVAyaa6_61203d3d2062TQtTQwZQBgFNaNbNiNfQBlQBoZm@Base 12 ++ _D3std9algorithm9searching__T7canFindVAyaa6_6120213d2030Z__TQBfTAkZQBmFNaNbNiNfQpZb@Base 12 ++ _D3std9algorithm9searching__T7canFindVAyaa6_6120213d2030Z__TQBfTAxkZQBnFNaNbNiNfQqZb@Base 12 ++ _D3std9algorithm9searching__T7canFindZ__TQmTAaTaZQuFNaNfQmaZb@Base 12 ++ _D3std9algorithm9searching__T7canFindZ__TQmTAyAaTAyaZQyFNaNbNiNfQuMQsZb@Base 12 ++ _D3std9algorithm9searching__T7canFindZ__TQmTAyhTAyaZQxFNaNfQpMQoZb@Base 12 ++ _D3std9algorithm9searching__T8endsWithVAyaa6_61203d3d2062TQtTQwZQBjFNaNbNiNfQBlQBoZb@Base 12 ++ _D3std9algorithm9searching__T8findSkipVAyaa6_61203d3d2062TQtTQwZQBjFNaNbNiNfKQBmQBpZb@Base 12 ++ _D3std9algorithm9searching__T8skipOverZ__TQnTAxwTAywZQyFNaNbNiNfKQuQsZb@Base 12 ++ _D3std9algorithm9searching__T8skipOverZ__TQnTSQBs3utf__T5byUTFTwVEQCm8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFpQDx__T10byCodeUnitTAxaZQrFQhZ14ByCodeUnitImplZQFkFNcQCeZ6ResultTAywZQHhFNaNbNiNfKQHeQuZb@Base 12 ++ _D3std9algorithm9searching__T8skipOverZ__TQnTSQBs3utf__T5byUTFTwVEQCm8typecons__T4FlagVAyaa19_7573655265706c6163656d656e744463686172ZQCai1Z__TQDiTSQFpQDx__T10byCodeUnitTAxuZQrFQhZ14ByCodeUnitImplZQFkFNcQCeZ6ResultTAywZQHhFNaNbNiNfKQHeQuZb@Base 12 ++ _D3std9algorithm9searching__T9findSplitVAyaa6_61203d3d2062TQtTQwZQBkFNaNbNiNfQBlQBoZSQDfQDeQCx__TQCqVQCja6_61203d3d2062TQDcTQDgZQDvFQDoQDrZ__T6ResultTQEgTQEkZQq@Base 12 ++ _D3std9algorithm9searching__T9findSplitVAyaa6_61203d3d2062TQtTQwZQBkFQBdQBgZ__T6ResultTQBvTQBzZQq11__xopEqualsMxFKxSQEkQEjQEc__TQDvVQDoa6_61203d3d2062TQEhTQElZQFaFQEtQEwZ__TQDqTQFhTQFlZQEcZb@Base 12 ++ _D3std9algorithm9searching__T9findSplitVAyaa6_61203d3d2062TQtTQwZQBkFQBdQBgZ__T6ResultTQBvTQBzZQq6__ctorMFNaNbNcNiNfQCyQDbQDeZSQEvQEuQEn__TQEgVQDza6_61203d3d2062TQEsTQEwZQFlFQFeQFhZ__TQEbTQFsTQFwZQEn@Base 12 ++ _D3std9algorithm9searching__T9findSplitVAyaa6_61203d3d2062TQtTQwZQBkFQBdQBgZ__T6ResultTQBvTQBzZQq6__initZ@Base 12 ++ _D3std9algorithm9searching__T9findSplitVAyaa6_61203d3d2062TQtTQwZQBkFQBdQBgZ__T6ResultTQBvTQBzZQq8opAssignMFNaNbNcNiNjNfSQEpQEoQEh__TQEaVQDta6_61203d3d2062TQEmTQEqZQFfFQEyQFbZ__TQDvTQFmTQFqZQEhZQCw@Base 12 ++ _D3std9algorithm9searching__T9findSplitVAyaa6_61203d3d2062TQtTQwZQBkFQBdQBgZ__T6ResultTQBvTQBzZQq8opAssignMFNaNbNiNfSQEl8typecons__T5TupleTQDvTQDzTQEdZQtZv@Base 12 ++ _D3std9algorithm9searching__T9findSplitVAyaa6_61203d3d2062TQtTQwZQBkFQBdQBgZ__T6ResultTQBvTQBzZQq9__xtoHashFNbNeKxSQEjQEiQEb__TQDuVQDna6_61203d3d2062TQEgTQEkZQEzFQEsQEvZ__TQDpTQFgTQFkZQEbZm@Base 12 ++ _D3std9container10binaryheap11__moduleRefZ@Base 12 ++ _D3std9container10binaryheap12__ModuleInfoZ@Base 12 ++ _D3std9container11__moduleRefZ@Base 12 ++ _D3std9container12__ModuleInfoZ@Base 12 ++ _D3std9container4util11__moduleRefZ@Base 12 ++ _D3std9container4util12__ModuleInfoZ@Base 12 ++ _D3std9container5array11__moduleRefZ@Base 12 ++ _D3std9container5array12__ModuleInfoZ@Base 12 ++ _D3std9container5dlist11__moduleRefZ@Base 12 ++ _D3std9container5dlist12__ModuleInfoZ@Base 12 ++ _D3std9container5dlist6DRange4backMFNaNbNdNjNfZPSQBvQBuQBn8BaseNode@Base 12 ++ _D3std9container5dlist6DRange4saveMFNaNbNdNjNfZSQBuQBtQBmQBj@Base 12 ++ _D3std9container5dlist6DRange5emptyMxFNaNbNdNlNfZb@Base 12 ++ _D3std9container5dlist6DRange5frontMFNaNbNdNjNfZPSQBwQBvQBo8BaseNode@Base 12 ++ _D3std9container5dlist6DRange6__ctorMFNaNbNcNfPSQBuQBtQBm8BaseNodeQuZSQCqQCpQCiQCf@Base 12 ++ _D3std9container5dlist6DRange6__ctorMFNaNbNcNfPSQBuQBtQBm8BaseNodeZSQCoQCnQCgQCd@Base 12 ++ _D3std9container5dlist6DRange6__initZ@Base 12 ++ _D3std9container5dlist6DRange7popBackMFNaNbNlNfZv@Base 12 ++ _D3std9container5dlist6DRange8popFrontMFNaNbNlNfZv@Base 12 ++ _D3std9container5dlist8BaseNode6__initZ@Base 12 ++ _D3std9container5dlist8BaseNode7connectFNaNbNfPSQBuQBtQBmQBjQoZv@Base 12 ++ _D3std9container5slist11__moduleRefZ@Base 12 ++ _D3std9container5slist12__ModuleInfoZ@Base 12 ++ _D3std9container6rbtree11__moduleRefZ@Base 12 ++ _D3std9container6rbtree12__ModuleInfoZ@Base 12 ++ _D3std9exception11__moduleRefZ@Base 12 ++ _D3std9exception11errnoStringFNbNeiZAya@Base 12 ++ _D3std9exception12__ModuleInfoZ@Base 12 ++ _D3std9exception14ErrnoException5errnoMFNaNbNdNiNfZk@Base 12 ++ _D3std9exception14ErrnoException6__ctorMFNfAyaQdmZCQBxQBwQBp@Base 12 ++ _D3std9exception14ErrnoException6__ctorMFNfAyaiQemZCQByQBxQBq@Base 12 ++ _D3std9exception14ErrnoException6__initZ@Base 12 ++ _D3std9exception14ErrnoException6__vtblZ@Base 12 ++ _D3std9exception14ErrnoException7__ClassZ@Base 12 ++ _D3std9exception14RangePrimitive6__initZ@Base 12 ++ _D3std9exception__T11doesPointToTAAyaTQfTvZQyFNaNbNiNeKxAAyaKxQgZb@Base 12 ++ _D3std9exception__T11doesPointToTACQBh3zip13ArchiveMemberTQzTvZQBsFNaNbNiNeKxACQCzQBsQBrKxQnZb@Base 12 ++ _D3std9exception__T11doesPointToTASQBh5regex8internal2ir10NamedGroupTQBkTvZQCeFNaNbNiNeKxASQDlQCeQCbQBvQBvKxQtZb@Base 12 ++ _D3std9exception__T11doesPointToTASQBh8datetime8timezone13PosixTimeZone10LeapSecondTQBzTvZQCtFNaNbNiNeKxASQEaQCtQCnQChQBvKxQtZb@Base 12 ++ _D3std9exception__T11doesPointToTASQBh8datetime8timezone13PosixTimeZone14TempTransitionTQCdTvZQCxFNaNbNiNeKxASQEeQCxQCrQClQBzKxQtZb@Base 12 ++ _D3std9exception__T11doesPointToTAkTQdTvZQwFNaNbNiNeKxAkKxQeZb@Base 12 ++ _D3std9exception__T11doesPointToTAxSQBi4file15DirIteratorImpl9DirHandleTSQCtQBlQBjTvZQCoFNaNbNiNeKxAQCnKxSQEaQCsQCqZb@Base 12 ++ _D3std9exception__T11doesPointToTAxSQBi4file8DirEntryTSQCbQt15DirIteratorImplTvZQCjFNaNbNiNeKxAQCiKxSQDvQCnQBvZb@Base 12 ++ _D3std9exception__T11doesPointToTAxkTSQBk3uni__T13InversionListTSQClQBb8GcPolicyZQBh__T9IntervalsTAkZQoTvZQDjFNaNbNiNeKxAkKxSQEtQDj__TQDiTQCwZQDq__TQCjTQCcZQCrZb@Base 12 ++ _D3std9exception__T11doesPointToTAyaTSQBk3net4curl3FTP4ImplTvZQBrFNaNbNiNeKxAyaKxSQDcQBsQBrQBpQBoZb@Base 12 ++ _D3std9exception__T11doesPointToTAyaTSQBk3net4curl4HTTP4ImplTvZQBsFNaNbNiNeKxAyaKxSQDdQBtQBsQBqQBoZb@Base 12 ++ _D3std9exception__T11doesPointToTAyaTSQBk4file15DirIteratorImplTvZQBvFNaNbNiNeKxAyaKxSQDgQBwQBuZb@Base 12 ++ _D3std9exception__T11doesPointToTAyaTSQBk5stdio17LockingTextReaderTvZQByFNaNbNiNeKxAyaKxSQDjQBzQBwZb@Base 12 ++ _D3std9exception__T11doesPointToTAyaTSQBk5stdio4FileTvZQBkFNaNbNiNeKxAyaKxSQCvQBlQBiZb@Base 12 ++ _D3std9exception__T11doesPointToTCQBg3zip13ArchiveMemberTQyTvZQBrFNaNbNiNeKxCQCxQBrQBqKxQmZb@Base 12 ++ _D3std9exception__T11doesPointToTDFAhZmTSQBn3net4curl3FTP4ImplTvZQBuFNaNbNiNeKxDQBuKxSQDgQBtQBsQBqQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFAhZmTSQBn3net4curl4HTTP4ImplTvZQBvFNaNbNiNeKxDQBvKxSQDhQBuQBtQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFAhZmTSQBn3net4curl4SMTP4ImplTvZQBvFNaNbNiNeKxDQBvKxSQDhQBuQBtQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFAvZmTSQBn3net4curl3FTP4ImplTvZQBuFNaNbNiNeKxDQBuKxSQDgQBtQBsQBqQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFAvZmTSQBn3net4curl4HTTP4ImplTvZQBvFNaNbNiNeKxDQBvKxSQDhQBuQBtQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFAvZmTSQBn3net4curl4SMTP4ImplTvZQBvFNaNbNiNeKxDQBvKxSQDhQBuQBtQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFEQBi6socket8socket_tE3etc1c4curl12CurlSockTypeZiTSQDf3netQBe3FTP4ImplTvZQDkFNaNbNiNeKxDQDkKxSQEwQBrQCuQBqQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFEQBi6socket8socket_tE3etc1c4curl12CurlSockTypeZiTSQDf3netQBe4HTTP4ImplTvZQDlFNaNbNiNeKxDQDlKxSQExQBsQCvQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFEQBi6socket8socket_tE3etc1c4curl12CurlSockTypeZiTSQDf3netQBe4SMTP4ImplTvZQDlFNaNbNiNeKxDQDlKxSQExQBsQCvQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFIAaZvTSQBo3net4curl3FTP4ImplTvZQBvFNaNbNiNeKxDQBvKxSQDhQBtQBsQBqQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFIAaZvTSQBo3net4curl4HTTP4ImplTvZQBwFNaNbNiNeKxDQBwKxSQDiQBuQBtQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFIAaZvTSQBo3net4curl4SMTP4ImplTvZQBwFNaNbNiNeKxDQBwKxSQDiQBuQBtQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFSQBi3net4curl4HTTP10StatusLineZvTSQCpQBhQBgQBe4ImplTvZQCsFNaNbNiNeKxDQCsKxSQEeQCwQCvQCtQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFlE3etc1c4curl11CurlSeekPosZEQBaQzQz8CurlSeekTSQDb3netQBt3FTP4ImplTvZQDgFNaNbNiNeKxDQDgKxSQEsQBrQDjQBqQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFlE3etc1c4curl11CurlSeekPosZEQBaQzQz8CurlSeekTSQDb3netQBt4HTTP4ImplTvZQDhFNaNbNiNeKxDQDhKxSQEtQBsQDkQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFlE3etc1c4curl11CurlSeekPosZEQBaQzQz8CurlSeekTSQDb3netQBt4SMTP4ImplTvZQDhFNaNbNiNeKxDQDhKxSQEtQBsQDkQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFmmmmZiTSQBp3net4curl3FTP4ImplTvZQBwFNaNbNiNeKxDQBwKxSQDiQBtQBsQBqQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFmmmmZiTSQBp3net4curl4HTTP4ImplTvZQBxFNaNbNiNeKxDQBxKxSQDjQBuQBtQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTDFmmmmZiTSQBp3net4curl4SMTP4ImplTvZQBxFNaNbNiNeKxDQBxKxSQDjQBuQBtQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTEQBg3net4curl4HTTP6MethodTSQCgQBaQzQw4ImplTvZQChFNaNbNiNeKxEQDnQChQCgQCeQCcKxSQEfQCzQCyQCwQCbZb@Base 12 ++ _D3std9exception__T11doesPointToTEQBg4file8SpanModeTSQBzQt15DirIteratorImplTvZQChFNaNbNiNeKxEQDnQChQCfKxSQDzQCtQCbZb@Base 12 ++ _D3std9exception__T11doesPointToTG3lTSQBk4file15DirIteratorImplTvZQBvFNaNbNiNeKxG3lKxSQDgQBwQBuZb@Base 12 ++ _D3std9exception__T11doesPointToTHAyaxAyaTSQBp3net4curl4HTTP4ImplTvZQBxFNaNbNiNeKxHQBxQBwKxSQDmQBxQBwQBuQBsZb@Base 12 ++ _D3std9exception__T11doesPointToTPSQBh8typecons__T10RefCountedTSQCk3net4curl3FTP4ImplVEQDhQCa24RefCountedAutoInitializei1ZQCu15RefCountedStoreQCkTQEjTvZQFdFNaNbNiNeKxPSQGkQFd__TQExTQEoVQDvi1ZQFlQCrQEnKxQBkZb@Base 12 ++ _D3std9exception__T11doesPointToTPSQBh8typecons__T10RefCountedTSQCk3net4curl4HTTP4ImplVEQDiQCb24RefCountedAutoInitializei1ZQCv15RefCountedStoreQCkTQEkTvZQFeFNaNbNiNeKxPSQGlQFe__TQEyTQEpVQDvi1ZQFmQCrQEnKxQBkZb@Base 12 ++ _D3std9exception__T11doesPointToTPSQBh8typecons__T10RefCountedTSQCk3net4curl4SMTP4ImplVEQDiQCb24RefCountedAutoInitializei1ZQCv15RefCountedStoreQCkTQEkTvZQFeFNaNbNiNeKxPSQGlQFe__TQEyTQEpVQDvi1ZQFmQCrQEnKxQBkZb@Base 12 ++ _D3std9exception__T11doesPointToTPSQBh8typecons__T10RefCountedTSQCk4file15DirIteratorImplVEQDlQCe24RefCountedAutoInitializei0ZQCy15RefCountedStore4ImplTQEpTvZQFjFNaNbNiNeKxPSQGqQFj__TQFdTQEuVQDxi0ZQFrQCtQCfKxQBkZb@Base 12 ++ _D3std9exception__T11doesPointToTPxS3etc1c4curl10curl_slistTSQCh3netQBa3FTP4ImplTvZQCmFNaNbNiNeKxPQClKxSQDyQBrQCqQBqQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTPxS3etc1c4curl10curl_slistTSQCh3netQBa4HTTP4ImplTvZQCnFNaNbNiNeKxPQCmKxSQDzQBsQCrQBrQBpZb@Base 12 ++ _D3std9exception__T11doesPointToTPxSQBi5stdio4File4ImplTSQCdQv17LockingTextReaderTvZQCnFNaNbNiNeKxPQCmKxSQDzQCrQBxZb@Base 12 ++ _D3std9exception__T11doesPointToTPxSQBi5stdio4File4ImplTSQCdQvQrTvZQBwFNaNbNiNeKxPQBvKxSQDiQCaQBxZb@Base 12 ++ _D3std9exception__T11doesPointToTPxSQBi8datetime8timezone13PosixTimeZone14TransitionTypeTSQDkQCcQBwQBq14TempTransitionTvZQDyFNaNbNiNeKxPQDxKxSQFkQEcQDwQDqQCaZb@Base 12 ++ _D3std9exception__T11doesPointToTPxvTSQBk3net4curl3FTP4ImplTvZQBrFNaNbNiNeKxPvKxSQDbQBrQBqQBoQBnZb@Base 12 ++ _D3std9exception__T11doesPointToTPxvTSQBk3net4curl4HTTP4ImplTvZQBsFNaNbNiNeKxPvKxSQDcQBsQBrQBpQBnZb@Base 12 ++ _D3std9exception__T11doesPointToTPxvTSQBk3net4curl4SMTP4ImplTvZQBsFNaNbNiNeKxPvKxSQDcQBsQBrQBpQBnZb@Base 12 ++ _D3std9exception__T11doesPointToTPySQBi8datetime8timezone13PosixTimeZone6TTInfoTSQDbQBtQBnQBh14TempTransitionTvZQDpFNaNbNiNeKxPyQDpKxSQFcQDuQDoQDiQCbZb@Base 12 ++ _D3std9exception__T11doesPointToTS4core3sys5posixQk4stat6stat_tTSQCl4file15DirIteratorImplTvZQCwFNaNbNiNeKxSQCwQCuQCtQDaQCrQCpKxSQExQCmQCkZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg3net4curl3FTP4ImplTQxTvZQBqFNaNbNiNeKxSQCwQBqQBpQBnQBmKxQsZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg3net4curl4CurlTSQBzQtQr3FTP4ImplTvZQCbFNaNbNiNeKxSQDhQCbQCaQByKxSQDwQCqQCpQBzQByZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg3net4curl4CurlTSQBzQtQr4HTTP4ImplTvZQCcFNaNbNiNeKxSQDiQCcQCbQBzKxSQDxQCrQCqQCaQByZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg3net4curl4CurlTSQBzQtQr4SMTP4ImplTvZQCcFNaNbNiNeKxSQDiQCcQCbQBzKxSQDxQCrQCqQCaQByZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg3net4curl4HTTP10StatusLineTSQClQBfQBeQBc4ImplTvZQCoFNaNbNiNeKxSQDuQCoQCnQClQCjKxSQEmQDgQDfQDdQCbZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg3net4curl4HTTP4ImplTQyTvZQBrFNaNbNiNeKxSQCxQBrQBqQBoQBmKxQsZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg3net4curl4SMTP4ImplTQyTvZQBrFNaNbNiNeKxSQCxQBrQBqQBoQBmKxQsZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg3uni__T13InversionListTSQChQBb8GcPolicyZQBh__T9IntervalsTAkZQoTQCpTvZQDjFNaNbNiNeKxSQEpQDj__TQDiTQCwZQDq__TQCjTQCcZQCrKxQBlZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg4file15DirIteratorImplTQBbTvZQBvFNaNbNiNeKxSQDbQBvQBtKxQmZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg4file8DirEntryTSQBzQt15DirIteratorImplTvZQChFNaNbNiNeKxSQDnQChQCfKxSQDzQCtQCbZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg5stdio17LockingTextReaderTQBeTvZQByFNaNbNiNeKxSQDeQByQBvKxQmZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg5stdio4FileTQqTvZQBjFNaNbNiNeKxSQCpQBjQBgKxQmZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg5stdio4FileTSQBwQq17LockingTextReaderTvZQCgFNaNbNiNeKxSQDmQCgQCdKxSQDyQCsQCdZb@Base 12 ++ _D3std9exception__T11doesPointToTSQBg8datetime8timezone13PosixTimeZone14TempTransitionTQCcTvZQCwFNaNbNiNeKxSQEcQCwQCqQCkQByKxQsZb@Base 12 ++ _D3std9exception__T11doesPointToTaTSQBi5stdio17LockingTextReaderTvZQBwFNaNbNiNeKxaKxSQDfQBxQBuZb@Base 12 ++ _D3std9exception__T11doesPointToTbTSQBi3net4curl3FTP4ImplTvZQBpFNaNbNiNeKxbKxSQCyQBqQBpQBnQBmZb@Base 12 ++ _D3std9exception__T11doesPointToTbTSQBi3net4curl4HTTP4ImplTvZQBqFNaNbNiNeKxbKxSQCzQBrQBqQBoQBmZb@Base 12 ++ _D3std9exception__T11doesPointToTbTSQBi3net4curl4SMTP4ImplTvZQBqFNaNbNiNeKxbKxSQCzQBrQBqQBoQBmZb@Base 12 ++ _D3std9exception__T11doesPointToTbTSQBi4file15DirIteratorImplTvZQBtFNaNbNiNeKxbKxSQDcQBuQBsZb@Base 12 ++ _D3std9exception__T11doesPointToTbTSQBi5stdio17LockingTextReaderTvZQBwFNaNbNiNeKxbKxSQDfQBxQBuZb@Base 12 ++ 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_D3std9exception__T12assumeUniqueTkZQrFNaNbNiKAkZAyk@Base 12 ++ _D3std9exception__T16collectExceptionHTC9ExceptionTmZQBiFNaNbNfLmZQBb@Base 12 ++ _D3std9exception__T18isUnionAliasedImplTS4core3sys5posixQk4stat6stat_tZQCaFNaNbNiNfmZb@Base 12 ++ _D3std9exception__T18isUnionAliasedImplTSQBn3net4curl3FTP4ImplZQBsFNaNbNiNfmZb@Base 12 ++ _D3std9exception__T18isUnionAliasedImplTSQBn3net4curl4CurlZQBoFNaNbNiNfmZb@Base 12 ++ _D3std9exception__T18isUnionAliasedImplTSQBn3net4curl4HTTP10StatusLineZQCaFNaNbNiNfmZb@Base 12 ++ _D3std9exception__T18isUnionAliasedImplTSQBn3net4curl4HTTP4ImplZQBtFNaNbNiNfmZb@Base 12 ++ _D3std9exception__T18isUnionAliasedImplTSQBn3net4curl4SMTP4ImplZQBtFNaNbNiNfmZb@Base 12 ++ _D3std9exception__T18isUnionAliasedImplTSQBn3uni__T13InversionListTSQCoQBb8GcPolicyZQBh__T9IntervalsTAkZQoZQDkFNaNbNiNfmZb@Base 12 ++ _D3std9exception__T18isUnionAliasedImplTSQBn4file15DirIteratorImplZQBwFNaNbNiNfmZb@Base 12 ++ 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++ _D4core3sys5posix6setjmp13__jmp_buf_tag6__initZ@Base 12 ++ _D4core3sys5posix6signal11__moduleRefZ@Base 12 ++ _D4core3sys5posix6signal11sigaction_t6__initZ@Base 12 ++ _D4core3sys5posix6signal12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6signal6sigval6__initZ@Base 12 ++ _D4core3sys5posix6signal7stack_t6__initZ@Base 12 ++ _D4core3sys5posix6signal8SIGRTMAXUNbNdNiZ3sigi@Base 12 ++ _D4core3sys5posix6signal8SIGRTMINUNbNdNiZ3sigi@Base 12 ++ _D4core3sys5posix6signal8sigevent6__initZ@Base 12 ++ _D4core3sys5posix6signal8sigset_t6__initZ@Base 12 ++ _D4core3sys5posix6signal8sigstack6__initZ@Base 12 ++ _D4core3sys5posix6signal8timespec6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t10_sigpoll_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t11_sigchild_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t11_sigfault_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t5_rt_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t7_kill_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t11_sifields_t8_timer_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t6__initZ@Base 12 ++ _D4core3sys5posix6signal9siginfo_t6si_pidMUNbNcNdNiNjZi@Base 12 ++ _D4core3sys5posix6signal9siginfo_t6si_uidMUNbNcNdNiNjZk@Base 12 ++ _D4core3sys5posix6signal9siginfo_t7si_addrMUNbNcNdNiNjZPv@Base 12 ++ _D4core3sys5posix6signal9siginfo_t7si_bandMUNbNcNdNiNjZl@Base 12 ++ _D4core3sys5posix6signal9siginfo_t8si_valueMUNbNcNdNiNjZSQCdQCbQCaQBx6sigval@Base 12 ++ _D4core3sys5posix6signal9siginfo_t9si_statusMUNbNcNdNiNjZi@Base 12 ++ _D4core3sys5posix6stdlib11__moduleRefZ@Base 12 ++ _D4core3sys5posix6stdlib12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6string11__moduleRefZ@Base 12 ++ _D4core3sys5posix6string12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6syslog11__moduleRefZ@Base 12 ++ _D4core3sys5posix6syslog12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix6unistd11__moduleRefZ@Base 12 ++ _D4core3sys5posix6unistd12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7netinet3in_11__moduleRefZ@Base 12 ++ _D4core3sys5posix7netinet3in_11sockaddr_in6__initZ@Base 12 ++ _D4core3sys5posix7netinet3in_12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7netinet3in_12sockaddr_in66__initZ@Base 12 ++ _D4core3sys5posix7netinet3in_20IN6_IS_ADDR_LOOPBACKFNaNbNiPSQCgQCeQCdQCaQBv8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_20IN6_IS_ADDR_V4COMPATFNaNbNiPSQCgQCeQCdQCaQBv8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_20IN6_IS_ADDR_V4MAPPEDFNaNbNiPSQCgQCeQCdQCaQBv8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_21IN6_IS_ADDR_LINKLOCALFNaNbNiPSQChQCfQCeQCbQBw8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_21IN6_IS_ADDR_MC_GLOBALFNaNbNiPSQChQCfQCeQCbQBw8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_21IN6_IS_ADDR_MULTICASTFNaNbNiPSQChQCfQCeQCbQBw8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_21IN6_IS_ADDR_SITELOCALFNaNbNiPSQChQCfQCeQCbQBw8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_23IN6_IS_ADDR_MC_ORGLOCALFNaNbNiPSQCjQChQCgQCdQBy8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_23IN6_IS_ADDR_UNSPECIFIEDFNaNbNiPSQCjQChQCgQCdQBy8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_24IN6_IS_ADDR_MC_LINKLOCALFNaNbNiPSQCkQCiQChQCeQBz8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_24IN6_IS_ADDR_MC_NODELOCALFNaNbNiPSQCkQCiQChQCeQBz8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_24IN6_IS_ADDR_MC_SITELOCALFNaNbNiPSQCkQCiQChQCeQBz8in6_addrZi@Base 12 ++ _D4core3sys5posix7netinet3in_8in6_addr6__initZ@Base 12 ++ _D4core3sys5posix7netinet3in_9ipv6_mreq6__initZ@Base 12 ++ _D4core3sys5posix7netinet3tcp11__moduleRefZ@Base 12 ++ _D4core3sys5posix7netinet3tcp12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7pthread11__moduleRefZ@Base 12 ++ _D4core3sys5posix7pthread12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7pthread15pthread_cleanup6__initZ@Base 12 ++ _D4core3sys5posix7pthread15pthread_cleanup__T3popZQfMFNbiZv@Base 12 ++ _D4core3sys5posix7pthread15pthread_cleanup__T4pushHTPUNaNbNiPvZvZQuMFNbNiQvQpZv@Base 12 ++ _D4core3sys5posix7pthread23_pthread_cleanup_buffer6__initZ@Base 12 ++ _D4core3sys5posix7strings11__moduleRefZ@Base 12 ++ _D4core3sys5posix7strings12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7termios11__moduleRefZ@Base 12 ++ _D4core3sys5posix7termios12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix7termiosQi6__initZ@Base 12 ++ _D4core3sys5posix8inttypes11__moduleRefZ@Base 12 ++ _D4core3sys5posix8inttypes12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix8ucontext10mcontext_t6__initZ@Base 12 ++ _D4core3sys5posix8ucontext10ucontext_t6__initZ@Base 12 ++ _D4core3sys5posix8ucontext11__moduleRefZ@Base 12 ++ _D4core3sys5posix8ucontext12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix8ucontext12_libc_fpxreg6__initZ@Base 12 ++ _D4core3sys5posix8ucontext12_libc_xmmreg6__initZ@Base 12 ++ _D4core3sys5posix8ucontext13_libc_fpstate6__initZ@Base 12 ++ _D4core3sys5posix9semaphore11__moduleRefZ@Base 12 ++ _D4core3sys5posix9semaphore12__ModuleInfoZ@Base 12 ++ _D4core3sys5posix9semaphore17_pthread_fastlock6__initZ@Base 12 ++ _D4core3sys5posix9semaphore5sem_t6__initZ@Base 12 ++ _D4core3sys5posixQk2un11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk2un11sockaddr_un6__initZ@Base 12 ++ _D4core3sys5posixQk2un12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk3ipc11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk3ipc12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk3ipc8ipc_perm6__initZ@Base 12 ++ _D4core3sys5posixQk3msg11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk3msg12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk3msg6msgbuf6__initZ@Base 12 ++ _D4core3sys5posixQk3msg7msginfo6__initZ@Base 12 ++ _D4core3sys5posixQk3msg8msqid_ds6__initZ@Base 12 ++ _D4core3sys5posixQk3shm11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk3shm12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk3shm8shmid_ds6__initZ@Base 12 ++ _D4core3sys5posixQk3uio11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk3uio12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk3uio5iovec6__initZ@Base 12 ++ _D4core3sys5posixQk4mman11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk4mman12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk4stat11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk4stat12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk4stat6stat_t6__initZ@Base 12 ++ _D4core3sys5posixQk4stat7S_ISBLKFNbNikZb@Base 12 ++ _D4core3sys5posixQk4stat7S_ISCHRFNbNikZb@Base 12 ++ _D4core3sys5posixQk4stat7S_ISDIRFNbNikZb@Base 12 ++ _D4core3sys5posixQk4stat7S_ISLNKFNbNikZb@Base 12 ++ _D4core3sys5posixQk4stat7S_ISREGFNbNikZb@Base 12 ++ _D4core3sys5posixQk4stat8S_ISFIFOFNbNikZb@Base 12 ++ _D4core3sys5posixQk4stat8S_ISSOCKFNbNikZb@Base 12 ++ _D4core3sys5posixQk4stat8S_ISTYPEFNbNikkZb@Base 12 ++ _D4core3sys5posixQk4time11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk4time12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk4time7timeval6__initZ@Base 12 ++ _D4core3sys5posixQk4time9itimerval6__initZ@Base 12 ++ _D4core3sys5posixQk4wait10WIFSTOPPEDFNaNbNiNfiZb@Base 12 ++ _D4core3sys5posixQk4wait10__WTERMSIGFNaNbNiNfiZi@Base 12 ++ _D4core3sys5posixQk4wait11WEXITSTATUSFNaNbNiNfiZi@Base 12 ++ _D4core3sys5posixQk4wait11WIFSIGNALEDFNaNbNiNfiZb@Base 12 ++ _D4core3sys5posixQk4wait11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk4wait12WIFCONTINUEDFNaNbNiNfiZi@Base 12 ++ _D4core3sys5posixQk4wait12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk4wait8WSTOPSIGFNaNbNiNfiZi@Base 12 ++ _D4core3sys5posixQk4wait8WTERMSIGFNaNbNiNfiZi@Base 12 ++ _D4core3sys5posixQk4wait9WIFEXITEDFNaNbNiNfiZb@Base 12 ++ _D4core3sys5posixQk5filio11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk5filio12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk5ioctl11__moduleRefZ@Base 12 ++ _D4core3sys5posixQk5ioctl12__ModuleInfoZ@Base 12 ++ _D4core3sys5posixQk5ioctl3_IOFNbNiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl6termio6__initZ@Base 12 ++ _D4core3sys5posixQk5ioctl7_IOC_NRFNbNiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl7winsize6__initZ@Base 12 ++ _D4core3sys5posixQk5ioctl8_IOC_DIRFNbNiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl8termios26__initZ@Base 12 ++ _D4core3sys5posixQk5ioctl9_IOC_SIZEFNbNiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl9_IOC_TYPEFNbNiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IOCTPaZQjFNaNbNiiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IOCTPmZQjFNaNbNiiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IOCTSQBhQBfQBeQBlQBc8termios2ZQBgFNaNbNiiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IOCTiZQiFNaNbNiiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IOCTkZQiFNaNbNiiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IOCTmZQiFNaNbNiiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IOCTnZQiFNaNbNiiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IORTPmZQjFNaNbNiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IORTSQBhQBfQBeQBlQBc8termios2ZQBgFNaNbNiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IORTkZQiFNaNbNiiiZi@Base 12 ++ _D4core3sys5posixQk5ioctl__T4_IORTmZQiFNaNbNiiiZi@Base 12 ++ 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_D4core4stdc6stdint__T7_typifyThZQlFNaNbNiNfhZh@Base 12 ++ _D4core4stdc6stdint__T7_typifyTiZQlFNaNbNiNfiZi@Base 12 ++ _D4core4stdc6stdint__T7_typifyTkZQlFNaNbNiNfkZk@Base 12 ++ _D4core4stdc6stdint__T7_typifyTlZQlFNaNbNiNflZl@Base 12 ++ _D4core4stdc6stdint__T7_typifyTmZQlFNaNbNiNfmZm@Base 12 ++ _D4core4stdc6stdint__T7_typifyTsZQlFNaNbNiNfsZs@Base 12 ++ _D4core4stdc6stdint__T7_typifyTtZQlFNaNbNiNftZt@Base 12 ++ _D4core4stdc6stdlib11__moduleRefZ@Base 12 ++ _D4core4stdc6stdlib12__ModuleInfoZ@Base 12 ++ _D4core4stdc6stdlib5div_t6__initZ@Base 12 ++ _D4core4stdc6stdlib6ldiv_t6__initZ@Base 12 ++ _D4core4stdc6stdlib7lldiv_t6__initZ@Base 12 ++ _D4core4stdc6string11__moduleRefZ@Base 12 ++ _D4core4stdc6string12__ModuleInfoZ@Base 12 ++ _D4core4stdc6tgmath11__moduleRefZ@Base 12 ++ _D4core4stdc6tgmath12__ModuleInfoZ@Base 12 ++ _D4core4stdc6wchar_11__moduleRefZ@Base 12 ++ _D4core4stdc6wchar_12__ModuleInfoZ@Base 12 ++ _D4core4stdc6wchar_8getwcharFNbNiNeZw@Base 12 ++ _D4core4stdc6wchar_8putwcharFNbNiNewZw@Base 12 ++ _D4core4stdc6wchar_9mbstate_t6__initZ@Base 12 ++ _D4core4stdc6wchar_9mbstate_t8___value6__initZ@Base 12 ++ _D4core4stdc6wctype11__moduleRefZ@Base 12 ++ _D4core4stdc6wctype12__ModuleInfoZ@Base 12 ++ _D4core4stdc7assert_11__moduleRefZ@Base 12 ++ _D4core4stdc7assert_12__ModuleInfoZ@Base 12 ++ _D4core4stdc7complex11__moduleRefZ@Base 12 ++ _D4core4stdc7complex12__ModuleInfoZ@Base 12 ++ _D4core4stdc8inttypes11__moduleRefZ@Base 12 ++ _D4core4stdc8inttypes12__ModuleInfoZ@Base 12 ++ _D4core4stdc8inttypes9imaxdiv_t6__initZ@Base 12 ++ _D4core4sync5event11__moduleRefZ@Base 12 ++ _D4core4sync5event12__ModuleInfoZ@Base 12 ++ _D4core4sync5event5Event10initializeMFNbNibbZv@Base 12 ++ _D4core4sync5event5Event14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core4sync5event5Event3setMFNbNiZv@Base 12 ++ _D4core4sync5event5Event4waitMFNbNiSQBi4time8DurationZb@Base 12 ++ _D4core4sync5event5Event4waitMFNbNiZb@Base 12 ++ _D4core4sync5event5Event5resetMFNbNiZv@Base 12 ++ _D4core4sync5event5Event6__ctorMFNbNcNibbZSQBpQBnQBlQBi@Base 12 ++ _D4core4sync5event5Event6__dtorMFNbNiZv@Base 12 ++ _D4core4sync5event5Event6__initZ@Base 12 ++ _D4core4sync5event5Event9terminateMFNbNiZv@Base 12 ++ _D4core4sync5mutex11__moduleRefZ@Base 12 ++ _D4core4sync5mutex12__ModuleInfoZ@Base 12 ++ _D4core4sync5mutex5Mutex10handleAddrMFZPSQBn3sys5posixQk5types15pthread_mutex_t@Base 12 ++ _D4core4sync5mutex5Mutex12MonitorProxy11__xopEqualsMxFKxSQCdQCbQBzQBwQBtZb@Base 12 ++ _D4core4sync5mutex5Mutex12MonitorProxy6__initZ@Base 12 ++ _D4core4sync5mutex5Mutex12MonitorProxy9__xtoHashFNbNeKxSQCcQCaQByQBvQBsZm@Base 12 ++ _D4core4sync5mutex5Mutex4lockMFNeZv@Base 12 ++ _D4core4sync5mutex5Mutex4lockMOFNeZv@Base 12 ++ _D4core4sync5mutex5Mutex6__ctorMFNbNiNeC6ObjectZCQBvQBtQBrQBo@Base 12 ++ _D4core4sync5mutex5Mutex6__ctorMFNbNiNeZCQBnQBlQBjQBg@Base 12 ++ _D4core4sync5mutex5Mutex6__ctorMOFNbNiNeC6ObjectZOCQBxQBvQBtQBq@Base 12 ++ _D4core4sync5mutex5Mutex6__ctorMOFNbNiNeZOCQBpQBnQBlQBi@Base 12 ++ _D4core4sync5mutex5Mutex6__dtorMFNbNiNeZv@Base 12 ++ _D4core4sync5mutex5Mutex6__initZ@Base 12 ++ _D4core4sync5mutex5Mutex6__vtblZ@Base 12 ++ _D4core4sync5mutex5Mutex6unlockMFNeZv@Base 12 ++ _D4core4sync5mutex5Mutex6unlockMOFNeZv@Base 12 ++ _D4core4sync5mutex5Mutex7__ClassZ@Base 12 ++ _D4core4sync5mutex5Mutex7tryLockMFNeZb@Base 12 ++ _D4core4sync5mutex5Mutex7tryLockMOFNeZb@Base 12 ++ _D4core4sync5mutex5Mutex__T12lock_nothrowTCQBpQBnQBlQBiZQBdMFNbNiNeZv@Base 12 ++ _D4core4sync5mutex5Mutex__T12lock_nothrowTOCQBqQBoQBmQBjZQBeMOFNbNiNeZv@Base 12 ++ _D4core4sync5mutex5Mutex__T14unlock_nothrowTCQBrQBpQBnQBkZQBfMFNbNiNeZv@Base 12 ++ _D4core4sync5mutex5Mutex__T14unlock_nothrowTOCQBsQBqQBoQBlZQBgMOFNbNiNeZv@Base 12 ++ _D4core4sync5mutex5Mutex__T15tryLock_nothrowTCQBsQBqQBoQBlZQBgMFNbNiNeZb@Base 12 ++ _D4core4sync5mutex5Mutex__T15tryLock_nothrowTOCQBtQBrQBpQBmZQBhMOFNbNiNeZb@Base 12 ++ _D4core4sync5mutex5Mutex__T6__ctorTCQBiQBgQBeQBbZQwMFNbNiNeC6ObjectbZQBi@Base 12 ++ _D4core4sync5mutex5Mutex__T6__ctorTCQBiQBgQBeQBbZQwMFNbNiNebZQBa@Base 12 ++ _D4core4sync5mutex5Mutex__T6__ctorTOCQBjQBhQBfQBcZQxMOFNbNiNeC6ObjectbZOQBk@Base 12 ++ _D4core4sync5mutex5Mutex__T6__ctorTOCQBjQBhQBfQBcZQxMOFNbNiNebZOQBc@Base 12 ++ _D4core4sync6config11__moduleRefZ@Base 12 ++ _D4core4sync6config12__ModuleInfoZ@Base 12 ++ _D4core4sync6config7mktspecFNbNiKSQBg3sys5posix6signal8timespecSQCk4time8DurationZv@Base 12 ++ _D4core4sync6config7mktspecFNbNiKSQBg3sys5posix6signal8timespecZv@Base 12 ++ _D4core4sync6config7mvtspecFNbNiKSQBg3sys5posix6signal8timespecSQCk4time8DurationZv@Base 12 ++ _D4core4sync7barrier11__moduleRefZ@Base 12 ++ _D4core4sync7barrier12__ModuleInfoZ@Base 12 ++ _D4core4sync7barrier7Barrier4waitMFZv@Base 12 ++ _D4core4sync7barrier7Barrier6__ctorMFkZCQBmQBkQBiQBd@Base 12 ++ _D4core4sync7barrier7Barrier6__initZ@Base 12 ++ _D4core4sync7barrier7Barrier6__vtblZ@Base 12 ++ _D4core4sync7barrier7Barrier7__ClassZ@Base 12 ++ _D4core4sync7rwmutex11__moduleRefZ@Base 12 ++ _D4core4sync7rwmutex12__ModuleInfoZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader12MonitorProxy11__xopEqualsMxFKxSQCwQCuQCsQCnQCaQBwZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader12MonitorProxy6__initZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader12MonitorProxy9__xtoHashFNbNeKxSQCvQCtQCrQCmQBzQBvZm@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader4lockMFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader4lockMOFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader6__initZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader6__vtblZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader6unlockMFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader6unlockMOFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7__ClassZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7tryLockMFNeSQCc4time8DurationZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7tryLockMFNeZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7tryLockMOFNeSQCd4time8DurationZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader7tryLockMOFNeZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader__T17shouldQueueReaderTCQCnQClQCjQCeQBrZQBlMFNaNbNdNiNfZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader__T17shouldQueueReaderTOCQCoQCmQCkQCfQBsZQBmMOFNaNbNdNiNfZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader__T6__ctorTCQCbQBzQBxQBsQBfZQzMFNaNbNiNeZQBe@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Reader__T6__ctorTOCQCcQCaQByQBtQBgZQBaMOFNaNbNiNeZOQBh@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer12MonitorProxy11__xopEqualsMxFKxSQCwQCuQCsQCnQCaQBwZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer12MonitorProxy6__initZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer12MonitorProxy9__xtoHashFNbNeKxSQCvQCtQCrQCmQBzQBvZm@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer4lockMFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer4lockMOFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer6__initZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer6__vtblZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer6unlockMFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer6unlockMOFNeZv@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7__ClassZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7tryLockMFNeSQCc4time8DurationZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7tryLockMFNeZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7tryLockMOFNeSQCd4time8DurationZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer7tryLockMOFNeZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer__T17shouldQueueWriterTCQCnQClQCjQCeQBrZQBlMFNaNbNdNiNfZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer__T17shouldQueueWriterTOCQCoQCmQCkQCfQBsZQBmMOFNaNbNdNiNfZb@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer__T6__ctorTCQCbQBzQBxQBsQBfZQzMFNaNbNiNeZQBe@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6Writer__T6__ctorTOCQCcQCaQByQBtQBgZQBaMOFNaNbNiNeZOQBh@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6__ctorMFNbNfEQBwQBuQBsQBn6PolicyZCQCrQCpQCnQCi@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6__ctorMOFNbNfEQBxQBvQBtQBo6PolicyZOCQCtQCrQCpQCk@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6__initZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6__vtblZ@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6policyMFNbNdNfZEQBzQBxQBvQBq6Policy@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6policyMOFNbNdNfZEQCaQByQBwQBr6Policy@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6readerMFNbNdNfZCQBzQBxQBvQBq6Reader@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6readerMOFNbNdNfZOCQCbQBzQBxQBs6Reader@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6writerMFNbNdNfZCQBzQBxQBvQBq6Writer@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex6writerMOFNbNdNfZOCQCbQBzQBxQBs6Writer@Base 12 ++ _D4core4sync7rwmutex14ReadWriteMutex7__ClassZ@Base 12 ++ _D4core4sync9condition11__moduleRefZ@Base 12 ++ _D4core4sync9condition12__ModuleInfoZ@Base 12 ++ _D4core4sync9condition9Condition13mutex_nothrowMFNaNbNdNiNfZCQChQCf5mutex5Mutex@Base 12 ++ _D4core4sync9condition9Condition13mutex_nothrowMOFNaNbNdNiNfZOCQCjQCh5mutex5Mutex@Base 12 ++ _D4core4sync9condition9Condition4waitMFSQBm4time8DurationZb@Base 12 ++ _D4core4sync9condition9Condition4waitMFZv@Base 12 ++ _D4core4sync9condition9Condition4waitMOFSQBn4time8DurationZb@Base 12 ++ _D4core4sync9condition9Condition4waitMOFZv@Base 12 ++ _D4core4sync9condition9Condition5mutexMFNdZCQBqQBoQs5Mutex@Base 12 ++ _D4core4sync9condition9Condition5mutexMOFNdZOCQBsQBqQu5Mutex@Base 12 ++ _D4core4sync9condition9Condition6__ctorMFNbNfCQBsQBq5mutex5MutexZCQCmQCkQCiQCb@Base 12 ++ _D4core4sync9condition9Condition6__ctorMOFNbNfOCQBuQBs5mutex5MutexZOCQCpQCnQClQCe@Base 12 ++ _D4core4sync9condition9Condition6__dtorMFZv@Base 12 ++ _D4core4sync9condition9Condition6__initZ@Base 12 ++ _D4core4sync9condition9Condition6__vtblZ@Base 12 ++ _D4core4sync9condition9Condition6notifyMFZv@Base 12 ++ _D4core4sync9condition9Condition6notifyMOFZv@Base 12 ++ _D4core4sync9condition9Condition7__ClassZ@Base 12 ++ _D4core4sync9condition9Condition9notifyAllMFZv@Base 12 ++ _D4core4sync9condition9Condition9notifyAllMOFZv@Base 12 ++ _D4core4sync9condition9Condition__T4waitTCQBoQBmQBkQBdZQuMFSQCg4time8DurationbZb@Base 12 ++ _D4core4sync9condition9Condition__T4waitTCQBoQBmQBkQBdZQuMFbZv@Base 12 ++ _D4core4sync9condition9Condition__T4waitTOCQBpQBnQBlQBeZQvMOFSQCi4time8DurationbZb@Base 12 ++ _D4core4sync9condition9Condition__T4waitTOCQBpQBnQBlQBeZQvMOFbZv@Base 12 ++ _D4core4sync9condition9Condition__T6__ctorTCQBqQBoQBmQBfTCQCeQCc5mutex5MutexZQBqMFNbNeQBdbZQBw@Base 12 ++ _D4core4sync9condition9Condition__T6__ctorTOCQBrQBpQBnQBgTOCQCgQCe5mutex5MutexZQBsMOFNbNeOQBfbZOQCa@Base 12 ++ _D4core4sync9condition9Condition__T6notifyTCQBqQBoQBmQBfZQwMFNbbZv@Base 12 ++ _D4core4sync9condition9Condition__T6notifyTOCQBrQBpQBnQBgZQxMOFNbbZv@Base 12 ++ _D4core4sync9condition9Condition__T9notifyAllTCQBtQBrQBpQBiZQzMFNbbZv@Base 12 ++ _D4core4sync9condition9Condition__T9notifyAllTOCQBuQBsQBqQBjZQBaMOFNbbZv@Base 12 ++ _D4core4sync9exception11__moduleRefZ@Base 12 ++ _D4core4sync9exception12__ModuleInfoZ@Base 12 ++ _D4core4sync9exception9SyncError6__ctorMFNaNbNfAyaC6object9ThrowableQvmZCQCtQCrQCpQCi@Base 12 ++ _D4core4sync9exception9SyncError6__ctorMFNaNbNfAyaQdmC6object9ThrowableZCQCtQCrQCpQCi@Base 12 ++ _D4core4sync9exception9SyncError6__initZ@Base 12 ++ _D4core4sync9exception9SyncError6__vtblZ@Base 12 ++ _D4core4sync9exception9SyncError7__ClassZ@Base 12 ++ _D4core4sync9semaphore11__moduleRefZ@Base 12 ++ _D4core4sync9semaphore12__ModuleInfoZ@Base 12 ++ _D4core4sync9semaphore9Semaphore4waitMFSQBm4time8DurationZb@Base 12 ++ _D4core4sync9semaphore9Semaphore4waitMFZv@Base 12 ++ _D4core4sync9semaphore9Semaphore6__ctorMFkZCQBqQBoQBmQBf@Base 12 ++ _D4core4sync9semaphore9Semaphore6__dtorMFZv@Base 12 ++ _D4core4sync9semaphore9Semaphore6__initZ@Base 12 ++ _D4core4sync9semaphore9Semaphore6__vtblZ@Base 12 ++ _D4core4sync9semaphore9Semaphore6notifyMFZv@Base 12 ++ _D4core4sync9semaphore9Semaphore7__ClassZ@Base 12 ++ _D4core4sync9semaphore9Semaphore7tryWaitMFZb@Base 12 ++ _D4core4time11__moduleRefZ@Base 12 ++ _D4core4time11_posixClockFNaNbNiNfEQBhQBf9ClockTypeZi@Base 12 ++ _D4core4time12TickDuration11ticksPerSecyl@Base 12 ++ _D4core4time12TickDuration14currSystemTickFNbNdNiNeZSQBzQBxQBv@Base 12 ++ _D4core4time12TickDuration27_sharedStaticCtor_L2825_C14FNeZv@Base 12 ++ _D4core4time12TickDuration3maxFNaNbNdNiNfZSQBpQBnQBl@Base 12 ++ _D4core4time12TickDuration3minFNaNbNdNiNfZSQBpQBnQBl@Base 12 ++ _D4core4time12TickDuration4zeroFNaNbNdNiNfZSQBqQBoQBm@Base 12 ++ _D4core4time12TickDuration5msecsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration5nsecsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration5opCmpMxFNaNbNiNfSQBqQBoQBmZi@Base 12 ++ _D4core4time12TickDuration5usecsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration6__ctorMFNaNbNcNiNflZSQBuQBsQBq@Base 12 ++ _D4core4time12TickDuration6__initZ@Base 12 ++ _D4core4time12TickDuration6hnsecsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration7secondsMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time12TickDuration8__xopCmpMxFKxSQBnQBlQBjZi@Base 12 ++ _D4core4time12TickDuration9appOriginySQBkQBiQBg@Base 12 ++ _D4core4time12__ModuleInfoZ@Base 12 ++ _D4core4time12nsecsToTicksFNaNbNiNflZl@Base 12 ++ _D4core4time12ticksToNSecsFNaNbNiNflZl@Base 12 ++ _D4core4time13TimeException6__ctorMFNaNbNfAyaC6object9ThrowableQvmZCQCoQCmQCk@Base 12 ++ _D4core4time13TimeException6__ctorMFNaNbNfAyaQdmC6object9ThrowableZCQCoQCmQCk@Base 12 ++ _D4core4time13TimeException6__initZ@Base 12 ++ _D4core4time13TimeException6__vtblZ@Base 12 ++ _D4core4time13TimeException7__ClassZ@Base 12 ++ _D4core4time13_clockTypeIdxFEQBbQz9ClockTypeZm@Base 12 ++ _D4core4time13convClockFreqFNaNbNiNflllZl@Base 12 ++ _D4core4time14_clockTypeNameFEQBcQBa9ClockTypeZAya@Base 12 ++ _D4core4time15_ticksPerSecondyG8l@Base 12 ++ _D4core4time25unitsAreInDescendingOrderFMAAyaZb@Base 12 ++ _D4core4time3absFNaNbNiNfSQyQv12TickDurationZQu@Base 12 ++ _D4core4time3absFNaNbNiNfSQyQv8DurationZQp@Base 12 ++ _D4core4time4_absFNaNbNiNfdZd@Base 12 ++ _D4core4time4_absFNaNbNiNflZl@Base 12 ++ _D4core4time8Duration10isNegativeMxFNaNbNdNiNfZb@Base 12 ++ _D4core4time8Duration3maxFNaNbNdNiNfZSQBkQBiQBg@Base 12 ++ _D4core4time8Duration3minFNaNbNdNiNfZSQBkQBiQBg@Base 12 ++ _D4core4time8Duration4zeroFNaNbNdNiNfZSQBlQBjQBh@Base 12 ++ _D4core4time8Duration5opCmpMxFNaNbNiNfSQBlQBjQBhZi@Base 12 ++ _D4core4time8Duration6__ctorMFNaNbNcNiNflZSQBpQBnQBl@Base 12 ++ _D4core4time8Duration6__initZ@Base 12 ++ _D4core4time8Duration8__xopCmpMxFKxSQBiQBgQBeZi@Base 12 ++ _D4core4time8Duration8toStringMxFNaNbNfZAya@Base 12 ++ _D4core4time8Duration__T10opOpAssignVAyaa1_2aZQwMFNaNbNcNiNflZSQCjQChQCf@Base 12 ++ _D4core4time8Duration__T10opOpAssignVAyaa1_2bTSQBtQBrQBpZQBhMFNaNbNcNiNfxSQCuQCsQCqZQBm@Base 12 ++ _D4core4time8Duration__T5splitVAyaa5_686f757273VQra7_6d696e75746573ZQBsMxFNaNbNiNfZ10SplitUnits6__initZ@Base 12 ++ _D4core4time8Duration__T5splitVAyaa5_686f757273VQra7_6d696e75746573ZQBsMxFNaNbNiNfZ12genSplitCallFNaNbNfZQCw@Base 12 ++ _D4core4time8Duration__T5splitVAyaa5_686f757273VQra7_6d696e75746573ZQBsMxFNaNbNiNfZ14genMemberDeclsFNaNbNfZQCy@Base 12 ++ _D4core4time8Duration__T5splitVAyaa5_686f757273VQra7_6d696e75746573ZQBsMxFNaNbNiNfZSQDeQDcQDa__TQCuVQCra5_686f757273VQDia7_6d696e75746573ZQEkMxFNaNbNiNfZ10SplitUnits@Base 12 ++ _D4core4time8Duration__T5splitVAyaa5_686f757273VQra7_6d696e75746573Z__TQBvTiTiZQCdMxFNaNbNiNfJiJiZv@Base 12 ++ _D4core4time8Duration__T5splitVAyaa5_686f757273VQra7_6d696e75746573Z__TQBvTlTlZQCdMxFNaNbNiNfJlJlZv@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373ZQBsMxFNaNbNiNfZ10SplitUnits6__initZ@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373ZQBsMxFNaNbNiNfZ12genSplitCallFNaNbNfZQCw@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373ZQBsMxFNaNbNiNfZ14genMemberDeclsFNaNbNfZQCy@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373ZQBsMxFNaNbNiNfZSQDeQDcQDa__TQCuVQCra7_7365636f6e6473VQDma5_6e73656373ZQEkMxFNaNbNiNfZ10SplitUnits@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_6e73656373Z__TQBvTlTlZQCdMxFNaNbNiNfJlJlZv@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_7573656373ZQBsMxFNaNbNiNfZ10SplitUnits6__initZ@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_7573656373ZQBsMxFNaNbNiNfZ12genSplitCallFNaNbNfZQCw@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_7573656373ZQBsMxFNaNbNiNfZ14genMemberDeclsFNaNbNfZQCy@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_7573656373ZQBsMxFNaNbNiNfZSQDeQDcQDa__TQCuVQCra7_7365636f6e6473VQDma5_7573656373ZQEkMxFNaNbNiNfZ10SplitUnits@Base 12 ++ _D4core4time8Duration__T5splitVAyaa7_7365636f6e6473VQva5_7573656373Z__TQBvTlTlZQCdMxFNaNbNiNfJlJlZv@Base 12 ++ _D4core4time8Duration__T5totalVAyaa5_6d73656373ZQyMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time8Duration__T5totalVAyaa6_686e73656373ZQBaMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time8Duration__T5totalVAyaa7_7365636f6e6473ZQBcMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time8Duration__T8opBinaryVAyaa1_2bTSQBqQBoQBmZQBeMxFNaNbNiNfQzZQBc@Base 12 ++ _D4core4time8Duration__T8opBinaryVAyaa1_2bTySQBrQBpQBnZQBfMxFNaNbNiNfyQBaZSQCvQCtQCr@Base 12 ++ _D4core4time8Duration__T8opBinaryVAyaa1_2dTxSQBrQBpQBnZQBfMxFNaNbNiNfxQBaZSQCvQCtQCr@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ10appListSepFNaNbNfQBqkbZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ5unitsyAAa@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa4_64617973ZQBcFNaNbNfQCmlZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa5_686f757273ZQBeFNaNbNfQColZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa5_6d73656373ZQBeFNaNbNfQColZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa5_7573656373ZQBeFNaNbNfQColZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa5_7765656b73ZQBeFNaNbNfQColZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa6_686e73656373ZQBgFNaNbNfQCqlZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa7_6d696e75746573ZQBiFNaNbNfQCslZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFMQuZ__T10appUnitValVAyaa7_7365636f6e6473ZQBiFNaNbNfQCslZv@Base 12 ++ _D4core4time8Duration__T8toStringTDFNaNbNfIAaZvZQyMxFNaNbNfMQBaZv@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj14ticksPerSecondFNaNbNdNiNfZl@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj3maxFNaNbNdNiNfZSQCqQCo__TQCmVQCbi0ZQCw@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj3minFNaNbNdNiNfZSQCqQCo__TQCmVQCbi0ZQCw@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj4zeroFNaNbNdNiNfZSQCrQCp__TQCnVQCci0ZQCx@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj5opCmpMxFNaNbNiNfSQCrQCp__TQCnVQCci0ZQCxZi@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj5ticksMxFNaNbNdNiNfZl@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj6__initZ@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj8__xopCmpMxFKxSQCoQCm__TQCkVQBzi0ZQCuZi@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj8currTimeFNbNdNiNeZSQCtQCr__TQCpVQCei0ZQCz@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj8toStringMxFNaNbNfZAya@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj__T8opBinaryVAyaa1_2bZQtMxFNaNbNiNfSQDjQDh8DurationZSQEaQDy__TQDwVQDli0ZQEg@Base 12 ++ _D4core4time__T12MonoTimeImplVEQBdQBb9ClockTypei0ZQBj__T8opBinaryVAyaa1_2dZQtMxFNaNbNiNfSQDjQDh__TQDfVQCui0ZQDpZSQEhQEf8Duration@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa4_64617973ZQBmFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa5_686f757273ZQBoFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa5_6d73656373ZQBoFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa5_7573656373ZQBoFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa5_7765656b73ZQBoFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa7_6d696e75746573ZQBsFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T20splitUnitsFromHNSecsVAyaa7_7365636f6e6473ZQBsFNaNbNiNfKlZl@Base 12 ++ _D4core4time__T2toVAyaa5_6d73656373TlTxSQBmQBk12TickDurationZQBuFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T2toVAyaa5_6e73656373TlTxSQBmQBk12TickDurationZQBuFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T2toVAyaa5_7573656373TlTxSQBmQBk12TickDurationZQBuFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T2toVAyaa6_686e73656373TlTxSQBoQBm12TickDurationZQBwFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T2toVAyaa7_7365636f6e6473TlTxSQBqQBo12TickDurationZQByFNaNbNiNfxQBjZl@Base 12 ++ _D4core4time__T3durVAyaa4_64617973ZQuFNaNbNiNflZSQBvQBt8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_686f757273ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_6d73656373ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_6e73656373ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_7573656373ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa5_7765656b73ZQwFNaNbNiNflZSQBxQBv8Duration@Base 12 ++ _D4core4time__T3durVAyaa6_686e73656373ZQyFNaNbNiNflZSQBzQBx8Duration@Base 12 ++ _D4core4time__T3durVAyaa7_6d696e75746573ZQBaFNaNbNiNflZSQCcQCa8Duration@Base 12 ++ _D4core4time__T3durVAyaa7_7365636f6e6473ZQBaFNaNbNiNflZSQCcQCa8Duration@Base 12 ++ _D4core4time__T7convertVAyaa4_64617973VQpa6_686e73656373ZQBqFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa4_64617973VQpa7_7365636f6e6473ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_686f757273VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_686f757273VQra7_7365636f6e6473ZQBuFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_6d73656373VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_6e73656373VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_7573656373VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa5_7765656b73VQra6_686e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta4_64617973ZQBqFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_686f757273ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_6d73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_6e73656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_7573656373ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta5_7765656b73ZQBsFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta6_686e73656373ZQBuFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta7_6d696e75746573ZQBwFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa6_686e73656373VQta7_7365636f6e6473ZQBwFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_6d696e75746573VQva6_686e73656373ZQBwFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva5_6d73656373ZQBuFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva5_6e73656373ZQBuFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva5_7573656373ZQBuFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva6_686e73656373ZQBwFNaNbNiNflZl@Base 12 ++ _D4core4time__T7convertVAyaa7_7365636f6e6473VQva7_7365636f6e6473ZQByFNaNbNiNflZl@Base 12 ++ _D4core5bitop11__moduleRefZ@Base 12 ++ _D4core5bitop12__ModuleInfoZ@Base 12 ++ _D4core5bitop2btFNaNbNiMxPmmZi@Base 12 ++ _D4core5bitop3bsfFNaNbNiNfkZi@Base 12 ++ _D4core5bitop3bsfFNaNbNiNfmZi@Base 12 ++ _D4core5bitop3bsrFNaNbNiNfkZi@Base 12 ++ _D4core5bitop3bsrFNaNbNiNfmZi@Base 12 ++ _D4core5bitop6popcntFNaNbNiNfkZi@Base 12 ++ _D4core5bitop6popcntFNaNbNiNfmZi@Base 12 ++ _D4core5bitop7Split646__ctorMFNaNbNcNiNfmZSQBpQBnQBk@Base 12 ++ _D4core5bitop7Split646__initZ@Base 12 ++ _D4core5bitop7bitswapFNaNbNiNfkZk@Base 12 ++ _D4core5bitop7bitswapFNaNbNiNfmZm@Base 12 ++ _D4core5bitop8BitRange5emptyMxFNaNbNiNfZb@Base 12 ++ _D4core5bitop8BitRange5frontMFNaNbNiNfZm@Base 12 ++ _D4core5bitop8BitRange6__ctorMFNaNbNcNiPxmmZSQBrQBpQBm@Base 12 ++ _D4core5bitop8BitRange6__initZ@Base 12 ++ _D4core5bitop8BitRange8popFrontMFNaNbNiZv@Base 12 ++ _D4core5bitop8byteswapFNaNbNiNftZt@Base 12 ++ _D4core5bitop__T10softPopcntTkZQpFNaNbNiNfkZi@Base 12 ++ _D4core5bitop__T10softPopcntTmZQpFNaNbNiNfmZi@Base 12 ++ _D4core5bitop__T11softBitswapTkZQqFNaNbNiNfkZk@Base 12 ++ _D4core5bitop__T11softBitswapTmZQqFNaNbNiNfmZm@Base 12 ++ _D4core5bitop__T3rolTkZQhFNaNbNiNfxkxkZk@Base 12 ++ _D4core5bitop__T3rorTkZQhFNaNbNiNfxkxkZk@Base 12 ++ _D4core5bitop__T3rorTmZQhFNaNbNiNfxmxkZm@Base 12 ++ _D4core5bitop__T8softScanTkVbi0ZQqFNaNbNiNfkZi@Base 12 ++ _D4core5bitop__T8softScanTkVbi1ZQqFNaNbNiNfkZi@Base 12 ++ _D4core5bitop__T8softScanTmVbi0ZQqFNaNbNiNfmZi@Base 12 ++ _D4core5bitop__T8softScanTmVbi1ZQqFNaNbNiNfmZi@Base 12 ++ _D4core5cpuid10_hasPopcntyb@Base 12 ++ _D4core5cpuid10_hasRdrandyb@Base 12 ++ _D4core5cpuid10_hasRdseedyb@Base 12 ++ _D4core5cpuid10_isItaniumyb@Base 12 ++ _D4core5cpuid10_processoryAa@Base 12 ++ _D4core5cpuid10_x87onChipyb@Base 12 ++ _D4core5cpuid10dataCachesFNaNbNdNiNeZxG5SQBnQBl9CacheInfo@Base 12 ++ _D4core5cpuid11CpuFeatures11__xopEqualsMxFKxSQBrQBpQBmZb@Base 12 ++ _D4core5cpuid11CpuFeatures6__initZ@Base 12 ++ _D4core5cpuid11CpuFeatures9__xtoHashFNbNeKxSQBqQBoQBlZm@Base 12 ++ _D4core5cpuid11__moduleRefZ@Base 12 ++ _D4core5cpuid11_dataCachesyG5SQBcQBa9CacheInfo@Base 12 ++ _D4core5cpuid11amd3dnowExtFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid11cacheLevelsFNbNdNiNeZk@Base 12 ++ _D4core5cpuid11coresPerCPUFNaNbNdNiNeZk@Base 12 ++ _D4core5cpuid11cpuFeaturesSQzQw11CpuFeatures@Base 12 ++ _D4core5cpuid11hasLahfSahfFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid12__ModuleInfoZ@Base 12 ++ _D4core5cpuid12_amd3dnowExtyb@Base 12 ++ _D4core5cpuid12_coresPerCPUyk@Base 12 ++ _D4core5cpuid12_hasLahfSahfyb@Base 12 ++ _D4core5cpuid12getCpuInfo0BFNbNiNeZv@Base 12 ++ _D4core5cpuid12hasCmpxchg8bFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid12hasPclmulqdqFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid12preferAthlonFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid13_hasCmpxchg8byb@Base 12 ++ _D4core5cpuid13_hasPclmulqdqyb@Base 12 ++ _D4core5cpuid13_preferAthlonyb@Base 12 ++ _D4core5cpuid13hasCmpxchg16bFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid13hasVpclmulqdqFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid13threadsPerCPUFNaNbNdNiNeZk@Base 12 ++ _D4core5cpuid14_hasCmpxchg16byb@Base 12 ++ _D4core5cpuid14_hasVpclmulqdqyb@Base 12 ++ _D4core5cpuid14_threadsPerCPUyk@Base 12 ++ _D4core5cpuid14getCpuFeaturesFNbNiNeZPSQBlQBj11CpuFeatures@Base 12 ++ _D4core5cpuid14hyperThreadingFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid14numCacheLevelsk@Base 12 ++ _D4core5cpuid14preferPentium1FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid14preferPentium4FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid15_hyperThreadingyb@Base 12 ++ _D4core5cpuid15_preferPentium1yb@Base 12 ++ _D4core5cpuid15_preferPentium4yb@Base 12 ++ _D4core5cpuid15getAMDcacheinfoFNbNiNeZ8assocmapyAh@Base 12 ++ _D4core5cpuid15getAMDcacheinfoFNbNiNeZv@Base 12 ++ _D4core5cpuid16has3dnowPrefetchFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid17_has3dnowPrefetchyb@Base 12 ++ _D4core5cpuid17hyperThreadingBitFNbNdNiNeZb@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID2FNbNiNeZ14decipherCpuid2MFNbNihZ3idsyG63h@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID2FNbNiNeZ14decipherCpuid2MFNbNihZ4waysyG63h@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID2FNbNiNeZ14decipherCpuid2MFNbNihZ5sizesyG63k@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID2FNbNiNeZv@Base 12 ++ _D4core5cpuid18getcacheinfoCPUID4FNbNiNeZv@Base 12 ++ _D4core5cpuid18hasSysEnterSysExitFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid18max_extended_cpuidk@Base 12 ++ _D4core5cpuid19_hasSysEnterSysExityb@Base 12 ++ _D4core5cpuid26_sharedStaticCtor_L1068_C1FNbNiNeZv@Base 12 ++ _D4core5cpuid3aesFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3avxFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3fmaFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3hleFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3mmxFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3rtmFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid3sseFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid4_aesyb@Base 12 ++ _D4core5cpuid4_avxyb@Base 12 ++ _D4core5cpuid4_fmayb@Base 12 ++ _D4core5cpuid4_hleyb@Base 12 ++ _D4core5cpuid4_mmxyb@Base 12 ++ _D4core5cpuid4_rtmyb@Base 12 ++ _D4core5cpuid4_sseyb@Base 12 ++ _D4core5cpuid4avx2FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid4sse2FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid4sse3FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid4vaesFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5_avx2yb@Base 12 ++ _D4core5cpuid5_sse2yb@Base 12 ++ _D4core5cpuid5_sse3yb@Base 12 ++ _D4core5cpuid5_vaesyb@Base 12 ++ _D4core5cpuid5fp16cFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5modelk@Base 12 ++ _D4core5cpuid5sse41FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5sse42FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5sse4aFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid5ssse3FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid6_fp16cyb@Base 12 ++ _D4core5cpuid6_sse41yb@Base 12 ++ _D4core5cpuid6_sse42yb@Base 12 ++ _D4core5cpuid6_sse4ayb@Base 12 ++ _D4core5cpuid6_ssse3yb@Base 12 ++ _D4core5cpuid6amdMmxFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid6familyk@Base 12 ++ _D4core5cpuid6hasShaFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid6vendorFNaNbNdNiNeZAya@Base 12 ++ _D4core5cpuid7_amdMmxyb@Base 12 ++ _D4core5cpuid7_hasShayb@Base 12 ++ _D4core5cpuid7_vendoryAa@Base 12 ++ _D4core5cpuid7hasCmovFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid7hasFxsrFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8_hasCmovyb@Base 12 ++ _D4core5cpuid8_hasFxsryb@Base 12 ++ _D4core5cpuid8amd3dnowFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8cpuidX86FNbNiNeZv@Base 12 ++ _D4core5cpuid8hasCPUIDFNbNiNeZb@Base 12 ++ _D4core5cpuid8hasLzcntFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8hasRdtscFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8isX86_64FNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid8steppingk@Base 12 ++ _D4core5cpuid9CacheInfo6__initZ@Base 12 ++ _D4core5cpuid9_amd3dnowyb@Base 12 ++ _D4core5cpuid9_hasLzcntyb@Base 12 ++ _D4core5cpuid9_hasRdtscyb@Base 12 ++ _D4core5cpuid9_isX86_64yb@Base 12 ++ _D4core5cpuid9datacacheG5SQyQv9CacheInfo@Base 12 ++ _D4core5cpuid9hasPopcntFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid9hasRdrandFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid9hasRdseedFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid9isItaniumFNaNbNdNiNeZb@Base 12 ++ _D4core5cpuid9max_cpuidk@Base 12 ++ _D4core5cpuid9processorFNaNbNdNiNeZAya@Base 12 ++ _D4core5cpuid9x87onChipFNaNbNdNiNeZb@Base 12 ++ _D4core6atomic11__moduleRefZ@Base 12 ++ _D4core6atomic12__ModuleInfoZ@Base 12 ++ _D4core6atomic5pauseFNaNbNiNfZv@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNeNkMKOxPSQCcQCcQBvZQCp@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNeNkMKxPOxSQCdQCdQBwZQCq@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TbZQBmFNaNbNiNeKOxbZb@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TbZQBmFNaNbNiNeKxbZb@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TmZQBmFNaNbNiNeKOxmZm@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi0TmZQBmFNaNbNiNeKxmZm@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TC3std12experimental6loggerQCz6LoggerZQCvFNaNbNiNeKOxCQCaQBzQBoQEjQBkZOCQCsQCrQCgQFbQCc@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TCQCa4sync5mutex5MutexZQCgFNaNbNiNeKOxCQDlQBlQBjQBgZOCQEaQCaQByQBv@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TE3std12experimental6loggerQCz8LogLevelZQCxFNaNbNiNeKOxEQCcQCbQBqQElQBmZQCt@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TE3std12experimental6loggerQCz8LogLevelZQCxFNaNbNiNeKxEQCbQCaQBpQEkQBlZQCs@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TPOS2rt8monitor_7MonitorZQCiFNaNbNiNeNkMKOxPSQBpQBpQBjZQCc@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TPOS2rt8monitor_7MonitorZQCiFNaNbNiNeNkMKxPOxSQBqQBqQBkZQCd@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNeNkMKOxPSQCcQCcQBvZQCp@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNeNkMKxPOxSQCdQCdQBwZQCq@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TbZQBmFNaNbNiNeKOxbZb@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TbZQBmFNaNbNiNeKxbZb@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TkZQBmFNaNbNiNeKOxkZk@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi2TkZQBmFNaNbNiNeKxkZk@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TE3std11parallelism8TaskPool9PoolStateZQCwFNaNbNiNeKOxEQCbQCaQBqQBkZQCp@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TE3std11parallelism8TaskPool9PoolStateZQCwFNaNbNiNeKxEQCaQBzQBpQBjZQCo@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TbZQBmFNaNbNiNeKOxbZb@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TbZQBmFNaNbNiNeKxbZb@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5ThZQBmFNaNbNiNeKOxhZh@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5ThZQBmFNaNbNiNeKxhZh@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TiZQBmFNaNbNiNeKOxiZi@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TiZQBmFNaNbNiNeKxiZi@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TkZQBmFNaNbNiNeKOxkZk@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TkZQBmFNaNbNiNeKxkZk@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TmZQBmFNaNbNiNeKOxmZm@Base 12 ++ _D4core6atomic__T10atomicLoadVEQBdQBb11MemoryOrderi5TmZQBmFNaNbNiNeKxmZm@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi0TbTbZQBpFNaNbNiNeKObbZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi0TbTbZQBpFNaNbNiNeKbbZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi0TmTiZQBpFNaNbNiNeKOmiZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi0TmTiZQBpFNaNbNiNeKmiZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TC3std12experimental6loggerQDa6LoggerTQBlZQDaFNaNbNiNeKOCQCdQCcQBrQEnQBnOQrZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TE3std12experimental6loggerQDa8LogLevelTQBnZQDcFNaNbNiNeKOEQCfQCeQBtQEpQBpQCvZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TE3std12experimental6loggerQDa8LogLevelTQBnZQDcFNaNbNiNeKQCeQChZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TPOS2rt8monitor_7MonitorTQyZQCmFNaNbNiNeKOPQBoQBtZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TPOS2rt8monitor_7MonitorTQyZQCmFNaNbNiNeKQBoQBrZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TPOS2rt9critical_18D_CRITICAL_SECTIONTQBlZQDaFNaNbNiNeKOPQCcQChZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TPOS2rt9critical_18D_CRITICAL_SECTIONTQBlZQDaFNaNbNiNeKQCcQCfZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TbTbZQBpFNaNbNiNeKObbZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TbTbZQBpFNaNbNiNeKbbZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TmTmZQBpFNaNbNiNeKOmmZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi3TmTmZQBpFNaNbNiNeKmmZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi5TE3std11parallelism8TaskPool9PoolStateTQBmZQDbFNaNbNiNeKOEQCeQCdQBtQBnQCrZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi5TE3std11parallelism8TaskPool9PoolStateTQBmZQDbFNaNbNiNeKQCdQCgZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi5ThThZQBpFNaNbNiNeKOhhZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi5ThThZQBpFNaNbNiNeKhhZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi5TkTkZQBpFNaNbNiNeKOkkZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi5TkTkZQBpFNaNbNiNeKkkZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi5TmTmZQBpFNaNbNiNeKOmmZv@Base 12 ++ _D4core6atomic__T11atomicStoreVEQBeQBc11MemoryOrderi5TmTmZQBpFNaNbNiNeKmmZv@Base 12 ++ _D4core6atomic__T14atomicFetchAddVEQBhQBf11MemoryOrderi5TkZQBqFNaNbNiNeKOkmZk@Base 12 ++ _D4core6atomic__T14atomicFetchAddVEQBhQBf11MemoryOrderi5TkZQBqFNaNbNiNeKkmZk@Base 12 ++ _D4core6atomic__T14atomicFetchAddVEQBhQBf11MemoryOrderi5TmZQBqFNaNbNiNeKOmmZm@Base 12 ++ _D4core6atomic__T14atomicFetchAddVEQBhQBf11MemoryOrderi5TmZQBqFNaNbNiNeKmmZm@Base 12 ++ _D4core6atomic__T14atomicFetchSubVEQBhQBf11MemoryOrderi5TkZQBqFNaNbNiNeKOkmZk@Base 12 ++ _D4core6atomic__T14atomicFetchSubVEQBhQBf11MemoryOrderi5TkZQBqFNaNbNiNeKkmZk@Base 12 ++ _D4core6atomic__T14atomicFetchSubVEQBhQBf11MemoryOrderi5TmZQBqFNaNbNiNeKOmmZm@Base 12 ++ _D4core6atomic__T14atomicFetchSubVEQBhQBf11MemoryOrderi5TmZQBqFNaNbNiNeKmmZm@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTE3std11parallelism8TaskPool9PoolStateZQCpFNaNbNiNfPQBzZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOCQBu4sync5mutex5MutexZQCaFNaNbNiNfPOQBkZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOE3std11parallelism8TaskPool9PoolStateZQCqFNaNbNiNfPOQCaZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTObZQBgFNaNbNiNfPObZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOhZQBgFNaNbNiNfPOhZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOkZQBgFNaNbNiNfPOkZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOmZQBgFNaNbNiNfPOmZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTOtZQBgFNaNbNiNfPOtZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTbZQBfFNaNbNiNfPbZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedThZQBfFNaNbNiNfPhZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTkZQBfFNaNbNiNfPkZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTmZQBfFNaNbNiNfPmZb@Base 12 ++ _D4core6atomic__T26atomicPtrIsProperlyAlignedTtZQBfFNaNbNiNfPtZb@Base 12 ++ _D4core6atomic__T28atomicValueIsProperlyAlignedTOkZQBiFNaNbNiNeKOkZb@Base 12 ++ _D4core6atomic__T28atomicValueIsProperlyAlignedTOmZQBiFNaNbNiNeKOmZb@Base 12 ++ _D4core6atomic__T28atomicValueIsProperlyAlignedTkZQBhFNaNbNiNeKkZb@Base 12 ++ _D4core6atomic__T28atomicValueIsProperlyAlignedTmZQBhFNaNbNiNeKmZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTCQBb4sync5mutex5MutexTnTQyZQBmFNaNbNiNePOCQCqQBpQBnQBkOnOQqZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTE3std11parallelism8TaskPool9PoolStateTQBmTQBqZQCfFNaNbNiNePOEQCiQChQBxQBrQCvQCyZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTE3std11parallelism8TaskPool9PoolStateTQBmTQBqZQCfFNaNbNiNePQChQCkQCnZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTbTbTbZQrFNaNbNiNePObbbZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTbTbTbZQrFNaNbNiNePbbbZb@Base 12 ++ _D4core6atomic__T3casZ__TQiThThThZQrFNaNbNiNePOhhhZb@Base 12 ++ _D4core6atomic__T3casZ__TQiThThThZQrFNaNbNiNePhhhZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTmTmTmZQrFNaNbNiNePOmmmZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTmTmTmZQrFNaNbNiNePmmmZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTtTtTtZQrFNaNbNiNePOtttZb@Base 12 ++ _D4core6atomic__T3casZ__TQiTtTtTtZQrFNaNbNiNePtttZb@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2b3dTkTiZQzFNaNbNiNfKOkiZk@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2b3dTkTkZQzFNaNbNiNfKOkkZk@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2b3dTmTiZQzFNaNbNiNfKOmiZm@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2b3dTmTmZQzFNaNbNiNfKOmmZm@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2d3dTkTiZQzFNaNbNiNfKOkiZk@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2d3dTmTiZQzFNaNbNiNfKOmiZm@Base 12 ++ _D4core6atomic__T8atomicOpVAyaa2_2d3dTmTmZQzFNaNbNiNfKOmmZm@Base 12 ++ _D4core6int12811__moduleRefZ@Base 12 ++ _D4core6int12812__ModuleInfoZ@Base 12 ++ _D4core6int1282geFNaNbNiNfSQzQw4CentQkZb@Base 12 ++ _D4core6int1282gtFNaNbNiNfSQzQw4CentQkZb@Base 12 ++ _D4core6int1282leFNaNbNiNfSQzQw4CentQkZb@Base 12 ++ _D4core6int1282ltFNaNbNiNfSQzQw4CentQkZb@Base 12 ++ _D4core6int1282orFNaNbNiNfSQzQw4CentQkZQn@Base 12 ++ _D4core6int1283addFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283andFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283comFNaNbNiNfSQBaQy4CentZQm@Base 12 ++ _D4core6int1283decFNaNbNiNfSQBaQy4CentZQm@Base 12 ++ _D4core6int1283divFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283incFNaNbNiNfSQBaQy4CentZQm@Base 12 ++ _D4core6int1283mulFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283negFNaNbNiNfSQBaQy4CentZQm@Base 12 ++ _D4core6int1283rolFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283rorFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283sarFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283shlFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283shrFNaNbNiNfSQBaQy4CentkZQn@Base 12 ++ _D4core6int1283subFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1283tstFNaNbNiNfSQBaQy4CentZb@Base 12 ++ _D4core6int1283ugeFNaNbNiNfSQBaQy4CentQlZb@Base 12 ++ _D4core6int1283ugtFNaNbNiNfSQBaQy4CentQlZb@Base 12 ++ _D4core6int1283uleFNaNbNiNfSQBaQy4CentQlZb@Base 12 ++ _D4core6int1283ultFNaNbNiNfSQBaQy4CentQlZb@Base 12 ++ _D4core6int1283xorFNaNbNiNfSQBaQy4CentQlZQo@Base 12 ++ _D4core6int1284Cent6__initZ@Base 12 ++ _D4core6int1284rol1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284ror1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284sar1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284shl1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284shr1FNaNbNiNfSQBbQz4CentZQm@Base 12 ++ _D4core6int1284udivFNaNbNiNfSQBbQz4CentQlZQo@Base 12 ++ _D4core6int1286divmodFNaNbNiNfSQBdQBb4CentQmJQpZQs@Base 12 ++ _D4core6int1287udivmodFNaNbNiNfSQBeQBc4CentQmJQpZ13udivmod128_64FNaNbNiNfQBqmJmZm@Base 12 ++ _D4core6int1287udivmodFNaNbNiNfSQBeQBc4CentQmJQpZ13udivmod128_64FQBimJmZ9udiv96_64FNaNbNiNfmkmZk@Base 12 ++ _D4core6int1287udivmodFNaNbNiNfSQBeQBc4CentQmJQpZQs@Base 12 ++ _D4core6memory10initialize@Base 12 ++ _D4core6memory11__moduleRefZ@Base 12 ++ _D4core6memory12__ModuleInfoZ@Base 12 ++ _D4core6memory2GC12ProfileStats6__initZ@Base 12 ++ _D4core6memory2GC12profileStatsFNbNiNfZSQBmQBkQBg12ProfileStats@Base 12 ++ _D4core6memory2GC5Stats6__initZ@Base 12 ++ _D4core6memory2GC5queryFNaNbNkMPvZSQBhQBf8BlkInfo_@Base 12 ++ _D4core6memory2GC5queryFNbNkMxPvZSQBgQBe8BlkInfo_@Base 12 ++ _D4core6memory2GC5statsFNbNiNfZSQBeQBcQy5Stats@Base 12 ++ _D4core6memory2GC6__initZ@Base 12 ++ _D4core6memory2GC6addrOfFNaNbNiNePNgvZQf@Base 12 ++ _D4core6memory2GC6addrOfFNaNbNiNePvZQd@Base 12 ++ _D4core6memory2GC6sizeOfFNaNbNiPvZm@Base 12 ++ _D4core6memory2GC6sizeOfFNbNiMxPvZm@Base 12 ++ _D4core6memory2GC7clrAttrFNaNbPvkZk@Base 12 ++ _D4core6memory2GC7clrAttrFNbMxPvkZk@Base 12 ++ _D4core6memory2GC7getAttrFNaNbPvZk@Base 12 ++ _D4core6memory2GC7getAttrFNbMxPvZk@Base 12 ++ _D4core6memory2GC7setAttrFNaNbPvkZk@Base 12 ++ _D4core6memory2GC7setAttrFNbMxPvkZk@Base 12 ++ _D4core6memory8BlkInfo_6__initZ@Base 12 ++ _D4core6memory8pageSizeym@Base 12 ++ _D4core6memory__T10pureMallocZQnFNaNbNiNemZPv@Base 12 ++ _D4core6memory__T11pureReallocZQoFNaNbNiPvmZQe@Base 12 ++ _D4core6memory__T8pureFreeZQkFNaNbNiPvZv@Base 12 ++ _D4core6stdcpp11string_view11__moduleRefZ@Base 12 ++ _D4core6stdcpp11string_view12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp11string_view__T11char_traitsTaZQq6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T11char_traitsTuZQq6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T11char_traitsTwZQq6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T17basic_string_viewTaTSQBzQBxQBt__T11char_traitsTaZQqZQCc6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T17basic_string_viewTuTSQBzQBxQBt__T11char_traitsTuZQqZQCc6__initZ@Base 12 ++ _D4core6stdcpp11string_view__T17basic_string_viewTwTSQBzQBxQBt__T11char_traitsTwZQqZQCc6__initZ@Base 12 ++ _D4core6stdcpp11type_traits11__moduleRefZ@Base 12 ++ _D4core6stdcpp11type_traits12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp11type_traits__T17integral_constantTbVbi0ZQBa6__initZ@Base 12 ++ _D4core6stdcpp11type_traits__T17integral_constantTbVbi1ZQBa6__initZ@Base 12 ++ _D4core6stdcpp4new_11__moduleRefZ@Base 12 ++ _D4core6stdcpp4new_11align_val_t6__initZ@Base 12 ++ _D4core6stdcpp4new_11std_nothrowySQBgQBeQBa9nothrow_t@Base 12 ++ _D4core6stdcpp4new_12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp4new_9bad_alloc6__initZ@Base 12 ++ _D4core6stdcpp4new_9bad_alloc6__vtblZ@Base 12 ++ _D4core6stdcpp4new_9bad_alloc7__ClassZ@Base 12 ++ _D4core6stdcpp4new_9nothrow_t6__initZ@Base 12 ++ _D4core6stdcpp5array11__moduleRefZ@Base 12 ++ _D4core6stdcpp5array12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp6memory11__moduleRefZ@Base 12 ++ _D4core6stdcpp6memory12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp6string11__moduleRefZ@Base 12 ++ _D4core6stdcpp6string12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp6vector11__moduleRefZ@Base 12 ++ _D4core6stdcpp6vector12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp7utility11__moduleRefZ@Base 12 ++ _D4core6stdcpp7utility12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp8typeinfo10bad_typeid6__ctorMFNbNiZCQBwQBuQBqQBk@Base 12 ++ _D4core6stdcpp8typeinfo10bad_typeid6__initZ@Base 12 ++ _D4core6stdcpp8typeinfo10bad_typeid6__vtblZ@Base 12 ++ _D4core6stdcpp8typeinfo10bad_typeid7__ClassZ@Base 12 ++ _D4core6stdcpp8typeinfo11__moduleRefZ@Base 12 ++ _D4core6stdcpp8typeinfo12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp8typeinfo8bad_cast6__ctorMFNbNiZCQBtQBrQBnQBh@Base 12 ++ _D4core6stdcpp8typeinfo8bad_cast6__initZ@Base 12 ++ _D4core6stdcpp8typeinfo8bad_cast6__vtblZ@Base 12 ++ _D4core6stdcpp8typeinfo8bad_cast7__ClassZ@Base 12 ++ _D4core6stdcpp8typeinfo9type_info6__ctorMFNiPxaZCQBvQBtQBpQBj@Base 12 ++ _D4core6stdcpp8typeinfo9type_info6__initZ@Base 12 ++ _D4core6stdcpp8typeinfo9type_info6__vtblZ@Base 12 ++ _D4core6stdcpp8typeinfo9type_info7__ClassZ@Base 12 ++ _D4core6stdcpp8xutility11__moduleRefZ@Base 12 ++ _D4core6stdcpp8xutility12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp8xutility14CppStdRevision6__initZ@Base 12 ++ _D4core6stdcpp9allocator11__moduleRefZ@Base 12 ++ _D4core6stdcpp9allocator12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp9exception11__moduleRefZ@Base 12 ++ _D4core6stdcpp9exception12__ModuleInfoZ@Base 12 ++ _D4core6stdcpp9exception13bad_exception6__ctorMFNbNiPxaZCQCdQCbQBxQBq@Base 12 ++ _D4core6stdcpp9exception13bad_exception6__initZ@Base 12 ++ _D4core6stdcpp9exception13bad_exception6__vtblZ@Base 12 ++ _D4core6stdcpp9exception13bad_exception7__ClassZ@Base 12 ++ _D4core6stdcpp9exceptionQk6__ctorMFNbNiPxaiZCQBrQBpQBlQBo@Base 12 ++ _D4core6stdcpp9exceptionQk6__ctorMFNbNiZCQBnQBlQBhQBk@Base 12 ++ _D4core6stdcpp9exceptionQk6__initZ@Base 12 ++ _D4core6stdcpp9exceptionQk6__vtblZ@Base 12 ++ _D4core6stdcpp9exceptionQk7__ClassZ@Base 12 ++ _D4core6thread10threadbase10ThreadBase10popContextMFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase10topContextMFNbNiZPSQCfQCd7context12StackContext@Base 12 ++ _D4core6thread10threadbase10ThreadBase11pushContextMFNbNiPSQCfQCd7context12StackContextZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase12isMainThreadMFNbNdNiZb@Base 12 ++ _D4core6thread10threadbase10ThreadBase13nAboutToStartm@Base 12 ++ _D4core6thread10threadbase10ThreadBase13pAboutToStartPCQCbQBzQBvQBm@Base 12 ++ _D4core6thread10threadbase10ThreadBase13tlsGCdataInitMFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase15initDataStorageMFNbZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase18criticalRegionLockFNbNdNiZCQCn4sync5mutex5Mutex@Base 12 ++ _D4core6thread10threadbase10ThreadBase18destroyDataStorageMFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase18destructBeforeDtorMFNbNiZb@Base 12 ++ _D4core6thread10threadbase10ThreadBase19_criticalRegionLockG72v@Base 12 ++ _D4core6thread10threadbase10ThreadBase25destroyDataStorageIfAvailMFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase2idMFNdNiNfZm@Base 12 ++ _D4core6thread10threadbase10ThreadBase3addFNbNiCQBuQBsQBoQBfbZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase3addFNbNiPSQBvQBt7context12StackContextZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase3runMFZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase4nameMFNdNiNfAyaZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase4nameMFNdNiNfZAya@Base 12 ++ _D4core6thread10threadbase10ThreadBase5slockFNbNdNiZCQBz4sync5mutex5Mutex@Base 12 ++ _D4core6thread10threadbase10ThreadBase5yieldFNbNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__ctorMFNaNbNiNfDFZvmZCQCiQCgQCcQBt@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__ctorMFNaNbNiNfPFZvmZCQCiQCgQCcQBt@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__ctorMFNaNbNiNfmZCQCeQCcQByQBp@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__initZ@Base 12 ++ _D4core6thread10threadbase10ThreadBase6__vtblZ@Base 12 ++ _D4core6thread10threadbase10ThreadBase6_slockG72v@Base 12 ++ _D4core6thread10threadbase10ThreadBase6getAllFZ6resizeFNaNbNfKACQCkQCiQCeQBvmZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase6getAllFZACQBvQBtQBpQBg@Base 12 ++ _D4core6thread10threadbase10ThreadBase6removeFNbNiCQBxQBvQBrQBiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase6removeFNbNiPSQByQBw7context12StackContextZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase7__ClassZ@Base 12 ++ _D4core6thread10threadbase10ThreadBase7getThisFNbNiNfZCQCbQBzQBvQBm@Base 12 ++ _D4core6thread10threadbase10ThreadBase7opApplyFMDFKCQByQBwQBsQBjZiZ6resizeFNbNiKAQBemZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase7opApplyFMDFKCQByQBwQBsQBjZiZi@Base 12 ++ _D4core6thread10threadbase10ThreadBase7setThisFNbNiCQByQBwQBsQBjZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_cbegPSQBuQBs7context12StackContext@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_mainCQBtQBrQBnQBe@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_tbegCQBtQBrQBnQBe@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_thisCQBtQBrQBnQBe@Base 12 ++ _D4core6thread10threadbase10ThreadBase7sm_tlenm@Base 12 ++ _D4core6thread10threadbase10ThreadBase8isDaemonMFNdNiNfZb@Base 12 ++ _D4core6thread10threadbase10ThreadBase8isDaemonMFNdNiNfbZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase9initLocksFNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase9isRunningMFNbNdNiZb@Base 12 ++ _D4core6thread10threadbase10ThreadBase9termLocksFNiZv@Base 12 ++ _D4core6thread10threadbase10ThreadBase__T10getAllImplS_DQCcQCaQBwQBn6getAllFZ6resizeFNaNbNfKACQDoQDmQDiQCzmZvZQCrFZQx@Base 12 ++ _D4core6thread10threadbase10ThreadBase__T10getAllImplS_DQCcQCaQBwQBn7opApplyFMDFKCQDcQDaQCwQCnZiZ6resizeFNbNiKAQBemZvZQCzFNiZQp@Base 12 ++ _D4core6thread10threadbase11ThreadError6__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDcQDaQCwQCn@Base 12 ++ _D4core6thread10threadbase11ThreadError6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDcQDaQCwQCn@Base 12 ++ _D4core6thread10threadbase11ThreadError6__initZ@Base 12 ++ _D4core6thread10threadbase11ThreadError6__vtblZ@Base 12 ++ _D4core6thread10threadbase11ThreadError7__ClassZ@Base 12 ++ _D4core6thread10threadbase11__moduleRefZ@Base 12 ++ _D4core6thread10threadbase11ll_nThreadsm@Base 12 ++ _D4core6thread10threadbase11ll_pThreadsPSQBnQBl5types13ll_ThreadData@Base 12 ++ _D4core6thread10threadbase12__ModuleInfoZ@Base 12 ++ _D4core6thread10threadbase12lowlevelLockFNbNdNiZCQBv4sync5mutex5Mutex@Base 12 ++ _D4core6thread10threadbase12suspendDepthk@Base 12 ++ _D4core6thread10threadbase13onThreadErrorFNbNiAyaZ5errorCQCdQCbQBx11ThreadError@Base 12 ++ _D4core6thread10threadbase13onThreadErrorFNbNiAyaZv@Base 12 ++ _D4core6thread10threadbase15ThreadException6__ctorMFNaNbNiNfAyaC6object9ThrowableQvmZCQDgQDeQDaQCr@Base 12 ++ _D4core6thread10threadbase15ThreadException6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQDgQDeQDaQCr@Base 12 ++ _D4core6thread10threadbase15ThreadException6__initZ@Base 12 ++ _D4core6thread10threadbase15ThreadException6__vtblZ@Base 12 ++ _D4core6thread10threadbase15ThreadException7__ClassZ@Base 12 ++ _D4core6thread10threadbase15ll_removeThreadFNbNimZv@Base 12 ++ _D4core6thread10threadbase15scanAllTypeImplFNbMDFNbEQByQBwQBs8ScanTypePvQcZvQgZv@Base 12 ++ _D4core6thread10threadbase17multiThreadedFlagb@Base 12 ++ _D4core6thread10threadbase17thread_findByAddrFmZCQBvQBtQBp10ThreadBase@Base 12 ++ _D4core6thread10threadbase18findLowLevelThreadFNbNimZb@Base 12 ++ _D4core6thread10threadbase19initLowlevelThreadsFNiZv@Base 12 ++ _D4core6thread10threadbase19termLowlevelThreadsFNiZv@Base 12 ++ _D4core6thread10threadbase25_sharedStaticDtor_L948_C1FZv@Base 12 ++ _D4core6thread10threadbase7ll_lockG72v@Base 12 ++ _D4core6thread10threadbase__T15thread_term_tplTCQBuQBs8osthread6ThreadTG177vZQBwFNiKQnZv@Base 12 ++ _D4core6thread10threadbase__T21thread_attachThis_tplTCQCaQBy8osthread6ThreadZQBwFNbZQBf@Base 12 ++ _D4core6thread11__moduleRefZ@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup3addMFCQBtQBr8osthread6ThreadZv@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6__initZ@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6__vtblZ@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6createMFDFZvZCQCbQBz8osthread6Thread@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6createMFPFZvZCQCbQBz8osthread6Thread@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup6removeMFCQBwQBu8osthread6ThreadZv@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup7__ClassZ@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup7joinAllMFbZv@Base 12 ++ _D4core6thread11threadgroup11ThreadGroup7opApplyMFMDFKCQCbQBz8osthread6ThreadZiZi@Base 12 ++ _D4core6thread11threadgroup11__moduleRefZ@Base 12 ++ _D4core6thread11threadgroup12__ModuleInfoZ@Base 12 ++ _D4core6thread12__ModuleInfoZ@Base 12 ++ _D4core6thread5fiber11__moduleRefZ@Base 12 ++ _D4core6thread5fiber12__ModuleInfoZ@Base 12 ++ _D4core6thread5fiber5Fiber10allocStackMFNbmmZv@Base 12 ++ _D4core6thread5fiber5Fiber13yieldAndThrowFNbNiC6object9ThrowableZv@Base 12 ++ _D4core6thread5fiber5Fiber19_staticCtor_L924_C9FZv@Base 12 ++ _D4core6thread5fiber5Fiber3runMFZv@Base 12 ++ _D4core6thread5fiber5Fiber4callMFEQBgQBeQBaQx7RethrowZC6object9Throwable@Base 12 ++ _D4core6thread5fiber5Fiber5resetMFNbNiDFZvZv@Base 12 ++ _D4core6thread5fiber5Fiber5resetMFNbNiPFZvZv@Base 12 ++ _D4core6thread5fiber5Fiber5resetMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber5stateMxFNaNbNdNiNfZEQBtQBrQBnQBk5State@Base 12 ++ _D4core6thread5fiber5Fiber5yieldFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber6__ctorMFNbDFZvmmZCQBrQBpQBlQBi@Base 12 ++ _D4core6thread5fiber5Fiber6__ctorMFNbPFZvmmZCQBrQBpQBlQBi@Base 12 ++ _D4core6thread5fiber5Fiber6__dtorMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber6__initZ@Base 12 ++ _D4core6thread5fiber5Fiber6__vtblZ@Base 12 ++ _D4core6thread5fiber5Fiber7__ClassZ@Base 12 ++ _D4core6thread5fiber5Fiber7getThisFNbNiNfZCQBpQBnQBjQBg@Base 12 ++ _D4core6thread5fiber5Fiber7setThisFNbNiCQBmQBkQBgQBdZv@Base 12 ++ _D4core6thread5fiber5Fiber7sm_thisCQBhQBfQBbQy@Base 12 ++ _D4core6thread5fiber5Fiber7sm_utxtSQBh3sys5posix8ucontext10ucontext_t@Base 12 ++ _D4core6thread5fiber5Fiber8callImplMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber8switchInMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber9freeStackMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber9initStackMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber9switchOutMFNbNiZv@Base 12 ++ _D4core6thread5fiber5Fiber__T4callVEQBiQBgQBcQz7Rethrowi0ZQBdMFNbNiZC6object9Throwable@Base 12 ++ _D4core6thread5fiber5Fiber__T4callVEQBiQBgQBcQz7Rethrowi1ZQBdMFNiZC6object9Throwable@Base 12 ++ _D4core6thread5types11__moduleRefZ@Base 12 ++ _D4core6thread5types12__ModuleInfoZ@Base 12 ++ _D4core6thread5types13ll_ThreadData6__initZ@Base 12 ++ _D4core6thread5types17PTHREAD_STACK_MINym@Base 12 ++ _D4core6thread5types24_sharedStaticCtor_L54_C1FZv@Base 12 ++ _D4core6thread5types8PAGESIZEym@Base 12 ++ _D4core6thread7context11__moduleRefZ@Base 12 ++ _D4core6thread7context12StackContext6__initZ@Base 12 ++ _D4core6thread7context12__ModuleInfoZ@Base 12 ++ _D4core6thread7context8Callable6__initZ@Base 12 ++ _D4core6thread7context8Callable6opCallMFZv@Base 12 ++ _D4core6thread7context8Callable8opAssignMFNaNbNiNfDFZvZv@Base 12 ++ _D4core6thread7context8Callable8opAssignMFNaNbNiNfPFZvZv@Base 12 ++ _D4core6thread8osthread11__moduleRefZ@Base 12 ++ _D4core6thread8osthread11getStackTopFNbNiZPv@Base 12 ++ _D4core6thread8osthread11swapContextFNbNiPvZQd@Base 12 ++ _D4core6thread8osthread12__ModuleInfoZ@Base 12 ++ _D4core6thread8osthread12attachThreadFNbNiCQBpQBn10threadbase10ThreadBaseZQBg@Base 12 ++ _D4core6thread8osthread12suspendCountSQBk3sys5posix9semaphore5sem_t@Base 12 ++ _D4core6thread8osthread12thread_yieldFNbNiZv@Base 12 ++ _D4core6thread8osthread14getStackBottomFNbNiZPv@Base 12 ++ _D4core6thread8osthread15adjustStackSizeFNbNimZm@Base 12 ++ _D4core6thread8osthread16_mainThreadStoreG177v@Base 12 ++ _D4core6thread8osthread17thread_entryPointUNbPvZ21thread_cleanupHandlerUNaNbNiQBhZv@Base 12 ++ _D4core6thread8osthread18callWithStackShellFNbMDFNbPvZvZv@Base 12 ++ _D4core6thread8osthread18joinLowLevelThreadFNbNimZv@Base 12 ++ _D4core6thread8osthread18resumeSignalNumberi@Base 12 ++ _D4core6thread8osthread19suspendSignalNumberi@Base 12 ++ _D4core6thread8osthread20createLowLevelThreadFNbNiDFNbZvkQhZ20thread_lowlevelEntryUNbPvZQd@Base 12 ++ _D4core6thread8osthread20createLowLevelThreadFNbNiDFNbZvkQhZm@Base 12 ++ _D4core6thread8osthread6Thread12PRIORITY_MAXFNaNbNdNiNeZxi@Base 12 ++ _D4core6thread8osthread6Thread12PRIORITY_MINFNaNbNdNiNeZi@Base 12 ++ _D4core6thread8osthread6Thread14loadPrioritiesFNbNiNeZSQCbQBzQBvQBp8Priority@Base 12 ++ _D4core6thread8osthread6Thread16PRIORITY_DEFAULTFNaNbNdNiNeZi@Base 12 ++ _D4core6thread8osthread6Thread3runMFZv@Base 12 ++ _D4core6thread8osthread6Thread4joinMFbZC6object9Throwable@Base 12 ++ _D4core6thread8osthread6Thread5cacheOSQBkQBiQBeQy8Priority@Base 12 ++ _D4core6thread8osthread6Thread5sleepFNbNiSQBo4time8DurationZv@Base 12 ++ _D4core6thread8osthread6Thread5startMFNbZCQBoQBmQBiQBc@Base 12 ++ _D4core6thread8osthread6Thread5yieldFNbNiZv@Base 12 ++ _D4core6thread8osthread6Thread6__ctorMFNaNbNiNfDFZvmZCQCaQByQBuQBo@Base 12 ++ _D4core6thread8osthread6Thread6__ctorMFNaNbNiNfPFZvmZCQCaQByQBuQBo@Base 12 ++ _D4core6thread8osthread6Thread6__ctorMFNaNbNiNfmZCQBwQBuQBqQBk@Base 12 ++ _D4core6thread8osthread6Thread6__dtorMFNbNiZv@Base 12 ++ _D4core6thread8osthread6Thread6__initZ@Base 12 ++ _D4core6thread8osthread6Thread6__vtblZ@Base 12 ++ _D4core6thread8osthread6Thread7__ClassZ@Base 12 ++ _D4core6thread8osthread6Thread7getThisFNbNiNfZCQBtQBrQBnQBh@Base 12 ++ _D4core6thread8osthread6Thread8Priority6__initZ@Base 12 ++ _D4core6thread8osthread6Thread8priorityMFNdZi@Base 12 ++ _D4core6thread8osthread6Thread8priorityMFNdiZv@Base 12 ++ _D4core6thread8osthread6Thread9isRunningMFNbNdNiZb@Base 12 ++ _D4core6thread8osthread6Thread__T10loadGlobalVAyaa12_5052494f524954595f4d4158ZQBtFNbNiNfZi@Base 12 ++ _D4core6thread8osthread6Thread__T10loadGlobalVAyaa12_5052494f524954595f4d494eZQBtFNbNiNfZi@Base 12 ++ _D4core6thread8osthread6Thread__T10loadGlobalVAyaa16_5052494f524954595f44454641554c54ZQCbFNbNiNfZi@Base 12 ++ _D4core6thread8osthread6resumeFNbNiCQBiQBg10threadbase10ThreadBaseZv@Base 12 ++ _D4core6thread8osthread7suspendFNbNiCQBjQBhQBd6ThreadZb@Base 12 ++ _D4core6thread8osthread8toThreadFNaNbNiNeNkMCQBrQBp10threadbase10ThreadBaseZCQCxQCvQCr6Thread@Base 12 ++ _D4core6vararg11__moduleRefZ@Base 12 ++ _D4core6vararg12__ModuleInfoZ@Base 12 ++ _D4core7runtime11__moduleRefZ@Base 12 ++ _D4core7runtime12__ModuleInfoZ@Base 12 ++ _D4core7runtime14UnitTestResult6__initZ@Base 12 ++ _D4core7runtime18runModuleUnitTestsUZ19unittestSegvHandlerUiPSQCi3sys5posix6signal9siginfo_tPvZv@Base 12 ++ _D4core7runtime19defaultTraceHandlerFPvZC6object9Throwable9TraceInfo@Base 12 ++ _D4core7runtime25_sharedStaticCtor_L119_C1FZv@Base 12 ++ _D4core7runtime5CArgs6__initZ@Base 12 ++ _D4core7runtime7Runtime10initializeFZb@Base 12 ++ _D4core7runtime7Runtime16moduleUnitTesterFNdPFZbZv@Base 12 ++ _D4core7runtime7Runtime16moduleUnitTesterFNdZPFZb@Base 12 ++ _D4core7runtime7Runtime19sm_moduleUnitTesterPFZb@Base 12 ++ _D4core7runtime7Runtime22sm_extModuleUnitTesterPFZSQBxQBv14UnitTestResult@Base 12 ++ _D4core7runtime7Runtime24extendedModuleUnitTesterFNdPFZSQCcQCa14UnitTestResultZv@Base 12 ++ _D4core7runtime7Runtime24extendedModuleUnitTesterFNdZPFZSQCdQCb14UnitTestResult@Base 12 ++ _D4core7runtime7Runtime6__initZ@Base 12 ++ _D4core7runtime7Runtime9terminateFZb@Base 12 ++ _D4core8builtins11__ctfeWriteFNaNbNiNfMAxaZv@Base 12 ++ _D4core8builtins11__moduleRefZ@Base 12 ++ _D4core8builtins12__ModuleInfoZ@Base 12 ++ _D4core8demangle11__moduleRefZ@Base 12 ++ _D4core8demangle12__ModuleInfoZ@Base 12 ++ _D4core8demangle12demangleTypeFNaNbNfAxaAaZQd@Base 12 ++ _D4core8demangle15decodeDmdStringFNaNbNfAxaKmZAya@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks10parseLNameMFNaNlNfMKSQDeQDc__T8DemangleTSQDyQDwQDqFNaNbNfNkMQDcZQDcZQBmZb@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11Replacement6__initZ@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11__xopEqualsMxFKxSQDaQCyQCsFNaNbNfNkMQCeZQCeZb@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks13encodeBackrefMFNaNbNlNfmZv@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks13flushPositionMFNaNbNlNfKSQDiQDg__T8DemangleTSQEcQEaQDuFNaNbNfNkMQDgZQDgZQBmZv@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks16positionInResultMFNaNbNiNlNfmZm@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks6__initZ@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks9__xtoHashFNbNeKxSQCzQCxQCrFNaNbNfNkMQCdZQCdZm@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks9parseTypeMFNaNjNfKSQDbQCz__T8DemangleTSQDvQDtQDnFNaNbNfNkMQCzZQCzZQBmAaZQd@Base 12 ++ _D4core8demangle15reencodeMangledFNaNbNfNkMAxaZAa@Base 12 ++ _D4core8demangle7NoHooks6__initZ@Base 12 ++ _D4core8demangleQjFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFMDFyPS6object10ModuleInfoZiZiTQBfZQByFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbMDFNbPvZvZvTQpZQBhFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiAyaMDFNbNiQkZQnbZQrTQzZQBrFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiAyakQeQgmZvTQrZQBjFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiCQBm6thread10threadbase10ThreadBaseZQBkTQBtZQCmFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiCQBm6thread10threadbase10ThreadBaseZvTQBrZQCkFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiPvZQdTQlZQBdFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiPvZvTQkZQBcFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiZPvTQjZQBbFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiZmTQiZQBaFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbNiZvTQiZQBaFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbPvMDFNbQhQjZvZvTQtZQBlFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T10mangleFuncHTPFNbPvMDFNbQhZiZvTQrZQBjFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQEgQEe__TQDyTQDuZQEgFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQEfQEd__TQDxTQDtZQEfFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFMDFyPS6object10ModuleInfoZiZiZQBnFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDpQDn__TQDhTQDdZQDpFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDoQDm__TQDgTQDcZQDoFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbMDFNbPvZvZvZQxFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQEaQDy__TQDsTQDoZQEaFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDzQDx__TQDrTQDnZQDzFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyaMDFNbNiQkZQnbZQrZQBhFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDrQDp__TQDjTQDfZQDrFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDqQDo__TQDiTQDeZQDqFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiAyakQeQgmZvZQzFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQEuQEs__TQEmTQEiZQEuFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQEtQEr__TQElTQEhZQEtFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZQBkZQCbFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQEsQEq__TQEkTQEgZQEsFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQErQEp__TQEjTQEfZQErFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiCQBf6thread10threadbase10ThreadBaseZvZQBzFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDlQDj__TQDdTQCzZQDlFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDkQDi__TQDcTQCyZQDkFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZQdZQtFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDkQDi__TQDcTQCyZQDkFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDjQDh__TQDbTQCxZQDjFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiPvZvZQsFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDjQDh__TQDbTQCxZQDjFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDiQDg__TQDaTQCwZQDiFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZPvZQrFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDiQDg__TQDaTQCwZQDiFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDhQDf__TQCzTQCvZQDhFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZmZQqFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDiQDg__TQDaTQCwZQDiFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDhQDf__TQCzTQCvZQDhFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbNiZvZQqFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDuQDs__TQDmTQDiZQDuFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDtQDr__TQDlTQDhZQDtFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhQjZvZvZQBbFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter10indexOfDotMxFNaNbNiNlNfZl@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter11__xopEqualsMxFKxSQDrQDp__TQDjTQDfZQDrFNaNbNfNkMQCtNkMQCtZQCuZb@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter5frontMxFNaNbNdNiNjNfZQBs@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter6__initZ@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter8popFrontMFNaNbNiNlNfZv@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZ11DotSplitter9__xtoHashFNbNeKxSQDqQDo__TQDiTQDeZQDqFNaNbNfNkMQCsNkMQCsZQCtZm@Base 12 ++ _D4core8demangle__T6mangleTFNbPvMDFNbQhZiZvZQzFNaNbNfNkMAxaNkMAaZQd@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl10isHexDigitFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl10parseLNameMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl10parseValueMFNaNlNfMAaaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl11__xopEqualsMxFKxSQDyQDw__TQDqTQDkZQDyZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl11peekBackrefMFNaNfZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl11sliceNumberMFNaNjNfZQBs@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl12decodeNumberMFNaNlNfMQBtZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl12decodeNumberMFNaNlNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl12demangleNameMFNaNbNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl12demangleTypeMFNaNbNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl13parseFuncAttrMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl13parseModifierMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl14ParseException6__ctorMFNaNbNiNfAyaZCQErQEp__TQEjTQEdZQErQCg@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl14ParseException6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl14ParseException6__vtblZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl14ParseException7__ClassZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl15parseSymbolNameMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl16isCallConventionFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl16parseMangledNameMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl16parseMangledNameMFNaNlNfbmZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17OverflowException6__ctorMFNaNbNiNfAyaZCQEuQEs__TQEmTQEgZQEuQCj@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17OverflowException6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17OverflowException6__vtblZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17OverflowException7__ClassZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17isSymbolNameFrontMFNaNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17parseIntegerValueMFNaNlNfMAaaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17parseTemplateArgsMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl17parseTypeFunctionMFNaNjNfAaEQEjQEh__TQEbTQDvZQEj10IsDelegateZQBk@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl18parseFuncArgumentsMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl18parseQualifiedNameMFNaNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl19mayBeMangledNameArgMFNaNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl19parseCallConventionMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl19parseMangledNameArgMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl25mayBeTemplateInstanceNameMFNaNlNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl25parseFunctionTypeNoReturnMFNaNjNfbZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl25parseTemplateInstanceNameMFNaNlNfbZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl3eatMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl3padMFNaNfQBgZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl3putMFNaNjNfMQBjZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl3putMFNaNjNfaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl4peekMFNaNbNiNfmZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl4testMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5emptyMFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5errorFNaNeAyaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5frontMFNaNbNdNiNfZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5matchMFNaNfQBiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5matchMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl5shiftMFNaNiNfQBkZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6__ctorMFNaNbNcNiNfNkMQBsEQEfQEd__TQDxTQDrZQEf7AddTypeNkMAaZSQFoQFm__TQFgTQFaZQFo@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6__ctorMFNaNbNcNiNfNkMQBsNkMAaZSQElQEj__TQEdTQDxZQEl@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6appendMFNaNjNfQBlZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6removeMFNaNbNiNfQBnZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl6silentMFNaNfDFNaNfZvZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl7isAlphaFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl7isDigitFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8containsFNaNbNiNeQBoQBrZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8overflowFNaNiNeAyaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8popFrontMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8popFrontMFNaNfiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8putAsHexMFNaNfmiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl8putCommaMFNaNfmZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9__xtoHashFNbNeKxSQDxQDv__TQDpTQDjZQDxZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9ascii2hexFNaNfaZh@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9copyInputMFNaNbNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9parseRealMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9parseTypeMFNaNjNfAaZ10primitivesyG23Aa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl9parseTypeMFNaNjNfAaZQd@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl__T10doDemangleSQDvQDt__TQDnTQDhZQDv16parseMangledNameZQCaMFNaNbNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl__T10doDemangleS_DQDxQDv__TQDpTQDjZQDx9parseTypeMFNaNjNfAaZQdZQChMFNaNbNjNfZQu@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl__T13decodeBackrefVii0ZQuMFNaNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa15reencodeMangledFNaNbNfNkMAxaZ12PrependHooksZQCl__T13decodeBackrefVmi1ZQuMFNaNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa10isHexDigitFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa10parseLNameMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa10parseValueMFNaNlNfMAaaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa11__xopEqualsMxFKxSQCnQCl__TQCfTQBzZQCnZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa11peekBackrefMFNaNfZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa11sliceNumberMFNaNjNfZAxa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa12decodeNumberMFNaNlNfMAxaZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa12decodeNumberMFNaNlNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa12demangleNameMFNaNbNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa12demangleTypeMFNaNbNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa13parseFuncAttrMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa13parseModifierMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa14ParseException6__ctorMFNaNbNiNfAyaZCQDgQDe__TQCyTQCsZQDgQCg@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa14ParseException6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa14ParseException6__vtblZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa14ParseException7__ClassZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa15parseSymbolNameMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa16isCallConventionFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa16parseMangledNameMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa16parseMangledNameMFNaNlNfbmZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17OverflowException6__ctorMFNaNbNiNfAyaZCQDjQDh__TQDbTQCvZQDjQCj@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17OverflowException6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17OverflowException6__vtblZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17OverflowException7__ClassZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17isSymbolNameFrontMFNaNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17parseIntegerValueMFNaNlNfMAaaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17parseTemplateArgsMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa17parseTypeFunctionMFNaNjNfAaEQCyQCw__TQCqTQCkZQCy10IsDelegateZQBk@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa18parseFuncArgumentsMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa18parseQualifiedNameMFNaNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa19mayBeMangledNameArgMFNaNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa19parseCallConventionMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa19parseMangledNameArgMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa25mayBeTemplateInstanceNameMFNaNlNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa25parseFunctionTypeNoReturnMFNaNjNfbZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa25parseTemplateInstanceNameMFNaNlNfbZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa3eatMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa3padMFNaNfAxaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa3putMFNaNjNfMAxaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa3putMFNaNjNfaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa4peekMFNaNbNiNfmZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa4testMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5emptyMFNaNbNdNiNfZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5errorFNaNeAyaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5frontMFNaNbNdNiNfZa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5matchMFNaNfAxaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5matchMFNaNfaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa5shiftMFNaNiNfAxaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6__ctorMFNaNbNcNiNfNkMAxaEQCuQCs__TQCmTQCgZQCu7AddTypeNkMAaZSQEdQEb__TQDvTQDpZQEd@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6__ctorMFNaNbNcNiNfNkMAxaNkMAaZSQDaQCy__TQCsTQCmZQDa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6__initZ@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6appendMFNaNjNfAxaZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6removeMFNaNbNiNfAxaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa6silentMFNaNfDFNaNfZvZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa7isAlphaFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa7isDigitFNaNbNiNfaZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8containsFNaNbNiNeAxaQdZb@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8overflowFNaNiNeAyaZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8popFrontMFNaNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8popFrontMFNaNfiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8putAsHexMFNaNfmiZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa8putCommaMFNaNfmZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9__xtoHashFNbNeKxSQCmQCk__TQCeTQByZQCmZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9ascii2hexFNaNfaZh@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9copyInputMFNaNbNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9parseRealMFNaNlNfZv@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9parseTypeMFNaNjNfAaZ10primitivesyG23Aa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa9parseTypeMFNaNjNfAaZQd@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa__T10doDemangleSQCkQCi__TQCcTQBwZQCk16parseMangledNameZQCaMFNaNbNjNfZAa@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa__T10doDemangleS_DQCmQCk__TQCeTQByZQCm9parseTypeMFNaNjNfAaZQdZQChMFNaNbNjNfZQu@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa__T13decodeBackrefVii0ZQuMFNaNfZm@Base 12 ++ _D4core8demangle__T8DemangleTSQBcQBa7NoHooksZQBa__T13decodeBackrefVmi1ZQuMFNaNfZm@Base 12 ++ _D4core8internal10attributes11__moduleRefZ@Base 12 ++ _D4core8internal10attributes12__ModuleInfoZ@Base 12 ++ _D4core8internal10entrypoint11__moduleRefZ@Base 12 ++ _D4core8internal10entrypoint12__ModuleInfoZ@Base 12 ++ _D4core8internal11destruction11__moduleRefZ@Base 12 ++ _D4core8internal11destruction12__ModuleInfoZ@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTS3gcc8sections3elf9ThreadDSOZQBvFNaNbNiNfKQBqZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTS3std11concurrency7MessageZQBtFNfKQBiZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTS3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGqZQKaFNaNbNiKQJtZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTS3std3net4curl3FTP4ImplZQBqFKQBdZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTS3std3net4curl4HTTP4ImplZQBrFKQBeZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTS3std3net4curl4SMTP4ImplZQBrFKQBeZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTS3std4file15DirIteratorImplZQBuFNfKQBjZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTS3std5stdio4FileZQBjFNfKQyZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBx2gc11gcinterface4RootZQBsFNaNbNiNfKQBnZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBx2gc11gcinterface5RangeZQBtFNaNbNiNfKQBoZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBxQBv9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQDlFNaNbNiNfKQDgZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBxQBv9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQDnFNaNbNiNfKQDiZv@Base 12 ++ _D4core8internal11destruction__T15destructRecurseTSQBxQBv9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQDlFNaNbNiNfKQDgZv@Base 12 ++ _D4core8internal12parseoptions10parseErrorFNbNiMxAaMxQeMxQiAxaZb@Base 12 ++ _D4core8internal12parseoptions11__moduleRefZ@Base 12 ++ _D4core8internal12parseoptions12__ModuleInfoZ@Base 12 ++ _D4core8internal12parseoptions15overflowedErrorFNbNiMxAaMxQeZb@Base 12 ++ _D4core8internal12parseoptions3minFNbNimmZm@Base 12 ++ _D4core8internal12parseoptions5parseFNbNiAxaKANgaKQfQlZb@Base 12 ++ _D4core8internal12parseoptions5parseFNbNiAxaKANgaKbQkZb@Base 12 ++ _D4core8internal12parseoptions5parseFNbNiAxaKANgaKfQkZb@Base 12 ++ _D4core8internal12parseoptions6MemVal6__initZ@Base 12 ++ _D4core8internal12parseoptions8optErrorFNbNiMxAaMxQeAxaZb@Base 12 ++ _D4core8internal12parseoptions__T12parseOptionsTSQBv2gc6config6ConfigZQBlFNbNiKQBfAyaZb@Base 12 ++ _D4core8internal12parseoptions__T14rt_parseOptionTbZQtFNbNiAxaKANgaKbQkZb@Base 12 ++ _D4core8internal12parseoptions__T17initConfigOptionsTSQCa2gc6config6ConfigZQBqFNbNiKQBfAyaZb@Base 12 ++ _D4core8internal12parseoptions__T4skipX7isspaceZQpFNaNbNiNfANgaZQf@Base 12 ++ _D4core8internal12parseoptions__T5parseHThZQkFNbNiAxaKANgaKhQkbZb@Base 12 ++ _D4core8internal12parseoptions__T5parseHTkZQkFNbNiAxaKANgaKkQkbZb@Base 12 ++ _D4core8internal12parseoptions__T5parseHTmZQkFNbNiAxaKANgaKmQkbZb@Base 12 ++ _D4core8internal2gc2os10isLowOnMemFNbNimZb@Base 12 ++ _D4core8internal2gc2os10os_mem_mapFNbNimbZPv@Base 12 ++ _D4core8internal2gc2os11__moduleRefZ@Base 12 ++ _D4core8internal2gc2os12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc2os12os_mem_unmapFNbNiPvmZi@Base 12 ++ _D4core8internal2gc2os15os_physical_memFNbNiZm@Base 12 ++ _D4core8internal2gc2os8wait_pidFNbNiibZEQBmQBkQBeQBe11ChildStatus@Base 12 ++ _D4core8internal2gc4bits11__moduleRefZ@Base 12 ++ _D4core8internal2gc4bits12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc4bits6GCBits10clearWordsMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits10copyRangeZMFNbNimmPxmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits16copyWordsShiftedMFNbNimmmPxmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits18copyRangeRepeatingMFNbNimmPxmmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits3setMFNaNbNiNlNemZi@Base 12 ++ _D4core8internal2gc4bits6GCBits4DtorMFNbNibZv@Base 12 ++ _D4core8internal2gc4bits6GCBits4copyMFNbNiPSQBqQBoQBiQBiQBgZv@Base 12 ++ _D4core8internal2gc4bits6GCBits4testMxFNaNbNiNlNemZm@Base 12 ++ _D4core8internal2gc4bits6GCBits4zeroMFNbNiZv@Base 12 ++ _D4core8internal2gc4bits6GCBits5allocMFNbNimbZv@Base 12 ++ _D4core8internal2gc4bits6GCBits5clearMFNaNbNiNlNemZi@Base 12 ++ _D4core8internal2gc4bits6GCBits6__initZ@Base 12 ++ _D4core8internal2gc4bits6GCBits6nwordsMxFNaNbNdNiZm@Base 12 ++ _D4core8internal2gc4bits6GCBits6setAllMFNbNiZv@Base 12 ++ _D4core8internal2gc4bits6GCBits8clrRangeMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits8setRangeMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits8setWordsMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits9clrRangeZMFNbNimmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits9copyRangeMFNbNimmPxmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits9copyWordsMFNbNimmPxmZv@Base 12 ++ _D4core8internal2gc4bits6GCBits9setLockedMFNaNbNiNlNemZm@Base 12 ++ _D4core8internal2gc4bits6GCBits9setRangeZMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10baseOffsetFNbNimEQCfQCdQBxQBxQBvQCg4BinsZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10extendTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10initializeFZCQCbQBq11gcinterface2GC@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10mallocTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10numExtendsl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw10numMallocsl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw11__moduleRefZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw11calcBinBaseFZG15G256s@Base 12 ++ _D4core8internal2gc4impl12conservativeQw11numReallocsl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw11reallocTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector10initializeFNbPSQCrQCpQCjQCjQChQCs3GcxZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector10log_mallocFNbPvmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector10log_parentFNbPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector11log_collectFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12LeakDetector8log_freeFNbNiPvmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12maxPauseTimeSQCb4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12sentinel_addFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw12sentinel_subFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw13maxPoolMemorym@Base 12 ++ _D4core8internal2gc4impl12conservativeQw13sentinel_initFNbNiPvmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw13sentinel_sizeFNbNixPvmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC10freeNoSyncMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC10removeRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11checkNoSyncMFNbPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11fullCollectMFNbZ2goFNbPSQDcQDaQCuQCuQCsQDd3GcxZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11fullCollectMFNbZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11inFinalizerMFNbNiNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11queryNoSyncMFNbPvZSQCx6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC11removeRangeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12_inFinalizerb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12addrOfNoSyncMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12extendNoSyncMFNbPvmmxC8TypeInfoZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12mallocNoSyncMFNbmkKmxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12profileStatsMFNbNiNeZSQDa6memory2GC12ProfileStats@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC12sizeOfNoSyncMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC13reallocNoSyncMFNbPvmKkKmxC8TypeInfoZQt@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC13reserveNoSyncMFNbmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC13runFinalizersMFNbMxAvZ2goFNbPSQDiQDgQDaQDaQCyQDj3GcxMxQBjZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC14collectNoStackMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC14getStatsNoSyncMFNbNiNeJSQDc6memory2GC5StatsZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC18fullCollectNoStackMFNbZ2goFNbPSQDjQDhQDbQDbQCzQDk3GcxZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC18fullCollectNoStackMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC4filePa@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC4freeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC4linem@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC5checkMFNbPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC5queryMFNbPvZSQCq6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC5statsMFNbNiNfZSQCs6memory2GC5Stats@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6__ctorMFZCQCnQClQCfQCfQCdQCoQBt@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6__dtorMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6__vtblZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6addrOfMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6callocMFNbmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6enableMFZ2goFNaNbNiNfPSQDaQCyQCsQCsQCqQDb3GcxZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6enableMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6extendMFNbPvmmxC8TypeInfoZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6gcLockOSQClQCj8spinlock15AlignedSpinLock@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6lockNRFNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6mallocMFNbmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6qallocMFNbmkMxC8TypeInfoZSQDd6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC6sizeOfMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7__ClassZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7addRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7clrAttrMFNbPvkZ2goFNbPSQDaQCyQCsQCsQCqQDb3GcxQBikZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7clrAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7collectMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7disableMFZ2goFNaNbNiNfPSQDbQCzQCtQCtQCrQDc3GcxZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7disableMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7getAttrMFNbPvZ2goFNbPSQCzQCxQCrQCrQCpQDa3GcxQBhZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7getAttrMFNbPvZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7reallocMFNbPvmkxC8TypeInfoZQq@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7reserveMFNbmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7setAttrMFNbPvkZ2goFNbPSQDaQCyQCsQCsQCqQDb3GcxQBikZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC7setAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC8minimizeMFNbZ2goFNbPSQCyQCwQCqQCqQCoQCz3GcxZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC8minimizeMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC8rootIterMFNdNiZDFMDFNbKSQDbQCq11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC9isPreciseb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC9rangeIterMFNdNiZDFMDFNbKSQDcQCr11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy10freeNoSyncMFNbNiPvZvS_DQEmQEkQEeQEeQEcQEn8freeTimelS_DQFrQFpQFjQFjQFhQFs8numFreeslTQCpZQEtMFNbNiKQDdZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy11checkNoSyncMFNbPvZvS_DQElQEjQEdQEdQEbQEm9otherTimelS_DQFrQFpQFjQFjQFhQFs9numOtherslTQCrZQEuMFNbKQDdZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy11fullCollectMFNbZ2goFNbPSQEnQElQEfQEfQEdQEo3GcxZmTQBbZQDlMFNbKQBnZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy11queryNoSyncMFNbPvZSQEi6memory8BlkInfo_S_DQFeQFcQEwQEwQEuQFf9otherTimelS_DQGkQGiQGcQGcQGaQGl9numOtherslTQDkZQFnMFNbKQDwZQDx@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy12addrOfNoSyncMFNbNiPvZQdS_DQEpQEnQEhQEhQEfQEq9otherTimelS_DQFvQFtQFnQFnQFlQFw9numOtherslTQCsZQEyMFNbNiKQDgZQDk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy12extendNoSyncMFNbPvmmxC8TypeInfoZmS_DQEzQExQErQErQEpQFa10extendTimelS_DQGhQGfQFzQFzQFxQGi10numExtendslTQDiTmTmTxQDmZQFvMFNbKQEdKmKmKxQEhZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy12mallocNoSyncMFNbmkKmxC8TypeInfoZPvS_DQFaQEyQEsQEsQEqQFb10mallocTimelS_DQGiQGgQGaQGaQFyQGj10numMallocslTmTkTmTxQDlZQFuMFNbKmKkKmKxQEeZQDx@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy12sizeOfNoSyncMFNbNiPvZmS_DQEoQEmQEgQEgQEeQEp9otherTimelS_DQFuQFsQFmQFmQFkQFv9numOtherslTQCrZQExMFNbNiKQDfZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy13reallocNoSyncMFNbPvmKkKmxC8TypeInfoZQtS_DQFeQFcQEwQEwQEuQFf10mallocTimelS_DQGmQGkQGeQGeQGcQGn10numMallocslTQDmTmTkTmTxQDpZQGcMFNbKQEjKmKkKmKxQEmZQEy@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy13reserveNoSyncMFNbmZmS_DQEmQEkQEeQEeQEcQEn9otherTimelS_DQFsQFqQFkQFkQFiQFt9numOtherslTmZQEtMFNbKmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy13runFinalizersMFNbMxAvZ2goFNbPSQEtQErQElQElQEjQEu3GcxMxQBjZvS_DQFzQFxQFrQFrQFpQGa9otherTimelS_DQHfQHdQGxQGxQGvQHg9numOtherslTQDsTxQEgZQGnMFNbKQEjKxQExZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy14getStatsNoSyncMFNbNiNeJSQEn6memory2GC5StatsZvS_DQFlQFjQFdQFdQFbQFm9otherTimelS_DQGrQGpQGjQGjQGhQGs9numOtherslTQDjZQFuMFNbNiNfKQDzZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy18fullCollectNoStackMFNbZ2goFNbPSQEuQEsQEmQEmQEkQEv3GcxZmTQBbZQDsMFNbKQBnZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy6enableMFZ2goFNaNbNiNfPSQElQEjQEdQEdQEbQEm3GcxZvS_DQFmQFkQFeQFeQFcQFn9otherTimelS_DQGsQGqQGkQGkQGiQGt9numOtherslTQDnZQFvMFNbNiNfKQEdZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy7clrAttrMFNbPvkZ2goFNbPSQElQEjQEdQEdQEbQEm3GcxQBikZkS_DQFqQFoQFiQFiQFgQFr9otherTimelS_DQGwQGuQGoQGoQGmQGx9numOtherslTQDrTQEfTkZQGfMFNbKQEjKQExKkZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy7disableMFZ2goFNaNbNiNfPSQEmQEkQEeQEeQEcQEn3GcxZvS_DQFnQFlQFfQFfQFdQFo9otherTimelS_DQGtQGrQGlQGlQGjQGu9numOtherslTQDnZQFwMFNbNiNfKQEdZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy7getAttrMFNbPvZ2goFNbPSQEkQEiQEcQEcQEaQEl3GcxQBhZkS_DQFoQFmQFgQFgQFeQFp9otherTimelS_DQGuQGsQGmQGmQGkQGv9numOtherslTQDqTQEdZQGbMFNbKQEgKQEtZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy7setAttrMFNbPvkZ2goFNbPSQElQEjQEdQEdQEbQEm3GcxQBikZkS_DQFqQFoQFiQFiQFgQFr9otherTimelS_DQGwQGuQGoQGoQGmQGx9numOtherslTQDrTQEfTkZQGfMFNbKQEjKQExKkZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14ConservativeGC__T9runLockedS_DQCsQCqQCkQCkQCiQCtQBy8minimizeMFNbZ2goFNbPSQEjQEhQEbQEbQDzQEk3GcxZvS_DQFkQFiQFcQFcQFaQFl9otherTimelS_DQGqQGoQGiQGiQGgQGr9numOtherslTQDnZQFtMFNbKQDzZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14SENTINEL_EXTRAxk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14baseOffsetBitsyG14G4m@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14bytesAllocatedm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw14numCollectionsm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool10allocPagesMFNbmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool18setFreePageOffsetsMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool7getInfoMFNbPvZSQCt6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool7getSizeMxFNbNimZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool8getPagesMxFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool9freePagesMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool__T20mergeFreePageOffsetsVbi0Vbi1ZQBfMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15LargeObjectPool__T20mergeFreePageOffsetsVbi1Vbi1ZQBfMFNbNimmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool7getInfoMFNbPvZSQCt6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool7getSizeMxFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw15SmallObjectPool9allocPageMFNbEQCsQCqQCkQCkQCiQCt4BinsZPSQDsQDqQDkQDkQDiQDt4List@Base 12 ++ _D4core8internal2gc4impl12conservativeQw17maxCollectionTimeSQCg4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw18initialize_preciseFZCQCjQBy11gcinterface2GC@Base 12 ++ _D4core8internal2gc4impl12conservativeQw18sentinel_InvariantFNbNixPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10initializeMFZ23atforkHandlersInstalledb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10initializeMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10removeRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10rootsApplyMFNbMDFNbKSQCnQCc11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx10smallAllocMFNbmKmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11__xopEqualsMxFKxSQCjQChQCbQCbQBzQCkQBpZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11collectForkMFNbbZEQCkQCiQCc2os11ChildStatus@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11disableForkMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11fullcollectMFNbbbbZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11rangesApplyMFNbMDFNbKSQCoQCd11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11recoverPageMFNbPSQCjQChQCbQCbQBzQCk15SmallObjectPoolmEQDuQDsQDmQDmQDkQDv4BinsZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx11removeRangeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx12collectRootsMFNbNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx12markParallelMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx14ScanThreadData6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx14scanBackgroundMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx15collectAllRootsMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx15fork_needs_lockb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx15recoverNextPageMFNbEQCmQCkQCeQCeQCcQCn4BinsZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx15stopScanThreadsMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx16startScanThreadsMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx17collectInProgressMxFNbNdZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx17pullFromScanStackMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx18maxParallelThreadsMFNbZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx18setNextRecoverPoolMFNbEQCpQCnQChQChQCfQCq4BinsmZPSQDqQDoQDiQDiQDgQDr15SmallObjectPool@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx19_d_gcx_atfork_childUZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx20_d_gcx_atfork_parentUZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx21_d_gcx_atfork_prepareUZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx23updateCollectThresholdsMFNbZ11smoothDecayFNaNbNiNfffZf@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx23updateCollectThresholdsMFNbZ3maxFNaNbNiNfffZf@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx23updateCollectThresholdsMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx4DtorMFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx5allocMFNbmKmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx5sweepMFNbZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx6lowMemMxFNbNdZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7addRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7getInfoMFNbPvZSQCg6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7newPoolMFNbmbZPSQChQCfQBzQBzQBxQCi4Pool@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7prepareMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx7reserveMFNbmZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8addRangeMFNbNiPvQcxC8TypeInfoZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8bigAllocMFNbmKmkxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8binTableyG2049EQCgQCeQByQByQBwQCh4Bins@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8ctfeBinsFNbZG2049EQCjQChQCbQCbQBzQCk4Bins@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8findBaseMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8findPoolMFNaNbNiPvZPSQCmQCkQCeQCeQCcQCn4Pool@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8findSizeMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8instancePSQCbQBzQBtQBtQBrQCcQBh@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8isMarkedMFNbNlPvZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8markForkMFNbbbbZ13wrap_delegateUPvZi@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8markForkMFNbbbbZEQCiQCgQCa2os11ChildStatus@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx8minimizeMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx9InvariantMxFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx9__xtoHashFNbNeKxSQCiQCgQCaQCaQByQCjQBoZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx9allocPageMFNbEQCfQCdQBxQBxQBvQCg4BinsZPSQDfQDdQCxQCxQCvQDg4List@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr3popMFNaNbNiZQs@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr4growMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr4pushMFNbNiQqZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr5clearMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr5resetMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr7opIndexMNgFNaNbNcNimZNgPv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr8opAssignMFNaNbNcNiNjNeSQDkQDiQDcQDcQDaQDlQCq__TQCpTQCfZQCxZQBl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTPvZQr9popLockedMFNbNiKQwZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf3popMFNaNbNiZQCh@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf4growMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf4pushMFNbNiQCfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf5clearMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf5resetMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf7opIndexMNgFNaNbNcNimZNgSQFaQEyQEsQEsQEqQFbQEg__TQCsVbi0ZQDa@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf8opAssignMFNaNbNcNiNjNeSQEzQExQErQErQEpQFaQEf__TQEeTQDuZQEmZQBl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi0ZQpZQCf9popLockedMFNbNiKQClZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf3popMFNaNbNiZQCh@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf4growMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf4pushMFNbNiQCfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf5clearMFNaNbNiNfZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf5resetMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf7opIndexMNgFNaNbNcNimZNgSQFaQEyQEsQEsQEqQFbQEg__TQCsVbi1ZQDa@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf8opAssignMFNaNbNcNiNjNeSQEzQExQErQErQEpQFaQEf__TQEeTQDuZQEmZQBl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11ToScanStackTSQCiQCgQCaQCaQByQCjQBo__T9ScanRangeVbi1ZQpZQCf9popLockedMFNbNiKQClZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11markPreciseVbi0ZQsMFNbNiNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T11markPreciseVbi1ZQsMFNbNiNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T16markConservativeVbi0ZQxMFNbNiNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T16markConservativeVbi1ZQxMFNbNiNlPvQcZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T21pullFromScanStackImplVbi0ZQBcMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T21pullFromScanStackImplVbi1ZQBcMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi0Vbi0Vbi0ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi0ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi0Vbi0Vbi1ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi0ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi0Vbi1Vbi1ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi0ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi1Vbi0Vbi0ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi1ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi1Vbi0Vbi1ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi1ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T4markVbi1Vbi1Vbi1ZQsMFNbNiNlSQCwQCuQCoQCoQCmQCxQCc__T9ScanRangeVbi1ZQpZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T7markAllS_DQCeQCcQBwQBwQBuQCfQBk__T11markPreciseVbi0ZQsMFNbNiNlPvQcZvZQCsMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T7markAllS_DQCeQCcQBwQBwQBuQCfQBk__T11markPreciseVbi1ZQsMFNbNiNlPvQcZvZQCsMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T7markAllS_DQCeQCcQBwQBwQBuQCfQBk__T16markConservativeVbi0ZQxMFNbNiNlPvQcZvZQCxMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T7markAllS_DQCeQCcQBwQBwQBuQCfQBk__T16markConservativeVbi1ZQxMFNbNiNlPvQcZvZQCxMFNbbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T9ScanRangeVbi0ZQp6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3Gcx__T9ScanRangeVbi1ZQp6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw3setFNaNbNiKG4mmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4List6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool10initializeMFNbmbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool12freePageBitsMFNbmKxG4mZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool15freeAllPageBitsMFNbmZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool16setPointerBitmapMFNbPvmmxC8TypeInfokZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool21setPointerBitmapSmallMFNbPvmmkxC8TypeInfoZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool4DtorMFNbZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool6isFreeMxFNaNbNdNiNlNfZb@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool7ShiftBy6__initZ@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool7clrBitsMFNbNimkZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool7getBitsMFNbmZk@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool7setBitsMFNbmkZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool8findBaseMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool8numPagesFNbNimZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool9InvariantMxFZv@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool9pagenumOfMxFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool9slGetInfoMFNbPvZSQCj6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl12conservativeQw4Pool9slGetSizeMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl12conservativeQw7binbaseyG15G256s@Base 12 ++ _D4core8internal2gc4impl12conservativeQw7binsizeyG15s@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8freeTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8lockTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8markTimeSQBw4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8numFreesl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw8prepTimeSQBw4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw9numOthersl@Base 12 ++ _D4core8internal2gc4impl12conservativeQw9otherTimel@Base 12 ++ _D4core8internal2gc4impl12conservativeQw9pauseTimeSQBx4time8Duration@Base 12 ++ _D4core8internal2gc4impl12conservativeQw9sweepTimeSQBx4time8Duration@Base 12 ++ _D4core8internal2gc4impl5protoQo11__moduleRefZ@Base 12 ++ _D4core8internal2gc4impl5protoQo12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC10removeRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC10rootsApplyMFMDFNbKSQChQBw11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC11inFinalizerMFNbNiNfZb@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC11rangesApplyMFMDFNbKSQCiQBx11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC11removeRangeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC12profileStatsMFNbNiNfZSQCk6memory2GC12ProfileStats@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC13runFinalizersMFNbMxAvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC14collectNoStackMFNbZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC22transferRangesAndRootsMFZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC4DtorMFZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC4freeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC5queryMFNbPvZSQCa6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC5statsMFNbNiNfZSQCc6memory2GC5Stats@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6__ctorMFZCQBxQBvQBpQBpQBnQByQBl@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6__initZ@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6__vtblZ@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6addrOfMFNbNiPvZQd@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6callocMFNbmkMxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6enableMFZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6extendMFNbPvmmMxC8TypeInfoZm@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6mallocMFNbmkMxC8TypeInfoZPv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6qallocMFNbmkMxC8TypeInfoZSQCn6memory8BlkInfo_@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC6sizeOfMFNbNiPvZm@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7__ClassZ@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7addRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7clrAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7collectMFNbZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7disableMFZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7getAttrMFNbPvZk@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7reallocMFNbPvmkMxC8TypeInfoZQr@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7reserveMFNbmZm@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC7setAttrMFNbPvkZk@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC8minimizeMFNbZv@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC8rootIterMFNdNiNjZDFMDFNbKSQCnQCc11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl5protoQo7ProtoGC9rangeIterMFNdNiNjZDFMDFNbKSQCoQCd11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl6manualQp10initializeFZCQBuQBj11gcinterface2GC@Base 12 ++ _D4core8internal2gc4impl6manualQp11__moduleRefZ@Base 12 ++ _D4core8internal2gc4impl6manualQp12__ModuleInfoZ@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC10__aggrDtorMFZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC10removeRootMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC10rootsApplyMFMDFNbKSQCjQBy11gcinterface4RootZiZi@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC11inFinalizerMFNbNiNfZb@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC11rangesApplyMFMDFNbKSQCkQBz11gcinterface5RangeZiZi@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC11removeRangeMFNbNiPvZv@Base 12 ++ _D4core8internal2gc4impl6manualQp8ManualGC12profileStatsMFNbNiNfZSQCm6memory2GC12ProfileStats@Base 12 ++ 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_D4core8internal4hash__T6hashOfTAxE2rt4util7utility17__c_complex_floatZQBvFNaNbNiNfQBzmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxE2rt4util7utility18__c_complex_doubleZQBwFNaNbNiNfQCamZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxPvZQnFNaNbNiNfMxAQrmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxPyS6object10ModuleInfoZQBhFNaNbNiNfMxAQBmmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxS3std5regexQBm2ir__T5GroupTmZQjZQBqFNaNbNiNfMxAQBvmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxaZQmFNaNbNiNfMxAamZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxdZQmFNaNbNiNfMxAdmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxeZQmFNaNbNiNfMxAemZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxfZQmFNaNbNiNfMxAfmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxhZQmFNaNbNiNfMxAhmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxkZQmFNaNbNiNfMxAkmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxmZQmFNaNbNiNfMxAmmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxtZQmFNaNbNiNfMxAtmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAxvZQmFNaNbNiNfMxAvmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAyaZQmFNaNbNiNfMxAyamZm@Base 12 ++ _D4core8internal4hash__T6hashOfTAykZQmFNaNbNiNfMxAykmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTDFZvZQnFNaNbNiNeMxDQsmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTE3std3uni__T16UnicodeSetParserTSQBf5regexQCo6parser__T6ParserTAyaTSQCoQBjQDuQBg7CodeGenZQBiZQDc8OperatorZQEjFNaNbNiNexEQEoQEn__TQEmTQDxZQEuQBsZm@Base 12 ++ _D4core8internal4hash__T6hashOfTE3std8encoding3BOMZQBbFNaNbNiNexEQBgQBfQzZm@Base 12 ++ _D4core8internal4hash__T6hashOfTG2kZQmFNaNbNiNfKxG2kmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTPvZQlFNaNbNiNeMxPvmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTPxG32hZQpFNaNbNiNeMxPQtZm@Base 12 ++ _D4core8internal4hash__T6hashOfTPxS3std11concurrency3TidZQBhFNaNbNiNeMxPQBmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTPxvZQmFNaNbNiNeMxPvZm@Base 12 ++ _D4core8internal4hash__T6hashOfTPxvZQmFNaNbNiNeMxPvmZm@Base 12 ++ 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_D4core8internal4hash__T6hashOfTdZQkFNaNbNiNexdmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTeZQkFNaNbNiNexeZm@Base 12 ++ _D4core8internal4hash__T6hashOfTeZQkFNaNbNiNexemZm@Base 12 ++ _D4core8internal4hash__T6hashOfTfZQkFNaNbNiNexfZm@Base 12 ++ _D4core8internal4hash__T6hashOfTfZQkFNaNbNiNexfmZm@Base 12 ++ _D4core8internal4hash__T6hashOfThZQkFNaNbNiNexhZm@Base 12 ++ _D4core8internal4hash__T6hashOfTiZQkFNaNbNiNexiZm@Base 12 ++ _D4core8internal4hash__T6hashOfTkZQkFNaNbNiNexkZm@Base 12 ++ _D4core8internal4hash__T6hashOfTkZQkFNaNbNiNexkmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTmZQkFNaNbNiNexmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTmZQkFNaNbNiNexmmZm@Base 12 ++ _D4core8internal4hash__T6hashOfTtZQkFNaNbNiNextZm@Base 12 ++ _D4core8internal4hash__T6hashOfTuZQkFNaNbNiNexuZm@Base 12 ++ _D4core8internal4hash__T6hashOfTxC15TypeInfo_StructZQBcFNbNfxQBcZm@Base 12 ++ _D4core8internal4hash__T6hashOfTxC8TypeInfoZQuFNbNfxQtZm@Base 12 ++ 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_D4core8internal4hash__T6hashOfTxS3std9algorithm9iteration__T9MapResultSQBm10functional__T8unaryFunVAyaa4_615b315dVQpa1_61ZQBhTSQDq3uni21DecompressedIntervalsZQDuZQFjFNaNbNiNfKxQFoZm@Base 12 ++ _D4core8internal4hash__T6hashOfTxS3std9algorithm9iteration__T9MapResultSQBm8bitmanip8BitArray7bitsSetMxFNbNdZ9__lambda2TSQDjQDiQDb__T12FilterResultSQEkQCyQCsQCmMxFNbNdZ9__lambda1TSQFq5range__T4iotaTmTmZQkFmmZ6ResultZQDfZQGdZQHsFNaNbNiNfKxQHxZm@Base 12 ++ _D4core8internal4hash__T9bytesHashVbi0ZQpFNaNbNiNeMAxhmZm@Base 12 ++ _D4core8internal4hash__T9bytesHashVbi1ZQpFNaNbNiNeMAxhmZm@Base 12 ++ _D4core8internal4hash__T9get32bitsZQlFNaNbNiMPxhZk@Base 12 ++ _D4core8internal4util4math11__moduleRefZ@Base 12 ++ _D4core8internal4util4math12__ModuleInfoZ@Base 12 ++ _D4core8internal4util4math__T3maxTmZQhFNaNbNiNfmmZm@Base 12 ++ _D4core8internal4util4math__T3minTkZQhFNaNbNiNfkkZk@Base 12 ++ _D4core8internal4util5array10arrayToPtrFNbNexAvZm@Base 12 ++ _D4core8internal4util5array11__moduleRefZ@Base 12 ++ _D4core8internal4util5array12__ModuleInfoZ@Base 12 ++ _D4core8internal4util5array17_enforceNoOverlapFNbNfxAammxmZv@Base 12 ++ _D4core8internal4util5array18_enforceSameLengthFNbNfxAaxmxmZv@Base 12 ++ _D4core8internal4util5array21_enforceNoOverlapNogcFNbNfKxAammxmZv@Base 12 ++ _D4core8internal4util5array22_enforceSameLengthNogcFNbNfKxAaxmxmZv@Base 12 ++ _D4core8internal4util5array27enforceRawArraysConformableFNbNfxAaxmxAvxQdxbZv@Base 12 ++ _D4core8internal4util5array31enforceRawArraysConformableNogcFNbNfxAaxmxAvxQdxbZv@Base 12 ++ _D4core8internal4util5array6_storeG256a@Base 12 ++ _D4core8internal4util5array__T12errorMessageTxmTxmZQvFNbNiNeMxPaxAaxmxmZAa@Base 12 ++ _D4core8internal5abort11__moduleRefZ@Base 12 ++ _D4core8internal5abort12__ModuleInfoZ@Base 12 ++ _D4core8internal5abortQgFNbNiNfMAyaMQemZ8writeStrFNbNiNeMAAxaXv@Base 12 ++ _D4core8internal5abortQgFNbNiNfMAyaMQemZv@Base 12 ++ _D4core8internal5array10comparison11__moduleRefZ@Base 12 ++ _D4core8internal5array10comparison12__ModuleInfoZ@Base 12 ++ _D4core8internal5array10comparison__T5__cmpTaZQjFNaNbNiNeMxAaMxQeZi@Base 12 ++ _D4core8internal5array10comparison__T5__cmpThZQjFNaNbNiNeMxAhMxQeZi@Base 12 ++ _D4core8internal5array10operations10isBinaryOpFNaNbNiNfMAyaZb@Base 12 ++ _D4core8internal5array10operations11__moduleRefZ@Base 12 ++ _D4core8internal5array10operations12__ModuleInfoZ@Base 12 ++ _D4core8internal5array10operations16isBinaryAssignOpFAyaZb@Base 12 ++ _D4core8internal5array10operations8toStringFmZAya@Base 12 ++ _D4core8internal5array10operations9isUnaryOpFNaNbNiNfMAyaZb@Base 12 ++ _D4core8internal5array12construction11__moduleRefZ@Base 12 ++ _D4core8internal5array12construction12__ModuleInfoZ@Base 12 ++ _D4core8internal5array13concatenation11__moduleRefZ@Base 12 ++ _D4core8internal5array13concatenation12__ModuleInfoZ@Base 12 ++ _D4core8internal5array5utils11__moduleRefZ@Base 12 ++ _D4core8internal5array5utils11gcStatsPureFNaNbZSQBu6memory2GC5Stats@Base 12 ++ _D4core8internal5array5utils12__ModuleInfoZ@Base 12 ++ _D4core8internal5array5utils14accumulatePureFNaNbAyaiQeQgmZ12impureBypassFNbNiQBdiQBhQBkmZm@Base 12 ++ _D4core8internal5array5utils14accumulatePureFNaNbAyaiQeQgmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAAyaS_DQCdQCbQBv8capacity__T22_d_arraysetlengthTImplHTQCcTQCfZ18_d_arraysetlengthTFNaNbNeNkMKQDpmZmVQDva79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKzFNaNbNeQKpiQKtNkMKQLbmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAC3std3zip13ArchiveMemberS_DQCyQCwQCq8capacity__T22_d_arraysetlengthTImplHTQCxTQDaZ18_d_arraysetlengthTFNaNbNeNkMKQEkmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLuFNaNbNeQGuiQGyNkMKQLwmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAC3std6socket7AddressS_DQCuQCsQCm8capacity__T22_d_arraysetlengthTImplHTQCtTQCwZ18_d_arraysetlengthTFNaNbNeNkMKQEgmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLqFNaNbNeQGuiQGyNkMKQLsmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTACQBy6thread10threadbase10ThreadBaseS_DQDjQDhQDb8capacity__T22_d_arraysetlengthTImplHTQDiTQDlZ18_d_arraysetlengthTFNaNbNeNkMKQEvmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQMfFNaNbNeQGuiQGyNkMKQMhmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAOaS_DQCcQCaQBu9appending__T19_d_arrayappendTImplHTQBzTOaZ15_d_arrayappendTFNaNbNcNeMNkKQDkMQDoZQDsVAyaa81_43616e6e6f7420617070656e6420746f20617272617920696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLdFNaNbNeQGyiQHcMNkKQLfMQLjZQLn@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAOaS_DQCcQCaQBu9appending__T21_d_arrayappendcTXImplHTQCbTOaZ17_d_arrayappendcTXFNaNbNcNeMNkKQDomZQDtVAyaa81_43616e6e6f7420617070656e6420746f20617272617920696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLeFNaNbNeQGyiQHcMNkKQLgmZQLl@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAOuS_DQCcQCaQBu9appending__T19_d_arrayappendTImplHTQBzTOuZ15_d_arrayappendTFNaNbNcNeMNkKQDkMQDoZQDsVAyaa81_43616e6e6f7420617070656e6420746f20617272617920696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLdFNaNbNeQGyiQHcMNkKQLfMQLjZQLn@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAOuS_DQCcQCaQBu9appending__T21_d_arrayappendcTXImplHTQCbTOuZ17_d_arrayappendcTXFNaNbNcNeMNkKQDomZQDtVAyaa81_43616e6e6f7420617070656e6420746f20617272617920696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLeFNaNbNeQGyiQHcMNkKQLgmZQLl@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAS3std3uni17CodepointIntervalS_DQDcQDaQCu8capacity__T22_d_arraysetlengthTImplHTQDbTQDeZ18_d_arraysetlengthTFNaNbNeNkMKQEomZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLyFNaNbNeQGuiQGyNkMKQMamZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAS3std5regexQCd2ir10NamedGroupS_DQDdQDbQCv8capacity__T22_d_arraysetlengthTImplHTQDcTQDfZ18_d_arraysetlengthTFNaNbNeNkMKQEpmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLzFNaNbNeQGuiQGyNkMKQMbmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAS3std5regexQCd2ir8BytecodeS_DQDaQCyQCs8capacity__T22_d_arraysetlengthTImplHTQCzTQDcZ18_d_arraysetlengthTFNaNbNeNkMKQEmmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLwFNaNbNeQGuiQGyNkMKQLymZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAS3std5regexQCd9kickstart__T7ShiftOrTaZQl11ShiftThreadS_DQEbQDzQDt8capacity__T22_d_arraysetlengthTImplHTQEaTQEdZ18_d_arraysetlengthTFNaNbNeNkMKQFnmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQMxFNaNbNeQGuiQGyNkMKQMzmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAS3std6socket11AddressInfoS_DQCzQCxQCr8capacity__T22_d_arraysetlengthTImplHTQCyTQDbZ18_d_arraysetlengthTFNaNbNeNkMKQElmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQLvFNaNbNeQGuiQGyNkMKQLxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAaS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaTaZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAhS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaThZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAkS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaTkZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAlS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaTlZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAmS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaTmZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAuS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaTuZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAvS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaTvZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAwS_DQCbQBzQBt8capacity__T22_d_arraysetlengthTImplHTQCaTwZ18_d_arraysetlengthTFNaNbNeNkMKQDlmZmVAyaa79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKvFNaNbNeQGuiQGyNkMKQKxmZm@Base 12 ++ _D4core8internal5array5utils__T16_d_HookTraceImplTAyaS_DQCcQCaQBu8capacity__T22_d_arraysetlengthTImplHTQCbTyaZ18_d_arraysetlengthTFNaNbNeNkMKQDnmZmVQDua79_43616e6e6f7420726573697a652061727261797320696620636f6d70696c696e6720776974686f757420737570706f727420666f722072756e74696d65207479706520696e666f726d6174696f6e21ZQKxFNaNbNeQKoiQKsNkMKQKzmZm@Base 12 ++ _D4core8internal5array7casting11__moduleRefZ@Base 12 ++ _D4core8internal5array7casting12__ModuleInfoZ@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastThTuZQsFNaNbNiNeNkMAhZAu@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastThTuZQsFNaNiNeNkMAhZ5Array6__initZ@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastThTwZQsFNaNbNiNeNkMAhZAw@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastThTwZQsFNaNiNeNkMAhZ5Array6__initZ@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastTvTS3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe4NodeZQHqFNaNbNiNeNkMAvZAQHt@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastTvTS3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe4NodeZQHqFNaNiNeNkMAvZ5Array6__initZ@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastTvTmZQsFNaNbNiNeNkMAvZAm@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastTvTmZQsFNaNiNeNkMAvZ5Array6__initZ@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastTxhTxuZQuFNaNbNiNeNkMAxhZAxu@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastTxhTxuZQuFNaNiNeNkMAxhZ5Array6__initZ@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastTxhTxwZQuFNaNbNiNeNkMAxhZAxw@Base 12 ++ _D4core8internal5array7casting__T11__ArrayCastTxhTxwZQuFNaNiNeNkMAxhZ5Array6__initZ@Base 12 ++ _D4core8internal5array7casting__T16onArrayCastErrorZQtFNaNbNiNeAyammQfmZv@Base 12 ++ _D4core8internal5array8capacity11__moduleRefZ@Base 12 ++ _D4core8internal5array8capacity12__ModuleInfoZ@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAAyaTQeZ18_d_arraysetlengthTFNaNbNeNkMKQBnmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAC3std3zip13ArchiveMemberTQzZ18_d_arraysetlengthTFNaNbNeNkMKQCimZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAC3std6socket7AddressTQvZ18_d_arraysetlengthTFNaNbNeNkMKQCemZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTACQCi6thread10threadbase10ThreadBaseTQBkZ18_d_arraysetlengthTFNaNbNeNkMKQCumZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAS3std3uni17CodepointIntervalTQBdZ18_d_arraysetlengthTFNaNbNeNkMKQCnmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAS3std5regexQCn2ir10NamedGroupTQBeZ18_d_arraysetlengthTFNaNbNeNkMKQComZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAS3std5regexQCn2ir8BytecodeTQBbZ18_d_arraysetlengthTFNaNbNeNkMKQClmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAS3std5regexQCn9kickstart__T7ShiftOrTaZQl11ShiftThreadTQCcZ18_d_arraysetlengthTFNaNbNeNkMKQDmmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAS3std6socket11AddressInfoTQBaZ18_d_arraysetlengthTFNaNbNeNkMKQCkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAaTaZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAhThZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAkTkZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAlTlZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAmTmZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAuTuZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAvTvZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAwTwZ18_d_arraysetlengthTFNaNbNeNkMKQBkmZm@Base 12 ++ _D4core8internal5array8capacity__T22_d_arraysetlengthTImplHTAyaTyaZ18_d_arraysetlengthTFNaNbNeNkMKQBmmZm@Base 12 ++ _D4core8internal5array8equality11__moduleRefZ@Base 12 ++ _D4core8internal5array8equality12__ModuleInfoZ@Base 12 ++ _D4core8internal5array8equality__T8__equalsTE3std3uni__T16UnicodeSetParserTSQBf5regexQDa6parser__T6ParserTAyaTSQCoQBjQEgQBg7CodeGenZQBiZQDc8OperatorTQEbZQEpFNaNbNiNeMxAEQEuQEt__TQEsTQEdZQFaQByMxQBbZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTPxvTQeZQrFNaNbNiNeMxAPvMxQfZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTPyS6object10ModuleInfoTQxZQBkFNaNbNiNeMxAPyQBpMxQiZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTS3std5regexQBw2ir__T5GroupTmZQjTQBgZQBuFNaNbNiNfMAQByMQfZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTaTaZQoFNaNbNiNeMxAaMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTdTdZQoFNaNbNiNeMxAdMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTeTeZQoFNaNbNiNeMxAeMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTfTfZQoFNaNbNiNeMxAfMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsThThZQoFNaNbNiNeMxAhMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTiTiZQoFNaNbNiNeMxAiMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTkTkZQoFNaNbNiNeMxAkMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTmTmZQoFNaNbNiNeMxAmMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTtTtZQoFNaNbNiNeMxAtMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTuTuZQoFNaNbNiNeMxAuMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTwTwZQoFNaNbNiNeMxAwMxQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxAS3std3uni17CodepointIntervalTxQBfZQBuFNaNbNiNfMAxQByMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxAyaTxQfZQtFNaNbNiNfMAxQwMQfZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxC3std3zip13ArchiveMemberTxQBaZQBpFMAxQBlMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxDFNbC6ObjectZvTxQqZQBeFNaNbNiNfMAxQBiMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxE2rt4util7utility16__c_complex_realTxQBlZQCaFNaNbNiNfMAxQCeMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxE2rt4util7utility17__c_complex_floatTxQBmZQCbFNaNbNiNfMAxQCfMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxE2rt4util7utility18__c_complex_doubleTxQBnZQCcFNaNbNiNfMAxQCgMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS2rt3aaA6BucketTxQrZQBfFNaNbNiNfMAxQBjMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std12experimental9allocator15building_blocks14allocator_list__T13AllocatorListTSQDdQDcQCr8showcase14mmapRegionListFmZ7FactoryTSQEyQExQEmQEf14null_allocator13NullAllocatorZQEe4NodeTxQHbZQHqFNaNbNiNfMAxQHuMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std3uni17CodepointIntervalTxQBeZQBtFNaNbNiNfMAxQBxMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std3uni__T13InversionListTSQBcQBb8GcPolicyZQBhTxQByZQCnFNaNbNiNfMAxQCrMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std4file15DirIteratorImpl9DirHandleTxQBnZQCcFNaNbNiNfMAxQCgMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std4file8DirEntryTxQvZQBjFNaNbNiNfMAxQBnMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std4json9JSONValueTxQwZQBkFNaNbNiNfMAxQBoMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std5regexQBx2ir10NamedGroupTxQBfZQBuFNaNbNiNfMAxQByMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std5regexQBx2ir11CharMatcherTxQBgZQBvFNaNbNiNfMAxQBzMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std5regexQBx2ir8BitTableTxQBcZQBrFNaNbNiNfMAxQBvMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std5regexQBx2ir8BytecodeTxQBcZQBrFNaNbNiNfMAxQBvMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std5regexQBx2ir__T5GroupTmZQjTxQBhZQBwFNaNbNiNfMAxQCaMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std6getopt6OptionTxQvZQBjFNaNbNiNfMAxQBnMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std6socket11AddressInfoTxQBbZQBqFMAxQBmMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std8datetime8timezone13PosixTimeZone10LeapSecondTxQCaZQCpFNaNbNiNfMAxQCtMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std8datetime8timezone13PosixTimeZone10TransitionTxQCaZQCpFNaNbNiNfMAxQCtMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std8datetime8timezone13PosixTimeZone14TempTransitionTxQCeZQCtFNaNbNiNfMAxQCxMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxS3std8typecons__T5TupleTkTkTkZQnTxQBiZQBxFNaNbNiNfMAxQCbMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxSQBs8demangle15reencodeMangledFNaNbNfNkMAxaZ12PrependHooks11ReplacementTxQCvZQDkFNaNbNiNfMAxQDoMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTxvTxvZQqFNaNbNiNfMAxvMQeZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTyS3stdQBr14unicode_tables15UnicodePropertyTyQBrZQCgFNaNbNiNfMAyQCkMQgZb@Base 12 ++ _D4core8internal5array8equality__T8__equalsTyS3stdQBr14unicode_tables9CompEntryTyQBkZQBzFNaNbNiNfMAyQCdMQgZb@Base 12 ++ _D4core8internal5array9appending11__moduleRefZ@Base 12 ++ _D4core8internal5array9appending12__ModuleInfoZ@Base 12 ++ _D4core8internal5array9appending__T19_d_arrayappendTImplHTAOaTOaZ15_d_arrayappendTFNaNbNcNeMNkKQBlMQBpZQBt@Base 12 ++ _D4core8internal5array9appending__T19_d_arrayappendTImplHTAOuTOuZ15_d_arrayappendTFNaNbNcNeMNkKQBlMQBpZQBt@Base 12 ++ _D4core8internal5array9appending__T21_d_arrayappendcTXImplHTAOaTOaZ17_d_arrayappendcTXFNaNbNcNeMNkKQBnmZQBs@Base 12 ++ _D4core8internal5array9appending__T21_d_arrayappendcTXImplHTAOuTOuZ17_d_arrayappendcTXFNaNbNcNeMNkKQBnmZQBs@Base 12 ++ _D4core8internal5qsort11__moduleRefZ@Base 12 ++ _D4core8internal5qsort12__ModuleInfoZ@Base 12 ++ _D4core8internal5qsort7_adSortUNkMAvC8TypeInfoZ3cmpUMxPvMxQeMPvZi@Base 12 ++ _D4core8internal6atomic11__moduleRefZ@Base 12 ++ _D4core8internal6atomic12__ModuleInfoZ@Base 12 ++ _D4core8internal6atomic12simpleFormatFAyaMAQfZQi@Base 12 ++ _D4core8internal6atomic5pauseFNaNbNiNeZv@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi0TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNePNgPONgSQCcQCcQBvZNgQr@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi0TbZQBmFNaNbNiNePNgbZNgb@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi0TmZQBmFNaNbNiNePNgmZNgm@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi2TE3std12experimental6loggerQDi8LogLevelZQCxFNaNbNiNePNgEQCcQCbQBqQEuQBmZNgQt@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi2TOC3std12experimental6loggerQDj6LoggerZQCwFNaNbNiNePONgCQCbQCaQBpQEuQBlZONgQu@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi2TOCQCk4sync5mutex5MutexZQChFNaNbNiNePONgCQDwQBmQBkQBhZONgQr@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi2TPOS2rt8monitor_7MonitorZQCiFNaNbNiNePNgPONgSQBpQBpQBjZNgQr@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi2TPOS2rt9critical_18D_CRITICAL_SECTIONZQCvFNaNbNiNePNgPONgSQCcQCcQBvZNgQr@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi2TbZQBmFNaNbNiNePNgbZNgb@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi2TkZQBmFNaNbNiNePNgkZNgk@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi5TE3std11parallelism8TaskPool9PoolStateZQCwFNaNbNiNePNgEQCbQCaQBqQBkZNgQq@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi5TbZQBmFNaNbNiNePNgbZNgb@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi5ThZQBmFNaNbNiNePNghZNgh@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi5TiZQBmFNaNbNiNePNgiZNgi@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi5TkZQBmFNaNbNiNePNgkZNgk@Base 12 ++ _D4core8internal6atomic__T10atomicLoadVEQBmQBb11MemoryOrderi5TmZQBmFNaNbNiNePNgmZNgm@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi0TbZQBnFNaNbNiNePbbZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi0TmZQBnFNaNbNiNePmmZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi3TC3std12experimental6loggerQDj6LoggerZQCwFNaNbNiNePQByQCbZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi3TE3std12experimental6loggerQDj8LogLevelZQCyFNaNbNiNePQCaQCdZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi3TPOS2rt8monitor_7MonitorZQCjFNaNbNiNePQBlQBoZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi3TPOS2rt9critical_18D_CRITICAL_SECTIONZQCwFNaNbNiNePQByQCbZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi3TbZQBnFNaNbNiNePbbZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi3TmZQBnFNaNbNiNePmmZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi5TE3std11parallelism8TaskPool9PoolStateZQCxFNaNbNiNePQBzQCcZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi5ThZQBnFNaNbNiNePhhZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi5TkZQBnFNaNbNiNePkkZv@Base 12 ++ _D4core8internal6atomic__T11atomicStoreVEQBnQBc11MemoryOrderi5TmZQBnFNaNbNiNePmmZv@Base 12 ++ _D4core8internal6atomic__T14atomicFetchAddVEQBqQBf11MemoryOrderi5Vbi1TkZQBuFNaNbNiNePkkZk@Base 12 ++ _D4core8internal6atomic__T14atomicFetchAddVEQBqQBf11MemoryOrderi5Vbi1TmZQBuFNaNbNiNePmmZm@Base 12 ++ _D4core8internal6atomic__T14atomicFetchSubVEQBqQBf11MemoryOrderi5Vbi1TkZQBuFNaNbNiNePkkZk@Base 12 ++ _D4core8internal6atomic__T14atomicFetchSubVEQBqQBf11MemoryOrderi5Vbi1TmZQBuFNaNbNiNePmmZm@Base 12 ++ _D4core8internal6atomic__T25atomicCompareExchangeImplVEQCbQBq11MemoryOrderi5VQxi5Vbi0TCQDh4sync5mutex5MutexZQDeFNaNbNiNePQBjQeQBoZb@Base 12 ++ _D4core8internal6atomic__T25atomicCompareExchangeImplVEQCbQBq11MemoryOrderi5VQxi5Vbi0TE3std11parallelism8TaskPool9PoolStateZQDuFNaNbNiNePQBzQeQCeZb@Base 12 ++ _D4core8internal6atomic__T25atomicCompareExchangeImplVEQCbQBq11MemoryOrderi5VQxi5Vbi0TbZQCkFNaNbNiNePbQcbZb@Base 12 ++ _D4core8internal6atomic__T25atomicCompareExchangeImplVEQCbQBq11MemoryOrderi5VQxi5Vbi0ThZQCkFNaNbNiNePhQchZb@Base 12 ++ _D4core8internal6atomic__T25atomicCompareExchangeImplVEQCbQBq11MemoryOrderi5VQxi5Vbi0TmZQCkFNaNbNiNePmQcmZb@Base 12 ++ _D4core8internal6atomic__T25atomicCompareExchangeImplVEQCbQBq11MemoryOrderi5VQxi5Vbi0TtZQCkFNaNbNiNePtQctZb@Base 12 ++ _D4core8internal6atomic__T35atomicCompareExchangeStrongNoResultVEQClQCa11MemoryOrderi5VQxi5TCQDn4sync5mutex5MutexZQDkFNaNbNiNePQBjxCQFaQBnQBlQBiQCaZb@Base 12 ++ _D4core8internal6atomic__T35atomicCompareExchangeStrongNoResultVEQClQCa11MemoryOrderi5VQxi5TE3std11parallelism8TaskPool9PoolStateZQEaFNaNbNiNePQBzxEQCdQCcQBsQBmQCqZb@Base 12 ++ _D4core8internal6atomic__T35atomicCompareExchangeStrongNoResultVEQClQCa11MemoryOrderi5VQxi5TbZQCqFNaNbNiNePbxbbZb@Base 12 ++ _D4core8internal6atomic__T35atomicCompareExchangeStrongNoResultVEQClQCa11MemoryOrderi5VQxi5ThZQCqFNaNbNiNePhxhhZb@Base 12 ++ _D4core8internal6atomic__T35atomicCompareExchangeStrongNoResultVEQClQCa11MemoryOrderi5VQxi5TmZQCqFNaNbNiNePmxmmZb@Base 12 ++ _D4core8internal6atomic__T35atomicCompareExchangeStrongNoResultVEQClQCa11MemoryOrderi5VQxi5TtZQCqFNaNbNiNePtxttZb@Base 12 ++ _D4core8internal6moving11__moduleRefZ@Base 12 ++ _D4core8internal6moving12__ModuleInfoZ@Base 12 ++ _D4core8internal6string11__moduleRefZ@Base 12 ++ _D4core8internal6string12__ModuleInfoZ@Base 12 ++ _D4core8internal6string__T17TempStringNoAllocVhi20ZQz3getMNgFNaNbNiNjNfZANga@Base 12 ++ _D4core8internal6string__T17TempStringNoAllocVhi20ZQz6__initZ@Base 12 ++ _D4core8internal6string__T18signedToTempStringVki10ZQBaFNaNbNiNflZSQCnQClQCf__T17TempStringNoAllocVhi20ZQz@Base 12 ++ _D4core8internal6string__T20unsignedToTempStringVii10ZQBcFNaNbNiNfmNkMAaZQd@Base 12 ++ _D4core8internal6string__T20unsignedToTempStringVii16ZQBcFNaNbNiNfmNkMAaZQd@Base 12 ++ _D4core8internal6string__T20unsignedToTempStringVki10ZQBcFNaNbNiNfmNkMAaZQd@Base 12 ++ _D4core8internal6string__T20unsignedToTempStringVki10ZQBcFNaNbNiNfmZSQCpQCnQCh__T17TempStringNoAllocVhi20ZQz@Base 12 ++ _D4core8internal6string__T7dstrcmpZQjFNaNbNiNeMxAaMxQeZi@Base 12 ++ _D4core8internal6string__T9numDigitsVki10ZQqFNaNbNiNfmZi@Base 12 ++ _D4core8internal6traits11__moduleRefZ@Base 12 ++ _D4core8internal6traits12__ModuleInfoZ@Base 12 ++ _D4core8internal6traits23__InoutWorkaroundStruct6__initZ@Base 12 ++ _D4core8internal7convert10ctfe_allocFNaNbNiNemZ5allocFNaNbNfmZAh@Base 12 ++ _D4core8internal7convert10ctfe_allocFNaNbNiNemZAh@Base 12 ++ _D4core8internal7convert11__moduleRefZ@Base 12 ++ _D4core8internal7convert11shiftrRoundFNaNbNiNfmZm@Base 12 ++ _D4core8internal7convert12__ModuleInfoZ@Base 12 ++ _D4core8internal7convert5Float6__initZ@Base 12 ++ _D4core8internal7convert7binPow2FNaNbNiNfiZ10binPosPow2FNaNbNiNfiZe@Base 12 ++ _D4core8internal7convert7binPow2FNaNbNiNfiZe@Base 12 ++ _D4core8internal7convert__T20denormalizedMantissaTeZQzFNaNbNiNfekZSQCnQClQCf5Float@Base 12 ++ _D4core8internal7convert__T5parseVbi0HTeZQoFNaNbNiNfeZSQCbQBzQBt5Float@Base 12 ++ _D4core8internal7convert__T5parseVbi0HTxeZQpFNaNbNiNfxeZSQCdQCbQBv5Float@Base 12 ++ _D4core8internal7convert__T7binLog2TeZQlFNaNbNiNfxeZk@Base 12 ++ _D4core8internal7convert__T7toUbyteTPxvZQnFNaNbNiNeNkMxAPvZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTPyS6object10ModuleInfoZQBgFNaNbNiNeNkMxAPyQBoZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTS3std4conv__T7toCharsVii10TaVEQBd5ascii10LetterCasei1TiZQBrFNaNbNiNfiZ6ResultZQDjFNaNbNiNeNkKxSQDqQDp__TQDnVii10TaVQDii1TiZQEgFNaNbNiNfiZQCpZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTS3std5range__T10OnlyResultTaZQpZQBpFNaNbNiNeNkKxSQBwQBv__TQBsTaZQByZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTS3std5range__T4TakeTSQuQs__T6RepeatTaZQkZQBbZQCcFNaNbNiNeNkKxSQCjQCi__TQCfTQCdZQCnZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTS3std5range__T4iotaTmTmZQkFmmZ6ResultZQBvFNaNbNiNeNkKxSQCcQCb__TQByTmTmZQCgFmmZQBxZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTS3std5range__T4iotaTmTxmZQlFmxmZ6ResultZQBxFNaNbNiNeNkKxSQCeQCd__TQCaTmTxmZQCjFmxmZQBzZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTS3std5range__T6RepeatTaZQkZQBkFNaNbNiNeNkKxSQBrQBq__TQBnTaZQBtZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTS3std5regexQBo2ir__T5GroupTmZQjZQBpFNaNbNiNeNkKxSQBwQBvQDgQBs__TQBsTmZQByZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTS3std5regexQBo2ir__T5GroupTmZQjZQBpFNaNbNiNeNkMxASQBxQBwQDhQBt__TQBtTmZQBzZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTS3std8bitmanip__T7BitsSetTmZQlZQBoFNaNbNiNeNkKxSQBvQBu__TQBoTmZQBuZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTaZQlFNaNbNiNeKxaZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTaZQlFNaNbNiNeNkMxAaZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTbZQlFNaNbNiNeKxbZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTeZQlFNaNbNiNeKxeZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteThZQlFNaNbNiNeNkMxAhZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTkZQlFNaNbNiNeKxkZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTkZQlFNaNbNiNeNkMxAkZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTmZQlFNaNbNiNeKxmZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTmZQlFNaNbNiNeNkMxAmZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTtZQlFNaNbNiNeKxtZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTtZQlFNaNbNiNeNkMxAtZAxh@Base 12 ++ _D4core8internal7convert__T7toUbyteTvZQlFNaNbNiNeNkMxAvZAxh@Base 12 ++ _D4core8internal7dassert11__moduleRefZ@Base 12 ++ _D4core8internal7dassert12__ModuleInfoZ@Base 12 ++ _D4core8internal7dassert15invertCompTokenFNaNbNiNfMAyaZQe@Base 12 ++ _D4core8internal7dassert16calcFieldOverlapFMxAmZAb@Base 12 ++ _D4core8internal7dassert7combineFNaNbNiNfMxAAyaMxQfMxQkZ11formatTupleFNaNbNiNfMAaKmIQBpIbZv@Base 12 ++ _D4core8internal7dassert7combineFNaNbNiNfMxAAyaMxQfMxQkZAya@Base 12 ++ _D4core8internal7dassert9pureAllocFNaNbNiNfmZAh@Base 12 ++ _D4core8internal7dassert9pureAllocFmZ5allocFNaNbNfmZAh@Base 12 ++ _D4core8internal7dassert__T20assumeFakeAttributesTPFNaNbNfmZAhZQBkFNaNbNiNeQzZPFNaNbNiNfmZQBe@Base 12 ++ _D4core8internal7switch_11__moduleRefZ@Base 12 ++ _D4core8internal7switch_12__ModuleInfoZ@Base 12 ++ _D4core8internal7switch___T14__switchSearchTyaZQuFNaNbNiNfMxAAyaMxQfZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia5_61626f7274VxQza5_7072696e74VxQBqa6_69676e6f7265VxQCka9_646570726563617465ZQDxFNaNbNiNfMxQDxZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia5_61626f7274ZQBmFNaNbNiNfMxQBmZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia7_70726563697365VxQBda12_636f6e736572766174697665ZQCxFNaNbNiNfMxQCxZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia8_72756e2d6d61696eVxQBfa9_746573742d6f6e6c79VxQCfa12_746573742d6f722d6d61696eZQDzFNaNbNiNfMxQDzZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_VxQia8_72756e2d6d61696eZQBsFNaNbNiNfMxQBsZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa0_ZQvFNaNbNiNfMxQuZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa12_636f6e736572766174697665ZQBuFNaNbNiNfMxQBuZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa12_746573742d6f722d6d61696eZQBuFNaNbNiNfMxQBuZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa18_5275737369612054696d65205a6f6e652033VxQBta19_5275737369612054696d65205a6f6e65203130VxQDoa19_5275737369612054696d65205a6f6e65203131VxQFja21_42656c61727573205374616e646172642054696d65ZQHvFNaNbNiNfMxQHvZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa18_5275737369612054696d65205a6f6e652033VxQBta19_5275737369612054696d65205a6f6e65203130ZQEbFNaNbNiNfMxQEbZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa18_5275737369612054696d65205a6f6e652033ZQCgFNaNbNiNfMxQCgZi@Base 12 ++ _D4core8internal7switch___T8__switchTyaVxAyaa1_3cVxQka1_3eVxQta2_213dVxQBea2_3c3dVxQBqa2_3d3dVxQCca2_3e3dVxQCoa2_696eVxQDaa2_6973VxQDma3_21696eVxQEaa3_216973ZQFbFNaNbNiNfMxQFbZ5casesyG10Aa@Base 12 ++ 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_D4core8internal8lifetime__T18emplaceInitializerTS3std4file15DirIteratorImplZQBxFNaNbNiNeMKQBqZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTS3std5stdio4FileZQBmFNaNbNiNeMKQBfZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBw2gc11gcinterface4RootZQBvFNaNbNiNeMKQBoZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBw2gc11gcinterface5RangeZQBwFNaNbNiNeMKQBpZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBwQBu9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQDoFNaNbNiNeMKQDhZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBwQBu9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQDqFNaNbNiNeMKQDjZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBwQBu9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQDoFNaNbNiNeMKQDhZv@Base 12 ++ _D4core8internal8lifetime__T18emplaceInitializerTSQBwQBuQBo__T10emplaceRefTAyaTQeTQhZQxFKQoKQrZ1SZQCsFNaNbNiNeMKQClZv@Base 12 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_D4core8internal8spinlock15AlignedSpinLock6__ctorMOFNbNcNiNeEQChQCfQBz8SpinLock10ContentionZOSQDoQDmQDgQDa@Base 12 ++ _D4core8internal8spinlock15AlignedSpinLock6__initZ@Base 12 ++ _D4core8internal8spinlock8SpinLock4lockMOFNbNiNeZv@Base 12 ++ _D4core8internal8spinlock8SpinLock5yieldMOFNbNiNemZv@Base 12 ++ _D4core8internal8spinlock8SpinLock6__ctorMOFNbNcNiNeEQBzQBxQBrQBl10ContentionZOSQDaQCyQCsQCm@Base 12 ++ _D4core8internal8spinlock8SpinLock6__initZ@Base 12 ++ _D4core8internal8spinlock8SpinLock6unlockMOFNbNiNeZv@Base 12 ++ _D4core8internal9container5array11__moduleRefZ@Base 12 ++ _D4core8internal9container5array12__ModuleInfoZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk4backMNgFNaNbNcNdNiZNgAv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk4swapMFNaNbNiNfKSQCkQCiQCcQBv__TQBsTQBpZQCaZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk5frontMNgFNaNbNcNdNiNfZNgAv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk7opIndexMNgFNaNbNcNimZNgAv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk7opSliceMNgFNaNbNiZANgAv@Base 12 ++ _D4core8internal9container5array__T5ArrayTAvZQk7opSliceMNgFNaNbNimmZANgAv@Base 12 ++ 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_D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf7opSliceMNgFNaNbNimmZANgPSQBzQByQBsQBr@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf8opAssignMFNbNcNiNjSQDjQDhQDbQCu__TQCrTQCoZQCzZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTPS3gcc8sections3elf3DSOZQBf__T10insertBackZQnMFNbNiKQCaZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu4backMNgFNaNbNcNdNiZNgPSQFcQFaQEuQDm__TQDhTQDcTQDcZQDtQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu4swapMFNaNbNiNfKSQEvQEtQEnQEg__TQEdTQEaZQElZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu5frontMNgFNaNbNcNdNiNfZNgPSQFfQFdQExQDp__TQDkTQDfTQDfZQDwQCo@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu7opIndexMNgFNaNbNcNimZNgPSQFeQFcQEwQDo__TQDjTQDeTQDeZQDvQCn@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu7opSliceMNgFNaNbNiZANgPSQFcQFaQEuQDm__TQDhTQDcTQDcZQDtQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu7opSliceMNgFNaNbNimmZANgPSQFeQFcQEwQDo__TQDjTQDeTQDeZQDvQCn@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCu8opAssignMFNbNcNiNjSQEyQEwQEqQEj__TQEgTQEdZQEoZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw4backMNgFNaNbNcNdNiZNgPSQFeQFcQEwQDo__TQDjTQDeTQDfZQDvQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw4swapMFNaNbNiNfKSQExQEvQEpQEi__TQEfTQEcZQEnZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw5frontMNgFNaNbNcNdNiNfZNgPSQFhQFfQEzQDr__TQDmTQDhTQDiZQDyQCo@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw7opIndexMNgFNaNbNcNimZNgPSQFgQFeQEyQDq__TQDlTQDgTQDhZQDxQCn@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw7opSliceMNgFNaNbNiZANgPSQFeQFcQEwQDo__TQDjTQDeTQDfZQDvQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw7opSliceMNgFNaNbNimmZANgPSQFgQFeQEyQDq__TQDlTQDgTQDhZQDxQCn@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCw8opAssignMFNbNcNiNjSQFaQEyQEsQEl__TQEiTQEfZQEqZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu4backMNgFNaNbNcNdNiZNgPSQFcQFaQEuQDm__TQDhTQDcTiZQDrQCj@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu4swapMFNaNbNiNfKSQEvQEtQEnQEg__TQEdTQEaZQElZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu5frontMNgFNaNbNcNdNiNfZNgPSQFfQFdQExQDp__TQDkTQDfTiZQDuQCm@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu7opIndexMNgFNaNbNcNimZNgPSQFeQFcQEwQDo__TQDjTQDeTiZQDtQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu7opSliceMNgFNaNbNiZANgPSQFcQFaQEuQDm__TQDhTQDcTiZQDrQCj@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu7opSliceMNgFNaNbNimmZANgPSQFeQFcQEwQDo__TQDjTQDeTiZQDtQCl@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTPSQBqQBoQBi7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCu8opAssignMFNbNcNiNjSQEyQEwQEqQEj__TQEgTQEdZQEoZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk4backMNgFNaNbNcNdNiZNgSQCcQCbQBvQBu@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk4swapMFNaNbNiNfKSQDlQDjQDdQCw__TQCtTQCqZQDbZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk5frontMNgFNaNbNcNdNiNfZNgSQCfQCeQByQBx@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk7opIndexMNgFNaNbNcNimZNgSQCeQCdQBxQBw@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk7opSliceMNgFNaNbNiZANgSQCcQCbQBvQBu@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk7opSliceMNgFNaNbNimmZANgSQCeQCdQBxQBw@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk8opAssignMFNbNcNiNjSQDoQDmQDgQCz__TQCwTQCtZQDeZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTS3gcc8sections3elf9ThreadDSOZQBk__T10insertBackZQnMFNbNiQCeZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh4backMNgFNaNbNcNdNiZNgSQDoQBzQBzQBp@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh4swapMFNaNbNiNfKSQDiQDgQDaQCt__TQCqTQCnZQCyZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh5frontMNgFNaNbNcNdNiNfZNgSQDrQCcQCcQBs@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh7opIndexMNgFNaNbNcNimZNgSQDqQCbQCbQBr@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh7opSliceMNgFNaNbNiZANgSQDoQBzQBzQBp@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh7opSliceMNgFNaNbNimmZANgSQDqQCbQCbQBr@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh8opAssignMFNbNcNiNjSQDlQDjQDdQCw__TQCtTQCqZQDbZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface4RootZQBh__T10insertBackZQnMFNbNiQCbZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi11__invariantMxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi12__invariant0MxFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi4backMNgFNaNbNcNdNiZNgSQDpQCaQCaQBq@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi4swapMFNaNbNiNfKSQDjQDhQDbQCu__TQCrTQCoZQCzZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi5frontMNgFNaNbNcNdNiNfZNgSQDsQCdQCdQBt@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi5resetMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6__initZ@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6lengthMFNbNdNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi6removeMFNbNimZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi7opIndexMNgFNaNbNcNimZNgSQDrQCcQCcQBs@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi7opSliceMNgFNaNbNiZANgSQDpQCaQCaQBq@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi7opSliceMNgFNaNbNimmZANgSQDrQCcQCcQBs@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi7popBackMFNbNiZv@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi8opAssignMFNbNcNiNjSQDmQDkQDeQCx__TQCuTQCrZQDcZQBc@Base 12 ++ _D4core8internal9container5array__T5ArrayTSQBp2gc11gcinterface5RangeZQBi__T10insertBackZQnMFNbNiQCcZv@Base 12 ++ _D4core8internal9container5treap11__moduleRefZ@Base 12 ++ _D4core8internal9container5treap12__ModuleInfoZ@Base 12 ++ _D4core8internal9container5treap4Rand5frontMFNaNbNdNiNfZk@Base 12 ++ _D4core8internal9container5treap4Rand6__initZ@Base 12 ++ _D4core8internal9container5treap4Rand6opCallMFNaNbNiNfZk@Base 12 ++ _D4core8internal9container5treap4Rand8popFrontMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh10initializeMFNaNbNiNfmZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh13opApplyHelperFNbxPSQDmQDkQDeQCx__TQCuTQCrZQDc4NodeMDFNbKxSQEzQDkQDkQDaZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh4Node6__initZ@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6__initZ@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6insertMFNbNiPSQDgQDeQCyQCr__TQCoTQClZQCw4NodeQCxZQBl@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6insertMFNbNiQBqZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6removeFNbNiPPSQDgQDeQCyQCr__TQCoTQClZQCw4NodeQCxZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh6removeMFNbNiQBqZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh7opApplyMFNbMDFNbKQBvZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh7opApplyMxFNbMDFNbKxSQDmQBxQBxQBnZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh7rotateLFNaNbNiNfPSQDkQDiQDcQCv__TQCsTQCpZQDa4NodeZQBi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh7rotateRFNaNbNiNfPSQDkQDiQDcQCv__TQCsTQCpZQDa4NodeZQBi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh8freeNodeFNbNiPSQDhQDfQCzQCs__TQCpTQCmZQCx4NodeZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh8opAssignMFNbNcNiNjSQDlQDjQDdQCw__TQCtTQCqZQDbZQBc@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh9allocNodeMFNbNiQBtZPSQDnQDlQDfQCy__TQCvTQCsZQDd4Node@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh9removeAllFNbNiPSQDiQDgQDaQCt__TQCqTQCnZQCy4NodeZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface4RootZQBh9removeAllMFNbNiZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi10initializeMFNaNbNiNfmZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi13opApplyHelperFNbxPSQDnQDlQDfQCy__TQCvTQCsZQDd4NodeMDFNbKxSQFaQDlQDlQDbZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node11__xopEqualsMxFKxSQDqQDoQDiQDb__TQCyTQCvZQDgQByZb@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node6__initZ@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi4Node9__xtoHashFNbNeKxSQDpQDnQDhQDa__TQCxTQCuZQDfQBxZm@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6__initZ@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6insertMFNbNiPSQDhQDfQCzQCs__TQCpTQCmZQCx4NodeQCyZQBl@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6insertMFNbNiQBrZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6removeFNbNiPPSQDhQDfQCzQCs__TQCpTQCmZQCx4NodeQCyZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi6removeMFNbNiQBrZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi7opApplyMFNbMDFNbKQBwZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi7opApplyMxFNbMDFNbKxSQDnQByQByQBoZiZi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi7rotateLFNaNbNiNfPSQDlQDjQDdQCw__TQCtTQCqZQDb4NodeZQBi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi7rotateRFNaNbNiNfPSQDlQDjQDdQCw__TQCtTQCqZQDb4NodeZQBi@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi8freeNodeFNbNiPSQDiQDgQDaQCt__TQCqTQCnZQCy4NodeZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi8opAssignMFNbNcNiNjSQDmQDkQDeQCx__TQCuTQCrZQDcZQBc@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi9allocNodeMFNbNiQBuZPSQDoQDmQDgQCz__TQCwTQCtZQDe4Node@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi9removeAllFNbNiPSQDjQDhQDbQCu__TQCrTQCoZQCz4NodeZv@Base 12 ++ _D4core8internal9container5treap__T5TreapTSQBp2gc11gcinterface5RangeZQBi9removeAllMFNbNiZv@Base 12 ++ _D4core8internal9container6common11__moduleRefZ@Base 12 ++ _D4core8internal9container6common12__ModuleInfoZ@Base 12 ++ _D4core8internal9container6common7xmallocFNbNimZPv@Base 12 ++ _D4core8internal9container6common8xreallocFNbNiPvmZQe@Base 12 ++ _D4core8internal9container6common__T10initializeTAvZQqFNaNbNiNfKQpZv@Base 12 ++ _D4core8internal9container6common__T10initializeTPS3gcc8sections3elf3DSOZQBlFNaNbNiNfKQBlZv@Base 12 ++ _D4core8internal9container6common__T10initializeTPSQBxQBvQBp7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQDaFNaNbNiNfKQDaZv@Base 12 ++ _D4core8internal9container6common__T10initializeTPSQBxQBvQBp7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQDcFNaNbNiNfKQDcZv@Base 12 ++ _D4core8internal9container6common__T10initializeTPSQBxQBvQBp7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQDaFNaNbNiNfKQDaZv@Base 12 ++ _D4core8internal9container6common__T10initializeTS3gcc8sections3elf9ThreadDSOZQBqFNaNbNiNfKQBqZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBw2gc11gcinterface4RootZQBnFNaNbNiNfKQBnZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBw2gc11gcinterface5RangeZQBoFNaNbNiNfKQBoZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBwQBuQBo7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCzFNaNbNiNfKQCzZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBwQBuQBo7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQDbFNaNbNiNfKQDbZv@Base 12 ++ _D4core8internal9container6common__T10initializeTSQBwQBuQBo7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCzFNaNbNiNfKQCzZv@Base 12 ++ _D4core8internal9container6common__T7destroyTAvZQmFNaNbNiNfKQpZv@Base 12 ++ _D4core8internal9container6common__T7destroyTPS3gcc8sections3elf3DSOZQBhFNaNbNiNfKQBlZv@Base 12 ++ _D4core8internal9container6common__T7destroyTPSQBtQBrQBl7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCwFNaNbNiNfKQDaZv@Base 12 ++ _D4core8internal9container6common__T7destroyTPSQBtQBrQBl7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCyFNaNbNiNfKQDcZv@Base 12 ++ _D4core8internal9container6common__T7destroyTPSQBtQBrQBl7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCwFNaNbNiNfKQDaZv@Base 12 ++ _D4core8internal9container6common__T7destroyTS3gcc8sections3elf9ThreadDSOZQBmFNaNbNiNfKQBqZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBs2gc11gcinterface4RootZQBjFNaNbNiNfKQBnZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBs2gc11gcinterface5RangeZQBkFNaNbNiNfKQBoZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBsQBqQBk7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4NodeZQCvFNaNbNiNfKQCzZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBsQBqQBk7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4NodeZQCxFNaNbNiNfKQDbZv@Base 12 ++ _D4core8internal9container6common__T7destroyTSQBsQBqQBk7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4NodeZQCvFNaNbNiNfKQCzZv@Base 12 ++ _D4core8internal9container7hashtab11__moduleRefZ@Base 12 ++ _D4core8internal9container7hashtab12__ModuleInfoZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi10__aggrDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi13opIndexAssignMFNbNiQBtQCaZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi18ensureNotInOpApplyMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi3getMFNbNiQBmZPQBn@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node11__xopEqualsMxFKxSQDsQDqQDkQDd__TQCyTQCtTQCtZQDkQCcZb@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4Node9__xtoHashFNbNeKxSQDrQDpQDjQDc__TQCxTQCsTQCsZQDjQCbZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4growMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi4maskMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi5resetMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6hashOfFNaNbNiNeMKxAaZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6removeMFNbNiIAaZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi6shrinkMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi7opApplyMFMDFKQBqKQBqZiZi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi7opIndexMNgFNaNbNcNiQBwZNgSQByQByQBr@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi8opAssignMFNbNcNiNjSQDoQDmQDgQCz__TQCuTQCpTQCpZQDgZQBg@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTAxaTS2rt9profilegc5EntryZQBi__T13opBinaryRightVAyaa2_696eZQBbMNgFNaNbNiMxAaZPNgSQCxQCxQCq@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk10__aggrDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk13opIndexAssignMFNbNiQBwQCcZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk18ensureNotInOpApplyMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk3getMFNbNiQBoZPQBq@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4Node6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4growMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk4maskMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk5resetMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6hashOfFNaNbNiNeMKxPvZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6removeMFNbNiIPvZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk6shrinkMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk7opApplyMFMDFKQBsKQBtZiZi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk7opIndexMNgFNaNbNcNiQByZNgPSQCbQCaQBuQBt@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk8opAssignMFNbNcNiNjSQDqQDoQDiQDb__TQCwTQCrTQCsZQDiZQBg@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPvTPS3gcc8sections3elf3DSOZQBk__T13opBinaryRightVAyaa2_696eZQBbMNgFNaNbNiMxPvZPNgPSQDaQCzQCtQCs@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi10__aggrDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi11__fieldDtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi13opIndexAssignMFNbNiiQByZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi14__aggrPostblitMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi18ensureNotInOpApplyMFNaNbNiNfZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi3getMFNbNiQBmZPi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4Node6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4growMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi4maskMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi5emptyMxFNaNbNdNiNfZb@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi5resetMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6__dtorMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6__initZ@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6hashOfFNaNbNiNeMKxPyQBvZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6lengthMxFNaNbNdNiNfZm@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6removeMFNbNiIPyQBqZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi6shrinkMFNbNiZv@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi7opApplyMFMDFKQBqKiZiZi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi7opIndexMNgFNaNbNcNiQBwZNgi@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi8opAssignMFNbNcNiNjSQDoQDmQDgQCz__TQCuTQCpTiZQDeZQBe@Base 12 ++ _D4core8internal9container7hashtab__T7HashTabTPyS6object10ModuleInfoTiZQBi__T13opBinaryRightVAyaa2_696eZQBbMNgFNaNbNiMxPyQCvZPNgi@Base 12 ++ _D4core8lifetime11__moduleRefZ@Base 12 ++ _D4core8lifetime12__ModuleInfoZ@Base 12 ++ _D4core8lifetime__T11copyEmplaceTS3std11concurrency3TidTQxZQBoFNaNbNiKQBlKQBpZv@Base 12 ++ _D4core8lifetime__T11moveEmplaceTAyaZQsFNaNbNiKQoKQrZv@Base 12 ++ _D4core8lifetime__T11moveEmplaceTC3std3zip13ArchiveMemberZQBnFNaNbNiKQBkKQBoZv@Base 12 ++ _D4core8lifetime__T11moveEmplaceTS3std8datetime8timezone13PosixTimeZone10LeapSecondZQCnFNaNbNiKQCkKQCoZv@Base 12 ++ _D4core8lifetime__T11moveEmplaceTS3std8datetime8timezone13PosixTimeZone14TempTransitionZQCrFNaNbNiKQCoKQCsZv@Base 12 ++ _D4core8lifetime__T15moveEmplaceImplTAvZQvFNaNbNiNfMKQqNkMKQwZv@Base 12 ++ _D4core8lifetime__T15moveEmplaceImplTAyaZQwFNaNbNiNfMKQrNkMKQxZv@Base 12 ++ _D4core8lifetime__T15moveEmplaceImplTC3std3zip13ArchiveMemberZQBrFNaNbNiNfMKQBnNkMKQBuZv@Base 12 ++ _D4core8lifetime__T15moveEmplaceImplTE3std12experimental6loggerQCj8LogLevelZQCfFNaNbNiNfKQCaKQCeZv@Base 12 ++ _D4core8lifetime__T15moveEmplaceImplTS3std5regex8internal2ir__T5InputTaZQjZQCeFNaNbNiNfMKQCaNkMKQChZv@Base 12 ++ _D4core8lifetime__T15moveEmplaceImplTS3std5regex8internal2ir__T5RegexTaZQjZQCeFNaNbNiNfMKQCaNkMKQChZv@Base 12 ++ _D4core8lifetime__T15moveEmplaceImplTS3std8bitmanip__T7BitsSetTmZQlZQBxFNaNbNiNfKQBsKQBwZv@Base 12 ++ _D4core8lifetime__T15moveEmplaceImplTS3std8datetime8timezone13PosixTimeZone10LeapSecondZQCrFNaNbNiNfKQCmKQCqZv@Base 12 ++ _D4core8lifetime__T15moveEmplaceImplTS3std8datetime8timezone13PosixTimeZone14TempTransitionZQCvFNaNbNiNfMKQCrNkMKQCyZv@Base 12 ++ _D4core8lifetime__T15trustedMoveImplTAvZQvFNaNbNiNeNkMKQsZQv@Base 12 ++ _D4core8lifetime__T15trustedMoveImplTAyaZQwFNaNbNiNeNkMKQtZQw@Base 12 ++ _D4core8lifetime__T15trustedMoveImplTC3std3zip13ArchiveMemberZQBrFNaNbNiNeNkMKQBpZQBt@Base 12 ++ _D4core8lifetime__T15trustedMoveImplTE3std12experimental6loggerQCj8LogLevelZQCfFNaNbNiNeKQCaZQCe@Base 12 ++ _D4core8lifetime__T15trustedMoveImplTS3std5regex8internal2ir__T5InputTaZQjZQCeFNaNbNiNeNkMKQCcZQCg@Base 12 ++ _D4core8lifetime__T15trustedMoveImplTS3std5regex8internal2ir__T5RegexTaZQjZQCeFNaNbNiNeNkMKQCcZQCg@Base 12 ++ _D4core8lifetime__T15trustedMoveImplTS3std8datetime8timezone13PosixTimeZone10LeapSecondZQCrFNaNbNiNeKQCmZQCq@Base 12 ++ _D4core8lifetime__T15trustedMoveImplTS3std8datetime8timezone13PosixTimeZone14TempTransitionZQCvFNaNbNiNeNkMKQCtZQCx@Base 12 ++ _D4core8lifetime__T4moveTAvZQjFNaNbNiNfNkMKQsZQv@Base 12 ++ _D4core8lifetime__T4moveTAyaZQkFNaNbNiNfNkMKQtZQw@Base 12 ++ _D4core8lifetime__T4moveTC3std3zip13ArchiveMemberZQBfFNaNbNiNfNkMKQBpZQBt@Base 12 ++ _D4core8lifetime__T4moveTE3std12experimental6loggerQBx8LogLevelZQBtFNaNbNiNfKQCaZQCe@Base 12 ++ _D4core8lifetime__T4moveTS3std5regex8internal2ir__T5InputTaZQjZQBsFNaNbNiNfNkMKQCcZQCg@Base 12 ++ _D4core8lifetime__T4moveTS3std5regex8internal2ir__T5RegexTaZQjZQBsFNaNbNiNfNkMKQCcZQCg@Base 12 ++ _D4core8lifetime__T4moveTS3std8bitmanip__T7BitsSetTmZQlZQBlFNaNbNiNfKQBsKQBwZv@Base 12 ++ _D4core8lifetime__T4moveTS3std8datetime8timezone13PosixTimeZone10LeapSecondZQCfFNaNbNiNfKQCmZQCq@Base 12 ++ _D4core8lifetime__T4moveTS3std8datetime8timezone13PosixTimeZone14TempTransitionZQCjFNaNbNiNfNkMKQCtZQCx@Base 12 ++ _D4core8lifetime__T7emplaceTAyaTQeZQqFNaNbNiNfPQtKQwZQh@Base 12 ++ _D4core8lifetime__T7emplaceTC3std12experimental6logger10filelogger10FileLoggerTSQBz5stdio4FileTEQCpQCoQCdQDz8LogLevelZQDvFAvKQBuQBhZQEa@Base 12 ++ _D4core8lifetime__T7emplaceTC3std12experimental6logger10filelogger10FileLoggerTSQBz5stdio4FileTEQCpQCoQCdQDz8LogLevelZQDvFNfQDsKQBxQBkZQEd@Base 12 ++ _D4core8lifetime__T7emplaceTC3std12experimental6loggerQCa16StdForwardLoggerTEQBwQBvQBkQDg8LogLevelZQDcFAvQBdZQDd@Base 12 ++ _D4core8lifetime__T7emplaceTC3std12experimental6loggerQCa16StdForwardLoggerTEQBwQBvQBkQDg8LogLevelZQDcFNfQCzQBgZQDg@Base 12 ++ _D4core8lifetime__T7emplaceTC3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocatorTOSQDcQDbQCq18RCISharedAllocatorZQEqFNaNbNiAvKOQBtZQEz@Base 12 ++ _D4core8lifetime__T7emplaceTC3std12experimental9allocator20setupThreadAllocatorFNbNcNiNfZ15ThreadAllocatorTOSQDcQDbQCq18RCISharedAllocatorZQEqFNaNbNiNfQEtKOQBwZQFc@Base 12 ++ _D4core8lifetime__T7emplaceTC3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEkZQGdFNaNbNiAvZQGh@Base 12 ++ _D4core8lifetime__T7emplaceTC3std12experimental9allocator__T20CSharedAllocatorImplTOxSQCfQCeQBt12gc_allocator11GCAllocatorVEQDr8typecons__T4FlagVAyaa8_696e646972656374ZQBdi0ZQEkZQGdFNaNbNiNfQGgZQGk@Base 12 ++ _D4core8lifetime__T7emplaceTC3std3zip13ArchiveMemberTQzZQBlFNaNbNiNfPQBpKQBtZQj@Base 12 ++ _D4core8lifetime__T7emplaceTC3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCaTxSQDqQDpQDmQBh__T5RegexTaZQjTQCjTAvZQFiFNaNfQFhKxQBwQDgQwZQFv@Base 12 ++ _D4core8lifetime__T7emplaceTC3std5regex8internal12backtracking__T19BacktrackingMatcherTaTSQCjQCiQCf2ir__T5InputTaZQjZQCaTxSQDqQDpQDmQBh__T5RegexTaZQjTQCjTAvZQFiFNaQjKxQBtQDdQtZQFs@Base 12 ++ _D4core8lifetime__T7emplaceTC3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBwTxSQDhQDgQDdQBh__T5RegexTaZQjTQCjTAvZQEzFNaNfQEyKxQBwQDgQwZQFm@Base 12 ++ _D4core8lifetime__T7emplaceTC3std5regex8internal8thompson__T15ThompsonMatcherTaTSQCaQBzQBw2ir__T5InputTaZQjZQBwTxSQDhQDgQDdQBh__T5RegexTaZQjTQCjTAvZQEzFNaQjKxQBtQDdQtZQFj@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb4sync5mutex5MutexZQBfFNbNiAvZQBh@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb4sync5mutex5MutexZQBfFNbNiNfQBgZQBk@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb8internal2gc4impl12conservativeQw14ConservativeGCZQClFQCgZQCk@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb8internal2gc4impl6manualQp8ManualGCZQBxFQBsZQBw@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception10RangeErrorTAyaTmTnZQBsFNaNbNiNfQBvKQyKmKQxZQCh@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception11AssertErrorTAyaTQeTmZQBuFNaNbNiNfQBxKQzKQBcKmZQCk@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception11AssertErrorTAyaTmZQBrFNaNbNiNfQBuKQwKmZQCd@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception13FinalizeErrorTC8TypeInfoTC6object9ThrowableTAyaTmZQCxFNaNbNiNfQDaKQCaKQBtKQBeKmZQDs@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception15ArrayIndexErrorTmTmTAyaTmTnZQCbFNaNbNiNfQCeKmKmKQBcKmKQBcZQCw@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception15ArraySliceErrorTmTmTmTAyaTmTnZQCdFNaNbNiNfQCgKmKmKmKQBeKmKQBeZQDa@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception16OutOfMemoryErrorTbZQBsFNaNbNiNfQBvKbZQCb@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception16OutOfMemoryErrorZQBqFNaNbNiNfQBtZQBx@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception27InvalidMemoryOperationErrorZQCbFNaNbNiNfQCeZQCi@Base 12 ++ _D4core8lifetime__T7emplaceTCQBb9exception9ForkErrorTAyaTmTnZQBqFNaNbNiNfQBtKQyKmKQxZQCf@Base 12 ++ _D4core8lifetime__T7emplaceTS3std10functional__T7memoizeS_DQBe5regex__T9regexImplTAyaZQpFNfxAyaAxaZSQCtQBp8internal2ir__T5RegexTaZQjVii8ZQDlFxQByQByZ5ValueTQEyZQFlFNaNbNiNfPQFpKQFtZQj@Base 12 ++ _D4core8lifetime__T7emplaceTS3std10functional__T7memoizeS_DQBe5regex__T9regexImplTAyaZQpFNfxAyaAxaZSQCtQBp8internal2ir__T5RegexTaZQjVii8ZQDlFxQByQByZ5ValueTxQCnTQCoTQCoZQFuFNaNbNiNfPQFyKxQDrKQDsQDrZQr@Base 12 ++ _D4core8lifetime__T7emplaceTS3std11concurrency__T4ListTSQBbQBa7MessageZQw4NodeTQyZQClFPQChKQBkZQj@Base 12 ++ _D4core8lifetime__T7emplaceTS3std12experimental9allocator15building_blocks15stats_collector__T14StatsCollectorTSQDfQDeQCtQCm6region__T6RegionTSQEkQEjQDy14mmap_allocator13MmapAllocatorVki16VEQGf8typecons__T4FlagVAyaa13_67726f77446f776e7761726473ZQBoi0ZQEnVmi4096Vmi0ZQGqZQJrFNaNbNiNfPQJvZQf@Base 12 ++ _D4core8lifetime__T7emplaceTS3std3net4curl3FTP4ImplZQBhFNaNbNiNfPQBlZQf@Base 12 ++ _D4core8lifetime__T7emplaceTS3std3net4curl4HTTP4ImplZQBiFNaNbNiNfPQBmZQf@Base 12 ++ _D4core8lifetime__T7emplaceTS3std3net4curl4SMTP4ImplZQBiFNaNbNiNfPQBmZQf@Base 12 ++ _D4core8lifetime__T7emplaceTS3std4file15DirIteratorImplTAyaTEQBgQBf8SpanModeTbZQCiFNfPQCgKQBiKQBiKbZQp@Base 12 ++ _D4core8lifetime__T7emplaceTS3std6socket11AddressInfoTQBaZQBnFNaNbNiNfPQBrKQBvZQj@Base 12 ++ _D4core8lifetime__T7emplaceTaTaZQnFNaNbNiNfPaKaZQf@Base 12 ++ _D4core8lifetime__T7emplaceTwTwZQnFNaNbNiNfPwKwZQf@Base 12 ++ _D4core8lifetime__T8moveImplTAvZQnFNaNbNiNfNkMKQsZQv@Base 12 ++ _D4core8lifetime__T8moveImplTAyaZQoFNaNbNiNfNkMKQtZQw@Base 12 ++ _D4core8lifetime__T8moveImplTC3std3zip13ArchiveMemberZQBjFNaNbNiNfNkMKQBpZQBt@Base 12 ++ _D4core8lifetime__T8moveImplTE3std12experimental6loggerQCb8LogLevelZQBxFNaNbNiNfKQCaZQCe@Base 12 ++ _D4core8lifetime__T8moveImplTS3std5regex8internal2ir__T5InputTaZQjZQBwFNaNbNiNfNkMKQCcZQCg@Base 12 ++ _D4core8lifetime__T8moveImplTS3std5regex8internal2ir__T5RegexTaZQjZQBwFNaNbNiNfNkMKQCcZQCg@Base 12 ++ _D4core8lifetime__T8moveImplTS3std8bitmanip__T7BitsSetTmZQlZQBpFNaNbNiNfKQBsKQBwZv@Base 12 ++ _D4core8lifetime__T8moveImplTS3std8datetime8timezone13PosixTimeZone10LeapSecondZQCjFNaNbNiNfKQCmZQCq@Base 12 ++ _D4core8lifetime__T8moveImplTS3std8datetime8timezone13PosixTimeZone14TempTransitionZQCnFNaNbNiNfNkMKQCtZQCx@Base 12 ++ _D4core8volatile11__moduleRefZ@Base 12 ++ _D4core8volatile12__ModuleInfoZ@Base 12 ++ _D4core9attribute11__moduleRefZ@Base 12 ++ _D4core9attribute12__ModuleInfoZ@Base 12 ++ _D4core9attribute9gnuAbiTag11__xopEqualsMxFKxSQBsQBqQBjZb@Base 12 ++ _D4core9attribute9gnuAbiTag6__ctorMFNcAAyaXSQBqQBoQBh@Base 12 ++ _D4core9attribute9gnuAbiTag6__initZ@Base 12 ++ _D4core9attribute9gnuAbiTag9__xtoHashFNbNeKxSQBrQBpQBiZm@Base 12 ++ _D4core9exception10RangeError6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQCsQCqQCj@Base 12 ++ _D4core9exception10RangeError6__ctorMFNaNbNiNfAyamC6object9ThrowableZCQCqQCoQCh@Base 12 ++ _D4core9exception10RangeError6__initZ@Base 12 ++ _D4core9exception10RangeError6__vtblZ@Base 12 ++ _D4core9exception10RangeError7__ClassZ@Base 12 ++ _D4core9exception11AssertError6__ctorMFNaNbNiNfAyaQdmC6object9ThrowableZCQCtQCrQCk@Base 12 ++ _D4core9exception11AssertError6__ctorMFNaNbNiNfAyamZCQBzQBxQBq@Base 12 ++ _D4core9exception11AssertError6__ctorMFNaNbNiNfC6object9ThrowableAyamZCQCrQCpQCi@Base 12 ++ _D4core9exception11AssertError6__initZ@Base 12 ++ _D4core9exception11AssertError6__vtblZ@Base 12 ++ _D4core9exception11AssertError7__ClassZ@Base 12 ++ _D4core9exception11SwitchError6__ctorMFNaNbNiNfAyamC6object9ThrowableZCQCrQCpQCi@Base 12 ++ _D4core9exception11SwitchError6__initZ@Base 12 ++ _D4core9exception11SwitchError6__vtblZ@Base 12 ++ _D4core9exception11SwitchError7__ClassZ@Base 12 ++ _D4core9exception11__moduleRefZ@Base 12 ++ _D4core9exception11rangeMsgPutFNaNbNiNfKAaMAxaZv@Base 12 ++ _D4core9exception12__ModuleInfoZ@Base 12 ++ _D4core9exception13FinalizeError6__ctorMFNaNbNiNfC8TypeInfoAyamC6object9ThrowableZCQDdQDbQCu@Base 12 ++ _D4core9exception13FinalizeError6__ctorMFNaNbNiNfC8TypeInfoC6object9ThrowableAyamZCQDdQDbQCu@Base 12 ++ _D4core9exception13FinalizeError6__initZ@Base 12 ++ _D4core9exception13FinalizeError6__vtblZ@Base 12 ++ _D4core9exception13FinalizeError7__ClassZ@Base 12 ++ _D4core9exception13FinalizeError8toStringMxFNfZAya@Base 12 ++ _D4core9exception13assertHandlerFNbNdNiNePFNbAyamQeZvZv@Base 12 ++ _D4core9exception13assertHandlerFNbNdNiNeZPFNbAyamQeZv@Base 12 ++ _D4core9exception14_assertHandlerPFNbAyamQeZv@Base 12 ++ _D4core9exception15ArrayIndexError6__ctorMFNaNbNiNfmmAyamC6object9ThrowableZCQCxQCvQCo@Base 12 ++ _D4core9exception15ArrayIndexError6__initZ@Base 12 ++ _D4core9exception15ArrayIndexError6__vtblZ@Base 12 ++ _D4core9exception15ArrayIndexError7__ClassZ@Base 12 ++ _D4core9exception15ArraySliceError6__ctorMFNaNbNiNfmmmAyamC6object9ThrowableZCQCyQCwQCp@Base 12 ++ _D4core9exception15ArraySliceError6__initZ@Base 12 ++ _D4core9exception15ArraySliceError6__vtblZ@Base 12 ++ _D4core9exception15ArraySliceError7__ClassZ@Base 12 ++ _D4core9exception16OutOfMemoryError13superToStringMFNeZAya@Base 12 ++ _D4core9exception16OutOfMemoryError6__ctorMFNaNbNiNfAyamC6object9ThrowableZCQCwQCuQCn@Base 12 ++ _D4core9exception16OutOfMemoryError6__ctorMFNaNbNiNfbAyamC6object9ThrowableZCQCxQCvQCo@Base 12 ++ _D4core9exception16OutOfMemoryError6__initZ@Base 12 ++ _D4core9exception16OutOfMemoryError6__vtblZ@Base 12 ++ _D4core9exception16OutOfMemoryError7__ClassZ@Base 12 ++ _D4core9exception16OutOfMemoryError8toStringMxFNeZAya@Base 12 ++ _D4core9exception16UnicodeException6__ctorMFNaNbNiNfAyamQemC6object9ThrowableZCQCzQCxQCq@Base 12 ++ _D4core9exception16UnicodeException6__initZ@Base 12 ++ _D4core9exception16UnicodeException6__vtblZ@Base 12 ++ _D4core9exception16UnicodeException7__ClassZ@Base 12 ++ _D4core9exception17SuppressTraceInfo6__initZ@Base 12 ++ _D4core9exception17SuppressTraceInfo6__vtblZ@Base 12 ++ _D4core9exception17SuppressTraceInfo7__ClassZ@Base 12 ++ _D4core9exception17SuppressTraceInfo7opApplyMxFMDFKmKxAaZiZi@Base 12 ++ _D4core9exception17SuppressTraceInfo7opApplyMxFMDFKxAaZiZi@Base 12 ++ _D4core9exception17SuppressTraceInfo8instanceFNaNbNiNeZ2ityCQCgQCeQBx@Base 12 ++ _D4core9exception17SuppressTraceInfo8instanceFNaNbNiNeZCQCcQCaQBt@Base 12 ++ _D4core9exception17SuppressTraceInfo8toStringMxFZAya@Base 12 ++ _D4core9exception27InvalidMemoryOperationError13superToStringMFNeZAya@Base 12 ++ _D4core9exception27InvalidMemoryOperationError6__ctorMFNaNbNiNfAyamC6object9ThrowableZCQDhQDfQCy@Base 12 ++ _D4core9exception27InvalidMemoryOperationError6__initZ@Base 12 ++ _D4core9exception27InvalidMemoryOperationError6__vtblZ@Base 12 ++ _D4core9exception27InvalidMemoryOperationError7__ClassZ@Base 12 ++ _D4core9exception27InvalidMemoryOperationError8toStringMxFNeZAya@Base 12 ++ _D4core9exception6_storeG256v@Base 12 ++ _D4core9exception9ForkError6__ctorMFNaNbNiNfAyamC6object9ThrowableZCQCoQCmQCf@Base 12 ++ _D4core9exception9ForkError6__initZ@Base 12 ++ _D4core9exception9ForkError6__vtblZ@Base 12 ++ _D4core9exception9ForkError7__ClassZ@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf10RangeErrorTAyaTmTnZQBqFKQnKmQlZ3getFNbNiZQBy@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf10RangeErrorTAyaTmTnZQBqFNaNbNiKQtKmQrZQBu@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf11AssertErrorTAyaTQeTmZQBsFKQoKQrKmZ3getFNbNiZQCb@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf11AssertErrorTAyaTQeTmZQBsFNaNbNiKQuKQxKmZQBx@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf11AssertErrorTAyaTmZQBpFKQlKmZ3getFNbNiZQBv@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf11AssertErrorTAyaTmZQBpFNaNbNiKQrKmZQBr@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf13FinalizeErrorTC8TypeInfoTC6object9ThrowableTAyaTmZQCvFKQBpKQBiKQtKmZ3getFNbNiZQDj@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf13FinalizeErrorTC8TypeInfoTC6object9ThrowableTAyaTmZQCvFNaNbNiKQBvKQBoKQzKmZQDf@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf15ArrayIndexErrorTmTmTAyaTmTnZQBzFKmKmKQrKmQpZ3getFNbNiZQCl@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf15ArrayIndexErrorTmTmTAyaTmTnZQBzFNaNbNiKmKmKQxKmQvZQCh@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf15ArraySliceErrorTmTmTmTAyaTmTnZQCbFKmKmKmKQtKmQrZ3getFNbNiZQCp@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf15ArraySliceErrorTmTmTmTAyaTmTnZQCbFNaNbNiKmKmKmKQzKmQxZQCl@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf16OutOfMemoryErrorTbZQBqFNaNbNibZQBo@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf16OutOfMemoryErrorTbZQBqFbZ3getFNbNiZQBs@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf16OutOfMemoryErrorZQBoFNaNbNiZQBl@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf16OutOfMemoryErrorZQBoFZ3getFNbNiZQBp@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf27InvalidMemoryOperationErrorZQBzFNaNbNiZQBw@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf27InvalidMemoryOperationErrorZQBzFZ3getFNbNiZQCa@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf9ForkErrorTAyaTmTnZQBoFKQnKmQlZ3getFNbNiZQBw@Base 12 ++ _D4core9exception__T11staticErrorTCQBhQBf9ForkErrorTAyaTmTnZQBoFNaNbNiKQtKmQrZQBs@Base 12 ++ _D50TypeInfo_C3std12experimental9allocator10IAllocator6__initZ@Base 12 ++ _D50TypeInfo_E3std6format8internal5write12RoundingMode6__initZ@Base 12 ++ _D50TypeInfo_E3std8internal4test10dummyrange9RangeType6__initZ@Base 12 ++ _D50TypeInfo_E3std9algorithm9iteration14GroupingOpType6__initZ@Base 12 ++ _D50TypeInfo_E4core3sys5linux10perf_event11perf_sw_ids6__initZ@Base 12 ++ _D50TypeInfo_S3std4math8hardware20FloatingPointControl6__initZ@Base 12 ++ _D50TypeInfo_S4core3sys5linux4tipc13sockaddr_tipc4Addr6__initZ@Base 12 ++ _D50TypeInfo_S4core3sys5linux8io_uring14io_uring_probe6__initZ@Base 12 ++ _D50TypeInfo_S4core3sys5linuxQk7inotify13inotify_event6__initZ@Base 12 ++ _D50TypeInfo_S4core3sys5posix5spawn17posix_spawnattr_t6__initZ@Base 12 ++ _D50TypeInfo_S4core3sys5posix7netinet3in_11sockaddr_in6__initZ@Base 12 ++ _D50TypeInfo_S4core3sys5posix7pthread15pthread_cleanup6__initZ@Base 12 ++ _D50TypeInfo_S4core3sys5posixQk5types15pthread_mutex_t6__initZ@Base 12 ++ _D50TypeInfo_S4core8internal8spinlock15AlignedSpinLock6__initZ@Base 12 ++ _D50TypeInfo_xE3std12experimental6logger4core8LogLevel6__initZ@Base 12 ++ _D50TypeInfo_yS3std8internal14unicode_tables9CompEntry6__initZ@Base 12 ++ _D51TypeInfo_AyS3std8internal14unicode_tables9CompEntry6__initZ@Base 12 ++ _D51TypeInfo_E3std6format8internal5write13PrecisionType6__initZ@Base 12 ++ _D51TypeInfo_E3std6format8internal5write13RoundingClass6__initZ@Base 12 ++ _D51TypeInfo_E4core3sys5linux10perf_event12perf_type_id6__initZ@Base 12 ++ _D51TypeInfo_E4core4sync7rwmutex14ReadWriteMutex6Policy6__initZ@Base 12 ++ _D51TypeInfo_OS4core8internal8spinlock15AlignedSpinLock6__initZ@Base 12 ++ _D51TypeInfo_S3std8internal4test3uda17HasPrivateMembers6__initZ@Base 12 ++ _D51TypeInfo_S4core3sys5linux8io_uring15io_uring_params6__initZ@Base 12 ++ _D51TypeInfo_S4core3sys5posix7netinet3in_12sockaddr_in66__initZ@Base 12 ++ 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_D6object25TypeInfo_AssociativeArray8opEqualsMFC6ObjectZb@Base 12 ++ _D6object25TypeInfo_AssociativeArray8toStringMxFNbNfZAya@Base 12 ++ _D6object2AA6__initZ@Base 12 ++ _D6object5Error6__ctorMFNaNbNiNfAyaCQBi9ThrowableZCQBxQBt@Base 12 ++ _D6object5Error6__ctorMFNaNbNiNfAyaQdmCQBl9ThrowableZCQCaQBw@Base 12 ++ _D6object5Error6__initZ@Base 12 ++ _D6object5Error6__vtblZ@Base 12 ++ _D6object5Error7__ClassZ@Base 12 ++ _D6object6Object5opCmpMFCQqZi@Base 12 ++ _D6object6Object6toHashMFNbNeZm@Base 12 ++ _D6object6Object7Monitor11__InterfaceZ@Base 12 ++ _D6object6Object7factoryFAyaZCQv@Base 12 ++ _D6object6Object8opEqualsMFCQtZb@Base 12 ++ _D6object6Object8toStringMFZAya@Base 12 ++ _D6object7AARange6__initZ@Base 12 ++ _D6object7_xopCmpFIPvIQdZb@Base 12 ++ _D6object8TypeInfo4nextMNgFNaNbNdNiZNgCQBe@Base 12 ++ _D6object8TypeInfo4swapMxFPvQcZv@Base 12 ++ _D6object8TypeInfo5flagsMxFNaNbNdNiNfZk@Base 12 ++ _D6object8TypeInfo5offTiMxFZAxSQBd14OffsetTypeInfo@Base 12 ++ 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_DTi16_D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe2md3MD5ZQBf6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki32Vmi3988292384ZQxZQCe6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN2882303761517117440ZQBgZQCo6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3crc__T3CRCVki64VmN3932672073523589310ZQBgZQCo6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki224ZQsZQBz6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki256ZQsZQBz6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki384ZQsZQBz6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki1024Vki512ZQsZQBz6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki160ZQrZQBy6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki224ZQrZQBy3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki224ZQrZQBy5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki224ZQrZQBy6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki224ZQrZQBy6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki224ZQrZQBy6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki256ZQrZQBy3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki256ZQrZQBy5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki256ZQrZQBy6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki256ZQrZQBy6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe3sha__T3SHAVki512Vki256ZQrZQBy6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe6ripemd9RIPEMD160ZQBp3putMFNbNeMAxhXv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe6ripemd9RIPEMD160ZQBp5resetMFNbNeZv@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe6ripemd9RIPEMD160ZQBp6finishMFNbAhZQd@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe6ripemd9RIPEMD160ZQBp6finishMFNbNeZAh@Base 12 ++ _DTi16_D3std6digest__T13WrapperDigestTSQBfQBe6ripemd9RIPEMD160ZQBp6lengthMxFNaNbNdNeZm@Base 12 ++ _DTi16_D4core4sync5mutex5Mutex4lockMFNeZv@Base 12 ++ _DTi16_D4core4sync5mutex5Mutex6unlockMFNeZv@Base 12 ++ _DTi16_D4core4sync7rwmutex14ReadWriteMutex6Reader4lockMFNeZv@Base 12 ++ _DTi16_D4core4sync7rwmutex14ReadWriteMutex6Reader6unlockMFNeZv@Base 12 ++ _DTi16_D4core4sync7rwmutex14ReadWriteMutex6Writer4lockMFNeZv@Base 12 ++ _DTi16_D4core4sync7rwmutex14ReadWriteMutex6Writer6unlockMFNeZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC10removeRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC11inFinalizerMFNbNiNfZb@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC11removeRangeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC12profileStatsMFNbNiNeZSQDa6memory2GC12ProfileStats@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC13runFinalizersMFNbMxAvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC14collectNoStackMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC4freeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC5queryMFNbPvZSQCq6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC5statsMFNbNiNfZSQCs6memory2GC5Stats@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6addrOfMFNbNiPvZQd@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6callocMFNbmkxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6enableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6extendMFNbPvmmxC8TypeInfoZm@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6mallocMFNbmkxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6qallocMFNbmkMxC8TypeInfoZSQDd6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC6sizeOfMFNbNiPvZm@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7addRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7clrAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7collectMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7disableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7getAttrMFNbPvZk@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7reallocMFNbPvmkxC8TypeInfoZQq@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7reserveMFNbmZm@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC7setAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC8minimizeMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC8rootIterMFNdNiZDFMDFNbKSQDbQCq11gcinterface4RootZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl12conservativeQw14ConservativeGC9rangeIterMFNdNiZDFMDFNbKSQDcQCr11gcinterface5RangeZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC10removeRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC11inFinalizerMFNbNiNfZb@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC11removeRangeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC12profileStatsMFNbNiNfZSQCk6memory2GC12ProfileStats@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC13runFinalizersMFNbMxAvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC14collectNoStackMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC4freeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC5queryMFNbPvZSQCa6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC5statsMFNbNiNfZSQCc6memory2GC5Stats@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6addrOfMFNbNiPvZQd@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6callocMFNbmkMxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6enableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6extendMFNbPvmmMxC8TypeInfoZm@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6mallocMFNbmkMxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6qallocMFNbmkMxC8TypeInfoZSQCn6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC6sizeOfMFNbNiPvZm@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7addRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7clrAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7collectMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7disableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7getAttrMFNbPvZk@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7reallocMFNbPvmkMxC8TypeInfoZQr@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7reserveMFNbmZm@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC7setAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC8minimizeMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC8rootIterMFNdNiNjZDFMDFNbKSQCnQCc11gcinterface4RootZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl5protoQo7ProtoGC9rangeIterMFNdNiNjZDFMDFNbKSQCoQCd11gcinterface5RangeZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC10removeRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC11inFinalizerMFNbNiNfZb@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC11removeRangeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC12profileStatsMFNbNiNfZSQCm6memory2GC12ProfileStats@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC13runFinalizersMFNbMxAvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC14collectNoStackMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC24allocatedInCurrentThreadMFNbZm@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC4freeMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC5queryMFNbPvZSQCc6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC5statsMFNbNiNfZSQCe6memory2GC5Stats@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6addrOfMFNbNiPvZQd@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6callocMFNbmkxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6enableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6extendMFNbPvmmxC8TypeInfoZm@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6mallocMFNbmkxC8TypeInfoZPv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6qallocMFNbmkMxC8TypeInfoZSQCp6memory8BlkInfo_@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC6sizeOfMFNbNiPvZm@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7addRootMFNbNiPvZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7clrAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7collectMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7disableMFZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7getAttrMFNbPvZk@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7reallocMFNbPvmkxC8TypeInfoZQq@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7reserveMFNbmZm@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC7setAttrMFNbPvkZk@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC8addRangeMFNbNiPvmxC8TypeInfoZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC8minimizeMFNbZv@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC8rootIterMFNdNiNjZDFMDFNbKSQCpQCe11gcinterface4RootZiZi@Base 12 ++ _DTi16_D4core8internal2gc4impl6manualQp8ManualGC9rangeIterMFNdNiNjZDFMDFNbKSQCqQCf11gcinterface5RangeZiZi@Base 12 ++ _DTi16_D4core9exception17SuppressTraceInfo7opApplyMxFMDFKmKxAaZiZi@Base 12 ++ _DTi16_D4core9exception17SuppressTraceInfo7opApplyMxFMDFKxAaZiZi@Base 12 ++ _DTi16_D4core9exception17SuppressTraceInfo8toStringMxFZAya@Base 12 ++ _ZNKSt10bad_typeid4whatEv@Base 12 ++ _ZNKSt13bad_exception4whatEv@Base 12 ++ _ZNKSt8bad_cast4whatEv@Base 12 ++ _ZNKSt9exception4whatEv@Base 12 ++ _ZNKSt9type_info4nameEv@Base 12 ++ _ZNKSt9type_info6beforeEPKS_@Base 12 ++ _ZNSt9bad_allocC1Ev@Base 12 ++ _ZNSt9exceptionD1Ev@Base 12 ++ _ZNSt9type_infoD1Ev@Base 12 ++ __CPUELT@Base 12 ++ __CPUMASK@Base 12 ++ __CPU_ALLOC@Base 12 ++ __CPU_ALLOC_SIZE@Base 12 ++ __CPU_COUNT_S@Base 12 ++ __CPU_FREE@Base 12 ++ __CPU_ISSET_S@Base 12 ++ __CPU_SET_S@Base 12 ++ __atomic_add_fetch_16@Base 12 ++ __atomic_add_fetch_1@Base 12 ++ __atomic_add_fetch_2@Base 12 ++ __atomic_add_fetch_4@Base 12 ++ __atomic_add_fetch_8@Base 12 ++ __atomic_and_fetch_16@Base 12 ++ __atomic_and_fetch_1@Base 12 ++ __atomic_and_fetch_2@Base 12 ++ __atomic_and_fetch_4@Base 12 ++ __atomic_and_fetch_8@Base 12 ++ __atomic_compare_exchange@Base 12 ++ __atomic_compare_exchange_16@Base 12 ++ __atomic_compare_exchange_1@Base 12 ++ __atomic_compare_exchange_2@Base 12 ++ __atomic_compare_exchange_4@Base 12 ++ __atomic_compare_exchange_8@Base 12 ++ __atomic_exchange@Base 12 ++ __atomic_exchange_16@Base 12 ++ __atomic_exchange_1@Base 12 ++ __atomic_exchange_2@Base 12 ++ __atomic_exchange_4@Base 12 ++ __atomic_exchange_8@Base 12 ++ __atomic_feraiseexcept@Base 12 ++ __atomic_fetch_add_16@Base 12 ++ __atomic_fetch_add_1@Base 12 ++ __atomic_fetch_add_2@Base 12 ++ __atomic_fetch_add_4@Base 12 ++ __atomic_fetch_add_8@Base 12 ++ __atomic_fetch_and_16@Base 12 ++ __atomic_fetch_and_1@Base 12 ++ __atomic_fetch_and_2@Base 12 ++ __atomic_fetch_and_4@Base 12 ++ __atomic_fetch_and_8@Base 12 ++ __atomic_fetch_nand_16@Base 12 ++ __atomic_fetch_nand_1@Base 12 ++ __atomic_fetch_nand_2@Base 12 ++ __atomic_fetch_nand_4@Base 12 ++ __atomic_fetch_nand_8@Base 12 ++ __atomic_fetch_or_16@Base 12 ++ __atomic_fetch_or_1@Base 12 ++ __atomic_fetch_or_2@Base 12 ++ __atomic_fetch_or_4@Base 12 ++ __atomic_fetch_or_8@Base 12 ++ __atomic_fetch_sub_16@Base 12 ++ __atomic_fetch_sub_1@Base 12 ++ __atomic_fetch_sub_2@Base 12 ++ __atomic_fetch_sub_4@Base 12 ++ __atomic_fetch_sub_8@Base 12 ++ __atomic_fetch_xor_16@Base 12 ++ __atomic_fetch_xor_1@Base 12 ++ __atomic_fetch_xor_2@Base 12 ++ __atomic_fetch_xor_4@Base 12 ++ __atomic_fetch_xor_8@Base 12 ++ __atomic_is_lock_free@Base 12 ++ __atomic_load@Base 12 ++ __atomic_load_16@Base 12 ++ __atomic_load_1@Base 12 ++ __atomic_load_2@Base 12 ++ __atomic_load_4@Base 12 ++ __atomic_load_8@Base 12 ++ __atomic_nand_fetch_16@Base 12 ++ __atomic_nand_fetch_1@Base 12 ++ __atomic_nand_fetch_2@Base 12 ++ __atomic_nand_fetch_4@Base 12 ++ __atomic_nand_fetch_8@Base 12 ++ __atomic_or_fetch_16@Base 12 ++ __atomic_or_fetch_1@Base 12 ++ __atomic_or_fetch_2@Base 12 ++ __atomic_or_fetch_4@Base 12 ++ __atomic_or_fetch_8@Base 12 ++ __atomic_store@Base 12 ++ __atomic_store_16@Base 12 ++ __atomic_store_1@Base 12 ++ __atomic_store_2@Base 12 ++ __atomic_store_4@Base 12 ++ __atomic_store_8@Base 12 ++ __atomic_sub_fetch_16@Base 12 ++ __atomic_sub_fetch_1@Base 12 ++ __atomic_sub_fetch_2@Base 12 ++ __atomic_sub_fetch_4@Base 12 ++ __atomic_sub_fetch_8@Base 12 ++ __atomic_test_and_set_16@Base 12 ++ __atomic_test_and_set_1@Base 12 ++ __atomic_test_and_set_2@Base 12 ++ __atomic_test_and_set_4@Base 12 ++ __atomic_test_and_set_8@Base 12 ++ __atomic_xor_fetch_16@Base 12 ++ __atomic_xor_fetch_1@Base 12 ++ __atomic_xor_fetch_2@Base 12 ++ __atomic_xor_fetch_4@Base 12 ++ __atomic_xor_fetch_8@Base 12 ++ __gdc_begin_catch@Base 12 ++ __gdc_personality_v0@Base 12 ++ _aApplyRcd1@Base 12 ++ _aApplyRcd2@Base 12 ++ _aApplyRcw1@Base 12 ++ _aApplyRcw2@Base 12 ++ _aApplyRdc1@Base 12 ++ _aApplyRdc2@Base 12 ++ _aApplyRdw1@Base 12 ++ _aApplyRdw2@Base 12 ++ _aApplyRwc1@Base 12 ++ _aApplyRwc2@Base 12 ++ _aApplyRwd1@Base 12 ++ _aApplyRwd2@Base 12 ++ _aApplycd1@Base 12 ++ _aApplycd2@Base 12 ++ _aApplycw1@Base 12 ++ _aApplycw2@Base 12 ++ _aApplydc1@Base 12 ++ _aApplydc2@Base 12 ++ _aApplydw1@Base 12 ++ _aApplydw2@Base 12 ++ _aApplywc1@Base 12 ++ _aApplywc2@Base 12 ++ _aApplywd1@Base 12 ++ _aApplywd2@Base 12 ++ _aaApply2@Base 12 ++ _aaApply@Base 12 ++ _aaClear@Base 12 ++ _aaDelX@Base 12 ++ _aaEqual@Base 12 ++ _aaGetHash@Base 12 ++ _aaGetRvalueX@Base 12 ++ _aaGetX@Base 12 ++ _aaGetY@Base 12 ++ _aaInX@Base 12 ++ _aaKeys@Base 12 ++ _aaLen@Base 12 ++ _aaRange@Base 12 ++ _aaRangeEmpty@Base 12 ++ _aaRangeFrontKey@Base 12 ++ _aaRangeFrontValue@Base 12 ++ _aaRangePopFront@Base 12 ++ _aaRehash@Base 12 ++ _aaValues@Base 12 ++ _aaVersion@Base 12 ++ _adEq2@Base 12 ++ _adSort@Base 12 ++ _d_allocmemory@Base 12 ++ _d_arrayappendT@Base 12 ++ _d_arrayappendcTX@Base 12 ++ _d_arrayappendcd@Base 12 ++ _d_arrayappendwd@Base 12 ++ _d_arrayassign@Base 12 ++ _d_arrayassign_l@Base 12 ++ _d_arrayassign_r@Base 12 ++ _d_arraybounds@Base 12 ++ _d_arraybounds_index@Base 12 ++ _d_arraybounds_indexp@Base 12 ++ _d_arraybounds_slice@Base 12 ++ _d_arraybounds_slicep@Base 12 ++ _d_arrayboundsp@Base 12 ++ _d_arraycatT@Base 12 ++ _d_arraycatnTX@Base 12 ++ _d_arraycopy@Base 12 ++ _d_arrayctor@Base 12 ++ _d_arrayliteralTX@Base 12 ++ _d_arraysetassign@Base 12 ++ _d_arraysetcapacity@Base 12 ++ _d_arraysetctor@Base 12 ++ _d_arraysetlengthT@Base 12 ++ _d_arraysetlengthiT@Base 12 ++ _d_arrayshrinkfit@Base 12 ++ _d_assert@Base 12 ++ _d_assert_msg@Base 12 ++ _d_assertp@Base 12 ++ _d_assocarrayliteralTX@Base 12 ++ _d_callfinalizer@Base 12 ++ _d_callinterfacefinalizer@Base 12 ++ _d_createTrace@Base 12 ++ _d_critical_init@Base 12 ++ _d_critical_term@Base 12 ++ _d_criticalenter2@Base 12 ++ _d_criticalenter@Base 12 ++ _d_criticalexit@Base 12 ++ _d_delThrowable@Base 12 ++ _d_delarray_t@Base 12 ++ _d_delclass@Base 12 ++ _d_delinterface@Base 12 ++ _d_delmemory@Base 12 ++ _d_delstruct@Base 12 ++ _d_dso_registry@Base 12 ++ _d_dynamic_cast@Base 12 ++ _d_eh_swapContext@Base 12 ++ _d_initMonoTime@Base 12 ++ _d_interface_cast@Base 12 ++ _d_isbaseof2@Base 12 ++ _d_isbaseof@Base 12 ++ _d_monitor_staticctor@Base 12 ++ _d_monitor_staticdtor@Base 12 ++ _d_monitordelete@Base 12 ++ _d_monitordelete_nogc@Base 12 ++ _d_monitorenter@Base 12 ++ _d_monitorexit@Base 12 ++ _d_newThrowable@Base 12 ++ _d_newarrayT@Base 12 ++ _d_newarrayU@Base 12 ++ _d_newarrayiT@Base 12 ++ _d_newarraymTX@Base 12 ++ _d_newarraymiTX@Base 12 ++ _d_newclass@Base 12 ++ _d_newitemT@Base 12 ++ _d_newitemU@Base 12 ++ _d_newitemiT@Base 12 ++ _d_print_throwable@Base 12 ++ _d_register_conservative_gc@Base 12 ++ _d_register_manual_gc@Base 12 ++ _d_register_precise_gc@Base 12 ++ _d_run_main2@Base 12 ++ _d_run_main@Base 12 ++ _d_setSameMutex@Base 12 ++ _d_throw@Base 12 ++ _d_toObject@Base 12 ++ _d_traceContext@Base 12 ++ _d_unittest@Base 12 ++ _d_unittest_msg@Base 12 ++ _d_unittestp@Base 12 ++ atomic_flag_clear@Base 12 ++ atomic_flag_clear_explicit@Base 12 ++ atomic_flag_test_and_set@Base 12 ++ atomic_flag_test_and_set_explicit@Base 12 ++ atomic_signal_fence@Base 12 ++ atomic_thread_fence@Base 12 ++ backtrace_alloc@Base 12 ++ backtrace_close@Base 12 ++ backtrace_create_state@Base 12 ++ backtrace_dwarf_add@Base 12 ++ backtrace_free@Base 12 ++ backtrace_full@Base 12 ++ backtrace_get_view@Base 12 ++ backtrace_initialize@Base 12 ++ backtrace_open@Base 12 ++ backtrace_pcinfo@Base 12 ++ backtrace_print@Base 12 ++ backtrace_qsort@Base 12 ++ backtrace_release_view@Base 12 ++ backtrace_simple@Base 12 ++ backtrace_syminfo@Base 12 ++ backtrace_syminfo_to_full_callback@Base 12 ++ backtrace_syminfo_to_full_error_callback@Base 12 ++ backtrace_uncompress_lzma@Base 12 ++ backtrace_uncompress_zdebug@Base 12 ++ backtrace_vector_finish@Base 12 ++ backtrace_vector_grow@Base 12 ++ backtrace_vector_release@Base 12 ++ cimag@Base 12 ++ cimagf@Base 12 ++ cimagl@Base 12 ++ creald@Base 12 ++ crealf@Base 12 ++ creall@Base 12 ++ deflateInit2@Base 12 ++ deflateInit@Base 12 ++ fakePureErrnoImpl@Base 12 ++ fakePureReprintReal@Base 12 ++ fiber_entryPoint@Base 12 ++ fiber_switchContext@Base 12 ++ gc_addRange@Base 12 ++ gc_addRoot@Base 12 ++ gc_addrOf@Base 12 ++ gc_allocatedInCurrentThread@Base 12 ++ gc_calloc@Base 12 ++ gc_clrAttr@Base 12 ++ gc_clrProxy@Base 12 ++ gc_collect@Base 12 ++ gc_disable@Base 12 ++ gc_enable@Base 12 ++ gc_extend@Base 12 ++ gc_free@Base 12 ++ gc_getAttr@Base 12 ++ gc_getProxy@Base 12 ++ gc_inFinalizer@Base 12 ++ gc_init@Base 12 ++ gc_init_nothrow@Base 12 ++ gc_malloc@Base 12 ++ gc_minimize@Base 12 ++ gc_profileStats@Base 12 ++ gc_qalloc@Base 12 ++ gc_query@Base 12 ++ gc_realloc@Base 12 ++ gc_removeRange@Base 12 ++ gc_removeRoot@Base 12 ++ gc_reserve@Base 12 ++ gc_runFinalizers@Base 12 ++ gc_setAttr@Base 12 ++ gc_setProxy@Base 12 ++ gc_sizeOf@Base 12 ++ gc_stats@Base 12 ++ gc_term@Base 12 ++ getErrno@Base 12 ++ inflateBackInit@Base 12 ++ inflateInit2@Base 12 ++ inflateInit@Base 12 ++ libat_lock_n@Base 12 ++ libat_unlock_n@Base 12 ++ lifetime_init@Base 12 ++ onArrayIndexError@Base 12 ++ onArraySliceError@Base 12 ++ onAssertError@Base 12 ++ onAssertErrorMsg@Base 12 ++ onFinalizeError@Base 12 ++ onForkError@Base 12 ++ onInvalidMemoryOperationError@Base 12 ++ onOutOfMemoryError@Base 12 ++ onOutOfMemoryErrorNoGC@Base 12 ++ onRangeError@Base 12 ++ onUnicodeError@Base 12 ++ onUnittestErrorMsg@Base 12 ++ pcinfoCallback@Base 12 ++ pcinfoErrorCallback@Base 12 ++ perf_event_open@Base 12 ++ profilegc_setlogfilename@Base 12 ++ register_default_gcs@Base 12 ++ rt_args@Base 12 ++ rt_attachDisposeEvent@Base 12 ++ rt_cArgs@Base 12 ++ rt_cmdline_enabled@Base 12 ++ rt_detachDisposeEvent@Base 12 ++ rt_envvars_enabled@Base 12 ++ rt_finalize2@Base 12 ++ rt_finalize@Base 12 ++ rt_finalizeFromGC@Base 12 ++ rt_getCollectHandler@Base 12 ++ rt_getTraceHandler@Base 12 ++ rt_hasFinalizerInSegment@Base 12 ++ rt_init@Base 12 ++ rt_loadLibrary@Base 12 ++ rt_moduleCtor@Base 12 ++ rt_moduleDtor@Base 12 ++ rt_moduleTlsCtor@Base 12 ++ rt_moduleTlsDtor@Base 12 ++ rt_options@Base 12 ++ rt_setCollectHandler@Base 12 ++ rt_setTraceHandler@Base 12 ++ rt_term@Base 12 ++ rt_trapExceptions@Base 12 ++ rt_unloadLibrary@Base 12 ++ runModuleUnitTests@Base 12 ++ setErrno@Base 12 ++ simpleCallback@Base 12 ++ simpleErrorCallback@Base 12 ++ syminfoCallback2@Base 12 ++ syminfoCallback@Base 12 ++ thread_attachThis@Base 12 ++ thread_detachByAddr@Base 12 ++ thread_detachInstance@Base 12 ++ thread_detachThis@Base 12 ++ thread_enterCriticalRegion@Base 12 ++ thread_entryPoint@Base 12 ++ thread_exitCriticalRegion@Base 12 ++ thread_inCriticalRegion@Base 12 ++ thread_init@Base 12 ++ thread_isMainThread@Base 12 ++ thread_joinAll@Base 12 ++ thread_processGCMarks@Base 12 ++ thread_resumeAll@Base 12 ++ thread_resumeHandler@Base 12 ++ thread_scanAll@Base 12 ++ thread_scanAllType@Base 12 ++ thread_setGCSignals@Base 12 ++ thread_setThis@Base 12 ++ thread_stackBottom@Base 12 ++ thread_stackTop@Base 12 ++ thread_suspendAll@Base 12 ++ thread_suspendHandler@Base 12 ++ thread_term@Base 12 ++ tipc_addr@Base 12 ++ tipc_cluster@Base 12 ++ tipc_node@Base 12 ++ tipc_zone@Base 12 diff --cc debian/libhwasan0.symbols index 0000000,0000000..473a53b new file mode 100644 --- /dev/null +++ b/debian/libhwasan0.symbols @@@ -1,0 -1,0 +1,1 @@@ ++libhwasan.so.0 #PACKAGE# #MINVER# diff --cc debian/libitm.symbols index 0000000,0000000..c97c8bc new file mode 100644 --- /dev/null +++ b/debian/libitm.symbols @@@ -1,0 -1,0 +1,3 @@@ ++libitm.so.1 #PACKAGE# #MINVER# ++ (symver)LIBITM_1.0 4.7 ++ (symver)LIBITM_1.1 6 diff --cc debian/liblsan0.symbols index 0000000,0000000..24eb209 new file mode 100644 --- /dev/null +++ b/debian/liblsan0.symbols @@@ -1,0 -1,0 +1,168 @@@ ++liblsan.so.0 liblsan0 #MINVER# ++ _ZdaPv@Base 4.9 ++ _ZdaPvRKSt9nothrow_t@Base 4.9 ++ _ZdaPvSt11align_val_t@Base 8 ++ _ZdaPvSt11align_val_tRKSt9nothrow_t@Base 8 ++ _ZdaPvm@Base 8 ++ _ZdaPvmSt11align_val_t@Base 8 ++ _ZdlPv@Base 4.9 ++ _ZdlPvRKSt9nothrow_t@Base 4.9 ++ _ZdlPvSt11align_val_t@Base 8 ++ _ZdlPvSt11align_val_tRKSt9nothrow_t@Base 8 ++ _ZdlPvm@Base 8 ++ _ZdlPvmSt11align_val_t@Base 8 ++ _Znam@Base 4.9 ++ _ZnamRKSt9nothrow_t@Base 4.9 ++ _ZnamSt11align_val_t@Base 8 ++ _ZnamSt11align_val_tRKSt9nothrow_t@Base 8 ++ _Znwm@Base 4.9 ++ _ZnwmRKSt9nothrow_t@Base 4.9 ++ _ZnwmSt11align_val_t@Base 8 ++ _ZnwmSt11align_val_tRKSt9nothrow_t@Base 8 ++ __asan_backtrace_alloc@Base 4.9 ++ __asan_backtrace_close@Base 4.9 ++ __asan_backtrace_create_state@Base 4.9 ++ __asan_backtrace_dwarf_add@Base 4.9 ++ __asan_backtrace_free@Base 4.9 ++ __asan_backtrace_get_view@Base 4.9 ++ __asan_backtrace_initialize@Base 4.9 ++ __asan_backtrace_open@Base 4.9 ++ __asan_backtrace_pcinfo@Base 4.9 ++ __asan_backtrace_qsort@Base 4.9 ++ __asan_backtrace_release_view@Base 4.9 ++ __asan_backtrace_syminfo@Base 4.9 ++ __asan_backtrace_syminfo_to_full_callback@Base 11 ++ __asan_backtrace_syminfo_to_full_error_callback@Base 11 ++ __asan_backtrace_uncompress_lzma@Base 11 ++ __asan_backtrace_uncompress_zdebug@Base 8 ++ __asan_backtrace_vector_finish@Base 4.9 ++ __asan_backtrace_vector_grow@Base 4.9 ++ __asan_backtrace_vector_release@Base 4.9 ++ __asan_cplus_demangle_builtin_types@Base 4.9 ++ __asan_cplus_demangle_fill_ctor@Base 4.9 ++ __asan_cplus_demangle_fill_dtor@Base 4.9 ++ __asan_cplus_demangle_fill_extended_operator@Base 4.9 ++ __asan_cplus_demangle_fill_name@Base 4.9 ++ __asan_cplus_demangle_init_info@Base 4.9 ++ __asan_cplus_demangle_mangled_name@Base 4.9 ++ __asan_cplus_demangle_operators@Base 4.9 ++ __asan_cplus_demangle_print@Base 4.9 ++ __asan_cplus_demangle_print_callback@Base 4.9 ++ __asan_cplus_demangle_type@Base 4.9 ++ __asan_cplus_demangle_v3@Base 4.9 ++ __asan_cplus_demangle_v3_callback@Base 4.9 ++ __asan_internal_memcmp@Base 4.9 ++ __asan_internal_memcpy@Base 4.9 ++ __asan_internal_memset@Base 4.9 ++ __asan_internal_strcmp@Base 4.9 ++ __asan_internal_strlen@Base 4.9 ++ __asan_internal_strncmp@Base 4.9 ++ __asan_internal_strnlen@Base 4.9 ++ __asan_is_gnu_v3_mangled_ctor@Base 4.9 ++ __asan_is_gnu_v3_mangled_dtor@Base 4.9 ++ __asan_java_demangle_v3@Base 4.9 ++ __asan_java_demangle_v3_callback@Base 4.9 ++ __interceptor___libc_memalign@Base 4.9 ++ __interceptor__exit@Base 8 ++ __interceptor_aligned_alloc@Base 5 ++ __interceptor_calloc@Base 4.9 ++ __interceptor_cfree@Base 4.9 ++ __interceptor_free@Base 4.9 ++ __interceptor_mallinfo@Base 4.9 ++ __interceptor_malloc@Base 4.9 ++ __interceptor_malloc_usable_size@Base 4.9 ++ __interceptor_mallopt@Base 4.9 ++ __interceptor_mcheck@Base 8 ++ __interceptor_mcheck_pedantic@Base 8 ++ __interceptor_memalign@Base 4.9 ++ __interceptor_mprobe@Base 8 ++ __interceptor_posix_memalign@Base 4.9 ++ __interceptor_pthread_create@Base 4.9 ++ __interceptor_pthread_detach@Base 11 ++ __interceptor_pthread_join@Base 4.9 ++ __interceptor_pvalloc@Base 4.9 ++ __interceptor_realloc@Base 4.9 ++ __interceptor_reallocarray@Base 10 ++ __interceptor_sigaction@Base 8 ++ __interceptor_signal@Base 8 ++ __interceptor_strerror@Base 10 ++ __interceptor_valloc@Base 4.9 ++ __libc_memalign@Base 4.9 ++ __lsan_default_options@Base 11 ++ __lsan_disable@Base 4.9 ++ __lsan_do_leak_check@Base 4.9 ++ __lsan_do_recoverable_leak_check@Base 6 ++ __lsan_enable@Base 4.9 ++ __lsan_ignore_object@Base 4.9 ++ __lsan_init@Base 8 ++ __lsan_register_root_region@Base 5 ++ __lsan_unregister_root_region@Base 5 ++ __sancov_default_options@Base 8 ++ __sancov_lowest_stack@Base 8 ++ __sanitizer_acquire_crash_state@Base 9 ++ __sanitizer_cov_8bit_counters_init@Base 8 ++ __sanitizer_cov_bool_flag_init@Base 11 ++ __sanitizer_cov_dump@Base 4.9 ++ __sanitizer_cov_pcs_init@Base 8 ++ __sanitizer_cov_reset@Base 8 ++ __sanitizer_cov_trace_cmp1@Base 7 ++ __sanitizer_cov_trace_cmp2@Base 7 ++ __sanitizer_cov_trace_cmp4@Base 7 ++ __sanitizer_cov_trace_cmp8@Base 7 ++ __sanitizer_cov_trace_cmp@Base 6 ++ __sanitizer_cov_trace_const_cmp1@Base 8 ++ __sanitizer_cov_trace_const_cmp2@Base 8 ++ __sanitizer_cov_trace_const_cmp4@Base 8 ++ __sanitizer_cov_trace_const_cmp8@Base 8 ++ __sanitizer_cov_trace_div4@Base 7 ++ __sanitizer_cov_trace_div8@Base 7 ++ __sanitizer_cov_trace_gep@Base 7 ++ __sanitizer_cov_trace_pc_guard@Base 7 ++ __sanitizer_cov_trace_pc_guard_init@Base 7 ++ __sanitizer_cov_trace_pc_indir@Base 7 ++ __sanitizer_cov_trace_switch@Base 6 ++ __sanitizer_dump_coverage@Base 8 ++ __sanitizer_dump_trace_pc_guard_coverage@Base 8 ++ __sanitizer_get_allocated_size@Base 5 ++ __sanitizer_get_current_allocated_bytes@Base 5 ++ __sanitizer_get_estimated_allocated_size@Base 5 ++ __sanitizer_get_free_bytes@Base 5 ++ __sanitizer_get_heap_size@Base 5 ++ __sanitizer_get_module_and_offset_for_pc@Base 8 ++ __sanitizer_get_ownership@Base 5 ++ __sanitizer_get_report_path@Base 12 ++ __sanitizer_get_unmapped_bytes@Base 5 ++ __sanitizer_install_malloc_and_free_hooks@Base 7 ++ __sanitizer_on_print@Base 10 ++ __sanitizer_print_stack_trace@Base 5 ++ __sanitizer_report_error_summary@Base 4.9 ++ __sanitizer_sandbox_on_notify@Base 4.9 ++ __sanitizer_set_death_callback@Base 6 ++ __sanitizer_set_report_fd@Base 7 ++ __sanitizer_set_report_path@Base 4.9 ++ __sanitizer_symbolize_global@Base 7 ++ __sanitizer_symbolize_pc@Base 7 ++ _exit@Base 8 ++ aligned_alloc@Base 5 ++ calloc@Base 4.9 ++ cfree@Base 4.9 ++ free@Base 4.9 ++ mallinfo@Base 4.9 ++ malloc@Base 4.9 ++ malloc_usable_size@Base 4.9 ++ mallopt@Base 4.9 ++ mcheck@Base 8 ++ mcheck_pedantic@Base 8 ++ memalign@Base 4.9 ++ mprobe@Base 8 ++ posix_memalign@Base 4.9 ++ pthread_create@Base 4.9 ++ pthread_detach@Base 11 ++ pthread_join@Base 4.9 ++ pvalloc@Base 4.9 ++ realloc@Base 4.9 ++ reallocarray@Base 10 ++ sigaction@Base 8 ++ signal@Base 8 ++ strerror@Base 10 ++ valloc@Base 4.9 diff --cc debian/libobjc.symbols index 0000000,0000000..5b1ed43 new file mode 100644 --- /dev/null +++ b/debian/libobjc.symbols @@@ -1,0 -1,0 +1,9 @@@ ++libobjc.so.4 #PACKAGE# #MINVER# ++#include "libobjc.symbols.common" ++ __gnu_objc_personality_v0@Base 4.2.1 ++ (arch=armel armhf)__objc_exception_class@Base 4.3.0 ++libobjc_gc.so.4 #PACKAGE# #MINVER# ++#include "libobjc.symbols.common" ++(optional)#include "libobjc.symbols.gc" ++ __gnu_objc_personality_v0@Base 4.2.1 ++ (arch=armel armhf)__objc_exception_class@Base 4.3.0 diff --cc debian/libobjc.symbols.common index 0000000,0000000..2ec5ecc new file mode 100644 --- /dev/null +++ b/debian/libobjc.symbols.common @@@ -1,0 -1,0 +1,205 @@@ ++ __objc_accessors_init@Base 4.6 ++ __objc_add_class_to_hash@Base 4.2.1 ++ __objc_class_links_resolved@Base 4.2.1 ++ __objc_class_name_NXConstantString@Base 4.2.1 ++ __objc_class_name_Object@Base 4.2.1 ++ __objc_class_name_Protocol@Base 4.2.1 ++ __objc_dangling_categories@Base 4.2.1 ++ __objc_exec_class@Base 4.2.1 ++ __objc_force_linking@Base 4.2.1 ++ __objc_generate_gc_type_description@Base 4.2.1 ++ __objc_get_forward_imp@Base 4.2.1 ++ __objc_init_class@Base 4.6 ++ __objc_init_class_tables@Base 4.2.1 ++ __objc_init_dispatch_tables@Base 4.2.1 ++ __objc_init_selector_tables@Base 4.2.1 ++ __objc_init_thread_system@Base 4.2.1 ++ __objc_install_premature_dtable@Base 4.2.1 ++ __objc_is_multi_threaded@Base 4.2.1 ++ __objc_linking@Base 4.2.1 ++ __objc_msg_forward@Base 4.2.1 ++ __objc_msg_forward2@Base 4.3 ++ __objc_print_dtable_stats@Base 4.2.1 ++ __objc_protocols_add_protocol@Base 4.6 ++ __objc_protocols_init@Base 4.6 ++ __objc_register_instance_methods_to_class@Base 4.2.1 ++ __objc_register_selectors_from_class@Base 4.2.1 ++ __objc_register_selectors_from_description_list@Base 4.6 ++ __objc_register_selectors_from_list@Base 4.2.1 ++ __objc_register_selectors_from_module@Base 4.6 ++ __objc_resolve_class_links@Base 4.2.1 ++ __objc_responds_to@Base 4.2.1 ++ __objc_runtime_mutex@Base 4.2.1 ++ __objc_runtime_threads_alive@Base 4.2.1 ++ __objc_selector_max_index@Base 4.2.1 ++ __objc_sparse2_id@Base 4.2.1 ++ __objc_sync_init@Base 4.6 ++ __objc_thread_exit_status@Base 4.2.1 ++ __objc_uninstalled_dtable@Base 4.2.1 ++ __objc_update_classes_with_methods@Base 4.6 ++ __objc_update_dispatch_table_for_class@Base 4.2.1 ++ _objc_abort@Base 4.6 ++ _objc_became_multi_threaded@Base 4.2.1 ++ _objc_load_callback@Base 4.2.1 ++ _objc_lookup_class@Base 4.6 ++ class_addIvar@Base 4.6 ++ class_addMethod@Base 4.6 ++ class_addProtocol@Base 4.6 ++ class_add_method_list@Base 4.2.1 ++ class_conformsToProtocol@Base 4.6 ++ class_copyIvarList@Base 4.6 ++ class_copyMethodList@Base 4.6 ++ class_copyPropertyList@Base 4.6 ++ class_copyProtocolList@Base 4.6 ++ class_createInstance@Base 4.6 ++ class_getClassMethod@Base 4.6 ++ class_getClassVariable@Base 4.6 ++ class_getInstanceMethod@Base 4.6 ++ class_getInstanceSize@Base 4.6 ++ class_getInstanceVariable@Base 4.6 ++ class_getIvarLayout@Base 4.6 ++ class_getMethodImplementation@Base 4.6 ++ class_getName@Base 4.6 ++ class_getProperty@Base 4.6 ++ class_getSuperclass@Base 4.6 ++ class_getVersion@Base 4.6 ++ class_getWeakIvarLayout@Base 4.6 ++ class_isMetaClass@Base 4.6 ++ class_ivar_set_gcinvisible@Base 4.2.1 ++ class_replaceMethod@Base 4.6 ++ class_respondsToSelector@Base 4.6 ++ class_setIvarLayout@Base 4.6 ++ class_setVersion@Base 4.6 ++ class_setWeakIvarLayout@Base 4.6 ++ get_imp@Base 4.2.1 ++ idxsize@Base 4.2.1 ++ ivar_getName@Base 4.6 ++ ivar_getOffset@Base 4.6 ++ ivar_getTypeEncoding@Base 4.6 ++ method_copyArgumentType@Base 4.6 ++ method_copyReturnType@Base 4.6 ++ method_exchangeImplementations@Base 4.6 ++ method_getArgumentType@Base 4.6 ++ method_getDescription@Base 4.6 ++ method_getImplementation@Base 4.6 ++ method_getName@Base 4.6 ++ method_getNumberOfArguments@Base 4.6 ++ method_getReturnType@Base 4.6 ++ method_getTypeEncoding@Base 4.6 ++ method_get_imp@Base 4.6 ++ method_setImplementation@Base 4.6 ++ narrays@Base 4.2.1 ++ nbuckets@Base 4.2.1 ++ nil_method@Base 4.2.1 ++ nindices@Base 4.2.1 ++ objc_aligned_size@Base 4.2.1 ++ objc_alignof_type@Base 4.2.1 ++ objc_allocateClassPair@Base 4.6 ++ objc_atomic_malloc@Base 4.2.1 ++ objc_calloc@Base 4.2.1 ++ objc_condition_allocate@Base 4.2.1 ++ objc_condition_broadcast@Base 4.2.1 ++ objc_condition_deallocate@Base 4.2.1 ++ objc_condition_signal@Base 4.2.1 ++ objc_condition_wait@Base 4.2.1 ++ objc_copyProtocolList@Base 4.6 ++ objc_copyStruct@Base 4.6 ++ objc_disposeClassPair@Base 4.6 ++ objc_enumerationMutation@Base 4.6 ++ objc_exception_throw@Base 4.2.1 ++ objc_free@Base 4.2.1 ++ objc_getClass@Base 4.6 ++ objc_getClassList@Base 4.6 ++ objc_getMetaClass@Base 4.6 ++ objc_getProperty@Base 4.6 ++ objc_getPropertyStruct@Base 4.6 ++ objc_getProtocol@Base 4.6 ++ objc_getRequiredClass@Base 4.6 ++ objc_get_class@Base 4.2.1 ++ objc_get_meta_class@Base 4.2.1 ++ objc_get_type_qualifiers@Base 4.2.1 ++ objc_hash_add@Base 4.2.1 ++ objc_hash_delete@Base 4.2.1 ++ objc_hash_is_key_in_hash@Base 4.2.1 ++ objc_hash_new@Base 4.2.1 ++ objc_hash_next@Base 4.2.1 ++ objc_hash_remove@Base 4.2.1 ++ objc_hash_value_for_key@Base 4.2.1 ++ objc_layout_finish_structure@Base 4.2.1 ++ objc_layout_structure@Base 4.2.1 ++ objc_layout_structure_get_info@Base 4.2.1 ++ objc_layout_structure_next_member@Base 4.2.1 ++ objc_lookUpClass@Base 4.6 ++ objc_lookup_class@Base 4.2.1 ++ objc_malloc@Base 4.2.1 ++ objc_msg_lookup@Base 4.2.1 ++ objc_msg_lookup_super@Base 4.2.1 ++ objc_mutex_allocate@Base 4.2.1 ++ objc_mutex_deallocate@Base 4.2.1 ++ objc_mutex_lock@Base 4.2.1 ++ objc_mutex_trylock@Base 4.2.1 ++ objc_mutex_unlock@Base 4.2.1 ++ objc_promoted_size@Base 4.2.1 ++ objc_realloc@Base 4.2.1 ++ objc_registerClassPair@Base 4.6 ++ objc_setEnumerationMutationHandler@Base 4.6 ++ objc_setExceptionMatcher@Base 4.6 ++ objc_setGetUnknownClassHandler@Base 4.6 ++ objc_setProperty@Base 4.6 ++ objc_setPropertyStruct@Base 4.6 ++ objc_setUncaughtExceptionHandler@Base 4.6 ++ objc_set_thread_callback@Base 4.2.1 ++ objc_sizeof_type@Base 4.2.1 ++ objc_skip_argspec@Base 4.2.1 ++ objc_skip_offset@Base 4.2.1 ++ objc_skip_type_qualifiers@Base 4.2.1 ++ objc_skip_typespec@Base 4.2.1 ++ objc_sync_enter@Base 4.6 ++ objc_sync_exit@Base 4.6 ++ objc_thread_add@Base 4.2.1 ++ objc_thread_detach@Base 4.2.1 ++ objc_thread_exit@Base 4.2.1 ++ objc_thread_get_data@Base 4.2.1 ++ objc_thread_get_priority@Base 4.2.1 ++ objc_thread_id@Base 4.2.1 ++ objc_thread_remove@Base 4.2.1 ++ objc_thread_set_data@Base 4.2.1 ++ objc_thread_set_priority@Base 4.2.1 ++ objc_thread_yield@Base 4.2.1 ++ object_copy@Base 4.2.1 ++ object_dispose@Base 4.2.1 ++ object_getClassName@Base 4.6 ++ object_getIndexedIvars@Base 4.6 ++ object_getInstanceVariable@Base 4.6 ++ object_getIvar@Base 4.6 ++ object_setClass@Base 4.6 ++ object_setInstanceVariable@Base 4.6 ++ object_setIvar@Base 4.6 ++ property_getAttributes@Base 4.6 ++ property_getName@Base 4.6 ++ protocol_conformsToProtocol@Base 4.6 ++ protocol_copyMethodDescriptionList@Base 4.6 ++ protocol_copyPropertyList@Base 4.6 ++ protocol_copyProtocolList@Base 4.6 ++ protocol_getMethodDescription@Base 4.6 ++ protocol_getName@Base 4.6 ++ protocol_getProperty@Base 4.6 ++ protocol_isEqual@Base 4.6 ++ sarray_at_put@Base 4.2.1 ++ sarray_at_put_safe@Base 4.2.1 ++ sarray_free@Base 4.2.1 ++ sarray_lazy_copy@Base 4.2.1 ++ sarray_new@Base 4.2.1 ++ sarray_realloc@Base 4.2.1 ++ sarray_remove_garbage@Base 4.2.1 ++ search_for_method_in_list@Base 4.2.1 ++ sel_copyTypedSelectorList@Base 4.6 ++ sel_getName@Base 4.6 ++ sel_getTypeEncoding@Base 4.6 ++ sel_getTypedSelector@Base 4.6 ++ sel_getUid@Base 4.6 ++ sel_get_any_uid@Base 4.2.1 ++ sel_isEqual@Base 4.6 ++ sel_is_mapped@Base 4.2.1 ++ sel_registerName@Base 4.6 ++ sel_registerTypedName@Base 4.6 diff --cc debian/libobjc.symbols.gc index 0000000,0000000..87681af new file mode 100644 --- /dev/null +++ b/debian/libobjc.symbols.gc @@@ -1,0 -1,0 +1,522 @@@ ++ async_set_pht_entry_from_index@Base 4.2.1 ++ free_list_index_of@Base 4.2.1 ++ suspend_self@Base 4.2.1 ++ GC_abort@Base 6 ++ GC_acquire_mark_lock@Base 6 ++ GC_add_ext_descriptor@Base 6 ++ GC_add_leaked@Base 6 ++ GC_add_map_entry@Base 6 ++ GC_add_roots@Base 6 ++ GC_add_roots_inner@Base 6 ++ GC_add_smashed@Base 6 ++ GC_add_to_black_list_normal@Base 6 ++ GC_add_to_black_list_stack@Base 6 ++ GC_add_to_fl@Base 6 ++ GC_add_to_heap@Base 6 ++ GC_adj_words_allocd@Base 6 ++ GC_all_bottom_indices@Base 6 ++ GC_all_bottom_indices_end@Base 6 ++ GC_all_interior_pointers@Base 6 ++ GC_alloc_large@Base 6 ++ GC_alloc_large_and_clear@Base 6 ++ GC_alloc_reclaim_list@Base 6 ++ GC_allocate_ml@Base 6 ++ GC_allochblk@Base 6 ++ GC_allochblk_nth@Base 6 ++ GC_allocobj@Base 6 ++ GC_aobjfreelist_ptr@Base 6 ++ GC_apply_to_all_blocks@Base 6 ++ GC_apply_to_maps@Base 6 ++ GC_approx_sp@Base 6 ++ GC_arobjfreelist@Base 6 ++ GC_array_kind@Base 6 ++ GC_array_mark_proc@Base 6 ++ GC_array_mark_proc_index@Base 6 ++ GC_arrays@Base 6 ++ GC_auobjfreelist_ptr@Base 6 ++ GC_avail_descr@Base 6 ++ GC_base@Base 6 ++ GC_begin_syscall@Base 6 ++ GC_bl_init@Base 6 ++ GC_black_list_spacing@Base 6 ++ GC_block_count@Base 6 ++ GC_block_empty@Base 6 ++ GC_block_nearly_full1@Base 6 ++ GC_block_nearly_full3@Base 6 ++ GC_block_nearly_full@Base 6 ++ GC_block_was_dirty@Base 6 ++ GC_bm_table@Base 6 ++ GC_brief_async_signal_safe_sleep@Base 6 ++ GC_build_fl1@Base 6 ++ GC_build_fl2@Base 6 ++ GC_build_fl4@Base 6 ++ GC_build_fl@Base 6 ++ GC_build_fl_clear2@Base 6 ++ GC_build_fl_clear3@Base 6 ++ GC_build_fl_clear4@Base 6 ++ GC_call_with_alloc_lock@Base 6 ++ GC_calloc_explicitly_typed@Base 6 ++ GC_change_stubborn@Base 6 ++ GC_check_annotated_obj@Base 6 ++ GC_check_heap@Base 6 ++ GC_check_heap_block@Base 6 ++ GC_check_heap_proc@Base 6 ++ GC_clear_a_few_frames@Base 6 ++ GC_clear_bl@Base 6 ++ GC_clear_fl_links@Base 6 ++ GC_clear_fl_marks@Base 6 ++ GC_clear_hdr_marks@Base 6 ++ GC_clear_mark_bit@Base 6 ++ GC_clear_marks@Base 6 ++ GC_clear_roots@Base 6 ++ GC_clear_stack@Base 6 ++ GC_clear_stack_inner@Base 6 ++ GC_collect_a_little@Base 6 ++ GC_collect_a_little_inner@Base 6 ++ GC_collect_or_expand@Base 6 ++ GC_collecting@Base 6 ++ GC_collection_in_progress@Base 6 ++ GC_cond_register_dynamic_libraries@Base 6 ++ GC_continue_reclaim@Base 6 ++ GC_copy_bl@Base 6 ++ GC_copyright@Base 6 ++ GC_current_warn_proc@Base 6 ++ GC_data_start@Base 6 ++ GC_debug_change_stubborn@Base 6 ++ GC_debug_end_stubborn_change@Base 6 ++ GC_debug_free@Base 6 ++ GC_debug_free_inner@Base 6 ++ GC_debug_gcj_fast_malloc@Base 6 ++ GC_debug_gcj_malloc@Base 6 ++ GC_debug_header_size@Base 6 ++ GC_debug_invoke_finalizer@Base 6 ++ GC_debug_malloc@Base 6 ++ GC_debug_malloc_atomic@Base 6 ++ GC_debug_malloc_atomic_ignore_off_page@Base 6 ++ GC_debug_malloc_atomic_uncollectable@Base 6 ++ GC_debug_malloc_ignore_off_page@Base 6 ++ GC_debug_malloc_replacement@Base 6 ++ GC_debug_malloc_stubborn@Base 6 ++ GC_debug_malloc_uncollectable@Base 6 ++ GC_debug_print_heap_obj_proc@Base 6 ++ GC_debug_realloc@Base 6 ++ GC_debug_realloc_replacement@Base 6 ++ GC_debug_register_displacement@Base 6 ++ GC_debug_register_finalizer@Base 6 ++ GC_debug_register_finalizer_ignore_self@Base 6 ++ GC_debug_register_finalizer_no_order@Base 6 ++ GC_debug_register_finalizer_unreachable@Base 6 ++ GC_debugging_started@Base 6 ++ GC_default_is_valid_displacement_print_proc@Base 6 ++ GC_default_is_visible_print_proc@Base 6 ++ GC_default_oom_fn@Base 6 ++ GC_default_print_heap_obj_proc@Base 6 ++ GC_default_push_other_roots@Base 6 ++ GC_default_same_obj_print_proc@Base 6 ++ GC_default_warn_proc@Base 6 ++ GC_deficit@Base 6 ++ GC_delete_gc_thread@Base 6 ++ GC_delete_thread@Base 6 ++ GC_descr_obj_size@Base 6 ++ GC_destroy_thread_local@Base 6 ++ GC_dirty_init@Base 6 ++ GC_dirty_maintained@Base 6 ++ GC_disable@Base 6 ++ GC_disable_signals@Base 6 ++ GC_dl_entries@Base 6 ++ GC_dlopen@Base 6 ++ GC_do_nothing@Base 6 ++ GC_dont_expand@Base 6 ++ GC_dont_gc@Base 6 ++ GC_dont_precollect@Base 6 ++ GC_double_descr@Base 6 ++ GC_dump@Base 6 ++ GC_dump_finalization@Base 6 ++ GC_dump_regions@Base 6 ++ GC_dump_regularly@Base 6 ++ GC_ed_size@Base 6 ++ GC_enable@Base 6 ++ GC_enable_incremental@Base 6 ++ GC_enable_signals@Base 6 ++ GC_end_blocking@Base 6 ++ GC_end_stubborn_change@Base 6 ++ GC_end_syscall@Base 6 ++ GC_enqueue_all_finalizers@Base 6 ++ GC_eobjfreelist@Base 6 ++ GC_err_printf@Base 6 ++ GC_err_puts@Base 6 ++ GC_err_write@Base 6 ++ GC_excl_table_entries@Base 6 ++ GC_exclude_static_roots@Base 6 ++ GC_exit_check@Base 6 ++ GC_expand_hp@Base 6 ++ GC_expand_hp_inner@Base 6 ++ GC_explicit_kind@Base 6 ++ GC_explicit_typing_initialized@Base 6 ++ GC_ext_descriptors@Base 6 ++ GC_extend_size_map@Base 6 ++ GC_fail_count@Base 6 ++ GC_fault_handler@Base 6 ++ GC_finalization_failures@Base 6 ++ GC_finalize@Base 6 ++ GC_finalize_all@Base 6 ++ GC_finalize_now@Base 6 ++ GC_finalize_on_demand@Base 6 ++ GC_finalizer_notifier@Base 6 ++ GC_find_header@Base 6 ++ GC_find_leak@Base 6 ++ GC_find_limit@Base 6 ++ GC_find_start@Base 6 ++ GC_finish_collection@Base 6 ++ GC_fl_builder_count@Base 6 ++ GC_fo_entries@Base 6 ++ GC_free@Base 6 ++ GC_free_block_ending_at@Base 6 ++ GC_free_bytes@Base 6 ++ GC_free_inner@Base 6 ++ GC_free_space_divisor@Base 6 ++ GC_freehblk@Base 6 ++ GC_freehblk_ptr@Base 6 ++ GC_full_freq@Base 6 ++ GC_gc_no@Base 6 ++ GC_gcj_debug_kind@Base 6 ++ GC_gcj_fast_malloc@Base 6 ++ GC_gcj_kind@Base 6 ++ GC_gcj_malloc@Base 6 ++ GC_gcj_malloc_ignore_off_page@Base 6 ++ GC_gcj_malloc_initialized@Base 6 ++ GC_gcjdebugobjfreelist@Base 6 ++ GC_gcjobjfreelist@Base 6 ++ GC_gcollect@Base 6 ++ GC_general_register_disappearing_link@Base 6 ++ GC_generic_lock@Base 6 ++ GC_generic_malloc@Base 6 ++ GC_generic_malloc_ignore_off_page@Base 6 ++ GC_generic_malloc_inner@Base 6 ++ GC_generic_malloc_inner_ignore_off_page@Base 6 ++ GC_generic_malloc_many@Base 6 ++ GC_generic_malloc_words_small@Base 6 ++ GC_generic_malloc_words_small_inner@Base 6 ++ GC_generic_or_special_malloc@Base 6 ++ GC_generic_push_regs@Base 6 ++ GC_get_bytes_since_gc@Base 6 ++ GC_get_first_part@Base 6 ++ GC_get_free_bytes@Base 6 ++ GC_get_heap_size@Base 6 ++ GC_get_nprocs@Base 6 ++ GC_get_stack_base@Base 6 ++ GC_get_thread_stack_base@Base 6 ++ GC_get_total_bytes@Base 6 ++ GC_greatest_plausible_heap_addr@Base 6 ++ GC_grow_table@Base 6 ++ GC_has_other_debug_info@Base 6 ++ GC_have_errors@Base 6 ++ GC_hblk_fl_from_blocks@Base 6 ++ GC_hblkfreelist@Base 6 ++ GC_hdr_cache_hits@Base 6 ++ GC_hdr_cache_misses@Base 6 ++ GC_high_water@Base 6 ++ GC_ignore_self_finalize_mark_proc@Base 6 ++ GC_in_thread_creation@Base 6 ++ GC_incomplete_normal_bl@Base 6 ++ GC_incomplete_stack_bl@Base 6 ++ GC_incr_mem_freed@Base 6 ++ GC_incr_words_allocd@Base 6 ++ GC_incremental@Base 6 ++ GC_incremental_protection_needs@Base 6 ++ GC_init@Base 6 ++ GC_init_explicit_typing@Base 6 ++ GC_init_gcj_malloc@Base 6 ++ GC_init_headers@Base 6 ++ GC_init_inner@Base 6 ++ GC_init_linux_data_start@Base 6 ++ GC_init_parallel@Base 6 ++ GC_init_size_map@Base 6 ++ GC_init_thread_local@Base 6 ++ GC_initiate_gc@Base 6 ++ GC_install_counts@Base 6 ++ GC_install_header@Base 6 ++ GC_invalid_header@Base 6 ++ GC_invalid_map@Base 6 ++ GC_invalidate_map@Base 6 ++ GC_invalidate_mark_state@Base 6 ++ GC_invoke_finalizers@Base 6 ++ GC_is_black_listed@Base 6 ++ GC_is_fresh@Base 6 ++ GC_is_full_gc@Base 6 ++ GC_is_initialized@Base 6 ++ GC_is_marked@Base 6 ++ GC_is_static_root@Base 6 ++ GC_is_thread_suspended@Base 6 ++ GC_is_valid_displacement@Base 6 ++ GC_is_valid_displacement_print_proc@Base 6 ++ GC_is_visible@Base 6 ++ GC_is_visible_print_proc@Base 6 ++ GC_java_finalization@Base 6 ++ GC_jmp_buf@Base 6 ++ GC_key_create@Base 6 ++ GC_large_alloc_warn_interval@Base 6 ++ GC_large_alloc_warn_suppressed@Base 6 ++ GC_leaked@Base 6 ++ GC_least_plausible_heap_addr@Base 6 ++ GC_linux_stack_base@Base 6 ++ GC_local_gcj_malloc@Base 6 ++ GC_local_malloc@Base 6 ++ GC_local_malloc_atomic@Base 6 ++ GC_lock@Base 6 ++ GC_lock_holder@Base 6 ++ GC_lookup_thread@Base 6 ++ GC_make_array_descriptor@Base 6 ++ GC_make_closure@Base 6 ++ GC_make_descriptor@Base 6 ++ GC_make_sequence_descriptor@Base 6 ++ GC_malloc@Base 6 ++ GC_malloc_atomic@Base 6 ++ GC_malloc_atomic_ignore_off_page@Base 6 ++ GC_malloc_atomic_uncollectable@Base 6 ++ GC_malloc_explicitly_typed@Base 6 ++ GC_malloc_explicitly_typed_ignore_off_page@Base 6 ++ GC_malloc_ignore_off_page@Base 6 ++ GC_malloc_many@Base 6 ++ GC_malloc_stubborn@Base 6 ++ GC_malloc_uncollectable@Base 6 ++ GC_mark_and_push@Base 6 ++ GC_mark_and_push_stack@Base 6 ++ GC_mark_from@Base 6 ++ GC_mark_init@Base 6 ++ GC_mark_some@Base 6 ++ GC_mark_stack@Base 6 ++ GC_mark_stack_empty@Base 6 ++ GC_mark_stack_limit@Base 6 ++ GC_mark_stack_size@Base 6 ++ GC_mark_stack_too_small@Base 6 ++ GC_mark_stack_top@Base 6 ++ GC_mark_state@Base 6 ++ GC_mark_thread_local_free_lists@Base 6 ++ GC_max@Base 6 ++ GC_max_retries@Base 6 ++ GC_maybe_gc@Base 6 ++ GC_mem_found@Base 6 ++ GC_memalign@Base 6 ++ GC_min@Base 6 ++ GC_min_sp@Base 6 ++ GC_n_attempts@Base 6 ++ GC_n_heap_sects@Base 6 ++ GC_n_kinds@Base 6 ++ GC_n_leaked@Base 6 ++ GC_n_mark_procs@Base 6 ++ GC_n_rescuing_pages@Base 6 ++ GC_n_set_marks@Base 6 ++ GC_n_smashed@Base 6 ++ GC_need_full_gc@Base 6 ++ GC_never_stop_func@Base 6 ++ GC_new_free_list@Base 6 ++ GC_new_free_list_inner@Base 6 ++ GC_new_hblk@Base 6 ++ GC_new_kind@Base 6 ++ GC_new_kind_inner@Base 6 ++ GC_new_proc@Base 6 ++ GC_new_proc_inner@Base 6 ++ GC_new_thread@Base 6 ++ GC_next_exclusion@Base 6 ++ GC_next_used_block@Base 6 ++ GC_no_dls@Base 6 ++ GC_non_gc_bytes@Base 6 ++ GC_noop1@Base 6 ++ GC_noop@Base 6 ++ GC_normal_finalize_mark_proc@Base 6 ++ GC_notify_all_builder@Base 6 ++ GC_notify_full_gc@Base 6 ++ GC_notify_or_invoke_finalizers@Base 6 ++ GC_nprocs@Base 6 ++ GC_null_finalize_mark_proc@Base 6 ++ GC_number_stack_black_listed@Base 6 ++ GC_obj_kinds@Base 6 ++ GC_objects_are_marked@Base 6 ++ GC_objfreelist_ptr@Base 6 ++ GC_old_bus_handler@Base 6 ++ GC_old_normal_bl@Base 6 ++ GC_old_segv_handler@Base 6 ++ GC_old_stack_bl@Base 6 ++ GC_on_stack@Base 6 ++ GC_oom_fn@Base 6 ++ GC_page_size@Base 6 ++ GC_page_was_dirty@Base 6 ++ GC_page_was_ever_dirty@Base 6 ++ GC_parallel@Base 6 ++ GC_pause@Base 6 ++ GC_post_incr@Base 6 ++ GC_pre_incr@Base 6 ++ GC_prev_block@Base 6 ++ GC_print_address_map@Base 6 ++ GC_print_all_errors@Base 6 ++ GC_print_all_smashed@Base 6 ++ GC_print_all_smashed_proc@Base 6 ++ GC_print_back_height@Base 6 ++ GC_print_block_descr@Base 6 ++ GC_print_block_list@Base 6 ++ GC_print_finalization_stats@Base 6 ++ GC_print_hblkfreelist@Base 6 ++ GC_print_heap_obj@Base 6 ++ GC_print_heap_sects@Base 6 ++ GC_print_obj@Base 6 ++ GC_print_smashed_obj@Base 6 ++ GC_print_source_ptr@Base 6 ++ GC_print_static_roots@Base 6 ++ GC_print_stats@Base 6 ++ GC_print_type@Base 6 ++ GC_printf@Base 6 ++ GC_project2@Base 6 ++ GC_promote_black_lists@Base 6 ++ GC_protect_heap@Base 6 ++ GC_pthread_create@Base 6 ++ GC_pthread_detach@Base 6 ++ GC_pthread_join@Base 6 ++ GC_pthread_sigmask@Base 6 ++ GC_push_all@Base 6 ++ GC_push_all_eager@Base 6 ++ GC_push_all_stack@Base 6 ++ GC_push_all_stacks@Base 6 ++ GC_push_complex_descriptor@Base 6 ++ GC_push_conditional@Base 6 ++ GC_push_conditional_with_exclusions@Base 6 ++ GC_push_current_stack@Base 6 ++ GC_push_finalizer_structures@Base 6 ++ GC_push_gc_structures@Base 6 ++ GC_push_marked1@Base 6 ++ GC_push_marked2@Base 6 ++ GC_push_marked4@Base 6 ++ GC_push_marked@Base 6 ++ GC_push_next_marked@Base 6 ++ GC_push_next_marked_dirty@Base 6 ++ GC_push_next_marked_uncollectable@Base 6 ++ GC_push_one@Base 6 ++ GC_push_other_roots@Base 6 ++ GC_push_roots@Base 6 ++ GC_push_selected@Base 6 ++ GC_push_stubborn_structures@Base 6 ++ GC_push_thread_structures@Base 6 ++ GC_quiet@Base 6 ++ GC_read_dirty@Base 6 ++ GC_realloc@Base 6 ++ GC_reclaim1@Base 6 ++ GC_reclaim_all@Base 6 ++ GC_reclaim_block@Base 6 ++ GC_reclaim_check@Base 6 ++ GC_reclaim_clear2@Base 6 ++ GC_reclaim_clear4@Base 6 ++ GC_reclaim_clear@Base 6 ++ GC_reclaim_generic@Base 6 ++ GC_reclaim_small_nonempty_block@Base 6 ++ GC_reclaim_uninit2@Base 6 ++ GC_reclaim_uninit4@Base 6 ++ GC_reclaim_uninit@Base 6 ++ GC_register_data_segments@Base 6 ++ GC_register_describe_type_fn@Base 6 ++ GC_register_disappearing_link@Base 6 ++ GC_register_displacement@Base 6 ++ GC_register_displacement_inner@Base 6 ++ GC_register_dynamic_libraries@Base 6 ++ GC_register_dynamic_libraries_dl_iterate_phdr@Base 6 ++ GC_register_finalizer@Base 6 ++ GC_register_finalizer_ignore_self@Base 6 ++ GC_register_finalizer_inner@Base 6 ++ GC_register_finalizer_no_order@Base 6 ++ GC_register_finalizer_unreachable@Base 6 ++ GC_register_has_static_roots_callback@Base 6 ++ GC_register_main_static_data@Base 6 ++ GC_register_my_thread@Base 6 ++ GC_release_mark_lock@Base 6 ++ GC_remove_allowed_signals@Base 6 ++ GC_remove_counts@Base 6 ++ GC_remove_from_fl@Base 6 ++ GC_remove_header@Base 6 ++ GC_remove_protection@Base 6 ++ GC_remove_roots@Base 6 ++ GC_remove_roots_inner@Base 6 ++ GC_remove_specific@Base 6 ++ GC_remove_tmp_roots@Base 6 ++ GC_repeat_read@Base 6 ++ GC_reset_fault_handler@Base 6 ++ GC_restart_handler@Base 6 ++ GC_resume_thread@Base 6 ++ GC_retry_signals@Base 6 ++ GC_root_size@Base 6 ++ GC_roots_present@Base 6 ++ GC_same_obj@Base 6 ++ GC_same_obj_print_proc@Base 6 ++ GC_scratch_alloc@Base 6 ++ GC_set_and_save_fault_handler@Base 6 ++ GC_set_fl_marks@Base 6 ++ GC_set_free_space_divisor@Base 6 ++ GC_set_hdr_marks@Base 6 ++ GC_set_mark_bit@Base 6 ++ GC_set_max_heap_size@Base 6 ++ GC_set_warn_proc@Base 6 ++ GC_setpagesize@Base 6 ++ GC_setspecific@Base 6 ++ GC_setup_temporary_fault_handler@Base 6 ++ GC_should_collect@Base 6 ++ GC_should_invoke_finalizers@Base 6 ++ GC_signal_mark_stack_overflow@Base 6 ++ GC_size@Base 6 ++ GC_sleep@Base 6 ++ GC_slow_getspecific@Base 6 ++ GC_smashed@Base 6 ++ GC_spin_count@Base 6 ++ GC_split_block@Base 6 ++ GC_stack_last_cleared@Base 6 ++ GC_stackbottom@Base 6 ++ GC_start_blocking@Base 6 ++ GC_start_call_back@Base 6 ++ GC_start_debugging@Base 6 ++ GC_start_reclaim@Base 6 ++ GC_start_routine@Base 6 ++ GC_start_time@Base 6 ++ GC_start_world@Base 6 ++ GC_stderr@Base 6 ++ GC_stdout@Base 6 ++ GC_stop_count@Base 6 ++ GC_stop_init@Base 6 ++ GC_stop_world@Base 6 ++ GC_stopped_mark@Base 6 ++ GC_stopping_pid@Base 6 ++ GC_stopping_thread@Base 6 ++ GC_store_debug_info@Base 6 ++ GC_suspend_ack_sem@Base 6 ++ GC_suspend_all@Base 6 ++ GC_suspend_handler@Base 6 ++ GC_suspend_handler_inner@Base 6 ++ GC_suspend_thread@Base 6 ++ GC_thr_init@Base 6 ++ GC_thr_initialized@Base 6 ++ GC_thread_exit_proc@Base 6 ++ GC_thread_key@Base 6 ++ GC_threads@Base 6 ++ GC_time_limit@Base 6 ++ GC_timeout_stop_func@Base 6 ++ GC_total_stack_black_listed@Base 6 ++ GC_try_to_collect@Base 6 ++ GC_try_to_collect_inner@Base 6 ++ GC_typed_mark_proc@Base 6 ++ GC_typed_mark_proc_index@Base 6 ++ GC_unix_get_mem@Base 6 ++ GC_unlocked_count@Base 6 ++ GC_unpromote_black_lists@Base 6 ++ GC_unprotect_range@Base 6 ++ GC_unreachable_finalize_mark_proc@Base 6 ++ GC_unregister_disappearing_link@Base 6 ++ GC_unregister_my_thread@Base 6 ++ GC_uobjfreelist_ptr@Base 6 ++ GC_use_entire_heap@Base 6 ++ GC_used_heap_size_after_full@Base 6 ++ GC_version@Base 6 ++ GC_wait_builder@Base 6 ++ GC_wait_for_gc_completion@Base 6 ++ GC_wait_for_reclaim@Base 6 ++ GC_with_callee_saves_pushed@Base 6 ++ GC_words_allocd_at_reset@Base 6 ++ GC_world_is_stopped@Base 6 ++ GC_world_stopped@Base 6 ++ GC_write@Base 6 ++ GC_write_fault_handler@Base 6 diff --cc debian/libquadmath.symbols index 0000000,0000000..cd8ce65 new file mode 100644 --- /dev/null +++ b/debian/libquadmath.symbols @@@ -1,0 -1,0 +1,4 @@@ ++libquadmath.so.0 #PACKAGE# #MINVER# ++ (symver)QUADMATH_1.0 4.6 ++ (symver)QUADMATH_1.1 6 ++ (symver)QUADMATH_1.2 9 diff --cc debian/libstdc++-BV-doc.doc-base index 0000000,0000000..c5fd048 new file mode 100644 --- /dev/null +++ b/debian/libstdc++-BV-doc.doc-base @@@ -1,0 -1,0 +1,13 @@@ ++Document: libstdc++-@BV@-doc ++Title: The GNU Standard C++ Library v3 (gcc-@BV@) ++Author: Various ++Abstract: This package contains documentation files for the GNU stdc++ library. ++ One set is the distribution documentation, the other set is the ++ source documentation including a namespace list, class hierarchy, ++ alphabetical list, compound list, file list, namespace members, ++ compound members and file members. ++Section: Programming/C++ ++ ++Format: html ++Index: /usr/share/doc/libstdc++-@BV@-doc/libstdc++/index.html ++Files: /usr/share/doc/libstdc++-@BV@-doc/libstdc++/* diff --cc debian/libstdc++-BV-doc.overrides index 0000000,0000000..9685ae8 new file mode 100644 --- /dev/null +++ b/debian/libstdc++-BV-doc.overrides @@@ -1,0 -1,0 +1,8 @@@ ++libstdc++-@BV@-doc binary: manpage-has-bad-whatis-entry ++ ++# 3xx used by intent to avoid conficts ++libstdc++-@BV@-doc binary: manpage-section-mismatch ++ ++# some very long identifiers ++# doxygen accepts formulas in man pages ... ++libstdc++-@BV@-doc binary: groff-message diff --cc debian/libstdc++.symbols index 0000000,0000000..349cd70 new file mode 100644 --- /dev/null +++ b/debian/libstdc++.symbols @@@ -1,0 -1,0 +1,57 @@@ ++libstdc++.so.6 #PACKAGE# #MINVER# ++ (symver)CXXABI_1.3 4.1.1 ++ (symver)CXXABI_1.3.1 4.1.1 ++ (symver)CXXABI_1.3.2 4.3 ++ (symver)CXXABI_1.3.3 4.3 ++ (symver)CXXABI_1.3.4 4.3 ++ (symver)CXXABI_1.3.5 4.3 ++ (symver)CXXABI_1.3.6 4.3 ++ (symver)CXXABI_1.3.7 4.3 ++ (symver)CXXABI_1.3.8 4.3 ++ (symver)CXXABI_1.3.9 5 ++ (symver)CXXABI_1.3.10 6 ++ (symver)CXXABI_1.3.11 10.2 ++ (symver)CXXABI_1.3.12 9 ++ (symver)CXXABI_1.3.13 11 ++ (symver|arch=armel armhf)CXXABI_ARM_1.3.3 4.4 ++ (symver|arch=amd64 i386 x32)CXXABI_FLOAT128 5 ++ (symver|arch=ppc64 ppc64el s390x sparc64)CXXABI_LDBL_1.3 4.2.1 ++ (symver|arch=ppc64 ppc64el)CXXABI_IEEE128_1.3.13 11 ++ (symver)CXXABI_TM_1 4.7 ++ (symver)GLIBCXX_3.4 4.1.1 ++ (symver)GLIBCXX_3.4.1 4.1.1 ++ (symver)GLIBCXX_3.4.2 4.1.1 ++ (symver)GLIBCXX_3.4.3 4.1.1 ++ (symver)GLIBCXX_3.4.4 4.1.1 ++ (symver)GLIBCXX_3.4.5 4.1.1 ++ (symver)GLIBCXX_3.4.6 4.1.1 ++ (symver)GLIBCXX_3.4.7 4.1.1 ++ (symver)GLIBCXX_3.4.8 4.1.1 ++ (symver)GLIBCXX_3.4.9 4.2.1 ++ (symver)GLIBCXX_3.4.10 4.3 ++ (symver)GLIBCXX_3.4.11 4.4 ++ (symver)GLIBCXX_3.4.12 4.4 ++ (symver)GLIBCXX_3.4.13 4.4.2 ++ (symver)GLIBCXX_3.4.14 4.5 ++ (symver)GLIBCXX_3.4.15 4.6 ++ (symver)GLIBCXX_3.4.16 4.6 ++ (symver)GLIBCXX_3.4.17 4.7 ++ (symver)GLIBCXX_3.4.18 4.8 ++ (symver)GLIBCXX_3.4.19 4.8 ++ (symver)GLIBCXX_3.4.20 4.9 ++ (symver)GLIBCXX_3.4.21 5.2 ++ (symver)GLIBCXX_3.4.22 6 ++ (symver)GLIBCXX_3.4.23 10.2 ++ (symver)GLIBCXX_3.4.24 7 ++ (symver)GLIBCXX_3.4.25 8 ++ (symver)GLIBCXX_3.4.26 9 ++ (symver)GLIBCXX_3.4.27 9.1 ++ (symver)GLIBCXX_3.4.28 10.2 ++ (symver)GLIBCXX_3.4.29 11 ++ (symver)GLIBCXX_3.4.30 12 ++ (symver|arch=ppc64 ppc64el s390x sparc64)GLIBCXX_LDBL_3.4 4.2.1 ++ (symver|arch=ppc64 ppc64el s390x sparc64)GLIBCXX_LDBL_3.4.7 4.2.1 ++ (symver|arch=ppc64 ppc64el s390x sparc64)GLIBCXX_LDBL_3.4.10 4.3 ++ (symver|arch=ppc64 ppc64el s390x sparc64)GLIBCXX_LDBL_3.4.21 5 ++ (symver|arch=ppc64 ppc64el s390x sparc64)GLIBCXX_LDBL_3.4.29 11 ++ (symver|arch=ppc64 ppc64el)GLIBCXX_IEEE128_3.4.29 11 diff --cc debian/libstdc++CXX.prerm index 0000000,0000000..d4a6b38 new file mode 100644 --- /dev/null +++ b/debian/libstdc++CXX.prerm @@@ -1,0 -1,0 +1,13 @@@ ++#! /bin/sh ++ ++set -e ++ ++case "$1" in ++ remove|upgrade) ++ files=$(dpkg -L libstdc++@CXX@@TARGET_QUAL@ | awk -F/ 'BEGIN {OFS="/"} /\.py$/ {$NF=sprintf("__pycache__/%s.*.py[co]", substr($NF,1,length($NF)-3)); print}') ++ rm -f $files ++ dirs=$(dpkg -L libstdc++@CXX@@TARGET_QUAL@ | awk -F/ 'BEGIN {OFS="/"} /\.py$/ {NF--; print}' | sort -u) ++ find $dirs -mindepth 1 -maxdepth 1 -name __pycache__ -type d -empty | xargs -r rmdir ++esac ++ ++#DEBHELPER# diff --cc debian/libtsan2.symbols index 0000000,0000000..1787e5c new file mode 100644 --- /dev/null +++ b/debian/libtsan2.symbols @@@ -1,0 -1,0 +1,2099 @@@ ++libtsan.so.2 libtsan2 #MINVER# ++ AnnotateBenignRace@Base 4.9 ++ AnnotateBenignRaceSized@Base 4.9 ++ AnnotateCondVarSignal@Base 4.9 ++ AnnotateCondVarSignalAll@Base 4.9 ++ AnnotateCondVarWait@Base 4.9 ++ AnnotateEnableRaceDetection@Base 4.9 ++ AnnotateExpectRace@Base 4.9 ++ AnnotateFlushExpectedRaces@Base 4.9 ++ AnnotateFlushState@Base 4.9 ++ AnnotateHappensAfter@Base 4.9 ++ AnnotateHappensBefore@Base 4.9 ++ AnnotateIgnoreReadsBegin@Base 4.9 ++ AnnotateIgnoreReadsEnd@Base 4.9 ++ AnnotateIgnoreSyncBegin@Base 4.9 ++ AnnotateIgnoreSyncEnd@Base 4.9 ++ AnnotateIgnoreWritesBegin@Base 4.9 ++ AnnotateIgnoreWritesEnd@Base 4.9 ++ AnnotateMemoryIsInitialized@Base 4.9 ++ AnnotateMemoryIsUninitialized@Base 5 ++ AnnotateMutexIsNotPHB@Base 4.9 ++ AnnotateMutexIsUsedAsCondVar@Base 4.9 ++ AnnotateNewMemory@Base 4.9 ++ AnnotateNoOp@Base 4.9 ++ AnnotatePCQCreate@Base 4.9 ++ AnnotatePCQDestroy@Base 4.9 ++ AnnotatePCQGet@Base 4.9 ++ AnnotatePCQPut@Base 4.9 ++ AnnotatePublishMemoryRange@Base 4.9 ++ AnnotateRWLockAcquired@Base 4.9 ++ AnnotateRWLockCreate@Base 4.9 ++ AnnotateRWLockCreateStatic@Base 4.9 ++ AnnotateRWLockDestroy@Base 4.9 ++ AnnotateRWLockReleased@Base 4.9 ++ AnnotateThreadName@Base 4.9 ++ AnnotateTraceMemory@Base 4.9 ++ AnnotateUnpublishMemoryRange@Base 4.9 ++ RunningOnValgrind@Base 4.9 ++ ThreadSanitizerQuery@Base 4.9 ++ ValgrindSlowdown@Base 4.9 ++ WTFAnnotateBenignRaceSized@Base 4.9 ++ WTFAnnotateHappensAfter@Base 4.9 ++ WTFAnnotateHappensBefore@Base 4.9 ++ _ZN6__tsan10OnFinalizeEb@Base 4.9 ++ _ZN6__tsan12OnInitializeEv@Base 5 ++ _ZN6__tsan30OnPotentiallyBlockingRegionEndEv@Base 10 ++ _ZN6__tsan32OnPotentiallyBlockingRegionBeginEv@Base 10 ++ _ZN6__tsan8OnReportEPKNS_10ReportDescEb@Base 4.9 ++ _ZdaPv@Base 4.9 ++ _ZdaPvRKSt9nothrow_t@Base 4.9 ++ _ZdaPvSt11align_val_t@Base 9 ++ _ZdaPvSt11align_val_tRKSt9nothrow_t@Base 9 ++ _ZdaPvm@Base 9 ++ _ZdaPvmSt11align_val_t@Base 9 ++ _ZdlPv@Base 4.9 ++ _ZdlPvRKSt9nothrow_t@Base 4.9 ++ _ZdlPvSt11align_val_t@Base 9 ++ _ZdlPvSt11align_val_tRKSt9nothrow_t@Base 9 ++ _ZdlPvm@Base 9 ++ _ZdlPvmSt11align_val_t@Base 9 ++ _Znam@Base 4.9 ++ _ZnamRKSt9nothrow_t@Base 4.9 ++ _ZnamSt11align_val_t@Base 9 ++ _ZnamSt11align_val_tRKSt9nothrow_t@Base 9 ++ _Znwm@Base 4.9 ++ _ZnwmRKSt9nothrow_t@Base 4.9 ++ _ZnwmSt11align_val_t@Base 9 ++ _ZnwmSt11align_val_tRKSt9nothrow_t@Base 9 ++ __asan_backtrace_alloc@Base 4.9 ++ __asan_backtrace_close@Base 4.9 ++ __asan_backtrace_create_state@Base 4.9 ++ __asan_backtrace_dwarf_add@Base 4.9 ++ __asan_backtrace_free@Base 4.9 ++ __asan_backtrace_get_view@Base 4.9 ++ __asan_backtrace_initialize@Base 4.9 ++ __asan_backtrace_open@Base 4.9 ++ __asan_backtrace_pcinfo@Base 4.9 ++ __asan_backtrace_qsort@Base 4.9 ++ __asan_backtrace_release_view@Base 4.9 ++ __asan_backtrace_syminfo@Base 4.9 ++ __asan_backtrace_syminfo_to_full_callback@Base 11 ++ __asan_backtrace_syminfo_to_full_error_callback@Base 11 ++ __asan_backtrace_uncompress_lzma@Base 11 ++ __asan_backtrace_uncompress_zdebug@Base 8 ++ __asan_backtrace_vector_finish@Base 4.9 ++ __asan_backtrace_vector_grow@Base 4.9 ++ __asan_backtrace_vector_release@Base 4.9 ++ __asan_cplus_demangle_builtin_types@Base 4.9 ++ __asan_cplus_demangle_fill_ctor@Base 4.9 ++ __asan_cplus_demangle_fill_dtor@Base 4.9 ++ __asan_cplus_demangle_fill_extended_operator@Base 4.9 ++ __asan_cplus_demangle_fill_name@Base 4.9 ++ __asan_cplus_demangle_init_info@Base 4.9 ++ __asan_cplus_demangle_mangled_name@Base 4.9 ++ __asan_cplus_demangle_operators@Base 4.9 ++ __asan_cplus_demangle_print@Base 4.9 ++ __asan_cplus_demangle_print_callback@Base 4.9 ++ __asan_cplus_demangle_type@Base 4.9 ++ __asan_cplus_demangle_v3@Base 4.9 ++ __asan_cplus_demangle_v3_callback@Base 4.9 ++ __asan_internal_memcmp@Base 4.9 ++ __asan_internal_memcpy@Base 4.9 ++ __asan_internal_memset@Base 4.9 ++ __asan_internal_strcmp@Base 4.9 ++ __asan_internal_strlen@Base 4.9 ++ __asan_internal_strncmp@Base 4.9 ++ __asan_internal_strnlen@Base 4.9 ++ __asan_is_gnu_v3_mangled_ctor@Base 4.9 ++ __asan_is_gnu_v3_mangled_dtor@Base 4.9 ++ __asan_java_demangle_v3@Base 4.9 ++ __asan_java_demangle_v3_callback@Base 4.9 ++ __bzero@Base 10 ++ __close@Base 4.9 ++ __cxa_atexit@Base 4.9 ++ __cxa_guard_abort@Base 4.9 ++ __cxa_guard_acquire@Base 4.9 ++ __cxa_guard_release@Base 4.9 ++ __fprintf_chk@Base 9 ++ __fxstat64@Base 4.9 ++ __fxstat@Base 4.9 ++ __getdelim@Base 5 ++ __interceptor___bzero@Base 10 ++ __interceptor___close@Base 4.9 ++ __interceptor___cxa_atexit@Base 4.9 ++ __interceptor___fprintf_chk@Base 9 ++ __interceptor___fxstat64@Base 4.9 ++ __interceptor___fxstat@Base 4.9 ++ __interceptor___getdelim@Base 5 ++ __interceptor___isoc99_fprintf@Base 5 ++ __interceptor___isoc99_fscanf@Base 4.9 ++ __interceptor___isoc99_printf@Base 5 ++ __interceptor___isoc99_scanf@Base 4.9 ++ __interceptor___isoc99_snprintf@Base 5 ++ __interceptor___isoc99_sprintf@Base 5 ++ __interceptor___isoc99_sscanf@Base 4.9 ++ __interceptor___isoc99_vfprintf@Base 5 ++ __interceptor___isoc99_vfscanf@Base 4.9 ++ __interceptor___isoc99_vprintf@Base 5 ++ __interceptor___isoc99_vscanf@Base 4.9 ++ __interceptor___isoc99_vsnprintf@Base 5 ++ __interceptor___isoc99_vsprintf@Base 5 ++ __interceptor___isoc99_vsscanf@Base 4.9 ++ __interceptor___libc_memalign@Base 4.9 ++ __interceptor___lxstat64@Base 4.9 ++ __interceptor___lxstat@Base 4.9 ++ __interceptor___overflow@Base 5 ++ __interceptor___pthread_mutex_lock@Base 9 ++ __interceptor___pthread_mutex_unlock@Base 9 ++ __interceptor___res_iclose@Base 4.9 ++ __interceptor___sigsetjmp@Base 4.9 ++ __interceptor___snprintf_chk@Base 9 ++ __interceptor___sprintf_chk@Base 9 ++ __interceptor___strndup@Base 8 ++ __interceptor___strxfrm_l@Base 9 ++ __interceptor___tls_get_addr@Base 6 ++ __interceptor___uflow@Base 5 ++ __interceptor___underflow@Base 5 ++ __interceptor___vsnprintf_chk@Base 9 ++ __interceptor___vsprintf_chk@Base 9 ++ __interceptor___wcsxfrm_l@Base 9 ++ __interceptor___woverflow@Base 5 ++ __interceptor___wuflow@Base 5 ++ __interceptor___wunderflow@Base 5 ++ __interceptor___xpg_strerror_r@Base 4.9 ++ __interceptor___xstat64@Base 4.9 ++ __interceptor___xstat@Base 4.9 ++ __interceptor__exit@Base 4.9 ++ __interceptor__obstack_begin@Base 5 ++ __interceptor__obstack_begin_1@Base 5 ++ __interceptor__obstack_newchunk@Base 5 ++ __interceptor__setjmp@Base 4.9 ++ __interceptor_abort@Base 4.9 ++ __interceptor_accept4@Base 4.9 ++ __interceptor_accept@Base 4.9 ++ __interceptor_aligned_alloc@Base 5 ++ __interceptor_asctime@Base 4.9 ++ __interceptor_asctime_r@Base 4.9 ++ __interceptor_asprintf@Base 5 ++ __interceptor_atexit@Base 4.9 ++ __interceptor_backtrace@Base 4.9 ++ __interceptor_backtrace_symbols@Base 4.9 ++ __interceptor_bcmp@Base 10 ++ __interceptor_bind@Base 4.9 ++ __interceptor_bsearch@Base 12 ++ __interceptor_bzero@Base 10 ++ __interceptor_calloc@Base 4.9 ++ __interceptor_canonicalize_file_name@Base 4.9 ++ __interceptor_capget@Base 5 ++ __interceptor_capset@Base 5 ++ __interceptor_cfree@Base 4.9 ++ __interceptor_clock_getcpuclockid@Base 11 ++ __interceptor_clock_getres@Base 4.9 ++ __interceptor_clock_gettime@Base 4.9 ++ __interceptor_clock_settime@Base 4.9 ++ __interceptor_clone@Base 12 ++ __interceptor_close@Base 4.9 ++ __interceptor_closedir@Base 6 ++ __interceptor_confstr@Base 4.9 ++ __interceptor_connect@Base 4.9 ++ __interceptor_creat64@Base 4.9 ++ __interceptor_creat@Base 4.9 ++ __interceptor_crypt@Base 10 ++ __interceptor_crypt_r@Base 10 ++ __interceptor_ctermid@Base 7 ++ __interceptor_ctime@Base 4.9 ++ __interceptor_ctime_r@Base 4.9 ++ __interceptor_dl_iterate_phdr@Base 6 ++ __interceptor_dlclose@Base 4.9 ++ __interceptor_dlopen@Base 4.9 ++ __interceptor_drand48_r@Base 4.9 ++ __interceptor_dup2@Base 4.9 ++ __interceptor_dup3@Base 4.9 ++ __interceptor_dup@Base 4.9 ++ __interceptor_endgrent@Base 5 ++ __interceptor_endpwent@Base 5 ++ __interceptor_epoll_create1@Base 4.9 ++ __interceptor_epoll_create@Base 4.9 ++ __interceptor_epoll_ctl@Base 4.9 ++ __interceptor_epoll_pwait@Base 7 ++ __interceptor_epoll_wait@Base 4.9 ++ __interceptor_ether_aton@Base 4.9 ++ __interceptor_ether_aton_r@Base 4.9 ++ __interceptor_ether_hostton@Base 4.9 ++ __interceptor_ether_line@Base 4.9 ++ __interceptor_ether_ntoa@Base 4.9 ++ __interceptor_ether_ntoa_r@Base 4.9 ++ __interceptor_ether_ntohost@Base 4.9 ++ __interceptor_eventfd@Base 4.9 ++ __interceptor_eventfd_read@Base 7 ++ __interceptor_eventfd_write@Base 7 ++ __interceptor_fclose@Base 4.9 ++ __interceptor_fdopen@Base 5 ++ __interceptor_fflush@Base 4.9 ++ __interceptor_fgetgrent@Base 10 ++ __interceptor_fgetgrent_r@Base 10 ++ __interceptor_fgetpwent@Base 10 ++ __interceptor_fgetpwent_r@Base 10 ++ __interceptor_fgets@Base 9 ++ __interceptor_fgetxattr@Base 5 ++ __interceptor_flistxattr@Base 5 ++ __interceptor_fmemopen@Base 5 ++ __interceptor_fopen64@Base 5 ++ __interceptor_fopen@Base 4.9 ++ __interceptor_fopencookie@Base 6 ++ __interceptor_fork@Base 4.9 ++ __interceptor_fprintf@Base 5 ++ __interceptor_fputs@Base 9 ++ __interceptor_fread@Base 4.9 ++ __interceptor_free@Base 4.9 ++ __interceptor_freopen64@Base 5 ++ __interceptor_freopen@Base 4.9 ++ __interceptor_frexp@Base 4.9 ++ __interceptor_frexpf@Base 4.9 ++ __interceptor_frexpl@Base 4.9 ++ __interceptor_fscanf@Base 4.9 ++ __interceptor_fstat64@Base 4.9 ++ __interceptor_fstat@Base 4.9 ++ __interceptor_fstatfs64@Base 4.9 ++ __interceptor_fstatfs@Base 4.9 ++ __interceptor_fstatvfs64@Base 4.9 ++ __interceptor_fstatvfs@Base 4.9 ++ __interceptor_ftime@Base 5 ++ __interceptor_fwrite@Base 4.9 ++ __interceptor_get_current_dir_name@Base 4.9 ++ __interceptor_getaddrinfo@Base 4.9 ++ __interceptor_getcwd@Base 4.9 ++ __interceptor_getdelim@Base 4.9 ++ __interceptor_getgrent@Base 10 ++ __interceptor_getgrent_r@Base 10 ++ __interceptor_getgrgid@Base 10 ++ __interceptor_getgrgid_r@Base 10 ++ __interceptor_getgrnam@Base 10 ++ __interceptor_getgrnam_r@Base 10 ++ __interceptor_getgrouplist@Base 12 ++ __interceptor_getgroups@Base 4.9 ++ __interceptor_gethostbyaddr@Base 4.9 ++ __interceptor_gethostbyaddr_r@Base 4.9 ++ __interceptor_gethostbyname2@Base 4.9 ++ __interceptor_gethostbyname2_r@Base 4.9 ++ __interceptor_gethostbyname@Base 4.9 ++ __interceptor_gethostbyname_r@Base 4.9 ++ __interceptor_gethostent@Base 4.9 ++ __interceptor_gethostent_r@Base 4.9 ++ __interceptor_getifaddrs@Base 5 ++ __interceptor_getitimer@Base 4.9 ++ __interceptor_getline@Base 4.9 ++ __interceptor_getloadavg@Base 8 ++ __interceptor_getmntent@Base 4.9 ++ __interceptor_getmntent_r@Base 4.9 ++ __interceptor_getnameinfo@Base 5 ++ __interceptor_getnetbyaddr@Base 12 ++ __interceptor_getnetbyname@Base 12 ++ __interceptor_getnetent@Base 12 ++ __interceptor_getpass@Base 5 ++ __interceptor_getpeername@Base 4.9 ++ __interceptor_getprotobyname@Base 11 ++ __interceptor_getprotobyname_r@Base 11 ++ __interceptor_getprotobynumber@Base 11 ++ __interceptor_getprotobynumber_r@Base 11 ++ __interceptor_getprotoent@Base 11 ++ __interceptor_getprotoent_r@Base 11 ++ __interceptor_getpwent@Base 10 ++ __interceptor_getpwent_r@Base 10 ++ __interceptor_getpwnam@Base 10 ++ __interceptor_getpwnam_r@Base 10 ++ __interceptor_getpwuid@Base 10 ++ __interceptor_getpwuid_r@Base 10 ++ __interceptor_getrandom@Base 10 ++ __interceptor_getresgid@Base 5 ++ __interceptor_getresuid@Base 5 ++ __interceptor_getsockname@Base 4.9 ++ __interceptor_getsockopt@Base 4.9 ++ __interceptor_gettimeofday@Base 4.9 ++ __interceptor_getusershell@Base 10 ++ __interceptor_getutent@Base 8 ++ __interceptor_getutid@Base 8 ++ __interceptor_getutline@Base 8 ++ __interceptor_getutxent@Base 8 ++ __interceptor_getutxid@Base 8 ++ __interceptor_getutxline@Base 8 ++ __interceptor_getxattr@Base 5 ++ __interceptor_glob64@Base 5 ++ __interceptor_glob@Base 5 ++ __interceptor_gmtime@Base 4.9 ++ __interceptor_gmtime_r@Base 4.9 ++ __interceptor_iconv@Base 4.9 ++ __interceptor_if_indextoname@Base 5 ++ __interceptor_if_nametoindex@Base 5 ++ __interceptor_inet_aton@Base 4.9 ++ __interceptor_inet_ntop@Base 4.9 ++ __interceptor_inet_pton@Base 4.9 ++ __interceptor_initgroups@Base 4.9 ++ __interceptor_inotify_init1@Base 4.9 ++ __interceptor_inotify_init@Base 4.9 ++ __interceptor_ioctl@Base 4.9 ++ __interceptor_kill@Base 4.9 ++ __interceptor_lgamma@Base 4.9 ++ __interceptor_lgamma_r@Base 4.9 ++ __interceptor_lgammaf@Base 4.9 ++ __interceptor_lgammaf_r@Base 4.9 ++ __interceptor_lgammal@Base 4.9 ++ __interceptor_lgammal_r@Base 4.9 ++ __interceptor_lgetxattr@Base 5 ++ __interceptor_listen@Base 4.9 ++ __interceptor_listxattr@Base 5 ++ __interceptor_llistxattr@Base 5 ++ __interceptor_localtime@Base 4.9 ++ __interceptor_localtime_r@Base 4.9 ++ __interceptor_longjmp@Base 4.9 ++ __interceptor_lrand48_r@Base 4.9 ++ __interceptor_lstat@Base 12 ++ __interceptor_malloc@Base 4.9 ++ __interceptor_malloc_usable_size@Base 4.9 ++ __interceptor_mbsnrtowcs@Base 4.9 ++ __interceptor_mbsrtowcs@Base 4.9 ++ __interceptor_mbstowcs@Base 4.9 ++ __interceptor_mcheck@Base 8 ++ __interceptor_mcheck_pedantic@Base 8 ++ __interceptor_memalign@Base 4.9 ++ __interceptor_memchr@Base 4.9 ++ __interceptor_memcmp@Base 4.9 ++ __interceptor_memcpy@Base 4.9 ++ __interceptor_memmem@Base 7 ++ __interceptor_memmove@Base 4.9 ++ __interceptor_memrchr@Base 4.9 ++ __interceptor_memset@Base 4.9 ++ __interceptor_mincore@Base 6 ++ __interceptor_mktime@Base 5 ++ __interceptor_mlock@Base 4.9 ++ __interceptor_mlockall@Base 4.9 ++ __interceptor_mmap64@Base 4.9 ++ __interceptor_mmap@Base 4.9 ++ __interceptor_modf@Base 4.9 ++ __interceptor_modff@Base 4.9 ++ __interceptor_modfl@Base 4.9 ++ __interceptor_mprobe@Base 8 ++ __interceptor_mprotect@Base 9 ++ __interceptor_msgrcv@Base 11 ++ __interceptor_msgsnd@Base 11 ++ __interceptor_munlock@Base 4.9 ++ __interceptor_munlockall@Base 4.9 ++ __interceptor_munmap@Base 4.9 ++ __interceptor_name_to_handle_at@Base 9 ++ __interceptor_nanosleep@Base 4.9 ++ __interceptor_on_exit@Base 4.9 ++ __interceptor_open64@Base 4.9 ++ __interceptor_open@Base 4.9 ++ __interceptor_open_by_handle_at@Base 9 ++ __interceptor_open_memstream@Base 5 ++ __interceptor_open_wmemstream@Base 5 ++ __interceptor_opendir@Base 4.9 ++ __interceptor_pause@Base 8 ++ __interceptor_pclose@Base 10 ++ __interceptor_pipe2@Base 4.9 ++ __interceptor_pipe@Base 4.9 ++ __interceptor_poll@Base 4.9 ++ __interceptor_popen@Base 10 ++ __interceptor_posix_memalign@Base 4.9 ++ __interceptor_posix_spawn@Base 12 ++ __interceptor_posix_spawnp@Base 12 ++ __interceptor_ppoll@Base 4.9 ++ __interceptor_prctl@Base 4.9 ++ __interceptor_pread64@Base 4.9 ++ __interceptor_pread@Base 4.9 ++ __interceptor_preadv64@Base 4.9 ++ __interceptor_preadv@Base 4.9 ++ __interceptor_printf@Base 5 ++ __interceptor_process_vm_readv@Base 6 ++ __interceptor_process_vm_writev@Base 6 ++ __interceptor_pthread_attr_getaffinity_np@Base 4.9 ++ __interceptor_pthread_attr_getdetachstate@Base 4.9 ++ __interceptor_pthread_attr_getguardsize@Base 4.9 ++ __interceptor_pthread_attr_getinheritsched@Base 4.9 ++ __interceptor_pthread_attr_getschedparam@Base 4.9 ++ __interceptor_pthread_attr_getschedpolicy@Base 4.9 ++ __interceptor_pthread_attr_getscope@Base 4.9 ++ __interceptor_pthread_attr_getstack@Base 4.9 ++ __interceptor_pthread_attr_getstacksize@Base 4.9 ++ __interceptor_pthread_barrier_destroy@Base 4.9 ++ __interceptor_pthread_barrier_init@Base 4.9 ++ __interceptor_pthread_barrier_wait@Base 4.9 ++ __interceptor_pthread_barrierattr_getpshared@Base 5 ++ __interceptor_pthread_cond_broadcast@Base 4.9 ++ __interceptor_pthread_cond_clockwait@Base 12 ++ __interceptor_pthread_cond_destroy@Base 4.9 ++ __interceptor_pthread_cond_init@Base 4.9 ++ __interceptor_pthread_cond_signal@Base 4.9 ++ __interceptor_pthread_cond_timedwait@Base 4.9 ++ __interceptor_pthread_cond_wait@Base 4.9 ++ __interceptor_pthread_condattr_getclock@Base 5 ++ __interceptor_pthread_condattr_getpshared@Base 5 ++ __interceptor_pthread_create@Base 4.9 ++ __interceptor_pthread_detach@Base 4.9 ++ __interceptor_pthread_exit@Base 10 ++ __interceptor_pthread_getcpuclockid@Base 12 ++ __interceptor_pthread_getname_np@Base 9 ++ __interceptor_pthread_getschedparam@Base 4.9 ++ __interceptor_pthread_join@Base 4.9 ++ __interceptor_pthread_kill@Base 4.9 ++ __interceptor_pthread_mutex_destroy@Base 4.9 ++ __interceptor_pthread_mutex_init@Base 4.9 ++ __interceptor_pthread_mutex_lock@Base 4.9 ++ __interceptor_pthread_mutex_timedlock@Base 4.9 ++ __interceptor_pthread_mutex_trylock@Base 4.9 ++ __interceptor_pthread_mutex_unlock@Base 4.9 ++ __interceptor_pthread_mutexattr_getprioceiling@Base 5 ++ __interceptor_pthread_mutexattr_getprotocol@Base 5 ++ __interceptor_pthread_mutexattr_getpshared@Base 5 ++ __interceptor_pthread_mutexattr_getrobust@Base 5 ++ __interceptor_pthread_mutexattr_getrobust_np@Base 5 ++ __interceptor_pthread_mutexattr_gettype@Base 5 ++ __interceptor_pthread_once@Base 4.9 ++ __interceptor_pthread_rwlock_destroy@Base 4.9 ++ __interceptor_pthread_rwlock_init@Base 4.9 ++ __interceptor_pthread_rwlock_rdlock@Base 4.9 ++ __interceptor_pthread_rwlock_timedrdlock@Base 4.9 ++ __interceptor_pthread_rwlock_timedwrlock@Base 4.9 ++ __interceptor_pthread_rwlock_tryrdlock@Base 4.9 ++ __interceptor_pthread_rwlock_trywrlock@Base 4.9 ++ __interceptor_pthread_rwlock_unlock@Base 4.9 ++ __interceptor_pthread_rwlock_wrlock@Base 4.9 ++ __interceptor_pthread_rwlockattr_getkind_np@Base 5 ++ __interceptor_pthread_rwlockattr_getpshared@Base 5 ++ __interceptor_pthread_setcancelstate@Base 6 ++ __interceptor_pthread_setcanceltype@Base 6 ++ __interceptor_pthread_setname_np@Base 4.9 ++ __interceptor_pthread_sigmask@Base 7 ++ __interceptor_pthread_spin_destroy@Base 4.9 ++ __interceptor_pthread_spin_init@Base 4.9 ++ __interceptor_pthread_spin_lock@Base 4.9 ++ __interceptor_pthread_spin_trylock@Base 4.9 ++ __interceptor_pthread_spin_unlock@Base 4.9 ++ __interceptor_pthread_timedjoin_np@Base 10 ++ __interceptor_pthread_tryjoin_np@Base 10 ++ __interceptor_ptrace@Base 4.9 ++ __interceptor_ptsname@Base 11 ++ __interceptor_ptsname_r@Base 11 ++ __interceptor_puts@Base 4.9 ++ __interceptor_pututxline@Base 10 ++ __interceptor_pvalloc@Base 4.9 ++ __interceptor_pwrite64@Base 4.9 ++ __interceptor_pwrite@Base 4.9 ++ __interceptor_pwritev64@Base 4.9 ++ __interceptor_pwritev@Base 4.9 ++ __interceptor_qsort@Base 11 ++ __interceptor_qsort_r@Base 11 ++ __interceptor_raise@Base 4.9 ++ __interceptor_rand_r@Base 5 ++ __interceptor_random_r@Base 4.9 ++ __interceptor_read@Base 4.9 ++ __interceptor_readdir64@Base 4.9 ++ __interceptor_readdir64_r@Base 4.9 ++ __interceptor_readdir@Base 4.9 ++ __interceptor_readdir_r@Base 4.9 ++ __interceptor_readlink@Base 9 ++ __interceptor_readlinkat@Base 9 ++ __interceptor_readv@Base 4.9 ++ __interceptor_realloc@Base 4.9 ++ __interceptor_reallocarray@Base 10 ++ __interceptor_realpath@Base 4.9 ++ __interceptor_recv@Base 4.9 ++ __interceptor_recvfrom@Base 7 ++ __interceptor_recvmmsg@Base 9 ++ __interceptor_recvmsg@Base 4.9 ++ __interceptor_regcomp@Base 10 ++ __interceptor_regerror@Base 10 ++ __interceptor_regexec@Base 10 ++ __interceptor_regfree@Base 10 ++ __interceptor_remquo@Base 4.9 ++ __interceptor_remquof@Base 4.9 ++ __interceptor_remquol@Base 4.9 ++ __interceptor_rmdir@Base 4.9 ++ __interceptor_scandir64@Base 4.9 ++ __interceptor_scandir@Base 4.9 ++ __interceptor_scanf@Base 4.9 ++ __interceptor_sched_getaffinity@Base 4.9 ++ __interceptor_sched_getparam@Base 6 ++ __interceptor_sem_destroy@Base 4.9 ++ __interceptor_sem_getvalue@Base 4.9 ++ __interceptor_sem_init@Base 4.9 ++ __interceptor_sem_open@Base 12 ++ __interceptor_sem_post@Base 4.9 ++ __interceptor_sem_timedwait@Base 4.9 ++ __interceptor_sem_trywait@Base 4.9 ++ __interceptor_sem_unlink@Base 12 ++ __interceptor_sem_wait@Base 4.9 ++ __interceptor_send@Base 4.9 ++ __interceptor_sendmmsg@Base 9 ++ __interceptor_sendmsg@Base 4.9 ++ __interceptor_sendto@Base 7 ++ __interceptor_setbuf@Base 10 ++ __interceptor_setbuffer@Base 10 ++ __interceptor_setgrent@Base 5 ++ __interceptor_setitimer@Base 4.9 ++ __interceptor_setjmp@Base 4.9 ++ __interceptor_setlinebuf@Base 10 ++ __interceptor_setlocale@Base 4.9 ++ __interceptor_setpwent@Base 5 ++ __interceptor_setvbuf@Base 10 ++ __interceptor_shmctl@Base 4.9 ++ __interceptor_sigaction@Base 4.9 ++ __interceptor_sigaltstack@Base 11 ++ __interceptor_sigandset@Base 11 ++ __interceptor_sigblock@Base 7 ++ __interceptor_sigemptyset@Base 4.9 ++ __interceptor_sigfillset@Base 4.9 ++ __interceptor_siglongjmp@Base 4.9 ++ __interceptor_signal@Base 4.9 ++ __interceptor_signalfd@Base 4.9 ++ __interceptor_sigorset@Base 11 ++ __interceptor_sigpending@Base 4.9 ++ __interceptor_sigprocmask@Base 4.9 ++ __interceptor_sigsetjmp@Base 4.9 ++ __interceptor_sigsetmask@Base 7 ++ __interceptor_sigsuspend@Base 4.9 ++ __interceptor_sigtimedwait@Base 4.9 ++ __interceptor_sigwait@Base 4.9 ++ __interceptor_sigwaitinfo@Base 4.9 ++ __interceptor_sincos@Base 4.9 ++ __interceptor_sincosf@Base 4.9 ++ __interceptor_sincosl@Base 4.9 ++ __interceptor_sleep@Base 4.9 ++ __interceptor_snprintf@Base 5 ++ __interceptor_socket@Base 4.9 ++ __interceptor_socketpair@Base 4.9 ++ __interceptor_sprintf@Base 5 ++ __interceptor_sscanf@Base 4.9 ++ __interceptor_stat@Base 12 ++ __interceptor_statfs64@Base 4.9 ++ __interceptor_statfs@Base 4.9 ++ __interceptor_statvfs64@Base 4.9 ++ __interceptor_statvfs@Base 4.9 ++ __interceptor_strcasecmp@Base 4.9 ++ __interceptor_strcasestr@Base 6 ++ __interceptor_strchr@Base 4.9 ++ __interceptor_strchrnul@Base 4.9 ++ __interceptor_strcmp@Base 4.9 ++ __interceptor_strcpy@Base 4.9 ++ __interceptor_strcspn@Base 6 ++ __interceptor_strdup@Base 4.9 ++ __interceptor_strerror@Base 4.9 ++ __interceptor_strerror_r@Base 4.9 ++ __interceptor_strlen@Base 4.9 ++ __interceptor_strncasecmp@Base 4.9 ++ __interceptor_strncmp@Base 4.9 ++ __interceptor_strncpy@Base 4.9 ++ __interceptor_strndup@Base 8 ++ __interceptor_strnlen@Base 7 ++ __interceptor_strpbrk@Base 6 ++ __interceptor_strptime@Base 4.9 ++ __interceptor_strrchr@Base 4.9 ++ __interceptor_strspn@Base 6 ++ __interceptor_strstr@Base 4.9 ++ __interceptor_strtoimax@Base 4.9 ++ __interceptor_strtok@Base 8 ++ __interceptor_strtoumax@Base 4.9 ++ __interceptor_strxfrm@Base 9 ++ __interceptor_strxfrm_l@Base 9 ++ __interceptor_sysinfo@Base 4.9 ++ __interceptor_tcgetattr@Base 4.9 ++ __interceptor_tempnam@Base 4.9 ++ __interceptor_textdomain@Base 4.9 ++ __interceptor_time@Base 4.9 ++ __interceptor_timerfd_gettime@Base 5 ++ __interceptor_timerfd_settime@Base 5 ++ __interceptor_times@Base 4.9 ++ __interceptor_tmpfile64@Base 5 ++ __interceptor_tmpfile@Base 5 ++ __interceptor_tmpnam@Base 4.9 ++ __interceptor_tmpnam_r@Base 4.9 ++ __interceptor_tsearch@Base 5 ++ __interceptor_ttyname@Base 10 ++ __interceptor_ttyname_r@Base 7 ++ __interceptor_uname@Base 11 ++ __interceptor_unlink@Base 4.9 ++ __interceptor_usleep@Base 4.9 ++ __interceptor_valloc@Base 4.9 ++ __interceptor_vasprintf@Base 5 ++ __interceptor_vfork@Base 5 ++ __interceptor_vfprintf@Base 5 ++ __interceptor_vfscanf@Base 4.9 ++ __interceptor_vprintf@Base 5 ++ __interceptor_vscanf@Base 4.9 ++ __interceptor_vsnprintf@Base 5 ++ __interceptor_vsprintf@Base 5 ++ __interceptor_vsscanf@Base 4.9 ++ __interceptor_wait3@Base 4.9 ++ __interceptor_wait4@Base 4.9 ++ __interceptor_wait@Base 4.9 ++ __interceptor_waitid@Base 4.9 ++ __interceptor_waitpid@Base 4.9 ++ __interceptor_wcrtomb@Base 6 ++ __interceptor_wcscat@Base 8 ++ __interceptor_wcsdup@Base 10 ++ __interceptor_wcslen@Base 8 ++ __interceptor_wcsncat@Base 8 ++ __interceptor_wcsnlen@Base 8 ++ __interceptor_wcsnrtombs@Base 4.9 ++ __interceptor_wcsrtombs@Base 4.9 ++ __interceptor_wcstombs@Base 4.9 ++ __interceptor_wcsxfrm@Base 9 ++ __interceptor_wcsxfrm_l@Base 9 ++ __interceptor_wctomb@Base 10 ++ __interceptor_wordexp@Base 4.9 ++ __interceptor_write@Base 4.9 ++ __interceptor_writev@Base 4.9 ++ __interceptor_xdr_bool@Base 5 ++ __interceptor_xdr_bytes@Base 5 ++ __interceptor_xdr_char@Base 5 ++ __interceptor_xdr_destroy@Base 11 ++ __interceptor_xdr_double@Base 5 ++ __interceptor_xdr_enum@Base 5 ++ __interceptor_xdr_float@Base 5 ++ __interceptor_xdr_hyper@Base 5 ++ __interceptor_xdr_int16_t@Base 5 ++ __interceptor_xdr_int32_t@Base 5 ++ __interceptor_xdr_int64_t@Base 5 ++ __interceptor_xdr_int8_t@Base 5 ++ __interceptor_xdr_int@Base 5 ++ __interceptor_xdr_long@Base 5 ++ __interceptor_xdr_longlong_t@Base 5 ++ __interceptor_xdr_quad_t@Base 5 ++ __interceptor_xdr_short@Base 5 ++ __interceptor_xdr_string@Base 5 ++ __interceptor_xdr_u_char@Base 5 ++ __interceptor_xdr_u_hyper@Base 5 ++ __interceptor_xdr_u_int@Base 5 ++ __interceptor_xdr_u_long@Base 5 ++ __interceptor_xdr_u_longlong_t@Base 5 ++ __interceptor_xdr_u_quad_t@Base 5 ++ __interceptor_xdr_u_short@Base 5 ++ __interceptor_xdr_uint16_t@Base 5 ++ __interceptor_xdr_uint32_t@Base 5 ++ __interceptor_xdr_uint64_t@Base 5 ++ __interceptor_xdr_uint8_t@Base 5 ++ __interceptor_xdrmem_create@Base 5 ++ __interceptor_xdrrec_create@Base 11 ++ __interceptor_xdrstdio_create@Base 5 ++ __isoc99_fprintf@Base 5 ++ __isoc99_fscanf@Base 4.9 ++ __isoc99_printf@Base 5 ++ __isoc99_scanf@Base 4.9 ++ __isoc99_snprintf@Base 5 ++ __isoc99_sprintf@Base 5 ++ __isoc99_sscanf@Base 4.9 ++ __isoc99_vfprintf@Base 5 ++ __isoc99_vfscanf@Base 4.9 ++ __isoc99_vprintf@Base 5 ++ __isoc99_vscanf@Base 4.9 ++ __isoc99_vsnprintf@Base 5 ++ __isoc99_vsprintf@Base 5 ++ __isoc99_vsscanf@Base 4.9 ++ __libc_memalign@Base 4.9 ++ __lxstat64@Base 4.9 ++ __lxstat@Base 4.9 ++ __overflow@Base 5 ++ __pthread_mutex_lock@Base 9 ++ __pthread_mutex_unlock@Base 9 ++ __res_iclose@Base 4.9 ++ __sancov_default_options@Base 8 ++ __sancov_lowest_stack@Base 8 ++ __sanitizer_acquire_crash_state@Base 9 ++ __sanitizer_cov_8bit_counters_init@Base 8 ++ __sanitizer_cov_bool_flag_init@Base 11 ++ __sanitizer_cov_dump@Base 4.9 ++ __sanitizer_cov_pcs_init@Base 8 ++ __sanitizer_cov_reset@Base 8 ++ __sanitizer_cov_trace_cmp1@Base 7 ++ __sanitizer_cov_trace_cmp2@Base 7 ++ __sanitizer_cov_trace_cmp4@Base 7 ++ __sanitizer_cov_trace_cmp8@Base 7 ++ __sanitizer_cov_trace_cmp@Base 6 ++ __sanitizer_cov_trace_const_cmp1@Base 8 ++ __sanitizer_cov_trace_const_cmp2@Base 8 ++ __sanitizer_cov_trace_const_cmp4@Base 8 ++ __sanitizer_cov_trace_const_cmp8@Base 8 ++ __sanitizer_cov_trace_div4@Base 7 ++ __sanitizer_cov_trace_div8@Base 7 ++ __sanitizer_cov_trace_gep@Base 7 ++ __sanitizer_cov_trace_pc_guard@Base 7 ++ __sanitizer_cov_trace_pc_guard_init@Base 7 ++ __sanitizer_cov_trace_pc_indir@Base 7 ++ __sanitizer_cov_trace_switch@Base 6 ++ __sanitizer_dump_coverage@Base 8 ++ __sanitizer_dump_trace_pc_guard_coverage@Base 8 ++ __sanitizer_free_hook@Base 5 ++ __sanitizer_get_allocated_size@Base 5 ++ __sanitizer_get_current_allocated_bytes@Base 5 ++ __sanitizer_get_estimated_allocated_size@Base 5 ++ __sanitizer_get_free_bytes@Base 5 ++ __sanitizer_get_heap_size@Base 5 ++ __sanitizer_get_module_and_offset_for_pc@Base 8 ++ __sanitizer_get_ownership@Base 5 ++ __sanitizer_get_report_path@Base 12 ++ __sanitizer_get_unmapped_bytes@Base 5 ++ __sanitizer_install_malloc_and_free_hooks@Base 7 ++ __sanitizer_malloc_hook@Base 5 ++ __sanitizer_on_print@Base 10 ++ __sanitizer_print_stack_trace@Base 5 ++ __sanitizer_report_error_summary@Base 4.9 ++ __sanitizer_sandbox_on_notify@Base 4.9 ++ __sanitizer_set_death_callback@Base 6 ++ __sanitizer_set_report_fd@Base 7 ++ __sanitizer_set_report_path@Base 4.9 ++ __sanitizer_symbolize_global@Base 7 ++ __sanitizer_symbolize_pc@Base 7 ++ __sanitizer_syscall_post_impl_accept4@Base 4.9 ++ __sanitizer_syscall_post_impl_accept@Base 4.9 ++ __sanitizer_syscall_post_impl_access@Base 4.9 ++ __sanitizer_syscall_post_impl_acct@Base 4.9 ++ __sanitizer_syscall_post_impl_add_key@Base 4.9 ++ __sanitizer_syscall_post_impl_adjtimex@Base 4.9 ++ __sanitizer_syscall_post_impl_alarm@Base 4.9 ++ __sanitizer_syscall_post_impl_bdflush@Base 4.9 ++ __sanitizer_syscall_post_impl_bind@Base 4.9 ++ __sanitizer_syscall_post_impl_brk@Base 4.9 ++ __sanitizer_syscall_post_impl_capget@Base 4.9 ++ __sanitizer_syscall_post_impl_capset@Base 4.9 ++ __sanitizer_syscall_post_impl_chdir@Base 4.9 ++ __sanitizer_syscall_post_impl_chmod@Base 4.9 ++ __sanitizer_syscall_post_impl_chown@Base 4.9 ++ __sanitizer_syscall_post_impl_chroot@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_adjtime@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_getres@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_gettime@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_nanosleep@Base 4.9 ++ __sanitizer_syscall_post_impl_clock_settime@Base 4.9 ++ __sanitizer_syscall_post_impl_close@Base 4.9 ++ __sanitizer_syscall_post_impl_connect@Base 4.9 ++ __sanitizer_syscall_post_impl_creat@Base 4.9 ++ __sanitizer_syscall_post_impl_delete_module@Base 4.9 ++ __sanitizer_syscall_post_impl_dup2@Base 4.9 ++ __sanitizer_syscall_post_impl_dup3@Base 4.9 ++ __sanitizer_syscall_post_impl_dup@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_create1@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_create@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_ctl@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_pwait2@Base 12 ++ __sanitizer_syscall_post_impl_epoll_pwait@Base 4.9 ++ __sanitizer_syscall_post_impl_epoll_wait@Base 4.9 ++ __sanitizer_syscall_post_impl_eventfd2@Base 4.9 ++ __sanitizer_syscall_post_impl_eventfd@Base 4.9 ++ __sanitizer_syscall_post_impl_exit@Base 4.9 ++ __sanitizer_syscall_post_impl_exit_group@Base 4.9 ++ __sanitizer_syscall_post_impl_faccessat@Base 4.9 ++ __sanitizer_syscall_post_impl_fchdir@Base 4.9 ++ __sanitizer_syscall_post_impl_fchmod@Base 4.9 ++ __sanitizer_syscall_post_impl_fchmodat@Base 4.9 ++ __sanitizer_syscall_post_impl_fchown@Base 4.9 ++ __sanitizer_syscall_post_impl_fchownat@Base 4.9 ++ __sanitizer_syscall_post_impl_fcntl64@Base 4.9 ++ __sanitizer_syscall_post_impl_fcntl@Base 4.9 ++ __sanitizer_syscall_post_impl_fdatasync@Base 4.9 ++ __sanitizer_syscall_post_impl_fgetxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_flistxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_flock@Base 4.9 ++ __sanitizer_syscall_post_impl_fork@Base 4.9 ++ __sanitizer_syscall_post_impl_fremovexattr@Base 4.9 ++ __sanitizer_syscall_post_impl_fsetxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_fstat64@Base 4.9 ++ __sanitizer_syscall_post_impl_fstat@Base 4.9 ++ __sanitizer_syscall_post_impl_fstatat64@Base 4.9 ++ __sanitizer_syscall_post_impl_fstatfs64@Base 4.9 ++ __sanitizer_syscall_post_impl_fstatfs@Base 4.9 ++ __sanitizer_syscall_post_impl_fsync@Base 4.9 ++ __sanitizer_syscall_post_impl_ftruncate@Base 4.9 ++ __sanitizer_syscall_post_impl_futimesat@Base 4.9 ++ __sanitizer_syscall_post_impl_get_mempolicy@Base 4.9 ++ __sanitizer_syscall_post_impl_get_robust_list@Base 4.9 ++ __sanitizer_syscall_post_impl_getcpu@Base 4.9 ++ __sanitizer_syscall_post_impl_getcwd@Base 4.9 ++ __sanitizer_syscall_post_impl_getdents64@Base 4.9 ++ __sanitizer_syscall_post_impl_getdents@Base 4.9 ++ __sanitizer_syscall_post_impl_getegid@Base 4.9 ++ __sanitizer_syscall_post_impl_geteuid@Base 4.9 ++ __sanitizer_syscall_post_impl_getgid@Base 4.9 ++ __sanitizer_syscall_post_impl_getgroups@Base 4.9 ++ __sanitizer_syscall_post_impl_gethostname@Base 4.9 ++ __sanitizer_syscall_post_impl_getitimer@Base 4.9 ++ __sanitizer_syscall_post_impl_getpeername@Base 4.9 ++ __sanitizer_syscall_post_impl_getpgid@Base 4.9 ++ __sanitizer_syscall_post_impl_getpgrp@Base 4.9 ++ __sanitizer_syscall_post_impl_getpid@Base 4.9 ++ __sanitizer_syscall_post_impl_getppid@Base 4.9 ++ __sanitizer_syscall_post_impl_getpriority@Base 4.9 ++ __sanitizer_syscall_post_impl_getrandom@Base 10 ++ __sanitizer_syscall_post_impl_getresgid@Base 4.9 ++ __sanitizer_syscall_post_impl_getresuid@Base 4.9 ++ __sanitizer_syscall_post_impl_getrlimit@Base 4.9 ++ __sanitizer_syscall_post_impl_getrusage@Base 4.9 ++ __sanitizer_syscall_post_impl_getsid@Base 4.9 ++ __sanitizer_syscall_post_impl_getsockname@Base 4.9 ++ __sanitizer_syscall_post_impl_getsockopt@Base 4.9 ++ __sanitizer_syscall_post_impl_gettid@Base 4.9 ++ __sanitizer_syscall_post_impl_gettimeofday@Base 4.9 ++ __sanitizer_syscall_post_impl_getuid@Base 4.9 ++ __sanitizer_syscall_post_impl_getxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_init_module@Base 4.9 ++ __sanitizer_syscall_post_impl_inotify_add_watch@Base 4.9 ++ __sanitizer_syscall_post_impl_inotify_init1@Base 4.9 ++ __sanitizer_syscall_post_impl_inotify_init@Base 4.9 ++ __sanitizer_syscall_post_impl_inotify_rm_watch@Base 4.9 ++ __sanitizer_syscall_post_impl_io_cancel@Base 4.9 ++ __sanitizer_syscall_post_impl_io_destroy@Base 4.9 ++ __sanitizer_syscall_post_impl_io_getevents@Base 4.9 ++ __sanitizer_syscall_post_impl_io_setup@Base 4.9 ++ __sanitizer_syscall_post_impl_io_submit@Base 4.9 ++ __sanitizer_syscall_post_impl_ioctl@Base 4.9 ++ __sanitizer_syscall_post_impl_ioperm@Base 4.9 ++ __sanitizer_syscall_post_impl_ioprio_get@Base 4.9 ++ __sanitizer_syscall_post_impl_ioprio_set@Base 4.9 ++ __sanitizer_syscall_post_impl_ipc@Base 4.9 ++ __sanitizer_syscall_post_impl_kexec_load@Base 4.9 ++ __sanitizer_syscall_post_impl_keyctl@Base 4.9 ++ __sanitizer_syscall_post_impl_kill@Base 4.9 ++ __sanitizer_syscall_post_impl_lchown@Base 4.9 ++ __sanitizer_syscall_post_impl_lgetxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_link@Base 4.9 ++ __sanitizer_syscall_post_impl_linkat@Base 4.9 ++ __sanitizer_syscall_post_impl_listen@Base 4.9 ++ __sanitizer_syscall_post_impl_listxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_llistxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_llseek@Base 4.9 ++ __sanitizer_syscall_post_impl_lookup_dcookie@Base 4.9 ++ __sanitizer_syscall_post_impl_lremovexattr@Base 4.9 ++ __sanitizer_syscall_post_impl_lseek@Base 4.9 ++ __sanitizer_syscall_post_impl_lsetxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_lstat64@Base 4.9 ++ __sanitizer_syscall_post_impl_lstat@Base 4.9 ++ __sanitizer_syscall_post_impl_madvise@Base 4.9 ++ __sanitizer_syscall_post_impl_mbind@Base 4.9 ++ __sanitizer_syscall_post_impl_migrate_pages@Base 4.9 ++ __sanitizer_syscall_post_impl_mincore@Base 4.9 ++ __sanitizer_syscall_post_impl_mkdir@Base 4.9 ++ __sanitizer_syscall_post_impl_mkdirat@Base 4.9 ++ __sanitizer_syscall_post_impl_mknod@Base 4.9 ++ __sanitizer_syscall_post_impl_mknodat@Base 4.9 ++ __sanitizer_syscall_post_impl_mlock@Base 4.9 ++ __sanitizer_syscall_post_impl_mlockall@Base 4.9 ++ __sanitizer_syscall_post_impl_mmap_pgoff@Base 4.9 ++ __sanitizer_syscall_post_impl_mount@Base 4.9 ++ __sanitizer_syscall_post_impl_move_pages@Base 4.9 ++ __sanitizer_syscall_post_impl_mprotect@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_getsetattr@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_notify@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_open@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_timedreceive@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_timedsend@Base 4.9 ++ __sanitizer_syscall_post_impl_mq_unlink@Base 4.9 ++ __sanitizer_syscall_post_impl_mremap@Base 4.9 ++ __sanitizer_syscall_post_impl_msgctl@Base 4.9 ++ __sanitizer_syscall_post_impl_msgget@Base 4.9 ++ __sanitizer_syscall_post_impl_msgrcv@Base 4.9 ++ __sanitizer_syscall_post_impl_msgsnd@Base 4.9 ++ __sanitizer_syscall_post_impl_msync@Base 4.9 ++ __sanitizer_syscall_post_impl_munlock@Base 4.9 ++ __sanitizer_syscall_post_impl_munlockall@Base 4.9 ++ __sanitizer_syscall_post_impl_munmap@Base 4.9 ++ __sanitizer_syscall_post_impl_name_to_handle_at@Base 4.9 ++ __sanitizer_syscall_post_impl_nanosleep@Base 4.9 ++ __sanitizer_syscall_post_impl_newfstat@Base 4.9 ++ __sanitizer_syscall_post_impl_newfstatat@Base 4.9 ++ __sanitizer_syscall_post_impl_newlstat@Base 4.9 ++ __sanitizer_syscall_post_impl_newstat@Base 4.9 ++ __sanitizer_syscall_post_impl_newuname@Base 4.9 ++ __sanitizer_syscall_post_impl_ni_syscall@Base 4.9 ++ __sanitizer_syscall_post_impl_nice@Base 4.9 ++ __sanitizer_syscall_post_impl_old_getrlimit@Base 4.9 ++ __sanitizer_syscall_post_impl_old_mmap@Base 4.9 ++ __sanitizer_syscall_post_impl_old_readdir@Base 4.9 ++ __sanitizer_syscall_post_impl_old_select@Base 4.9 ++ __sanitizer_syscall_post_impl_oldumount@Base 4.9 ++ __sanitizer_syscall_post_impl_olduname@Base 4.9 ++ __sanitizer_syscall_post_impl_open@Base 4.9 ++ __sanitizer_syscall_post_impl_open_by_handle_at@Base 4.9 ++ __sanitizer_syscall_post_impl_openat@Base 4.9 ++ __sanitizer_syscall_post_impl_pause@Base 4.9 ++ __sanitizer_syscall_post_impl_pciconfig_iobase@Base 4.9 ++ __sanitizer_syscall_post_impl_pciconfig_read@Base 4.9 ++ __sanitizer_syscall_post_impl_pciconfig_write@Base 4.9 ++ __sanitizer_syscall_post_impl_perf_event_open@Base 4.9 ++ __sanitizer_syscall_post_impl_personality@Base 4.9 ++ __sanitizer_syscall_post_impl_pipe2@Base 4.9 ++ __sanitizer_syscall_post_impl_pipe@Base 4.9 ++ __sanitizer_syscall_post_impl_pivot_root@Base 4.9 ++ __sanitizer_syscall_post_impl_poll@Base 4.9 ++ __sanitizer_syscall_post_impl_ppoll@Base 4.9 ++ __sanitizer_syscall_post_impl_pread64@Base 4.9 ++ __sanitizer_syscall_post_impl_preadv@Base 4.9 ++ __sanitizer_syscall_post_impl_prlimit64@Base 4.9 ++ __sanitizer_syscall_post_impl_process_vm_readv@Base 4.9 ++ __sanitizer_syscall_post_impl_process_vm_writev@Base 4.9 ++ __sanitizer_syscall_post_impl_pselect6@Base 4.9 ++ __sanitizer_syscall_post_impl_ptrace@Base 4.9 ++ __sanitizer_syscall_post_impl_pwrite64@Base 4.9 ++ __sanitizer_syscall_post_impl_pwritev@Base 4.9 ++ __sanitizer_syscall_post_impl_quotactl@Base 4.9 ++ __sanitizer_syscall_post_impl_read@Base 4.9 ++ __sanitizer_syscall_post_impl_readlink@Base 4.9 ++ __sanitizer_syscall_post_impl_readlinkat@Base 4.9 ++ __sanitizer_syscall_post_impl_readv@Base 4.9 ++ __sanitizer_syscall_post_impl_reboot@Base 4.9 ++ __sanitizer_syscall_post_impl_recv@Base 4.9 ++ __sanitizer_syscall_post_impl_recvfrom@Base 4.9 ++ __sanitizer_syscall_post_impl_recvmmsg@Base 4.9 ++ __sanitizer_syscall_post_impl_recvmsg@Base 4.9 ++ __sanitizer_syscall_post_impl_remap_file_pages@Base 4.9 ++ __sanitizer_syscall_post_impl_removexattr@Base 4.9 ++ __sanitizer_syscall_post_impl_rename@Base 4.9 ++ __sanitizer_syscall_post_impl_renameat@Base 4.9 ++ __sanitizer_syscall_post_impl_request_key@Base 4.9 ++ __sanitizer_syscall_post_impl_restart_syscall@Base 4.9 ++ __sanitizer_syscall_post_impl_rmdir@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_sigaction@Base 7 ++ __sanitizer_syscall_post_impl_rt_sigpending@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_sigprocmask@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_sigqueueinfo@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_sigtimedwait@Base 4.9 ++ __sanitizer_syscall_post_impl_rt_tgsigqueueinfo@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_get_priority_max@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_get_priority_min@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_getaffinity@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_getparam@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_getscheduler@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_rr_get_interval@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_setaffinity@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_setparam@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_setscheduler@Base 4.9 ++ __sanitizer_syscall_post_impl_sched_yield@Base 4.9 ++ __sanitizer_syscall_post_impl_select@Base 4.9 ++ __sanitizer_syscall_post_impl_semctl@Base 4.9 ++ __sanitizer_syscall_post_impl_semget@Base 4.9 ++ __sanitizer_syscall_post_impl_semop@Base 4.9 ++ __sanitizer_syscall_post_impl_semtimedop@Base 4.9 ++ __sanitizer_syscall_post_impl_send@Base 4.9 ++ __sanitizer_syscall_post_impl_sendfile64@Base 4.9 ++ __sanitizer_syscall_post_impl_sendfile@Base 4.9 ++ __sanitizer_syscall_post_impl_sendmmsg@Base 4.9 ++ __sanitizer_syscall_post_impl_sendmsg@Base 4.9 ++ __sanitizer_syscall_post_impl_sendto@Base 4.9 ++ __sanitizer_syscall_post_impl_set_mempolicy@Base 4.9 ++ __sanitizer_syscall_post_impl_set_robust_list@Base 4.9 ++ __sanitizer_syscall_post_impl_set_tid_address@Base 4.9 ++ __sanitizer_syscall_post_impl_setdomainname@Base 4.9 ++ __sanitizer_syscall_post_impl_setfsgid@Base 4.9 ++ __sanitizer_syscall_post_impl_setfsuid@Base 4.9 ++ __sanitizer_syscall_post_impl_setgid@Base 4.9 ++ __sanitizer_syscall_post_impl_setgroups@Base 4.9 ++ __sanitizer_syscall_post_impl_sethostname@Base 4.9 ++ __sanitizer_syscall_post_impl_setitimer@Base 4.9 ++ __sanitizer_syscall_post_impl_setns@Base 4.9 ++ __sanitizer_syscall_post_impl_setpgid@Base 4.9 ++ __sanitizer_syscall_post_impl_setpriority@Base 4.9 ++ __sanitizer_syscall_post_impl_setregid@Base 4.9 ++ __sanitizer_syscall_post_impl_setresgid@Base 4.9 ++ __sanitizer_syscall_post_impl_setresuid@Base 4.9 ++ __sanitizer_syscall_post_impl_setreuid@Base 4.9 ++ __sanitizer_syscall_post_impl_setrlimit@Base 4.9 ++ __sanitizer_syscall_post_impl_setsid@Base 4.9 ++ __sanitizer_syscall_post_impl_setsockopt@Base 4.9 ++ __sanitizer_syscall_post_impl_settimeofday@Base 4.9 ++ __sanitizer_syscall_post_impl_setuid@Base 4.9 ++ __sanitizer_syscall_post_impl_setxattr@Base 4.9 ++ __sanitizer_syscall_post_impl_sgetmask@Base 4.9 ++ __sanitizer_syscall_post_impl_shmat@Base 4.9 ++ __sanitizer_syscall_post_impl_shmctl@Base 4.9 ++ __sanitizer_syscall_post_impl_shmdt@Base 4.9 ++ __sanitizer_syscall_post_impl_shmget@Base 4.9 ++ __sanitizer_syscall_post_impl_shutdown@Base 4.9 ++ __sanitizer_syscall_post_impl_sigaction@Base 7 ++ __sanitizer_syscall_post_impl_sigaltstack@Base 11 ++ __sanitizer_syscall_post_impl_signal@Base 4.9 ++ __sanitizer_syscall_post_impl_signalfd4@Base 4.9 ++ __sanitizer_syscall_post_impl_signalfd@Base 4.9 ++ __sanitizer_syscall_post_impl_sigpending@Base 4.9 ++ __sanitizer_syscall_post_impl_sigprocmask@Base 4.9 ++ __sanitizer_syscall_post_impl_socket@Base 4.9 ++ __sanitizer_syscall_post_impl_socketcall@Base 4.9 ++ __sanitizer_syscall_post_impl_socketpair@Base 4.9 ++ __sanitizer_syscall_post_impl_splice@Base 4.9 ++ __sanitizer_syscall_post_impl_spu_create@Base 4.9 ++ __sanitizer_syscall_post_impl_spu_run@Base 4.9 ++ __sanitizer_syscall_post_impl_ssetmask@Base 4.9 ++ __sanitizer_syscall_post_impl_stat64@Base 4.9 ++ __sanitizer_syscall_post_impl_stat@Base 4.9 ++ __sanitizer_syscall_post_impl_statfs64@Base 4.9 ++ __sanitizer_syscall_post_impl_statfs@Base 4.9 ++ __sanitizer_syscall_post_impl_stime@Base 4.9 ++ __sanitizer_syscall_post_impl_swapoff@Base 4.9 ++ __sanitizer_syscall_post_impl_swapon@Base 4.9 ++ __sanitizer_syscall_post_impl_symlink@Base 4.9 ++ __sanitizer_syscall_post_impl_symlinkat@Base 4.9 ++ __sanitizer_syscall_post_impl_sync@Base 4.9 ++ __sanitizer_syscall_post_impl_syncfs@Base 4.9 ++ __sanitizer_syscall_post_impl_sysctl@Base 4.9 ++ __sanitizer_syscall_post_impl_sysfs@Base 4.9 ++ __sanitizer_syscall_post_impl_sysinfo@Base 4.9 ++ __sanitizer_syscall_post_impl_syslog@Base 4.9 ++ __sanitizer_syscall_post_impl_tee@Base 4.9 ++ __sanitizer_syscall_post_impl_tgkill@Base 4.9 ++ __sanitizer_syscall_post_impl_time@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_create@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_delete@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_getoverrun@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_gettime@Base 4.9 ++ __sanitizer_syscall_post_impl_timer_settime@Base 4.9 ++ __sanitizer_syscall_post_impl_timerfd_create@Base 4.9 ++ __sanitizer_syscall_post_impl_timerfd_gettime@Base 4.9 ++ __sanitizer_syscall_post_impl_timerfd_settime@Base 4.9 ++ __sanitizer_syscall_post_impl_times@Base 4.9 ++ __sanitizer_syscall_post_impl_tkill@Base 4.9 ++ __sanitizer_syscall_post_impl_truncate@Base 4.9 ++ __sanitizer_syscall_post_impl_umask@Base 4.9 ++ __sanitizer_syscall_post_impl_umount@Base 4.9 ++ __sanitizer_syscall_post_impl_uname@Base 4.9 ++ __sanitizer_syscall_post_impl_unlink@Base 4.9 ++ __sanitizer_syscall_post_impl_unlinkat@Base 4.9 ++ __sanitizer_syscall_post_impl_unshare@Base 4.9 ++ __sanitizer_syscall_post_impl_uselib@Base 4.9 ++ __sanitizer_syscall_post_impl_ustat@Base 4.9 ++ __sanitizer_syscall_post_impl_utime@Base 4.9 ++ __sanitizer_syscall_post_impl_utimensat@Base 4.9 ++ __sanitizer_syscall_post_impl_utimes@Base 4.9 ++ __sanitizer_syscall_post_impl_vfork@Base 4.9 ++ __sanitizer_syscall_post_impl_vhangup@Base 4.9 ++ __sanitizer_syscall_post_impl_vmsplice@Base 4.9 ++ __sanitizer_syscall_post_impl_wait4@Base 4.9 ++ __sanitizer_syscall_post_impl_waitid@Base 4.9 ++ __sanitizer_syscall_post_impl_waitpid@Base 4.9 ++ __sanitizer_syscall_post_impl_write@Base 4.9 ++ __sanitizer_syscall_post_impl_writev@Base 4.9 ++ __sanitizer_syscall_pre_impl_accept4@Base 4.9 ++ __sanitizer_syscall_pre_impl_accept@Base 4.9 ++ __sanitizer_syscall_pre_impl_access@Base 4.9 ++ __sanitizer_syscall_pre_impl_acct@Base 4.9 ++ __sanitizer_syscall_pre_impl_add_key@Base 4.9 ++ __sanitizer_syscall_pre_impl_adjtimex@Base 4.9 ++ __sanitizer_syscall_pre_impl_alarm@Base 4.9 ++ __sanitizer_syscall_pre_impl_bdflush@Base 4.9 ++ __sanitizer_syscall_pre_impl_bind@Base 4.9 ++ __sanitizer_syscall_pre_impl_brk@Base 4.9 ++ __sanitizer_syscall_pre_impl_capget@Base 4.9 ++ __sanitizer_syscall_pre_impl_capset@Base 4.9 ++ __sanitizer_syscall_pre_impl_chdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_chmod@Base 4.9 ++ __sanitizer_syscall_pre_impl_chown@Base 4.9 ++ __sanitizer_syscall_pre_impl_chroot@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_adjtime@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_getres@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_gettime@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_nanosleep@Base 4.9 ++ __sanitizer_syscall_pre_impl_clock_settime@Base 4.9 ++ __sanitizer_syscall_pre_impl_close@Base 4.9 ++ __sanitizer_syscall_pre_impl_connect@Base 4.9 ++ __sanitizer_syscall_pre_impl_creat@Base 4.9 ++ __sanitizer_syscall_pre_impl_delete_module@Base 4.9 ++ __sanitizer_syscall_pre_impl_dup2@Base 4.9 ++ __sanitizer_syscall_pre_impl_dup3@Base 4.9 ++ __sanitizer_syscall_pre_impl_dup@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_create1@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_create@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_ctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_pwait2@Base 12 ++ __sanitizer_syscall_pre_impl_epoll_pwait@Base 4.9 ++ __sanitizer_syscall_pre_impl_epoll_wait@Base 4.9 ++ __sanitizer_syscall_pre_impl_eventfd2@Base 4.9 ++ __sanitizer_syscall_pre_impl_eventfd@Base 4.9 ++ __sanitizer_syscall_pre_impl_exit@Base 4.9 ++ __sanitizer_syscall_pre_impl_exit_group@Base 4.9 ++ __sanitizer_syscall_pre_impl_faccessat@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchmod@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchmodat@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchown@Base 4.9 ++ __sanitizer_syscall_pre_impl_fchownat@Base 4.9 ++ __sanitizer_syscall_pre_impl_fcntl64@Base 4.9 ++ __sanitizer_syscall_pre_impl_fcntl@Base 4.9 ++ __sanitizer_syscall_pre_impl_fdatasync@Base 4.9 ++ __sanitizer_syscall_pre_impl_fgetxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_flistxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_flock@Base 4.9 ++ __sanitizer_syscall_pre_impl_fork@Base 4.9 ++ __sanitizer_syscall_pre_impl_fremovexattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_fsetxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstat64@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstatat64@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstatfs64@Base 4.9 ++ __sanitizer_syscall_pre_impl_fstatfs@Base 4.9 ++ __sanitizer_syscall_pre_impl_fsync@Base 4.9 ++ __sanitizer_syscall_pre_impl_ftruncate@Base 4.9 ++ __sanitizer_syscall_pre_impl_futimesat@Base 4.9 ++ __sanitizer_syscall_pre_impl_get_mempolicy@Base 4.9 ++ __sanitizer_syscall_pre_impl_get_robust_list@Base 4.9 ++ __sanitizer_syscall_pre_impl_getcpu@Base 4.9 ++ __sanitizer_syscall_pre_impl_getcwd@Base 4.9 ++ __sanitizer_syscall_pre_impl_getdents64@Base 4.9 ++ __sanitizer_syscall_pre_impl_getdents@Base 4.9 ++ __sanitizer_syscall_pre_impl_getegid@Base 4.9 ++ __sanitizer_syscall_pre_impl_geteuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getgroups@Base 4.9 ++ __sanitizer_syscall_pre_impl_gethostname@Base 4.9 ++ __sanitizer_syscall_pre_impl_getitimer@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpeername@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpgrp@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getppid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getpriority@Base 4.9 ++ __sanitizer_syscall_pre_impl_getrandom@Base 10 ++ __sanitizer_syscall_pre_impl_getresgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getresuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getrlimit@Base 4.9 ++ __sanitizer_syscall_pre_impl_getrusage@Base 4.9 ++ __sanitizer_syscall_pre_impl_getsid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getsockname@Base 4.9 ++ __sanitizer_syscall_pre_impl_getsockopt@Base 4.9 ++ __sanitizer_syscall_pre_impl_gettid@Base 4.9 ++ __sanitizer_syscall_pre_impl_gettimeofday@Base 4.9 ++ __sanitizer_syscall_pre_impl_getuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_getxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_init_module@Base 4.9 ++ __sanitizer_syscall_pre_impl_inotify_add_watch@Base 4.9 ++ __sanitizer_syscall_pre_impl_inotify_init1@Base 4.9 ++ __sanitizer_syscall_pre_impl_inotify_init@Base 4.9 ++ __sanitizer_syscall_pre_impl_inotify_rm_watch@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_cancel@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_destroy@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_getevents@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_setup@Base 4.9 ++ __sanitizer_syscall_pre_impl_io_submit@Base 4.9 ++ __sanitizer_syscall_pre_impl_ioctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_ioperm@Base 4.9 ++ __sanitizer_syscall_pre_impl_ioprio_get@Base 4.9 ++ __sanitizer_syscall_pre_impl_ioprio_set@Base 4.9 ++ __sanitizer_syscall_pre_impl_ipc@Base 4.9 ++ __sanitizer_syscall_pre_impl_kexec_load@Base 4.9 ++ __sanitizer_syscall_pre_impl_keyctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_kill@Base 4.9 ++ __sanitizer_syscall_pre_impl_lchown@Base 4.9 ++ __sanitizer_syscall_pre_impl_lgetxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_link@Base 4.9 ++ __sanitizer_syscall_pre_impl_linkat@Base 4.9 ++ __sanitizer_syscall_pre_impl_listen@Base 4.9 ++ __sanitizer_syscall_pre_impl_listxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_llistxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_llseek@Base 4.9 ++ __sanitizer_syscall_pre_impl_lookup_dcookie@Base 4.9 ++ __sanitizer_syscall_pre_impl_lremovexattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_lseek@Base 4.9 ++ __sanitizer_syscall_pre_impl_lsetxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_lstat64@Base 4.9 ++ __sanitizer_syscall_pre_impl_lstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_madvise@Base 4.9 ++ __sanitizer_syscall_pre_impl_mbind@Base 4.9 ++ __sanitizer_syscall_pre_impl_migrate_pages@Base 4.9 ++ __sanitizer_syscall_pre_impl_mincore@Base 4.9 ++ __sanitizer_syscall_pre_impl_mkdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_mkdirat@Base 4.9 ++ __sanitizer_syscall_pre_impl_mknod@Base 4.9 ++ __sanitizer_syscall_pre_impl_mknodat@Base 4.9 ++ __sanitizer_syscall_pre_impl_mlock@Base 4.9 ++ __sanitizer_syscall_pre_impl_mlockall@Base 4.9 ++ __sanitizer_syscall_pre_impl_mmap_pgoff@Base 4.9 ++ __sanitizer_syscall_pre_impl_mount@Base 4.9 ++ __sanitizer_syscall_pre_impl_move_pages@Base 4.9 ++ __sanitizer_syscall_pre_impl_mprotect@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_getsetattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_notify@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_open@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_timedreceive@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_timedsend@Base 4.9 ++ __sanitizer_syscall_pre_impl_mq_unlink@Base 4.9 ++ __sanitizer_syscall_pre_impl_mremap@Base 4.9 ++ __sanitizer_syscall_pre_impl_msgctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_msgget@Base 4.9 ++ __sanitizer_syscall_pre_impl_msgrcv@Base 4.9 ++ __sanitizer_syscall_pre_impl_msgsnd@Base 4.9 ++ __sanitizer_syscall_pre_impl_msync@Base 4.9 ++ __sanitizer_syscall_pre_impl_munlock@Base 4.9 ++ __sanitizer_syscall_pre_impl_munlockall@Base 4.9 ++ __sanitizer_syscall_pre_impl_munmap@Base 4.9 ++ __sanitizer_syscall_pre_impl_name_to_handle_at@Base 4.9 ++ __sanitizer_syscall_pre_impl_nanosleep@Base 4.9 ++ __sanitizer_syscall_pre_impl_newfstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_newfstatat@Base 4.9 ++ __sanitizer_syscall_pre_impl_newlstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_newstat@Base 4.9 ++ __sanitizer_syscall_pre_impl_newuname@Base 4.9 ++ __sanitizer_syscall_pre_impl_ni_syscall@Base 4.9 ++ __sanitizer_syscall_pre_impl_nice@Base 4.9 ++ __sanitizer_syscall_pre_impl_old_getrlimit@Base 4.9 ++ __sanitizer_syscall_pre_impl_old_mmap@Base 4.9 ++ __sanitizer_syscall_pre_impl_old_readdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_old_select@Base 4.9 ++ __sanitizer_syscall_pre_impl_oldumount@Base 4.9 ++ __sanitizer_syscall_pre_impl_olduname@Base 4.9 ++ __sanitizer_syscall_pre_impl_open@Base 4.9 ++ __sanitizer_syscall_pre_impl_open_by_handle_at@Base 4.9 ++ __sanitizer_syscall_pre_impl_openat@Base 4.9 ++ __sanitizer_syscall_pre_impl_pause@Base 4.9 ++ __sanitizer_syscall_pre_impl_pciconfig_iobase@Base 4.9 ++ __sanitizer_syscall_pre_impl_pciconfig_read@Base 4.9 ++ __sanitizer_syscall_pre_impl_pciconfig_write@Base 4.9 ++ __sanitizer_syscall_pre_impl_perf_event_open@Base 4.9 ++ __sanitizer_syscall_pre_impl_personality@Base 4.9 ++ __sanitizer_syscall_pre_impl_pipe2@Base 4.9 ++ __sanitizer_syscall_pre_impl_pipe@Base 4.9 ++ __sanitizer_syscall_pre_impl_pivot_root@Base 4.9 ++ __sanitizer_syscall_pre_impl_poll@Base 4.9 ++ __sanitizer_syscall_pre_impl_ppoll@Base 4.9 ++ __sanitizer_syscall_pre_impl_pread64@Base 4.9 ++ __sanitizer_syscall_pre_impl_preadv@Base 4.9 ++ __sanitizer_syscall_pre_impl_prlimit64@Base 4.9 ++ __sanitizer_syscall_pre_impl_process_vm_readv@Base 4.9 ++ __sanitizer_syscall_pre_impl_process_vm_writev@Base 4.9 ++ __sanitizer_syscall_pre_impl_pselect6@Base 4.9 ++ __sanitizer_syscall_pre_impl_ptrace@Base 4.9 ++ __sanitizer_syscall_pre_impl_pwrite64@Base 4.9 ++ __sanitizer_syscall_pre_impl_pwritev@Base 4.9 ++ __sanitizer_syscall_pre_impl_quotactl@Base 4.9 ++ __sanitizer_syscall_pre_impl_read@Base 4.9 ++ __sanitizer_syscall_pre_impl_readlink@Base 4.9 ++ __sanitizer_syscall_pre_impl_readlinkat@Base 4.9 ++ __sanitizer_syscall_pre_impl_readv@Base 4.9 ++ __sanitizer_syscall_pre_impl_reboot@Base 4.9 ++ __sanitizer_syscall_pre_impl_recv@Base 4.9 ++ __sanitizer_syscall_pre_impl_recvfrom@Base 4.9 ++ __sanitizer_syscall_pre_impl_recvmmsg@Base 4.9 ++ __sanitizer_syscall_pre_impl_recvmsg@Base 4.9 ++ __sanitizer_syscall_pre_impl_remap_file_pages@Base 4.9 ++ __sanitizer_syscall_pre_impl_removexattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_rename@Base 4.9 ++ __sanitizer_syscall_pre_impl_renameat@Base 4.9 ++ __sanitizer_syscall_pre_impl_request_key@Base 4.9 ++ __sanitizer_syscall_pre_impl_restart_syscall@Base 4.9 ++ __sanitizer_syscall_pre_impl_rmdir@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_sigaction@Base 7 ++ __sanitizer_syscall_pre_impl_rt_sigpending@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_sigprocmask@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_sigqueueinfo@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_sigtimedwait@Base 4.9 ++ __sanitizer_syscall_pre_impl_rt_tgsigqueueinfo@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_get_priority_max@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_get_priority_min@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_getaffinity@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_getparam@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_getscheduler@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_rr_get_interval@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_setaffinity@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_setparam@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_setscheduler@Base 4.9 ++ __sanitizer_syscall_pre_impl_sched_yield@Base 4.9 ++ __sanitizer_syscall_pre_impl_select@Base 4.9 ++ __sanitizer_syscall_pre_impl_semctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_semget@Base 4.9 ++ __sanitizer_syscall_pre_impl_semop@Base 4.9 ++ __sanitizer_syscall_pre_impl_semtimedop@Base 4.9 ++ __sanitizer_syscall_pre_impl_send@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendfile64@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendfile@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendmmsg@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendmsg@Base 4.9 ++ __sanitizer_syscall_pre_impl_sendto@Base 4.9 ++ __sanitizer_syscall_pre_impl_set_mempolicy@Base 4.9 ++ __sanitizer_syscall_pre_impl_set_robust_list@Base 4.9 ++ __sanitizer_syscall_pre_impl_set_tid_address@Base 4.9 ++ __sanitizer_syscall_pre_impl_setdomainname@Base 4.9 ++ __sanitizer_syscall_pre_impl_setfsgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setfsuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setgroups@Base 4.9 ++ __sanitizer_syscall_pre_impl_sethostname@Base 4.9 ++ __sanitizer_syscall_pre_impl_setitimer@Base 4.9 ++ __sanitizer_syscall_pre_impl_setns@Base 4.9 ++ __sanitizer_syscall_pre_impl_setpgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setpriority@Base 4.9 ++ __sanitizer_syscall_pre_impl_setregid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setresgid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setresuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setreuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setrlimit@Base 4.9 ++ __sanitizer_syscall_pre_impl_setsid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setsockopt@Base 4.9 ++ __sanitizer_syscall_pre_impl_settimeofday@Base 4.9 ++ __sanitizer_syscall_pre_impl_setuid@Base 4.9 ++ __sanitizer_syscall_pre_impl_setxattr@Base 4.9 ++ __sanitizer_syscall_pre_impl_sgetmask@Base 4.9 ++ __sanitizer_syscall_pre_impl_shmat@Base 4.9 ++ __sanitizer_syscall_pre_impl_shmctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_shmdt@Base 4.9 ++ __sanitizer_syscall_pre_impl_shmget@Base 4.9 ++ __sanitizer_syscall_pre_impl_shutdown@Base 4.9 ++ __sanitizer_syscall_pre_impl_sigaction@Base 7 ++ __sanitizer_syscall_pre_impl_sigaltstack@Base 11 ++ __sanitizer_syscall_pre_impl_signal@Base 4.9 ++ __sanitizer_syscall_pre_impl_signalfd4@Base 4.9 ++ __sanitizer_syscall_pre_impl_signalfd@Base 4.9 ++ __sanitizer_syscall_pre_impl_sigpending@Base 4.9 ++ __sanitizer_syscall_pre_impl_sigprocmask@Base 4.9 ++ __sanitizer_syscall_pre_impl_socket@Base 4.9 ++ __sanitizer_syscall_pre_impl_socketcall@Base 4.9 ++ __sanitizer_syscall_pre_impl_socketpair@Base 4.9 ++ __sanitizer_syscall_pre_impl_splice@Base 4.9 ++ __sanitizer_syscall_pre_impl_spu_create@Base 4.9 ++ __sanitizer_syscall_pre_impl_spu_run@Base 4.9 ++ __sanitizer_syscall_pre_impl_ssetmask@Base 4.9 ++ __sanitizer_syscall_pre_impl_stat64@Base 4.9 ++ __sanitizer_syscall_pre_impl_stat@Base 4.9 ++ __sanitizer_syscall_pre_impl_statfs64@Base 4.9 ++ __sanitizer_syscall_pre_impl_statfs@Base 4.9 ++ __sanitizer_syscall_pre_impl_stime@Base 4.9 ++ __sanitizer_syscall_pre_impl_swapoff@Base 4.9 ++ __sanitizer_syscall_pre_impl_swapon@Base 4.9 ++ __sanitizer_syscall_pre_impl_symlink@Base 4.9 ++ __sanitizer_syscall_pre_impl_symlinkat@Base 4.9 ++ __sanitizer_syscall_pre_impl_sync@Base 4.9 ++ __sanitizer_syscall_pre_impl_syncfs@Base 4.9 ++ __sanitizer_syscall_pre_impl_sysctl@Base 4.9 ++ __sanitizer_syscall_pre_impl_sysfs@Base 4.9 ++ __sanitizer_syscall_pre_impl_sysinfo@Base 4.9 ++ __sanitizer_syscall_pre_impl_syslog@Base 4.9 ++ __sanitizer_syscall_pre_impl_tee@Base 4.9 ++ __sanitizer_syscall_pre_impl_tgkill@Base 4.9 ++ __sanitizer_syscall_pre_impl_time@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_create@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_delete@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_getoverrun@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_gettime@Base 4.9 ++ __sanitizer_syscall_pre_impl_timer_settime@Base 4.9 ++ __sanitizer_syscall_pre_impl_timerfd_create@Base 4.9 ++ __sanitizer_syscall_pre_impl_timerfd_gettime@Base 4.9 ++ __sanitizer_syscall_pre_impl_timerfd_settime@Base 4.9 ++ __sanitizer_syscall_pre_impl_times@Base 4.9 ++ __sanitizer_syscall_pre_impl_tkill@Base 4.9 ++ __sanitizer_syscall_pre_impl_truncate@Base 4.9 ++ __sanitizer_syscall_pre_impl_umask@Base 4.9 ++ __sanitizer_syscall_pre_impl_umount@Base 4.9 ++ __sanitizer_syscall_pre_impl_uname@Base 4.9 ++ __sanitizer_syscall_pre_impl_unlink@Base 4.9 ++ __sanitizer_syscall_pre_impl_unlinkat@Base 4.9 ++ __sanitizer_syscall_pre_impl_unshare@Base 4.9 ++ __sanitizer_syscall_pre_impl_uselib@Base 4.9 ++ __sanitizer_syscall_pre_impl_ustat@Base 4.9 ++ __sanitizer_syscall_pre_impl_utime@Base 4.9 ++ __sanitizer_syscall_pre_impl_utimensat@Base 4.9 ++ __sanitizer_syscall_pre_impl_utimes@Base 4.9 ++ __sanitizer_syscall_pre_impl_vfork@Base 4.9 ++ __sanitizer_syscall_pre_impl_vhangup@Base 4.9 ++ __sanitizer_syscall_pre_impl_vmsplice@Base 4.9 ++ __sanitizer_syscall_pre_impl_wait4@Base 4.9 ++ __sanitizer_syscall_pre_impl_waitid@Base 4.9 ++ __sanitizer_syscall_pre_impl_waitpid@Base 4.9 ++ __sanitizer_syscall_pre_impl_write@Base 4.9 ++ __sanitizer_syscall_pre_impl_writev@Base 4.9 ++ __sanitizer_unaligned_load16@Base 4.9 ++ __sanitizer_unaligned_load32@Base 4.9 ++ __sanitizer_unaligned_load64@Base 4.9 ++ __sanitizer_unaligned_store16@Base 4.9 ++ __sanitizer_unaligned_store32@Base 4.9 ++ __sanitizer_unaligned_store64@Base 4.9 ++ __sanitizer_weak_hook_memcmp@Base 8 ++ __sanitizer_weak_hook_memmem@Base 8 ++ __sanitizer_weak_hook_strcasecmp@Base 8 ++ __sanitizer_weak_hook_strcasestr@Base 8 ++ __sanitizer_weak_hook_strcmp@Base 8 ++ __sanitizer_weak_hook_strncasecmp@Base 8 ++ __sanitizer_weak_hook_strncmp@Base 8 ++ __sanitizer_weak_hook_strstr@Base 8 ++ __sigsetjmp@Base 4.9 ++ __snprintf_chk@Base 9 ++ __sprintf_chk@Base 9 ++ __strndup@Base 8 ++ __strxfrm_l@Base 9 ++ __tls_get_addr@Base 6 ++ __tsan_acquire@Base 4.9 ++ __tsan_atomic128_compare_exchange_strong@Base 4.9 ++ __tsan_atomic128_compare_exchange_val@Base 4.9 ++ __tsan_atomic128_compare_exchange_weak@Base 4.9 ++ __tsan_atomic128_exchange@Base 4.9 ++ __tsan_atomic128_fetch_add@Base 4.9 ++ __tsan_atomic128_fetch_and@Base 4.9 ++ __tsan_atomic128_fetch_nand@Base 4.9 ++ __tsan_atomic128_fetch_or@Base 4.9 ++ __tsan_atomic128_fetch_sub@Base 4.9 ++ __tsan_atomic128_fetch_xor@Base 4.9 ++ __tsan_atomic128_load@Base 4.9 ++ __tsan_atomic128_store@Base 4.9 ++ __tsan_atomic16_compare_exchange_strong@Base 4.9 ++ __tsan_atomic16_compare_exchange_val@Base 4.9 ++ __tsan_atomic16_compare_exchange_weak@Base 4.9 ++ __tsan_atomic16_exchange@Base 4.9 ++ __tsan_atomic16_fetch_add@Base 4.9 ++ __tsan_atomic16_fetch_and@Base 4.9 ++ __tsan_atomic16_fetch_nand@Base 4.9 ++ __tsan_atomic16_fetch_or@Base 4.9 ++ __tsan_atomic16_fetch_sub@Base 4.9 ++ __tsan_atomic16_fetch_xor@Base 4.9 ++ __tsan_atomic16_load@Base 4.9 ++ __tsan_atomic16_store@Base 4.9 ++ __tsan_atomic32_compare_exchange_strong@Base 4.9 ++ __tsan_atomic32_compare_exchange_val@Base 4.9 ++ __tsan_atomic32_compare_exchange_weak@Base 4.9 ++ __tsan_atomic32_exchange@Base 4.9 ++ __tsan_atomic32_fetch_add@Base 4.9 ++ __tsan_atomic32_fetch_and@Base 4.9 ++ __tsan_atomic32_fetch_nand@Base 4.9 ++ __tsan_atomic32_fetch_or@Base 4.9 ++ __tsan_atomic32_fetch_sub@Base 4.9 ++ __tsan_atomic32_fetch_xor@Base 4.9 ++ __tsan_atomic32_load@Base 4.9 ++ __tsan_atomic32_store@Base 4.9 ++ __tsan_atomic64_compare_exchange_strong@Base 4.9 ++ __tsan_atomic64_compare_exchange_val@Base 4.9 ++ __tsan_atomic64_compare_exchange_weak@Base 4.9 ++ __tsan_atomic64_exchange@Base 4.9 ++ __tsan_atomic64_fetch_add@Base 4.9 ++ __tsan_atomic64_fetch_and@Base 4.9 ++ __tsan_atomic64_fetch_nand@Base 4.9 ++ __tsan_atomic64_fetch_or@Base 4.9 ++ __tsan_atomic64_fetch_sub@Base 4.9 ++ __tsan_atomic64_fetch_xor@Base 4.9 ++ __tsan_atomic64_load@Base 4.9 ++ __tsan_atomic64_store@Base 4.9 ++ __tsan_atomic8_compare_exchange_strong@Base 4.9 ++ __tsan_atomic8_compare_exchange_val@Base 4.9 ++ __tsan_atomic8_compare_exchange_weak@Base 4.9 ++ __tsan_atomic8_exchange@Base 4.9 ++ __tsan_atomic8_fetch_add@Base 4.9 ++ __tsan_atomic8_fetch_and@Base 4.9 ++ __tsan_atomic8_fetch_nand@Base 4.9 ++ __tsan_atomic8_fetch_or@Base 4.9 ++ __tsan_atomic8_fetch_sub@Base 4.9 ++ __tsan_atomic8_fetch_xor@Base 4.9 ++ __tsan_atomic8_load@Base 4.9 ++ __tsan_atomic8_store@Base 4.9 ++ __tsan_atomic_signal_fence@Base 4.9 ++ __tsan_atomic_thread_fence@Base 4.9 ++ __tsan_create_fiber@Base 10 ++ __tsan_default_options@Base 4.9 ++ __tsan_default_suppressions@Base 7 ++ __tsan_destroy_fiber@Base 10 ++ __tsan_external_assign_tag@Base 8 ++ __tsan_external_read@Base 8 ++ __tsan_external_register_header@Base 8 ++ __tsan_external_register_tag@Base 8 ++ __tsan_external_write@Base 8 ++ __tsan_flush_memory@Base 8 ++ __tsan_func_entry@Base 4.9 ++ __tsan_func_exit@Base 4.9 ++ __tsan_get_alloc_stack@Base 8 ++ __tsan_get_current_fiber@Base 10 ++ __tsan_get_current_report@Base 7 ++ __tsan_get_report_data@Base 7 ++ __tsan_get_report_loc@Base 7 ++ __tsan_get_report_loc_object_type@Base 8 ++ __tsan_get_report_mop@Base 7 ++ __tsan_get_report_mutex@Base 7 ++ __tsan_get_report_stack@Base 7 ++ __tsan_get_report_tag@Base 9 ++ __tsan_get_report_thread@Base 7 ++ __tsan_get_report_unique_tid@Base 7 ++ __tsan_ignore_thread_begin@Base 8 ++ __tsan_ignore_thread_end@Base 8 ++ __tsan_init@Base 4.9 ++ __tsan_java_acquire@Base 6 ++ __tsan_java_alloc@Base 4.9 ++ __tsan_java_finalize@Base 5 ++ __tsan_java_find@Base 8 ++ __tsan_java_fini@Base 4.9 ++ __tsan_java_free@Base 4.9 ++ __tsan_java_init@Base 4.9 ++ __tsan_java_move@Base 4.9 ++ __tsan_java_mutex_lock@Base 4.9 ++ __tsan_java_mutex_lock_rec@Base 4.9 ++ __tsan_java_mutex_read_lock@Base 4.9 ++ __tsan_java_mutex_read_unlock@Base 4.9 ++ __tsan_java_mutex_unlock@Base 4.9 ++ __tsan_java_mutex_unlock_rec@Base 4.9 ++ __tsan_java_release@Base 6 ++ __tsan_java_release_store@Base 6 ++ __tsan_locate_address@Base 8 ++ __tsan_mutex_create@Base 8 ++ __tsan_mutex_destroy@Base 8 ++ __tsan_mutex_post_divert@Base 8 ++ __tsan_mutex_post_lock@Base 8 ++ __tsan_mutex_post_signal@Base 8 ++ __tsan_mutex_post_unlock@Base 8 ++ __tsan_mutex_pre_divert@Base 8 ++ __tsan_mutex_pre_lock@Base 8 ++ __tsan_mutex_pre_signal@Base 8 ++ __tsan_mutex_pre_unlock@Base 8 ++ __tsan_on_report@Base 7 ++ __tsan_read16@Base 4.9 ++ __tsan_read16_pc@Base 6 ++ __tsan_read1@Base 4.9 ++ __tsan_read1_pc@Base 6 ++ __tsan_read2@Base 4.9 ++ __tsan_read2_pc@Base 6 ++ __tsan_read4@Base 4.9 ++ __tsan_read4_pc@Base 6 ++ __tsan_read8@Base 4.9 ++ __tsan_read8_pc@Base 6 ++ __tsan_read_range@Base 4.9 ++ __tsan_read_range_pc@Base 10 ++ __tsan_release@Base 4.9 ++ __tsan_set_fiber_name@Base 10 ++ __tsan_switch_to_fiber@Base 10 ++ __tsan_symbolize_external@Base 7 ++ __tsan_symbolize_external_ex@Base 9 ++ __tsan_testonly_barrier_init@Base 7 ++ __tsan_testonly_barrier_wait@Base 7 ++ __tsan_testonly_shadow_stack_current_size@Base 8 ++ __tsan_unaligned_read16@Base 6 ++ __tsan_unaligned_read2@Base 4.9 ++ __tsan_unaligned_read4@Base 4.9 ++ __tsan_unaligned_read8@Base 4.9 ++ __tsan_unaligned_write16@Base 6 ++ __tsan_unaligned_write2@Base 4.9 ++ __tsan_unaligned_write4@Base 4.9 ++ __tsan_unaligned_write8@Base 4.9 ++ __tsan_vptr_read@Base 4.9 ++ __tsan_vptr_update@Base 4.9 ++ __tsan_write16@Base 4.9 ++ __tsan_write16_pc@Base 6 ++ __tsan_write1@Base 4.9 ++ __tsan_write1_pc@Base 6 ++ __tsan_write2@Base 4.9 ++ __tsan_write2_pc@Base 6 ++ __tsan_write4@Base 4.9 ++ __tsan_write4_pc@Base 6 ++ __tsan_write8@Base 4.9 ++ __tsan_write8_pc@Base 6 ++ __tsan_write_range@Base 4.9 ++ __tsan_write_range_pc@Base 10 ++ __uflow@Base 5 ++ __underflow@Base 5 ++ __vsnprintf_chk@Base 9 ++ __vsprintf_chk@Base 9 ++ __wcsxfrm_l@Base 9 ++ __woverflow@Base 5 ++ __wuflow@Base 5 ++ __wunderflow@Base 5 ++ __xpg_strerror_r@Base 4.9 ++ __xstat64@Base 4.9 ++ __xstat@Base 4.9 ++ _exit@Base 4.9 ++ _obstack_begin@Base 5 ++ _obstack_begin_1@Base 5 ++ _obstack_newchunk@Base 5 ++ _setjmp@Base 4.9 ++ abort@Base 4.9 ++ accept4@Base 4.9 ++ accept@Base 4.9 ++ aligned_alloc@Base 5 ++ asctime@Base 4.9 ++ asctime_r@Base 4.9 ++ asprintf@Base 5 ++ atexit@Base 4.9 ++ backtrace@Base 4.9 ++ backtrace_symbols@Base 4.9 ++ bcmp@Base 10 ++ bind@Base 4.9 ++ bsearch@Base 12 ++ bzero@Base 10 ++ calloc@Base 4.9 ++ canonicalize_file_name@Base 4.9 ++ capget@Base 5 ++ capset@Base 5 ++ cfree@Base 4.9 ++ clock_getcpuclockid@Base 11 ++ clock_getres@Base 4.9 ++ clock_gettime@Base 4.9 ++ clock_settime@Base 4.9 ++ clone@Base 12 ++ close@Base 4.9 ++ closedir@Base 6 ++ confstr@Base 4.9 ++ connect@Base 4.9 ++ creat64@Base 4.9 ++ creat@Base 4.9 ++ crypt@Base 10 ++ crypt_r@Base 10 ++ ctermid@Base 7 ++ ctime@Base 4.9 ++ ctime_r@Base 4.9 ++ dl_iterate_phdr@Base 6 ++ dlclose@Base 4.9 ++ dlopen@Base 4.9 ++ drand48_r@Base 4.9 ++ dup2@Base 4.9 ++ dup3@Base 4.9 ++ dup@Base 4.9 ++ endgrent@Base 5 ++ endpwent@Base 5 ++ epoll_create1@Base 4.9 ++ epoll_create@Base 4.9 ++ epoll_ctl@Base 4.9 ++ epoll_pwait@Base 7 ++ epoll_wait@Base 4.9 ++ ether_aton@Base 4.9 ++ ether_aton_r@Base 4.9 ++ ether_hostton@Base 4.9 ++ ether_line@Base 4.9 ++ ether_ntoa@Base 4.9 ++ ether_ntoa_r@Base 4.9 ++ ether_ntohost@Base 4.9 ++ eventfd@Base 4.9 ++ eventfd_read@Base 7 ++ eventfd_write@Base 7 ++ fclose@Base 4.9 ++ fdopen@Base 5 ++ fflush@Base 4.9 ++ fgetgrent@Base 10 ++ fgetgrent_r@Base 10 ++ fgetpwent@Base 10 ++ fgetpwent_r@Base 10 ++ fgets@Base 9 ++ fgetxattr@Base 5 ++ flistxattr@Base 5 ++ fmemopen@Base 5 ++ fopen64@Base 5 ++ fopen@Base 4.9 ++ fopencookie@Base 6 ++ fork@Base 4.9 ++ fprintf@Base 5 ++ fputs@Base 9 ++ fread@Base 4.9 ++ free@Base 4.9 ++ freopen64@Base 5 ++ freopen@Base 4.9 ++ frexp@Base 4.9 ++ frexpf@Base 4.9 ++ frexpl@Base 4.9 ++ fscanf@Base 4.9 ++ fstat64@Base 4.9 ++ fstat@Base 4.9 ++ fstatfs64@Base 4.9 ++ fstatfs@Base 4.9 ++ fstatvfs64@Base 4.9 ++ fstatvfs@Base 4.9 ++ ftime@Base 5 ++ fwrite@Base 4.9 ++ get_current_dir_name@Base 4.9 ++ getaddrinfo@Base 4.9 ++ getcwd@Base 4.9 ++ getdelim@Base 4.9 ++ getgrent@Base 10 ++ getgrent_r@Base 10 ++ getgrgid@Base 10 ++ getgrgid_r@Base 10 ++ getgrnam@Base 10 ++ getgrnam_r@Base 10 ++ getgrouplist@Base 12 ++ getgroups@Base 4.9 ++ gethostbyaddr@Base 4.9 ++ gethostbyaddr_r@Base 4.9 ++ gethostbyname2@Base 4.9 ++ gethostbyname2_r@Base 4.9 ++ gethostbyname@Base 4.9 ++ gethostbyname_r@Base 4.9 ++ gethostent@Base 4.9 ++ gethostent_r@Base 4.9 ++ getifaddrs@Base 5 ++ getitimer@Base 4.9 ++ getline@Base 4.9 ++ getloadavg@Base 8 ++ getmntent@Base 4.9 ++ getmntent_r@Base 4.9 ++ getnameinfo@Base 5 ++ getnetbyaddr@Base 12 ++ getnetbyname@Base 12 ++ getnetent@Base 12 ++ getpass@Base 5 ++ getpeername@Base 4.9 ++ getprotobyname@Base 11 ++ getprotobyname_r@Base 11 ++ getprotobynumber@Base 11 ++ getprotobynumber_r@Base 11 ++ getprotoent@Base 11 ++ getprotoent_r@Base 11 ++ getpwent@Base 10 ++ getpwent_r@Base 10 ++ getpwnam@Base 10 ++ getpwnam_r@Base 10 ++ getpwuid@Base 10 ++ getpwuid_r@Base 10 ++ getrandom@Base 10 ++ getresgid@Base 5 ++ getresuid@Base 5 ++ getsockname@Base 4.9 ++ getsockopt@Base 4.9 ++ gettimeofday@Base 4.9 ++ getusershell@Base 10 ++ getutent@Base 8 ++ getutid@Base 8 ++ getutline@Base 8 ++ getutxent@Base 8 ++ getutxid@Base 8 ++ getutxline@Base 8 ++ getxattr@Base 5 ++ glob64@Base 5 ++ glob@Base 5 ++ gmtime@Base 4.9 ++ gmtime_r@Base 4.9 ++ iconv@Base 4.9 ++ if_indextoname@Base 5 ++ if_nametoindex@Base 5 ++ inet_aton@Base 4.9 ++ inet_ntop@Base 4.9 ++ inet_pton@Base 4.9 ++ initgroups@Base 4.9 ++ inotify_init1@Base 4.9 ++ inotify_init@Base 4.9 ++ ioctl@Base 4.9 ++ kill@Base 4.9 ++ lgamma@Base 4.9 ++ lgamma_r@Base 4.9 ++ lgammaf@Base 4.9 ++ lgammaf_r@Base 4.9 ++ lgammal@Base 4.9 ++ lgammal_r@Base 4.9 ++ lgetxattr@Base 5 ++ listen@Base 4.9 ++ listxattr@Base 5 ++ llistxattr@Base 5 ++ localtime@Base 4.9 ++ localtime_r@Base 4.9 ++ longjmp@Base 4.9 ++ lrand48_r@Base 4.9 ++ lstat@Base 12 ++ malloc@Base 4.9 ++ malloc_usable_size@Base 4.9 ++ mbsnrtowcs@Base 4.9 ++ mbsrtowcs@Base 4.9 ++ mbstowcs@Base 4.9 ++ mcheck@Base 8 ++ mcheck_pedantic@Base 8 ++ memalign@Base 4.9 ++ memchr@Base 4.9 ++ memcmp@Base 4.9 ++ memcpy@Base 4.9 ++ memmem@Base 7 ++ memmove@Base 4.9 ++ memrchr@Base 4.9 ++ memset@Base 4.9 ++ mincore@Base 6 ++ mktime@Base 5 ++ mlock@Base 4.9 ++ mlockall@Base 4.9 ++ mmap64@Base 4.9 ++ mmap@Base 4.9 ++ modf@Base 4.9 ++ modff@Base 4.9 ++ modfl@Base 4.9 ++ mprobe@Base 8 ++ mprotect@Base 9 ++ msgrcv@Base 11 ++ msgsnd@Base 11 ++ munlock@Base 4.9 ++ munlockall@Base 4.9 ++ munmap@Base 4.9 ++ name_to_handle_at@Base 9 ++ nanosleep@Base 4.9 ++ on_exit@Base 4.9 ++ open64@Base 4.9 ++ open@Base 4.9 ++ open_by_handle_at@Base 9 ++ open_memstream@Base 5 ++ open_wmemstream@Base 5 ++ opendir@Base 4.9 ++ pause@Base 8 ++ pclose@Base 10 ++ pipe2@Base 4.9 ++ pipe@Base 4.9 ++ poll@Base 4.9 ++ popen@Base 10 ++ posix_memalign@Base 4.9 ++ posix_spawn@Base 12 ++ posix_spawnp@Base 12 ++ ppoll@Base 4.9 ++ prctl@Base 4.9 ++ pread64@Base 4.9 ++ pread@Base 4.9 ++ preadv64@Base 4.9 ++ preadv@Base 4.9 ++ printf@Base 5 ++ process_vm_readv@Base 6 ++ process_vm_writev@Base 6 ++ pthread_attr_getaffinity_np@Base 4.9 ++ pthread_attr_getdetachstate@Base 4.9 ++ pthread_attr_getguardsize@Base 4.9 ++ pthread_attr_getinheritsched@Base 4.9 ++ pthread_attr_getschedparam@Base 4.9 ++ pthread_attr_getschedpolicy@Base 4.9 ++ pthread_attr_getscope@Base 4.9 ++ pthread_attr_getstack@Base 4.9 ++ pthread_attr_getstacksize@Base 4.9 ++ pthread_barrier_destroy@Base 4.9 ++ pthread_barrier_init@Base 4.9 ++ pthread_barrier_wait@Base 4.9 ++ pthread_barrierattr_getpshared@Base 5 ++ pthread_cond_broadcast@Base 4.9 ++ pthread_cond_clockwait@Base 12 ++ pthread_cond_destroy@Base 4.9 ++ pthread_cond_init@Base 4.9 ++ pthread_cond_signal@Base 4.9 ++ pthread_cond_timedwait@Base 4.9 ++ pthread_cond_wait@Base 4.9 ++ pthread_condattr_getclock@Base 5 ++ pthread_condattr_getpshared@Base 5 ++ pthread_create@Base 4.9 ++ pthread_detach@Base 4.9 ++ pthread_exit@Base 10 ++ pthread_getcpuclockid@Base 12 ++ pthread_getname_np@Base 9 ++ pthread_getschedparam@Base 4.9 ++ pthread_join@Base 4.9 ++ pthread_kill@Base 4.9 ++ pthread_mutex_destroy@Base 4.9 ++ pthread_mutex_init@Base 4.9 ++ pthread_mutex_lock@Base 4.9 ++ pthread_mutex_timedlock@Base 4.9 ++ pthread_mutex_trylock@Base 4.9 ++ pthread_mutex_unlock@Base 4.9 ++ pthread_mutexattr_getprioceiling@Base 5 ++ pthread_mutexattr_getprotocol@Base 5 ++ pthread_mutexattr_getpshared@Base 5 ++ pthread_mutexattr_getrobust@Base 5 ++ pthread_mutexattr_getrobust_np@Base 5 ++ pthread_mutexattr_gettype@Base 5 ++ pthread_once@Base 4.9 ++ pthread_rwlock_destroy@Base 4.9 ++ pthread_rwlock_init@Base 4.9 ++ pthread_rwlock_rdlock@Base 4.9 ++ pthread_rwlock_timedrdlock@Base 4.9 ++ pthread_rwlock_timedwrlock@Base 4.9 ++ pthread_rwlock_tryrdlock@Base 4.9 ++ pthread_rwlock_trywrlock@Base 4.9 ++ pthread_rwlock_unlock@Base 4.9 ++ pthread_rwlock_wrlock@Base 4.9 ++ pthread_rwlockattr_getkind_np@Base 5 ++ pthread_rwlockattr_getpshared@Base 5 ++ pthread_setcancelstate@Base 6 ++ pthread_setcanceltype@Base 6 ++ pthread_setname_np@Base 4.9 ++ pthread_sigmask@Base 7 ++ pthread_spin_destroy@Base 4.9 ++ pthread_spin_init@Base 4.9 ++ pthread_spin_lock@Base 4.9 ++ pthread_spin_trylock@Base 4.9 ++ pthread_spin_unlock@Base 4.9 ++ pthread_timedjoin_np@Base 10 ++ pthread_tryjoin_np@Base 10 ++ ptrace@Base 4.9 ++ ptsname@Base 11 ++ ptsname_r@Base 11 ++ puts@Base 4.9 ++ pututxline@Base 10 ++ pvalloc@Base 4.9 ++ pwrite64@Base 4.9 ++ pwrite@Base 4.9 ++ pwritev64@Base 4.9 ++ pwritev@Base 4.9 ++ qsort@Base 11 ++ qsort_r@Base 11 ++ raise@Base 4.9 ++ rand_r@Base 5 ++ random_r@Base 4.9 ++ read@Base 4.9 ++ readdir64@Base 4.9 ++ readdir64_r@Base 4.9 ++ readdir@Base 4.9 ++ readdir_r@Base 4.9 ++ readlink@Base 9 ++ readlinkat@Base 9 ++ readv@Base 4.9 ++ realloc@Base 4.9 ++ reallocarray@Base 10 ++ realpath@Base 4.9 ++ recv@Base 4.9 ++ recvfrom@Base 7 ++ recvmmsg@Base 9 ++ recvmsg@Base 4.9 ++ regcomp@Base 10 ++ regerror@Base 10 ++ regexec@Base 10 ++ regfree@Base 10 ++ remquo@Base 4.9 ++ remquof@Base 4.9 ++ remquol@Base 4.9 ++ rmdir@Base 4.9 ++ scandir64@Base 4.9 ++ scandir@Base 4.9 ++ scanf@Base 4.9 ++ sched_getaffinity@Base 4.9 ++ sched_getparam@Base 6 ++ sem_destroy@Base 4.9 ++ sem_getvalue@Base 4.9 ++ sem_init@Base 4.9 ++ sem_open@Base 12 ++ sem_post@Base 4.9 ++ sem_timedwait@Base 4.9 ++ sem_trywait@Base 4.9 ++ sem_unlink@Base 12 ++ sem_wait@Base 4.9 ++ send@Base 4.9 ++ sendmmsg@Base 9 ++ sendmsg@Base 4.9 ++ sendto@Base 7 ++ setbuf@Base 10 ++ setbuffer@Base 10 ++ setgrent@Base 5 ++ setitimer@Base 4.9 ++ setjmp@Base 8 ++ setlinebuf@Base 10 ++ setlocale@Base 4.9 ++ setpwent@Base 5 ++ setvbuf@Base 10 ++ shmctl@Base 4.9 ++ sigaction@Base 4.9 ++ sigaltstack@Base 11 ++ sigandset@Base 11 ++ sigblock@Base 7 ++ sigemptyset@Base 4.9 ++ sigfillset@Base 4.9 ++ siglongjmp@Base 4.9 ++ signal@Base 4.9 ++ signalfd@Base 4.9 ++ sigorset@Base 11 ++ sigpending@Base 4.9 ++ sigprocmask@Base 4.9 ++ sigsetjmp@Base 4.9 ++ sigsetmask@Base 7 ++ sigsuspend@Base 4.9 ++ sigtimedwait@Base 4.9 ++ sigwait@Base 4.9 ++ sigwaitinfo@Base 4.9 ++ sincos@Base 4.9 ++ sincosf@Base 4.9 ++ sincosl@Base 4.9 ++ sleep@Base 4.9 ++ snprintf@Base 5 ++ socket@Base 4.9 ++ socketpair@Base 4.9 ++ sprintf@Base 5 ++ sscanf@Base 4.9 ++ stat@Base 12 ++ statfs64@Base 4.9 ++ statfs@Base 4.9 ++ statvfs64@Base 4.9 ++ statvfs@Base 4.9 ++ strcasecmp@Base 4.9 ++ strcasestr@Base 6 ++ strchr@Base 4.9 ++ strchrnul@Base 4.9 ++ strcmp@Base 4.9 ++ strcpy@Base 4.9 ++ strcspn@Base 6 ++ strdup@Base 4.9 ++ strerror@Base 4.9 ++ strerror_r@Base 4.9 ++ strlen@Base 4.9 ++ strncasecmp@Base 4.9 ++ strncmp@Base 4.9 ++ strncpy@Base 4.9 ++ strndup@Base 8 ++ strnlen@Base 7 ++ strpbrk@Base 6 ++ strptime@Base 4.9 ++ strrchr@Base 4.9 ++ strspn@Base 6 ++ strstr@Base 4.9 ++ strtoimax@Base 4.9 ++ strtok@Base 8 ++ strtoumax@Base 4.9 ++ strxfrm@Base 9 ++ strxfrm_l@Base 9 ++ sysinfo@Base 4.9 ++ tcgetattr@Base 4.9 ++ tempnam@Base 4.9 ++ textdomain@Base 4.9 ++ time@Base 4.9 ++ timerfd_gettime@Base 5 ++ timerfd_settime@Base 5 ++ times@Base 4.9 ++ tmpfile64@Base 5 ++ tmpfile@Base 5 ++ tmpnam@Base 4.9 ++ tmpnam_r@Base 4.9 ++ tsearch@Base 5 ++ ttyname@Base 10 ++ ttyname_r@Base 7 ++ uname@Base 11 ++ unlink@Base 4.9 ++ usleep@Base 4.9 ++ valloc@Base 4.9 ++ vasprintf@Base 5 ++ vfork@Base 5 ++ vfprintf@Base 5 ++ vfscanf@Base 4.9 ++ vprintf@Base 5 ++ vscanf@Base 4.9 ++ vsnprintf@Base 5 ++ vsprintf@Base 5 ++ vsscanf@Base 4.9 ++ wait3@Base 4.9 ++ wait4@Base 4.9 ++ wait@Base 4.9 ++ waitid@Base 4.9 ++ waitpid@Base 4.9 ++ wcrtomb@Base 6 ++ wcscat@Base 8 ++ wcsdup@Base 10 ++ wcslen@Base 8 ++ wcsncat@Base 8 ++ wcsnlen@Base 8 ++ wcsnrtombs@Base 4.9 ++ wcsrtombs@Base 4.9 ++ wcstombs@Base 4.9 ++ wcsxfrm@Base 9 ++ wcsxfrm_l@Base 9 ++ wctomb@Base 10 ++ wordexp@Base 4.9 ++ write@Base 4.9 ++ writev@Base 4.9 ++ xdr_bool@Base 5 ++ xdr_bytes@Base 5 ++ xdr_char@Base 5 ++ xdr_destroy@Base 11 ++ xdr_double@Base 5 ++ xdr_enum@Base 5 ++ xdr_float@Base 5 ++ xdr_hyper@Base 5 ++ xdr_int16_t@Base 5 ++ xdr_int32_t@Base 5 ++ xdr_int64_t@Base 5 ++ xdr_int8_t@Base 5 ++ xdr_int@Base 5 ++ xdr_long@Base 5 ++ xdr_longlong_t@Base 5 ++ xdr_quad_t@Base 5 ++ xdr_short@Base 5 ++ xdr_string@Base 5 ++ xdr_u_char@Base 5 ++ xdr_u_hyper@Base 5 ++ xdr_u_int@Base 5 ++ xdr_u_long@Base 5 ++ xdr_u_longlong_t@Base 5 ++ xdr_u_quad_t@Base 5 ++ xdr_u_short@Base 5 ++ xdr_uint16_t@Base 5 ++ xdr_uint32_t@Base 5 ++ xdr_uint64_t@Base 5 ++ xdr_uint8_t@Base 5 ++ xdrmem_create@Base 5 ++ xdrrec_create@Base 11 ++ xdrstdio_create@Base 5 diff --cc debian/libubsan1.symbols index 0000000,0000000..5d123d7 new file mode 100644 --- /dev/null +++ b/debian/libubsan1.symbols @@@ -1,0 -1,0 +1,137 @@@ ++libubsan.so.1 libubsan1 #MINVER# ++ _ZN7__ubsan31RegisterUndefinedBehaviorReportEPNS_23UndefinedBehaviorReportE@Base 9 ++ __asan_backtrace_alloc@Base 4.9 ++ __asan_backtrace_close@Base 4.9 ++ __asan_backtrace_create_state@Base 4.9 ++ __asan_backtrace_dwarf_add@Base 4.9 ++ __asan_backtrace_free@Base 4.9 ++ __asan_backtrace_get_view@Base 4.9 ++ __asan_backtrace_initialize@Base 4.9 ++ __asan_backtrace_open@Base 4.9 ++ __asan_backtrace_pcinfo@Base 4.9 ++ __asan_backtrace_qsort@Base 4.9 ++ __asan_backtrace_release_view@Base 4.9 ++ __asan_backtrace_syminfo@Base 4.9 ++ __asan_backtrace_syminfo_to_full_callback@Base 11 ++ __asan_backtrace_syminfo_to_full_error_callback@Base 11 ++ __asan_backtrace_uncompress_lzma@Base 11 ++ __asan_backtrace_uncompress_zdebug@Base 8 ++ __asan_backtrace_vector_finish@Base 4.9 ++ __asan_backtrace_vector_grow@Base 4.9 ++ __asan_backtrace_vector_release@Base 4.9 ++ __asan_cplus_demangle_builtin_types@Base 4.9 ++ __asan_cplus_demangle_fill_ctor@Base 4.9 ++ __asan_cplus_demangle_fill_dtor@Base 4.9 ++ __asan_cplus_demangle_fill_extended_operator@Base 4.9 ++ __asan_cplus_demangle_fill_name@Base 4.9 ++ __asan_cplus_demangle_init_info@Base 4.9 ++ __asan_cplus_demangle_mangled_name@Base 4.9 ++ __asan_cplus_demangle_operators@Base 4.9 ++ __asan_cplus_demangle_print@Base 4.9 ++ __asan_cplus_demangle_print_callback@Base 4.9 ++ __asan_cplus_demangle_type@Base 4.9 ++ __asan_cplus_demangle_v3@Base 4.9 ++ __asan_cplus_demangle_v3_callback@Base 4.9 ++ __asan_internal_memcmp@Base 4.9 ++ __asan_internal_memcpy@Base 4.9 ++ __asan_internal_memset@Base 4.9 ++ __asan_internal_strcmp@Base 4.9 ++ __asan_internal_strlen@Base 4.9 ++ __asan_internal_strncmp@Base 4.9 ++ __asan_internal_strnlen@Base 4.9 ++ __asan_is_gnu_v3_mangled_ctor@Base 4.9 ++ __asan_is_gnu_v3_mangled_dtor@Base 4.9 ++ __asan_java_demangle_v3@Base 4.9 ++ __asan_java_demangle_v3_callback@Base 4.9 ++ __sancov_default_options@Base 8 ++ __sancov_lowest_stack@Base 8 ++ __sanitizer_acquire_crash_state@Base 9 ++ __sanitizer_cov_8bit_counters_init@Base 8 ++ __sanitizer_cov_bool_flag_init@Base 11 ++ __sanitizer_cov_dump@Base 4.9 ++ __sanitizer_cov_pcs_init@Base 8 ++ __sanitizer_cov_reset@Base 8 ++ __sanitizer_cov_trace_cmp1@Base 7 ++ __sanitizer_cov_trace_cmp2@Base 7 ++ __sanitizer_cov_trace_cmp4@Base 7 ++ __sanitizer_cov_trace_cmp8@Base 7 ++ __sanitizer_cov_trace_cmp@Base 6 ++ __sanitizer_cov_trace_const_cmp1@Base 8 ++ __sanitizer_cov_trace_const_cmp2@Base 8 ++ __sanitizer_cov_trace_const_cmp4@Base 8 ++ __sanitizer_cov_trace_const_cmp8@Base 8 ++ __sanitizer_cov_trace_div4@Base 7 ++ __sanitizer_cov_trace_div8@Base 7 ++ __sanitizer_cov_trace_gep@Base 7 ++ __sanitizer_cov_trace_pc_guard@Base 7 ++ __sanitizer_cov_trace_pc_guard_init@Base 7 ++ __sanitizer_cov_trace_pc_indir@Base 7 ++ __sanitizer_cov_trace_switch@Base 6 ++ __sanitizer_dump_coverage@Base 8 ++ __sanitizer_dump_trace_pc_guard_coverage@Base 8 ++ __sanitizer_get_module_and_offset_for_pc@Base 8 ++ __sanitizer_get_report_path@Base 12 ++ __sanitizer_install_malloc_and_free_hooks@Base 7 ++ __sanitizer_on_print@Base 10 ++ __sanitizer_report_error_summary@Base 4.9 ++ __sanitizer_sandbox_on_notify@Base 4.9 ++ __sanitizer_set_death_callback@Base 6 ++ __sanitizer_set_report_fd@Base 7 ++ __sanitizer_set_report_path@Base 4.9 ++ __sanitizer_symbolize_global@Base 7 ++ __sanitizer_symbolize_pc@Base 7 ++ __ubsan_default_options@Base 8 ++ __ubsan_get_current_report_data@Base 9 ++ __ubsan_handle_add_overflow@Base 4.9 ++ __ubsan_handle_add_overflow_abort@Base 4.9 ++ __ubsan_handle_alignment_assumption@Base 10 ++ __ubsan_handle_alignment_assumption_abort@Base 10 ++ __ubsan_handle_builtin_unreachable@Base 4.9 ++ __ubsan_handle_cfi_bad_icall@Base 9 ++ __ubsan_handle_cfi_bad_icall_abort@Base 9 ++ __ubsan_handle_cfi_bad_type@Base 7 ++ __ubsan_handle_cfi_check_fail@Base 7 ++ __ubsan_handle_cfi_check_fail_abort@Base 7 ++ __ubsan_handle_divrem_overflow@Base 4.9 ++ __ubsan_handle_divrem_overflow_abort@Base 4.9 ++ __ubsan_handle_dynamic_type_cache_miss@Base 4.9 ++ __ubsan_handle_dynamic_type_cache_miss_abort@Base 4.9 ++ __ubsan_handle_float_cast_overflow@Base 4.9 ++ __ubsan_handle_float_cast_overflow_abort@Base 4.9 ++ __ubsan_handle_function_type_mismatch_v1@Base 4.9 ++ __ubsan_handle_function_type_mismatch_v1_abort@Base 4.9 ++ __ubsan_handle_implicit_conversion@Base 9 ++ __ubsan_handle_implicit_conversion_abort@Base 9 ++ __ubsan_handle_invalid_builtin@Base 8 ++ __ubsan_handle_invalid_builtin_abort@Base 8 ++ __ubsan_handle_invalid_objc_cast@Base 11 ++ __ubsan_handle_invalid_objc_cast_abort@Base 11 ++ __ubsan_handle_load_invalid_value@Base 4.9 ++ __ubsan_handle_load_invalid_value_abort@Base 4.9 ++ __ubsan_handle_missing_return@Base 4.9 ++ __ubsan_handle_mul_overflow@Base 4.9 ++ __ubsan_handle_mul_overflow_abort@Base 4.9 ++ __ubsan_handle_negate_overflow@Base 4.9 ++ __ubsan_handle_negate_overflow_abort@Base 4.9 ++ __ubsan_handle_nonnull_arg@Base 5 ++ __ubsan_handle_nonnull_arg_abort@Base 5 ++ __ubsan_handle_nonnull_return_v1@Base 8 ++ __ubsan_handle_nonnull_return_v1_abort@Base 8 ++ __ubsan_handle_nullability_arg@Base 8 ++ __ubsan_handle_nullability_arg_abort@Base 8 ++ __ubsan_handle_nullability_return_v1@Base 8 ++ __ubsan_handle_nullability_return_v1_abort@Base 8 ++ __ubsan_handle_out_of_bounds@Base 4.9 ++ __ubsan_handle_out_of_bounds_abort@Base 4.9 ++ __ubsan_handle_pointer_overflow@Base 8 ++ __ubsan_handle_pointer_overflow_abort@Base 8 ++ __ubsan_handle_shift_out_of_bounds@Base 4.9 ++ __ubsan_handle_shift_out_of_bounds_abort@Base 4.9 ++ __ubsan_handle_sub_overflow@Base 4.9 ++ __ubsan_handle_sub_overflow_abort@Base 4.9 ++ __ubsan_handle_type_mismatch_v1@Base 8 ++ __ubsan_handle_type_mismatch_v1_abort@Base 8 ++ __ubsan_handle_vla_bound_not_positive@Base 4.9 ++ __ubsan_handle_vla_bound_not_positive_abort@Base 4.9 ++ __ubsan_on_report@Base 9 ++ __ubsan_vptr_type_cache@Base 4.9 diff --cc debian/libvtv0.symbols index 0000000,0000000..908a64e new file mode 100644 --- /dev/null +++ b/debian/libvtv0.symbols @@@ -1,0 -1,0 +1,68 @@@ ++libvtv.so.0 libvtv0 #MINVER# ++ _Z10__vtv_freePv@Base 4.9.0 ++ (arch=amd64)_Z12__vtv_mallocm@Base 4.9.0 ++ (arch=i386)_Z12__vtv_mallocj@Base 4.9.0 ++ _Z14__VLTDumpStatsv@Base 4.9.0 ++ _Z14__vtv_open_logPKc@Base 4.9.0 ++ (arch=amd64)_Z16__VLTRegisterSetPPvPKvmmS0_@Base 4.9.0 ++ (arch=i386)_Z16__VLTRegisterSetPPvPKvjjS0_@Base 4.9.0 ++ _Z16__vtv_add_to_logiPKcz@Base 4.9.0 ++ (arch=amd64)_Z17__VLTRegisterPairPPvPKvmS2_@Base 4.9.0 ++ (arch=i386)_Z17__VLTRegisterPairPPvPKvjS2_@Base 4.9.0 ++ _Z17__vtv_malloc_initv@Base 4.9.0 ++ _Z17__vtv_really_failPKc@Base 4.9.0 ++ _Z17__vtv_verify_failPPvPKv@Base 4.9.0 ++ _Z18__vtv_malloc_statsv@Base 4.9.0 ++ _Z20__vtv_malloc_protectv@Base 4.9.0 ++ (arch=amd64)_Z21__VLTRegisterSetDebugPPvPKvmmS0_@Base 4.9.0 ++ (arch=i386)_Z21__VLTRegisterSetDebugPPvPKvjjS0_@Base 4.9.0 ++ (arch=amd64)_Z22__VLTRegisterPairDebugPPvPKvmS2_PKcS4_@Base 4.9.0 ++ (arch=i386)_Z22__VLTRegisterPairDebugPPvPKvjS2_PKcS4_@Base 4.9.0 ++ _Z22__vtv_malloc_unprotectv@Base 4.9.0 ++ _Z23__vtv_malloc_dump_statsv@Base 4.9.0 ++ _Z23__vtv_verify_fail_debugPPvPKvPKc@Base 4.9.0 ++ (arch=amd64)_Z23search_cached_file_datam@Base 4.9.0 ++ (arch=i386)_Z23search_cached_file_dataj@Base 4.9.0 ++ _Z24__VLTVerifyVtablePointerPPvPKv@Base 4.9.0 ++ _Z25__vtv_count_mmapped_pagesv@Base 4.9.0 ++ _Z29__VLTVerifyVtablePointerDebugPPvPKvPKcS4_@Base 4.9.0 ++ _Z30__vtv_log_verification_failurePKcb@Base 4.9.0 ++ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE12put_internalEPKNS8_8key_typeERKS6_b@Base 4.9.0 ++ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE15find_or_add_keyEPKNS8_8key_typeEPPS6_@Base 4.9.0 ++ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE16destructive_copyEv@Base 4.9.0 ++ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE3putEPKNS8_8key_typeERKS6_@Base 4.9.0 ++ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE6createEm@Base 4.9.0 ++ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE7destroyEPS8_@Base 4.9.0 ++ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE11is_too_fullEm@Base 4.9.0 ++ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE12bucket_countEv@Base 4.9.0 ++ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE3getEPKNS8_8key_typeE@Base 4.9.0 ++ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE4sizeEv@Base 4.9.0 ++ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE5emptyEv@Base 4.9.0 ++ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE8key_type6equalsEPKS9_@Base 4.9.0 ++ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE12put_internalEPKNS8_8key_typeERKS6_b@Base 4.9.0 ++ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE15find_or_add_keyEPKNS8_8key_typeEPPS6_@Base 4.9.0 ++ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE16destructive_copyEv@Base 4.9.0 ++ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE3putEPKNS8_8key_typeERKS6_@Base 4.9.0 ++ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE6createEj@Base 4.9.0 ++ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE7destroyEPS8_@Base 4.9.0 ++ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE11is_too_fullEj@Base 4.9.0 ++ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE12bucket_countEv@Base 4.9.0 ++ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE3getEPKNS8_8key_typeE@Base 4.9.0 ++ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE4sizeEv@Base 4.9.0 ++ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE5emptyEv@Base 4.9.0 ++ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE8key_type6equalsEPKS9_@Base 4.9.0 ++ __VLTChangePermission@Base 4.9.0 ++ __VLTprotect@Base 4.9.0 ++ __VLTunprotect@Base 4.9.0 ++ _vtable_map_vars_end@Base 4.9.0 ++ _vtable_map_vars_start@Base 4.9.0 ++ mprotect_cycles@Base 4.9.0 ++ num_cache_entries@Base 4.9.0 ++ num_calls_to_mprotect@Base 4.9.0 ++ num_calls_to_regpair@Base 4.9.0 ++ num_calls_to_regset@Base 4.9.0 ++ num_calls_to_verify_vtable@Base 4.9.0 ++ num_pages_protected@Base 4.9.0 ++ regpair_cycles@Base 4.9.0 ++ regset_cycles@Base 4.9.0 ++ verify_vtable_cycles@Base 4.9.0 diff --cc debian/libx32asan8.symbols index 0000000,0000000..ceaba4a new file mode 100644 --- /dev/null +++ b/debian/libx32asan8.symbols @@@ -1,0 -1,0 +1,6 @@@ ++libasan.so.8 libx32asan8 #MINVER# ++#include "libasan.symbols.common" ++#include "libasan.symbols.32" ++#include "libasan.symbols.16" ++ (arch=amd64 i386)__interceptor___tls_get_addr@Base 12 ++ (arch=amd64 i386)__tls_get_addr@Base 12 diff --cc debian/locale-gen index 0000000,0000000..f07fa55 new file mode 100755 --- /dev/null +++ b/debian/locale-gen @@@ -1,0 -1,0 +1,51 @@@ ++#!/bin/sh ++ ++# generate locales that the libstdc++ testsuite depends on ++ ++LOCPATH=`pwd`/locales ++export LOCPATH ++ ++[ -d $LOCPATH ] || mkdir -p $LOCPATH ++ ++[ -n "$USE_CPUS" ] || USE_CPUS=1 ++ ++umask 022 ++ ++echo "Generating locales..." ++xargs -L 1 -P $USE_CPUS -I{} \ ++ sh -c ' ++ set {}; locale=$1; charset=$2 ++ case $locale in \#*) exit;; esac ++ [ -n "$locale" -a -n "$charset" ] || exit ++ echo " `echo $locale | sed \"s/\([^.\@]*\).*/\1/\"`.$charset`echo $locale | sed \"s/\([^\@]*\)\(\@.*\)*/\2/\"`..." ++ if [ -f $LOCPATH/$locale ]; then ++ input=$locale ++ else ++ input=`echo $locale | sed "s/\([^.]*\)[^@]*\(.*\)/\1\2/"` ++ fi ++ localedef -i $input -c -f $charset $LOCPATH/$locale #-A /etc/locale.alias ++ ' <&2 "usage: `basename $0` [-p ] [-t ] [-m ]" ++ echo >&2 " [ ...]" ++ exit 1 ++} ++ ++while [ $# -gt 0 ]; do ++ case $1 in ++ -p) ++ pidfile=$2 ++ shift ++ shift ++ ;; ++ -t) ++ timeout=$2 ++ shift ++ shift ++ ;; ++ -m) ++ message="$2" ++ shift ++ shift ++ ;; ++ -*) ++ usage ++ ;; ++ *) ++ break ++ esac ++done ++ ++[ $# -gt 0 ] || usage ++ ++logfile="$1" ++shift ++otherlogs="$@" ++ ++cleanup() ++{ ++ rm -f $pidfile ++ exit 0 ++} ++ ++#trap cleanup 0 1 3 15 ++ ++echo $$ > $pidfile ++ ++update() ++{ ++ _logvar=$1 ++ _othervar=$2 ++ ++ # logfile may not exist yet ++ if [ -r $logfile ]; then ++ _logtail="`tail -10 $logfile | md5sum` $f" ++ else ++ _logtail="does not exist: $logfile" ++ fi ++ eval $_logvar="'$_logtail'" ++ ++ _othertails='' ++ for f in $otherlogs; do ++ if [ -r $f ]; then ++ _othertails="$_othertails `tail -10 $f | md5sum` $f" ++ else ++ _othertails="$_othertails does not exist: $f" ++ fi ++ done ++ eval $_othervar="'$_othertails'" ++} ++ ++update logtail othertails ++while true; do ++ sleep $timeout ++ update newlogtail newothertails ++ if [ "$logtail" != "$newlogtail" ]; then ++ # there is still action in the primary logfile. do nothing. ++ logtail="$newlogtail" ++ elif [ "$othertails" != "$newothertails" ]; then ++ # there is still action in the other log files, so print the message ++ /bin/echo -e $message ++ othertails="$newothertails" ++ else ++ # nothing changed in the other log files. maybe a timeout ... ++ : ++ fi ++done diff --cc debian/patches/ada-749574.diff index 0000000,0000000..cda98a8 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-749574.diff @@@ -1,0 -1,0 +1,114 @@@ ++From: Ludovic Brenta ++From: Nicolas Boulenguez ++Forwarded: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81087 ++Bug-Debian: http://bugs.debian.org/749574 ++Description: array index out of range in gnatlink ++ The procedure gnatlink assumes that the Linker_Options.Table contains access ++ values to strings whose 'First index is always 1. This assumption is wrong ++ for the string returned by function Base_Name. ++ . ++ The wrong indices are not detected because gnatlink is compiled with ++ -gnatp, but the test result is wrong. ++ . ++ The following program normally raises Constraint_Error, prints FALSE ++ if compiled with -gnatp, while the expected result is TRUE. ++ . ++ procedure A is ++ G : constant String (3 .. 5) := "abc"; ++ begin ++ Ada.Text_IO.Put_Line (Boolean'Image (G (1 .. 2) = "ab")); ++ end A; ++ ++--- a/src/gcc/ada/gnatlink.adb +++++ b/src/gcc/ada/gnatlink.adb ++@@ -238,6 +238,9 @@ procedure Gnatlink is ++ procedure Write_Usage; ++ -- Show user the program options ++ +++ function Starts_With (Source, Pattern : String) return Boolean; +++ pragma Inline (Starts_With); +++ ++ --------------- ++ -- Base_Name -- ++ --------------- ++@@ -494,7 +497,7 @@ procedure Gnatlink is ++ Binder_Options.Table (Binder_Options.Last) := ++ Linker_Options.Table (Linker_Options.Last); ++ ++- elsif Arg'Length >= 7 and then Arg (1 .. 7) = "--LINK=" then +++ elsif Starts_With (Arg, "--LINK=") then ++ if Arg'Length = 7 then ++ Exit_With_Error ("Missing argument for --LINK="); ++ end if; ++@@ -528,7 +531,7 @@ procedure Gnatlink is ++ end loop; ++ end; ++ ++- elsif Arg'Length >= 6 and then Arg (1 .. 6) = "--GCC=" then +++ elsif Starts_With (Arg, "--GCC=") then ++ if Arg'Length = 6 then ++ Exit_With_Error ("Missing argument for --GCC="); ++ end if; ++@@ -1255,13 +1258,9 @@ procedure Gnatlink is ++ 1 .. Linker_Options.Last ++ loop ++ if Linker_Options.Table (J) /= null ++- and then ++- Linker_Options.Table (J)'Length ++- > Run_Path_Opt'Length ++- and then ++- Linker_Options.Table (J) ++- (1 .. Run_Path_Opt'Length) = ++- Run_Path_Opt +++ and then Starts_With +++ (Linker_Options.Table (J).all, +++ Run_Path_Opt) ++ then ++ -- We have found an already ++ -- specified run_path_option: ++@@ -1378,6 +1377,17 @@ procedure Gnatlink is ++ Status := fclose (Fd); ++ end Process_Binder_File; ++ +++ ---------------- +++ -- StartsWith -- +++ ---------------- +++ +++ function Starts_With (Source, Pattern : String) return Boolean is +++ Last : constant Natural := Source'First + Pattern'Length - 1; +++ begin +++ return Last <= Source'Last +++ and then Pattern = Source (Source'First .. Last); +++ end Starts_With; +++ ++ ----------- ++ -- Usage -- ++ ----------- ++@@ -1891,8 +1901,8 @@ begin ++ while J <= Linker_Options.Last loop ++ if Linker_Options.Table (J).all = "-Xlinker" ++ and then J < Linker_Options.Last ++- and then Linker_Options.Table (J + 1)'Length > 8 ++- and then Linker_Options.Table (J + 1) (1 .. 8) = "--stack=" +++ and then Starts_With (Linker_Options.Table (J + 1).all, +++ "--stack=") ++ then ++ if Stack_Op then ++ Linker_Options.Table (J .. Linker_Options.Last - 2) := ++@@ -1937,13 +1947,9 @@ begin ++ -- Here we just check for a canonical form that matches the ++ -- pragma Linker_Options set in the NT runtime. ++ ++- if (Linker_Options.Table (J)'Length > 17 ++- and then Linker_Options.Table (J) (1 .. 17) = ++- "-Xlinker --stack=") ++- or else ++- (Linker_Options.Table (J)'Length > 12 ++- and then Linker_Options.Table (J) (1 .. 12) = ++- "-Wl,--stack=") +++ if Starts_With (Linker_Options.Table (J).all, "-Xlinker --stack=") +++ or else Starts_With (Linker_Options.Table (J).all, +++ "-Wl,--stack=") ++ then ++ if Stack_Op then ++ Linker_Options.Table (J .. Linker_Options.Last - 1) := diff --cc debian/patches/ada-armel-libatomic.diff index 0000000,0000000..f6b2304 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-armel-libatomic.diff @@@ -1,0 -1,0 +1,44 @@@ ++Description: link libgnat with libatomic on armel ++ On other architectures, the library is ignored thanks to --as-needed. ++ . ++ Libatomic becomes an artificial dependency for Ada in Makefile.def, ++ so a better solution is welcome. ++ . ++ Please read ada-changes-in-autogen-output.diff about src/Makefile.def. ++ . ++ TODO: if this is caused by ada-arm.diff, merge the two patches. ++Bug-Debian: https://bugs.debian.org/861734 ++Author: Matthias Klose ++Author: Nicolas Boulenguez ++ ++--- a/src/gcc/ada/Makefile.rtl +++++ b/src/gcc/ada/Makefile.rtl ++@@ -2295,6 +2295,7 @@ endif ++ ++ # ARM linux, GNU eabi ++ ifeq ($(strip $(filter-out arm% linux-gnueabi%,$(target_cpu) $(target_os))),) +++ MISCLIB = ../../../$(target_alias)/libatomic/.libs/libatomic.so ++ LIBGNAT_TARGET_PAIRS = \ ++ a-intnam.ads 1", ++ which may happen even if a match has been found. ++ This part will most probably be of interest for upstream. ++ . ++ Update the gnatchop tool to use this function. ++ This part will most probably be of interest for upstream. ++ . ++ Check that the target and version in the gnatmake program name, if ++ present, match the static constants inside the gnatmake program ++ itself. Also, knowing the length of the only allowed prefix and suffix ++ slightly improves performance by avoiding loops. ++ This part will most probably be of interest for upstream. ++ . ++ In Debian, gcc/gcc-version/target-gcc are symbolic links to the ++ target-gcc-version executable. The same holds for gnatmake, but the ++ target and version may differ. So "target-gcc-version" is the right ++ answer. It helps log checkers and humans debuggers, even if gnatmake ++ was invoked via a shortcut intended for human typers. ++ This part will probably be hard to merge for upstream, as some ++ distributions provide no "target-gcc-version". ++ . ++ Log for bug 903694 carries regression tests for both bugs. ++Forwarded: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87777 ++Bug-Debian: https://bugs.debian.org/814977 ++Bug-Debian: https://bugs.debian.org/814978 ++Bug-Debian: https://bugs.debian.org/856274 ++Bug-Debian: https://bugs.debian.org/881938 ++Bug-Debian: https://bugs.debian.org/903694 ++Author: Ludovic Brenta ++Author: Nicolas Boulenguez ++Author: Svante Signell ++Author: YunQiang Su ++ ++--- a/src/gcc/ada/osint.ads +++++ b/src/gcc/ada/osint.ads ++@@ -144,14 +144,10 @@ package Osint is ++ -- path) in Name_Buffer, with the length in Name_Len. ++ ++ function Program_Name (Nam : String; Prog : String) return String_Access; ++- -- In the native compilation case, creates a string containing Nam. In the ++- -- cross compilation case, looks at the prefix of the current program being ++- -- run and prepends it to Nam. For instance if the program being run is ++- -- -gnatmake and Nam is "gcc", the returned value will be a pointer ++- -- to "-gcc". This function clobbers Name_Buffer and Name_Len. ++- -- Also looks at any suffix, e.g. gnatmake-4.1 -> "gcc-4.1". Prog is the ++- -- default name of the current program being executed, e.g. "gnatmake", ++- -- "gnatlink". +++ -- On Debian, always create a string containing +++ -- Sdefault.Target_Name & '-' & Nam & '-' & Gnatvsn.Library_Version. +++ -- Fail if the program base name differs from Prog, +++ -- maybe extended with the same prefix or suffix. ++ ++ procedure Write_Program_Name; ++ -- Writes name of program as invoked to the current output (normally ++--- a/src/gcc/ada/osint.adb +++++ b/src/gcc/ada/osint.adb ++@@ -2270,50 +2270,51 @@ package body Osint is ++ ------------------ ++ ++ function Program_Name (Nam : String; Prog : String) return String_Access is ++- End_Of_Prefix : Natural := 0; ++- Start_Of_Prefix : Positive := 1; ++- Start_Of_Suffix : Positive; ++- +++ -- Most of the work is to check that the current program name +++ -- is consistent with the two static constants below. +++ Suffix : constant String := '-' & Gnatvsn.Library_Version; +++ Prefix : Types.String_Ptr := Sdefault.Target_Name; +++ First : Integer; +++ Result : System.OS_Lib.String_Access; ++ begin ++ -- Get the name of the current program being executed ++- ++ Find_Program_Name; ++ ++- Start_Of_Suffix := Name_Len + 1; +++ -- If our version is present, skip it. +++ First := Name_Len - Suffix'Length + 1; +++ if 0 < First and then Name_Buffer (First .. Name_Len) = Suffix then +++ Name_Len := First - 1; +++ end if; +++ +++ -- The central part must be Prog. +++ First := Name_Len - Prog'Length + 1; +++ if First <= 0 or else Name_Buffer (First .. Name_Len) /= Prog then +++ Fail ("Osint.Program_Name: must end with " & Prog +++ & " or " & Prog & Suffix); +++ end if; +++ Name_Len := First - 1; ++ ++- -- Find the target prefix if any, for the cross compilation case. ++- -- For instance in "powerpc-elf-gcc" the target prefix is ++- -- "powerpc-elf-" ++- -- Ditto for suffix, e.g. in "gcc-4.1", the suffix is "-4.1" ++- ++- for J in reverse 1 .. Name_Len loop ++- if Is_Directory_Separator (Name_Buffer (J)) ++- or else Name_Buffer (J) = ':' ++- then ++- Start_Of_Prefix := J + 1; ++- exit; ++- end if; ++- end loop; ++- ++- -- Find End_Of_Prefix ++- ++- for J in Start_Of_Prefix .. Name_Len - Prog'Length + 1 loop ++- if Name_Buffer (J .. J + Prog'Length - 1) = Prog then ++- End_Of_Prefix := J - 1; ++- exit; ++- end if; ++- end loop; +++ -- According to Make-generated.in, this ends with a slash. +++ Prefix.all (Prefix.all'Last) := '-'; ++ ++- if End_Of_Prefix > 1 then ++- Start_Of_Suffix := End_Of_Prefix + Prog'Length + 1; +++ -- If our target is present, skip it. +++ First := Name_Len - Prefix.all'Length + 1; +++ if 0 < First and then Name_Buffer (First .. Name_Len) = Prefix.all then +++ Name_Len := First - 1; ++ end if; ++ ++- -- Create the new program name +++ -- What remains must be the directory part. +++ if 0 < Name_Len +++ and then Name_Buffer (Name_Len) /= ':' +++ and then not Is_Directory_Separator (Name_Buffer (Name_Len)) +++ then +++ Fail ("Osint.Program_Name: must start with " & Prog +++ & " or " & Prefix.all & Prog); +++ end if; ++ ++- return new String' ++- (Name_Buffer (Start_Of_Prefix .. End_Of_Prefix) ++- & Nam ++- & Name_Buffer (Start_Of_Suffix .. Name_Len)); +++ Result := new String'(Prefix.all & Nam & Suffix); +++ Types.Free (Prefix); +++ return Result; ++ end Program_Name; ++ ++ ------------------------------ ++--- a/src/gcc/ada/gnatchop.adb +++++ b/src/gcc/ada/gnatchop.adb ++@@ -36,6 +36,7 @@ with GNAT.OS_Lib; use GNA ++ with GNAT.Heap_Sort_G; ++ with GNAT.Table; ++ +++with Osint; ++ with Switch; use Switch; ++ with Types; ++ ++@@ -44,12 +45,9 @@ procedure Gnatchop is ++ Config_File_Name : constant String_Access := new String'("gnat.adc"); ++ -- The name of the file holding the GNAT configuration pragmas ++ ++- Gcc : String_Access := new String'("gcc"); +++ Gcc : String_Access := null; ++ -- May be modified by switch --GCC= ++ ++- Gcc_Set : Boolean := False; ++- -- True if a switch --GCC= is used ++- ++ Gnat_Cmd : String_Access; ++ -- Command to execute the GNAT compiler ++ ++@@ -222,12 +220,6 @@ procedure Gnatchop is ++ Integer'Image ++ (Maximum_File_Name_Length); ++ ++- function Locate_Executable ++- (Program_Name : String; ++- Look_For_Prefix : Boolean := True) return String_Access; ++- -- Locate executable for given program name. This takes into account ++- -- the target-prefix of the current command, if Look_For_Prefix is True. ++- ++ subtype EOL_Length is Natural range 0 .. 2; ++ -- Possible lengths of end of line sequence ++ ++@@ -492,76 +484,6 @@ procedure Gnatchop is ++ Unit.Table (Sorted_Units.Table (U + 1)).File_Name.all; ++ end Is_Duplicated; ++ ++- ----------------------- ++- -- Locate_Executable -- ++- ----------------------- ++- ++- function Locate_Executable ++- (Program_Name : String; ++- Look_For_Prefix : Boolean := True) return String_Access ++- is ++- Gnatchop_Str : constant String := "gnatchop"; ++- Current_Command : constant String := Normalize_Pathname (Command_Name); ++- End_Of_Prefix : Natural; ++- Start_Of_Prefix : Positive; ++- Start_Of_Suffix : Positive; ++- Result : String_Access; ++- ++- begin ++- Start_Of_Prefix := Current_Command'First; ++- Start_Of_Suffix := Current_Command'Last + 1; ++- End_Of_Prefix := Start_Of_Prefix - 1; ++- ++- if Look_For_Prefix then ++- ++- -- Find Start_Of_Prefix ++- ++- for J in reverse Current_Command'Range loop ++- if Current_Command (J) = '/' or else ++- Current_Command (J) = Directory_Separator or else ++- Current_Command (J) = ':' ++- then ++- Start_Of_Prefix := J + 1; ++- exit; ++- end if; ++- end loop; ++- ++- -- Find End_Of_Prefix ++- ++- for J in Start_Of_Prefix .. ++- Current_Command'Last - Gnatchop_Str'Length + 1 ++- loop ++- if Current_Command (J .. J + Gnatchop_Str'Length - 1) = ++- Gnatchop_Str ++- then ++- End_Of_Prefix := J - 1; ++- exit; ++- end if; ++- end loop; ++- end if; ++- ++- if End_Of_Prefix > Current_Command'First then ++- Start_Of_Suffix := End_Of_Prefix + Gnatchop_Str'Length + 1; ++- end if; ++- ++- declare ++- Command : constant String := ++- Current_Command (Start_Of_Prefix .. End_Of_Prefix) ++- & Program_Name ++- & Current_Command (Start_Of_Suffix .. ++- Current_Command'Last); ++- begin ++- Result := Locate_Exec_On_Path (Command); ++- ++- if Result = null then ++- Error_Msg ++- (Command & ": installation problem, executable not found"); ++- end if; ++- end; ++- ++- return Result; ++- end Locate_Executable; ++- ++ --------------- ++ -- Parse_EOL -- ++ --------------- ++@@ -1089,8 +1011,8 @@ procedure Gnatchop is ++ exit; ++ ++ when '-' => ++- Gcc := new String'(Parameter); ++- Gcc_Set := True; +++ Free (Gcc); +++ Gcc := new String'(Parameter); ++ ++ when 'c' => ++ Compilation_Mode := True; ++@@ -1768,9 +1690,13 @@ begin ++ ++ -- Check presence of required executables ++ ++- Gnat_Cmd := Locate_Executable (Gcc.all, not Gcc_Set); +++ if Gcc = null then +++ Gcc := Osint.Program_Name ("gcc", "gnatchop"); +++ end if; +++ Gnat_Cmd := Locate_Exec_On_Path (Gcc.all); ++ ++ if Gnat_Cmd = null then +++ Error_Msg (Gcc.all & ": installation problem, executable not found"); ++ goto No_Files_Written; ++ end if; ++ diff --cc debian/patches/ada-gnattools-cross.diff index 0000000,0000000..1525c23 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-gnattools-cross.diff @@@ -1,0 -1,0 +1,234 @@@ ++TODO: Check that the part removing the dependency from stamp-gnatlib1 ++to stamp-gnatlib2 is not necessary anymore with gcc-9. ++ ++* Link tools dynamically. ++* Prevent direct embedding of libada objects: ++ Mark ALI files as read-only, remove objects after the build. ++ A solution keeping the objects would be more intrusive. ++* Rebuild gnatbind/make/link with themselves. ++ This removes unneeded objects inherited from the hardcoded bootstrap list. ++ The same thing would be useful for gnat1drv, but is less easy. ++* TOOLS_ALREADY_COMPILED lists LIBGNAT objects that ++ gcc/ada/gcc-interface/Makefile should not rebuild. ++* Link libgnat/gnarl with LDFLAGS. ++* Link libgnarl with an explicit path to a shared object. ++ This prevents undefined symbols or unwanted usage of host libgnat. ++* Compile with -gnatn for efficiency. ++ Double-check the link since Debian moves some symbols. ++* set LD_LIBRARY_PATH so that rebuilt tools can be executed. ++ ++--- a/src/gcc/ada/Makefile.rtl +++++ b/src/gcc/ada/Makefile.rtl ++@@ -1920,6 +1920,11 @@ ifeq ($(strip $(filter-out s390% linux%, ++ LIBRARY_VERSION := $(LIB_VERSION) ++ endif ++ +++ifeq ($(strip $(filter-out hppa% unknown linux gnu,$(targ))),) +++ GNATLIB_SHARED = gnatlib-shared-dual +++ LIBRARY_VERSION := $(LIB_VERSION) +++endif +++ ++ # HP/PA HP-UX 10 ++ ifeq ($(strip $(filter-out hppa% hp hpux10%,$(target_cpu) $(target_vendor) $(target_os))),) ++ LIBGNAT_TARGET_PAIRS = \ ++--- a/src/gcc/ada/gcc-interface/Makefile.in +++++ b/src/gcc/ada/gcc-interface/Makefile.in ++@@ -498,6 +498,20 @@ gnatlink-re: ../stamp-tools gnatmake-re ++ --GCC="$(CC) $(ADA_INCLUDES)" --LINK="$(GCC_LINK)" $(TOOLS_LIBS) ++ $(MV) ../../gnatlinknew$(exeext) ../../gnatlink$(exeext) ++ +++gnatbind-re: ../stamp-tools gnatmake-re gnatlink-re +++ $(GNATMAKE) -j0 -c $(ADA_INCLUDES) gnatbind --GCC="$(CC) $(ALL_ADAFLAGS)" +++ $(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatbind +++ $(GNATLINK) -v gnatbind -o ../../gnatbind$(exeext) \ +++ --GCC="$(CC) $(ADA_INCLUDES)" --LINK="$(GCC_LINK)" $(TOOLS_LIBS) +++ +++# When driven by gnattools/Makefile for a native build, +++# TOOLS_ALREADY_COMPILED will list objects in the target standard Ada +++# libraries, that Make should avoid rebuilding. +++# We cannot use recursive variables to avoid an infinite loop, +++# so we must put this after definition of EXTRA_GNATMAKE_OBJS. +++GNATLINK_OBJS := $(filter-out $(TOOLS_ALREADY_COMPILED),$(GNATLINK_OBJS)) +++GNATMAKE_OBJS := $(filter-out $(TOOLS_ALREADY_COMPILED),$(GNATMAKE_OBJS)) +++ ++ # Needs to be built with CC=gcc ++ # Since the RTL should be built with the latest compiler, remove the ++ # stamp target in the parent directory whenever gnat1 is rebuilt ++@@ -625,7 +639,7 @@ $(RTSDIR)/s-oscons.ads: ../stamp-gnatlib ++ $(OSCONS_EXTRACT) ; \ ++ ../bldtools/oscons/xoscons s-oscons) ++ ++-gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../stamp-gnatlib2-$(RTSDIR) $(RTSDIR)/s-oscons.ads +++gnatlib: ../stamp-gnatlib1-$(RTSDIR) $(RTSDIR)/s-oscons.ads ++ test -f $(RTSDIR)/s-oscons.ads || exit 1 ++ # C files ++ $(MAKE) -C $(RTSDIR) \ ++@@ -659,23 +673,36 @@ gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../ ++ $(RANLIB_FOR_TARGET) $(RTSDIR)/libgmem$(arext) ++ endif ++ $(CHMOD) a-wx $(RTSDIR)/*.ali +++# Provide .ads .adb (read-only).ali .so .a, but prevent direct use of .o. +++ $(RM) $(RTSDIR)/*.o ++ touch ../stamp-gnatlib-$(RTSDIR) ++ ++ # Warning: this target assumes that LIBRARY_VERSION has been set correctly. ++ gnatlib-shared-default: ++- $(MAKE) $(FLAGS_TO_PASS) \ ++- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ ++- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(PICFLAG_FOR_TARGET)" \ ++- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \ ++- MULTISUBDIR="$(MULTISUBDIR)" \ ++- THREAD_KIND="$(THREAD_KIND)" \ ++- LN_S="$(LN_S)" \ ++- gnatlib +++ $(MAKE) -C $(RTSDIR) \ +++ CC="`echo \"$(GCC_FOR_TARGET)\" \ +++ | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ +++ INCLUDES="$(INCLUDES_FOR_SUBDIR) -I./../.." \ +++ CFLAGS="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \ +++ FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ +++ srcdir=$(fsrcdir) \ +++ -f ../Makefile $(LIBGNAT_OBJS) +++ $(MAKE) -C $(RTSDIR) \ +++ CC="`echo \"$(GCC_FOR_TARGET)\" \ +++ | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ +++ ADA_INCLUDES="" \ +++ CFLAGS="$(GNATLIBCFLAGS) $(PICFLAG_FOR_TARGET)" \ +++ ADAFLAGS="$(GNATLIBFLAGS) $(PICFLAG_FOR_TARGET)" \ +++ FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ +++ srcdir=$(fsrcdir) \ +++ -f ../Makefile \ +++ $(GNATRTL_OBJS) ++ $(RM) $(RTSDIR)/libgna*$(soext) ++ cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \ ++ | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared $(GNATLIBCFLAGS) \ ++ $(PICFLAG_FOR_TARGET) \ ++ -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +++ $(LDFLAGS) \ ++ $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ ++ $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ ++ $(MISCLIB) -lm ++@@ -683,8 +710,10 @@ gnatlib-shared-default: ++ | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared $(GNATLIBCFLAGS) \ ++ $(PICFLAG_FOR_TARGET) \ ++ -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +++ $(LDFLAGS) \ ++ $(GNATRTL_TASKING_OBJS) \ ++ $(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +++ libgnat$(hyphen)$(LIBRARY_VERSION).so \ ++ $(THREADSLIB) ++ cd $(RTSDIR); $(LN_S) libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ ++ libgnat$(soext) ++@@ -700,6 +729,10 @@ gnatlib-shared-default: ++ $(addprefix $(RTSDIR)/,$(GNATRTL_TASKING_OBJS)) ++ $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnarl_pic$(arext) ++ +++# Provide .ads .adb (read-only).ali .so .a, but prevent direct use of .o. +++ $(CHMOD) a-wx $(RTSDIR)/*.ali +++ $(RM) $(RTSDIR)/*.o +++ ++ gnatlib-shared-dual: ++ $(MAKE) $(FLAGS_TO_PASS) \ ++ GNATLIBFLAGS="$(GNATLIBFLAGS)" \ ++@@ -709,11 +742,8 @@ gnatlib-shared-dual: ++ MULTISUBDIR="$(MULTISUBDIR)" \ ++ THREAD_KIND="$(THREAD_KIND)" \ ++ LN_S="$(LN_S)" \ ++- gnatlib-shared-default ++- $(MV) $(RTSDIR)/libgna*$(soext) . ++- $(MV) $(RTSDIR)/libgnat_pic$(arext) . ++- $(MV) $(RTSDIR)/libgnarl_pic$(arext) . ++- $(RM) ../stamp-gnatlib2-$(RTSDIR) +++ gnatlib +++ $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali ++ $(MAKE) $(FLAGS_TO_PASS) \ ++ GNATLIBFLAGS="$(GNATLIBFLAGS)" \ ++ GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ ++@@ -721,10 +751,7 @@ gnatlib-shared-dual: ++ MULTISUBDIR="$(MULTISUBDIR)" \ ++ THREAD_KIND="$(THREAD_KIND)" \ ++ LN_S="$(LN_S)" \ ++- gnatlib ++- $(MV) libgna*$(soext) $(RTSDIR) ++- $(MV) libgnat_pic$(arext) $(RTSDIR) ++- $(MV) libgnarl_pic$(arext) $(RTSDIR) +++ gnatlib-shared-default ++ ++ gnatlib-shared-dual-win32: ++ $(MAKE) $(FLAGS_TO_PASS) \ ++@@ -735,9 +762,8 @@ gnatlib-shared-dual-win32: ++ MULTISUBDIR="$(MULTISUBDIR)" \ ++ THREAD_KIND="$(THREAD_KIND)" \ ++ LN_S="$(LN_S)" \ ++- gnatlib-shared-win32 ++- $(MV) $(RTSDIR)/libgna*$(soext) . ++- $(RM) ../stamp-gnatlib2-$(RTSDIR) +++ gnatlib +++ $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali ++ $(MAKE) $(FLAGS_TO_PASS) \ ++ GNATLIBFLAGS="$(GNATLIBFLAGS)" \ ++ GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ ++@@ -745,8 +771,7 @@ gnatlib-shared-dual-win32: ++ MULTISUBDIR="$(MULTISUBDIR)" \ ++ THREAD_KIND="$(THREAD_KIND)" \ ++ LN_S="$(LN_S)" \ ++- gnatlib ++- $(MV) libgna*$(soext) $(RTSDIR) +++ gnatlib-shared-win32 ++ ++ # ??? we need to add the option to support auto-import of arrays/records to ++ # the GNATLIBFLAGS when this will be supported by GNAT. At this point we will ++--- a/src/gnattools/Makefile.in +++++ b/src/gnattools/Makefile.in ++@@ -75,16 +75,23 @@ CXX_LFLAGS = \ ++ -L../../../$(target_noncanonical)/libstdc++-v3/src/.libs \ ++ -L../../../$(target_noncanonical)/libstdc++-v3/libsupc++/.libs ++ +++rtsdir := $(abspath ../gcc/ada/rts) +++ ++ # Variables for gnattools, native ++ TOOLS_FLAGS_TO_PASS_NATIVE= \ ++ "CC=../../xgcc -B../../" \ ++ "CXX=../../xg++ -B../../ $(CXX_LFLAGS)" \ ++ "CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" \ ++- "LDFLAGS=$(LDFLAGS)" \ ++- "ADAFLAGS=$(ADAFLAGS)" \ +++ "LDFLAGS=$(LDFLAGS) -Wl,--no-allow-shlib-undefined \ +++ -Wl,--no-copy-dt-needed-entries -Wl,--no-undefined" \ +++ "ADAFLAGS=$(ADAFLAGS) -gnatn" \ ++ "ADA_CFLAGS=$(ADA_CFLAGS)" \ ++ "INCLUDES=$(INCLUDES_FOR_SUBDIR)" \ ++- "ADA_INCLUDES=-I- -I../rts $(ADA_INCLUDES_FOR_SUBDIR)"\ +++ "ADA_INCLUDES=-I- -nostdinc -I$(rtsdir) $(ADA_INCLUDES_FOR_SUBDIR)" \ +++ "TOOLS_ALREADY_COMPILED=$(foreach d, $(rtsdir), \ +++ $(patsubst $(d)/%.ali,%.o, $(wildcard $(d)/*.ali)))" \ +++ 'LIBGNAT=$(rtsdir)/libgnat-$$(LIB_VERSION).so' \ +++ "GNATBIND_FLAGS=-nostdlib -x" \ ++ "exeext=$(exeext)" \ ++ "fsrcdir=$(fsrcdir)" \ ++ "srcdir=$(fsrcdir)" \ ++@@ -194,6 +201,10 @@ $(GCC_DIR)/stamp-tools: ++ # to be able to build gnatmake without a version of gnatmake around. Once ++ # everything has been compiled once, gnatmake can be recompiled with itself ++ # (see target regnattools) +++gnattools-native: export LD_LIBRARY_PATH := \ +++ $(if $(LD_LIBRARY_PATH),$(LD_LIBRARY_PATH):)$(rtsdir) +++# Useful even for 1st pass, as ../../gnatmake may already be +++# dynamically linked in case this target has already been invoked. ++ gnattools-native: $(GCC_DIR)/stamp-tools $(GCC_DIR)/stamp-gnatlib-rts ++ # gnattools1 ++ $(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \ ++@@ -202,6 +213,13 @@ gnattools-native: $(GCC_DIR)/stamp-tools ++ # gnattools2 ++ $(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \ ++ $(TOOLS_FLAGS_TO_PASS_NATIVE) common-tools +++# The hard-coded object lists for gnatbind/make/link contain unneeded +++# objects. Use the fresh tools to recompute dependencies. +++# A separate Make run avoids race conditions between gnatmakes +++# building the same object for common-tools and gnat*-re. +++# (parallelism is already forbidden between gnat*-re targets) +++ $(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \ +++ $(TOOLS_FLAGS_TO_PASS_NATIVE) gnatbind-re gnatmake-re gnatlink-re ++ ++ # gnatmake/link can be built with recent gnatmake/link if they are available. ++ # This is especially convenient for building cross tools or for rebuilding diff --cc debian/patches/ada-kfreebsd.diff index 0000000,0000000..22ddbe3 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-kfreebsd.diff @@@ -1,0 -1,0 +1,70 @@@ ++Description: add support for GNU/kFreeBSD and GNU/Hurd. ++ For now, it seems that BSD requires -lrt. ++ On other architectures, the library is ignored thanks to --as-needed. ++Author: Ludovic Brenta ++Author: Nicolas Boulenguez ++ ++--- a/src/gcc/ada/libgnarl/s-osinte__kfreebsd-gnu.ads +++++ b/src/gcc/ada/libgnarl/s-osinte__kfreebsd-gnu.ads ++@@ -46,6 +46,7 @@ package System.OS_Interface is ++ pragma Preelaborate; ++ ++ pragma Linker_Options ("-lpthread"); +++ pragma Linker_Options ("-lrt"); ++ ++ subtype int is Interfaces.C.int; ++ subtype char is Interfaces.C.char; ++@@ -438,31 +439,25 @@ package System.OS_Interface is ++ PTHREAD_PRIO_PROTECT : constant := 2; ++ PTHREAD_PRIO_INHERIT : constant := 1; ++ +++ -- GNU/kFreeBSD does not support Thread Priority Protection or Thread +++ -- Priority Inheritance and lacks some pthread_mutexattr_* functions. +++ -- Replace them with dummy versions. +++ ++ function pthread_mutexattr_setprotocol ++- (attr : access pthread_mutexattr_t; ++- protocol : int) return int; ++- pragma Import ++- (C, pthread_mutexattr_setprotocol, "pthread_mutexattr_setprotocol"); +++ (ignored_attr : access pthread_mutexattr_t; +++ ignored_protocol : int) return int is (0); ++ ++ function pthread_mutexattr_getprotocol ++- (attr : access pthread_mutexattr_t; ++- protocol : access int) return int; ++- pragma Import ++- (C, pthread_mutexattr_getprotocol, "pthread_mutexattr_getprotocol"); +++ (ignored_attr : access pthread_mutexattr_t; +++ ignored_protocol : access int) return int is (0); ++ ++ function pthread_mutexattr_setprioceiling ++- (attr : access pthread_mutexattr_t; ++- prioceiling : int) return int; ++- pragma Import ++- (C, pthread_mutexattr_setprioceiling, ++- "pthread_mutexattr_setprioceiling"); +++ (ignored_attr : access pthread_mutexattr_t; +++ ignored_prioceiling : int) return int is (0); ++ ++ function pthread_mutexattr_getprioceiling ++- (attr : access pthread_mutexattr_t; ++- prioceiling : access int) return int; ++- pragma Import ++- (C, pthread_mutexattr_getprioceiling, ++- "pthread_mutexattr_getprioceiling"); +++ (ignored_attr : access pthread_mutexattr_t; +++ ignored_prioceiling : access int) return int is (0); ++ ++ type struct_sched_param is record ++ sched_priority : int; -- scheduling priority ++--- a/src/gcc/ada/s-oscons-tmplt.c +++++ b/src/gcc/ada/s-oscons-tmplt.c ++@@ -1973,6 +1973,7 @@ CND(CLOCK_THREAD_CPUTIME_ID, "Thread CPU ++ ++ #if defined(__linux__) || defined(__FreeBSD__) \ ++ || (defined(_AIX) && defined(_AIXVERSION_530)) \ +++ || defined(__FreeBSD_kernel__) \ ++ || defined(__DragonFly__) || defined(__QNX__) ++ /** On these platforms use system provided monotonic clock instead of ++ ** the default CLOCK_REALTIME. We then need to set up cond var attributes diff --cc debian/patches/ada-lib-info-source-date-epoch.diff index 0000000,0000000..b6913d2 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-lib-info-source-date-epoch.diff @@@ -1,0 -1,0 +1,115 @@@ ++Description: set ALI timestamps from SOURCE_DATE_EPOCH if available. ++ When the SOURCE_DATE_EPOCH environment variable is set, ++ replace timestamps more recent than its value with its value ++ when writing Ada Library Information (ALI) files. ++ This allow reproducible builds from generated or patched Ada sources. ++ https://reproducible-builds.org/specs/source-date-epoch/ ++ . ++ Also see debian/ada/test_ada_source_date_epoch.sh. ++Author: Nicolas Boulenguez ++ ++--- a/src/gcc/ada/osint.adb +++++ b/src/gcc/ada/osint.adb ++@@ -64,6 +64,10 @@ package body Osint is ++ -- Used in Locate_File as a fake directory when Name is already an ++ -- absolute path. ++ +++ Source_Date_Epoch : OS_Time := Invalid_Time; +++ -- Set at startup by the Initialize procedure. +++ -- See the specification of the File_Time_Stamp functions. +++ ++ ------------------------------------- ++ -- Use of Name_Find and Name_Enter -- ++ ------------------------------------- ++@@ -1126,8 +1130,14 @@ package body Osint is ++ is ++ function Internal (N : C_File_Name; A : System.Address) return OS_Time; ++ pragma Import (C, Internal, "__gnat_file_time_name_attr"); +++ T : OS_Time := Internal (Name, Attr.all'Address); ++ begin ++- return Internal (Name, Attr.all'Address); +++ if Source_Date_Epoch /= Invalid_Time and then T /= Invalid_Time +++ and then Source_Date_Epoch < T +++ then +++ T := Source_Date_Epoch; +++ end if; +++ return T; ++ end File_Time_Stamp; ++ ++ function File_Time_Stamp ++@@ -1150,6 +1160,7 @@ package body Osint is ++ ---------------- ++ ++ function File_Stamp (Name : File_Name_Type) return Time_Stamp_Type is +++ T : OS_Time; ++ begin ++ if Name = No_File then ++ return Empty_Time_Stamp; ++@@ -1161,9 +1172,13 @@ package body Osint is ++ -- not exist, and OS_Time_To_GNAT_Time will convert this value to ++ -- Empty_Time_Stamp. Therefore we do not need to first test whether ++ -- the file actually exists, which saves a system call. ++- ++- return OS_Time_To_GNAT_Time ++- (File_Time_Stamp (Name_Buffer (1 .. Name_Len))); +++ T := File_Time_Stamp (Name_Buffer (1 .. Name_Len)); +++ if Source_Date_Epoch /= Invalid_Time and then T /= Invalid_Time +++ and then Source_Date_Epoch < T +++ then +++ T := Source_Date_Epoch; +++ end if; +++ return OS_Time_To_GNAT_Time (T); ++ end File_Stamp; ++ ++ function File_Stamp (Name : Path_Name_Type) return Time_Stamp_Type is ++@@ -3245,4 +3260,28 @@ begin ++ Osint.Initialize; ++ end Initialization; ++ +++ Set_Source_Date_Epoch : declare +++ Env_Var : String_Access := Getenv ("SOURCE_DATE_EPOCH"); +++ Epoch : time_t range 0 .. time_t'Last := 0; +++ Digit : time_t range 0 .. 9; +++ begin +++ if 0 < Env_Var.all'Length then +++ -- Calling System.Val_LLI breaks the bootstrap sequence. +++ -- First convert to time_t because OS_Time is private. +++ for C of Env_Var.all loop +++ if C not in '0' .. '9' then +++ goto Finally; +++ end if; +++ Digit := time_t (Character'Pos (C) - Character'Pos ('0')); +++ if (time_t'Last - Digit) / 10 < Epoch then +++ goto Finally; +++ end if; +++ Epoch := Epoch * 10 + Digit; +++ end loop; +++ Source_Date_Epoch := To_Ada (Epoch); +++ end if; +++ <> +++ Free (Env_Var); +++ end Set_Source_Date_Epoch; +++ ++ end Osint; ++--- a/src/gcc/ada/osint.ads +++++ b/src/gcc/ada/osint.ads ++@@ -196,6 +196,7 @@ package Osint is ++ -- information in order to locate it. If the source file cannot be opened, ++ -- or Name = No_File, and all blank time stamp is returned (this is not an ++ -- error situation). +++ -- Handles SOURCE_DATE_EPOCH like File_Time_Stamp functions below. ++ ++ function File_Stamp (Name : Path_Name_Type) return Time_Stamp_Type; ++ -- Same as above for a path name ++@@ -300,6 +301,11 @@ package Osint is ++ (Name : Path_Name_Type; ++ Attr : access File_Attributes) return Time_Stamp_Type; ++ -- Return the time stamp of the file +++ -- If the SOURCE_DATE_EPOCH environment variable exists and represents +++ -- an OS_Type value, any more recent file time stamp is truncated. +++ -- This ensures that gnat1 writes deterministic .ali files even in +++ -- the presence of patched or generated sources. See +++ -- https://reproducible-builds.org/specs/source-date-epoch. ++ ++ function Is_Readable_File ++ (Name : C_File_Name; diff --cc debian/patches/ada-link-lib.diff index 0000000,0000000..d709705 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-link-lib.diff @@@ -1,0 -1,0 +1,151 @@@ ++Description: adapt libgnat build for Debian ++ Don't include a runtime link path (-rpath), when linking binaries. ++ . ++ Build the shared libraries on hppa-linux (see #786692 below). ++ TODO: ask the reporter (no porterbox) to attempt a rebuild without this ++ chunk, now that we diverge less from upstream. ++ . ++ Instead of building libada as a target library only, build it as ++ both a host and, if different, target library. ++ . ++ Compile with -gnatn for efficiency. ++ Double-check the link since Debian moves some symbols. ++ . ++ Please read ada-changes-in-autogen-output.diff about src/Makefile.def. ++Bug-Debian: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=786692 ++Forwarded: not-needed ++Author: Ludovic Brenta ++Author: Nicolas Boulenguez ++Author: Matthias Klose ++ ++--- a/src/gcc/ada/gcc-interface/config-lang.in +++++ b/src/gcc/ada/gcc-interface/config-lang.in ++@@ -44,7 +44,7 @@ if test "x$cross_compiling/$build/$host" ++ fi ++ ++ target_libs="target-libada" ++-lang_dirs="gnattools" +++lang_dirs="libada gnattools" ++ ++ # Ada is not enabled by default for the time being. ++ build_by_default=no ++--- a/src/gcc/ada/link.c +++++ b/src/gcc/ada/link.c ++@@ -107,9 +107,9 @@ const char *__gnat_default_libgcc_subdir ++ || defined (__NetBSD__) || defined (__OpenBSD__) \ ++ || defined (__QNX__) ++ const char *__gnat_object_file_option = "-Wl,@"; ++-const char *__gnat_run_path_option = "-Wl,-rpath,"; ++-char __gnat_shared_libgnat_default = STATIC; ++-char __gnat_shared_libgcc_default = STATIC; +++const char *__gnat_run_path_option = ""; +++char __gnat_shared_libgnat_default = SHARED; +++char __gnat_shared_libgcc_default = SHARED; ++ int __gnat_link_max = 8192; ++ unsigned char __gnat_objlist_file_supported = 1; ++ const char *__gnat_object_library_extension = ".a"; ++@@ -129,9 +129,9 @@ const char *__gnat_default_libgcc_subdir ++ ++ #elif defined (__linux__) || defined (__GLIBC__) ++ const char *__gnat_object_file_option = "-Wl,@"; ++-const char *__gnat_run_path_option = "-Wl,-rpath,"; ++-char __gnat_shared_libgnat_default = STATIC; ++-char __gnat_shared_libgcc_default = STATIC; +++const char *__gnat_run_path_option = ""; +++char __gnat_shared_libgnat_default = SHARED; +++char __gnat_shared_libgcc_default = SHARED; ++ int __gnat_link_max = 8192; ++ unsigned char __gnat_objlist_file_supported = 1; ++ const char *__gnat_object_library_extension = ".a"; ++--- a/src/libada/Makefile.in +++++ b/src/libada/Makefile.in ++@@ -79,10 +79,11 @@ ADA_RTS_DIR=$(GCC_DIR)/ada/rts$(subst /, ++ # by recursive make invocations in gcc/ada/Makefile.in ++ LIBADA_FLAGS_TO_PASS = \ ++ "MAKEOVERRIDES=" \ ++- "LDFLAGS=$(LDFLAGS)" \ +++ "LDFLAGS=$(LDFLAGS) -Wl,--no-allow-shlib-undefined \ +++ -Wl,--no-copy-dt-needed-entries -Wl,--no-undefined" \ ++ "LN_S=$(LN_S)" \ ++ "SHELL=$(SHELL)" \ ++- "GNATLIBFLAGS=$(GNATLIBFLAGS) $(MULTIFLAGS)" \ +++ "GNATLIBFLAGS=$(GNATLIBFLAGS) $(MULTIFLAGS) -gnatn" \ ++ "GNATLIBCFLAGS=$(GNATLIBCFLAGS) $(MULTIFLAGS)" \ ++ "GNATLIBCFLAGS_FOR_C=$(GNATLIBCFLAGS_FOR_C) $(MULTIFLAGS)" \ ++ "PICFLAG_FOR_TARGET=$(PICFLAG)" \ ++--- a/src/Makefile.def +++++ b/src/Makefile.def ++@@ -397,6 +397,7 @@ dependencies = { module=all-libcpp; on=a ++ ++ dependencies = { module=all-fixincludes; on=all-libiberty; }; ++ +++dependencies = { module=all-target-libada; on=all-gcc; }; ++ dependencies = { module=all-gnattools; on=all-target-libada; }; ++ dependencies = { module=all-gnattools; on=all-target-libstdc++-v3; }; ++ ++--- a/src/configure.ac +++++ b/src/configure.ac ++@@ -142,6 +142,11 @@ host_libs="intl libiberty opcodes bfd re ++ # If --enable-gold is used, "gold" may replace "ld". ++ host_tools="texinfo flex bison binutils gas ld fixincludes gcc cgen sid sim gdb gdbserver gprof etc expect dejagnu m4 utils guile fastjar gnattools libcc1 gm2tools gotools c++tools" ++ +++case "${target}" in +++ hppa64-*linux*) ;; +++ *) target_libiberty="target-libiberty";; +++esac +++ ++ # these libraries are built for the target environment, and are built after ++ # the host libraries and the host tools (which may be a cross compiler) ++ # Note that libiberty is not a target library. ++@@ -162,6 +167,7 @@ target_libraries="target-libgcc \ ++ target-libffi \ ++ target-libobjc \ ++ target-libada \ +++ ${target_libiberty} \ ++ target-libgm2 \ ++ target-libgo \ ++ target-libphobos \ ++--- a/src/gcc/ada/gcc-interface/Make-lang.in +++++ b/src/gcc/ada/gcc-interface/Make-lang.in ++@@ -45,7 +45,7 @@ RMDIR = rm -rf ++ ++ ++ # Extra flags to pass to recursive makes. ++-COMMON_ADAFLAGS= -gnatpg +++COMMON_ADAFLAGS= -gnatpgn ++ ifeq ($(TREECHECKING),) ++ CHECKING_ADAFLAGS= ++ else ++@@ -261,7 +261,9 @@ else ++ endif ++ ++ # Strip -Werror during linking for the LTO bootstrap ++-GCC_LINKERFLAGS = $(filter-out -Werror, $(ALL_LINKERFLAGS)) +++GCC_LINKERFLAGS = $(filter-out -Werror, $(ALL_LINKERFLAGS)) \ +++ -Wl,--no-allow-shlib-undefined -Wl,--no-copy-dt-needed-entries \ +++ -Wl,--no-undefined ++ ++ GCC_LINK=$(LINKER) $(GCC_LINKERFLAGS) $(LDFLAGS) ++ GCC_LLINK=$(LLINKER) $(GCC_LINKERFLAGS) $(LDFLAGS) ++--- a/src/gcc/testsuite/lib/gnat.exp +++++ b/src/gcc/testsuite/lib/gnat.exp ++@@ -115,6 +115,7 @@ proc gnat_target_compile { source dest t ++ global TOOL_OPTIONS ++ global gnat_target_current ++ global TEST_ALWAYS_FLAGS +++ global ld_library_path ++ ++ # dg-require-effective-target tests must be compiled as C. ++ if [ string match "*.c" $source ] then { ++@@ -144,6 +145,11 @@ proc gnat_target_compile { source dest t ++ # Always log so compilations can be repeated manually. ++ verbose -log "ADA_INCLUDE_PATH=$rtsdir/adainclude" ++ verbose -log "ADA_OBJECTS_PATH=$rtsdir/adainclude" +++ +++ if { ! [ string match "*/libada/adalib*" $ld_library_path ] } { +++ append ld_library_path ":$rtsdir/adalib" +++ set_ld_library_path_env_vars +++ } ++ } ++ ++ lappend options "compiler=$GNAT_UNDER_TEST -q -f" diff --cc debian/patches/ada-nobiarch-check.diff index 0000000,0000000..35190a7 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-nobiarch-check.diff @@@ -1,0 -1,0 +1,21 @@@ ++Description: For biarch builds, disable the gnat testsuite for the non-default ++ architecture (no biarch support in gnat yet). ++Author: Matthias Klose ++ ++Index: b/src/gcc/Makefile.in ++=================================================================== ++--- a/src/gcc/Makefile.in +++++ b/src/gcc/Makefile.in ++@@ -4510,7 +4510,11 @@ ++ if [ -f $${rootme}/../expect/expect ] ; then \ ++ TCL_LIBRARY=`cd .. ; cd $${srcdir}/../tcl/library ; ${PWD_COMMAND}` ; \ ++ export TCL_LIBRARY ; fi ; \ ++- $(RUNTEST) --tool $* $(RUNTESTFLAGS)) +++ if [ "$*" = gnat ]; then \ +++ runtestflags="`echo '$(RUNTESTFLAGS)' | sed -r 's/,-m(32|64|x32)//g;s/,-mabi=(n32|64)//g'`"; \ +++ case "$$runtestflags" in *\\{\\}) runtestflags=; esac; \ +++ fi; \ +++ $(RUNTEST) --tool $* $$runtestflags) ++ ++ $(patsubst %,%-subtargets,$(filter-out $(lang_checks_parallelized),$(lang_checks))): check-%-subtargets: ++ @echo check-$* diff --cc debian/patches/ada-perl-shebang.diff index 0000000,0000000..ea930b1 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-perl-shebang.diff @@@ -1,0 -1,0 +1,10 @@@ ++# DP: Fix perl shebang for the gnathtml binary. ++ ++--- a/src/gcc/ada/gnathtml.pl +++++ b/src/gcc/ada/gnathtml.pl ++@@ -1,4 +1,4 @@ ++-#! /usr/bin/env perl +++#! /usr/bin/perl ++ ++ #----------------------------------------------------------------------------- ++ #- -- diff --cc debian/patches/ada-sjlj.diff index 0000000,0000000..68861a1 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-sjlj.diff @@@ -1,0 -1,0 +1,493 @@@ ++# Please read ada-changes-in-autogen-output.diff about src/Makefile.def. ++ ++# !!! Must be applied after ada-libgnat_util.diff ++ ++--- /dev/null +++++ b/src/libada-sjlj/Makefile.in ++@@ -0,0 +1,204 @@ +++# Makefile for libada. +++# Copyright (C) 2003-2017 Free Software Foundation, Inc. +++# +++# This file is free software; you can redistribute it and/or modify +++# it under the terms of the GNU General Public License as published by +++# the Free Software Foundation; either version 3 of the License, or +++# (at your option) any later version. +++# +++# This program is distributed in the hope that it will be useful, +++# but WITHOUT ANY WARRANTY; without even the implied warranty of +++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +++# GNU General Public License for more details. +++# +++# You should have received a copy of the GNU General Public License +++# along with this program; see the file COPYING3. If not see +++# . +++ +++# Default target; must be first. +++all: gnatlib +++ $(MULTIDO) $(AM_MAKEFLAGS) DO=all multi-do # $(MAKE) +++ +++.PHONY: all +++ +++## Multilib support variables. +++MULTISRCTOP = +++MULTIBUILDTOP = +++MULTIDIRS = +++MULTISUBDIR = +++MULTIDO = true +++MULTICLEAN = true +++ +++# Standard autoconf-set variables. +++SHELL = @SHELL@ +++srcdir = @srcdir@ +++libdir = @libdir@ +++build = @build@ +++target = @target@ +++prefix = @prefix@ +++ +++# Nonstandard autoconf-set variables. +++enable_shared = @enable_shared@ +++ +++LN_S=@LN_S@ +++AWK=@AWK@ +++ +++ifeq (cp -p,$(LN_S)) +++LN_S_RECURSIVE = cp -pR +++else +++LN_S_RECURSIVE = $(LN_S) +++endif +++ +++# Variables for the user (or the top level) to override. +++objext=.o +++THREAD_KIND=native +++TRACE=no +++LDFLAGS= +++ +++# The tedious process of getting CFLAGS right. +++CFLAGS=-g +++PICFLAG = @PICFLAG@ +++GNATLIBFLAGS= -W -Wall -gnatpg -nostdinc +++GNATLIBCFLAGS= -g -O2 +++GNATLIBCFLAGS_FOR_C = -W -Wall $(GNATLIBCFLAGS) $(CFLAGS_FOR_TARGET) \ +++ -fexceptions -DIN_RTS @have_getipinfo@ @have_capability@ +++ +++host_subdir = @host_subdir@ +++GCC_DIR=$(MULTIBUILDTOP)../../$(host_subdir)/gcc +++ +++target_noncanonical:=@target_noncanonical@ +++version := $(shell @get_gcc_base_ver@ $(srcdir)/../gcc/BASE-VER) +++libsubdir := $(libdir)/gcc/$(target_noncanonical)/$(version)$(MULTISUBDIR) +++ADA_RTS_DIR=$(GCC_DIR)/ada/rts$(subst /,_,$(MULTISUBDIR)) +++ADA_RTS_SUBDIR=./rts$(subst /,_,$(MULTISUBDIR)) +++ +++# exeext should not be used because it's the *host* exeext. We're building +++# a *target* library, aren't we?!? Likewise for CC. Still, provide bogus +++# definitions just in case something slips through the safety net provided +++# by recursive make invocations in gcc/ada/Makefile.in +++LIBADA_FLAGS_TO_PASS = \ +++ "MAKEOVERRIDES=" \ +++ "LDFLAGS=$(LDFLAGS) -Wl,--no-allow-shlib-undefined \ +++ -Wl,--no-copy-dt-needed-entries -Wl,--no-undefined" \ +++ "LN_S=$(LN_S)" \ +++ "SHELL=$(SHELL)" \ +++ "GNATLIBFLAGS=$(GNATLIBFLAGS) $(MULTIFLAGS) -gnatn" \ +++ "GNATLIBCFLAGS=$(GNATLIBCFLAGS) $(MULTIFLAGS)" \ +++ "GNATLIBCFLAGS_FOR_C=$(GNATLIBCFLAGS_FOR_C) $(MULTIFLAGS)" \ +++ "PICFLAG_FOR_TARGET=$(PICFLAG)" \ +++ "THREAD_KIND=$(THREAD_KIND)" \ +++ "TRACE=$(TRACE)" \ +++ "MULTISUBDIR=$(MULTISUBDIR)" \ +++ "libsubdir=$(libsubdir)" \ +++ "objext=$(objext)" \ +++ "prefix=$(prefix)" \ +++ "exeext=.exeext.should.not.be.used " \ +++ 'CC=the.host.compiler.should.not.be.needed' \ +++ "GCC_FOR_TARGET=$(CC)" \ +++ "CFLAGS=$(CFLAGS)" \ +++ "RTSDIR=rts-sjlj" +++ +++# Rules to build gnatlib. +++.PHONY: gnatlib gnatlib-plain gnatlib-sjlj gnatlib-zcx gnatlib-shared osconstool +++gnatlib: gnatlib-sjlj +++ +++gnatlib-plain: osconstool $(GCC_DIR)/ada/Makefile +++ test -f stamp-libada || \ +++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) gnatlib \ +++ && touch stamp-libada +++ -rm -rf adainclude +++ -rm -rf adalib +++ $(LN_S_RECURSIVE) $(ADA_RTS_DIR) adainclude +++ $(LN_S_RECURSIVE) $(ADA_RTS_DIR) adalib +++ +++gnatlib-sjlj gnatlib-zcx gnatlib-shared: osconstool $(GCC_DIR)/ada/Makefile +++ test -f stamp-libada || \ +++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) $@ \ +++ && touch stamp-libada-sjlj +++ -rm -rf adainclude +++ -rm -rf adalib +++ $(LN_S_RECURSIVE) $(ADA_RTS_DIR) adainclude +++ $(LN_S_RECURSIVE) $(ADA_RTS_DIR) adalib +++ +++osconstool: +++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) ./bldtools/oscons/xoscons +++ +++install-gnatlib: $(GCC_DIR)/ada/Makefile +++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) install-gnatlib-sjlj +++ +++# Check uninstalled version. +++check: +++ +++# Check installed version. +++installcheck: +++ +++# Build info (none here). +++info: +++ +++# Build DVI (none here). +++dvi: +++ +++# Build PDF (none here). +++pdf: +++ +++# Build html (none here). +++html: +++ +++# Build TAGS (none here). +++TAGS: +++ +++.PHONY: check installcheck info dvi pdf html +++ +++# Installation rules. +++install: install-gnatlib +++ $(MULTIDO) $(AM_MAKEFLAGS) DO=install multi-do # $(MAKE) +++ +++install-strip: install +++ +++install-info: +++ +++install-pdf: +++ +++install-html: +++ +++.PHONY: install install-strip install-info install-pdf install-html +++ +++# Cleaning rules. +++mostlyclean: +++ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=mostlyclean multi-clean # $(MAKE) +++ +++clean: +++ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=clean multi-clean # $(MAKE) +++ +++distclean: +++ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=distclean multi-clean # $(MAKE) +++ $(RM) Makefile config.status config.log +++ +++maintainer-clean: +++ +++.PHONY: mostlyclean clean distclean maintainer-clean +++ +++# Rules for rebuilding this Makefile. +++Makefile: $(srcdir)/Makefile.in config.status +++ CONFIG_FILES=$@ ; \ +++ CONFIG_HEADERS= ; \ +++ $(SHELL) ./config.status +++ +++config.status: $(srcdir)/configure +++ $(SHELL) ./config.status --recheck +++ +++AUTOCONF = autoconf +++configure_deps = \ +++ $(srcdir)/configure.ac \ +++ $(srcdir)/../config/acx.m4 \ +++ $(srcdir)/../config/multi.m4 \ +++ $(srcdir)/../config/override.m4 \ +++ $(srcdir)/../config/picflag.m4 \ +++ $(srcdir)/../config/unwind_ipinfo.m4 +++ +++$(srcdir)/configure: @MAINT@ $(configure_deps) +++ cd $(srcdir) && $(AUTOCONF) +++ +++# Don't export variables to the environment, in order to not confuse +++# configure. +++.NOEXPORT: ++--- /dev/null +++++ b/src/libada-sjlj/configure.ac ++@@ -0,0 +1,156 @@ +++# Configure script for libada. +++# Copyright (C) 2003-2017 Free Software Foundation, Inc. +++# +++# This file is free software; you can redistribute it and/or modify it +++# under the terms of the GNU General Public License as published by +++# the Free Software Foundation; either version 3 of the License, or +++# (at your option) any later version. +++# +++# This program is distributed in the hope that it will be useful, but +++# WITHOUT ANY WARRANTY; without even the implied warranty of +++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +++# General Public License for more details. +++# +++# You should have received a copy of the GNU General Public License +++# along with this program; see the file COPYING3. If not see +++# . +++ +++sinclude(../config/acx.m4) +++sinclude(../config/multi.m4) +++sinclude(../config/override.m4) +++sinclude(../config/picflag.m4) +++sinclude(../config/unwind_ipinfo.m4) +++ +++AC_INIT +++AC_PREREQ([2.64]) +++ +++AC_CONFIG_SRCDIR([Makefile.in]) +++ +++# Determine the host, build, and target systems +++AC_CANONICAL_BUILD +++AC_CANONICAL_HOST +++AC_CANONICAL_TARGET +++target_alias=${target_alias-$host_alias} +++ +++# Determine the noncanonical target name, for directory use. +++ACX_NONCANONICAL_TARGET +++ +++# Determine the target- and build-specific subdirectories +++GCC_TOPLEV_SUBDIRS +++ +++# Command-line options. +++# Very limited version of AC_MAINTAINER_MODE. +++AC_ARG_ENABLE([maintainer-mode], +++ [AC_HELP_STRING([--enable-maintainer-mode], +++ [enable make rules and dependencies not useful (and +++ sometimes confusing) to the casual installer])], +++ [case ${enable_maintainer_mode} in +++ yes) MAINT='' ;; +++ no) MAINT='#' ;; +++ *) AC_MSG_ERROR([--enable-maintainer-mode must be yes or no]) ;; +++ esac +++ maintainer_mode=${enableval}], +++ [MAINT='#']) +++AC_SUBST([MAINT])dnl +++ +++AM_ENABLE_MULTILIB(, ..) +++# Calculate toolexeclibdir +++# Also toolexecdir, though it's only used in toolexeclibdir +++case ${enable_version_specific_runtime_libs} in +++ yes) +++ # Need the gcc compiler version to know where to install libraries +++ # and header files if --enable-version-specific-runtime-libs option +++ # is selected. +++ toolexecdir='$(libdir)/gcc/$(target_alias)' +++ toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' +++ ;; +++ no) +++ if test -n "$with_cross_host" && +++ test x"$with_cross_host" != x"no"; then +++ # Install a library built with a cross compiler in tooldir, not libdir. +++ toolexecdir='$(exec_prefix)/$(target_alias)' +++ toolexeclibdir='$(toolexecdir)/lib' +++ else +++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +++ toolexeclibdir='$(libdir)' +++ fi +++ multi_os_directory=`$CC -print-multi-os-directory` +++ case $multi_os_directory in +++ .) ;; # Avoid trailing /. +++ *) toolexeclibdir=$toolexeclibdir/$multi_os_directory ;; +++ esac +++ ;; +++esac +++AC_SUBST(toolexecdir) +++AC_SUBST(toolexeclibdir) +++#TODO: toolexeclibdir is currently disregarded +++ +++# Check the compiler. +++# The same as in boehm-gc and libstdc++. Have to borrow it from there. +++# We must force CC to /not/ be precious variables; otherwise +++# the wrong, non-multilib-adjusted value will be used in multilibs. +++# As a side effect, we have to subst CFLAGS ourselves. +++ +++m4_rename([_AC_ARG_VAR_PRECIOUS],[real_PRECIOUS]) +++m4_define([_AC_ARG_VAR_PRECIOUS],[]) +++AC_PROG_CC +++m4_rename_force([real_PRECIOUS],[_AC_ARG_VAR_PRECIOUS]) +++ +++AC_SUBST(CFLAGS) +++ +++AC_ARG_ENABLE([shared], +++[AC_HELP_STRING([--disable-shared], +++ [don't provide a shared libgnat])], +++[ +++case $enable_shared in +++ yes | no) ;; +++ *) +++ enable_shared=no +++ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:," +++ for pkg in $enableval; do +++ case $pkg in +++ ada | libada) +++ enable_shared=yes ;; +++ esac +++ done +++ IFS="$ac_save_ifs" +++ ;; +++esac +++], [enable_shared=yes]) +++AC_SUBST([enable_shared]) +++ +++GCC_PICFLAG +++AC_SUBST([PICFLAG]) +++ +++# These must be passed down, or are needed by gcc/libgcc.mvars +++AC_PROG_AWK +++AC_PROG_LN_S +++ +++# Determine what to build for 'gnatlib' +++if test ${enable_shared} = yes; then +++ default_gnatlib_target="gnatlib-shared" +++else +++ default_gnatlib_target="gnatlib-plain" +++fi +++AC_SUBST([default_gnatlib_target]) +++ +++# Check for _Unwind_GetIPInfo +++GCC_CHECK_UNWIND_GETIPINFO +++if test x$have_unwind_getipinfo = xyes; then +++ have_getipinfo=-DHAVE_GETIPINFO +++else +++ have_getipinfo= +++fi +++AC_SUBST([have_getipinfo]) +++ +++# Check for +++AC_CHECK_HEADER([sys/capability.h], have_capability=-DHAVE_CAPABILITY, have_capability=) +++AC_SUBST([have_capability]) +++ +++# Determine what GCC version number to use in filesystem paths. +++GCC_BASE_VER +++ +++# Output: create a Makefile. +++AC_CONFIG_FILES([Makefile]) +++ +++AC_OUTPUT ++--- a/src/Makefile.def +++++ b/src/Makefile.def ++@@ -194,6 +194,7 @@ target_modules = { module= libgnatvsn; n ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; +++target_modules = { module= libada-sjlj; }; ++ target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; }; ++ target_modules = { module= libitm; lib_path=.libs; }; ++ target_modules = { module= libatomic; lib_path=.libs; }; ++@@ -394,6 +395,7 @@ dependencies = { module=all-libcpp; on=a ++ dependencies = { module=all-fixincludes; on=all-libiberty; }; ++ ++ dependencies = { module=all-target-libada; on=all-gcc; }; +++dependencies = { module=all-target-libada-sjlj; on=all-target-libada; }; ++ dependencies = { module=all-gnattools; on=all-target-libada; }; ++ dependencies = { module=all-gnattools; on=all-target-libstdc++-v3; }; ++ dependencies = { module=all-gnattools; on=all-target-libgnat_util; }; ++--- a/src/configure.ac +++++ b/src/configure.ac ++@@ -167,6 +167,7 @@ target_libraries="target-libgcc \ ++ target-libffi \ ++ target-libobjc \ ++ target-libada \ +++ target-libada-sjlj \ ++ ${target_libiberty} \ ++ target-libgnat_util \ ++ target-libgo \ ++@@ -454,7 +455,7 @@ AC_ARG_ENABLE(libada, ++ ENABLE_LIBADA=$enableval, ++ ENABLE_LIBADA=yes) ++ if test "${ENABLE_LIBADA}" != "yes" ; then ++- noconfigdirs="$noconfigdirs target-libgnat_util gnattools" +++ noconfigdirs="$noconfigdirs target-libgnat_util gnattools target-libada-sjlj" ++ fi ++ ++ AC_ARG_ENABLE(libssp, ++--- a/src/gcc/ada/gcc-interface/Makefile.in +++++ b/src/gcc/ada/gcc-interface/Makefile.in ++@@ -193,7 +193,7 @@ GNAT_SRC=$(fsrcpfx)ada ++ ++ # Multilib handling ++ MULTISUBDIR = ++-RTSDIR = rts$(subst /,_,$(MULTISUBDIR)) +++RTSDIR := rts$(subst /,_,$(MULTISUBDIR)) ++ ++ # Link flags used to build gnat tools. By default we prefer to statically ++ # link with libgcc to avoid a dependency on shared libgcc (which is tricky ++@@ -561,6 +561,26 @@ install-gnatlib: ../stamp-gnatlib-$(RTSD ++ cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.adb ++ cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.ads ++ +++install-gnatlib-sjlj: ../stamp-gnatlib-$(RTSDIR) +++# Create the directory before deleting it, in case the directory is +++# a list of directories (as it may be on VMS). This ensures we are +++# deleting the right one. +++ -$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR_SJLJ) +++ -$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ) +++ $(RMDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR_SJLJ) +++ $(RMDIR) $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ) +++ -$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR_SJLJ) +++ -$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ) +++ for file in $(RTSDIR)/*.ali; do \ +++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR_SJLJ); \ +++ done +++ # This copy must be done preserving the date on the original file. +++ for file in $(RTSDIR)/*.ad?; do \ +++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ); \ +++ done +++ cd $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ); $(CHMOD) a-wx *.adb +++ cd $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ); $(CHMOD) a-wx *.ads +++ ++ ../stamp-gnatlib2-$(RTSDIR): ++ $(RM) $(RTSDIR)/s-*.ali ++ $(RM) $(RTSDIR)/s-*$(objext) ++@@ -826,6 +846,7 @@ gnatlib-shared: ++ gnatlib-sjlj: ++ $(MAKE) $(FLAGS_TO_PASS) \ ++ EH_MECHANISM="" \ +++ RTSDIR="$(RTSDIR)" \ ++ MULTISUBDIR="$(MULTISUBDIR)" \ ++ THREAD_KIND="$(THREAD_KIND)" \ ++ ../stamp-gnatlib1-$(RTSDIR) ++@@ -835,6 +856,7 @@ gnatlib-sjlj: ++ $(RTSDIR)/system.ads > $(RTSDIR)/s.ads ++ $(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads ++ $(MAKE) $(FLAGS_TO_PASS) \ +++ RTSDIR="$(RTSDIR)" \ ++ EH_MECHANISM="" \ ++ GNATLIBFLAGS="$(GNATLIBFLAGS)" \ ++ GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ ++@@ -889,6 +911,8 @@ b_gnatm.o : b_gnatm.adb ++ ++ ADA_INCLUDE_DIR = $(libsubdir)/adainclude ++ ADA_RTL_OBJ_DIR = $(libsubdir)/adalib +++ADA_INCLUDE_DIR_SJLJ = $(libsubdir)/rts-sjlj/adainclude +++ADA_RTL_OBJ_DIR_SJLJ = $(libsubdir)/rts-sjlj/adalib ++ ++ # Special flags ++ ++--- a/src/gcc/ada/gcc-interface/config-lang.in +++++ b/src/gcc/ada/gcc-interface/config-lang.in ++@@ -43,8 +43,8 @@ if test "x$cross_compiling/$build/$host" ++ lang_requires="c c++" ++ fi ++ ++-target_libs="target-libada target-libgnat_util" ++-lang_dirs="libada gnattools" +++target_libs="target-libada target-libgnat_util target-libada-sjlj" +++lang_dirs="libada gnattools libada-sjlj" ++ ++ # Ada is not enabled by default for the time being. ++ build_by_default=no ++--- a/src/gcc/ada/gcc-interface/Make-lang.in +++++ b/src/gcc/ada/gcc-interface/Make-lang.in ++@@ -837,6 +837,7 @@ ada.install-common: ++ ++ install-gnatlib: ++ $(MAKE) -C ada $(COMMON_FLAGS_TO_PASS) $(ADA_FLAGS_TO_PASS) install-gnatlib$(LIBGNAT_TARGET) +++ $(MAKE) -C ada $(COMMON_FLAGS_TO_PASS) $(ADA_FLAGS_TO_PASS) RTSDIR="rts-sjlj" install-gnatlib-sjlj$(LIBGNAT_TARGET) ++ ++ install-gnatlib-obj: ++ $(MAKE) -C ada $(COMMON_FLAGS_TO_PASS) $(ADA_FLAGS_TO_PASS) install-gnatlib-obj diff --cc debian/patches/ada-verbose.diff index 0000000,0000000..e3e4c57 new file mode 100644 --- /dev/null +++ b/debian/patches/ada-verbose.diff @@@ -1,0 -1,0 +1,36 @@@ ++Description: Display subprocess command lines when building Ada. ++ The log can be a page longer if it helps debugging. ++Forwarded: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87778 ++Author: Nicolas Boulenguez ++ ++--- a/src/gcc/ada/Make-generated.in +++++ b/src/gcc/ada/Make-generated.in ++@@ -18,7 +18,7 @@ GEN_IL_FLAGS = -gnata -gnat2012 -gnatw.g ++ ada/seinfo_tables.ads ada/seinfo_tables.adb ada/sinfo.h ada/einfo.h ada/nmake.ads ada/nmake.adb ada/seinfo.ads ada/sinfo-nodes.ads ada/sinfo-nodes.adb ada/einfo-entities.ads ada/einfo-entities.adb: ada/stamp-gen_il ; @true ++ ada/stamp-gen_il: $(fsrcdir)/ada/gen_il* ++ $(MKDIR) ada/gen_il ++- cd ada/gen_il; gnatmake -q -g $(GEN_IL_FLAGS) gen_il-main +++ cd ada/gen_il; gnatmake -v -g $(GEN_IL_FLAGS) gen_il-main ++ # Ignore errors to work around finalization issues in older compilers ++ - cd ada/gen_il; ./gen_il-main ++ $(fsrcdir)/../move-if-change ada/gen_il/seinfo_tables.ads ada/seinfo_tables.ads ++@@ -46,7 +46,7 @@ ada/stamp-snames : ada/snames.ads-tmpl a ++ -$(MKDIR) ada/bldtools/snamest ++ $(RM) $(addprefix ada/bldtools/snamest/,$(notdir $^)) ++ $(CP) $^ ada/bldtools/snamest ++- cd ada/bldtools/snamest; gnatmake -q xsnamest ; ./xsnamest +++ cd ada/bldtools/snamest; gnatmake -v xsnamest ; ./xsnamest ++ $(fsrcdir)/../move-if-change ada/bldtools/snamest/snames.ns ada/snames.ads ++ $(fsrcdir)/../move-if-change ada/bldtools/snamest/snames.nb ada/snames.adb ++ $(fsrcdir)/../move-if-change ada/bldtools/snamest/snames.nh ada/snames.h ++--- a/src/gcc/ada/gcc-interface/Makefile.in +++++ b/src/gcc/ada/gcc-interface/Makefile.in ++@@ -616,7 +616,7 @@ OSCONS_EXTRACT=$(OSCONS_CC) $(GNATLIBCFL ++ -$(MKDIR) ./bldtools/oscons ++ $(RM) $(addprefix ./bldtools/oscons/,$(notdir $^)) ++ $(CP) $^ ./bldtools/oscons ++- (cd ./bldtools/oscons ; gnatmake -q xoscons) +++ cd ./bldtools/oscons && gnatmake -v xoscons ++ ++ $(RTSDIR)/s-oscons.ads: ../stamp-gnatlib1-$(RTSDIR) s-oscons-tmplt.c gsocket.h ./bldtools/oscons/xoscons ++ $(RM) $(RTSDIR)/s-oscons-tmplt.i $(RTSDIR)/s-oscons-tmplt.s diff --cc debian/patches/alpha-ieee-doc.diff index 0000000,0000000..0564158 new file mode 100644 --- /dev/null +++ b/debian/patches/alpha-ieee-doc.diff @@@ -1,0 -1,0 +1,24 @@@ ++# DP: #212912 ++# DP: on alpha-linux, make -mieee default and add -mieee-disable switch ++# DP: to turn default off (doc patch) ++ ++--- ++ gcc/doc/invoke.texi | 7 +++++++ ++ 1 files changed, 7 insertions(+), 0 deletions(-) ++ ++--- a/src/gcc/doc/invoke.texi +++++ b/src/gcc/doc/invoke.texi ++@@ -9980,6 +9980,13 @@ able to correctly support denormalized numbers and exceptional IEEE ++ values such as not-a-number and plus/minus infinity. Other Alpha ++ compilers call this option @option{-ieee_with_no_inexact}. ++ +++DEBIAN SPECIFIC: This option is on by default for alpha-linux-gnu, unless +++@option{-ffinite-math-only} (which is part of the @option{-ffast-math} +++set) is specified, because the software functions in the GNU libc math +++libraries generate denormalized numbers, NaNs, and infs (all of which +++will cause a programs to SIGFPE when it attempts to use the results without +++@option{-mieee}). +++ ++ @item -mieee-with-inexact ++ @opindex mieee-with-inexact ++ This is like @option{-mieee} except the generated code also maintains diff --cc debian/patches/alpha-ieee.diff index 0000000,0000000..f80ffa3 new file mode 100644 --- /dev/null +++ b/debian/patches/alpha-ieee.diff @@@ -1,0 -1,0 +1,17 @@@ ++# DP: #212912 ++# DP: on alpha-linux, make -mieee default and add -mieee-disable switch ++# DP: to turn default off ++ ++--- a/src/gcc/config/alpha/alpha.cc +++++ b/src/gcc/config/alpha/alpha.cc ++@@ -384,6 +384,10 @@ alpha_option_override (void) ++ int line_size = 0, l1_size = 0, l2_size = 0; ++ int i; ++ +++ /* If not -ffinite-math-only, enable -mieee*/ +++ if (!flag_finite_math_only) +++ target_flags |= MASK_IEEE|MASK_IEEE_CONFORMANT; +++ ++ #ifdef SUBTARGET_OVERRIDE_OPTIONS ++ SUBTARGET_OVERRIDE_OPTIONS; ++ #endif diff --cc debian/patches/alpha-no-ev4-directive.diff index 0000000,0000000..26b404b new file mode 100644 --- /dev/null +++ b/debian/patches/alpha-no-ev4-directive.diff @@@ -1,0 -1,0 +1,30 @@@ ++# DP: never emit .ev4 directive. ++ ++--- ++ gcc/config/alpha/alpha.c | 7 +++---- ++ 1 files changed, 3 insertions(+), 4 deletions(-) ++ ++--- a/src/gcc/config/alpha/alpha.cc +++++ b/src/gcc/config/alpha/alpha.cc ++@@ -9480,7 +9480,7 @@ alpha_file_start (void) ++ fputs ("\t.set nomacro\n", asm_out_file); ++ if (TARGET_SUPPORT_ARCH | TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) ++ { ++- const char *arch; +++ const char *arch = NULL; ++ ++ if (alpha_cpu == PROCESSOR_EV6 || TARGET_FIX || TARGET_CIX) ++ arch = "ev6"; ++@@ -9490,10 +9490,9 @@ alpha_file_start (void) ++ arch = "ev56"; ++ else if (alpha_cpu == PROCESSOR_EV5) ++ arch = "ev5"; ++- else ++- arch = "ev4"; ++ ++- fprintf (asm_out_file, "\t.arch %s\n", arch); +++ if (arch) +++ fprintf (asm_out_file, "\t.arch %s\n", arch); ++ } ++ } ++ diff --cc debian/patches/arc-stddef.diff index 0000000,0000000..2edf217 new file mode 100644 --- /dev/null +++ b/debian/patches/arc-stddef.diff @@@ -1,0 -1,0 +1,29 @@@ ++--- a/src/gcc/config/arc/arc-arch.h +++++ b/src/gcc/config/arc/arc-arch.h ++@@ -22,6 +22,8 @@ along with GCC; see the file COPYING3. If not see ++ #ifndef GCC_ARC_ARCH_H ++ #define GCC_ARC_ARCH_H ++ +++#include +++ ++ #ifndef IN_LIBGCC2 ++ /* Architecture selection types. */ ++ ++@@ -115,7 +117,7 @@ typedef struct ++ ++ } arc_cpu_t; ++ ++-const arc_arch_t arc_arch_types[] = +++static const arc_arch_t arc_arch_types[] = ++ { ++ {"none", BASE_ARCH_NONE, 0, 0}, ++ #define ARC_ARCH(NAME, ARCH, FLAGS, DFLAGS) \ ++@@ -125,7 +127,7 @@ const arc_arch_t arc_arch_types[] = ++ {NULL, BASE_ARCH_END, 0, 0} ++ }; ++ ++-const arc_cpu_t arc_cpu_types[] = +++static const arc_cpu_t arc_cpu_types[] = ++ { ++ {"none", NULL, PROCESSOR_NONE, 0, HAS_NONE, ARC_TUNE_NONE}, ++ #define ARC_CPU(NAME, ARCH, FLAGS, EXTRA, TUNE) \ diff --cc debian/patches/arm-multilib-defaults.diff index 0000000,0000000..88b0279 new file mode 100644 --- /dev/null +++ b/debian/patches/arm-multilib-defaults.diff @@@ -1,0 -1,0 +1,88 @@@ ++# DP: Set MULTILIB_DEFAULTS for ARM multilib builds ++ ++--- a/src/gcc/config.gcc +++++ b/src/gcc/config.gcc ++@@ -4342,10 +4342,18 @@ case "${target}" in ++ done ++ ++ case "$with_float" in ++- "" \ ++- | soft | hard | softfp) +++ "") ++ # OK ++ ;; +++ soft) +++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=0" +++ ;; +++ softfp) +++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=1" +++ ;; +++ hard) +++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=2" +++ ;; ++ *) ++ echo "Unknown floating point type used in --with-float=$with_float" 1>&2 ++ exit 1 ++@@ -4380,6 +4388,9 @@ case "${target}" in ++ "" \ ++ | arm | thumb ) ++ #OK +++ if test "$with_mode" = thumb; then +++ tm_defines="${tm_defines} TARGET_CONFIGURED_THUMB_MODE=1" +++ fi ++ ;; ++ *) ++ echo "Unknown mode used in --with-mode=$with_mode" ++--- a/src/gcc/config/arm/linux-eabi.h +++++ b/src/gcc/config/arm/linux-eabi.h ++@@ -37,7 +37,21 @@ ++ target hardware. If you override this to use the hard-float ABI then ++ change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well. */ ++ #undef TARGET_DEFAULT_FLOAT_ABI +++#ifdef TARGET_CONFIGURED_FLOAT_ABI +++#if TARGET_CONFIGURED_FLOAT_ABI == 2 +++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD +++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=hard" +++#elif TARGET_CONFIGURED_FLOAT_ABI == 1 +++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFTFP +++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=softfp" +++#else +++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT +++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft" +++#endif +++#else ++ #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT +++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft" +++#endif ++ ++ /* We default to the "aapcs-linux" ABI so that enums are int-sized by ++ default. */ ++@@ -91,6 +105,28 @@ ++ #define MUSL_DYNAMIC_LINKER \ ++ "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1" ++ +++/* Set the multilib defaults according the configuration, needed to +++ let gcc -print-multi-dir do the right thing. */ +++ +++#if TARGET_BIG_ENDIAN_DEFAULT +++#define MULTILIB_DEFAULT_ENDIAN "mbig-endian" +++#else +++#define MULTILIB_DEFAULT_ENDIAN "mlittle-endian" +++#endif +++ +++#ifndef TARGET_CONFIGURED_THUMB_MODE +++#define MULTILIB_DEFAULT_MODE "marm" +++#elif TARGET_CONFIGURED_THUMB_MODE == 1 +++#define MULTILIB_DEFAULT_MODE "mthumb" +++#else +++#define MULTILIB_DEFAULT_MODE "marm" +++#endif +++ +++#undef MULTILIB_DEFAULTS +++#define MULTILIB_DEFAULTS \ +++ { MULTILIB_DEFAULT_MODE, MULTILIB_DEFAULT_ENDIAN, \ +++ MULTILIB_DEFAULT_FLOAT_ABI, "mno-thumb-interwork" } +++ ++ /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to ++ use the GNU/Linux version, not the generic BPABI version. */ ++ #undef LINK_SPEC diff --cc debian/patches/arm-multilib-soft-cross.diff index 0000000,0000000..00a83d3 new file mode 100644 --- /dev/null +++ b/debian/patches/arm-multilib-soft-cross.diff @@@ -1,0 -1,0 +1,27 @@@ ++# DP: ARM hard/soft float multilib support ++ ++Index: b/src/gcc/config/arm/t-linux-eabi ++=================================================================== ++--- a/src/gcc/config/arm/t-linux-eabi +++++ b/src/gcc/config/arm/t-linux-eabi ++@@ -27,6 +27,20 @@ MULTILIB_REUSE = ++ MULTILIB_MATCHES = ++ MULTILIB_REQUIRED = ++ +++ifeq ($(with_float),hard) +++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard +++MULTILIB_DIRNAMES = sf hf +++MULTILIB_EXCEPTIONS = +++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp +++MULTILIB_OSDIRNAMES = ../libsf:arm-linux-gnueabi ../lib:arm-linux-gnueabihf +++else +++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard +++MULTILIB_DIRNAMES = sf hf +++MULTILIB_EXCEPTIONS = +++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp +++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi ../libhf:arm-linux-gnueabihf +++endif +++ ++ #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te ++ #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te ++ #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* diff --cc debian/patches/arm-multilib-soft-float.diff index 0000000,0000000..18f51fb new file mode 100644 --- /dev/null +++ b/debian/patches/arm-multilib-soft-float.diff @@@ -1,0 -1,0 +1,26 @@@ ++--- a/src/gcc/config/arm/t-linux-eabi +++++ b/src/gcc/config/arm/t-linux-eabi ++@@ -24,6 +24,23 @@ ++ MULTILIB_OPTIONS = ++ MULTILIB_DIRNAMES = ++ +++ifneq (,$(findstring MULTIARCH_DEFAULTS,$(tm_defines))) +++ifneq (,$(findstring __arm_linux_gnueabi__,$(tm_defines))) +++ MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard/mfloat-abi=soft +++ MULTILIB_DIRNAMES = . hf soft-float +++ MULTILIB_EXCEPTIONS = +++ MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float +++ MULTILIB_OSDIRNAMES = ../../lib/arm-linux-gnueabi ../../lib/arm-linux-gnueabihf soft-float +++endif +++ifneq (,$(findstring __arm_linux_gnueabihf__,$(tm_defines))) +++ MULTILIB_OPTIONS = mfloat-abi=hard/mfloat-abi=softfp/mfloat-abi=soft +++ MULTILIB_DIRNAMES = . sf soft-float +++ MULTILIB_EXCEPTIONS = +++ MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float +++ MULTILIB_OSDIRNAMES = ../../lib/arm-linux-gnueabihf ../../lib/arm-linux-gnueabi soft-float +++endif +++endif +++ ++ #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te ++ #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te ++ #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* diff --cc debian/patches/arm-multilib-soft.diff index 0000000,0000000..0d45338 new file mode 100644 --- /dev/null +++ b/debian/patches/arm-multilib-soft.diff @@@ -1,0 -1,0 +1,25 @@@ ++# DP: ARM hard/soft float multilib support ++ ++--- a/src/gcc/config/arm/t-linux-eabi +++++ b/src/gcc/config/arm/t-linux-eabi ++@@ -27,6 +27,20 @@ MULTILIB_REUSE = ++ MULTILIB_MATCHES = ++ MULTILIB_REQUIRED = ++ +++ifeq ($(with_float),hard) +++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard +++MULTILIB_DIRNAMES = sf hf +++MULTILIB_EXCEPTIONS = +++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp +++MULTILIB_OSDIRNAMES = arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf +++else +++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard +++MULTILIB_DIRNAMES = sf hf +++MULTILIB_EXCEPTIONS = +++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp +++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf +++endif +++ ++ #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te ++ #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te ++ #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* diff --cc debian/patches/arm-multilib-softfp-cross.diff index 0000000,0000000..89ed142 new file mode 100644 --- /dev/null +++ b/debian/patches/arm-multilib-softfp-cross.diff @@@ -1,0 -1,0 +1,27 @@@ ++# DP: ARM hard/softfp float multilib support ++ ++Index: b/src/gcc/config/arm/t-linux-eabi ++=================================================================== ++--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 +++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 ++@@ -24,6 +24,20 @@ ++ MULTILIB_OPTIONS = ++ MULTILIB_DIRNAMES = ++ +++ifeq ($(with_float),hard) +++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard +++MULTILIB_DIRNAMES = sf hf +++MULTILIB_EXCEPTIONS = +++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft +++MULTILIB_OSDIRNAMES = ../libsf:arm-linux-gnueabi ../lib:arm-linux-gnueabihf +++else +++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard +++MULTILIB_DIRNAMES = sf hf +++MULTILIB_EXCEPTIONS = +++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft +++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi ../libhf:arm-linux-gnueabihf +++endif +++ ++ #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te ++ #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te ++ #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* diff --cc debian/patches/arm-multilib-softfp.diff index 0000000,0000000..f4268da new file mode 100644 --- /dev/null +++ b/debian/patches/arm-multilib-softfp.diff @@@ -1,0 -1,0 +1,27 @@@ ++# DP: ARM hard/softfp float multilib support ++ ++Index: b/src/gcc/config/arm/t-linux-eabi ++=================================================================== ++--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 +++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 ++@@ -24,6 +24,20 @@ ++ MULTILIB_OPTIONS = ++ MULTILIB_DIRNAMES = ++ +++ifeq ($(with_float),hard) +++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard +++MULTILIB_DIRNAMES = sf hf +++MULTILIB_EXCEPTIONS = +++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft +++MULTILIB_OSDIRNAMES = arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf +++else +++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard +++MULTILIB_DIRNAMES = sf hf +++MULTILIB_EXCEPTIONS = +++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft +++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf +++endif +++ ++ #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te ++ #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te ++ #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* diff --cc debian/patches/bootstrap-no-unneeded-libs.diff index 0000000,0000000..4939110 new file mode 100644 --- /dev/null +++ b/debian/patches/bootstrap-no-unneeded-libs.diff @@@ -1,0 -1,0 +1,30 @@@ ++# DP: For bootstrap builds, don't build unneeded libstdc++ things ++# DP: (debug library, PCH headers). ++ ++# Please read ada-changes-in-autogen-output.diff about src/Makefile.[def|tpl]. ++ ++--- a/src/Makefile.tpl +++++ b/src/Makefile.tpl ++@@ -1060,7 +1060,9 @@ ++ --target=[+target_alias+] $${srcdiroption} [+ IF prev +]\ ++ --with-build-libsubdir=$(HOST_SUBDIR) [+ ENDIF prev +]\ ++ $(STAGE[+id+]_CONFIGURE_FLAGS)[+ IF extra_configure_flags +] \ ++- [+extra_configure_flags+][+ ENDIF extra_configure_flags +] +++ [+extra_configure_flags+][+ ENDIF extra_configure_flags +] \ +++ [+ IF bootstrap_configure_flags +][+bootstrap_configure_flags+] \ +++ [+ ENDIF bootstrap_configure_flags +] ++ @endif [+prefix+][+module+]-bootstrap ++ [+ ENDFOR bootstrap_stage +] ++ [+ ENDIF bootstrap +] ++--- a/src/Makefile.def +++++ b/src/Makefile.def ++@@ -117,7 +117,8 @@ ++ target_modules = { module= libstdc++-v3; ++ bootstrap=true; ++ lib_path=src/.libs; ++- raw_cxx=true; }; +++ raw_cxx=true; +++ bootstrap_configure_flags='--disable-libstdcxx-debug --disable-libstdcxx-pch'; }; ++ target_modules = { module= libmudflap; lib_path=.libs; }; ++ target_modules = { module= libsanitizer; lib_path=.libs; }; ++ target_modules = { module= libssp; lib_path=.libs; }; diff --cc debian/patches/canonical-cpppath.diff index 0000000,0000000..39969b7 new file mode 100644 --- /dev/null +++ b/debian/patches/canonical-cpppath.diff @@@ -1,0 -1,0 +1,34 @@@ ++# DP: Don't use any relative path names for the standard include paths. ++ ++--- a/src/gcc/incpath.cc +++++ b/src/gcc/incpath.cc ++@@ -177,6 +177,14 @@ add_standard_paths (const char *sysroot, ++ str = reconcat (str, str, dir_separator_str, ++ imultiarch, NULL); ++ } +++ { +++ char *rp = lrealpath (str); +++ if (rp) +++ { +++ free (str); +++ str = rp; +++ } +++ } ++ add_path (str, INC_SYSTEM, p->cxx_aware, false); ++ } ++ } ++@@ -252,6 +260,14 @@ add_standard_paths (const char *sysroot, ++ else ++ str = reconcat (str, str, dir_separator_str, imultiarch, NULL); ++ } +++ { +++ char *rp = lrealpath (str); +++ if (rp) +++ { +++ free (str); +++ str = rp; +++ } +++ } ++ ++ add_path (str, INC_SYSTEM, p->cxx_aware, false); ++ } diff --cc debian/patches/config-ml.diff index 0000000,0000000..6e4e870 new file mode 100644 --- /dev/null +++ b/debian/patches/config-ml.diff @@@ -1,0 -1,0 +1,52 @@@ ++# DP: - Disable some biarch libraries for biarch builds. ++# DP: - Fix multilib builds on kernels which don't support all multilibs. ++ ++--- a/src/config-ml.in +++++ b/src/config-ml.in ++@@ -488,6 +488,25 @@ powerpc*-*-* | rs6000*-*-*) ++ ;; ++ esac ++ +++if [ -z "$biarch_multidir_names" ]; then +++ biarch_multidir_names="libiberty libstdc++-v3 libgfortran libmudflap libssp libffi libobjc libgomp" +++ echo "WARNING: biarch_multidir_names is unset. Use default value:" +++ echo " $biarch_multidir_names" +++fi +++ml_srcbase=`basename $ml_realsrcdir` +++old_multidirs="${multidirs}" +++multidirs="" +++for x in ${old_multidirs}; do +++ case " $x " in +++ " 32 "|" n32 "|" x32 "|" 64 "|" hf "|" sf "|" m4-nofpu ") +++ case "$biarch_multidir_names" in +++ *"$ml_srcbase"*) multidirs="${multidirs} ${x}" ;; +++ esac +++ ;; +++ *) multidirs="${multidirs} ${x}" ;; +++ esac +++done +++ ++ # Remove extraneous blanks from multidirs. ++ # Tests like `if [ -n "$multidirs" ]' require it. ++ multidirs=`echo "$multidirs" | sed -e 's/^[ ][ ]*//' -e 's/[ ][ ]*$//' -e 's/[ ][ ]*/ /g'` ++@@ -886,9 +905,19 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n ++ fi ++ fi ++ +++ ml_configure_args= +++ for arg in ${ac_configure_args} +++ do +++ case $arg in +++ *CC=*) ml_configure_args=${ml_config_env} ;; +++ *CXX=*) ml_configure_args=${ml_config_env} ;; +++ *) ;; +++ esac +++ done +++ ++ if eval ${ml_config_env} ${ml_config_shell} ${ml_recprog} \ ++ --with-multisubdir=${ml_dir} --with-multisrctop=${multisrctop} \ ++- "${ac_configure_args}" ${ml_config_env} ${ml_srcdiroption} ; then +++ "${ac_configure_args}" ${ml_configure_args} ${ml_config_env} ${ml_srcdiroption} ; then ++ true ++ else ++ exit 1 diff --cc debian/patches/cross-biarch.diff index 0000000,0000000..a62d4d7 new file mode 100644 --- /dev/null +++ b/debian/patches/cross-biarch.diff @@@ -1,0 -1,0 +1,89 @@@ ++# DP: Fix the location of target's libs in cross-build for biarch ++ ++--- a/src/config-ml.in +++++ b/src/config-ml.in ++@@ -533,7 +533,13 @@ multi-do: ++ else \ ++ if [ -d ../$${dir}/$${lib} ]; then \ ++ flags=`echo $$i | sed -e 's/^[^;]*;//' -e 's/@/ -/g'`; \ ++- if (cd ../$${dir}/$${lib}; $(MAKE) $(FLAGS_TO_PASS) \ +++ libsuffix_="$${dir}"; \ +++ if [ "$${dir}" = "n32" ]; then libsuffix_=32; fi; \ +++ if [ -n "$$($${compiler} -v 2>&1 |grep '^Target: mips')" ] && [ "$${dir}" = "32" ]; then libsuffix_=o32; fi; \ +++ if (cd ../$${dir}/$${lib}; $(MAKE) $(subst \ +++ -B$(build_tooldir)/lib/, \ +++ -B$(build_tooldir)/lib$${libsuffix_}/, \ +++ $(FLAGS_TO_PASS)) \ ++ CFLAGS="$(CFLAGS) $${flags}" \ ++ CCASFLAGS="$(CCASFLAGS) $${flags}" \ ++ FCFLAGS="$(FCFLAGS) $${flags}" \ ++@@ -786,6 +792,15 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n ++ GOC_=$GOC' ' ++ GDC_=$GDC' ' ++ else +++ if [ "${ml_dir}" = "." ]; then +++ FILTER_="s!X\\(.*\\)!\\1!p" +++ elif [ "${ml_dir}" = "n32" ]; then # mips n32 -> lib32 +++ FILTER_="s!X\\(.*\\)/!\\132/!p" +++ elif [ "${ml_dir}" = "32" ] && [ "$(echo ${host} |grep '^mips')" ]; then # mips o32 -> libo32 +++ FILTER_="s!X\\(.*\\)/!\\1o32/!p" +++ else +++ FILTER_="s!X\\(.*\\)/!\\1${ml_dir}/!p" +++ fi ++ # Create a regular expression that matches any string as long ++ # as ML_POPDIR. ++ popdir_rx=`echo "${ML_POPDIR}" | sed 's,.,.,g'` ++@@ -794,6 +809,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n ++ case $arg in ++ -[BIL]"${ML_POPDIR}"/*) ++ CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\1/p"`' ' ;; +++ -B*/lib/) +++ CC_="${CC_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; ++ "${ML_POPDIR}"/*) ++ CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ *) ++@@ -806,6 +823,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n ++ case $arg in ++ -[BIL]"${ML_POPDIR}"/*) ++ CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; +++ -B*/lib/) +++ CXX_="${CXX_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; ++ "${ML_POPDIR}"/*) ++ CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ *) ++@@ -818,6 +837,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n ++ case $arg in ++ -[BIL]"${ML_POPDIR}"/*) ++ F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; +++ -B*/lib/) +++ F77_="${F77_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; ++ "${ML_POPDIR}"/*) ++ F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ *) ++@@ -830,6 +851,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n ++ case $arg in ++ -[BIL]"${ML_POPDIR}"/*) ++ GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; +++ -B*/lib/) +++ GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; ++ "${ML_POPDIR}"/*) ++ GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ *) ++@@ -842,6 +865,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n ++ case $arg in ++ -[BIL]"${ML_POPDIR}"/*) ++ GOC_="${GOC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; +++ -B*/lib/) +++ GOC_="${GOC_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; ++ "${ML_POPDIR}"/*) ++ GOC_="${GOC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ *) ++@@ -854,6 +879,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n ++ case $arg in ++ -[BIL]"${ML_POPDIR}"/*) ++ GDC_="${GDC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; +++ -B*/lib/) +++ GDC_="${GDC_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; ++ "${ML_POPDIR}"/*) ++ GDC_="${GDC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ *) diff --cc debian/patches/cross-fixes.diff index 0000000,0000000..8844eaa new file mode 100644 --- /dev/null +++ b/debian/patches/cross-fixes.diff @@@ -1,0 -1,0 +1,57 @@@ ++# DP: Fix the linker error when creating an xcc for ia64 ++ ++--- ++ gcc/config/ia64/fde-glibc.c | 3 +++ ++ gcc/config/ia64/unwind-ia64.c | 3 ++- ++ gcc/unwind-compat.c | 2 ++ ++ gcc/unwind-generic.h | 2 ++ ++ 6 files changed, 14 insertions(+), 1 deletions(-) ++ ++--- a/src/libgcc/config/ia64/unwind-ia64.c +++++ b/src/libgcc/config/ia64/unwind-ia64.c ++@@ -26,6 +26,7 @@ ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ . */ ++ +++#ifndef inhibit_libc ++ #include "tconfig.h" ++ #include "tsystem.h" ++ #include "coretypes.h" ++@@ -2467,3 +2468,4 @@ alias (_Unwind_SetIP); ++ #endif ++ ++ #endif +++#endif ++--- a/src/libgcc/unwind-compat.c +++++ b/src/libgcc/unwind-compat.c ++@@ -23,6 +23,7 @@ ++ . */ ++ ++ #if defined (USE_GAS_SYMVER) && defined (USE_LIBUNWIND_EXCEPTIONS) +++#ifndef inhibit_libc ++ #include "tconfig.h" ++ #include "tsystem.h" ++ #include "unwind.h" ++@@ -207,3 +208,4 @@ _Unwind_SetIP (struct _Unwind_Context *c ++ } ++ symver (_Unwind_SetIP, GCC_3.0); ++ #endif +++#endif ++--- a/src/libgcc/unwind-generic.h +++++ b/src/libgcc/unwind-generic.h ++@@ -221,6 +221,7 @@ _Unwind_SjLj_Resume_or_Rethrow (struct _ ++ compatible with the standard ABI for IA-64, we inline these. */ ++ ++ #ifdef __ia64__ +++#ifndef inhibit_libc ++ static inline _Unwind_Ptr ++ _Unwind_GetDataRelBase (struct _Unwind_Context *_C) ++ { ++@@ -237,6 +238,7 @@ _Unwind_GetTextRelBase (struct _Unwind_C ++ ++ /* @@@ Retrieve the Backing Store Pointer of the given context. */ ++ extern _Unwind_Word _Unwind_GetBSP (struct _Unwind_Context *); +++#endif /* inhibit_libc */ ++ #else ++ extern _Unwind_Ptr _Unwind_GetDataRelBase (struct _Unwind_Context *); ++ extern _Unwind_Ptr _Unwind_GetTextRelBase (struct _Unwind_Context *); diff --cc debian/patches/cross-install-location-gm2.diff index 0000000,0000000..e727707 new file mode 100644 --- /dev/null +++ b/debian/patches/cross-install-location-gm2.diff @@@ -1,0 -1,0 +1,110 @@@ ++--- a/src/libgm2/libm2cor/Makefile.am +++++ b/src/libgm2/libm2cor/Makefile.am ++@@ -27,7 +27,7 @@ MAKEOVERRIDES= ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ # Used to install the shared libgcc. ++ slibdir = @slibdir@ ++ ++--- a/src/libgm2/libm2cor/Makefile.in +++++ b/src/libgm2/libm2cor/Makefile.in ++@@ -369,7 +369,7 @@ MAKEOVERRIDES = ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ MULTIDIR := $(shell $(CC) $(CFLAGS) -print-multi-directory) ++ MULTIOSDIR := $(shell $(CC) $(CFLAGS) -print-multi-os-directory) ++ MULTIOSSUBDIR := $(shell if test x$(MULTIOSDIR) != x.; then echo /$(MULTIOSDIR); fi) ++--- a/src/libgm2/libm2iso/Makefile.am +++++ b/src/libgm2/libm2iso/Makefile.am ++@@ -27,7 +27,7 @@ MAKEOVERRIDES= ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ # Used to install the shared libgcc. ++ slibdir = @slibdir@ ++ ++--- a/src/libgm2/libm2iso/Makefile.in +++++ b/src/libgm2/libm2iso/Makefile.in ++@@ -386,7 +386,7 @@ MAKEOVERRIDES = ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ MULTIDIR := $(shell $(CC) $(CFLAGS) -print-multi-directory) ++ MULTIOSDIR := $(shell $(CC) $(CFLAGS) -print-multi-os-directory) ++ MULTIOSSUBDIR := $(shell if test x$(MULTIOSDIR) != x.; then echo /$(MULTIOSDIR); fi) ++--- a/src/libgm2/libm2log/Makefile.am +++++ b/src/libgm2/libm2log/Makefile.am ++@@ -27,7 +27,7 @@ MAKEOVERRIDES= ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ # Used to install the shared libgcc. ++ slibdir = @slibdir@ ++ ++--- a/src/libgm2/libm2log/Makefile.in +++++ b/src/libgm2/libm2log/Makefile.in ++@@ -374,7 +374,7 @@ MAKEOVERRIDES = ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ MULTIDIR := $(shell $(CC) $(CFLAGS) -print-multi-directory) ++ MULTIOSDIR := $(shell $(CC) $(CFLAGS) -print-multi-os-directory) ++ MULTIOSSUBDIR := $(shell if test x$(MULTIOSDIR) != x.; then echo /$(MULTIOSDIR); fi) ++--- a/src/libgm2/libm2min/Makefile.am +++++ b/src/libgm2/libm2min/Makefile.am ++@@ -27,7 +27,7 @@ MAKEOVERRIDES= ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ # Used to install the shared libgcc. ++ slibdir = @slibdir@ ++ ++--- a/src/libgm2/libm2min/Makefile.in +++++ b/src/libgm2/libm2min/Makefile.in ++@@ -372,7 +372,7 @@ MAKEOVERRIDES = ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ MULTIDIR := $(shell $(CC) $(CFLAGS) -print-multi-directory) ++ MULTIOSDIR := $(shell $(CC) $(CFLAGS) -print-multi-os-directory) ++ MULTIOSSUBDIR := $(shell if test x$(MULTIOSDIR) != x.; then echo /$(MULTIOSDIR); fi) ++--- a/src/libgm2/libm2pim/Makefile.am +++++ b/src/libgm2/libm2pim/Makefile.am ++@@ -27,7 +27,7 @@ MAKEOVERRIDES= ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ # Used to install the shared libgcc. ++ slibdir = @slibdir@ ++ ++--- a/src/libgm2/libm2pim/Makefile.in +++++ b/src/libgm2/libm2pim/Makefile.in ++@@ -382,7 +382,7 @@ MAKEOVERRIDES = ++ version := $(shell $(CC) -dumpversion) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_alias)/$(version) +++libsubdir = $(libdir)/gcc-cross/$(target_alias)/$(version) ++ MULTIDIR := $(shell $(CC) $(CFLAGS) -print-multi-directory) ++ MULTIOSDIR := $(shell $(CC) $(CFLAGS) -print-multi-os-directory) ++ MULTIOSSUBDIR := $(shell if test x$(MULTIOSDIR) != x.; then echo /$(MULTIOSDIR); fi) diff --cc debian/patches/cross-install-location.diff index 0000000,0000000..9d1ce5d new file mode 100644 --- /dev/null +++ b/debian/patches/cross-install-location.diff @@@ -1,0 -1,0 +1,387 @@@ ++--- a/src/fixincludes/Makefile.in +++++ b/src/fixincludes/Makefile.in ++@@ -52,9 +52,9 @@ target_noncanonical:=@target_noncanonica ++ gcc_version := $(shell @get_gcc_base_ver@ $(srcdir)/../gcc/BASE-VER) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) +++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) ++ # Directory in which the compiler finds executables ++-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) +++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) ++ # Where our executable files go ++ itoolsdir = $(libexecsubdir)/install-tools ++ # Where our data files go ++--- a/src/libgfortran/Makefile.in +++++ b/src/libgfortran/Makefile.in ++@@ -724,7 +724,7 @@ gcc_version := $(shell @get_gcc_base_ver ++ @LIBGFOR_USE_SYMVER_GNU_TRUE@@LIBGFOR_USE_SYMVER_TRUE@version_dep = $(srcdir)/gfortran.map ++ @LIBGFOR_USE_SYMVER_SUN_TRUE@@LIBGFOR_USE_SYMVER_TRUE@version_dep = gfortran.map-sun ++ gfor_c_HEADERS = ISO_Fortran_binding.h ++-gfor_cdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++gfor_cdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ LTLDFLAGS = $(shell $(SHELL) $(top_srcdir)/../libtool-ldflags $(LDFLAGS)) \ ++ $(lt_host_flags) ++ ++@@ -739,12 +739,12 @@ libgfortran_la_LDFLAGS = -version-info ` ++ ++ libgfortran_la_DEPENDENCIES = $(version_dep) libgfortran.spec $(LIBQUADLIB_DEP) ++ cafexeclib_LTLIBRARIES = libcaf_single.la ++-cafexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) +++cafexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++ libcaf_single_la_SOURCES = caf/single.c ++ libcaf_single_la_LDFLAGS = -static ++ libcaf_single_la_DEPENDENCIES = caf/libcaf.h ++ libcaf_single_la_LINK = $(LINK) $(libcaf_single_la_LDFLAGS) ++-@IEEE_SUPPORT_TRUE@fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude +++@IEEE_SUPPORT_TRUE@fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude ++ @IEEE_SUPPORT_TRUE@nodist_finclude_HEADERS = ieee_arithmetic.mod ieee_exceptions.mod ieee_features.mod ++ AM_CPPFLAGS = -iquote$(srcdir)/io -I$(srcdir)/$(MULTISRCTOP)../gcc \ ++ -I$(srcdir)/$(MULTISRCTOP)../gcc/config $(LIBQUADINCLUDE) \ ++--- a/src/libgfortran/Makefile.am +++++ b/src/libgfortran/Makefile.am ++@@ -31,7 +31,7 @@ version_dep = ++ endif ++ ++ gfor_c_HEADERS = ISO_Fortran_binding.h ++-gfor_cdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++gfor_cdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ ++ LTLDFLAGS = $(shell $(SHELL) $(top_srcdir)/../libtool-ldflags $(LDFLAGS)) \ ++ $(lt_host_flags) ++@@ -47,14 +47,14 @@ libgfortran_la_LDFLAGS = -version-info ` ++ libgfortran_la_DEPENDENCIES = $(version_dep) libgfortran.spec $(LIBQUADLIB_DEP) ++ ++ cafexeclib_LTLIBRARIES = libcaf_single.la ++-cafexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) +++cafexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++ libcaf_single_la_SOURCES = caf/single.c ++ libcaf_single_la_LDFLAGS = -static ++ libcaf_single_la_DEPENDENCIES = caf/libcaf.h ++ libcaf_single_la_LINK = $(LINK) $(libcaf_single_la_LDFLAGS) ++ ++ if IEEE_SUPPORT ++-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude +++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude ++ nodist_finclude_HEADERS = ieee_arithmetic.mod ieee_exceptions.mod ieee_features.mod ++ endif ++ ++--- a/src/lto-plugin/Makefile.in +++++ b/src/lto-plugin/Makefile.in ++@@ -341,7 +341,7 @@ with_libiberty = @with_libiberty@ ++ ACLOCAL_AMFLAGS = -I .. -I ../config ++ AUTOMAKE_OPTIONS = no-dependencies ++ gcc_version := $(shell @get_gcc_base_ver@ $(top_srcdir)/../gcc/BASE-VER) ++-libexecsubdir := $(libexecdir)/gcc/$(real_target_noncanonical)/$(gcc_version)$(accel_dir_suffix) +++libexecsubdir := $(libexecdir)/gcc-cross/$(real_target_noncanonical)/$(gcc_version)$(accel_dir_suffix) ++ AM_CPPFLAGS = -I$(top_srcdir)/../include $(DEFS) ++ AM_CFLAGS = @ac_lto_plugin_warn_cflags@ $(CET_HOST_FLAGS) ++ AM_LDFLAGS = @ac_lto_plugin_ldflags@ ++--- a/src/lto-plugin/Makefile.am +++++ b/src/lto-plugin/Makefile.am ++@@ -5,7 +5,7 @@ AUTOMAKE_OPTIONS = no-dependencies ++ ++ gcc_version := $(shell @get_gcc_base_ver@ $(top_srcdir)/../gcc/BASE-VER) ++ target_noncanonical := @target_noncanonical@ ++-libexecsubdir := $(libexecdir)/gcc/$(real_target_noncanonical)/$(gcc_version)$(accel_dir_suffix) +++libexecsubdir := $(libexecdir)/gcc-cross/$(real_target_noncanonical)/$(gcc_version)$(accel_dir_suffix) ++ ++ AM_CPPFLAGS = -I$(top_srcdir)/../include $(DEFS) ++ AM_CFLAGS = @ac_lto_plugin_warn_cflags@ $(CET_HOST_FLAGS) ++--- a/src/libitm/Makefile.in +++++ b/src/libitm/Makefile.in ++@@ -459,7 +459,7 @@ SUBDIRS = testsuite ++ gcc_version := $(shell @get_gcc_base_ver@ $(top_srcdir)/../gcc/BASE-VER) ++ abi_version = -fabi-version=4 ++ search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) ++-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ AM_CPPFLAGS = $(addprefix -I, $(search_path)) ++ AM_CFLAGS = $(XCFLAGS) ++ AM_CXXFLAGS = $(XCFLAGS) -std=gnu++0x -funwind-tables -fno-exceptions \ ++--- a/src/libitm/Makefile.am +++++ b/src/libitm/Makefile.am ++@@ -12,7 +12,7 @@ abi_version = -fabi-version=4 ++ config_path = @config_path@ ++ search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) ++ ++-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ ++ vpath % $(strip $(search_path)) ++ ++--- a/src/gcc/gcc.cc +++++ b/src/gcc/gcc.cc ++@@ -4873,7 +4873,7 @@ process_command (unsigned int decoded_op ++ GCC_EXEC_PREFIX is typically a directory name with a trailing ++ / (which is ignored by make_relative_prefix), so append a ++ program name. */ ++- char *tmp_prefix = concat (gcc_exec_prefix, "gcc", NULL); +++ char *tmp_prefix = concat (gcc_exec_prefix, "gcc-cross", NULL); ++ gcc_libexec_prefix = get_relative_prefix (tmp_prefix, ++ standard_exec_prefix, ++ standard_libexec_prefix); ++@@ -4899,15 +4899,15 @@ process_command (unsigned int decoded_op ++ { ++ int len = strlen (gcc_exec_prefix); ++ ++- if (len > (int) sizeof ("/lib/gcc/") - 1 +++ if (len > (int) sizeof ("/lib/gcc-cross/") - 1 ++ && (IS_DIR_SEPARATOR (gcc_exec_prefix[len-1]))) ++ { ++- temp = gcc_exec_prefix + len - sizeof ("/lib/gcc/") + 1; +++ temp = gcc_exec_prefix + len - sizeof ("/lib/gcc-cross/") + 1; ++ if (IS_DIR_SEPARATOR (*temp) ++ && filename_ncmp (temp + 1, "lib", 3) == 0 ++ && IS_DIR_SEPARATOR (temp[4]) ++- && filename_ncmp (temp + 5, "gcc", 3) == 0) ++- len -= sizeof ("/lib/gcc/") - 1; +++ && filename_ncmp (temp + 5, "gcc-cross", 3) == 0) +++ len -= sizeof ("/lib/gcc-cross/") - 1; ++ } ++ ++ set_std_prefix (gcc_exec_prefix, len); ++--- a/src/gcc/Makefile.in +++++ b/src/gcc/Makefile.in ++@@ -629,9 +629,9 @@ libexecdir = @libexecdir@ ++ # -------- ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(real_target_noncanonical)/$(version)$(accel_dir_suffix) +++libsubdir = $(libdir)/gcc-cross/$(real_target_noncanonical)/$(version)$(accel_dir_suffix) ++ # Directory in which the compiler finds executables ++-libexecsubdir = $(libexecdir)/gcc/$(real_target_noncanonical)/$(version)$(accel_dir_suffix) +++libexecsubdir = $(libexecdir)/gcc-cross/$(real_target_noncanonical)/$(version)$(accel_dir_suffix) ++ # Directory in which all plugin resources are installed ++ plugin_resourcesdir = $(libsubdir)/plugin ++ # Directory in which plugin headers are installed ++@@ -2278,8 +2278,8 @@ default-d.o: config/default-d.c ++ ++ DRIVER_DEFINES = \ ++ -DSTANDARD_STARTFILE_PREFIX=\"$(unlibsubdir)/\" \ ++- -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ ++- -DSTANDARD_LIBEXEC_PREFIX=\"$(libexecdir)/gcc/\" \ +++ -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc-cross/\" \ +++ -DSTANDARD_LIBEXEC_PREFIX=\"$(libexecdir)/gcc-cross/\" \ ++ -DDEFAULT_TARGET_VERSION=\"$(version)\" \ ++ -DDEFAULT_REAL_TARGET_MACHINE=\"$(real_target_noncanonical)\" \ ++ -DDEFAULT_TARGET_MACHINE=\"$(target_noncanonical)\" \ ++@@ -3006,7 +3006,7 @@ PREPROCESSOR_DEFINES = \ ++ -DTOOL_INCLUDE_DIR=\"$(gcc_tooldir)/include\" \ ++ -DNATIVE_SYSTEM_HEADER_DIR=\"$(NATIVE_SYSTEM_HEADER_DIR)\" \ ++ -DPREFIX=\"$(prefix)/\" \ ++- -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ +++ -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc-cross/\" \ ++ @TARGET_SYSTEM_ROOT_DEFINE@ ++ ++ CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) ++--- a/src/libssp/Makefile.in +++++ b/src/libssp/Makefile.in ++@@ -366,7 +366,7 @@ gcc_version := $(shell @get_gcc_base_ver ++ @LIBSSP_USE_SYMVER_SUN_TRUE@@LIBSSP_USE_SYMVER_TRUE@version_dep = ssp.map-sun ++ AM_CFLAGS = -Wall $(XCFLAGS) ++ toolexeclib_LTLIBRARIES = libssp.la libssp_nonshared.la ++-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include +++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include ++ nobase_libsubinclude_HEADERS = ssp/ssp.h ssp/string.h ssp/stdio.h ssp/unistd.h ++ libssp_la_SOURCES = \ ++ ssp.c gets-chk.c memcpy-chk.c memmove-chk.c mempcpy-chk.c \ ++--- a/src/libssp/Makefile.am +++++ b/src/libssp/Makefile.am ++@@ -39,7 +39,7 @@ AM_CFLAGS += $(XCFLAGS) ++ toolexeclib_LTLIBRARIES = libssp.la libssp_nonshared.la ++ ++ target_noncanonical = @target_noncanonical@ ++-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include +++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include ++ nobase_libsubinclude_HEADERS = ssp/ssp.h ssp/string.h ssp/stdio.h ssp/unistd.h ++ ++ libssp_la_SOURCES = \ ++--- a/src/libquadmath/Makefile.in +++++ b/src/libquadmath/Makefile.in ++@@ -468,7 +468,7 @@ AUTOMAKE_OPTIONS = foreign info-in-build ++ ++ @BUILD_LIBQUADMATH_TRUE@libquadmath_la_DEPENDENCIES = $(version_dep) $(libquadmath_la_LIBADD) ++ @BUILD_LIBQUADMATH_TRUE@nodist_libsubinclude_HEADERS = quadmath.h quadmath_weak.h ++-@BUILD_LIBQUADMATH_TRUE@libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++@BUILD_LIBQUADMATH_TRUE@libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ @BUILD_LIBQUADMATH_TRUE@libquadmath_la_SOURCES = \ ++ @BUILD_LIBQUADMATH_TRUE@ math/x2y2m1q.c math/acoshq.c math/fmodq.c \ ++ @BUILD_LIBQUADMATH_TRUE@ math/acosq.c math/frexpq.c \ ++--- a/src/libquadmath/Makefile.am +++++ b/src/libquadmath/Makefile.am ++@@ -41,7 +41,7 @@ libquadmath_la_LDFLAGS = -version-info ` ++ libquadmath_la_DEPENDENCIES = $(version_dep) $(libquadmath_la_LIBADD) ++ ++ nodist_libsubinclude_HEADERS = quadmath.h quadmath_weak.h ++-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ ++ libquadmath_la_SOURCES = \ ++ math/x2y2m1q.c math/acoshq.c math/fmodq.c \ ++--- a/src/libobjc/Makefile.in +++++ b/src/libobjc/Makefile.in ++@@ -48,7 +48,7 @@ extra_ldflags_libobjc = @extra_ldflags_l ++ top_builddir = . ++ ++ libdir = $(exec_prefix)/lib ++-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) +++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) ++ ++ # Multilib support variables. ++ MULTISRCTOP = ++--- a/src/libada/Makefile.in +++++ b/src/libada/Makefile.in ++@@ -70,7 +70,7 @@ GCC_DIR=$(MULTIBUILDTOP)../../$(host_sub ++ ++ target_noncanonical:=@target_noncanonical@ ++ version := $(shell @get_gcc_base_ver@ $(srcdir)/../gcc/BASE-VER) ++-libsubdir := $(libdir)/gcc/$(target_noncanonical)/$(version)$(MULTISUBDIR) +++libsubdir := $(libdir)/gcc-cross/$(target_noncanonical)/$(version)$(MULTISUBDIR) ++ ADA_RTS_DIR=$(GCC_DIR)/ada/rts$(subst /,_,$(MULTISUBDIR)) ++ ++ # exeext should not be used because it's the *host* exeext. We're building ++--- a/src/libgomp/Makefile.in +++++ b/src/libgomp/Makefile.in ++@@ -528,8 +528,8 @@ gcc_version := $(shell @get_gcc_base_ver ++ search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) \ ++ $(top_srcdir)/../include ++ ++-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude ++-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude +++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ AM_CPPFLAGS = $(addprefix -I, $(search_path)) ++ AM_CFLAGS = $(XCFLAGS) ++ AM_LDFLAGS = $(XLDFLAGS) $(SECTION_LDFLAGS) $(OPT_LDFLAGS) ++--- a/src/libgomp/Makefile.am +++++ b/src/libgomp/Makefile.am ++@@ -11,8 +11,8 @@ config_path = @config_path@ ++ search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) \ ++ $(top_srcdir)/../include ++ ++-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude ++-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude +++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ ++ vpath % $(strip $(search_path)) ++ ++--- a/src/libgcc/Makefile.in +++++ b/src/libgcc/Makefile.in ++@@ -200,7 +200,7 @@ STRIP = @STRIP@ ++ STRIP_FOR_TARGET = $(STRIP) ++ ++ # Directory in which the compiler finds libraries etc. ++-libsubdir = $(libdir)/gcc/$(real_host_noncanonical)/$(version)@accel_dir_suffix@ +++libsubdir = $(libdir)/gcc-cross/$(real_host_noncanonical)/$(version)@accel_dir_suffix@ ++ # Used to install the shared libgcc. ++ slibdir = @slibdir@ ++ # Maybe used for DLLs on Windows targets. ++--- a/src/libffi/include/Makefile.am +++++ b/src/libffi/include/Makefile.am ++@@ -8,6 +8,6 @@ EXTRA_DIST=ffi.h.in ++ ++ # Where generated headers like ffitarget.h get installed. ++ gcc_version := $(shell @get_gcc_base_ver@ $(top_srcdir)/../gcc/BASE-VER) ++-toollibffidir := $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++toollibffidir := $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ ++ toollibffi_HEADERS = ffi.h ffitarget.h ++--- a/src/libffi/include/Makefile.in +++++ b/src/libffi/include/Makefile.in ++@@ -322,7 +322,7 @@ EXTRA_DIST = ffi.h.in ++ ++ # Where generated headers like ffitarget.h get installed. ++ gcc_version := $(shell @get_gcc_base_ver@ $(top_srcdir)/../gcc/BASE-VER) ++-toollibffidir := $(libdir)/gcc/$(target_alias)/$(gcc_version)/include +++toollibffidir := $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include ++ toollibffi_HEADERS = ffi.h ffitarget.h ++ all: all-am ++ ++--- a/src/libcc1/Makefile.am +++++ b/src/libcc1/Makefile.am ++@@ -40,7 +40,7 @@ libiberty = $(if $(wildcard $(libiberty_ ++ $(Wc)$(libiberty_normal))) ++ libiberty_dep = $(patsubst $(Wc)%,%,$(libiberty)) ++ ++-plugindir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/plugin +++plugindir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/plugin ++ cc1libdir = $(libdir)/$(libsuffix) ++ ++ if ENABLE_PLUGIN ++--- a/src/libcc1/Makefile.in +++++ b/src/libcc1/Makefile.in ++@@ -398,7 +398,7 @@ libiberty = $(if $(wildcard $(libiberty_ ++ $(Wc)$(libiberty_normal))) ++ ++ libiberty_dep = $(patsubst $(Wc)%,%,$(libiberty)) ++-plugindir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/plugin +++plugindir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/plugin ++ cc1libdir = $(libdir)/$(libsuffix) ++ @ENABLE_PLUGIN_TRUE@plugin_LTLIBRARIES = libcc1plugin.la libcp1plugin.la ++ @ENABLE_PLUGIN_TRUE@cc1lib_LTLIBRARIES = libcc1.la ++--- a/src/libsanitizer/Makefile.am +++++ b/src/libsanitizer/Makefile.am ++@@ -1,6 +1,6 @@ ++ ACLOCAL_AMFLAGS = -I .. -I ../config ++ ++-sanincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include/sanitizer +++sanincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include/sanitizer ++ ++ nodist_saninclude_HEADERS = ++ ++--- a/src/libsanitizer/Makefile.in +++++ b/src/libsanitizer/Makefile.in ++@@ -361,7 +361,7 @@ top_build_prefix = @top_build_prefix@ ++ top_builddir = @top_builddir@ ++ top_srcdir = @top_srcdir@ ++ ACLOCAL_AMFLAGS = -I .. -I ../config ++-sanincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include/sanitizer +++sanincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include/sanitizer ++ nodist_saninclude_HEADERS = $(am__append_1) ++ @SANITIZER_SUPPORTED_TRUE@SUBDIRS = sanitizer_common $(am__append_2) \ ++ @SANITIZER_SUPPORTED_TRUE@ $(am__append_3) lsan asan ubsan \ ++--- a/src/libphobos/configure.ac +++++ b/src/libphobos/configure.ac ++@@ -268,6 +268,8 @@ AC_SUBST(SPEC_PHOBOS_DEPS) ++ libtool_VERSION=2:0:0 ++ AC_SUBST(libtool_VERSION) ++ +++# trigger rebuild of the configure file +++ ++ # Set default flags (after DRUNTIME_WERROR!) ++ if test -z "$GDCFLAGS"; then ++ GDCFLAGS="-g -O2" ++--- a/src/libphobos/m4/druntime.m4 +++++ b/src/libphobos/m4/druntime.m4 ++@@ -114,6 +114,7 @@ AC_DEFUN([DRUNTIME_INSTALL_DIRECTORIES], ++ ++ # Default case for install directory for D sources files. ++ gdc_include_dir='$(libdir)/gcc/${target_alias}/${gcc_version}/include/d' +++ gdc_include_dir='${libdir}/gcc-cross/${target_alias}'/${gcc_version}/include/d ++ AC_SUBST(gdc_include_dir) ++ ]) ++ ++--- a/src/gcc/ada/gcc-interface/Makefile.in +++++ b/src/gcc/ada/gcc-interface/Makefile.in ++@@ -919,7 +919,7 @@ toolexeclibdir = $(ADA_RTL_OBJ_DIR) ++ ++ ADA_INCLUDE_DIR = $(libsubdir)/adainclude ++ ADA_RTL_OBJ_DIR = $(libsubdir)/adalib ++-ADA_RTL_DSO_DIR = $(toolexeclibdir) +++ADA_RTL_DSO_DIR = $(subst /gcc/,/gcc-cross/,$(toolexeclibdir)) ++ ++ # Special flags ++ ++--- a/src/c++tools/Makefile.in +++++ b/src/c++tools/Makefile.in ++@@ -21,7 +21,7 @@ bindir := @bindir@ ++ libexecdir := @libexecdir@ ++ target_noncanonical := @target_noncanonical@ ++ gcc_version := $(shell @get_gcc_base_ver@ $(srcdir)/../gcc/BASE-VER) ++-libexecsubdir := $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) +++libexecsubdir := $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) ++ INSTALL_PROGRAM := @INSTALL_PROGRAM@ ++ INSTALL_STRIP_PROGRAM := $(srcdir)/../install-sh -c -s ++ AUTOCONF := @AUTOCONF@ diff --cc debian/patches/cross-no-locale-include.diff index 0000000,0000000..c728316 new file mode 100644 --- /dev/null +++ b/debian/patches/cross-no-locale-include.diff @@@ -1,0 -1,0 +1,17 @@@ ++# DP: Don't add /usr/local/include for cross compilers. Assume that ++# DP: /usr/include is ready for multiarch, but not /usr/local/include. ++ ++--- a/src/gcc/cppdefault.cc +++++ b/src/gcc/cppdefault.cc ++@@ -66,8 +66,11 @@ ++ #ifdef LOCAL_INCLUDE_DIR ++ /* /usr/local/include comes before the fixincluded header files. */ ++ { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 }, +++#if 0 +++ /* Unsafe to assume that /usr/local/include is ready for multiarch. */ ++ { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 }, ++ #endif +++#endif ++ #ifdef PREFIX_INCLUDE_DIR ++ { PREFIX_INCLUDE_DIR, 0, 0, 1, 0, 0 }, ++ #endif diff --cc debian/patches/cuda-float128.diff index 0000000,0000000..f22af51 new file mode 100644 --- /dev/null +++ b/debian/patches/cuda-float128.diff @@@ -1,0 -1,0 +1,46 @@@ ++# Mask __float128 types from CUDA compilers (LP: #1717257) ++ ++--- a/src/libstdc++-v3/include/std/type_traits +++++ b/src/libstdc++-v3/include/std/type_traits ++@@ -431,7 +431,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION ++ struct __is_floating_point_helper ++ : public true_type { }; ++ ++-#if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128) +++#if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128) && !defined(__CUDACC__) ++ template<> ++ struct __is_floating_point_helper<__float128> ++ : public true_type { }; ++--- a/src/libstdc++-v3/include/bits/std_abs.h +++++ b/src/libstdc++-v3/include/bits/std_abs.h ++@@ -97,7 +97,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION ++ abs(__GLIBCXX_TYPE_INT_N_3 __x) { return __x >= 0 ? __x : -__x; } ++ #endif ++ ++-#if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128) +++#if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128) && !defined(__CUDACC__) ++ __extension__ inline _GLIBCXX_CONSTEXPR ++ __float128 ++ abs(__float128 __x) ++--- a/src/libstdc++-v3/include/bits/stl_algobase.h +++++ b/src/libstdc++-v3/include/bits/stl_algobase.h ++@@ -1043,7 +1043,7 @@ _GLIBCXX_END_NAMESPACE_CONTAINER ++ __size_to_integer(double __n) { return (long long)__n; } ++ inline _GLIBCXX_CONSTEXPR long long ++ __size_to_integer(long double __n) { return (long long)__n; } ++-#if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128) +++#if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128) && !defined(__CUDACC__) ++ __extension__ inline _GLIBCXX_CONSTEXPR long long ++ __size_to_integer(__float128 __n) { return (long long)__n; } ++ #endif ++--- a/src/libstdc++-v3/include/std/numbers +++++ b/src/libstdc++-v3/include/std/numbers ++@@ -133,7 +133,7 @@ namespace numbers ++ inline constexpr double egamma = egamma_v; ++ inline constexpr double phi = phi_v; ++ ++-#if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128) +++#if !defined(__STRICT_ANSI__) && defined(_GLIBCXX_USE_FLOAT128) && !defined(__CUDACC__) ++ template<> ++ inline constexpr __float128 e_v<__float128> ++ = 2.718281828459045235360287471352662498Q; diff --cc debian/patches/disable-gdc-tests.diff index 0000000,0000000..626f6bd new file mode 100644 --- /dev/null +++ b/debian/patches/disable-gdc-tests.diff @@@ -1,0 -1,0 +1,17 @@@ ++# DP: Disable D tests, hang on many buildds ++ ++--- a/src/gcc/d/Make-lang.in +++++ b/src/gcc/d/Make-lang.in ++@@ -206,9 +206,9 @@ d.srcman: doc/gdc.1 ++ # check targets. However, our DejaGNU framework requires 'check-gdc' as its ++ # entry point. We feed the former to the latter here. ++ check-d: check-gdc ++-lang_checks += check-gdc ++-lang_checks_parallelized += check-gdc ++-check_gdc_parallelize = 10 +++#lang_checks += check-gdc +++#lang_checks_parallelized += check-gdc +++#check_gdc_parallelize = 10 ++ ++ # No D-specific selftests. ++ selftest-d: diff --cc debian/patches/dwarf5-revert-default-doc.diff index 0000000,0000000..c8a6e4b new file mode 100644 --- /dev/null +++ b/debian/patches/dwarf5-revert-default-doc.diff @@@ -1,0 -1,0 +1,14 @@@ ++# DP: Don't turn on DWARF 5 by default, where GCC 11 is not the default. ++ ++--- a/src/gcc/doc/invoke.texi +++++ b/src/gcc/doc/invoke.texi ++@@ -9630,6 +9630,9 @@ version for most targets is 5 (with the ++ Darwin/Mac OS X, which default to version 2, and AIX, which defaults ++ to version 4). ++ +++NOTE: On Ubuntu release, where GCC 11 is not used as the default (21.04 +++and earlier releases), it defaults to version 4. +++ ++ Note that with DWARF Version 2, some ports require and always ++ use some non-conflicting DWARF 3 extensions in the unwind tables. ++ diff --cc debian/patches/dwarf5-revert-default.diff index 0000000,0000000..4988a31 new file mode 100644 --- /dev/null +++ b/debian/patches/dwarf5-revert-default.diff @@@ -1,0 -1,0 +1,13 @@@ ++# DP: Don't turn on DWARF 5 by default, where GCC 11 is not the default. ++ ++--- a/src/gcc/common.opt +++++ b/src/gcc/common.opt ++@@ -3175,7 +3175,7 @@ Common Driver JoinedOrMissing Negative(g ++ Generate debug information in default version of DWARF format. ++ ++ gdwarf- ++-Common Driver Joined UInteger Var(dwarf_version) Init(5) Negative(gstabs) +++Common Driver Joined UInteger Var(dwarf_version) Init(4) Negative(gstabs) ++ Generate debug information in DWARF v2 (or later) format. ++ ++ gdwarf32 diff --cc debian/patches/g++-multiarch-incdir.diff index 0000000,0000000..7b3cab2 new file mode 100644 --- /dev/null +++ b/debian/patches/g++-multiarch-incdir.diff @@@ -1,0 -1,0 +1,109 @@@ ++# DP: Use /usr/include//c++/4.x as the include directory ++# DP: for host dependent c++ header files. ++ ++--- a/src/libstdc++-v3/include/Makefile.am +++++ b/src/libstdc++-v3/include/Makefile.am ++@@ -979,7 +979,7 @@ endif ++ ++ host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) ++ host_builddir = ./${host_alias}/bits ++-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits +++host_installdir = $(if $(shell $(CC) -print-multiarch),/usr/include/$(shell $(filter-out -m%,$(CC)) -print-multiarch)/c++/$(notdir ${gxx_include_dir})$(MULTISUBDIR)/bits,${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits) ++ host_headers = \ ++ ${host_srcdir}/ctype_base.h \ ++ ${host_srcdir}/ctype_inline.h \ ++--- a/src/libstdc++-v3/include/Makefile.in +++++ b/src/libstdc++-v3/include/Makefile.in ++@@ -1328,7 +1328,7 @@ parallel_headers = \ ++ @GLIBCXX_C_HEADERS_COMPATIBILITY_TRUE@c_compatibility_headers_extra = ${c_compatibility_headers} ++ host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) ++ host_builddir = ./${host_alias}/bits ++-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits +++host_installdir = $(if $(shell $(CC) -print-multiarch),/usr/include/$(shell $(filter-out -m%,$(CC)) -print-multiarch)/c++/$(notdir ${gxx_include_dir})$(MULTISUBDIR)/bits,${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits) ++ host_headers = \ ++ ${host_srcdir}/ctype_base.h \ ++ ${host_srcdir}/ctype_inline.h \ ++--- a/src/gcc/Makefile.in +++++ b/src/gcc/Makefile.in ++@@ -1200,6 +1200,7 @@ FLAGS_TO_PASS = \ ++ "prefix=$(prefix)" \ ++ "local_prefix=$(local_prefix)" \ ++ "gxx_include_dir=$(gcc_gxx_include_dir)" \ +++ "gxx_tool_include_dir=$(gcc_gxx_tool_include_dir)" \ ++ "gxx_libcxx_include_dir=$(gcc_gxx_libcxx_include_dir)" \ ++ "build_tooldir=$(build_tooldir)" \ ++ "gcc_tooldir=$(gcc_tooldir)" \ ++@@ -1851,6 +1852,14 @@ gnat_install_lib = @gnat_install_lib@ ++ # host overrides ++ -include $(xmake_file) ++ +++# Directory in which the compiler finds target-dependent g++ includes. +++ifneq ($(call if_multiarch,non-empty),) +++ gcc_gxx_tool_include_dir = $(libsubdir)/$(libsubdir_to_prefix)include/$(MULTIARCH_DIRNAME)/c++/$(version) +++else +++ gcc_gxx_tool_include_dir = $(gcc_gxx_include_dir)/$(target_noncanonical) +++endif +++ +++ ++ # all-tree.def includes all the tree.def files. ++ all-tree.def: s-alltree; @true ++ s-alltree: Makefile ++@@ -3004,7 +3013,7 @@ PREPROCESSOR_DEFINES = \ ++ -DFIXED_INCLUDE_DIR=\"$(libsubdir)/include-fixed\" \ ++ -DGPLUSPLUS_INCLUDE_DIR=\"$(gcc_gxx_include_dir)\" \ ++ -DGPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT=$(gcc_gxx_include_dir_add_sysroot) \ ++- -DGPLUSPLUS_TOOL_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/$(target_noncanonical)\" \ +++ -DGPLUSPLUS_TOOL_INCLUDE_DIR=\"$(gcc_gxx_tool_include_dir)\" \ ++ -DGPLUSPLUS_BACKWARD_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/backward\" \ ++ -DGPLUSPLUS_LIBCXX_INCLUDE_DIR=\"$(gcc_gxx_libcxx_include_dir)\" \ ++ -DGPLUSPLUS_LIBCXX_INCLUDE_DIR_ADD_SYSROOT=$(gcc_gxx_libcxx_include_dir_add_sysroot) \ ++--- a/src/gcc/cppdefault.cc +++++ b/src/gcc/cppdefault.cc ++@@ -49,6 +49,8 @@ const struct default_include cpp_include ++ /* Pick up GNU C++ target-dependent include files. */ ++ { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, ++ GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 1 }, +++ { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, +++ GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 2 }, ++ #endif ++ #ifdef GPLUSPLUS_BACKWARD_INCLUDE_DIR ++ /* Pick up GNU C++ backward and deprecated include files. */ ++--- a/src/gcc/incpath.cc +++++ b/src/gcc/incpath.cc ++@@ -164,6 +164,18 @@ add_standard_paths (const char *sysroot, ++ } ++ str = reconcat (str, str, dir_separator_str, ++ imultiarch, NULL); +++ if (p->cplusplus && strstr (str, "/c++/")) +++ { +++ char *suffix = strstr (str, "/c++/"); +++ *suffix++ = '\0'; +++ suffix = xstrdup (suffix); +++ str = reconcat (str, str, dir_separator_str, +++ imultiarch, +++ dir_separator_str, suffix, NULL); +++ } +++ else +++ str = reconcat (str, str, dir_separator_str, +++ imultiarch, NULL); ++ } ++ add_path (str, INC_SYSTEM, p->cxx_aware, false); ++ } ++@@ -229,7 +241,16 @@ add_standard_paths (const char *sysroot, ++ free (str); ++ continue; ++ } ++- str = reconcat (str, str, dir_separator_str, imultiarch, NULL); +++ if (p->cplusplus && strstr (str, "/c++/")) +++ { +++ char *suffix = strstr (str, "/c++/"); +++ *suffix++ = '\0'; +++ suffix = xstrdup (suffix); +++ str = reconcat (str, str, dir_separator_str, imultiarch, +++ dir_separator_str, suffix, NULL); +++ } +++ else +++ str = reconcat (str, str, dir_separator_str, imultiarch, NULL); ++ } ++ ++ add_path (str, INC_SYSTEM, p->cxx_aware, false); diff --cc debian/patches/gcc-arm-disable-guality-tests.diff index 0000000,0000000..bc43363 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-arm-disable-guality-tests.diff @@@ -1,0 -1,0 +1,44 @@@ ++# DP: Don't run some tests from the guality test suite on armhf. These fail ++# DP: on every target, but seem to hang on the buildds occasionally on armhf. ++ ++--- a/src/gcc/testsuite/gcc.dg/guality/guality.exp +++++ b/src/gcc/testsuite/gcc.dg/guality/guality.exp ++@@ -93,7 +93,37 @@ if {[check_guality " ++ } ++ } ++ ++- gcc-dg-runtest [lsort [glob $srcdir/$subdir/*.c]] "" "" +++ # FIXME: these seem to hang on the buildds, and gdb always times out +++ # trying to run them. +++ if { [istarget arm-*-linux-gnueabi*] } { +++ set guality [list] +++ foreach file [lsort [glob $srcdir/$subdir/*.c]] { +++ switch -glob -- [file tail $file] { +++ pr36728-*.c - +++ pr41616-1.c - +++ pr43051-1.c - +++ pr54200.c - +++ pr54519-*.c - +++ pr54551.c - +++ pr54693-2.c - +++ pr54796.c - +++ pr56154-1.c - +++ pr58791-3.c - +++ pr58791-5.c - +++ pr68860-1.c - +++ pr68860-2.c - +++ pr78726.c - +++ pr89528.c - +++ pr90074.c - +++ pr90716.c { } +++ * { lappend guality $file } +++ } +++ } +++ } { +++ set guality [lsort [glob $srcdir/$subdir/*.c]] +++ } +++ +++ gcc-dg-runtest $guality "" "" ++ gcc-dg-runtest $general "" "-Wc++-compat" ++ set-torture-options \ ++ [list "-O0" "-Og"] \ diff --cc debian/patches/gcc-as-needed-gold.diff index 0000000,0000000..7497638 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-as-needed-gold.diff @@@ -1,0 -1,0 +1,84 @@@ ++# DP: Use --push-state/--pop-state for gold as well when linking libtsan. ++ ++--- a/src/gcc/gcc.cc +++++ b/src/gcc/gcc.cc ++@@ -756,10 +756,10 @@ proper position among the other output f ++ #define LIBASAN_SPEC STATIC_LIBASAN_LIBS ++ #elif defined(HAVE_LD_STATIC_DYNAMIC) ++ #define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION "}" \ ++- " %{!static-libasan:%{!fuse-ld=gold:--push-state} --no-as-needed}" \ +++ " %{!static-libasan:--push-state --no-as-needed}" \ ++ " -lasan " \ ++ " %{static-libasan:" LD_DYNAMIC_OPTION "}" \ ++- " %{!static-libasan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \ +++ " %{!static-libasan:--pop-state}" \ ++ STATIC_LIBASAN_LIBS ++ #else ++ #define LIBASAN_SPEC "-lasan" STATIC_LIBASAN_LIBS ++@@ -795,10 +795,10 @@ proper position among the other output f ++ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS ++ #elif defined(HAVE_LD_STATIC_DYNAMIC) ++ #define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \ ++- " %{!static-libtsan:%{!fuse-ld=gold:--push-state} --no-as-needed}" \ +++ " %{!static-libtsan:--push-state --no-as-needed}" \ ++ " -ltsan " \ ++ " %{static-libtsan:" LD_DYNAMIC_OPTION "}" \ ++- " %{!static-libtsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \ +++ " %{!static-libtsan:--pop-state}" \ ++ STATIC_LIBTSAN_LIBS ++ #else ++ #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS ++@@ -816,10 +816,10 @@ proper position among the other output f ++ #define LIBLSAN_SPEC STATIC_LIBLSAN_LIBS ++ #elif defined(HAVE_LD_STATIC_DYNAMIC) ++ #define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION "}" \ ++- " %{!static-liblsan:%{!fuse-ld=gold:--push-state} --no-as-needed}" \ +++ " %{!static-liblsan:--push-state --no-as-needed}" \ ++ " -llsan " \ ++ " %{static-liblsan:" LD_DYNAMIC_OPTION "}" \ ++- " %{!static-liblsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \ +++ " %{!static-liblsan:--pop-state}" \ ++ STATIC_LIBLSAN_LIBS ++ #else ++ #define LIBLSAN_SPEC "-llsan" STATIC_LIBLSAN_LIBS ++@@ -835,10 +835,10 @@ proper position among the other output f ++ " %{static-libubsan|static:%:include(libsanitizer.spec)%(link_libubsan)}" ++ #ifdef HAVE_LD_STATIC_DYNAMIC ++ #define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION "}" \ ++- " %{!static-libubsan:%{!fuse-ld=gold:--push-state} --no-as-needed}" \ +++ " %{!static-libubsan:--push-state --no-as-needed}" \ ++ " -lubsan " \ ++ " %{static-libubsan:" LD_DYNAMIC_OPTION "}" \ ++- " %{!static-libubsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \ +++ " %{!static-libubsan:--pop-state}" \ ++ STATIC_LIBUBSAN_LIBS ++ #else ++ #define LIBUBSAN_SPEC "-lubsan" STATIC_LIBUBSAN_LIBS ++--- a/src/gcc/config/gnu-user.h +++++ b/src/gcc/config/gnu-user.h ++@@ -136,21 +136,21 @@ see the files COPYING3 and COPYING.RUNTI ++ #define LIBASAN_EARLY_SPEC "%{!shared:libasan_preinit%O%s} " \ ++ "%{static-libasan:%{!shared:" \ ++ LD_STATIC_OPTION " --whole-archive -lasan --no-whole-archive " \ ++- LD_DYNAMIC_OPTION "}}%{!static-libasan:%{!fuse-ld=gold:--push-state} --no-as-needed -lasan %{fuse-ld=gold:--as-needed;:--pop-state}}" +++ LD_DYNAMIC_OPTION "}}%{!static-libasan:--push-state --no-as-needed -lasan --pop-state}" ++ #undef LIBHWASAN_EARLY_SPEC ++ #define LIBHWASAN_EARLY_SPEC "%{static-libhwasan:%{!shared:" \ ++ LD_STATIC_OPTION " --whole-archive -lhwasan --no-whole-archive " \ ++- LD_DYNAMIC_OPTION "}}%{!static-libhwasan:%{!fuse-ld=gold:--push-state} --no-as-needed -lhwasan %{fuse-ld=gold:--as-needed;:--pop-state}}" +++ LD_DYNAMIC_OPTION "}}%{!static-libhwasan:--push-state --no-as-needed -lhwasan --pop-state}" ++ #undef LIBTSAN_EARLY_SPEC ++ #define LIBTSAN_EARLY_SPEC "%{!shared:libtsan_preinit%O%s} " \ ++ "%{static-libtsan:%{!shared:" \ ++ LD_STATIC_OPTION " --whole-archive -ltsan --no-whole-archive " \ ++- LD_DYNAMIC_OPTION "}}%{!static-libtsan:%{!fuse-ld=gold:--push-state} --no-as-needed -ltsan %{fuse-ld=gold:--as-needed;:--pop-state}}" +++ LD_DYNAMIC_OPTION "}}%{!static-libtsan:--push-state --no-as-needed -ltsan --pop-state}" ++ #undef LIBLSAN_EARLY_SPEC ++ #define LIBLSAN_EARLY_SPEC "%{!shared:liblsan_preinit%O%s} " \ ++ "%{static-liblsan:%{!shared:" \ ++ LD_STATIC_OPTION " --whole-archive -llsan --no-whole-archive " \ ++- LD_DYNAMIC_OPTION "}}%{!static-liblsan:%{!fuse-ld=gold:--push-state} --no-as-needed -llsan %{fuse-ld=gold:--as-needed;:--pop-state}}" +++ LD_DYNAMIC_OPTION "}}%{!static-liblsan:--push-state --no-as-needed -llsan --pop-state}" ++ #endif ++ ++ #undef TARGET_F951_OPTIONS diff --cc debian/patches/gcc-as-needed.diff index 0000000,0000000..c477c23 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-as-needed.diff @@@ -1,0 -1,0 +1,253 @@@ ++# DP: On linux targets pass --as-needed by default to the linker, but always ++# DP: link the sanitizer libraries with --no-as-needed. ++ ++--- a/src/gcc/gcc.cc +++++ b/src/gcc/gcc.cc ++@@ -755,8 +755,11 @@ proper position among the other output f ++ #ifdef LIBASAN_EARLY_SPEC ++ #define LIBASAN_SPEC STATIC_LIBASAN_LIBS ++ #elif defined(HAVE_LD_STATIC_DYNAMIC) ++-#define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION \ ++- "} -lasan %{static-libasan:" LD_DYNAMIC_OPTION "}" \ +++#define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION "}" \ +++ " %{!static-libasan:%{!fuse-ld=gold:--push-state} --no-as-needed}" \ +++ " -lasan " \ +++ " %{static-libasan:" LD_DYNAMIC_OPTION "}" \ +++ " %{!static-libasan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \ ++ STATIC_LIBASAN_LIBS ++ #else ++ #define LIBASAN_SPEC "-lasan" STATIC_LIBASAN_LIBS ++@@ -791,8 +794,11 @@ proper position among the other output f ++ #ifdef LIBTSAN_EARLY_SPEC ++ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS ++ #elif defined(HAVE_LD_STATIC_DYNAMIC) ++-#define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION \ ++- "} -ltsan %{static-libtsan:" LD_DYNAMIC_OPTION "}" \ +++#define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \ +++ " %{!static-libtsan:%{!fuse-ld=gold:--push-state} --no-as-needed}" \ +++ " -ltsan " \ +++ " %{static-libtsan:" LD_DYNAMIC_OPTION "}" \ +++ " %{!static-libtsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \ ++ STATIC_LIBTSAN_LIBS ++ #else ++ #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS ++@@ -809,8 +815,11 @@ proper position among the other output f ++ #ifdef LIBLSAN_EARLY_SPEC ++ #define LIBLSAN_SPEC STATIC_LIBLSAN_LIBS ++ #elif defined(HAVE_LD_STATIC_DYNAMIC) ++-#define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION \ ++- "} -llsan %{static-liblsan:" LD_DYNAMIC_OPTION "}" \ +++#define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION "}" \ +++ " %{!static-liblsan:%{!fuse-ld=gold:--push-state} --no-as-needed}" \ +++ " -llsan " \ +++ " %{static-liblsan:" LD_DYNAMIC_OPTION "}" \ +++ " %{!static-liblsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \ ++ STATIC_LIBLSAN_LIBS ++ #else ++ #define LIBLSAN_SPEC "-llsan" STATIC_LIBLSAN_LIBS ++@@ -825,8 +834,11 @@ proper position among the other output f ++ #define STATIC_LIBUBSAN_LIBS \ ++ " %{static-libubsan|static:%:include(libsanitizer.spec)%(link_libubsan)}" ++ #ifdef HAVE_LD_STATIC_DYNAMIC ++-#define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION \ ++- "} -lubsan %{static-libubsan:" LD_DYNAMIC_OPTION "}" \ +++#define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION "}" \ +++ " %{!static-libubsan:%{!fuse-ld=gold:--push-state} --no-as-needed}" \ +++ " -lubsan " \ +++ " %{static-libubsan:" LD_DYNAMIC_OPTION "}" \ +++ " %{!static-libubsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \ ++ STATIC_LIBUBSAN_LIBS ++ #else ++ #define LIBUBSAN_SPEC "-lubsan" STATIC_LIBUBSAN_LIBS ++--- a/src/gcc/config/gnu-user.h +++++ b/src/gcc/config/gnu-user.h ++@@ -136,21 +136,21 @@ see the files COPYING3 and COPYING.RUNTI ++ #define LIBASAN_EARLY_SPEC "%{!shared:libasan_preinit%O%s} " \ ++ "%{static-libasan:%{!shared:" \ ++ LD_STATIC_OPTION " --whole-archive -lasan --no-whole-archive " \ ++- LD_DYNAMIC_OPTION "}}%{!static-libasan:-lasan}" +++ LD_DYNAMIC_OPTION "}}%{!static-libasan:%{!fuse-ld=gold:--push-state} --no-as-needed -lasan %{fuse-ld=gold:--as-needed;:--pop-state}}" ++ #undef LIBHWASAN_EARLY_SPEC ++ #define LIBHWASAN_EARLY_SPEC "%{static-libhwasan:%{!shared:" \ ++ LD_STATIC_OPTION " --whole-archive -lhwasan --no-whole-archive " \ ++- LD_DYNAMIC_OPTION "}}%{!static-libhwasan:-lhwasan}" +++ LD_DYNAMIC_OPTION "}}%{!static-libhwasan:%{!fuse-ld=gold:--push-state} --no-as-needed -lhwasan %{fuse-ld=gold:--as-needed;:--pop-state}}" ++ #undef LIBTSAN_EARLY_SPEC ++ #define LIBTSAN_EARLY_SPEC "%{!shared:libtsan_preinit%O%s} " \ ++ "%{static-libtsan:%{!shared:" \ ++ LD_STATIC_OPTION " --whole-archive -ltsan --no-whole-archive " \ ++- LD_DYNAMIC_OPTION "}}%{!static-libtsan:-ltsan}" +++ LD_DYNAMIC_OPTION "}}%{!static-libtsan:%{!fuse-ld=gold:--push-state} --no-as-needed -ltsan %{fuse-ld=gold:--as-needed;:--pop-state}}" ++ #undef LIBLSAN_EARLY_SPEC ++ #define LIBLSAN_EARLY_SPEC "%{!shared:liblsan_preinit%O%s} " \ ++ "%{static-liblsan:%{!shared:" \ ++ LD_STATIC_OPTION " --whole-archive -llsan --no-whole-archive " \ ++- LD_DYNAMIC_OPTION "}}%{!static-liblsan:-llsan}" +++ LD_DYNAMIC_OPTION "}}%{!static-liblsan:%{!fuse-ld=gold:--push-state} --no-as-needed -llsan %{fuse-ld=gold:--as-needed;:--pop-state}}" ++ #endif ++ ++ #undef TARGET_F951_OPTIONS ++--- a/src/gcc/config/aarch64/aarch64-linux.h +++++ b/src/gcc/config/aarch64/aarch64-linux.h ++@@ -36,6 +36,7 @@ ++ ++ #define LINUX_TARGET_LINK_SPEC "%{h*} \ ++ --hash-style=gnu \ +++ %{!fsanitize=*:--as-needed} \ ++ %{static:-Bstatic} \ ++ %{shared:-shared} \ ++ %{symbolic:-Bsymbolic} \ ++--- a/src/gcc/config/ia64/linux.h +++++ b/src/gcc/config/ia64/linux.h ++@@ -58,7 +58,7 @@ do { \ ++ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" ++ ++ #undef LINK_SPEC ++-#define LINK_SPEC " --hash-style=gnu \ +++#define LINK_SPEC " --hash-style=gnu %{!fsanitize=*:--as-needed} \ ++ %{shared:-shared} \ ++ %{!shared: \ ++ %{!static: \ ++--- a/src/gcc/config/sparc/linux.h +++++ b/src/gcc/config/sparc/linux.h ++@@ -81,7 +81,7 @@ extern const char *host_detect_local_cpu ++ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" ++ ++ #undef LINK_SPEC ++-#define LINK_SPEC "-m elf32_sparc --hash-style=gnu %{shared:-shared} \ +++#define LINK_SPEC "-m elf32_sparc --hash-style=gnu %{!fsanitize=*:--as-needed} %{shared:-shared} \ ++ %{!mno-relax:%{!r:-relax}} \ ++ %{!shared: \ ++ %{!static: \ ++--- a/src/gcc/config/s390/linux.h +++++ b/src/gcc/config/s390/linux.h ++@@ -82,7 +82,7 @@ along with GCC; see the file COPYING3. ++ ++ #undef LINK_SPEC ++ #define LINK_SPEC \ ++- "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu \ +++ "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu %{!fsanitize=*:--as-needed} \ ++ %{shared:-shared} \ ++ %{!shared: \ ++ %{static:-static} \ ++--- a/src/gcc/config/rs6000/linux64.h +++++ b/src/gcc/config/rs6000/linux64.h ++@@ -377,13 +377,13 @@ extern int dot_symbols; ++ " -m elf64ppc") ++ #endif ++ ++-#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=gnu %{!shared: %{!static: \ +++#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=gnu %{!fsanitize=*:--as-needed} %{!shared: %{!static: \ ++ %{!static-pie: \ ++ %{rdynamic:-export-dynamic} \ ++ -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}} \ ++ %(link_os_extra_spec32)" ++ ++-#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=gnu %{!shared: %{!static: \ +++#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=gnu %{!fsanitize=*:--as-needed} %{!shared: %{!static: \ ++ %{!static-pie: \ ++ %{rdynamic:-export-dynamic} \ ++ -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}} \ ++--- a/src/gcc/config/rs6000/sysv4.h +++++ b/src/gcc/config/rs6000/sysv4.h ++@@ -788,7 +788,7 @@ GNU_USER_TARGET_CC1_SPEC ++ #define GNU_USER_DYNAMIC_LINKER GLIBC_DYNAMIC_LINKER ++ #endif ++ ++-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ +++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!fsanitize=*:--as-needed} %{!shared: %{!static: \ ++ %{rdynamic:-export-dynamic} \ ++ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" ++ ++--- a/src/gcc/config/i386/gnu-user64.h +++++ b/src/gcc/config/i386/gnu-user64.h ++@@ -57,6 +57,7 @@ see the files COPYING3 and COPYING.RUNTI ++ %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ ++ %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ ++ --hash-style=gnu \ +++ %{!fsanitize=*:--as-needed} \ ++ %{shared:-shared} \ ++ %{!shared: \ ++ %{!static: \ ++--- a/src/gcc/config/i386/gnu-user.h +++++ b/src/gcc/config/i386/gnu-user.h ++@@ -68,7 +68,7 @@ along with GCC; see the file COPYING3. ++ { "link_emulation", GNU_USER_LINK_EMULATION },\ ++ { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } ++ ++-#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \ +++#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{!fsanitize=*:--as-needed} %{shared:-shared} \ ++ %{!shared: \ ++ %{!static: \ ++ %{!static-pie: \ ++--- a/src/gcc/config/alpha/linux-elf.h +++++ b/src/gcc/config/alpha/linux-elf.h ++@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3. ++ ++ #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER ++ ++-#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{G*} %{relax:-relax} \ +++#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{!fsanitize=*:--as-needed} %{G*} %{relax:-relax} \ ++ %{O*:-O3} %{!O*:-O1} \ ++ %{shared:-shared} \ ++ %{!shared: \ ++--- a/src/gcc/config/arm/linux-elf.h +++++ b/src/gcc/config/arm/linux-elf.h ++@@ -71,6 +71,7 @@ ++ %{!shared:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \ ++ -X \ ++ --hash-style=gnu \ +++ %{!fsanitize=*:--as-needed} \ ++ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ ++ SUBTARGET_EXTRA_LINK_SPEC ++ ++--- a/src/gcc/config/mips/gnu-user.h +++++ b/src/gcc/config/mips/gnu-user.h ++@@ -55,6 +55,7 @@ along with GCC; see the file COPYING3. ++ #undef GNU_USER_TARGET_LINK_SPEC ++ #define GNU_USER_TARGET_LINK_SPEC "\ ++ %{G*} %{EB} %{EL} %{mips*} %{shared} \ +++ %{!fsanitize=*:--as-needed} \ ++ %{!shared: \ ++ %{!static: \ ++ %{rdynamic:-export-dynamic} \ ++--- a/src/gcc/config/riscv/linux.h +++++ b/src/gcc/config/riscv/linux.h ++@@ -59,6 +59,7 @@ along with GCC; see the file COPYING3. ++ ++ #define LINK_SPEC "\ ++ -hash-style=gnu \ +++%{!fsanitize=*:--as-needed} \ ++ -melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv" LD_EMUL_SUFFIX " \ ++ %{mno-relax:--no-relax} \ ++ %{mbig-endian:-EB} \ ++--- a/src/gcc/config/m68k/linux.h +++++ b/src/gcc/config/m68k/linux.h ++@@ -78,6 +78,7 @@ along with GCC; see the file COPYING3. ++ ++ #undef LINK_SPEC ++ #define LINK_SPEC "-m m68kelf %{shared} \ +++ %{!fsanitize=*:--as-needed} \ ++ %{!shared: \ ++ %{!static: \ ++ %{rdynamic:-export-dynamic} \ ++--- a/src/gcc/config/sh/linux.h +++++ b/src/gcc/config/sh/linux.h ++@@ -72,6 +72,7 @@ along with GCC; see the file COPYING3. ++ #undef SUBTARGET_LINK_SPEC ++ #define SUBTARGET_LINK_SPEC \ ++ "%{shared:-shared} \ +++ %{!fsanitize=*:--as-needed} \ ++ %{!static: \ ++ %{rdynamic:-export-dynamic} \ ++ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "} \ ++--- a/src/gcc/config/pa/pa-linux.h +++++ b/src/gcc/config/pa/pa-linux.h ++@@ -41,6 +41,7 @@ along with GCC; see the file COPYING3. ++ ++ #undef LINK_SPEC ++ #define LINK_SPEC "\ +++ %{!fsanitize=*:--as-needed} \ ++ %{shared:-shared} \ ++ %{!shared: \ ++ %{!static: \ diff --cc debian/patches/gcc-auto-build.diff index 0000000,0000000..653fbc1 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-auto-build.diff @@@ -1,0 -1,0 +1,13 @@@ ++# DP: Fix cross building a native compiler. ++ ++--- a/src/gcc/configure.ac +++++ b/src/gcc/configure.ac ++@@ -2089,7 +2089,7 @@ else ++ # Clearing GMPINC is necessary to prevent host headers being ++ # used by the build compiler. Defining GENERATOR_FILE stops ++ # system.h from including gmp.h. ++- CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \ +++ CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD} -DGENERATOR_FILE" \ ++ CXX="${CXX_FOR_BUILD}" CXXFLAGS="${CXXFLAGS_FOR_BUILD}" \ ++ LD="${LD_FOR_BUILD}" LDFLAGS="${LDFLAGS_FOR_BUILD}" \ ++ GMPINC="" CPPFLAGS="${CPPFLAGS_FOR_BUILD} -DGENERATOR_FILE" \ diff --cc debian/patches/gcc-distro-specs-ubuntu-doc.diff index 0000000,0000000..e2bd1c3 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-distro-specs-ubuntu-doc.diff @@@ -1,0 -1,0 +1,72 @@@ ++# DP: Document distro specific compiler flags turned on by default ++ ++--- a/src/gcc/doc/invoke.texi +++++ b/src/gcc/doc/invoke.texi ++@@ -9952,6 +9952,13 @@ also turns on the following optimization ++ Please note the warning under @option{-fgcse} about ++ invoking @option{-O2} on programs that use computed gotos. ++ +++NOTE: In Ubuntu 8.10 and later versions, @option{-D_FORTIFY_SOURCE=2}, +++in Ubuntu 24.04 and later versions, @option{-D_FORTIFY_SOURCE=3}, is +++set by default, and is activated when @option{-O} is set to 2 or higher. +++This enables additional compile-time and run-time checks for several libc +++functions. To disable, specify either @option{-U_FORTIFY_SOURCE} or +++@option{-D_FORTIFY_SOURCE=0}. +++ ++ @item -O3 ++ @opindex O3 ++ Optimize yet more. @option{-O3} turns on all optimizations specified ++@@ -12692,6 +12698,11 @@ instructions. ++ Optimize the prologue of variadic argument functions with respect to usage of ++ those arguments. ++ +++NOTE: In Ubuntu 14.10 and later versions, +++@option{-fstack-protector-strong} is enabled by default for C, +++C++, ObjC, ObjC++, if none of @option{-fno-stack-protector}, +++@option{-nostdlib}, nor @option{-ffreestanding} are found. +++ ++ @item -fsection-anchors ++ @opindex fsection-anchors ++ Try to reduce the number of symbolic address calculations by using ++@@ -13378,6 +13389,9 @@ value of a shared integer constant. ++ The minimum size of buffers (i.e.@: arrays) that receive stack smashing ++ protection when @option{-fstack-protection} is used. ++ +++This default before Ubuntu 10.10 was "8". Currently it is "4", to increase +++the number of functions protected by the stack protector. +++ ++ @item min-size-for-stack-sharing ++ The minimum size of variables taking part in stack slot sharing when not ++ optimizing. ++@@ -14659,6 +14673,10 @@ which functions and calls should be skip ++ Currently the x86 GNU/Linux target provides an implementation based ++ on Intel Control-flow Enforcement Technology (CET). ++ +++NOTE: In Ubuntu 19.10 and later versions, @option{-fcf-protection} +++is enabled by default for C, C++, ObjC, ObjC++, if none of +++@option{-fno-cf-protection} nor @option{-fcf-protection=*} are found. +++ ++ @item -fstack-protector ++ @opindex fstack-protector ++ Emit extra code to check for buffer overflows, such as stack smashing ++@@ -14746,6 +14764,10 @@ allocations. @option{-fstack-clash-prot ++ protection for static stack allocations if the target supports ++ @option{-fstack-check=specific}. ++ +++NOTE: In Ubuntu 19.10 and later versions, +++@option{-fstack-clash-protection} is enabled by default for C, +++C++, ObjC, ObjC++, unless @option{-fno-stack-clash-protection} is found. +++ ++ @item -fstack-limit-register=@var{reg} ++ @itemx -fstack-limit-symbol=@var{sym} ++ @itemx -fno-stack-limit ++@@ -15443,6 +15465,9 @@ For example, @option{-Wl,-Map,output.map ++ linker. When using the GNU linker, you can also get the same effect with ++ @option{-Wl,-Map=output.map}. ++ +++NOTE: In Ubuntu 8.10 and later versions, for LDFLAGS, the option +++@option{-Wl,-z,relro} is used. To disable, use @option{-Wl,-z,norelro}. +++ ++ @item -u @var{symbol} ++ @opindex u ++ Pretend the symbol @var{symbol} is undefined, to force linking of diff --cc debian/patches/gcc-distro-specs.diff index 0000000,0000000..ceed0bb new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-distro-specs.diff @@@ -1,0 -1,0 +1,323 @@@ ++# DP: Add empty distro and hardening specs ++ ++--- a/src/gcc/gcc.cc +++++ b/src/gcc/gcc.cc ++@@ -27,6 +27,11 @@ CC recognizes how to compile each input ++ Once it knows which kind of compilation to perform, the procedure for ++ compilation is specified by a string called a "spec". */ ++ +++/* Inject some default compilation flags which are used as the default. +++ Done by the packaging build system. Should that be done in the headers +++ gcc/config//*.h instead? */ +++#include "distro-defaults.h" +++ ++ #define INCLUDE_STRING ++ #include "config.h" ++ #include "system.h" ++@@ -986,6 +991,90 @@ proper position among the other output f ++ #define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L %G}" ++ #endif ++ +++/* Generate full unwind information covering all program points. +++ Only needed for some architectures. */ +++#ifndef ASYNC_UNWIND_SPEC +++# ifdef DIST_DEFAULT_ASYNC_UNWIND +++# define ASYNC_UNWIND_SPEC "%{!fno-asynchronous-unwind-tables:-fasynchronous-unwind-tables}" +++# else +++# define ASYNC_UNWIND_SPEC "" +++# endif +++#endif +++ +++/* Turn on stack protector. +++ */ +++#ifndef SSP_DEFAULT_SPEC +++# ifdef DIST_DEFAULT_SSP +++# ifdef DIST_DEFAULT_SSP_STRONG +++# define SSP_DEFAULT_SPEC " %{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:%{!fstack-protector:-fstack-protector-strong}}}}}" +++# else +++# define SSP_DEFAULT_SPEC " %{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:-fstack-protector}}}}" +++# endif +++# else +++# define SSP_DEFAULT_SPEC "" +++# endif +++#endif +++ +++/* Turn on -Wformat -Wformat-security by default for C, C++, +++ ObjC, ObjC++. */ +++#ifndef FORMAT_SECURITY_SPEC +++# ifdef DIST_DEFAULT_FORMAT_SECURITY +++# define FORMAT_SECURITY_SPEC " %{!Wformat:%{!Wformat=2:%{!Wformat=0:%{!Wall:-Wformat} %{!Wno-format-security:-Wformat-security}}}}" +++# else +++# define FORMAT_SECURITY_SPEC "" +++# endif +++#endif +++ +++/* Enable -fstack-clash-protection by default. Only available +++ on some targets. */ +++#ifndef STACK_CLASH_SPEC +++# ifdef DIST_DEFAULT_STACK_CLASH +++# define STACK_CLASH_SPEC " %{!fno-stack-clash-protection:-fstack-clash-protection}" +++# else +++# define STACK_CLASH_SPEC "" +++# endif +++#endif +++ +++/* Enable code instrumentation of control-flow transfers. +++ Available on x86 and x86_64. */ +++#ifndef CF_PROTECTION_SPEC +++# ifdef DIST_DEFAULT_CF_PROTECTION +++# define CF_PROTECTION_SPEC " %{!m16:%{!m32:%{!fcf-protection*:%{!fno-cf-protection:-fcf-protection}}}}" +++# else +++# define CF_PROTECTION_SPEC "" +++# endif +++#endif +++ +++#ifndef BIND_NOW_SPEC +++# if defined(DIST_DEFAULT_BIND_NOW) && !defined(ACCEL_COMPILER) +++# define BIND_NOW_SPEC " -z now" +++# else +++# define BIND_NOW_SPEC "" +++# endif +++#endif +++ +++#ifndef RELRO_SPEC +++# ifdef DIST_DEFAULT_RELRO +++# define RELRO_SPEC " -z relro " +++# else +++# define RELRO_SPEC "" +++# endif +++#endif +++ +++/* Don't enable any of those for the offload compilers, +++ unsupported. */ +++#if !defined(DISTRO_DEFAULT_SPEC) && !defined(ACCEL_COMPILER) +++# define DISTRO_DEFAULT_SPEC ASYNC_UNWIND_SPEC SSP_DEFAULT_SPEC \ +++ FORMAT_SECURITY_SPEC STACK_CLASH_SPEC CF_PROTECTION_SPEC +++#else +++# define DISTRO_DEFAULT_SPEC "" +++#endif +++#if !defined(DISTRO_DEFAULT_LINK_SPEC) && !defined(ACCEL_COMPILER) +++# define DISTRO_DEFAULT_LINK_SPEC RELRO_SPEC +++#else +++# define DISTRO_DEFAULT_LINK_SPEC "" +++#endif +++ ++ #ifndef LINK_SSP_SPEC ++ #ifdef TARGET_LIBC_PROVIDES_SSP ++ #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ ++@@ -1042,7 +1131,7 @@ proper position among the other output f ++ #ifndef LINK_PIE_SPEC ++ #ifdef HAVE_LD_PIE ++ #ifndef LD_PIE_SPEC ++-#define LD_PIE_SPEC "-pie" +++#define LD_PIE_SPEC "-pie" BIND_NOW_SPEC ++ #endif ++ #else ++ #define LD_PIE_SPEC "" ++@@ -1159,6 +1248,7 @@ proper position among the other output f ++ "%{flto|flto=*:%/ instead? */ +++#include "distro-defaults.h" +++ ++ #ifndef TARGET_OS_CPP_BUILTINS ++ # define TARGET_OS_CPP_BUILTINS() ++ #endif ++@@ -1510,6 +1515,12 @@ c_cpp_builtins (cpp_reader *pfile) ++ builtin_define_with_value ("__REGISTER_PREFIX__", REGISTER_PREFIX, 0); ++ builtin_define_with_value ("__USER_LABEL_PREFIX__", user_label_prefix, 0); ++ +++#ifdef DIST_DEFAULT_FORTIFY_SOURCE +++ /* Fortify Source enabled by default for optimization levels > 0 */ +++ if (optimize) +++ builtin_define_with_int_value ("_FORTIFY_SOURCE", DIST_DEFAULT_FORTIFY_SOURCE); +++#endif +++ ++ /* Misc. */ ++ if (flag_gnu89_inline) ++ cpp_define (pfile, "__GNUC_GNU_INLINE__"); diff --cc debian/patches/gcc-driver-extra-langs.diff index 0000000,0000000..ffda645 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-driver-extra-langs.diff @@@ -1,0 -1,0 +1,20 @@@ ++# DP: Add options and specs for languages that are not built from a source ++# DP: (but built from separate sources). ++ ++--- ++ gcc/Makefile.in | 4 ++-- ++ 1 files changed, 2 insertions(+), 2 deletions(-) ++ ++--- a/src/gcc/Makefile.in +++++ b/src/gcc/Makefile.in ++@@ -581,8 +581,8 @@ xm_include_list=@xm_include_list@ ++ xm_defines=@xm_defines@ ++ lang_checks= ++ lang_checks_parallelized= ++-lang_opt_files=@lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt $(srcdir)/params.opt $(srcdir)/analyzer/analyzer.opt ++-lang_specs_files=@lang_specs_files@ +++lang_opt_files=@lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt $(srcdir)/params.opt $(srcdir)/analyzer/analyzer.opt $(foreach lang,$(subst ada,ada/gcc-interface,$(debian_extra_langs)),$(srcdir)/$(lang)/lang.opt) +++lang_specs_files=@lang_specs_files@ $(foreach lang,$(subst ada,ada/gcc-interface,$(debian_extra_langs)),$(srcdir)/$(lang)/lang-specs.h) ++ lang_tree_files=@lang_tree_files@ ++ target_cpu_default=@target_cpu_default@ ++ OBJC_BOEHM_GC=@objc_boehm_gc@ diff --cc debian/patches/gcc-foffload-default.diff index 0000000,0000000..644c3fa new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-foffload-default.diff @@@ -1,0 -1,0 +1,120 @@@ ++# DP: Allow setting offload targets by OFFLOAD_TARGET_DEFAULT ++ ++https://src.fedoraproject.org/rpms/gcc/raw/rawhide/f/gcc11-foffload-default.patch ++ ++2019-01-17 Jakub Jelinek ++ ++ * gcc.c (offload_targets_default): New variable. ++ (process_command): Set it if -foffload is defaulted. ++ (driver::maybe_putenv_OFFLOAD_TARGETS): Add OFFLOAD_TARGET_DEFAULT=1 ++ into environment if -foffload has been defaulted. ++ * lto-wrapper.c (OFFLOAD_TARGET_DEFAULT_ENV): Define. ++ (compile_offload_image): If OFFLOAD_TARGET_DEFAULT ++ is in the environment, don't fail if corresponding mkoffload ++ can't be found. ++ (compile_images_for_offload_targets): Likewise. Free and clear ++ offload_names if no valid offload is found. ++libgomp/ ++ * target.c (gomp_load_plugin_for_device): If a plugin can't be ++ dlopened, assume it has no devices silently. ++ ++--- a/src/gcc/gcc.c +++++ b/src/gcc/gcc.c ++@@ -324,6 +324,10 @@ static const char *spec_host_machine = D ++ ++ static char *offload_targets = NULL; ++ +++/* Set to true if -foffload has not been used and offload_targets +++ is set to the configured in default. */ +++static bool offload_targets_default; +++ ++ /* Nonzero if cross-compiling. ++ When -b is used, the value comes from the `specs' file. */ ++ ++@@ -5058,7 +5062,10 @@ process_command (unsigned int decoded_op ++ /* If the user didn't specify any, default to all configured offload ++ targets. */ ++ if (ENABLE_OFFLOADING && offload_targets == NULL) ++- handle_foffload_option (OFFLOAD_TARGETS); +++ { +++ handle_foffload_option (OFFLOAD_TARGETS); +++ offload_targets_default = true; +++ } ++ ++ /* Handle -gtoggle as it would later in toplev.c:process_options to ++ make the debug-level-gt spec function work as expected. */ ++@@ -8758,6 +8765,8 @@ driver::maybe_putenv_OFFLOAD_TARGETS () ++ obstack_grow (&collect_obstack, offload_targets, ++ strlen (offload_targets) + 1); ++ xputenv (XOBFINISH (&collect_obstack, char *)); +++ if (offload_targets_default) +++ xputenv ("OFFLOAD_TARGET_DEFAULT=1"); ++ } ++ ++ free (offload_targets); ++--- a/src/gcc/lto-wrapper.c +++++ b/src/gcc/lto-wrapper.c ++@@ -52,6 +52,7 @@ along with GCC; see the file COPYING3. ++ /* Environment variable, used for passing the names of offload targets from GCC ++ driver to lto-wrapper. */ ++ #define OFFLOAD_TARGET_NAMES_ENV "OFFLOAD_TARGET_NAMES" +++#define OFFLOAD_TARGET_DEFAULT_ENV "OFFLOAD_TARGET_DEFAULT" ++ ++ /* By default there is no special suffix for target executables. */ ++ #ifdef TARGET_EXECUTABLE_SUFFIX ++@@ -907,6 +908,12 @@ compile_offload_image (const char *targe ++ break; ++ } ++ +++ if (!compiler && getenv (OFFLOAD_TARGET_DEFAULT_ENV)) +++ { +++ free_array_of_ptrs ((void **) paths, n_paths); +++ return NULL; +++ } +++ ++ if (!compiler) ++ fatal_error (input_location, ++ "could not find %s in %s (consider using %<-B%>)", ++@@ -976,6 +983,7 @@ compile_images_for_offload_targets (unsi ++ if (!target_names) ++ return; ++ unsigned num_targets = parse_env_var (target_names, &names, NULL); +++ int next_name_entry = 0; ++ ++ const char *compiler_path = getenv ("COMPILER_PATH"); ++ if (!compiler_path) ++@@ -986,13 +994,19 @@ compile_images_for_offload_targets (unsi ++ offload_names = XCNEWVEC (char *, num_targets + 1); ++ for (unsigned i = 0; i < num_targets; i++) ++ { ++- offload_names[i] +++ offload_names[next_name_entry] ++ = compile_offload_image (names[i], compiler_path, in_argc, in_argv, ++ compiler_opts, compiler_opt_count, ++ linker_opts, linker_opt_count); ++- if (!offload_names[i]) ++- fatal_error (input_location, ++- "problem with building target image for %s", names[i]); +++ if (!offload_names[next_name_entry]) +++ continue; +++ next_name_entry++; +++ } +++ +++ if (next_name_entry == 0) +++ { +++ free (offload_names); +++ offload_names = NULL; ++ } ++ ++ out: ++--- a/src/libgomp/target.c +++++ b/src/libgomp/target.c ++@@ -3173,7 +3173,7 @@ gomp_load_plugin_for_device (struct gomp ++ ++ void *plugin_handle = dlopen (plugin_name, RTLD_LAZY); ++ if (!plugin_handle) ++- goto dl_fail; +++ return 0; ++ ++ /* Check if all required functions are available in the plugin and store ++ their handlers. None of the symbols can legitimately be NULL, diff --cc debian/patches/gcc-force-cross-layout.diff index 0000000,0000000..996c8bd new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-force-cross-layout.diff @@@ -1,0 -1,0 +1,49 @@@ ++# DP: Add FORCE_CROSS_LAYOUT env var to force a cross directory layout. ++ ++--- a/src/configure.ac +++++ b/src/configure.ac ++@@ -3297,7 +3297,7 @@ target_configargs="$target_configargs ${ ++ # native. However, it would be better to use other mechanisms to make the ++ # sorts of decisions they want to make on this basis. Please consider ++ # this option to be deprecated. FIXME. ++-if test x${is_cross_compiler} = xyes ; then +++if test x${is_cross_compiler} = xyes || test x${FORCE_CROSS_LAYOUT} = xyes; then ++ target_configargs="--with-cross-host=${host_noncanonical} ${target_configargs}" ++ fi ++ ++--- a/src/gcc/configure.ac +++++ b/src/gcc/configure.ac ++@@ -2431,14 +2431,14 @@ SYSTEM_HEADER_DIR='$(NATIVE_SYSTEM_HEADE ++ BUILD_SYSTEM_HEADER_DIR=$SYSTEM_HEADER_DIR AC_SUBST(BUILD_SYSTEM_HEADER_DIR) ++ ++ if test x$host != x$target || test "x$TARGET_SYSTEM_ROOT" != x || ++- test x$build != x$host || test "x$with_build_sysroot" != x; then +++ test x$build != x$host || test "x$with_build_sysroot" != x || test x$FORCE_CROSS_LAYOUT = xyes; then ++ if test "x$with_build_sysroot" != x; then ++ BUILD_SYSTEM_HEADER_DIR=$with_build_sysroot'$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)' ++ else ++ BUILD_SYSTEM_HEADER_DIR='$(CROSS_SYSTEM_HEADER_DIR)' ++ fi ++ ++- if test x$host != x$target +++ if test x$host != x$target || test x$FORCE_CROSS_LAYOUT = xyes ++ then ++ CROSS="-DCROSS_DIRECTORY_STRUCTURE" ++ ALL=all.cross ++@@ -7488,14 +7488,14 @@ AC_SUBST_FILE(language_hooks) ++ ++ # Echo link setup. ++ if test x${build} = x${host} ; then ++- if test x${host} = x${target} ; then +++ if test x${host} = x${target} && test x$FORCE_CROSS_LAYOUT != xyes ; then ++ echo "Links are now set up to build a native compiler for ${target}." 1>&2 ++ else ++ echo "Links are now set up to build a cross-compiler" 1>&2 ++ echo " from ${host} to ${target}." 1>&2 ++ fi ++ else ++- if test x${host} = x${target} ; then +++ if test x${host} = x${target} && test x$FORCE_CROSS_LAYOUT != xyes ; then ++ echo "Links are now set up to build (on ${build}) a native compiler" 1>&2 ++ echo " for ${target}." 1>&2 ++ else diff --cc debian/patches/gcc-gfdl-build.diff index 0000000,0000000..c667cef new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-gfdl-build.diff @@@ -1,0 -1,0 +1,38 @@@ ++# DP: Build a dummy s-tm-texi without access to the texinfo sources ++ ++--- a/src/gcc/Makefile.in +++++ b/src/gcc/Makefile.in ++@@ -2605,31 +2605,8 @@ s-tm-texi: $(srcdir)/doc/../doc/tm.texi ++ # \r is not portable to Solaris tr, therefore we have a special ++ # case for ASCII. We use \r for other encodings like EBCDIC. ++ s-tm-texi: build/genhooks$(build_exeext) $(srcdir)/doc/tm.texi.in ++- $(RUN_GEN) build/genhooks$(build_exeext) -d \ ++- $(srcdir)/doc/tm.texi.in > tmp-tm.texi ++- case `echo X|tr X '\101'` in \ ++- A) tr -d '\015' < tmp-tm.texi > tmp2-tm.texi ;; \ ++- *) tr -d '\r' < tmp-tm.texi > tmp2-tm.texi ;; \ ++- esac ++- mv tmp2-tm.texi tmp-tm.texi ++- $(SHELL) $(srcdir)/../move-if-change tmp-tm.texi tm.texi ++- @if cmp -s $(srcdir)/doc/tm.texi tm.texi; then \ ++- $(STAMP) $@; \ ++- elif test $(srcdir)/doc/tm.texi -nt $(srcdir)/doc/tm.texi.in \ ++- && ( test $(srcdir)/doc/tm.texi -nt $(srcdir)/target.def \ ++- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/c-family/c-target.def \ ++- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/common/common-target.def \ ++- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/d/d-target.def \ ++- ); then \ ++- echo >&2 ; \ ++- echo You should edit $(srcdir)/doc/tm.texi.in rather than $(srcdir)/doc/tm.texi . >&2 ; \ ++- false; \ ++- else \ ++- echo >&2 ; \ ++- echo Verify that you have permission to grant a GFDL license for all >&2 ; \ ++- echo new text in $(objdir)/tm.texi, then copy it to $(srcdir)/doc/tm.texi. >&2 ; \ ++- false; \ ++- fi +++ cat $(srcdir)/doc/tm.texi.in > tmp-tm.texi +++ $(STAMP) $@ ++ ++ gimple-match.cc: s-match gimple-match-head.cc ; @true ++ generic-match.cc: s-match generic-match-head.cc ; @true diff --cc debian/patches/gcc-hash-style-gnu.diff index 0000000,0000000..a7bb671 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-hash-style-gnu.diff @@@ -1,0 -1,0 +1,164 @@@ ++# DP: Link using --hash-style=gnu (aarch64, alpha, amd64, armel, armhf, ia64, ++# DP: i386, powerpc, ppc64, riscv64, s390, sparc) ++ ++2006-07-11 Jakub Jelinek ++ ++ * config/i386/linux.h (LINK_SPEC): Add --hash-style=gnu. ++ * config/i386/linux64.h (LINK_SPEC): Likewise. ++ * config/rs6000/sysv4.h (LINK_OS_LINUX_SPEC): Likewise. ++ * config/rs6000/linux64.h (LINK_OS_LINUX_SPEC32, ++ LINK_OS_LINUX_SPEC64): Likewise. ++ * config/s390/linux.h (LINK_SPEC): Likewise. ++ * config/ia64/linux.h (LINK_SPEC): Likewise. ++ * config/sparc/linux.h (LINK_SPEC): Likewise. ++ * config/sparc/linux64.h (LINK_SPEC, LINK_ARCH32_SPEC, ++ LINK_ARCH64_SPEC): Likewise. ++ * config/alpha/linux-elf.h (LINK_SPEC): Likewise. ++ ++2009-12-21 Matthias Klose ++ ++ * config/arm/linux-elf.h (LINK_SPEC): Add --hash-style=gnu. ++ ++2012-11-17 Matthias Klose ++ ++ * config/aarch64/aarch64-linux.h (LINK_SPEC): Add --hash-style=gnu. ++ ++2018-03-02 Aurelien Jarno ++ ++ * config/riscv/linux.h (LINK_SPEC): Add --hash-style=gnu. ++ ++--- ++ gcc/config/alpha/linux-elf.h | 2 +- ++ gcc/config/i386/linux.h | 2 +- ++ gcc/config/i386/linux64.h | 2 +- ++ gcc/config/ia64/linux.h | 2 +- ++ gcc/config/rs6000/linux64.h | 4 ++-- ++ gcc/config/rs6000/sysv4.h | 2 +- ++ gcc/config/s390/linux.h | 2 +- ++ gcc/config/sparc/linux.h | 2 +- ++ 8 files changed, 9 insertions(+), 9 deletions(-) ++ ++--- a/src/gcc/config/alpha/linux-elf.h +++++ b/src/gcc/config/alpha/linux-elf.h ++@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3. ++ ++ #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER ++ ++-#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \ +++#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{G*} %{relax:-relax} \ ++ %{O*:-O3} %{!O*:-O1} \ ++ %{shared:-shared} \ ++ %{!shared: \ ++--- a/src/gcc/config/ia64/linux.h +++++ b/src/gcc/config/ia64/linux.h ++@@ -58,7 +58,7 @@ do { \ ++ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" ++ ++ #undef LINK_SPEC ++-#define LINK_SPEC "\ +++#define LINK_SPEC " --hash-style=gnu \ ++ %{shared:-shared} \ ++ %{!shared: \ ++ %{!static: \ ++--- a/src/gcc/config/rs6000/linux64.h +++++ b/src/gcc/config/rs6000/linux64.h ++@@ -377,13 +377,13 @@ extern int dot_symbols; ++ " -m elf64ppc") ++ #endif ++ ++-#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " %{!shared: %{!static: \ +++#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=gnu %{!shared: %{!static: \ ++ %{!static-pie: \ ++ %{rdynamic:-export-dynamic} \ ++ -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}} \ ++ %(link_os_extra_spec32)" ++ ++-#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " %{!shared: %{!static: \ +++#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=gnu %{!shared: %{!static: \ ++ %{!static-pie: \ ++ %{rdynamic:-export-dynamic} \ ++ -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}} \ ++--- a/src/gcc/config/rs6000/sysv4.h +++++ b/src/gcc/config/rs6000/sysv4.h ++@@ -788,7 +788,7 @@ GNU_USER_TARGET_CC1_SPEC ++ #define GNU_USER_DYNAMIC_LINKER GLIBC_DYNAMIC_LINKER ++ #endif ++ ++-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \ +++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ ++ %{rdynamic:-export-dynamic} \ ++ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" ++ ++--- a/src/gcc/config/s390/linux.h +++++ b/src/gcc/config/s390/linux.h ++@@ -82,7 +82,7 @@ along with GCC; see the file COPYING3. ++ ++ #undef LINK_SPEC ++ #define LINK_SPEC \ ++- "%{m31:-m elf_s390}%{m64:-m elf64_s390} \ +++ "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu \ ++ %{shared:-shared} \ ++ %{!shared: \ ++ %{static:-static} \ ++--- a/src/gcc/config/sparc/linux.h +++++ b/src/gcc/config/sparc/linux.h ++@@ -81,7 +81,7 @@ extern const char *host_detect_local_cpu ++ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" ++ ++ #undef LINK_SPEC ++-#define LINK_SPEC "-m elf32_sparc %{shared:-shared} \ +++#define LINK_SPEC "-m elf32_sparc --hash-style=gnu %{shared:-shared} \ ++ %{!mno-relax:%{!r:-relax}} \ ++ %{!shared: \ ++ %{!static: \ ++--- a/src/gcc/config/arm/linux-elf.h +++++ b/src/gcc/config/arm/linux-elf.h ++@@ -70,6 +70,7 @@ ++ %{rdynamic:-export-dynamic} \ ++ %{!shared:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \ ++ -X \ +++ --hash-style=gnu \ ++ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ ++ SUBTARGET_EXTRA_LINK_SPEC ++ ++--- a/src/gcc/config/i386/gnu-user.h +++++ b/src/gcc/config/i386/gnu-user.h ++@@ -68,7 +68,7 @@ along with GCC; see the file COPYING3. ++ { "link_emulation", GNU_USER_LINK_EMULATION },\ ++ { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } ++ ++-#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ +++#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \ ++ %{!shared: \ ++ %{!static: \ ++ %{!static-pie: \ ++--- a/src/gcc/config/i386/gnu-user64.h +++++ b/src/gcc/config/i386/gnu-user64.h ++@@ -56,6 +56,7 @@ see the files COPYING3 and COPYING.RUNTI ++ "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \ ++ %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ ++ %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ +++ --hash-style=gnu \ ++ %{shared:-shared} \ ++ %{!shared: \ ++ %{!static: \ ++--- a/src/gcc/config/aarch64/aarch64-linux.h +++++ b/src/gcc/config/aarch64/aarch64-linux.h ++@@ -35,6 +35,7 @@ ++ #define CPP_SPEC "%{pthread:-D_REENTRANT}" ++ ++ #define LINUX_TARGET_LINK_SPEC "%{h*} \ +++ --hash-style=gnu \ ++ %{static:-Bstatic} \ ++ %{shared:-shared} \ ++ %{symbolic:-Bsymbolic} \ ++--- a/src/gcc/config/riscv/linux.h +++++ b/src/gcc/config/riscv/linux.h ++@@ -58,6 +58,7 @@ along with GCC; see the file COPYING3. ++ "%{mabi=ilp32:_ilp32}" ++ ++ #define LINK_SPEC "\ +++-hash-style=gnu \ ++ -melf" XLEN_SPEC DEFAULT_ENDIAN_SPEC "riscv" LD_EMUL_SUFFIX " \ ++ %{mno-relax:--no-relax} \ ++ %{mbig-endian:-EB} \ diff --cc debian/patches/gcc-ice-apport.diff index 0000000,0000000..7480428 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-ice-apport.diff @@@ -1,0 -1,0 +1,22 @@@ ++# DP: Report an ICE to apport (if apport is available ++# DP: and the environment variable GCC_NOAPPORT is not set) ++ ++--- a/src/gcc/gcc.cc +++++ b/src/gcc/gcc.cc ++@@ -8109,6 +8109,16 @@ do_report_bug (const char **new_argv, co ++ fflush(stderr); ++ free(cmd); ++ } +++ if (!env.get ("GCC_NOAPPORT") +++ && !access ("/usr/share/apport/gcc_ice_hook", R_OK | X_OK)) +++ { +++ char *cmd = XNEWVEC (char, 50 + strlen (*out_file) +++ + strlen (new_argv[0])); +++ sprintf (cmd, "/usr/share/apport/gcc_ice_hook %s %s", +++ new_argv[0], *out_file); +++ system (cmd); +++ free (cmd); +++ } ++ /* Make sure it is not deleted. */ ++ free (*out_file); ++ *out_file = NULL; diff --cc debian/patches/gcc-ice-dump.diff index 0000000,0000000..f82ab53 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-ice-dump.diff @@@ -1,0 -1,0 +1,39 @@@ ++# DP: For ICEs, dump the preprocessed source file to stderr ++# DP: when in a distro build environment. ++ ++--- a/src/gcc/gcc.cc +++++ b/src/gcc/gcc.cc ++@@ -3665,7 +3665,8 @@ execute (void) ++ /* For ICEs in cc1, cc1obj, cc1plus see if it is ++ reproducible or not. */ ++ const char *p; ++- if (flag_report_bug +++ const char *deb_build_options = env.get("DEB_BUILD_OPTIONS"); +++ if ((flag_report_bug || deb_build_options) ++ && WEXITSTATUS (status) == ICE_EXIT_CODE ++ && i == 0 ++ && (p = strrchr (commands[0].argv[0], DIR_SEPARATOR)) ++@@ -8091,8 +8092,23 @@ do_report_bug (const char **new_argv, co ++ ++ if (status == ATTEMPT_STATUS_SUCCESS) ++ { +++ const char *deb_build_options = env.get("DEB_BUILD_OPTIONS"); +++ ++ fnotice (stderr, "Preprocessed source stored into %s file," ++ " please attach this to your bugreport.\n", *out_file); +++ if (deb_build_options) +++ { +++ char *cmd = XNEWVEC (char, 50 + strlen (*out_file)); +++ +++ sprintf(cmd, "/usr/bin/awk '{print \"%d:\", $0}' %s >&2", getpid(), *out_file); +++ fprintf(stderr, "=== BEGIN GCC DUMP ===\n"); +++ fflush(stderr); +++ system(cmd); +++ fflush(stderr); +++ fprintf(stderr, "=== END GCC DUMP ===\n"); +++ fflush(stderr); +++ free(cmd); +++ } ++ /* Make sure it is not deleted. */ ++ free (*out_file); ++ *out_file = NULL; diff --cc debian/patches/gcc-multiarch.diff index 0000000,0000000..3153376 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-multiarch.diff @@@ -1,0 -1,0 +1,232 @@@ ++# DP: - Remaining multiarch patches, not yet submitted upstream. ++# DP: - Add MULTIARCH_DIRNAME definitions for multilib configurations, ++# DP: which are used for the non-multilib builds. ++ ++2013-06-12 Matthias Klose ++ ++ * config/i386/t-linux64: Set MULTIARCH_DIRNAME. ++ * config/i386/t-kfreebsd: Set MULTIARCH_DIRNAME. ++ * config.gcc (i[34567]86-*-linux* | x86_64-*-linux*): Prepend ++ i386/t-linux to $tmake_file; ++ set default ABI to N64 for mips64el. ++ * config/mips/t-linux64: Set MULTIARCH_DIRNAME. ++ * config/rs6000/t-linux64: Set MULTIARCH_DIRNAME. ++ * config/s390/t-linux64: Set MULTIARCH_DIRNAME. ++ * config/sparc/t-linux64: Set MULTIARCH_DIRNAME. ++ * src/gcc/config/mips/mips.h: (/usr)/lib as default path. ++ ++--- a/src/gcc/config/sh/t-linux +++++ b/src/gcc/config/sh/t-linux ++@@ -1,3 +1,11 @@ ++ MULTILIB_DIRNAMES= ++ MULTILIB_MATCHES= +++ +++ifneq (,$(findstring sh4,$(target))) +++MULTILIB_OSDIRNAMES = .:sh4-linux-gnu sh4_nofpu-linux-gnu:sh4-linux-gnu +++MULTIARCH_DIRNAME = $(call if_multiarch,sh4-linux-gnu) +++else +++MULTILIB_OSDIRNAMES = .:sh3-linux-gnu sh3_nofpu-linux-gnu:sh3-linux-gnu +++MULTIARCH_DIRNAME = $(call if_multiarch,sh3-linux-gnu) +++endif ++ MULTILIB_EXCEPTIONS=m1 mb/m1 m2a ++--- a/src/gcc/config/sparc/t-linux64 +++++ b/src/gcc/config/sparc/t-linux64 ++@@ -27,3 +27,5 @@ MULTILIB_OPTIONS = m64/m32 ++ MULTILIB_DIRNAMES = 64 32 ++ MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu) ++ MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu) +++ +++MULTIARCH_DIRNAME = $(call if_multiarch,sparc$(if $(findstring 64,$(target)),64)-linux-gnu) ++--- a/src/gcc/config/s390/t-linux64 +++++ b/src/gcc/config/s390/t-linux64 ++@@ -9,3 +9,5 @@ MULTILIB_OPTIONS = m64/m31 ++ MULTILIB_DIRNAMES = 64 32 ++ MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) ++ MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) +++ +++MULTIARCH_DIRNAME = $(call if_multiarch,s390$(if $(findstring s390x,$(target)),x)-linux-gnu) ++--- a/src/gcc/config/rs6000/t-linux64 +++++ b/src/gcc/config/rs6000/t-linux64 ++@@ -31,6 +31,8 @@ MULTILIB_EXTRA_OPTS := ++ MULTILIB_OSDIRNAMES := m64=../lib64$(call if_multiarch,:powerpc64-linux-gnu) ++ MULTILIB_OSDIRNAMES += m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) ++ +++MULTIARCH_DIRNAME = $(call if_multiarch,powerpc$(if $(findstring 64,$(target)),64)-linux-gnu) +++ ++ rs6000-linux.o: $(srcdir)/config/rs6000/rs6000-linux.cc ++ $(COMPILE) $< ++ $(POSTCOMPILE) ++--- a/src/gcc/config/i386/t-linux64 +++++ b/src/gcc/config/i386/t-linux64 ++@@ -36,3 +36,13 @@ MULTILIB_DIRNAMES = $(patsubst m%, %, ++ MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) ++ MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) ++ MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32) +++ +++ifneq (,$(findstring x86_64,$(target))) +++ ifneq (,$(findstring biarchx32.h,$(tm_include_list))) +++ MULTIARCH_DIRNAME = $(call if_multiarch,x86_64-linux-gnux32) +++ else +++ MULTIARCH_DIRNAME = $(call if_multiarch,x86_64-linux-gnu) +++ endif +++else +++ MULTIARCH_DIRNAME = $(call if_multiarch,i386-linux-gnu) +++endif ++--- a/src/gcc/config/i386/t-kfreebsd +++++ b/src/gcc/config/i386/t-kfreebsd ++@@ -1,5 +1,9 @@ ++-MULTIARCH_DIRNAME = $(call if_multiarch,i386-kfreebsd-gnu) +++ifeq (,$(MULTIARCH_DIRNAME)) +++ MULTIARCH_DIRNAME = $(call if_multiarch,i386-kfreebsd-gnu) +++endif ++ ++ # MULTILIB_OSDIRNAMES are set in t-linux64. ++ KFREEBSD_OS = $(filter kfreebsd%, $(word 3, $(subst -, ,$(target)))) ++ MULTILIB_OSDIRNAMES := $(filter-out mx32=%,$(subst linux,$(KFREEBSD_OS),$(MULTILIB_OSDIRNAMES))) +++ +++MULTIARCH_DIRNAME := $(subst linux,$(KFREEBSD_OS),$(MULTIARCH_DIRNAME)) ++--- a/src/gcc/config/mips/t-linux64 +++++ b/src/gcc/config/mips/t-linux64 ++@@ -18,9 +18,22 @@ ++ ++ MULTILIB_OPTIONS = mabi=n32/mabi=32/mabi=64 ++ MULTILIB_DIRNAMES = n32 32 64 +++MIPS_R6 = $(if $(findstring r6, $(firstword $(subst -, ,$(target)))),r6) +++MIPS_32 = $(if $(findstring r6, $(firstword $(subst -, ,$(target)))),32) +++MIPS_ISA = $(if $(findstring r6, $(firstword $(subst -, ,$(target)))),isa) ++ MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el) ++ MIPS_SOFT = $(if $(strip $(filter MASK_SOFT_FLOAT_ABI, $(target_cpu_default)) $(filter soft, $(with_float))),soft) ++ MULTILIB_OSDIRNAMES = \ ++ ../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ ++ ../lib$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ ++ ../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +++ +++ifneq (,$(findstring abin32,$(target))) +++MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) +++else +++ifneq (,$(findstring abi64,$(target))) +++MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +++else +++MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) +++endif +++endif ++--- a/src/gcc/config.gcc +++++ b/src/gcc/config.gcc ++@@ -2574,6 +2574,11 @@ mips*-*-linux*) # Linux MIPS, either ++ default_mips_arch=mips64r6 ++ enable_mips_multilibs="yes" ++ ;; +++ mipsisa64r6*-*-linux-gnuabi64) +++ default_mips_abi=64 +++ default_mips_arch=mips64r6 +++ enable_mips_multilibs="yes" +++ ;; ++ mipsisa64r6*-*-linux*) ++ default_mips_abi=n32 ++ default_mips_arch=mips64r6 ++@@ -2593,6 +2598,10 @@ mips*-*-linux*) # Linux MIPS, either ++ default_mips_abi=64 ++ enable_mips_multilibs="yes" ++ ;; +++ mips64*-*-linux-gnuabi64 | mipsisa64*-*-linux-gnuabi64) +++ default_mips_abi=64 +++ enable_mips_multilibs="yes" +++ ;; ++ mips64*-*-linux* | mipsisa64*-*-linux*) ++ default_mips_abi=n32 ++ enable_mips_multilibs="yes" ++@@ -3631,6 +3640,16 @@ case ${target} in ++ ;; ++ esac ++ +++# non-glibc systems +++case ${target} in +++*-linux-musl*) +++ tmake_file="${tmake_file} t-musl" +++ ;; +++*-linux-uclibc*) +++ tmake_file="${tmake_file} t-uclibc" +++ ;; +++esac +++ ++ # Build mkoffload tool ++ case ${target} in ++ *-intelmic-* | *-intelmicemul-*) ++@@ -5704,7 +5723,7 @@ case ${target} in ++ ;; ++ i[34567]86-*-linux* | x86_64-*-linux*) ++ extra_objs="${extra_objs} gnu-property.o" ++- tmake_file="$tmake_file i386/t-linux i386/t-gnu-property" +++ tmake_file="i386/t-linux $tmake_file i386/t-gnu-property" ++ ;; ++ i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu) ++ tmake_file="$tmake_file i386/t-kfreebsd" ++--- a/src/gcc/config/mips/mips.h +++++ b/src/gcc/config/mips/mips.h ++@@ -3440,16 +3440,6 @@ struct GTY(()) machine_function { ++ #define PMODE_INSN(NAME, ARGS) \ ++ (Pmode == SImode ? NAME ## _si ARGS : NAME ## _di ARGS) ++ ++-/* If we are *not* using multilibs and the default ABI is not ABI_32 we ++- need to change these from /lib and /usr/lib. */ ++-#if MIPS_ABI_DEFAULT == ABI_N32 ++-#define STANDARD_STARTFILE_PREFIX_1 "/lib32/" ++-#define STANDARD_STARTFILE_PREFIX_2 "/usr/lib32/" ++-#elif MIPS_ABI_DEFAULT == ABI_64 ++-#define STANDARD_STARTFILE_PREFIX_1 "/lib64/" ++-#define STANDARD_STARTFILE_PREFIX_2 "/usr/lib64/" ++-#endif ++- ++ /* Load store bonding is not supported by micromips and fix_24k. The ++ performance can be degraded for those targets. Hence, do not bond for ++ micromips or fix_24k. */ ++--- a/src/gcc/config/tilegx/t-tilegx +++++ b/src/gcc/config/tilegx/t-tilegx ++@@ -1,6 +1,7 @@ ++ MULTILIB_OPTIONS = m64/m32 ++ MULTILIB_DIRNAMES = 64 32 ++-MULTILIB_OSDIRNAMES = ../lib ../lib32 +++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:tilegx-linux-gnu) ../lib32$(call if_multiarch,:tilegx32-linux-gnu) +++MULTIARCH_DIRNAME = $(call if_multiarch,tilegx-linux-gnu) ++ ++ LIBGCC = stmp-multilib ++ INSTALL_LIBGCC = install-multilib ++--- a/src/gcc/config/riscv/t-linux +++++ b/src/gcc/config/riscv/t-linux ++@@ -1,3 +1,5 @@ ++ # Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/ ++ MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) ++ MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) +++ +++MULTIARCH_DIRNAME := $(call if_multiarch,$(firstword $(subst -, ,$(target)))-linux-gnu) ++--- a/src/gcc/Makefile.in +++++ b/src/gcc/Makefile.in ++@@ -545,7 +545,7 @@ BUILD_SYSTEM_HEADER_DIR = `echo @BUILD_S ++ STMP_FIXINC = @STMP_FIXINC@ ++ ++ # Test to see whether exists in the system header files. ++-LIMITS_H_TEST = [ -f $(BUILD_SYSTEM_HEADER_DIR)/limits.h ] +++LIMITS_H_TEST = [ -f $(BUILD_SYSTEM_HEADER_DIR)/limits.h -o -f $(BUILD_SYSTEM_HEADER_DIR)/$(MULTIARCH_DIRNAME)/limits.h ] ++ ++ # Directory for prefix to system directories, for ++ # each of $(system_prefix)/usr/include, $(system_prefix)/usr/lib, etc. ++--- a/src/gcc/config/aarch64/t-aarch64-linux +++++ b/src/gcc/config/aarch64/t-aarch64-linux ++@@ -22,7 +22,7 @@ LIB1ASMSRC = aarch64/lib1funcs.asm ++ LIB1ASMFUNCS = _aarch64_sync_cache_range ++ ++ AARCH_BE = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1, $(tm_defines)),_be) ++-MULTILIB_OSDIRNAMES = mabi.lp64=../lib64$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu) +++MULTILIB_OSDIRNAMES = mabi.lp64=../lib$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu) ++ MULTIARCH_DIRNAME = $(call if_multiarch,aarch64$(AARCH_BE)-linux-gnu) ++ ++ MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu_ilp32) ++--- a/src/gcc/config/arc/t-multilib-linux +++++ b/src/gcc/config/arc/t-multilib-linux ++@@ -23,3 +23,6 @@ MULTILIB_DIRNAMES = hs archs hs38 hs38_l ++ # Aliases: ++ MULTILIB_MATCHES += mcpu?arc700=mA7 ++ MULTILIB_MATCHES += mcpu?arc700=mARC700 +++ +++MULTILIB_OSDIRNAMES = +++MULTIARCH_DIRNAME = $(call if_multiarch,arc-linux-gnu) diff --cc debian/patches/gcc-multilib-multiarch.diff index 0000000,0000000..adc91df new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-multilib-multiarch.diff @@@ -1,0 -1,0 +1,143 @@@ ++# DP: Don't auto-detect multilib osdirnames. ++ ++--- a/src/gcc/config/sparc/t-linux64 +++++ b/src/gcc/config/sparc/t-linux64 ++@@ -25,7 +25,12 @@ ++ ++ MULTILIB_OPTIONS = m64/m32 ++ MULTILIB_DIRNAMES = 64 32 +++ifneq (,$(findstring sparc64,$(target))) +++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:sparc64-linux-gnu) +++MULTILIB_OSDIRNAMES += ../lib32$(call if_multiarch,:sparc-linux-gnu) +++else ++ MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu) ++-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu) +++MULTILIB_OSDIRNAMES += ../lib$(call if_multiarch,:sparc-linux-gnu) +++endif ++ ++ MULTIARCH_DIRNAME = $(call if_multiarch,sparc$(if $(findstring 64,$(target)),64)-linux-gnu) ++--- a/src/gcc/config/s390/t-linux64 +++++ b/src/gcc/config/s390/t-linux64 ++@@ -7,7 +7,12 @@ ++ ++ MULTILIB_OPTIONS = m64/m31 ++ MULTILIB_DIRNAMES = 64 32 +++ifneq (,$(findstring s390x,$(target))) +++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:s390x-linux-gnu) +++MULTILIB_OSDIRNAMES += ../lib32$(call if_multiarch,:s390-linux-gnu) +++else ++ MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) ++-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) +++MULTILIB_OSDIRNAMES += ../lib$(call if_multiarch,:s390-linux-gnu) +++endif ++ ++ MULTIARCH_DIRNAME = $(call if_multiarch,s390$(if $(findstring s390x,$(target)),x)-linux-gnu) ++--- a/src/gcc/config/rs6000/t-linux64 +++++ b/src/gcc/config/rs6000/t-linux64 ++@@ -28,8 +28,13 @@ ++ MULTILIB_OPTIONS := m64/m32 ++ MULTILIB_DIRNAMES := 64 32 ++ MULTILIB_EXTRA_OPTS := +++ifneq (,$(findstring powerpc64,$(target))) +++MULTILIB_OSDIRNAMES := m64=../lib$(call if_multiarch,:powerpc64-linux-gnu) +++MULTILIB_OSDIRNAMES += m32=../lib32$(call if_multiarch,:powerpc-linux-gnu) +++else ++ MULTILIB_OSDIRNAMES := m64=../lib64$(call if_multiarch,:powerpc64-linux-gnu) ++-MULTILIB_OSDIRNAMES += m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) +++MULTILIB_OSDIRNAMES += m32=../lib$(call if_multiarch,:powerpc-linux-gnu) +++endif ++ ++ MULTIARCH_DIRNAME = $(call if_multiarch,powerpc$(if $(findstring 64,$(target)),64)-linux-gnu) ++ ++--- a/src/gcc/config/i386/t-linux64 +++++ b/src/gcc/config/i386/t-linux64 ++@@ -33,9 +33,19 @@ ++ comma=, ++ MULTILIB_OPTIONS = $(subst $(comma),/,$(TM_MULTILIB_CONFIG)) ++ MULTILIB_DIRNAMES = $(patsubst m%, %, $(subst /, ,$(MULTILIB_OPTIONS))) +++ifneq (,$(findstring gnux32,$(target))) ++ MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) ++-MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) +++MULTILIB_OSDIRNAMES+= m32=../lib32$(call if_multiarch,:i386-linux-gnu) +++MULTILIB_OSDIRNAMES+= mx32=../lib$(call if_multiarch,:x86_64-linux-gnux32) +++else ifneq (,$(findstring x86_64,$(target))) +++MULTILIB_OSDIRNAMES = m64=../lib$(call if_multiarch,:x86_64-linux-gnu) +++MULTILIB_OSDIRNAMES+= m32=../lib32$(call if_multiarch,:i386-linux-gnu) ++ MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32) +++else +++MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) +++MULTILIB_OSDIRNAMES+= m32=../lib$(call if_multiarch,:i386-linux-gnu) +++MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32) +++endif ++ ++ ifneq (,$(findstring x86_64,$(target))) ++ ifneq (,$(findstring biarchx32.h,$(tm_include_list))) ++--- a/src/gcc/config/mips/t-linux64 +++++ b/src/gcc/config/mips/t-linux64 ++@@ -23,10 +23,23 @@ MIPS_32 = $(if $(findstring r6, $(firstw ++ MIPS_ISA = $(if $(findstring r6, $(firstword $(subst -, ,$(target)))),isa) ++ MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el) ++ MIPS_SOFT = $(if $(strip $(filter MASK_SOFT_FLOAT_ABI, $(target_cpu_default)) $(filter soft, $(with_float))),soft) +++ +++ifneq (,$(findstring gnuabi64,$(target))) +++MULTILIB_OSDIRNAMES = \ +++ ../lib32$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ +++ ../libo32$(call if_multiarch,:mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ +++ ../lib$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +++else ifneq (,$(findstring gnuabin32,$(target))) +++MULTILIB_OSDIRNAMES = \ +++ ../lib$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ +++ ../libo32$(call if_multiarch,:mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ +++ ../lib64$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +++else ++ MULTILIB_OSDIRNAMES = \ ++- ../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ ++- ../lib$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ ++- ../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +++ ../lib32$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ +++ ../lib$(call if_multiarch,:mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ +++ ../lib64$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +++endif ++ ++ ifneq (,$(findstring abin32,$(target))) ++ MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) ++--- a/src/gcc/config/rs6000/t-linux +++++ b/src/gcc/config/rs6000/t-linux ++@@ -2,7 +2,7 @@ ++ # or soft-float. ++ ifeq (,$(filter $(with_cpu),$(SOFT_FLOAT_CPUS))$(findstring soft,$(with_float))) ++ ifneq (,$(findstring powerpc64,$(target))) ++-MULTILIB_OSDIRNAMES := .=../lib64$(call if_multiarch,:powerpc64-linux-gnu) +++MULTILIB_OSDIRNAMES := .=../lib$(call if_multiarch,:powerpc64-linux-gnu) ++ else ++ MULTIARCH_DIRNAME := $(call if_multiarch,powerpc-linux-gnu) ++ endif ++--- a/src/gcc/config/loongarch/t-linux +++++ b/src/gcc/config/loongarch/t-linux ++@@ -32,22 +32,19 @@ ifneq ($(call if_multiarch,yes),yes) ++ else ++ # Only define MULTIARCH_DIRNAME when multiarch is enabled, ++ # or it would always introduce ${target} into the search path. ++- MULTIARCH_DIRNAME = $(LA_MULTIARCH_TRIPLET) +++ MULTIARCH_DIRNAME = $(call if_multiarch,loongarch64-linux-gnuf64) ++ endif ++ ++ # Don't define MULTILIB_OSDIRNAMES if multilib is disabled. ++ ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),) ++ ++ MULTILIB_OSDIRNAMES = \ ++- mabi.lp64d=../lib64$\ ++- $(call if_multiarch,:loongarch64-linux-gnu) +++ mabi.lp64d=../lib$(call if_multiarch,:loongarch64-linux-gnuf64) ++ ++ MULTILIB_OSDIRNAMES += \ ++- mabi.lp64f=../lib64/f32$\ ++- $(call if_multiarch,:loongarch64-linux-gnuf32) +++ mabi.lp64f=../lib/f32$(call if_multiarch,:loongarch64-linux-gnuf32) ++ ++ MULTILIB_OSDIRNAMES += \ ++- mabi.lp64s=../lib64/sf$\ ++- $(call if_multiarch,:loongarch64-linux-gnusf) +++ mabi.lp64s=../lib/sf$(call if_multiarch,:loongarch64-linux-gnusf) ++ ++ endif diff --cc debian/patches/gcc-search-prefixed-as-ld.diff index 0000000,0000000..07bbb3f new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-search-prefixed-as-ld.diff @@@ -1,0 -1,0 +1,37 @@@ ++# DP: Search for the -as / -ld before serching for as / ld. ++ ++--- a/src/gcc/gcc.cc +++++ b/src/gcc/gcc.cc ++@@ -2904,6 +2904,7 @@ for_each_path (const struct path_prefix ++ { ++ len = paths->max_len + extra_space + 1; ++ len += MAX (MAX (suffix_len, multi_os_dir_len), multiarch_len); +++ len += MAX (strlen(DEFAULT_REAL_TARGET_MACHINE), multiarch_len) + 2; /* triplet prefix for as, ld. */ ++ path = XNEWVEC (char, len); ++ } ++ ++@@ -3117,6 +3118,24 @@ file_at_path (char *path, void *data) ++ struct file_at_path_info *info = (struct file_at_path_info *) data; ++ size_t len = strlen (path); ++ +++ /* search for the -as / -ld first. */ +++ if (! strcmp (info->name, "as") || ! strcmp (info->name, "ld")) +++ { +++ struct file_at_path_info prefix_info = *info; +++ char *prefixed_name = XNEWVEC (char, info->name_len + 2 +++ + strlen (DEFAULT_REAL_TARGET_MACHINE)); +++ strcpy (prefixed_name, DEFAULT_REAL_TARGET_MACHINE); +++ strcat (prefixed_name, "-"); +++ strcat (prefixed_name, info->name); +++ prefix_info.name = (const char *) prefixed_name; +++ prefix_info.name_len = strlen (prefixed_name); +++ if (file_at_path (path, &prefix_info)) +++ { +++ XDELETEVEC (prefixed_name); +++ return path; +++ } +++ XDELETEVEC (prefixed_name); +++ } ++ memcpy (path + len, info->name, info->name_len); ++ len += info->name_len; ++ diff --cc debian/patches/gcc-target-include-asm.diff index 0000000,0000000..20b576f new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-target-include-asm.diff @@@ -1,0 -1,0 +1,13 @@@ ++# DP: Search $(builddir)/sys-include for the asm header files ++ ++--- a/src/configure.ac +++++ b/src/configure.ac ++@@ -3438,7 +3438,7 @@ fi ++ # being built; programs in there won't even run. ++ if test "${build}" = "${host}" && test -d ${srcdir}/gcc; then ++ # Search for pre-installed headers if nothing else fits. ++- FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -B$(build_tooldir)/bin/ -B$(build_tooldir)/lib/ -isystem $(build_tooldir)/include -isystem $(build_tooldir)/sys-include' +++ FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -B$(build_tooldir)/bin/ -B$(build_tooldir)/lib/ -isystem $(build_tooldir)/include -isystem $(build_tooldir)/sys-include -isystem $(CURDIR)/sys-include' ++ fi ++ ++ if test "x${use_gnu_ld}" = x && diff --cc debian/patches/gcc-textdomain.diff index 0000000,0000000..4bdef22 new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-textdomain.diff @@@ -1,0 -1,0 +1,86 @@@ ++# DP: Set gettext's domain and textdomain to the versioned package name. ++ ++--- a/src/gcc/intl.cc +++++ b/src/gcc/intl.cc ++@@ -55,8 +55,8 @@ gcc_init_libintl (void) ++ setlocale (LC_ALL, ""); ++ #endif ++ ++- (void) bindtextdomain ("gcc", LOCALEDIR); ++- (void) textdomain ("gcc"); +++ (void) bindtextdomain ("gcc-12", LOCALEDIR); +++ (void) textdomain ("gcc-12"); ++ ++ /* Opening quotation mark. */ ++ open_quote = _("`"); ++--- a/src/gcc/Makefile.in +++++ b/src/gcc/Makefile.in ++@@ -4376,8 +4376,8 @@ install-po: ++ dir=$(localedir)/$$lang/LC_MESSAGES; \ ++ echo $(mkinstalldirs) $(DESTDIR)$$dir; \ ++ $(mkinstalldirs) $(DESTDIR)$$dir || exit 1; \ ++- echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc.mo; \ ++- $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc.mo; \ +++ echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-12.mo; \ +++ $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-12.mo; \ ++ done ++ ++ # Rule for regenerating the message template (gcc.pot). ++--- a/src/libcpp/init.cc +++++ b/src/libcpp/init.cc ++@@ -173,7 +173,7 @@ init_library (void) ++ init_trigraph_map (); ++ ++ #ifdef ENABLE_NLS ++- (void) bindtextdomain (PACKAGE, LOCALEDIR); +++ (void) bindtextdomain (PACKAGE PACKAGE_SUFFIX, LOCALEDIR); ++ #endif ++ } ++ } ++--- a/src/libcpp/system.h +++++ b/src/libcpp/system.h ++@@ -284,7 +284,7 @@ extern int errno; ++ #endif ++ ++ #ifndef _ ++-# define _(msgid) dgettext (PACKAGE, msgid) +++# define _(msgid) dgettext (PACKAGE PACKAGE_SUFFIX, msgid) ++ #endif ++ ++ #ifndef N_ ++--- a/src/libcpp/Makefile.in +++++ b/src/libcpp/Makefile.in ++@@ -49,6 +49,7 @@ LDFLAGS = @LDFLAGS@ ++ LIBICONV = @LIBICONV@ ++ LIBINTL = @LIBINTL@ ++ PACKAGE = @PACKAGE@ +++PACKAGE_SUFFIX = -12 ++ RANLIB = @RANLIB@ ++ SHELL = @SHELL@ ++ USED_CATALOGS = @USED_CATALOGS@ ++@@ -73,11 +74,12 @@ depcomp = $(SHELL) $(srcdir)/../depcomp ++ ++ INCLUDES = -I$(srcdir) -I. -I$(srcdir)/../include @INCINTL@ \ ++ -I$(srcdir)/include +++DEBCPPFLAGS += -DPACKAGE_SUFFIX=\"$(strip $(PACKAGE_SUFFIX))\" ++ ++ ALL_CFLAGS = $(CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(CPPFLAGS) $(PICFLAG) \ ++- $(CET_HOST_FLAGS) +++ $(CET_HOST_FLAGS) $(DEBCPPFLAGS) ++ ALL_CXXFLAGS = $(CXXFLAGS) $(WARN_CXXFLAGS) $(NOEXCEPTION_FLAGS) $(INCLUDES) \ ++- $(CPPFLAGS) $(PICFLAG) $(CET_HOST_FLAGS) +++ $(CPPFLAGS) $(PICFLAG) $(CET_HOST_FLAGS) $(DEBCPPFLAGS) ++ ++ # The name of the compiler to use. ++ COMPILER = $(CXX) ++@@ -166,8 +168,8 @@ install-strip install: all installdirs ++ else continue; \ ++ fi; \ ++ dir=$(localedir)/$$lang/LC_MESSAGES; \ ++- echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE).mo; \ ++- $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE).mo; \ +++ echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE)$(PACKAGE_SUFFIX).mo; \ +++ $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE)$(PACKAGE_SUFFIX).mo; \ ++ done ++ ++ mostlyclean: diff --cc debian/patches/gcc-verbose-lto-link.diff index 0000000,0000000..f1f4e3f new file mode 100644 --- /dev/null +++ b/debian/patches/gcc-verbose-lto-link.diff @@@ -1,0 -1,0 +1,13 @@@ ++# DP: Prefix LLINKER with /usr/bin/time -v ++ ++--- a/src/gcc/Makefile.in +++++ b/src/gcc/Makefile.in ++@@ -280,7 +280,7 @@ LINKER += $(NO_PIE_FLAG) ++ ifeq (@DO_LINK_MUTEX@,true) ++ LLINKER = $(SHELL) $(srcdir)/lock-and-run.sh linkfe.lck $(LINKER) ++ else ++-LLINKER = $(LINKER) +++LLINKER = /usr/bin/time -v $(LINKER) ++ endif ++ ++ THIN_ARCHIVE_SUPPORT = @thin_archive_support@ diff --cc debian/patches/gdc-dynamic-link-phobos.diff index 0000000,0000000..f8ccec9 new file mode 100644 --- /dev/null +++ b/debian/patches/gdc-dynamic-link-phobos.diff @@@ -1,0 -1,0 +1,17 @@@ ++# DP: Dynamically link the phobos library. ++ ++--- a/src/gcc/d/d-spec.cc +++++ b/src/gcc/d/d-spec.cc ++@@ -426,9 +426,9 @@ lang_specific_driver (cl_decoded_option ++ /* Add `-lgphobos' if we haven't already done so. */ ++ if (phobos_library != PHOBOS_NOLINK) ++ { ++- /* Default to static linking. */ ++- if (phobos_library != PHOBOS_DYNAMIC) ++- phobos_library = PHOBOS_STATIC; +++ /* Default to dynamic linking. */ +++ if (phobos_library != PHOBOS_STATIC) +++ phobos_library = PHOBOS_DYNAMIC; ++ ++ #ifdef HAVE_LD_STATIC_DYNAMIC ++ if (phobos_library == PHOBOS_STATIC && !static_link) diff --cc debian/patches/gdc-multiarch.diff index 0000000,0000000..1925e1a new file mode 100644 --- /dev/null +++ b/debian/patches/gdc-multiarch.diff @@@ -1,0 -1,0 +1,17 @@@ ++# DP: Set the D target include directory to a multiarch location. ++ ++--- a/src/gcc/d/Make-lang.in +++++ b/src/gcc/d/Make-lang.in ++@@ -61,7 +61,11 @@ ++ $(D_DMD_H) ++ ++ ++-gcc_d_target_include_dir=$(gcc_d_include_dir)/$(target_noncanonical) +++ifneq (,$(MULTIARCH_DIRNAME)) +++ gcc_d_target_include_dir = /usr/include/$(MULTIARCH_DIRNAME)/d/$(version) +++else +++ gcc_d_target_include_dir=$(gcc_d_include_dir)/$(target_noncanonical) +++endif ++ ++ # Name of phobos library ++ D_LIBPHOBOS = -DLIBPHOBOS=\"gphobos2\" diff --cc debian/patches/gdc-texinfo.diff index 0000000,0000000..bf99a04 new file mode 100644 --- /dev/null +++ b/debian/patches/gdc-texinfo.diff @@@ -1,0 -1,0 +1,53 @@@ ++# DP: Add macros for the gdc texinfo documentation. ++ ++--- a/src/gcc/d/gdc.texi +++++ b/src/gcc/d/gdc.texi ++@@ -43,6 +43,22 @@ man page gfdl(7). ++ @insertcopying ++ @end ifinfo ++ +++@macro versionsubtitle +++@ifclear DEVELOPMENT +++@subtitle For @sc{gcc} version @value{version-GCC} +++@end ifclear +++@ifset DEVELOPMENT +++@subtitle For @sc{gcc} version @value{version-GCC} (pre-release) +++@end ifset +++@ifset VERSION_PACKAGE +++@sp 1 +++@subtitle @value{VERSION_PACKAGE} +++@end ifset +++@c Even if there are no authors, the second titlepage line should be +++@c forced to the bottom of the page. +++@vskip 0pt plus 1filll +++@end macro +++ ++ @titlepage ++ @title The GNU D Compiler ++ @versionsubtitle ++@@ -124,6 +140,25 @@ This manual only documents the options s ++ * Developer Options:: Options useful for developers of gdc ++ @end menu ++ +++@macro gcctabopt{body} +++@code{\body\} +++@end macro +++@macro gccoptlist{body} +++@smallexample +++\body\ +++@end smallexample +++@end macro +++@c Makeinfo handles the above macro OK, TeX needs manual line breaks; +++@c they get lost at some point in handling the macro. But if @macro is +++@c used here rather than @alias, it produces double line breaks. +++@iftex +++@alias gol = * +++@end iftex +++@ifnottex +++@macro gol +++@end macro +++@end ifnottex +++ ++ @c man begin OPTIONS ++ ++ @node Input and Output files diff --cc debian/patches/git-doc-updates.diff index 0000000,0000000..cab4d2f new file mode 100644 --- /dev/null +++ b/debian/patches/git-doc-updates.diff @@@ -1,0 -1,0 +1,214 @@@ ++# DP: updates from the 12 branch upto 20240119 (documentation). ++ ++LANG=C git diff --no-renames --src-prefix=a/src/ --dst-prefix=b/src/ \ ++ 8fc1a49c9312b05d925b7d21f1d2145d70818151 a7f6fe38d5421e5426da2b3ec34278b9e4146eb2 \ ++ | awk '/^diff .*\.texi/ {skip=0; print; next} /^diff / {skip=1; next} skip==0' \ ++ | grep -v -E '^(diff|index)' ++ ++--- a/src/gcc/doc/extend.texi +++++ b/src/gcc/doc/extend.texi ++@@ -14618,6 +14618,7 @@ instructions, but allow the compiler to schedule those calls. ++ * Blackfin Built-in Functions:: ++ * BPF Built-in Functions:: ++ * FR-V Built-in Functions:: +++* LoongArch Base Built-in Functions:: ++ * MIPS DSP Built-in Functions:: ++ * MIPS Paired-Single Support:: ++ * MIPS Loongson Built-in Functions:: ++@@ -16068,6 +16069,139 @@ Use the @code{nldub} instruction to load the contents of address @var{x} ++ into the data cache. The instruction is issued in slot I1@. ++ @end table ++ +++@node LoongArch Base Built-in Functions +++@subsection LoongArch Base Built-in Functions +++ +++These built-in functions are available for LoongArch. +++ +++Data Type Description: +++@itemize +++@item @code{imm0_31}, a compile-time constant in range 0 to 31; +++@item @code{imm0_16383}, a compile-time constant in range 0 to 16383; +++@item @code{imm0_32767}, a compile-time constant in range 0 to 32767; +++@item @code{imm_n2048_2047}, a compile-time constant in range -2048 to 2047; +++@end itemize +++ +++The intrinsics provided are listed below: +++@smallexample +++ unsigned int __builtin_loongarch_movfcsr2gr (imm0_31) +++ void __builtin_loongarch_movgr2fcsr (imm0_31, unsigned int) +++ void __builtin_loongarch_cacop_d (imm0_31, unsigned long int, imm_n2048_2047) +++ unsigned int __builtin_loongarch_cpucfg (unsigned int) +++ void __builtin_loongarch_asrtle_d (long int, long int) +++ void __builtin_loongarch_asrtgt_d (long int, long int) +++ long int __builtin_loongarch_lddir_d (long int, imm0_31) +++ void __builtin_loongarch_ldpte_d (long int, imm0_31) +++ +++ int __builtin_loongarch_crc_w_b_w (char, int) +++ int __builtin_loongarch_crc_w_h_w (short, int) +++ int __builtin_loongarch_crc_w_w_w (int, int) +++ int __builtin_loongarch_crc_w_d_w (long int, int) +++ int __builtin_loongarch_crcc_w_b_w (char, int) +++ int __builtin_loongarch_crcc_w_h_w (short, int) +++ int __builtin_loongarch_crcc_w_w_w (int, int) +++ int __builtin_loongarch_crcc_w_d_w (long int, int) +++ +++ unsigned int __builtin_loongarch_csrrd_w (imm0_16383) +++ unsigned int __builtin_loongarch_csrwr_w (unsigned int, imm0_16383) +++ unsigned int __builtin_loongarch_csrxchg_w (unsigned int, unsigned int, imm0_16383) +++ unsigned long int __builtin_loongarch_csrrd_d (imm0_16383) +++ unsigned long int __builtin_loongarch_csrwr_d (unsigned long int, imm0_16383) +++ unsigned long int __builtin_loongarch_csrxchg_d (unsigned long int, unsigned long int, imm0_16383) +++ +++ unsigned char __builtin_loongarch_iocsrrd_b (unsigned int) +++ unsigned short __builtin_loongarch_iocsrrd_h (unsigned int) +++ unsigned int __builtin_loongarch_iocsrrd_w (unsigned int) +++ unsigned long int __builtin_loongarch_iocsrrd_d (unsigned int) +++ void __builtin_loongarch_iocsrwr_b (unsigned char, unsigned int) +++ void __builtin_loongarch_iocsrwr_h (unsigned short, unsigned int) +++ void __builtin_loongarch_iocsrwr_w (unsigned int, unsigned int) +++ void __builtin_loongarch_iocsrwr_d (unsigned long int, unsigned int) +++ +++ void __builtin_loongarch_dbar (imm0_32767) +++ void __builtin_loongarch_ibar (imm0_32767) +++ +++ void __builtin_loongarch_syscall (imm0_32767) +++ void __builtin_loongarch_break (imm0_32767) +++@end smallexample +++ +++@emph{Note:}Since the control register is divided into 32-bit and 64-bit, +++but the access instruction is not distinguished. So GCC renames the control +++instructions when implementing intrinsics. +++ +++Take the csrrd instruction as an example, built-in functions are implemented as follows: +++@smallexample +++ __builtin_loongarch_csrrd_w // When reading the 32-bit control register use. +++ __builtin_loongarch_csrrd_d // When reading the 64-bit control register use. +++@end smallexample +++ +++For the convenience of use, the built-in functions are encapsulated, +++the encapsulated functions and @code{__drdtime_t, __rdtime_t} are +++defined in the @code{larchintrin.h}. So if you call the following +++function you need to include @code{larchintrin.h}. +++ +++@smallexample +++ typedef struct drdtime@{ +++ unsigned long dvalue; +++ unsigned long dtimeid; +++ @} __drdtime_t; +++ +++ typedef struct rdtime@{ +++ unsigned int value; +++ unsigned int timeid; +++ @} __rdtime_t; +++@end smallexample +++ +++@smallexample +++ __drdtime_t __rdtime_d (void) +++ __rdtime_t __rdtimel_w (void) +++ __rdtime_t __rdtimeh_w (void) +++ unsigned int __movfcsr2gr (imm0_31) +++ void __movgr2fcsr (imm0_31, unsigned int) +++ void __cacop_d (imm0_31, unsigned long, imm_n2048_2047) +++ unsigned int __cpucfg (unsigned int) +++ void __asrtle_d (long int, long int) +++ void __asrtgt_d (long int, long int) +++ long int __lddir_d (long int, imm0_31) +++ void __ldpte_d (long int, imm0_31) +++ +++ int __crc_w_b_w (char, int) +++ int __crc_w_h_w (short, int) +++ int __crc_w_w_w (int, int) +++ int __crc_w_d_w (long int, int) +++ int __crcc_w_b_w (char, int) +++ int __crcc_w_h_w (short, int) +++ int __crcc_w_w_w (int, int) +++ int __crcc_w_d_w (long int, int) +++ +++ unsigned int __csrrd_w (imm0_16383) +++ unsigned int __csrwr_w (unsigned int, imm0_16383) +++ unsigned int __csrxchg_w (unsigned int, unsigned int, imm0_16383) +++ unsigned long __csrrd_d (imm0_16383) +++ unsigned long __csrwr_d (unsigned long, imm0_16383) +++ unsigned long __csrxchg_d (unsigned long, unsigned long, imm0_16383) +++ +++ unsigned char __iocsrrd_b (unsigned int) +++ unsigned short __iocsrrd_h (unsigned int) +++ unsigned int __iocsrrd_w (unsigned int) +++ unsigned long __iocsrrd_d (unsigned int) +++ void __iocsrwr_b (unsigned char, unsigned int) +++ void __iocsrwr_h (unsigned short, unsigned int) +++ void __iocsrwr_w (unsigned int, unsigned int) +++ void __iocsrwr_d (unsigned long, unsigned int) +++ +++ void __dbar (imm0_32767) +++ void __ibar (imm0_32767) +++ +++ void __syscall (imm0_32767) +++ void __break (imm0_32767) +++@end smallexample +++ +++Returns the value that is currently set in the @samp{tp} register. +++@smallexample +++ void * __builtin_thread_pointer (void) +++@end smallexample +++ ++ @node MIPS DSP Built-in Functions ++ @subsection MIPS DSP Built-in Functions ++ ++--- a/src/gcc/doc/install.texi +++++ b/src/gcc/doc/install.texi ++@@ -375,6 +375,9 @@ tables. ++ ++ Used by @command{automake}. ++ +++If available, enables parallel testing of @samp{libgomp} in case that +++@command{flock} is not available. +++ ++ @end table ++ ++ Several support libraries are necessary to build GCC, some are required, ++--- a/src/gcc/doc/invoke.texi +++++ b/src/gcc/doc/invoke.texi ++@@ -1434,7 +1434,7 @@ See RS/6000 and PowerPC Options. ++ -m96bit-long-double -mlong-double-64 -mlong-double-80 -mlong-double-128 @gol ++ -mregparm=@var{num} -msseregparm @gol ++ -mveclibabi=@var{type} -mvect8-ret-in-mem @gol ++--mpc32 -mpc64 -mpc80 -mstackrealign @gol +++-mpc32 -mpc64 -mpc80 -mdaz-ftz -mstackrealign @gol ++ -momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol ++ -mcmodel=@var{code-model} -mabi=@var{name} -maddress-mode=@var{mode} @gol ++ -m32 -m64 -mx32 -m16 -miamcu -mlarge-data-threshold=@var{num} @gol ++@@ -6647,7 +6647,7 @@ This warning is enabled by @option{-Wall}. ++ @item -Wmissing-include-dirs @r{(C, C++, Objective-C, Objective-C++ and Fortran only)} ++ @opindex Wmissing-include-dirs ++ @opindex Wno-missing-include-dirs ++-Warn if a user-supplied include directory does not exist. This opions is disabled +++Warn if a user-supplied include directory does not exist. This option is disabled ++ by default for C, C++, Objective-C and Objective-C++. For Fortran, it is partially ++ enabled by default by warning for -I and -J, only. ++ ++@@ -32078,6 +32078,15 @@ are enabled by default; routines in such libraries could suffer significant ++ loss of accuracy, typically through so-called ``catastrophic cancellation'', ++ when this option is used to set the precision to less than extended precision. ++ +++@item -mdaz-ftz +++@opindex mdaz-ftz +++ +++The flush-to-zero (FTZ) and denormals-are-zero (DAZ) flags in the MXCSR register +++are used to control floating-point calculations.SSE and AVX instructions +++including scalar and vector instructions could benefit from enabling the FTZ +++and DAZ flags when @option{-mdaz-ftz} is specified. Don't set FTZ/DAZ flags +++when @option{-mno-daz-ftz} is specified. +++ ++ @item -mstackrealign ++ @opindex mstackrealign ++ Realign the stack at entry. On the x86, the @option{-mstackrealign} ++@@ -33092,7 +33101,7 @@ on x86-64 processors in 64-bit environments. ++ Generate code for a 16-bit, 32-bit or 64-bit environment. ++ The @option{-m32} option sets @code{int}, @code{long}, and pointer types ++ to 32 bits, and ++-generates code that runs on any i386 system. +++generates code that runs in 32-bit mode. ++ ++ The @option{-m64} option sets @code{int} to 32 bits and @code{long} and pointer ++ types to 64 bits, and generates code for the x86-64 architecture. diff --cc debian/patches/git-updates.diff index 0000000,0000000..3b7574b new file mode 100644 --- /dev/null +++ b/debian/patches/git-updates.diff @@@ -1,0 -1,0 +1,174832 @@@ ++# DP: updates from the 12 branch upto 20240119 (a7f6fe38d54). ++ ++LANG=C git diff --no-renames --src-prefix=a/src/ --dst-prefix=b/src/ \ ++ 8fc1a49c9312b05d925b7d21f1d2145d70818151 a7f6fe38d5421e5426da2b3ec34278b9e4146eb2 \ ++ | awk '/^diff .*\.texi/ {skip=1; next} /^diff / { skip=0 } skip==0' \ ++ | grep -v -E '^(diff|index)' ++ ++--- a/src/fixincludes/ChangeLog +++++ b/src/fixincludes/ChangeLog ++@@ -1,3 +1,10 @@ +++2023-12-11 Rainer Orth +++ +++ * inclhack.def (darwin_flt_eval_method): Handle macOS 14 guard +++ variant. +++ * fixincl.x: Regenerate. +++ * tests/base/math.h [DARWIN_FLT_EVAL_METHOD_CHECK]: Update test. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/fixincludes/fixincl.x +++++ b/src/fixincludes/fixincl.x ++@@ -2,11 +2,11 @@ ++ * ++ * DO NOT EDIT THIS FILE (fixincl.x) ++ * ++- * It has been AutoGen-ed February 27, 2022 at 07:47:03 PM by AutoGen 5.18.16 +++ * It has been AutoGen-ed December 11, 2023 at 06:14:06 PM by AutoGen 5.18.16 ++ * From the definitions inclhack.def ++ * and the template file fixincl ++ */ ++-/* DO NOT SVN-MERGE THIS FILE, EITHER Sun Feb 27 19:47:03 UTC 2022 +++/* DO NOT SVN-MERGE THIS FILE, EITHER Mon Dec 11 18:14:06 CET 2023 ++ * ++ * You must regenerate it. Use the ./genfixes script. ++ * ++@@ -3587,7 +3587,7 @@ tSCC* apzDarwin_Flt_Eval_MethodMachs[] = { ++ * content selection pattern - do fix if pattern found ++ */ ++ tSCC zDarwin_Flt_Eval_MethodSelect0[] = ++- "^#if __FLT_EVAL_METHOD__ == 0$"; +++ "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ == -1)?$"; ++ ++ #define DARWIN_FLT_EVAL_METHOD_TEST_CT 1 ++ static tTestDesc aDarwin_Flt_Eval_MethodTests[] = { ++@@ -3598,7 +3598,7 @@ static tTestDesc aDarwin_Flt_Eval_MethodTests[] = { ++ */ ++ static const char* apzDarwin_Flt_Eval_MethodPatch[] = { ++ "format", ++- "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16", +++ "%0 || __FLT_EVAL_METHOD__ == 16", ++ (char*)NULL }; ++ ++ /* * * * * * * * * * * * * * * * * * * * * * * * * * ++--- a/src/fixincludes/inclhack.def +++++ b/src/fixincludes/inclhack.def ++@@ -1772,10 +1772,11 @@ fix = { ++ hackname = darwin_flt_eval_method; ++ mach = "*-*-darwin*"; ++ files = math.h; ++- select = "^#if __FLT_EVAL_METHOD__ == 0$"; +++ select = "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ == -1)?$"; ++ c_fix = format; ++- c_fix_arg = "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16"; ++- test_text = "#if __FLT_EVAL_METHOD__ == 0"; +++ c_fix_arg = "%0 || __FLT_EVAL_METHOD__ == 16"; +++ test_text = "#if __FLT_EVAL_METHOD__ == 0\n" +++ "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1"; ++ }; ++ ++ /* ++--- a/src/fixincludes/tests/base/math.h +++++ b/src/fixincludes/tests/base/math.h ++@@ -32,6 +32,7 @@ ++ ++ #if defined( DARWIN_FLT_EVAL_METHOD_CHECK ) ++ #if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16 +++#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1 || __FLT_EVAL_METHOD__ == 16 ++ #endif /* DARWIN_FLT_EVAL_METHOD_CHECK */ ++ ++ ++--- a/src/gcc/ChangeLog +++++ b/src/gcc/ChangeLog ++@@ -1,3 +1,1745 @@ +++2024-01-16 Georg-Johann Lay +++ +++ Backported from master: +++ 2024-01-15 Georg-Johann Lay +++ +++ PR target/107201 +++ * config/avr/avr.h (EXTRA_SPEC_FUNCTIONS): Add no-devlib, avr_no_devlib. +++ * config/avr/driver-avr.cc (avr_no_devlib): New function. +++ (avr_devicespecs_file): Use it to remove -nodevicelib from the +++ options for cores only. +++ * config/avr/avr-arch.h (avr_get_parch): New prototype. +++ * config/avr/avr-devices.cc (avr_get_parch): New function. +++ +++2024-01-15 Andrew Pinski +++ +++ Backported from master: +++ 2024-01-15 Andrew Pinski +++ +++ PR target/113156 +++ * config/avr/avr.opt (-mdouble, -mlong-double): Add "Save" flag. +++ (-mbranch-cost): Set "Optimization" flag. +++ +++2024-01-12 Georg-Johann Lay +++ +++ Backported from master: +++ 2024-01-12 Georg-Johann Lay +++ +++ * config/avr/avr.cc (avr_handle_addr_attribute): Move "..." from +++ format string to %s argument. +++ +++2024-01-08 Georg-Johann Lay +++ +++ Backported from master: +++ 2024-01-08 Georg-Johann Lay +++ +++ PR target/112952 +++ * config/avr/avr.cc (avr_handle_addr_attribute): Also print valid +++ range when diagnosing attribute "io" and "io_low" are out of range. +++ (avr_eval_addr_attrib): Don't ICE on empty address at that place. +++ (avr_insert_attributes): Reject if attribute "address", "io" or "io_low" +++ in contexts other than static storage. +++ (avr_asm_output_aligned_decl_common): Move output of decls with +++ attribute "address", "io", and "io_low" to... +++ (avr_output_addr_attrib): ...this new function. +++ (avr_asm_asm_output_aligned_bss): Remove output for decls with +++ attribute "address", "io", and "io_low". +++ (avr_encode_section_info): Rectify handling of decls with attribute +++ "address", "io", and "io_low". +++ +++2023-12-19 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-19 Jakub Jelinek +++ +++ PR target/112816 +++ * config/i386/mmx.md (signbitv2sf2): Force operands[1] into a REG. +++ +++2023-12-18 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-18 Jakub Jelinek +++ +++ PR tree-optimization/113013 +++ * tree-object-size.cc (alloc_object_size): Return size_unknown if +++ corresponding argument(s) don't have integral type or have integral +++ type with higher precision than sizetype. Don't check arg1 >= 0 +++ uselessly. Compare argument indexes against gimple_call_num_args +++ in unsigned type rather than int. Formatting fixes. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-11-29 Jakub Jelinek +++ +++ PR middle-end/112733 +++ * fold-const.cc (multiple_of_p): Pass SIGNED rather than +++ UNSIGNED for wi::multiple_of_p on widest_int arguments. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-05 Jakub Jelinek +++ +++ PR target/112845 +++ * config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL +++ if the new immediate is ix86_endbr_immediate_operand. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-04 Jakub Jelinek +++ +++ PR target/112837 +++ * config/i386/i386.cc (ix86_elim_entry_set_got): Before checking +++ for UNSPEC_SET_GOT check that SET_SRC is UNSPEC. Use SET_SRC and +++ SET_DEST macros instead of XEXP, rename vec variable to set. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-04 Jakub Jelinek +++ +++ PR target/112816 +++ * config/i386/sse.md (signbit2): Force operands[1] into a REG. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-11-25 Jakub Jelinek +++ +++ PR target/111408 +++ * config/i386/i386.md (*jcc_bt_mask): Add (const_int 0) as +++ expected second operand of bt_comparison_operator. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-11-13 Jakub Jelinek +++ +++ PR tree-optimization/111967 +++ * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow +++ m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1. +++ (block_range_cache::dump): Iterate from 1 rather than 0. Don't use +++ ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to +++ m_ssa_ranges.length () rather than num_ssa_names. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-11-09 Jakub Jelinek +++ +++ PR c/112339 +++ * attribs.cc (attribute_ignored_p): Only return true for +++ attr_namespace_ignored_p if as is NULL. +++ (decl_attributes): Never add ignored attributes. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-07-19 Jakub Jelinek +++ +++ PR tree-optimization/110731 +++ * wide-int.cc (wi::divmod_internal): Always unpack dividend and +++ divisor as UNSIGNED regardless of sgn. +++ +++2023-12-15 Richard Biener +++ +++ Backported from master: +++ 2023-08-24 Richard Biener +++ +++ PR debug/111080 +++ * dwarf2out.cc (prune_unused_types_walk): Handle +++ DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type, +++ DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type +++ and DW_TAG_dynamic_type as to only output them when referenced. +++ +++2023-12-15 Richard Biener +++ +++ Backported from master: +++ 2023-08-25 Richard Biener +++ +++ PR tree-optimization/111137 +++ * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences): +++ Properly handle grouped stores from other SLP instances. +++ +++2023-12-15 Richard Biener +++ +++ Backported from master: +++ 2023-08-25 Richard Biener +++ +++ * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences): +++ Split out from vect_slp_analyze_node_dependences, remove +++ dead code. +++ (vect_slp_analyze_load_dependences): Split out from +++ vect_slp_analyze_node_dependences, adjust comments. Process +++ queued stores before any disambiguation. +++ (vect_slp_analyze_node_dependences): Remove. +++ (vect_slp_analyze_instance_dependence): Adjust. +++ +++2023-12-12 liuhongt +++ +++ Backported from master: +++ 2023-12-12 liuhongt +++ +++ PR target/112891 +++ * config/i386/i386.cc (ix86_avx_u128_mode_after): Return +++ AVX_U128_ANY if callee_abi doesn't clobber all_sse_regs to +++ align with ix86_avx_u128_mode_needed. +++ (ix86_avx_u128_mode_needed): Return AVX_U128_ClEAN for +++ sibling_call. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-10-23 Richard Biener +++ +++ PR tree-optimization/111917 +++ * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert +++ new conditional after last stmt. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-10-17 Richard Biener +++ +++ PR middle-end/111818 +++ * tree-ssa.cc (maybe_optimize_var): When clearing +++ DECL_NOT_GIMPLE_REG_P always rewrite into SSA. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-09-28 Richard Biener +++ +++ PR tree-optimization/111614 +++ * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly +++ convert the first vector when required. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-10-12 Richard Biener +++ +++ PR tree-optimization/111764 +++ * tree-vect-loop.cc (check_reduction_path): Remove the attempt +++ to allow x + x via special-casing of assigns. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-10-20 Richard Biener +++ +++ PR tree-optimization/111445 +++ * tree-scalar-evolution.cc (simple_iv_with_niters): +++ Add missing check for a sign-conversion. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-08-18 Richard Biener +++ +++ PR tree-optimization/111019 +++ * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing +++ also scrap base and offset in case the ref is indirect. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-08-03 Richard Biener +++ +++ PR tree-optimization/110702 +++ * tree-ssa-loop-ivopts.cc (rewrite_use_address): When +++ we created a NULL pointer based access rewrite that to +++ a LEA. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-07-06 Richard Biener +++ +++ PR tree-optimization/110556 +++ * tree-ssa-tail-merge.cc (gimple_equal_p): Check +++ assign code and all operands of non-stores. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-07-06 Richard Biener +++ +++ PR tree-optimization/110515 +++ * tree-ssa-pre.cc (compute_avail): Make code dealing +++ with hoisting loads with different alias-sets more +++ robust. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-06-20 Richard Biener +++ +++ PR debug/110295 +++ * dwarf2out.cc (process_scope_var): Continue processing +++ the decl after setting a parent in case the existing DIE +++ was in limbo. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-05-31 Richard Biener +++ +++ PR ipa/109983 +++ PR tree-optimization/109143 +++ * tree-ssa-structalias.cc (struct topo_info): Remove. +++ (init_topo_info): Likewise. +++ (free_topo_info): Likewise. +++ (compute_topo_order): Simplify API, put the component +++ with ESCAPED last so it's processed first. +++ (topo_visit): Adjust. +++ (solve_graph): Likewise. +++ +++2023-11-24 Uros Bizjak +++ +++ Backported from master: +++ 2023-11-23 Uros Bizjak +++ +++ PR target/112672 +++ * config/i386/i386.md (parityhi2): +++ Use temporary register in the call to gen_parityhi2_cmp. +++ +++2023-11-22 Maciej W. Rozycki +++ +++ Backported from master: +++ 2023-11-22 Maciej W. Rozycki +++ +++ PR target/111815 +++ * config/vax/vax.cc (index_term_p): Only accept the index scaler +++ as the RHS operand to ASHIFT. +++ +++2023-11-20 Lulu Cheng +++ +++ Backported from master: +++ 2023-11-20 Lulu Cheng +++ +++ * config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix. +++ +++2023-11-20 Peng Fan +++ +++ Backported from master: +++ 2023-04-21 Peng Fan +++ +++ * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine. +++ +++2023-11-16 Xi Ruoyao +++ +++ Backported from master: +++ 2023-11-15 Xi Ruoyao +++ +++ * config/loongarch/loongarch.cc +++ (loongarch_memmodel_needs_release_fence): Remove. +++ (loongarch_cas_failure_memorder_needs_acquire): New static +++ function. +++ (loongarch_print_operand): Redefine 'G' for the barrier on CAS +++ failure. +++ * config/loongarch/sync.md (atomic_cas_value_strong): +++ Remove the redundant barrier before the LL instruction, and +++ emit an acquire barrier on failure if needed by +++ failure_memorder. +++ (atomic_cas_value_cmp_and_7_): Likewise. +++ (atomic_cas_value_add_7_): Remove the unnecessary barrier +++ before the LL instruction. +++ (atomic_cas_value_sub_7_): Likewise. +++ (atomic_cas_value_and_7_): Likewise. +++ (atomic_cas_value_xor_7_): Likewise. +++ (atomic_cas_value_or_7_): Likewise. +++ (atomic_cas_value_nand_7_): Likewise. +++ (atomic_cas_value_exchange_7_): Likewise. +++ +++2023-11-15 Kewen Lin +++ +++ Backported from master: +++ 2023-11-06 Kewen Lin +++ +++ PR target/111828 +++ * config.in: Regenerate. +++ * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard +++ inline asm handling under !HAVE_AS_POWER10_HTM. +++ * configure: Regenerate. +++ * configure.ac: Detect assembler support for HTM insns at power10. +++ +++2023-11-10 liuhongt +++ +++ Backported from master: +++ 2023-11-10 liuhongt +++ +++ PR target/112443 +++ * config/i386/sse.md (*avx2_pcmp3_4): Fix swap condition +++ from LT to GT since there's not in the pattern. +++ (*avx2_pcmp3_5): Ditto. +++ +++2023-11-06 John David Anglin +++ +++ * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo. +++ +++2023-10-26 Lulu Cheng +++ +++ Backported from master: +++ 2023-10-23 Lulu Cheng +++ +++ * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition. +++ +++2023-10-26 chenxiaolong +++ +++ Backported from master: +++ 2023-10-25 chenxiaolong +++ +++ * config/loongarch/loongarch.md (get_thread_pointer):Adds the +++ instruction template corresponding to the __builtin_thread_pointer +++ function. +++ * doc/extend.texi:Add the __builtin_thread_pointer function support +++ description to the documentation. +++ +++2023-10-26 liuhongt +++ +++ Backported from master: +++ 2023-07-06 liuhongt +++ +++ PR target/110170 +++ * config/i386/i386.md (movdf_internal): Disparage slightly for +++ 2 alternatives (r,v) and (v,r) by adding constraint modifier +++ '?'. +++ +++2023-10-23 Oleg Endo +++ +++ PR target/111001 +++ * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg): +++ Skip over nop move insns. +++ +++2023-10-23 Kewen Lin +++ +++ Backported from master: +++ 2023-10-12 Kewen Lin +++ +++ PR target/111367 +++ * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed +++ instruction emission and incorporate to stack_protect_set. +++ (stack_protect_setdi): Rename to ... +++ (stack_protect_set): ... this, adjust constraint. +++ (stack_protect_testsi): Support prefixed instruction emission and +++ incorporate to stack_protect_test. +++ (stack_protect_testdi): Rename to ... +++ (stack_protect_test): ... this, adjust constraint. +++ +++2023-10-20 Oleg Endo +++ +++ PR target/101177 +++ * config/sh/sh.md (unnamed split pattern): Fix comparison of +++ find_regno_note result. +++ +++2023-10-19 Richard Sandiford +++ +++ Backported from master: +++ 2023-09-07 Richard Sandiford +++ +++ PR target/111528 +++ * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary +++ rather than gen_rtx_PLUS. +++ +++2023-10-16 Kewen Lin +++ +++ Backported from master: +++ 2023-09-25 Kewen Lin +++ +++ PR target/111380 +++ * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt +++ target_option_default_node when the callee has no option +++ attributes, also simplify the existing code accordingly. +++ +++2023-10-16 Kewen Lin +++ +++ Backported from master: +++ 2023-09-25 Kewen Lin +++ +++ PR target/111366 +++ * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip +++ empty inline asm. +++ +++2023-10-07 Andrew Pinski +++ +++ Backported from master: +++ 2023-10-06 Andrew Pinski +++ +++ PR middle-end/111699 +++ * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e), +++ (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE. +++ +++2023-10-02 Pat Haugen +++ +++ Backported from master: +++ 2023-09-19 Pat Haugen +++ +++ * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the +++ modulo instruction is disabled. +++ * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New. +++ * config/rs6000/rs6000.md (mod3, *mod3): Check it. +++ (define_expand umod3): New. +++ (define_insn umod3): Rename to *umod3 and check if the modulo +++ instruction is disabled. +++ (umodti3, modti3): Check if the modulo instruction is disabled. +++ +++2023-09-29 Wilco Dijkstra +++ +++ Backported from master: +++ 2023-09-28 Wilco Dijkstra +++ +++ PR target/111121 +++ * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander. +++ (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion. +++ * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support +++ for memmove. +++ * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new +++ function. +++ +++2023-09-26 Eric Botcazou +++ +++ * gimple-range-gori.cc (gori_compute::logical_combine): Add missing +++ return statement in the varying case. +++ +++2023-09-20 Richard Sandiford +++ +++ Backported from master: +++ 2023-09-15 Richard Sandiford +++ +++ PR target/111411 +++ * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require +++ the lower memory access to a mem-pair operand. +++ +++2023-09-20 Richard Sandiford +++ +++ Backported from master: +++ 2023-08-31 Richard Sandiford +++ +++ * config/aarch64/aarch64.md (untyped_call): Emit a call_value +++ rather than a call. List each possible destination register +++ in the call pattern. +++ +++2023-09-12 Uros Bizjak +++ +++ PR target/111340 +++ * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT. +++ Call output_addr_const for CASE_CONST_SCALAR_INT. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p): +++ New function. +++ (aarch64_layout_frame): Use it to decide whether locals should +++ go above or below the saved registers. +++ (aarch64_expand_prologue): Update stack layout comment. +++ Emit a stack tie after the final adjustment. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size) +++ (aarch64_frame::below_hard_fp_saved_regs_size): Delete. +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe) +++ (aarch64_frame::hard_fp_save_and_probe): New fields. +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them. +++ Rather than asserting that a leaf function saves LR, instead assert +++ that a leaf function saves something. +++ (aarch64_get_separate_components): Prevent the chosen probe +++ registers from being individually shrink-wrapped. +++ (aarch64_allocate_and_probe_stack_space): Remove workaround for +++ probe registers that aren't at the bottom of the previous allocation. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): +++ Always probe the residual allocation at offset 1024, asserting +++ that that is in range. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that +++ the LR save slot is in the first 16 bytes of the register save area. +++ Only form STP/LDP push/pop candidates if both registers are valid. +++ (aarch64_allocate_and_probe_stack_space): Remove workaround for +++ when LR was not in the first 16 bytes. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space): +++ Don't probe final allocations that are exactly 1KiB in size (after +++ unprobed space above the final allocation has been deducted). +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak +++ calculation of initial_adjust for frames in which all saves +++ are SVE saves. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify +++ the allocation of the top of the frame. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.h (aarch64_frame): Add comment above +++ reg_offset. +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets +++ from the bottom of the frame, rather than the bottom of the saved +++ register area. Measure reg_offset from the bottom of the frame +++ rather than the bottom of the saved register area. +++ (aarch64_save_callee_saves): Update accordingly. +++ (aarch64_restore_callee_saves): Likewise. +++ (aarch64_get_separate_components): Likewise. +++ (aarch64_process_components): Likewise. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename +++ to... +++ (aarch64_frame::bytes_above_hard_fp): ...this. +++ * config/aarch64/aarch64.cc (aarch64_layout_frame) +++ (aarch64_expand_prologue): Update accordingly. +++ (aarch64_initial_elimination_offset): Likewise. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to... +++ (aarch64_frame::bytes_above_locals): ...this. +++ * config/aarch64/aarch64.cc (aarch64_layout_frame) +++ (aarch64_initial_elimination_offset): Update accordingly. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the +++ calculation of chain_offset into the emit_frame_chain block. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete. +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove +++ callee_offset handling. +++ (aarch64_save_callee_saves): Replace the start_offset parameter +++ with a bytes_below_sp parameter. +++ (aarch64_restore_callee_saves): Likewise. +++ (aarch64_expand_prologue): Update accordingly. +++ (aarch64_expand_epilogue): Likewise. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New +++ field. +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it. +++ (aarch64_expand_epilogue): Use it instead of +++ below_hard_fp_saved_regs_size. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New +++ field. +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it, +++ and use it instead of crtl->outgoing_args_size. +++ (aarch64_get_separate_components): Use bytes_below_saved_regs instead +++ of outgoing_args_size. +++ (aarch64_process_components): Likewise. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly +++ allocate the frame in one go if there are no saved registers. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use +++ chain_offset rather than callee_offset. +++ +++2023-09-12 Richard Sandiford +++ +++ * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use +++ a local shorthand for cfun->machine->frame. +++ (aarch64_restore_callee_saves, aarch64_get_separate_components): +++ (aarch64_process_components): Likewise. +++ (aarch64_allocate_and_probe_stack_space): Likewise. +++ (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise. +++ (aarch64_layout_frame): Use existing shorthand for one more case. +++ +++2023-09-12 Haochen Gui +++ +++ Backported from master: +++ 2023-08-31 Haochen Gui +++ +++ PR target/96762 +++ * config/rs6000/rs6000-string.cc (expand_block_move): Call vector +++ load/store with length only on 64-bit Power10. +++ +++2023-09-11 liuhongt +++ +++ Backported from master: +++ 2023-09-11 liuhongt +++ +++ PR target/111306 +++ PR target/111335 +++ * config/i386/sse.md (int_comm): New int_attr. +++ (fma__): +++ Remove % for Complex conjugate operations since they're not +++ commutative. +++ (fma___pair): Ditto. +++ (___mask): Ditto. +++ (cmul3): Ditto. +++ +++2023-09-01 Tobias Burnus +++ +++ Backported from master: +++ 2023-08-19 Tobias Burnus +++ +++ PR middle-end/111017 +++ * omp-expand.cc (expand_omp_for_init_vars): Pass after=true +++ to expand_omp_build_cond for 'factor != 0' condition, resulting +++ in pre-r12-5295-g47de0b56ee455e code for the gimple insert. +++ +++2023-09-01 Lulu Cheng +++ +++ Backported from master: +++ 2023-09-01 Lulu Cheng +++ Guo Jie +++ +++ PR target/110484 +++ * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the +++ frame_pointer_needed to determine whether to use the $fp register. +++ +++2023-08-30 Jakub Jelinek +++ +++ Backported from master: +++ 2023-08-30 Jakub Jelinek +++ +++ PR tree-optimization/110914 +++ * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call +++ adjust_last_stmt unless len is known constant. +++ +++2023-08-30 Jakub Jelinek +++ +++ Backported from master: +++ 2023-08-30 Jakub Jelinek +++ +++ PR tree-optimization/111015 +++ * gimple-ssa-store-merging.cc +++ (imm_store_chain_info::output_merged_store): Use wi::mask and +++ wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and +++ build_int_cst to build BIT_AND_EXPR mask. +++ +++2023-08-19 Guo Jie +++ +++ Backported from master: +++ 2023-08-19 Guo Jie +++ Lulu Cheng +++ +++ * config/loongarch/t-loongarch: Add loongarch-driver.h into +++ TM_H. Add loongarch-def.h and loongarch-tune.h into +++ OPTIONS_H_EXTRA. +++ +++2023-08-16 liuhongt +++ +++ Backported from master: +++ 2023-08-16 liuhongt +++ +++ * config/i386/i386-builtins.cc +++ (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts. +++ * config/i386/i386-options.cc (parse_mtune_ctrl_str): +++ Set/Clear tune features use_{gather,scatter}_{2parts, 4parts, +++ 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}. +++ * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust +++ for use_scatter_8parts +++ * config/i386/i386.h (TARGET_USE_GATHER): Rename to .. +++ (TARGET_USE_GATHER_8PARTS): .. this. +++ (TARGET_USE_SCATTER): Rename to .. +++ (TARGET_USE_SCATTER_8PARTS): .. this. +++ * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to +++ (X86_TUNE_USE_GATHER_8PARTS): .. this. +++ (X86_TUNE_USE_SCATTER): Rename to +++ (X86_TUNE_USE_SCATTER_8PARTS): .. this. +++ * config/i386/i386.opt: Add new options mgather, mscatter. +++ +++2023-08-16 liuhongt +++ +++ Backported from master: +++ 2023-08-16 liuhongt +++ +++ * config/i386/i386-options.cc (m_GDS): New macro. +++ * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't +++ enable for m_GDS. +++ (X86_TUNE_USE_GATHER_4PARTS): Ditto. +++ (X86_TUNE_USE_GATHER): Ditto. +++ +++2023-08-09 liuhongt +++ +++ * common/config/i386/cpuinfo.h (get_available_features): Check +++ max_subleaf_level for valid subleaf before use CPUID. +++ +++2023-08-01 Kewen Lin +++ +++ Backported from master: +++ 2023-07-26 Kewen Lin +++ +++ PR target/110741 +++ * config/rs6000/vsx.md (define_insn xxeval): Correct vsx +++ operands output with "x". +++ +++2023-07-14 Uros Bizjak +++ +++ Backported from master: +++ 2023-07-14 Uros Bizjak +++ +++ PR target/110206 +++ * fwprop.cc (contains_paradoxical_subreg_p): Move to ... +++ * rtlanal.cc (contains_paradoxical_subreg_p): ... here. +++ * rtlanal.h (contains_paradoxical_subreg_p): Add prototype. +++ * cprop.cc (try_replace_reg): Do not set REG_EQUAL note +++ when the original source contains a paradoxical subreg. +++ +++2023-07-14 Oleg Endo +++ +++ PR target/101469 +++ * config/sh/sh.md (peephole2): Handle case where eliminated reg +++ is also used by the address of the following memory operand. +++ +++2023-07-13 Uros Bizjak +++ +++ Backported from master: +++ 2023-07-13 Uros Bizjak +++ +++ PR target/106966 +++ * config/alpha/alpha.cc (alpha_emit_set_long_const): +++ Always use DImode when constructing long const. +++ +++2023-07-08 Jonathan Wakely +++ +++ Backported from master: +++ 2023-07-08 Jonathan Wakely +++ +++ PR c++/110595 +++ * doc/invoke.texi (Warning Options): Fix typo. +++ +++2023-07-05 Michael Meissner +++ +++ Backported from master: +++ 2023-06-23 Michael Meissner +++ Aaron Sawdey +++ +++ PR target/105325 +++ * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that +++ allowed prefixed lwa to be generated. +++ * config/rs6000/fusion.md: Regenerate. +++ * config/rs6000/predicates.md (ds_form_mem_operand): Delete. +++ * config/rs6000/rs6000.md (prefixed attribute): Add support for load +++ plus compare immediate fused insns. +++ (maybe_prefixed): Likewise. +++ +++2023-07-05 Segher Boessenkool +++ +++ Backported from master: +++ 2023-06-06 Segher Boessenkool +++ +++ * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and +++ split out from... +++ (gen_ld_cmpi_p10): ... this. +++ +++2023-07-04 Cui, Lili +++ +++ * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8 +++ from Rocketlake, remove model value 0xbf from Alderlake. +++ +++2023-06-30 Eric Botcazou +++ +++ * gimple-fold.cc (fold_array_ctor_reference): Fix head comment. +++ (fold_nonarray_ctor_reference): Likewise. Specifically deal +++ with integral bit-fields. +++ (fold_ctor_reference): Make sure that the constructor uses the +++ native storage order. +++ +++2023-06-29 liuhongt +++ +++ PR rtl-optimization/110237 +++ * config/i386/sse.md (_store_mask): Refine with +++ UNSPEC_MASKMOV. +++ (maskstore_store_mask): New define_insn, it's renamed +++ from original _store_mask. +++ +++2023-06-29 liuhongt +++ +++ PR target/110309 +++ * config/i386/sse.md (maskload): +++ Refine pattern with UNSPEC_MASKLOAD. +++ (maskload): Ditto. +++ (*_load_mask): Extend mode iterator to +++ VI12HF_AVX512VL. +++ (*_load): Ditto. +++ +++2023-06-29 Hongyu Wang +++ +++ Backported from master: +++ 2023-06-26 Hongyu Wang +++ +++ * config/i386/i386-options.cc (ix86_valid_target_attribute_tree): +++ Override tune_string with arch_string if tune_string is not +++ explicitly specified. +++ +++2023-06-28 Thomas Schwinge +++ +++ Backported from master: +++ 2023-06-02 Thomas Schwinge +++ +++ PR testsuite/66005 +++ * doc/install.texi: Document (optional) Perl usage for parallel +++ testing of libgomp. +++ +++2023-06-28 liuhongt +++ +++ * config/i386/i386-features.cc (pass_insert_vzeroupper:gate): +++ Move flag_expensive_optimizations && !optimize_size to .. +++ * config/i386/i386-options.cc (ix86_option_override_internal): +++ .. this, it makes -mvzeroupper independent of optimization +++ level, but still keeps the behavior of architecture +++ tuning(emit_vzeroupper) unchanged. +++ +++2023-06-27 Andrew Pinski +++ +++ Backported from master: +++ 2023-06-27 Andrew Pinski +++ +++ PR middle-end/110420 +++ PR middle-end/103979 +++ PR middle-end/98619 +++ * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile. +++ +++2023-06-23 Richard Biener +++ +++ Backported from master: +++ 2023-06-19 Richard Biener +++ +++ PR tree-optimization/110298 +++ * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely): +++ Clear number of iterations info before cleaning up the CFG. +++ +++2023-06-23 Richard Biener +++ +++ Backported from master: +++ 2023-06-09 Richard Biener +++ +++ PR middle-end/110182 +++ * match.pd (two conversions in a row): Use element_precision +++ to DTRT for VECTOR_TYPE. +++ +++2023-06-22 Alex Coplan +++ +++ Backported from master: +++ 2023-06-07 Alex Coplan +++ +++ PR target/110132 +++ * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin): +++ New. Use it ... +++ (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE +++ names for builtins. +++ (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h +++ setup if in_lto_p, just like we do for SVE. +++ * config/aarch64/arm_acle.h: (__arm_ld64b): Delete. +++ (__arm_st64b): Delete. +++ (__arm_st64bv): Delete. +++ (__arm_st64bv0): Delete. +++ +++2023-06-22 Alex Coplan +++ +++ Backported from master: +++ 2023-06-07 Alex Coplan +++ +++ PR target/110100 +++ * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64): +++ Use input operand for the destination address. +++ * config/aarch64/aarch64.md (st64b): Fix constraint on address +++ operand. +++ +++2023-06-22 Alex Coplan +++ +++ Backported from master: +++ 2023-06-07 Alex Coplan +++ +++ PR target/110100 +++ * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types): +++ Replace eight consecutive spaces with tabs. +++ (aarch64_init_ls64_builtins): Likewise. +++ (aarch64_expand_builtin_ls64): Likewise. +++ * config/aarch64/aarch64.md (ld64b): Likewise. +++ (st64b): Likewise. +++ (st64bv): Likewise +++ (st64bv0): Likewise. +++ +++2023-06-20 Kewen Lin +++ +++ Backported from master: +++ 2023-06-12 Kewen Lin +++ +++ PR target/109932 +++ * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128, +++ __builtin_unpack_vector_int128): Move from stanza power7 to vsx. +++ +++2023-06-20 Kewen Lin +++ +++ Backported from master: +++ 2023-06-12 Kewen Lin +++ +++ PR target/110011 +++ * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit +++ floating constant itself for real_to_target call. +++ +++2023-06-15 Lulu Cheng +++ +++ Backported from master: +++ 2023-06-15 Lulu Cheng +++ Andrew Pinski +++ +++ PR target/110136 +++ * config/loongarch/loongarch.md: Modify the register constraints for template +++ "jumptable" and "indirect_jump" from "r" to "e". +++ +++2023-06-12 Richard Biener +++ +++ Backported from master: +++ 2023-06-12 Richard Biener +++ +++ PR middle-end/110200 +++ * genmatch.cc (expr::gen_transform): Put braces around +++ the if arm for the (convert ...) short-cut. +++ +++2023-06-10 Georg-Johann Lay +++ +++ PR target/109650 +++ PR target/92729 +++ Backport from 2023-05-10 master r14-1688. +++ * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass. +++ * config/avr/avr.cc (avr_pass_ifelse): New RTL pass. +++ (avr_pass_data_ifelse): New pass_data for it. +++ (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost) +++ (avr_canonicalize_comparison, avr_out_plus_set_ZN) +++ (avr_out_cmp_ext): New functions. +++ (compare_condtition): Make sure REG_CC dies in the branch insn. +++ (avr_rtx_costs_1): Add computation of cbranch costs. +++ (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]: +++ [ADJUST_LEN_CMP_SEXT]Handle them. +++ (TARGET_CANONICALIZE_COMPARISON): New define. +++ (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern) +++ (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions. +++ (TARGET_MACHINE_DEPENDENT_REORG): Remove define. +++ * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto. +++ (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx) +++ (avr_out_cmp_zext): New Protos +++ * config/avr/avr.md (branch, difficult_branch): Don't split insns. +++ (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1") +++ (*swapped_tst, *add.for.eqne.): New insns. +++ (*cbranch4): Rename to cbranch4_insn. +++ (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed. +++ (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed. +++ Add new RTL peepholes for decrement-and-branch and *swapped_tst. +++ Rework signtest-and-branch peepholes for *sbrx_branch. +++ (adjust_len) [add_set_ZN, cmp_zext]: New. +++ (QIPSI): New mode iterator. +++ (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators. +++ (gelt): New code iterator. +++ (gelt_eqne): New code attribute. +++ (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch) +++ (branch_unspec, *negated_tst, *reversed_tst) +++ (*cmpqi_sign_extend): Remove insns. +++ (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove. +++ * config/avr/avr-dimode.md (cbranch4): Canonicalize comparisons. +++ * config/avr/predicates.md (scratch_or_d_register_operand): New. +++ * config/avr/constraints.md (Yxx): New constraint. +++ +++2023-06-09 Jeevitha Palanisamy +++ +++ Backported from master: +++ 2023-06-06 Jeevitha Palanisamy +++ +++ PR target/106907 +++ * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove +++ duplicate expression. +++ +++2023-06-09 Iain Sandoe +++ +++ Backported from master: +++ 2023-06-02 Iain Sandoe +++ +++ PR target/110044 +++ * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align): +++ Make sure that we do not have a cap on field alignment before altering +++ the struct layout based on the type alignment of the first entry. +++ +++2023-06-09 liuhongt +++ +++ PR target/110108 +++ * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly +++ view_convert_expr mask to signed type when folding pblendvb +++ builtins. +++ +++2023-06-08 Alex Coplan +++ +++ Backported from master: +++ 2023-05-25 Alex Coplan +++ +++ PR target/109800 +++ * config/arm/arm.md (movdf): Generate temporary pseudo in DImode +++ instead of DFmode. +++ * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an +++ lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into +++ DFmode as an rvalue. +++ +++2023-06-08 Kyrylo Tkachov +++ +++ Backported from master: +++ 2023-05-24 Kyrylo Tkachov +++ +++ PR target/109939 +++ * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use +++ qualifier_none for the return operand. +++ +++2023-06-02 Georg-Johann Lay +++ +++ PR target/110088 +++ * config/avr/avr.md: Add an RTL peephole to optimize operations on +++ non-LD_REGS after a move from LD_REGS. +++ (piaop): New code iterator. +++ +++2023-06-01 Jonathan Wakely +++ +++ Backported from master: +++ 2023-06-01 Jonathan Wakely +++ +++ PR target/109954 +++ * doc/invoke.texi (x86 Options): Fix description of -m32 option. +++ +++2023-05-30 Andreas Schwab +++ +++ PR target/110036 +++ * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to +++ match libsanitizer. +++ +++2023-05-25 Georg-Johann Lay +++ +++ PR target/104327 +++ * config/avr/avr.cc (avr_can_inline_p): New static function. +++ (TARGET_CAN_INLINE_P): Define to that function. +++ +++2023-05-25 Georg-Johann Lay +++ +++ PR target/82931 +++ * config/avr/avr.md (*movbitqi.0): Rename to *movbit.0-6. +++ Handle any bit position and use mode QISI. +++ * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost +++ of 2 insns for bit-transfer of respective style. +++ +++2023-05-23 Georg-Johann Lay +++ +++ * config/avr/avr.cc (avr_insn_cost): New static function. +++ (TARGET_INSN_COST): Define to that function. +++ +++2023-05-22 Michael Meissner +++ +++ PR target/70243 +++ * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp. +++ (vsx_nfmsv4sf4): Do not generate vnmsubfp. Back port from master +++ 04/10/2023 change. +++ +++2023-05-22 Jakub Jelinek +++ +++ Backported from master: +++ 2023-05-21 Jakub Jelinek +++ +++ PR tree-optimization/109505 +++ * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2), +++ Combine successive equal operations with constants, +++ (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A, +++ CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P +++ operands. +++ +++2023-05-22 Kewen Lin +++ +++ Backported from master: +++ 2023-05-17 Kewen Lin +++ +++ * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with +++ suggested unroll factor once the previous analysis fails. +++ +++2023-05-20 Triffid Hunter +++ +++ PR target/105753 +++ Backport from 2023-05-20 https://gcc.gnu.org/r14-1016 +++ * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi): +++ Remove superfluous "parallel" in insn pattern. +++ ([u]divmod4): Tidy code. Use gcc_unreachable() instead of +++ printing error text to assembly. +++ +++2023-05-18 Alexandre Oliva +++ +++ * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab +++ after vmsr and vmrs, and lower the case of P0. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types. +++ (__ARM_mve_coerce1): Remove. +++ (__ARM_mve_coerce2): Remove. +++ (__ARM_mve_coerce3): Remove. +++ (__ARM_mve_coerce_i_scalar): New. +++ (__ARM_mve_coerce_s8_ptr): New. +++ (__ARM_mve_coerce_u8_ptr): New. +++ (__ARM_mve_coerce_s16_ptr): New. +++ (__ARM_mve_coerce_u16_ptr): New. +++ (__ARM_mve_coerce_s32_ptr): New. +++ (__ARM_mve_coerce_u32_ptr): New. +++ (__ARM_mve_coerce_s64_ptr): New. +++ (__ARM_mve_coerce_u64_ptr): New. +++ (__ARM_mve_coerce_f_scalar): New. +++ (__ARM_mve_coerce_f16_ptr): New. +++ (__ARM_mve_coerce_f32_ptr): New. +++ (__arm_vst4q): Change _coerce_ overloads. +++ (__arm_vbicq): Change _coerce_ overloads. +++ (__arm_vmulq): Change _coerce_ overloads. +++ (__arm_vcmpeqq): Change _coerce_ overloads. +++ (__arm_vcmpneq): Change _coerce_ overloads. +++ (__arm_vmaxnmavq): Change _coerce_ overloads. +++ (__arm_vmaxnmvq): Change _coerce_ overloads. +++ (__arm_vminnmavq): Change _coerce_ overloads. +++ (__arm_vsubq): Change _coerce_ overloads. +++ (__arm_vminnmvq): Change _coerce_ overloads. +++ (__arm_vrshlq): Change _coerce_ overloads. +++ (__arm_vqsubq): Change _coerce_ overloads. +++ (__arm_vqdmulltq): Change _coerce_ overloads. +++ (__arm_vqdmullbq): Change _coerce_ overloads. +++ (__arm_vqdmulhq): Change _coerce_ overloads. +++ (__arm_vqaddq): Change _coerce_ overloads. +++ (__arm_vhaddq): Change _coerce_ overloads. +++ (__arm_vhsubq): Change _coerce_ overloads. +++ (__arm_vqdmlashq): Change _coerce_ overloads. +++ (__arm_vqrdmlahq): Change _coerce_ overloads. +++ (__arm_vmlasq): Change _coerce_ overloads. +++ (__arm_vqdmlahq): Change _coerce_ overloads. +++ (__arm_vmaxnmavq_p): Change _coerce_ overloads. +++ (__arm_vmaxnmvq_p): Change _coerce_ overloads. +++ (__arm_vminnmavq_p): Change _coerce_ overloads. +++ (__arm_vminnmvq_p): Change _coerce_ overloads. +++ (__arm_vfmasq_m): Change _coerce_ overloads. +++ (__arm_vld1q): Change _coerce_ overloads. +++ (__arm_vld1q_z): Change _coerce_ overloads. +++ (__arm_vld2q): Change _coerce_ overloads. +++ (__arm_vld4q): Change _coerce_ overloads. +++ (__arm_vldrhq_gather_offset): Change _coerce_ overloads. +++ (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads. +++ (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads. +++ (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads. +++ (__arm_vldrwq_gather_offset): Change _coerce_ overloads. +++ (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads. +++ (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads. +++ (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads. +++ (__arm_vst1q_p): Change _coerce_ overloads. +++ (__arm_vst2q): Change _coerce_ overloads. +++ (__arm_vst1q): Change _coerce_ overloads. +++ (__arm_vstrhq): Change _coerce_ overloads. +++ (__arm_vstrhq_p): Change _coerce_ overloads. +++ (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads. +++ (__arm_vstrhq_scatter_offset): Change _coerce_ overloads. +++ (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads. +++ (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads. +++ (__arm_vstrwq_p): Change _coerce_ overloads. +++ (__arm_vstrwq): Change _coerce_ overloads. +++ (__arm_vstrwq_scatter_offset): Change _coerce_ overloads. +++ (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads. +++ (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads. +++ (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads. +++ (__arm_vsetq_lane): Change _coerce_ overloads. +++ (__arm_vcmpneq_m): Change _coerce_ overloads. +++ (__arm_vldrbq_gather_offset): Change _coerce_ overloads. +++ (__arm_vdwdupq_x_u8): Change _coerce_ overloads. +++ (__arm_vdwdupq_x_u16): Change _coerce_ overloads. +++ (__arm_vdwdupq_x_u32): Change _coerce_ overloads. +++ (__arm_viwdupq_x_u8): Change _coerce_ overloads. +++ (__arm_viwdupq_x_u16): Change _coerce_ overloads. +++ (__arm_viwdupq_x_u32): Change _coerce_ overloads. +++ (__arm_vidupq_x_u8): Change _coerce_ overloads. +++ (__arm_vddupq_x_u8): Change _coerce_ overloads. +++ (__arm_vidupq_x_u16): Change _coerce_ overloads. +++ (__arm_vddupq_x_u16): Change _coerce_ overloads. +++ (__arm_vidupq_x_u32): Change _coerce_ overloads. +++ (__arm_vddupq_x_u32): Change _coerce_ overloads. +++ (__arm_vhaddq_x): Change _coerce_ overloads. +++ (__arm_vhsubq_x): Change _coerce_ overloads. +++ (__arm_vldrdq_gather_offset): Change _coerce_ overloads. +++ (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads. +++ (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads. +++ (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads. +++ (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads. +++ (__arm_vqrdmlahq_m): Change _coerce_ overloads. +++ (__arm_vqrdmlashq_m): Change _coerce_ overloads. +++ (__arm_vqdmlashq_m): Change _coerce_ overloads. +++ (__arm_vmlaldavaxq_p): Change _coerce_ overloads. +++ (__arm_vmlasq_m): Change _coerce_ overloads. +++ (__arm_vqdmulhq_m): Change _coerce_ overloads. +++ (__arm_vqdmulltq_m): Change _coerce_ overloads. +++ (__arm_vidupq_u16): Change _coerce_ overloads. +++ (__arm_vidupq_u32): Change _coerce_ overloads. +++ (__arm_vidupq_u8): Change _coerce_ overloads. +++ (__arm_vddupq_u16): Change _coerce_ overloads. +++ (__arm_vddupq_u32): Change _coerce_ overloads. +++ (__arm_vddupq_u8): Change _coerce_ overloads. +++ (__arm_viwdupq_m): Change _coerce_ overloads. +++ (__arm_viwdupq_u16): Change _coerce_ overloads. +++ (__arm_viwdupq_u32): Change _coerce_ overloads. +++ (__arm_viwdupq_u8): Change _coerce_ overloads. +++ (__arm_vdwdupq_m): Change _coerce_ overloads. +++ (__arm_vdwdupq_u16): Change _coerce_ overloads. +++ (__arm_vdwdupq_u32): Change _coerce_ overloads. +++ (__arm_vdwdupq_u8): Change _coerce_ overloads. +++ (__arm_vaddlvaq): Change _coerce_ overloads. +++ (__arm_vaddlvaq_p): Change _coerce_ overloads. +++ (__arm_vaddvaq): Change _coerce_ overloads. +++ (__arm_vaddvaq_p): Change _coerce_ overloads. +++ (__arm_vcmphiq_m): Change _coerce_ overloads. +++ (__arm_vmladavaq_p): Change _coerce_ overloads. +++ (__arm_vmladavaxq): Change _coerce_ overloads. +++ (__arm_vmlaldavaxq): Change _coerce_ overloads. +++ (__arm_vstrbq): Change _coerce_ overloads. +++ (__arm_vstrbq_p): Change _coerce_ overloads. +++ (__arm_vrmlaldavhaq_p): Change _coerce_ overloads. +++ (__arm_vstrbq_scatter_offset): Change _coerce_ overloads. +++ (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads. +++ (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads. +++ (__arm_vstrdq_scatter_offset): Change _coerce_ overloads. +++ (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads. +++ (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ * config/arm/arm_mve.h (__arm_vbicq): Change coerce on +++ scalar constant. +++ (__arm_vmvnq_m): Likewise. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ * config/arm/arm_mve.h (__arm_vorrq): Add _n variant. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2023-05-18 Stam Markianos-Wright +++ +++ * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic. +++ (__arm_vadcq_u32): Likewise. +++ (__arm_vadcq_m_s32): Likewise. +++ (__arm_vadcq_m_u32): Likewise. +++ (__arm_vsbcq_s32): Likewise. +++ (__arm_vsbcq_u32): Likewise. +++ (__arm_vsbcq_m_s32): Likewise. +++ (__arm_vsbcq_m_u32): Likewise. +++ * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile. +++ +++2023-05-18 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vrndq_m_f, mve_vrev64q_f) +++ (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf) +++ (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_) +++ (mve_vrev64q_, mve_vcvtq_from_f_) +++ (mve_vmovltq_, mve_vmovlbq_) +++ (mve_vcvtpq_, mve_vcvtnq_) +++ (mve_vcvtmq_, mve_vcvtaq_) +++ (mve_vmvnq_n_, mve_vrev16q_v16qi) +++ (mve_vctpqhi, mve_vbrsrq_n_f) +++ (mve_vbrsrq_n_, mve_vandq_f, mve_vbicq_f) +++ (mve_vbicq_n_, mve_vctpq_mhi) +++ (mve_vcvtbq_f16_f32v8hf, mve_vcvttq_f16_f32v8hf) +++ (mve_veorq_f, mve_vmlaldavxq_s, mve_vmlsldavq_s) +++ (mve_vmlsldavxq_s, mve_vornq_f, mve_vorrq_f) +++ (mve_vrmlaldavhxq_sv4si, mve_vbicq_m_n_) +++ (mve_vcvtq_m_to_f_, mve_vshlcq_) +++ (mve_vmvnq_m_, mve_vpselq_) +++ (mve_vcvtbq_m_f16_f32v8hf, mve_vcvtbq_m_f32_f16v4sf) +++ (mve_vcvttq_m_f16_f32v8hf, mve_vcvttq_m_f32_f16v4sf) +++ (mve_vmlaldavq_p_, mve_vmlsldavaq_s) +++ (mve_vmlsldavaxq_s, mve_vmlsldavq_p_s) +++ (mve_vmlsldavxq_p_s, mve_vmvnq_m_n_) +++ (mve_vorrq_m_n_, mve_vpselq_f) +++ (mve_vrev32q_m_fv8hf, mve_vrev32q_m_) +++ (mve_vrev64q_m_f, mve_vrmlaldavhaxq_sv4si) +++ (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhaxq_sv4si) +++ (mve_vrmlsldavhq_p_sv4si, mve_vrmlsldavhxq_p_sv4si) +++ (mve_vrev16q_m_v16qi, mve_vrmlaldavhq_p_v4si) +++ (mve_vrmlsldavhaq_sv4si, mve_vandq_m_) +++ (mve_vbicq_m_, mve_veorq_m_) +++ (mve_vornq_m_, mve_vorrq_m_) +++ (mve_vandq_m_f, mve_vbicq_m_f, mve_veorq_m_f) +++ (mve_vornq_m_f, mve_vorrq_m_f) +++ (mve_vstrdq_scatter_shifted_offset_p_v2di_insn) +++ (mve_vstrdq_scatter_shifted_offset_v2di_insn) +++ (mve_vstrdq_scatter_base_wb_p_v2di) : Fix spacing and +++ capitalization in the emitted asm. +++ +++2023-05-18 Andrea Corallo +++ +++ * config/arm/constraints.md (mve_vldrd_immediate): Move it to +++ predicates.md. +++ (Ri): Move constraint definition from predicates.md. +++ (Rl): Define new constraint. +++ * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_v4si): Add +++ missing constraint. +++ (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint +++ for op 1, use mve_vstrw_immediate predicate and Rl constraint for +++ op 2. Fix asm output spacing. +++ (mve_vstrdq_scatter_base_wb_p_v2di): Add missing constraint. +++ * config/arm/predicates.md (Ri) Move constraint to constraints.md +++ (mve_vldrd_immediate): Move it from +++ constraints.md. +++ (mve_vstrw_immediate): New predicate. +++ +++2023-05-18 Murray Steele +++ +++ Backported from master: +++ 2023-01-18 Murray Steele +++ +++ PR target/108442 +++ * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic +++ function. +++ (__arm_vst1q_p_s8): Likewise. +++ (__arm_vld1q_z_u8): Likewise. +++ (__arm_vld1q_z_s8): Likewise. +++ (__arm_vst1q_p_u16): Likewise. +++ (__arm_vst1q_p_s16): Likewise. +++ (__arm_vld1q_z_u16): Likewise. +++ (__arm_vld1q_z_s16): Likewise. +++ (__arm_vst1q_p_u32): Likewise. +++ (__arm_vst1q_p_s32): Likewise. +++ (__arm_vld1q_z_u32): Likewise. +++ (__arm_vld1q_z_s32): Likewise. +++ (__arm_vld1q_z_f16): Likewise. +++ (__arm_vst1q_p_f16): Likewise. +++ (__arm_vld1q_z_f32): Likewise. +++ (__arm_vst1q_p_f32): Likewise. +++ +++2023-05-18 Andre Vieira +++ +++ Backported from master: +++ 2023-01-24 Andre Vieira +++ +++ PR target/108177 +++ * config/arm/mve.md (mve_vstrbq_p_, mve_vstrhq_p_fv8hf, +++ mve_vstrhq_p_, mve_vstrwq_p_v4si): Add memory operand +++ as input operand. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2023-04-04 Stam Markianos-Wright +++ +++ * config/arm/mve.md (mve_vcvtq_n_to_f_): Swap operands. +++ (mve_vcreateq_f): Swap operands. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2023-01-16 Stam Markianos-Wright +++ +++ PR target/96795 +++ PR target/107515 +++ * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types. +++ (__ARM_mve_coerce3): Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vqnegq_s): Fix spacing. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vqabsq_s): Fix spacing. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vnegq_f, mve_vnegq_s): +++ Fix spacing. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * config/arm/mve.md (@mve_vclzq_s): Fix spacing. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vclsq_s): Fix spacing. +++ +++2023-05-18 Christophe Lyon +++ +++ Backported from master: +++ 2023-02-03 Christophe Lyon +++ +++ * config/arm/mve.md (mve_vabavq_p_): Add length +++ attribute. +++ (mve_vqshluq_m_n_s): Likewise. +++ (mve_vshlq_m_): Likewise. +++ (mve_vsriq_m_n_): Likewise. +++ (mve_vsubq_m_): Likewise. +++ +++2023-05-18 Christophe Lyon +++ +++ Backported from master: +++ 2022-10-03 Christophe Lyon +++ +++ * config/arm/mve.md (mve_vrev64q_m_): Add early +++ clobber. +++ (mve_vrev64q_m_f): Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vrmlaldavhq_v4si, +++ mve_vrmlaldavhaq_v4si): Fix spacing vs tabs. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vmlaldavaq_) +++ (mve_vmlaldavaxq_s, mve_vmlaldavaxq_p_): Fix +++ spacing vs tabs. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vsubq_n_f): Fix spacing. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vaddlvq_p_v4si) +++ (mve_vaddq_n_, mve_vaddvaq_) +++ (mve_vaddlvaq_v4si, mve_vaddq_n_f) +++ (mve_vaddlvaq_p_v4si, mve_vaddq, mve_vaddq_f): +++ Fix spacing. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2022-11-28 Stam Markianos-Wright +++ +++ * config/arm/arm_mve.h (__arm_vsubq_x FP): New overloads. +++ (__arm_vsubq_x Integer): New. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2022-11-28 Stam Markianos-Wright +++ +++ PR target/107515 +++ * config/arm/arm_mve.h (__ARM_mve_typeid): Add float types. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2022-11-28 Stam Markianos-Wright +++ +++ PR target/96795 +++ * config/arm/arm_mve.h (__arm_vaddq): Fix Overloading. +++ (__arm_vmulq): Likewise. +++ (__arm_vcmpeqq): Likewise. +++ (__arm_vcmpneq): Likewise. +++ (__arm_vmaxnmavq): Likewise. +++ (__arm_vmaxnmvq): Likewise. +++ (__arm_vminnmavq): Likewise. +++ (__arm_vsubq): Likewise. +++ (__arm_vminnmvq): Likewise. +++ (__arm_vrshlq): Likewise. +++ (__arm_vqsubq): Likewise. +++ (__arm_vqdmulltq): Likewise. +++ (__arm_vqdmullbq): Likewise. +++ (__arm_vqdmulhq): Likewise. +++ (__arm_vqaddq): Likewise. +++ (__arm_vhaddq): Likewise. +++ (__arm_vhsubq): Likewise. +++ (__arm_vqdmlashq): Likewise. +++ (__arm_vqrdmlahq): Likewise. +++ (__arm_vmlasq): Likewise. +++ (__arm_vqdmlahq): Likewise. +++ (__arm_vmaxnmavq_p): Likewise. +++ (__arm_vmaxnmvq_p): Likewise. +++ (__arm_vminnmavq_p): Likewise. +++ (__arm_vminnmvq_p): Likewise. +++ (__arm_vfmasq_m): Likewise. +++ (__arm_vsetq_lane): Likewise. +++ (__arm_vcmpneq_m): Likewise. +++ (__arm_vhaddq_x): Likewise. +++ (__arm_vhsubq_x): Likewise. +++ (__arm_vqrdmlashq_m): Likewise. +++ (__arm_vqdmlashq_m): Likewise. +++ (__arm_vmlaldavaxq_p): Likewise. +++ (__arm_vmlasq_m): Likewise. +++ (__arm_vqdmulhq_m): Likewise. +++ (__arm_vqdmulltq_m): Likewise. +++ (__arm_viwdupq_m): Likewise. +++ (__arm_viwdupq_u16): Likewise. +++ (__arm_viwdupq_u32): Likewise. +++ (__arm_viwdupq_u8): Likewise. +++ (__arm_vdwdupq_m): Likewise. +++ (__arm_vdwdupq_u16): Likewise. +++ (__arm_vdwdupq_u32): Likewise. +++ (__arm_vdwdupq_u8): Likewise. +++ (__arm_vaddlvaq): Likewise. +++ (__arm_vaddlvaq_p): Likewise. +++ (__arm_vaddvaq): Likewise. +++ (__arm_vaddvaq_p): Likewise. +++ (__arm_vcmphiq_m): Likewise. +++ (__arm_vmladavaq_p): Likewise. +++ (__arm_vmladavaxq): Likewise. +++ (__arm_vmlaldavaxq): Likewise. +++ (__arm_vrmlaldavhaq_p): Likewise. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2022-11-28 Stam Markianos-Wright +++ +++ PR target/96795 +++ * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Change types. +++ (__arm_vaddq_m_n_s32): Likewise. +++ (__arm_vaddq_m_n_s16): Likewise. +++ (__arm_vaddq_m_n_u8): Likewise. +++ (__arm_vaddq_m_n_u32): Likewise. +++ (__arm_vaddq_m_n_u16): Likewise. +++ (__arm_vaddq_m): Fix Overloading. +++ (__ARM_mve_coerce3): New. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vabsq_f): Fix spacing. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/mve.md (@mve_vcmpq_): Fix +++ spacing. +++ * config/arm/arm_mve.h (__arm_vcmpgtq_m, __arm_vcmpleq_m) +++ (__arm_vcmpltq_m, __arm_vcmpneq_m): Add missing defines. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vdupq_n_f) +++ (mve_vdupq_n_, mve_vdupq_m_n_) +++ (mve_vdupq_m_n_f): Fix spacing. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vdwdupq_m_wb_u_insn): Fix spacing. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/mve.md (mve_vddupq_u_insn): Fix 'vddup.u' +++ spacing. +++ (mve_vddupq_m_wb_u_insn): Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Fix +++ 'vmsr' spacing and reg capitalization. +++ +++2023-05-15 liuhongt +++ +++ * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o +++ whenever -mdaz-ftz is specified. Don't link crtfastmath.o +++ when -mno-daz-ftz is specified. +++ * config/i386/darwin.h (ENDFILE_SPEC): Ditto. +++ * config/i386/gnu-user-common.h +++ (GNU_USER_TARGET_MATHFILE_SPEC): Ditto. +++ * config/i386/mingw32.h (ENDFILE_SPEC): Ditto. +++ * config/i386/i386.opt (mdaz-ftz): New option. +++ * doc/invoke.texi (x86 options): Document mftz-daz. +++ +++2023-05-09 Jakub Jelinek +++ +++ Backported from master: +++ 2023-05-09 Jakub Jelinek +++ +++ PR tree-optimization/109778 +++ * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on +++ wi::zext (x, width) rather than x if width != precision, rather +++ than using wi::zext (right, width) after the shift. +++ * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results +++ of wi::lrotate or wi::rrotate. +++ +++2023-05-09 Kewen Lin +++ +++ Backported from master: +++ 2023-04-26 Kewen Lin +++ +++ PR target/108758 +++ * config/rs6000/rs6000-builtins.def +++ (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt +++ __builtin_vsx_scalar_cmp_exp_qp_lt, +++ __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw +++ to power9-vector. +++ +++2023-05-09 Kewen Lin +++ +++ Backported from master: +++ 2023-04-26 Kewen Lin +++ +++ PR target/109069 +++ * config/rs6000/altivec.md (sldoi_to_mov): Replace predicate +++ easy_vector_constant with const_vector_each_byte_same, add +++ handlings in preparation for !easy_vector_constant, and update +++ VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P. +++ * config/rs6000/predicates.md (const_vector_each_byte_same): New +++ predicate. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/gcc/DATESTAMP +++++ b/src/gcc/DATESTAMP ++@@ -1 +1 @@ ++-20230508 +++20240119 ++--- a/src/gcc/ada/ChangeLog +++++ b/src/gcc/ada/ChangeLog ++@@ -1,3 +1,33 @@ +++2024-01-09 Steve Baird +++ +++ PR ada/104354 +++ * libgnat/s-rident.ads: Define a new restriction, +++ No_Task_Hierarchy_Implicit. This is like the No_Task_Hierarchy +++ restriction, but with the difference that setting this restriction +++ does not mean the H.6(6) post-compilation check is satisified. +++ * exp_ch6.adb (Add_Task_Actuals_To_Build_In_Place_Call): If it is +++ known that the function result cannot have tasks, then pass in a +++ null literal for the activation chain actual parameter. This +++ avoids generating a reference to an entity that +++ Build_Activation_Chain_Entity may have chosen not to generate a +++ declaration for. +++ * gnatbind.adb (List_Applicable_Restrictions): Do not list the +++ No_Task_Hierarchy_Implicit restriction. +++ * restrict.adb: Special treatment for the +++ No_Task_Hierarchy_Implicit restriction in functions +++ Get_Restriction_Id and Restriction_Active. The former is needed to +++ disallow the (unlikely) case that a user tries to explicitly +++ reference the No_Task_Hierarchy_Implicit restriction. +++ * sem_prag.adb (Analyze_Pragma): If a Sequential +++ Partition_Elaboration_Policy is specified (and the +++ No_Task_Hierarchy restriction is not already enabled), then enable +++ the No_Task_Hierarchy_Implicit restriction. +++ +++2023-11-16 Eric Botcazou +++ +++ * gcc-interface/decl.cc (gnat_to_gnu_subprog_type): Also create a +++ TYPE_DECL for the return type built for the CI/CO mechanism. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/gcc/ada/exp_ch6.adb +++++ b/src/gcc/ada/exp_ch6.adb ++@@ -630,7 +630,10 @@ package body Exp_Ch6 is ++ ++ -- Create the actual which is a pointer to the current activation chain ++ ++- if No (Chain) then +++ if Restriction_Active (No_Task_Hierarchy) then +++ Chain_Actual := Make_Null (Loc); +++ +++ elsif No (Chain) then ++ Chain_Actual := ++ Make_Attribute_Reference (Loc, ++ Prefix => Make_Identifier (Loc, Name_uChain), ++--- a/src/gcc/ada/gcc-interface/decl.cc +++++ b/src/gcc/ada/gcc-interface/decl.cc ++@@ -6207,6 +6207,12 @@ gnat_to_gnu_subprog_type (Entity_Id gnat_subprog, bool definition, ++ ++ if (debug_info_p) ++ rest_of_record_type_compilation (gnu_cico_return_type); +++ +++ /* Declare it now since it will never be declared otherwise. This +++ is necessary to ensure that its subtrees are properly marked. */ +++ create_type_decl (TYPE_NAME (gnu_cico_return_type), +++ gnu_cico_return_type, +++ true, debug_info_p, gnat_subprog); ++ } ++ ++ gnu_return_type = gnu_cico_return_type; ++--- a/src/gcc/ada/gnatbind.adb +++++ b/src/gcc/ada/gnatbind.adb ++@@ -214,6 +214,9 @@ procedure Gnatbind is ++ No_Specification_Of_Aspect => False, ++ -- Requires a parameter value, not a count ++ +++ No_Task_Hierarchy_Implicit => False, +++ -- A compiler implementation artifact, not a documented restriction +++ ++ No_Use_Of_Attribute => False, ++ -- Requires a parameter value, not a count ++ ++--- a/src/gcc/ada/libgnat/s-rident.ads +++++ b/src/gcc/ada/libgnat/s-rident.ads ++@@ -106,7 +106,7 @@ package System.Rident is ++ No_Dispatching_Calls, -- GNAT ++ No_Dynamic_Accessibility_Checks, -- GNAT ++ No_Dynamic_Attachment, -- Ada 2012 (RM E.7(10/3)) ++- No_Dynamic_CPU_Assignment, -- Ada 202x (RM D.7(10/3)) +++ No_Dynamic_CPU_Assignment, -- Ada 2022 (RM D.7(10/3)) ++ No_Dynamic_Priorities, -- (RM D.9(9)) ++ No_Enumeration_Maps, -- GNAT ++ No_Entry_Calls_In_Elaboration_Code, -- GNAT ++@@ -150,8 +150,9 @@ package System.Rident is ++ No_Task_Attributes_Package, -- GNAT ++ No_Task_At_Interrupt_Priority, -- GNAT ++ No_Task_Hierarchy, -- (RM D.7(3), H.4(3)) ++- No_Task_Termination, -- GNAT (Ravenscar) ++- No_Tasks_Unassigned_To_CPU, -- Ada 202x (D.7(10.10/4)) +++ No_Task_Hierarchy_Implicit, -- GNAT +++ No_Task_Termination, -- Ada 2005 (D.7(15.1/2)) +++ No_Tasks_Unassigned_To_CPU, -- Ada 2022 (D.7(10.10/4)) ++ No_Tasking, -- GNAT ++ No_Terminate_Alternatives, -- (RM D.7(6)) ++ No_Unchecked_Access, -- (RM H.4(18)) ++--- a/src/gcc/ada/restrict.adb +++++ b/src/gcc/ada/restrict.adb ++@@ -886,7 +886,10 @@ package body Restrict is ++ declare ++ S : constant String := Restriction_Id'Image (J); ++ begin ++- if S = Name_Buffer (1 .. Name_Len) then +++ if S = Name_Buffer (1 .. Name_Len) +++ -- users cannot name the N_T_H_Implicit restriction +++ and then J /= No_Task_Hierarchy_Implicit +++ then ++ return J; ++ end if; ++ end; ++@@ -1093,7 +1096,12 @@ package body Restrict is ++ ++ function Restriction_Active (R : All_Restrictions) return Boolean is ++ begin ++- return Restrictions.Set (R) and then not Restriction_Warnings (R); +++ if Restrictions.Set (R) and then not Restriction_Warnings (R) then +++ return True; +++ else +++ return R = No_Task_Hierarchy +++ and then Restriction_Active (No_Task_Hierarchy_Implicit); +++ end if; ++ end Restriction_Active; ++ ++ -------------------------------- ++--- a/src/gcc/ada/sem_prag.adb +++++ b/src/gcc/ada/sem_prag.adb ++@@ -21102,6 +21102,25 @@ package body Sem_Prag is ++ if Partition_Elaboration_Policy_Sloc /= System_Location then ++ Partition_Elaboration_Policy_Sloc := Loc; ++ end if; +++ +++ if PEP_Val = Name_Sequential +++ and then not Restriction_Active (No_Task_Hierarchy) +++ then +++ -- RM H.6(6) guarantees that No_Task_Hierarchy will be +++ -- set eventually, so take advantage of that knowledge now. +++ -- But we have to do this in a tricky way. If we simply +++ -- set the No_Task_Hierarchy restriction here, then the +++ -- assumption that the restriction will be set eventually +++ -- becomes a self-fulfilling prophecy; the binder can +++ -- then mistakenly conclude that the H.6(6) rule is +++ -- satisified in cases where the post-compilation check +++ -- should fail. So we invent a new restriction, +++ -- No_Task_Hierarchy_Implicit, which is treated specially +++ -- in the function Restriction_Active. +++ +++ Set_Restriction (No_Task_Hierarchy_Implicit, N); +++ pragma Assert (Restriction_Active (No_Task_Hierarchy)); +++ end if; ++ end if; ++ end PEP; ++ ++--- a/src/gcc/attribs.cc +++++ b/src/gcc/attribs.cc ++@@ -578,9 +578,9 @@ attribute_ignored_p (tree attr) ++ return false; ++ if (tree ns = get_attribute_namespace (attr)) ++ { ++- if (attr_namespace_ignored_p (ns)) ++- return true; ++ const attribute_spec *as = lookup_attribute_spec (TREE_PURPOSE (attr)); +++ if (as == NULL && attr_namespace_ignored_p (ns)) +++ return true; ++ if (as && as->max_length == -2) ++ return true; ++ } ++@@ -851,7 +851,10 @@ decl_attributes (tree *node, tree attributes, int flags, ++ } ++ } ++ ++- if (no_add_attrs) +++ if (no_add_attrs +++ /* Don't add attributes registered just for -Wno-attributes=foo::bar +++ purposes. */ +++ || attribute_ignored_p (attr)) ++ continue; ++ ++ if (spec->handler != NULL) ++--- a/src/gcc/c-family/ChangeLog +++++ b/src/gcc/c-family/ChangeLog ++@@ -1,3 +1,31 @@ +++2023-12-15 Richard Biener +++ +++ Backported from master: +++ 2023-08-31 Richard Biener +++ +++ PR middle-end/111253 +++ * c-pretty-print.cc (c_pretty_printer::primary_expression): +++ Only dump gimple_assign_single_p SSA def RHS. +++ +++2023-05-19 Patrick Palka +++ +++ Backported from master: +++ 2023-05-15 Patrick Palka +++ +++ * c-cppbuiltin.cc (c_cpp_builtins): Predefine __cpp_auto_cast +++ for C++23. +++ +++2023-05-09 Martin Uecker +++ +++ Backported from master: +++ 2023-02-18 Martin Uecker +++ +++ PR c/105660 +++ * c-attribs.cc (append_access_attr): Use order of arguments when +++ construction string. +++ (append_access_attr_idxs): Rename and make static. +++ * c-warn.cc (warn_parm_array_mismatch): Add assertion. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/gcc/c-family/c-attribs.cc +++++ b/src/gcc/c-family/c-attribs.cc ++@@ -4624,22 +4624,27 @@ append_access_attr (tree node[3], tree attrs, const char *attrstr, ++ rdwr_map cur_idxs; ++ init_attr_rdwr_indices (&cur_idxs, attrs); ++ +++ tree args = TYPE_ARG_TYPES (node[0]); +++ int argpos = 0; ++ std::string spec; ++- for (auto it = new_idxs.begin (); it != new_idxs.end (); ++it) +++ for (tree arg = args; arg; arg = TREE_CHAIN (arg), argpos++) ++ { ++- const auto &newaxsref = *it; +++ const attr_access* const newa = new_idxs.get (argpos); +++ +++ if (!newa) +++ continue; ++ ++ /* The map has two equal entries for each pointer argument that ++ has an associated size argument. Process just the entry for ++ the former. */ ++- if ((unsigned)newaxsref.first != newaxsref.second.ptrarg) +++ if ((unsigned)argpos != newa->ptrarg) ++ continue; ++ ++- const attr_access* const cura = cur_idxs.get (newaxsref.first); +++ const attr_access* const cura = cur_idxs.get (argpos); ++ if (!cura) ++ { ++ /* The new attribute needs to be added. */ ++- tree str = newaxsref.second.to_internal_string (); +++ tree str = newa->to_internal_string (); ++ spec += TREE_STRING_POINTER (str); ++ continue; ++ } ++@@ -4647,7 +4652,6 @@ append_access_attr (tree node[3], tree attrs, const char *attrstr, ++ /* The new access spec refers to an array/pointer argument for ++ which an access spec already exists. Check and diagnose any ++ conflicts. If no conflicts are found, merge the two. */ ++- const attr_access* const newa = &newaxsref.second; ++ ++ if (!attrstr) ++ { ++@@ -4782,7 +4786,7 @@ append_access_attr (tree node[3], tree attrs, const char *attrstr, ++ continue; ++ ++ /* Merge the CURA and NEWA. */ ++- attr_access merged = newaxsref.second; +++ attr_access merged = *newa; ++ ++ /* VLA seen in a declaration takes precedence. */ ++ if (cura->minsize == HOST_WIDE_INT_M1U) ++@@ -4808,9 +4812,9 @@ append_access_attr (tree node[3], tree attrs, const char *attrstr, ++ ++ /* Convenience wrapper for the above. */ ++ ++-tree ++-append_access_attr (tree node[3], tree attrs, const char *attrstr, ++- char code, HOST_WIDE_INT idxs[2]) +++static tree +++append_access_attr_idxs (tree node[3], tree attrs, const char *attrstr, +++ char code, HOST_WIDE_INT idxs[2]) ++ { ++ char attrspec[80]; ++ int n = sprintf (attrspec, "%c%u", code, (unsigned) idxs[0] - 1); ++@@ -5101,7 +5105,7 @@ handle_access_attribute (tree node[3], tree name, tree args, int flags, ++ attributes specified on previous declarations of the same type ++ and if not, concatenate the two. */ ++ const char code = attr_access::mode_chars[mode]; ++- tree new_attrs = append_access_attr (node, attrs, attrstr, code, idxs); +++ tree new_attrs = append_access_attr_idxs (node, attrs, attrstr, code, idxs); ++ if (!new_attrs) ++ return NULL_TREE; ++ ++@@ -5114,7 +5118,7 @@ handle_access_attribute (tree node[3], tree name, tree args, int flags, ++ { ++ /* Repeat for the previously declared type. */ ++ attrs = TYPE_ATTRIBUTES (TREE_TYPE (node[1])); ++- new_attrs = append_access_attr (node, attrs, attrstr, code, idxs); +++ new_attrs = append_access_attr_idxs (node, attrs, attrstr, code, idxs); ++ if (!new_attrs) ++ return NULL_TREE; ++ ++--- a/src/gcc/c-family/c-cppbuiltin.cc +++++ b/src/gcc/c-family/c-cppbuiltin.cc ++@@ -1080,6 +1080,7 @@ c_cpp_builtins (cpp_reader *pfile) ++ cpp_define (pfile, "__cpp_if_consteval=202106L"); ++ cpp_define (pfile, "__cpp_constexpr=202110L"); ++ cpp_define (pfile, "__cpp_multidimensional_subscript=202110L"); +++ cpp_define (pfile, "__cpp_auto_cast=202110L"); ++ } ++ if (flag_concepts) ++ { ++--- a/src/gcc/c-family/c-pretty-print.cc +++++ b/src/gcc/c-family/c-pretty-print.cc ++@@ -33,6 +33,9 @@ along with GCC; see the file COPYING3. If not see ++ #include "langhooks.h" ++ #include "options.h" ++ #include "internal-fn.h" +++#include "function.h" +++#include "basic-block.h" +++#include "gimple.h" ++ ++ /* The pretty-printer code is primarily designed to closely follow ++ (GNU) C and C++ grammars. That is to be contrasted with spaghetti ++@@ -1363,12 +1366,14 @@ c_pretty_printer::primary_expression (tree e) ++ else ++ primary_expression (var); ++ } ++- else +++ else if (gimple_assign_single_p (SSA_NAME_DEF_STMT (e))) ++ { ++ /* Print only the right side of the GIMPLE assignment. */ ++ gimple *def_stmt = SSA_NAME_DEF_STMT (e); ++ pp_gimple_stmt_1 (this, def_stmt, 0, TDF_RHS_ONLY); ++ } +++ else +++ expression (e); ++ break; ++ ++ default: ++--- a/src/gcc/c-family/c-warn.cc +++++ b/src/gcc/c-family/c-warn.cc ++@@ -3628,6 +3628,8 @@ warn_parm_array_mismatch (location_t origloc, tree fndecl, tree newparms) ++ for (tree newvbl = newa->size, curvbl = cura->size; newvbl; ++ newvbl = TREE_CHAIN (newvbl), curvbl = TREE_CHAIN (curvbl)) ++ { +++ gcc_assert (curvbl); +++ ++ tree newpos = TREE_PURPOSE (newvbl); ++ tree curpos = TREE_PURPOSE (curvbl); ++ ++--- a/src/gcc/common/config/i386/cpuinfo.h +++++ b/src/gcc/common/config/i386/cpuinfo.h ++@@ -435,7 +435,6 @@ get_intel_cpu (struct __processor_model *cpu_model, ++ cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE; ++ break; ++ case 0xa7: ++- case 0xa8: ++ /* Rocket Lake. */ ++ cpu = "rocketlake"; ++ CHECK___builtin_cpu_is ("corei7"); ++@@ -508,7 +507,6 @@ get_intel_cpu (struct __processor_model *cpu_model, ++ break; ++ case 0x97: ++ case 0x9a: ++- case 0xbf: ++ /* Alder Lake. */ ++ cpu = "alderlake"; ++ CHECK___builtin_cpu_is ("corei7"); ++@@ -649,7 +647,9 @@ get_available_features (struct __processor_model *cpu_model, ++ /* Get Advanced Features at level 7 (eax = 7, ecx = 0/1). */ ++ if (max_cpuid_level >= 7) ++ { ++- __cpuid_count (7, 0, eax, ebx, ecx, edx); +++ unsigned int max_subleaf_level; +++ +++ __cpuid_count (7, 0, max_subleaf_level, ebx, ecx, edx); ++ if (ebx & bit_BMI) ++ set_feature (FEATURE_BMI); ++ if (ebx & bit_SGX) ++@@ -761,18 +761,21 @@ get_available_features (struct __processor_model *cpu_model, ++ set_feature (FEATURE_AVX512FP16); ++ } ++ ++- __cpuid_count (7, 1, eax, ebx, ecx, edx); ++- if (eax & bit_HRESET) ++- set_feature (FEATURE_HRESET); ++- if (avx_usable) ++- { ++- if (eax & bit_AVXVNNI) ++- set_feature (FEATURE_AVXVNNI); ++- } ++- if (avx512_usable) +++ if (max_subleaf_level >= 1) ++ { ++- if (eax & bit_AVX512BF16) ++- set_feature (FEATURE_AVX512BF16); +++ __cpuid_count (7, 1, eax, ebx, ecx, edx); +++ if (eax & bit_HRESET) +++ set_feature (FEATURE_HRESET); +++ if (avx_usable) +++ { +++ if (eax & bit_AVXVNNI) +++ set_feature (FEATURE_AVXVNNI); +++ } +++ if (avx512_usable) +++ { +++ if (eax & bit_AVX512BF16) +++ set_feature (FEATURE_AVX512BF16); +++ } ++ } ++ } ++ ++--- a/src/gcc/config.in +++++ b/src/gcc/config.in ++@@ -672,6 +672,12 @@ ++ #endif ++ ++ +++/* Define if your assembler supports htm insns on power10. */ +++#ifndef USED_FOR_TARGET +++#undef HAVE_AS_POWER10_HTM +++#endif +++ +++ ++ /* Define if your assembler supports .ref */ ++ #ifndef USED_FOR_TARGET ++ #undef HAVE_AS_REF ++--- a/src/gcc/config/aarch64/aarch64-builtins.cc +++++ b/src/gcc/config/aarch64/aarch64-builtins.cc ++@@ -751,6 +751,16 @@ aarch64_general_add_builtin (const char *name, tree type, unsigned int code, ++ NULL, attrs); ++ } ++ +++static tree +++aarch64_general_simulate_builtin (const char *name, tree fntype, +++ unsigned int code, +++ tree attrs = NULL_TREE) +++{ +++ code = (code << AARCH64_BUILTIN_SHIFT) | AARCH64_BUILTIN_GENERAL; +++ return simulate_builtin_function_decl (input_location, name, fntype, +++ code, NULL, attrs); +++} +++ ++ static const char * ++ aarch64_mangle_builtin_scalar_type (const_tree type) ++ { ++@@ -1634,11 +1644,11 @@ aarch64_init_ls64_builtins_types (void) ++ gcc_assert (TYPE_ALIGN (array_type) == 64); ++ ++ tree field = build_decl (input_location, FIELD_DECL, ++- get_identifier ("val"), array_type); +++ get_identifier ("val"), array_type); ++ ++ ls64_arm_data_t = lang_hooks.types.simulate_record_decl (input_location, ++- tuple_type_name, ++- make_array_slice (&field, 1)); +++ tuple_type_name, +++ make_array_slice (&field, 1)); ++ ++ gcc_assert (TYPE_MODE (ls64_arm_data_t) == V8DImode); ++ gcc_assert (TYPE_MODE_RAW (ls64_arm_data_t) == TYPE_MODE (ls64_arm_data_t)); ++@@ -1651,23 +1661,24 @@ aarch64_init_ls64_builtins (void) ++ aarch64_init_ls64_builtins_types (); ++ ++ ls64_builtins_data data[4] = { ++- {"__builtin_aarch64_ld64b", AARCH64_LS64_BUILTIN_LD64B, +++ {"__arm_ld64b", AARCH64_LS64_BUILTIN_LD64B, ++ build_function_type_list (ls64_arm_data_t, ++- const_ptr_type_node, NULL_TREE)}, ++- {"__builtin_aarch64_st64b", AARCH64_LS64_BUILTIN_ST64B, +++ const_ptr_type_node, NULL_TREE)}, +++ {"__arm_st64b", AARCH64_LS64_BUILTIN_ST64B, ++ build_function_type_list (void_type_node, ptr_type_node, ++- ls64_arm_data_t, NULL_TREE)}, ++- {"__builtin_aarch64_st64bv", AARCH64_LS64_BUILTIN_ST64BV, +++ ls64_arm_data_t, NULL_TREE)}, +++ {"__arm_st64bv", AARCH64_LS64_BUILTIN_ST64BV, ++ build_function_type_list (uint64_type_node, ptr_type_node, ++- ls64_arm_data_t, NULL_TREE)}, ++- {"__builtin_aarch64_st64bv0", AARCH64_LS64_BUILTIN_ST64BV0, +++ ls64_arm_data_t, NULL_TREE)}, +++ {"__arm_st64bv0", AARCH64_LS64_BUILTIN_ST64BV0, ++ build_function_type_list (uint64_type_node, ptr_type_node, ++- ls64_arm_data_t, NULL_TREE)}, +++ ls64_arm_data_t, NULL_TREE)}, ++ }; ++ ++ for (size_t i = 0; i < ARRAY_SIZE (data); ++i) ++ aarch64_builtin_decls[data[i].code] ++- = aarch64_general_add_builtin (data[i].name, data[i].type, data[i].code); +++ = aarch64_general_simulate_builtin (data[i].name, data[i].type, +++ data[i].code); ++ } ++ ++ static void ++@@ -1800,6 +1811,9 @@ aarch64_general_init_builtins (void) ++ ++ if (TARGET_MEMTAG) ++ aarch64_init_memtag_builtins (); +++ +++ if (in_lto_p) +++ handle_arm_acle_h (); ++ } ++ ++ /* Implement TARGET_BUILTIN_DECL for the AARCH64_BUILTIN_GENERAL group. */ ++@@ -2281,40 +2295,40 @@ aarch64_expand_builtin_ls64 (int fcode, tree exp, rtx target) ++ { ++ case AARCH64_LS64_BUILTIN_LD64B: ++ { ++- rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); ++- create_output_operand (&ops[0], target, V8DImode); ++- create_input_operand (&ops[1], op0, DImode); ++- expand_insn (CODE_FOR_ld64b, 2, ops); ++- return ops[0].value; +++ rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); +++ create_output_operand (&ops[0], target, V8DImode); +++ create_input_operand (&ops[1], op0, DImode); +++ expand_insn (CODE_FOR_ld64b, 2, ops); +++ return ops[0].value; ++ } ++ case AARCH64_LS64_BUILTIN_ST64B: ++ { ++- rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); ++- rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); ++- create_output_operand (&ops[0], op0, DImode); ++- create_input_operand (&ops[1], op1, V8DImode); ++- expand_insn (CODE_FOR_st64b, 2, ops); ++- return const0_rtx; +++ rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); +++ rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); +++ create_input_operand (&ops[0], op0, DImode); +++ create_input_operand (&ops[1], op1, V8DImode); +++ expand_insn (CODE_FOR_st64b, 2, ops); +++ return const0_rtx; ++ } ++ case AARCH64_LS64_BUILTIN_ST64BV: ++ { ++- rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); ++- rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); ++- create_output_operand (&ops[0], target, DImode); ++- create_input_operand (&ops[1], op0, DImode); ++- create_input_operand (&ops[2], op1, V8DImode); ++- expand_insn (CODE_FOR_st64bv, 3, ops); ++- return ops[0].value; +++ rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); +++ rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); +++ create_output_operand (&ops[0], target, DImode); +++ create_input_operand (&ops[1], op0, DImode); +++ create_input_operand (&ops[2], op1, V8DImode); +++ expand_insn (CODE_FOR_st64bv, 3, ops); +++ return ops[0].value; ++ } ++ case AARCH64_LS64_BUILTIN_ST64BV0: ++ { ++- rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); ++- rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); ++- create_output_operand (&ops[0], target, DImode); ++- create_input_operand (&ops[1], op0, DImode); ++- create_input_operand (&ops[2], op1, V8DImode); ++- expand_insn (CODE_FOR_st64bv0, 3, ops); ++- return ops[0].value; +++ rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); +++ rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); +++ create_output_operand (&ops[0], target, DImode); +++ create_input_operand (&ops[1], op0, DImode); +++ create_input_operand (&ops[2], op1, V8DImode); +++ expand_insn (CODE_FOR_st64bv0, 3, ops); +++ return ops[0].value; ++ } ++ } ++ ++--- a/src/gcc/config/aarch64/aarch64-protos.h +++++ b/src/gcc/config/aarch64/aarch64-protos.h ++@@ -781,6 +781,7 @@ bool aarch64_emit_approx_div (rtx, rtx, rtx); ++ bool aarch64_emit_approx_sqrt (rtx, rtx, bool); ++ tree aarch64_vector_load_decl (tree); ++ void aarch64_expand_call (rtx, rtx, rtx, bool); +++bool aarch64_expand_cpymem_mops (rtx *, bool); ++ bool aarch64_expand_cpymem (rtx *); ++ bool aarch64_expand_setmem (rtx *); ++ bool aarch64_float_const_zero_rtx_p (rtx); ++--- a/src/gcc/config/aarch64/aarch64.cc +++++ b/src/gcc/config/aarch64/aarch64.cc ++@@ -8133,18 +8133,32 @@ aarch64_needs_frame_chain (void) ++ return aarch64_use_frame_pointer; ++ } ++ +++/* Return true if the current function should save registers above +++ the locals area, rather than below it. */ +++ +++static bool +++aarch64_save_regs_above_locals_p () +++{ +++ /* When using stack smash protection, make sure that the canary slot +++ comes between the locals and the saved registers. Otherwise, +++ it would be possible for a carefully sized smash attack to change +++ the saved registers (particularly LR and FP) without reaching the +++ canary. */ +++ return crtl->stack_protect_guard; +++} +++ ++ /* Mark the registers that need to be saved by the callee and calculate ++ the size of the callee-saved registers area and frame record (both FP ++ and LR may be omitted). */ ++ static void ++ aarch64_layout_frame (void) ++ { ++- poly_int64 offset = 0; ++ int regno, last_fp_reg = INVALID_REGNUM; ++ machine_mode vector_save_mode = aarch64_reg_save_mode (V8_REGNUM); ++ poly_int64 vector_save_size = GET_MODE_SIZE (vector_save_mode); ++ bool frame_related_fp_reg_p = false; ++ aarch64_frame &frame = cfun->machine->frame; +++ poly_int64 top_of_locals = -1; ++ ++ frame.emit_frame_chain = aarch64_needs_frame_chain (); ++ ++@@ -8211,11 +8225,18 @@ aarch64_layout_frame (void) ++ && !crtl->abi->clobbers_full_reg_p (regno)) ++ frame.reg_offset[regno] = SLOT_REQUIRED; ++ ++- /* With stack-clash, LR must be saved in non-leaf functions. The saving of ++- LR counts as an implicit probe which allows us to maintain the invariant ++- described in the comment at expand_prologue. */ ++- gcc_assert (crtl->is_leaf ++- || maybe_ne (frame.reg_offset[R30_REGNUM], SLOT_NOT_REQUIRED)); +++ bool regs_at_top_p = aarch64_save_regs_above_locals_p (); +++ +++ poly_int64 offset = crtl->outgoing_args_size; +++ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); +++ if (regs_at_top_p) +++ { +++ offset += get_frame_size (); +++ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); +++ top_of_locals = offset; +++ } +++ frame.bytes_below_saved_regs = offset; +++ frame.sve_save_and_probe = INVALID_REGNUM; ++ ++ /* Now assign stack slots for the registers. Start with the predicate ++ registers, since predicate LDR and STR have a relatively small ++@@ -8223,11 +8244,14 @@ aarch64_layout_frame (void) ++ for (regno = P0_REGNUM; regno <= P15_REGNUM; regno++) ++ if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) ++ { +++ if (frame.sve_save_and_probe == INVALID_REGNUM) +++ frame.sve_save_and_probe = regno; ++ frame.reg_offset[regno] = offset; ++ offset += BYTES_PER_SVE_PRED; ++ } ++ ++- if (maybe_ne (offset, 0)) +++ poly_int64 saved_prs_size = offset - frame.bytes_below_saved_regs; +++ if (maybe_ne (saved_prs_size, 0)) ++ { ++ /* If we have any vector registers to save above the predicate registers, ++ the offset of the vector register save slots need to be a multiple ++@@ -8245,10 +8269,10 @@ aarch64_layout_frame (void) ++ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); ++ else ++ { ++- if (known_le (offset, vector_save_size)) ++- offset = vector_save_size; ++- else if (known_le (offset, vector_save_size * 2)) ++- offset = vector_save_size * 2; +++ if (known_le (saved_prs_size, vector_save_size)) +++ offset = frame.bytes_below_saved_regs + vector_save_size; +++ else if (known_le (saved_prs_size, vector_save_size * 2)) +++ offset = frame.bytes_below_saved_regs + vector_save_size * 2; ++ else ++ gcc_unreachable (); ++ } ++@@ -8259,34 +8283,53 @@ aarch64_layout_frame (void) ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) ++ { +++ if (frame.sve_save_and_probe == INVALID_REGNUM) +++ frame.sve_save_and_probe = regno; ++ frame.reg_offset[regno] = offset; ++ offset += vector_save_size; ++ } ++ ++ /* OFFSET is now the offset of the hard frame pointer from the bottom ++ of the callee save area. */ ++- bool saves_below_hard_fp_p = maybe_ne (offset, 0); ++- frame.below_hard_fp_saved_regs_size = offset; +++ auto below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs; +++ bool saves_below_hard_fp_p = maybe_ne (below_hard_fp_saved_regs_size, 0); +++ gcc_assert (!saves_below_hard_fp_p +++ || (frame.sve_save_and_probe != INVALID_REGNUM +++ && known_eq (frame.reg_offset[frame.sve_save_and_probe], +++ frame.bytes_below_saved_regs))); +++ +++ frame.bytes_below_hard_fp = offset; +++ frame.hard_fp_save_and_probe = INVALID_REGNUM; +++ +++ auto allocate_gpr_slot = [&](unsigned int regno) +++ { +++ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) +++ frame.hard_fp_save_and_probe = regno; +++ frame.reg_offset[regno] = offset; +++ if (frame.wb_push_candidate1 == INVALID_REGNUM) +++ frame.wb_push_candidate1 = regno; +++ else if (frame.wb_push_candidate2 == INVALID_REGNUM) +++ frame.wb_push_candidate2 = regno; +++ offset += UNITS_PER_WORD; +++ }; +++ ++ if (frame.emit_frame_chain) ++ { ++ /* FP and LR are placed in the linkage record. */ ++- frame.reg_offset[R29_REGNUM] = offset; ++- frame.wb_push_candidate1 = R29_REGNUM; ++- frame.reg_offset[R30_REGNUM] = offset + UNITS_PER_WORD; ++- frame.wb_push_candidate2 = R30_REGNUM; ++- offset += 2 * UNITS_PER_WORD; +++ allocate_gpr_slot (R29_REGNUM); +++ allocate_gpr_slot (R30_REGNUM); ++ } +++ else if (flag_stack_clash_protection +++ && known_eq (frame.reg_offset[R30_REGNUM], SLOT_REQUIRED)) +++ /* Put the LR save slot first, since it makes a good choice of probe +++ for stack clash purposes. The idea is that the link register usually +++ has to be saved before a call anyway, and so we lose little by +++ stopping it from being individually shrink-wrapped. */ +++ allocate_gpr_slot (R30_REGNUM); ++ ++ for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) ++ if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) ++- { ++- frame.reg_offset[regno] = offset; ++- if (frame.wb_push_candidate1 == INVALID_REGNUM) ++- frame.wb_push_candidate1 = regno; ++- else if (frame.wb_push_candidate2 == INVALID_REGNUM) ++- frame.wb_push_candidate2 = regno; ++- offset += UNITS_PER_WORD; ++- } +++ allocate_gpr_slot (regno); ++ ++ poly_int64 max_int_offset = offset; ++ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); ++@@ -8295,6 +8338,8 @@ aarch64_layout_frame (void) ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ if (known_eq (frame.reg_offset[regno], SLOT_REQUIRED)) ++ { +++ if (frame.hard_fp_save_and_probe == INVALID_REGNUM) +++ frame.hard_fp_save_and_probe = regno; ++ /* If there is an alignment gap between integer and fp callee-saves, ++ allocate the last fp register to it if possible. */ ++ if (regno == last_fp_reg ++@@ -8317,30 +8362,36 @@ aarch64_layout_frame (void) ++ ++ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); ++ ++- frame.saved_regs_size = offset; ++- ++- poly_int64 varargs_and_saved_regs_size = offset + frame.saved_varargs_size; +++ auto saved_regs_size = offset - frame.bytes_below_saved_regs; +++ gcc_assert (known_eq (saved_regs_size, below_hard_fp_saved_regs_size) +++ || (frame.hard_fp_save_and_probe != INVALID_REGNUM +++ && known_eq (frame.reg_offset[frame.hard_fp_save_and_probe], +++ frame.bytes_below_hard_fp))); ++ ++- poly_int64 above_outgoing_args ++- = aligned_upper_bound (varargs_and_saved_regs_size ++- + get_frame_size (), ++- STACK_BOUNDARY / BITS_PER_UNIT); ++- ++- frame.hard_fp_offset ++- = above_outgoing_args - frame.below_hard_fp_saved_regs_size; +++ /* With stack-clash, a register must be saved in non-leaf functions. +++ The saving of the bottommost register counts as an implicit probe, +++ which allows us to maintain the invariant described in the comment +++ at expand_prologue. */ +++ gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0)); ++ ++- /* Both these values are already aligned. */ ++- gcc_assert (multiple_p (crtl->outgoing_args_size, ++- STACK_BOUNDARY / BITS_PER_UNIT)); ++- frame.frame_size = above_outgoing_args + crtl->outgoing_args_size; +++ if (!regs_at_top_p) +++ { +++ offset += get_frame_size (); +++ offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT); +++ top_of_locals = offset; +++ } +++ offset += frame.saved_varargs_size; +++ gcc_assert (multiple_p (offset, STACK_BOUNDARY / BITS_PER_UNIT)); +++ frame.frame_size = offset; ++ ++- frame.locals_offset = frame.saved_varargs_size; +++ frame.bytes_above_hard_fp = frame.frame_size - frame.bytes_below_hard_fp; +++ gcc_assert (known_ge (top_of_locals, 0)); +++ frame.bytes_above_locals = frame.frame_size - top_of_locals; ++ ++ frame.initial_adjust = 0; ++ frame.final_adjust = 0; ++ frame.callee_adjust = 0; ++ frame.sve_callee_adjust = 0; ++- frame.callee_offset = 0; ++ ++ frame.wb_pop_candidate1 = frame.wb_push_candidate1; ++ frame.wb_pop_candidate2 = frame.wb_push_candidate2; ++@@ -8351,7 +8402,7 @@ aarch64_layout_frame (void) ++ frame.is_scs_enabled ++ = (!crtl->calls_eh_return ++ && sanitize_flags_p (SANITIZE_SHADOW_CALL_STACK) ++- && known_ge (cfun->machine->frame.reg_offset[LR_REGNUM], 0)); +++ && known_ge (frame.reg_offset[LR_REGNUM], 0)); ++ ++ /* When shadow call stack is enabled, the scs_pop in the epilogue will ++ restore x30, and we don't need to pop x30 again in the traditional ++@@ -8371,75 +8422,76 @@ aarch64_layout_frame (void) ++ max_push_offset to 0, because no registers are popped at this time, ++ so callee_adjust cannot be adjusted. */ ++ HOST_WIDE_INT max_push_offset = 0; ++- if (frame.wb_pop_candidate2 != INVALID_REGNUM) ++- max_push_offset = 512; ++- else if (frame.wb_pop_candidate1 != INVALID_REGNUM) ++- max_push_offset = 256; +++ if (frame.wb_pop_candidate1 != INVALID_REGNUM) +++ { +++ if (frame.wb_pop_candidate2 != INVALID_REGNUM) +++ max_push_offset = 512; +++ else +++ max_push_offset = 256; +++ } ++ ++- HOST_WIDE_INT const_size, const_outgoing_args_size, const_fp_offset; +++ HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp; ++ HOST_WIDE_INT const_saved_regs_size; ++- if (frame.frame_size.is_constant (&const_size) ++- && const_size < max_push_offset ++- && known_eq (frame.hard_fp_offset, const_size)) +++ if (known_eq (saved_regs_size, 0)) +++ frame.initial_adjust = frame.frame_size; +++ else if (frame.frame_size.is_constant (&const_size) +++ && const_size < max_push_offset +++ && known_eq (frame.bytes_above_hard_fp, const_size)) ++ { ++- /* Simple, small frame with no outgoing arguments: +++ /* Simple, small frame with no data below the saved registers. ++ ++ stp reg1, reg2, [sp, -frame_size]! ++ stp reg3, reg4, [sp, 16] */ ++ frame.callee_adjust = const_size; ++ } ++- else if (crtl->outgoing_args_size.is_constant (&const_outgoing_args_size) ++- && frame.saved_regs_size.is_constant (&const_saved_regs_size) ++- && const_outgoing_args_size + const_saved_regs_size < 512 ++- /* We could handle this case even with outgoing args, provided ++- that the number of args left us with valid offsets for all ++- predicate and vector save slots. It's such a rare case that ++- it hardly seems worth the effort though. */ ++- && (!saves_below_hard_fp_p || const_outgoing_args_size == 0) +++ else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs) +++ && saved_regs_size.is_constant (&const_saved_regs_size) +++ && const_below_saved_regs + const_saved_regs_size < 512 +++ /* We could handle this case even with data below the saved +++ registers, provided that that data left us with valid offsets +++ for all predicate and vector save slots. It's such a rare +++ case that it hardly seems worth the effort though. */ +++ && (!saves_below_hard_fp_p || const_below_saved_regs == 0) ++ && !(cfun->calls_alloca ++- && frame.hard_fp_offset.is_constant (&const_fp_offset) ++- && const_fp_offset < max_push_offset)) +++ && frame.bytes_above_hard_fp.is_constant (&const_above_fp) +++ && const_above_fp < max_push_offset)) ++ { ++- /* Frame with small outgoing arguments: +++ /* Frame with small area below the saved registers: ++ ++ sub sp, sp, frame_size ++- stp reg1, reg2, [sp, outgoing_args_size] ++- stp reg3, reg4, [sp, outgoing_args_size + 16] */ +++ stp reg1, reg2, [sp, bytes_below_saved_regs] +++ stp reg3, reg4, [sp, bytes_below_saved_regs + 16] */ ++ frame.initial_adjust = frame.frame_size; ++- frame.callee_offset = const_outgoing_args_size; ++ } ++ else if (saves_below_hard_fp_p ++- && known_eq (frame.saved_regs_size, ++- frame.below_hard_fp_saved_regs_size)) +++ && known_eq (saved_regs_size, below_hard_fp_saved_regs_size)) ++ { ++ /* Frame in which all saves are SVE saves: ++ ++- sub sp, sp, hard_fp_offset + below_hard_fp_saved_regs_size +++ sub sp, sp, frame_size - bytes_below_saved_regs ++ save SVE registers relative to SP ++- sub sp, sp, outgoing_args_size */ ++- frame.initial_adjust = (frame.hard_fp_offset ++- + frame.below_hard_fp_saved_regs_size); ++- frame.final_adjust = crtl->outgoing_args_size; +++ sub sp, sp, bytes_below_saved_regs */ +++ frame.initial_adjust = frame.frame_size - frame.bytes_below_saved_regs; +++ frame.final_adjust = frame.bytes_below_saved_regs; ++ } ++- else if (frame.hard_fp_offset.is_constant (&const_fp_offset) ++- && const_fp_offset < max_push_offset) +++ else if (frame.bytes_above_hard_fp.is_constant (&const_above_fp) +++ && const_above_fp < max_push_offset) ++ { ++- /* Frame with large outgoing arguments or SVE saves, but with ++- a small local area: +++ /* Frame with large area below the saved registers, or with SVE saves, +++ but with a small area above: ++ ++ stp reg1, reg2, [sp, -hard_fp_offset]! ++ stp reg3, reg4, [sp, 16] ++ [sub sp, sp, below_hard_fp_saved_regs_size] ++ [save SVE registers relative to SP] ++- sub sp, sp, outgoing_args_size */ ++- frame.callee_adjust = const_fp_offset; ++- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; ++- frame.final_adjust = crtl->outgoing_args_size; +++ sub sp, sp, bytes_below_saved_regs */ +++ frame.callee_adjust = const_above_fp; +++ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; +++ frame.final_adjust = frame.bytes_below_saved_regs; ++ } ++ else ++ { ++- /* Frame with large local area and outgoing arguments or SVE saves, ++- using frame pointer: +++ /* General case: ++ ++ sub sp, sp, hard_fp_offset ++ stp x29, x30, [sp, 0] ++@@ -8447,10 +8499,29 @@ aarch64_layout_frame (void) ++ stp reg3, reg4, [sp, 16] ++ [sub sp, sp, below_hard_fp_saved_regs_size] ++ [save SVE registers relative to SP] ++- sub sp, sp, outgoing_args_size */ ++- frame.initial_adjust = frame.hard_fp_offset; ++- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size; ++- frame.final_adjust = crtl->outgoing_args_size; +++ sub sp, sp, bytes_below_saved_regs */ +++ frame.initial_adjust = frame.bytes_above_hard_fp; +++ frame.sve_callee_adjust = below_hard_fp_saved_regs_size; +++ frame.final_adjust = frame.bytes_below_saved_regs; +++ } +++ +++ /* The frame is allocated in pieces, with each non-final piece +++ including a register save at offset 0 that acts as a probe for +++ the following piece. In addition, the save of the bottommost register +++ acts as a probe for callees and allocas. Roll back any probes that +++ aren't needed. +++ +++ A probe isn't needed if it is associated with the final allocation +++ (including callees and allocas) that happens before the epilogue is +++ executed. */ +++ if (crtl->is_leaf +++ && !cfun->calls_alloca +++ && known_eq (frame.final_adjust, 0)) +++ { +++ if (maybe_ne (frame.sve_callee_adjust, 0)) +++ frame.sve_save_and_probe = INVALID_REGNUM; +++ else +++ frame.hard_fp_save_and_probe = INVALID_REGNUM; ++ } ++ ++ /* Make sure the individual adjustments add up to the full frame size. */ ++@@ -8754,15 +8825,17 @@ aarch64_add_cfa_expression (rtx_insn *insn, rtx reg, ++ } ++ ++ /* Emit code to save the callee-saved registers from register number START ++- to LIMIT to the stack at the location starting at offset START_OFFSET, ++- skipping any write-back candidates if SKIP_WB is true. HARD_FP_VALID_P ++- is true if the hard frame pointer has been set up. */ +++ to LIMIT to the stack. The stack pointer is currently BYTES_BELOW_SP +++ bytes above the bottom of the static frame. Skip any write-back +++ candidates if SKIP_WB is true. HARD_FP_VALID_P is true if the hard +++ frame pointer has been set up. */ ++ ++ static void ++-aarch64_save_callee_saves (poly_int64 start_offset, +++aarch64_save_callee_saves (poly_int64 bytes_below_sp, ++ unsigned start, unsigned limit, bool skip_wb, ++ bool hard_fp_valid_p) ++ { +++ aarch64_frame &frame = cfun->machine->frame; ++ rtx_insn *insn; ++ unsigned regno; ++ unsigned regno2; ++@@ -8777,8 +8850,8 @@ aarch64_save_callee_saves (poly_int64 start_offset, ++ bool frame_related_p = aarch64_emit_cfi_for_reg_p (regno); ++ ++ if (skip_wb ++- && (regno == cfun->machine->frame.wb_push_candidate1 ++- || regno == cfun->machine->frame.wb_push_candidate2)) +++ && (regno == frame.wb_push_candidate1 +++ || regno == frame.wb_push_candidate2)) ++ continue; ++ ++ if (cfun->machine->reg_is_wrapped_separately[regno]) ++@@ -8786,7 +8859,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, ++ ++ machine_mode mode = aarch64_reg_save_mode (regno); ++ reg = gen_rtx_REG (mode, regno); ++- offset = start_offset + cfun->machine->frame.reg_offset[regno]; +++ offset = frame.reg_offset[regno] - bytes_below_sp; ++ rtx base_rtx = stack_pointer_rtx; ++ poly_int64 sp_offset = offset; ++ ++@@ -8797,9 +8870,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, ++ else if (GP_REGNUM_P (regno) ++ && (!offset.is_constant (&const_offset) || const_offset >= 512)) ++ { ++- gcc_assert (known_eq (start_offset, 0)); ++- poly_int64 fp_offset ++- = cfun->machine->frame.below_hard_fp_saved_regs_size; +++ poly_int64 fp_offset = frame.bytes_below_hard_fp - bytes_below_sp; ++ if (hard_fp_valid_p) ++ base_rtx = hard_frame_pointer_rtx; ++ else ++@@ -8821,8 +8892,7 @@ aarch64_save_callee_saves (poly_int64 start_offset, ++ && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit ++ && !cfun->machine->reg_is_wrapped_separately[regno2] ++ && known_eq (GET_MODE_SIZE (mode), ++- cfun->machine->frame.reg_offset[regno2] ++- - cfun->machine->frame.reg_offset[regno])) +++ frame.reg_offset[regno2] - frame.reg_offset[regno])) ++ { ++ rtx reg2 = gen_rtx_REG (mode, regno2); ++ rtx mem2; ++@@ -8864,14 +8934,16 @@ aarch64_save_callee_saves (poly_int64 start_offset, ++ } ++ ++ /* Emit code to restore the callee registers from register number START ++- up to and including LIMIT. Restore from the stack offset START_OFFSET, ++- skipping any write-back candidates if SKIP_WB is true. Write the ++- appropriate REG_CFA_RESTORE notes into CFI_OPS. */ +++ up to and including LIMIT. The stack pointer is currently BYTES_BELOW_SP +++ bytes above the bottom of the static frame. Skip any write-back +++ candidates if SKIP_WB is true. Write the appropriate REG_CFA_RESTORE +++ notes into CFI_OPS. */ ++ ++ static void ++-aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, +++aarch64_restore_callee_saves (poly_int64 bytes_below_sp, unsigned start, ++ unsigned limit, bool skip_wb, rtx *cfi_ops) ++ { +++ aarch64_frame &frame = cfun->machine->frame; ++ unsigned regno; ++ unsigned regno2; ++ poly_int64 offset; ++@@ -8888,13 +8960,13 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, ++ rtx reg, mem; ++ ++ if (skip_wb ++- && (regno == cfun->machine->frame.wb_pop_candidate1 ++- || regno == cfun->machine->frame.wb_pop_candidate2)) +++ && (regno == frame.wb_pop_candidate1 +++ || regno == frame.wb_pop_candidate2)) ++ continue; ++ ++ machine_mode mode = aarch64_reg_save_mode (regno); ++ reg = gen_rtx_REG (mode, regno); ++- offset = start_offset + cfun->machine->frame.reg_offset[regno]; +++ offset = frame.reg_offset[regno] - bytes_below_sp; ++ rtx base_rtx = stack_pointer_rtx; ++ if (mode == VNx2DImode && BYTES_BIG_ENDIAN) ++ aarch64_adjust_sve_callee_save_base (mode, base_rtx, anchor_reg, ++@@ -8905,8 +8977,7 @@ aarch64_restore_callee_saves (poly_int64 start_offset, unsigned start, ++ && (regno2 = aarch64_next_callee_save (regno + 1, limit)) <= limit ++ && !cfun->machine->reg_is_wrapped_separately[regno2] ++ && known_eq (GET_MODE_SIZE (mode), ++- cfun->machine->frame.reg_offset[regno2] ++- - cfun->machine->frame.reg_offset[regno])) +++ frame.reg_offset[regno2] - frame.reg_offset[regno])) ++ { ++ rtx reg2 = gen_rtx_REG (mode, regno2); ++ rtx mem2; ++@@ -9011,6 +9082,7 @@ offset_12bit_unsigned_scaled_p (machine_mode mode, poly_int64 offset) ++ static sbitmap ++ aarch64_get_separate_components (void) ++ { +++ aarch64_frame &frame = cfun->machine->frame; ++ sbitmap components = sbitmap_alloc (LAST_SAVED_REGNUM + 1); ++ bitmap_clear (components); ++ ++@@ -9027,20 +9099,11 @@ aarch64_get_separate_components (void) ++ if (mode == VNx2DImode && BYTES_BIG_ENDIAN) ++ continue; ++ ++- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; ++- ++- /* If the register is saved in the first SVE save slot, we use ++- it as a stack probe for -fstack-clash-protection. */ ++- if (flag_stack_clash_protection ++- && maybe_ne (cfun->machine->frame.below_hard_fp_saved_regs_size, 0) ++- && known_eq (offset, 0)) ++- continue; +++ poly_int64 offset = frame.reg_offset[regno]; ++ ++ /* Get the offset relative to the register we'll use. */ ++ if (frame_pointer_needed) ++- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; ++- else ++- offset += crtl->outgoing_args_size; +++ offset -= frame.bytes_below_hard_fp; ++ ++ /* Check that we can access the stack slot of the register with one ++ direct load with no adjustments needed. */ ++@@ -9057,11 +9120,11 @@ aarch64_get_separate_components (void) ++ /* If the spare predicate register used by big-endian SVE code ++ is call-preserved, it must be saved in the main prologue ++ before any saves that use it. */ ++- if (cfun->machine->frame.spare_pred_reg != INVALID_REGNUM) ++- bitmap_clear_bit (components, cfun->machine->frame.spare_pred_reg); +++ if (frame.spare_pred_reg != INVALID_REGNUM) +++ bitmap_clear_bit (components, frame.spare_pred_reg); ++ ++- unsigned reg1 = cfun->machine->frame.wb_push_candidate1; ++- unsigned reg2 = cfun->machine->frame.wb_push_candidate2; +++ unsigned reg1 = frame.wb_push_candidate1; +++ unsigned reg2 = frame.wb_push_candidate2; ++ /* If registers have been chosen to be stored/restored with ++ writeback don't interfere with them to avoid having to output explicit ++ stack adjustment instructions. */ ++@@ -9072,6 +9135,13 @@ aarch64_get_separate_components (void) ++ ++ bitmap_clear_bit (components, LR_REGNUM); ++ bitmap_clear_bit (components, SP_REGNUM); +++ if (flag_stack_clash_protection) +++ { +++ if (frame.sve_save_and_probe != INVALID_REGNUM) +++ bitmap_clear_bit (components, frame.sve_save_and_probe); +++ if (frame.hard_fp_save_and_probe != INVALID_REGNUM) +++ bitmap_clear_bit (components, frame.hard_fp_save_and_probe); +++ } ++ ++ return components; ++ } ++@@ -9170,6 +9240,7 @@ aarch64_get_next_set_bit (sbitmap bmp, unsigned int start) ++ static void ++ aarch64_process_components (sbitmap components, bool prologue_p) ++ { +++ aarch64_frame &frame = cfun->machine->frame; ++ rtx ptr_reg = gen_rtx_REG (Pmode, frame_pointer_needed ++ ? HARD_FRAME_POINTER_REGNUM ++ : STACK_POINTER_REGNUM); ++@@ -9184,11 +9255,9 @@ aarch64_process_components (sbitmap components, bool prologue_p) ++ machine_mode mode = aarch64_reg_save_mode (regno); ++ ++ rtx reg = gen_rtx_REG (mode, regno); ++- poly_int64 offset = cfun->machine->frame.reg_offset[regno]; +++ poly_int64 offset = frame.reg_offset[regno]; ++ if (frame_pointer_needed) ++- offset -= cfun->machine->frame.below_hard_fp_saved_regs_size; ++- else ++- offset += crtl->outgoing_args_size; +++ offset -= frame.bytes_below_hard_fp; ++ ++ rtx addr = plus_constant (Pmode, ptr_reg, offset); ++ rtx mem = gen_frame_mem (mode, addr); ++@@ -9211,14 +9280,14 @@ aarch64_process_components (sbitmap components, bool prologue_p) ++ break; ++ } ++ ++- poly_int64 offset2 = cfun->machine->frame.reg_offset[regno2]; +++ poly_int64 offset2 = frame.reg_offset[regno2]; ++ /* The next register is not of the same class or its offset is not ++ mergeable with the current one into a pair. */ ++ if (aarch64_sve_mode_p (mode) ++ || !satisfies_constraint_Ump (mem) ++ || GP_REGNUM_P (regno) != GP_REGNUM_P (regno2) ++ || (crtl->abi->id () == ARM_PCS_SIMD && FP_REGNUM_P (regno)) ++- || maybe_ne ((offset2 - cfun->machine->frame.reg_offset[regno]), +++ || maybe_ne ((offset2 - frame.reg_offset[regno]), ++ GET_MODE_SIZE (mode))) ++ { ++ insn = emit_insn (set); ++@@ -9240,9 +9309,7 @@ aarch64_process_components (sbitmap components, bool prologue_p) ++ /* REGNO2 can be saved/restored in a pair with REGNO. */ ++ rtx reg2 = gen_rtx_REG (mode, regno2); ++ if (frame_pointer_needed) ++- offset2 -= cfun->machine->frame.below_hard_fp_saved_regs_size; ++- else ++- offset2 += crtl->outgoing_args_size; +++ offset2 -= frame.bytes_below_hard_fp; ++ rtx addr2 = plus_constant (Pmode, ptr_reg, offset2); ++ rtx mem2 = gen_frame_mem (mode, addr2); ++ rtx set2 = prologue_p ? gen_rtx_SET (mem2, reg2) ++@@ -9316,10 +9383,10 @@ aarch64_stack_clash_protection_alloca_probe_range (void) ++ registers. If POLY_SIZE is not large enough to require a probe this function ++ will only adjust the stack. When allocating the stack space ++ FRAME_RELATED_P is then used to indicate if the allocation is frame related. ++- FINAL_ADJUSTMENT_P indicates whether we are allocating the outgoing ++- arguments. If we are then we ensure that any allocation larger than the ABI ++- defined buffer needs a probe so that the invariant of having a 1KB buffer is ++- maintained. +++ FINAL_ADJUSTMENT_P indicates whether we are allocating the area below +++ the saved registers. If we are then we ensure that any allocation +++ larger than the ABI defined buffer needs a probe so that the +++ invariant of having a 1KB buffer is maintained. ++ ++ We emit barriers after each stack adjustment to prevent optimizations from ++ breaking the invariant that we never drop the stack more than a page. This ++@@ -9335,45 +9402,26 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, ++ bool frame_related_p, ++ bool final_adjustment_p) ++ { +++ aarch64_frame &frame = cfun->machine->frame; ++ HOST_WIDE_INT guard_size ++ = 1 << param_stack_clash_protection_guard_size; ++ HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD; +++ HOST_WIDE_INT byte_sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT; +++ gcc_assert (multiple_p (poly_size, byte_sp_alignment)); ++ HOST_WIDE_INT min_probe_threshold ++ = (final_adjustment_p ++- ? guard_used_by_caller +++ ? guard_used_by_caller + byte_sp_alignment ++ : guard_size - guard_used_by_caller); ++- /* When doing the final adjustment for the outgoing arguments, take into ++- account any unprobed space there is above the current SP. There are ++- two cases: ++- ++- - When saving SVE registers below the hard frame pointer, we force ++- the lowest save to take place in the prologue before doing the final ++- adjustment (i.e. we don't allow the save to be shrink-wrapped). ++- This acts as a probe at SP, so there is no unprobed space. ++- ++- - When there are no SVE register saves, we use the store of the link ++- register as a probe. We can't assume that LR was saved at position 0 ++- though, so treat any space below it as unprobed. */ ++- if (final_adjustment_p ++- && known_eq (cfun->machine->frame.below_hard_fp_saved_regs_size, 0)) ++- { ++- poly_int64 lr_offset = cfun->machine->frame.reg_offset[LR_REGNUM]; ++- if (known_ge (lr_offset, 0)) ++- min_probe_threshold -= lr_offset.to_constant (); ++- else ++- gcc_assert (!flag_stack_clash_protection || known_eq (poly_size, 0)); ++- } ++- ++- poly_int64 frame_size = cfun->machine->frame.frame_size; +++ poly_int64 frame_size = frame.frame_size; ++ ++ /* We should always have a positive probe threshold. */ ++ gcc_assert (min_probe_threshold > 0); ++ ++ if (flag_stack_clash_protection && !final_adjustment_p) ++ { ++- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; ++- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; ++- poly_int64 final_adjust = cfun->machine->frame.final_adjust; +++ poly_int64 initial_adjust = frame.initial_adjust; +++ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; +++ poly_int64 final_adjust = frame.final_adjust; ++ ++ if (known_eq (frame_size, 0)) ++ { ++@@ -9527,7 +9575,7 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, ++ /* Handle any residuals. Residuals of at least MIN_PROBE_THRESHOLD have to ++ be probed. This maintains the requirement that each page is probed at ++ least once. For initial probing we probe only if the allocation is ++- more than GUARD_SIZE - buffer, and for the outgoing arguments we probe +++ more than GUARD_SIZE - buffer, and below the saved registers we probe ++ if the amount is larger than buffer. GUARD_SIZE - buffer + buffer == ++ GUARD_SIZE. This works that for any allocation that is large enough to ++ trigger a probe here, we'll have at least one, and if they're not large ++@@ -9537,16 +9585,12 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, ++ are still safe. */ ++ if (residual) ++ { ++- HOST_WIDE_INT residual_probe_offset = guard_used_by_caller; +++ gcc_assert (guard_used_by_caller + byte_sp_alignment <= size); +++ ++ /* If we're doing final adjustments, and we've done any full page ++ allocations then any residual needs to be probed. */ ++ if (final_adjustment_p && rounded_size != 0) ++ min_probe_threshold = 0; ++- /* If doing a small final adjustment, we always probe at offset 0. ++- This is done to avoid issues when LR is not at position 0 or when ++- the final adjustment is smaller than the probing offset. */ ++- else if (final_adjustment_p && rounded_size == 0) ++- residual_probe_offset = 0; ++ ++ aarch64_sub_sp (temp1, temp2, residual, frame_related_p); ++ if (residual >= min_probe_threshold) ++@@ -9557,8 +9601,8 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2, ++ HOST_WIDE_INT_PRINT_DEC " bytes, probing will be required." ++ "\n", residual); ++ ++- emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, ++- residual_probe_offset)); +++ emit_stack_probe (plus_constant (Pmode, stack_pointer_rtx, +++ guard_used_by_caller)); ++ emit_insn (gen_blockage ()); ++ } ++ } ++@@ -9596,20 +9640,24 @@ aarch64_epilogue_uses (int regno) ++ | for register varargs | ++ | | ++ +-------------------------------+ ++- | local variables | <-- frame_pointer_rtx +++ | local variables (1) | <-- frame_pointer_rtx ++ | | ++ +-------------------------------+ ++- | padding | \ ++- +-------------------------------+ | ++- | callee-saved registers | | frame.saved_regs_size ++- +-------------------------------+ | ++- | LR' | | ++- +-------------------------------+ | ++- | FP' | | ++- +-------------------------------+ |<- hard_frame_pointer_rtx (aligned) ++- | SVE vector registers | | \ ++- +-------------------------------+ | | below_hard_fp_saved_regs_size ++- | SVE predicate registers | / / +++ | padding (1) | +++ +-------------------------------+ +++ | callee-saved registers | +++ +-------------------------------+ +++ | LR' | +++ +-------------------------------+ +++ | FP' | +++ +-------------------------------+ <-- hard_frame_pointer_rtx (aligned) +++ | SVE vector registers | +++ +-------------------------------+ +++ | SVE predicate registers | +++ +-------------------------------+ +++ | local variables (2) | +++ +-------------------------------+ +++ | padding (2) | ++ +-------------------------------+ ++ | dynamic allocation | ++ +-------------------------------+ ++@@ -9620,6 +9668,9 @@ aarch64_epilogue_uses (int regno) ++ +-------------------------------+ ++ | | <-- stack_pointer_rtx (aligned) ++ +++ The regions marked (1) and (2) are mutually exclusive. (2) is used +++ when aarch64_save_regs_above_locals_p is true. +++ ++ Dynamic stack allocations via alloca() decrease stack_pointer_rtx ++ but leave frame_pointer_rtx and hard_frame_pointer_rtx ++ unchanged. ++@@ -9634,8 +9685,8 @@ aarch64_epilogue_uses (int regno) ++ When probing is needed, we emit a probe at the start of the prologue ++ and every PARAM_STACK_CLASH_PROTECTION_GUARD_SIZE bytes thereafter. ++ ++- We have to track how much space has been allocated and the only stores ++- to the stack we track as implicit probes are the FP/LR stores. +++ We can also use register saves as probes. These are stored in +++ sve_save_and_probe and hard_fp_save_and_probe. ++ ++ For outgoing arguments we probe if the size is larger than 1KB, such that ++ the ABI specified buffer is maintained for the next callee. ++@@ -9662,17 +9713,15 @@ aarch64_epilogue_uses (int regno) ++ void ++ aarch64_expand_prologue (void) ++ { ++- poly_int64 frame_size = cfun->machine->frame.frame_size; ++- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; ++- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; ++- poly_int64 final_adjust = cfun->machine->frame.final_adjust; ++- poly_int64 callee_offset = cfun->machine->frame.callee_offset; ++- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; ++- poly_int64 below_hard_fp_saved_regs_size ++- = cfun->machine->frame.below_hard_fp_saved_regs_size; ++- unsigned reg1 = cfun->machine->frame.wb_push_candidate1; ++- unsigned reg2 = cfun->machine->frame.wb_push_candidate2; ++- bool emit_frame_chain = cfun->machine->frame.emit_frame_chain; +++ aarch64_frame &frame = cfun->machine->frame; +++ poly_int64 frame_size = frame.frame_size; +++ poly_int64 initial_adjust = frame.initial_adjust; +++ HOST_WIDE_INT callee_adjust = frame.callee_adjust; +++ poly_int64 final_adjust = frame.final_adjust; +++ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; +++ unsigned reg1 = frame.wb_push_candidate1; +++ unsigned reg2 = frame.wb_push_candidate2; +++ bool emit_frame_chain = frame.emit_frame_chain; ++ rtx_insn *insn; ++ ++ if (flag_stack_clash_protection && known_eq (callee_adjust, 0)) ++@@ -9703,7 +9752,7 @@ aarch64_expand_prologue (void) ++ } ++ ++ /* Push return address to shadow call stack. */ ++- if (cfun->machine->frame.is_scs_enabled) +++ if (frame.is_scs_enabled) ++ emit_insn (gen_scs_push ()); ++ ++ if (flag_stack_usage_info) ++@@ -9740,21 +9789,21 @@ aarch64_expand_prologue (void) ++ if (callee_adjust != 0) ++ aarch64_push_regs (reg1, reg2, callee_adjust); ++ ++- /* The offset of the frame chain record (if any) from the current SP. */ ++- poly_int64 chain_offset = (initial_adjust + callee_adjust ++- - cfun->machine->frame.hard_fp_offset); ++- gcc_assert (known_ge (chain_offset, 0)); ++- ++- /* The offset of the bottom of the save area from the current SP. */ ++- poly_int64 saved_regs_offset = chain_offset - below_hard_fp_saved_regs_size; +++ /* The offset of the current SP from the bottom of the static frame. */ +++ poly_int64 bytes_below_sp = frame_size - initial_adjust - callee_adjust; ++ ++ if (emit_frame_chain) ++ { +++ /* The offset of the frame chain record (if any) from the current SP. */ +++ poly_int64 chain_offset = (initial_adjust + callee_adjust +++ - frame.bytes_above_hard_fp); +++ gcc_assert (known_ge (chain_offset, 0)); +++ ++ if (callee_adjust == 0) ++ { ++ reg1 = R29_REGNUM; ++ reg2 = R30_REGNUM; ++- aarch64_save_callee_saves (saved_regs_offset, reg1, reg2, +++ aarch64_save_callee_saves (bytes_below_sp, reg1, reg2, ++ false, false); ++ } ++ else ++@@ -9779,8 +9828,7 @@ aarch64_expand_prologue (void) ++ implicit. */ ++ if (!find_reg_note (insn, REG_CFA_ADJUST_CFA, NULL_RTX)) ++ { ++- rtx src = plus_constant (Pmode, stack_pointer_rtx, ++- callee_offset); +++ rtx src = plus_constant (Pmode, stack_pointer_rtx, chain_offset); ++ add_reg_note (insn, REG_CFA_ADJUST_CFA, ++ gen_rtx_SET (hard_frame_pointer_rtx, src)); ++ } ++@@ -9795,7 +9843,7 @@ aarch64_expand_prologue (void) ++ emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); ++ } ++ ++- aarch64_save_callee_saves (saved_regs_offset, R0_REGNUM, R30_REGNUM, +++ aarch64_save_callee_saves (bytes_below_sp, R0_REGNUM, R30_REGNUM, ++ callee_adjust != 0 || emit_frame_chain, ++ emit_frame_chain); ++ if (maybe_ne (sve_callee_adjust, 0)) ++@@ -9805,18 +9853,21 @@ aarch64_expand_prologue (void) ++ aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, ++ sve_callee_adjust, ++ !frame_pointer_needed, false); ++- saved_regs_offset += sve_callee_adjust; +++ bytes_below_sp -= sve_callee_adjust; ++ } ++- aarch64_save_callee_saves (saved_regs_offset, P0_REGNUM, P15_REGNUM, +++ aarch64_save_callee_saves (bytes_below_sp, P0_REGNUM, P15_REGNUM, ++ false, emit_frame_chain); ++- aarch64_save_callee_saves (saved_regs_offset, V0_REGNUM, V31_REGNUM, +++ aarch64_save_callee_saves (bytes_below_sp, V0_REGNUM, V31_REGNUM, ++ callee_adjust != 0 || emit_frame_chain, ++ emit_frame_chain); ++ ++ /* We may need to probe the final adjustment if it is larger than the guard ++ that is assumed by the called. */ +++ gcc_assert (known_eq (bytes_below_sp, final_adjust)); ++ aarch64_allocate_and_probe_stack_space (tmp1_rtx, tmp0_rtx, final_adjust, ++ !frame_pointer_needed, true); +++ if (emit_frame_chain && maybe_ne (final_adjust, 0)) +++ emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); ++ } ++ ++ /* Return TRUE if we can use a simple_return insn. ++@@ -9845,16 +9896,15 @@ aarch64_use_return_insn_p (void) ++ void ++ aarch64_expand_epilogue (bool for_sibcall) ++ { ++- poly_int64 initial_adjust = cfun->machine->frame.initial_adjust; ++- HOST_WIDE_INT callee_adjust = cfun->machine->frame.callee_adjust; ++- poly_int64 final_adjust = cfun->machine->frame.final_adjust; ++- poly_int64 callee_offset = cfun->machine->frame.callee_offset; ++- poly_int64 sve_callee_adjust = cfun->machine->frame.sve_callee_adjust; ++- poly_int64 below_hard_fp_saved_regs_size ++- = cfun->machine->frame.below_hard_fp_saved_regs_size; ++- unsigned reg1 = cfun->machine->frame.wb_pop_candidate1; ++- unsigned reg2 = cfun->machine->frame.wb_pop_candidate2; ++- unsigned int last_gpr = (cfun->machine->frame.is_scs_enabled +++ aarch64_frame &frame = cfun->machine->frame; +++ poly_int64 initial_adjust = frame.initial_adjust; +++ HOST_WIDE_INT callee_adjust = frame.callee_adjust; +++ poly_int64 final_adjust = frame.final_adjust; +++ poly_int64 sve_callee_adjust = frame.sve_callee_adjust; +++ poly_int64 bytes_below_hard_fp = frame.bytes_below_hard_fp; +++ unsigned reg1 = frame.wb_pop_candidate1; +++ unsigned reg2 = frame.wb_pop_candidate2; +++ unsigned int last_gpr = (frame.is_scs_enabled ++ ? R29_REGNUM : R30_REGNUM); ++ rtx cfi_ops = NULL; ++ rtx_insn *insn; ++@@ -9888,7 +9938,7 @@ aarch64_expand_epilogue (bool for_sibcall) ++ /* We need to add memory barrier to prevent read from deallocated stack. */ ++ bool need_barrier_p ++ = maybe_ne (get_frame_size () ++- + cfun->machine->frame.saved_varargs_size, 0); +++ + frame.saved_varargs_size, 0); ++ ++ /* Emit a barrier to prevent loads from a deallocated stack. */ ++ if (maybe_gt (final_adjust, crtl->outgoing_args_size) ++@@ -9909,7 +9959,7 @@ aarch64_expand_epilogue (bool for_sibcall) ++ is restored on the instruction doing the writeback. */ ++ aarch64_add_offset (Pmode, stack_pointer_rtx, ++ hard_frame_pointer_rtx, ++- -callee_offset - below_hard_fp_saved_regs_size, +++ -bytes_below_hard_fp + final_adjust, ++ tmp1_rtx, tmp0_rtx, callee_adjust == 0); ++ else ++ /* The case where we need to re-use the register here is very rare, so ++@@ -9919,9 +9969,9 @@ aarch64_expand_epilogue (bool for_sibcall) ++ ++ /* Restore the vector registers before the predicate registers, ++ so that we can use P4 as a temporary for big-endian SVE frames. */ ++- aarch64_restore_callee_saves (callee_offset, V0_REGNUM, V31_REGNUM, +++ aarch64_restore_callee_saves (final_adjust, V0_REGNUM, V31_REGNUM, ++ callee_adjust != 0, &cfi_ops); ++- aarch64_restore_callee_saves (callee_offset, P0_REGNUM, P15_REGNUM, +++ aarch64_restore_callee_saves (final_adjust, P0_REGNUM, P15_REGNUM, ++ false, &cfi_ops); ++ if (maybe_ne (sve_callee_adjust, 0)) ++ aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); ++@@ -9929,7 +9979,7 @@ aarch64_expand_epilogue (bool for_sibcall) ++ /* When shadow call stack is enabled, the scs_pop in the epilogue will ++ restore x30, we don't need to restore x30 again in the traditional ++ way. */ ++- aarch64_restore_callee_saves (callee_offset - sve_callee_adjust, +++ aarch64_restore_callee_saves (final_adjust + sve_callee_adjust, ++ R0_REGNUM, last_gpr, ++ callee_adjust != 0, &cfi_ops); ++ ++@@ -9969,7 +10019,7 @@ aarch64_expand_epilogue (bool for_sibcall) ++ } ++ ++ /* Pop return address from shadow call stack. */ ++- if (cfun->machine->frame.is_scs_enabled) +++ if (frame.is_scs_enabled) ++ { ++ machine_mode mode = aarch64_reg_save_mode (R30_REGNUM); ++ rtx reg = gen_rtx_REG (mode, R30_REGNUM); ++@@ -12564,24 +12614,24 @@ aarch64_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) ++ poly_int64 ++ aarch64_initial_elimination_offset (unsigned from, unsigned to) ++ { +++ aarch64_frame &frame = cfun->machine->frame; +++ ++ if (to == HARD_FRAME_POINTER_REGNUM) ++ { ++ if (from == ARG_POINTER_REGNUM) ++- return cfun->machine->frame.hard_fp_offset; +++ return frame.bytes_above_hard_fp; ++ ++ if (from == FRAME_POINTER_REGNUM) ++- return cfun->machine->frame.hard_fp_offset ++- - cfun->machine->frame.locals_offset; +++ return frame.bytes_above_hard_fp - frame.bytes_above_locals; ++ } ++ ++ if (to == STACK_POINTER_REGNUM) ++ { ++ if (from == FRAME_POINTER_REGNUM) ++- return cfun->machine->frame.frame_size ++- - cfun->machine->frame.locals_offset; +++ return frame.frame_size - frame.bytes_above_locals; ++ } ++ ++- return cfun->machine->frame.frame_size; +++ return frame.frame_size; ++ } ++ ++ ++@@ -24686,10 +24736,11 @@ aarch64_copy_one_block_and_progress_pointers (rtx *src, rtx *dst, ++ *dst = aarch64_progress_pointer (*dst); ++ } ++ ++-/* Expand a cpymem using the MOPS extension. OPERANDS are taken ++- from the cpymem pattern. Return true iff we succeeded. */ ++-static bool ++-aarch64_expand_cpymem_mops (rtx *operands) +++/* Expand a cpymem/movmem using the MOPS extension. OPERANDS are taken +++ from the cpymem/movmem pattern. IS_MEMMOVE is true if this is a memmove +++ rather than memcpy. Return true iff we succeeded. */ +++bool +++aarch64_expand_cpymem_mops (rtx *operands, bool is_memmove = false) ++ { ++ if (!TARGET_MOPS) ++ return false; ++@@ -24701,8 +24752,10 @@ aarch64_expand_cpymem_mops (rtx *operands) ++ rtx dst_mem = replace_equiv_address (operands[0], dst_addr); ++ rtx src_mem = replace_equiv_address (operands[1], src_addr); ++ rtx sz_reg = copy_to_mode_reg (DImode, operands[2]); ++- emit_insn (gen_aarch64_cpymemdi (dst_mem, src_mem, sz_reg)); ++- +++ if (is_memmove) +++ emit_insn (gen_aarch64_movmemdi (dst_mem, src_mem, sz_reg)); +++ else +++ emit_insn (gen_aarch64_cpymemdi (dst_mem, src_mem, sz_reg)); ++ return true; ++ } ++ ++@@ -25981,11 +26034,9 @@ aarch64_operands_ok_for_ldpstp (rtx *operands, bool load, ++ gcc_assert (known_eq (GET_MODE_SIZE (GET_MODE (mem_1)), ++ GET_MODE_SIZE (GET_MODE (mem_2)))); ++ ++- /* One of the memory accesses must be a mempair operand. ++- If it is not the first one, they need to be swapped by the ++- peephole. */ ++- if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1)) ++- && !aarch64_mem_pair_operand (mem_2, GET_MODE (mem_2))) +++ /* The lower memory access must be a mem-pair operand. */ +++ rtx lower_mem = reversed ? mem_2 : mem_1; +++ if (!aarch64_mem_pair_operand (lower_mem, GET_MODE (lower_mem))) ++ return false; ++ ++ if (REG_P (reg_1) && FP_REGNUM_P (REGNO (reg_1))) ++--- a/src/gcc/config/aarch64/aarch64.h +++++ b/src/gcc/config/aarch64/aarch64.h ++@@ -860,6 +860,9 @@ extern enum aarch64_processor aarch64_tune; ++ #ifdef HAVE_POLY_INT_H ++ struct GTY (()) aarch64_frame ++ { +++ /* The offset from the bottom of the static frame (the bottom of the +++ outgoing arguments) of each register save slot, or -2 if no save is +++ needed. */ ++ poly_int64 reg_offset[LAST_SAVED_REGNUM + 1]; ++ ++ /* The number of extra stack bytes taken up by register varargs. ++@@ -868,25 +871,28 @@ struct GTY (()) aarch64_frame ++ STACK_BOUNDARY. */ ++ HOST_WIDE_INT saved_varargs_size; ++ ++- /* The size of the callee-save registers with a slot in REG_OFFSET. */ ++- poly_int64 saved_regs_size; +++ /* The number of bytes between the bottom of the static frame (the bottom +++ of the outgoing arguments) and the bottom of the register save area. +++ This value is always a multiple of STACK_BOUNDARY. */ +++ poly_int64 bytes_below_saved_regs; ++ ++- /* The size of the callee-save registers with a slot in REG_OFFSET that ++- are saved below the hard frame pointer. */ ++- poly_int64 below_hard_fp_saved_regs_size; +++ /* The number of bytes between the bottom of the static frame (the bottom +++ of the outgoing arguments) and the hard frame pointer. This value is +++ always a multiple of STACK_BOUNDARY. */ +++ poly_int64 bytes_below_hard_fp; ++ ++- /* Offset from the base of the frame (incomming SP) to the ++- top of the locals area. This value is always a multiple of +++ /* The number of bytes between the top of the locals area and the top +++ of the frame (the incomming SP). This value is always a multiple of ++ STACK_BOUNDARY. */ ++- poly_int64 locals_offset; +++ poly_int64 bytes_above_locals; ++ ++- /* Offset from the base of the frame (incomming SP) to the ++- hard_frame_pointer. This value is always a multiple of +++ /* The number of bytes between the hard_frame_pointer and the top of +++ the frame (the incomming SP). This value is always a multiple of ++ STACK_BOUNDARY. */ ++- poly_int64 hard_fp_offset; +++ poly_int64 bytes_above_hard_fp; ++ ++- /* The size of the frame. This value is the offset from base of the ++- frame (incomming SP) to the stack_pointer. This value is always +++ /* The size of the frame, i.e. the number of bytes between the bottom +++ of the outgoing arguments and the incoming SP. This value is always ++ a multiple of STACK_BOUNDARY. */ ++ poly_int64 frame_size; ++ ++@@ -897,10 +903,6 @@ struct GTY (()) aarch64_frame ++ It is zero when no push is used. */ ++ HOST_WIDE_INT callee_adjust; ++ ++- /* The offset from SP to the callee-save registers after initial_adjust. ++- It may be non-zero if no push is used (ie. callee_adjust == 0). */ ++- poly_int64 callee_offset; ++- ++ /* The size of the stack adjustment before saving or after restoring ++ SVE registers. */ ++ poly_int64 sve_callee_adjust; ++@@ -948,6 +950,14 @@ struct GTY (()) aarch64_frame ++ This is the register they should use. */ ++ unsigned spare_pred_reg; ++ +++ /* An SVE register that is saved below the hard frame pointer and that acts +++ as a probe for later allocations, or INVALID_REGNUM if none. */ +++ unsigned sve_save_and_probe; +++ +++ /* A register that is saved at the hard frame pointer and that acts +++ as a probe for later allocations, or INVALID_REGNUM if none. */ +++ unsigned hard_fp_save_and_probe; +++ ++ bool laid_out; ++ ++ /* True if shadow call stack should be enabled for the current function. */ ++--- a/src/gcc/config/aarch64/aarch64.md +++++ b/src/gcc/config/aarch64/aarch64.md ++@@ -1159,9 +1159,27 @@ (define_expand "untyped_call" ++ { ++ int i; ++ +++ /* Generate a PARALLEL that contains all of the register results. +++ The offsets are somewhat arbitrary, since we don't know the +++ actual return type. The main thing we need to avoid is having +++ overlapping byte ranges, since those might give the impression +++ that two registers are known to have data in common. */ +++ rtvec rets = rtvec_alloc (XVECLEN (operands[2], 0)); +++ poly_int64 offset = 0; +++ for (i = 0; i < XVECLEN (operands[2], 0); i++) +++ { +++ rtx reg = SET_SRC (XVECEXP (operands[2], 0, i)); +++ gcc_assert (REG_P (reg)); +++ rtx offset_rtx = gen_int_mode (offset, Pmode); +++ rtx piece = gen_rtx_EXPR_LIST (VOIDmode, reg, offset_rtx); +++ RTVEC_ELT (rets, i) = piece; +++ offset += GET_MODE_SIZE (GET_MODE (reg)); +++ } +++ rtx ret = gen_rtx_PARALLEL (VOIDmode, rets); +++ ++ /* Untyped calls always use the default ABI. It's only possible to use ++ ABI variants if we know the type of the target function. */ ++- emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx)); +++ emit_call_insn (gen_call_value (ret, operands[0], const0_rtx, const0_rtx)); ++ ++ for (i = 0; i < XVECLEN (operands[2], 0); i++) ++ { ++@@ -1627,7 +1645,22 @@ (define_expand "cpymemdi" ++ } ++ ) ++ ++-(define_insn "aarch64_movmemdi" +++(define_expand "aarch64_movmemdi" +++ [(parallel +++ [(set (match_operand 2) (const_int 0)) +++ (clobber (match_dup 3)) +++ (clobber (match_dup 4)) +++ (clobber (reg:CC CC_REGNUM)) +++ (set (match_operand 0) +++ (unspec:BLK [(match_operand 1) (match_dup 2)] UNSPEC_MOVMEM))])] +++ "TARGET_MOPS" +++ { +++ operands[3] = XEXP (operands[0], 0); +++ operands[4] = XEXP (operands[1], 0); +++ } +++) +++ +++(define_insn "*aarch64_movmemdi" ++ [(parallel [ ++ (set (match_operand:DI 2 "register_operand" "+&r") (const_int 0)) ++ (clobber (match_operand:DI 0 "register_operand" "+&r")) ++@@ -1660,17 +1693,9 @@ (define_expand "movmemdi" ++ && INTVAL (sz_reg) < aarch64_mops_memmove_size_threshold) ++ FAIL; ++ ++- rtx addr_dst = XEXP (operands[0], 0); ++- rtx addr_src = XEXP (operands[1], 0); ++- ++- if (!REG_P (sz_reg)) ++- sz_reg = force_reg (DImode, sz_reg); ++- if (!REG_P (addr_dst)) ++- addr_dst = force_reg (DImode, addr_dst); ++- if (!REG_P (addr_src)) ++- addr_src = force_reg (DImode, addr_src); ++- emit_insn (gen_aarch64_movmemdi (addr_dst, addr_src, sz_reg)); ++- DONE; +++ if (aarch64_expand_cpymem_mops (operands, true)) +++ DONE; +++ FAIL; ++ } ++ ) ++ ++@@ -7668,9 +7693,9 @@ (define_insn "stg" ++ ;; Load/Store 64-bit (LS64) instructions. ++ (define_insn "ld64b" ++ [(set (match_operand:V8DI 0 "register_operand" "=r") ++- (unspec_volatile:V8DI ++- [(mem:V8DI (match_operand:DI 1 "register_operand" "r"))] ++- UNSPEC_LD64B) +++ (unspec_volatile:V8DI +++ [(mem:V8DI (match_operand:DI 1 "register_operand" "r"))] +++ UNSPEC_LD64B) ++ )] ++ "TARGET_LS64" ++ "ld64b\\t%0, [%1]" ++@@ -7678,9 +7703,9 @@ (define_insn "ld64b" ++ ) ++ ++ (define_insn "st64b" ++- [(set (mem:V8DI (match_operand:DI 0 "register_operand" "=r")) ++- (unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")] ++- UNSPEC_ST64B) +++ [(set (mem:V8DI (match_operand:DI 0 "register_operand" "r")) +++ (unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")] +++ UNSPEC_ST64B) ++ )] ++ "TARGET_LS64" ++ "st64b\\t%1, [%0]" ++@@ -7689,10 +7714,10 @@ (define_insn "st64b" ++ ++ (define_insn "st64bv" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++- (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV_RET)) +++ (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV_RET)) ++ (set (mem:V8DI (match_operand:DI 1 "register_operand" "r")) ++- (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")] ++- UNSPEC_ST64BV) +++ (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")] +++ UNSPEC_ST64BV) ++ )] ++ "TARGET_LS64" ++ "st64bv\\t%0, %2, [%1]" ++@@ -7701,10 +7726,10 @@ (define_insn "st64bv" ++ ++ (define_insn "st64bv0" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++- (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV0_RET)) +++ (unspec_volatile:DI [(const_int 0)] UNSPEC_ST64BV0_RET)) ++ (set (mem:V8DI (match_operand:DI 1 "register_operand" "r")) ++- (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")] ++- UNSPEC_ST64BV0) +++ (unspec_volatile:V8DI [(match_operand:V8DI 2 "register_operand" "r")] +++ UNSPEC_ST64BV0) ++ )] ++ "TARGET_LS64" ++ "st64bv0\\t%0, %2, [%1]" ++--- a/src/gcc/config/aarch64/arm_acle.h +++++ b/src/gcc/config/aarch64/arm_acle.h ++@@ -270,40 +270,7 @@ __ttest (void) ++ #endif ++ ++ #ifdef __ARM_FEATURE_LS64 ++-#pragma GCC push_options ++-#pragma GCC target ("+nothing+ls64") ++- ++ typedef __arm_data512_t data512_t; ++- ++-__extension__ extern __inline data512_t ++-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_ld64b (const void *__addr) ++-{ ++- return __builtin_aarch64_ld64b (__addr); ++-} ++- ++-__extension__ extern __inline void ++-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_st64b (void *__addr, data512_t __value) ++-{ ++- __builtin_aarch64_st64b (__addr, __value); ++-} ++- ++-__extension__ extern __inline uint64_t ++-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_st64bv (void *__addr, data512_t __value) ++-{ ++- return __builtin_aarch64_st64bv (__addr, __value); ++-} ++- ++-__extension__ extern __inline uint64_t ++-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_st64bv0 (void *__addr, data512_t __value) ++-{ ++- return __builtin_aarch64_st64bv0 (__addr, __value); ++-} ++- ++-#pragma GCC pop_options ++ #endif ++ ++ #pragma GCC push_options ++--- a/src/gcc/config/alpha/alpha.cc +++++ b/src/gcc/config/alpha/alpha.cc ++@@ -2070,6 +2070,8 @@ static rtx ++ alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1) ++ { ++ HOST_WIDE_INT d1, d2, d3, d4; +++ machine_mode mode = GET_MODE (target); +++ rtx orig_target = target; ++ ++ /* Decompose the entire word */ ++ ++@@ -2082,6 +2084,9 @@ alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1) ++ d4 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000; ++ gcc_assert (c1 == d4); ++ +++ if (mode != DImode) +++ target = gen_lowpart (DImode, target); +++ ++ /* Construct the high word */ ++ if (d4) ++ { ++@@ -2101,7 +2106,7 @@ alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1) ++ if (d1) ++ emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1))); ++ ++- return target; +++ return orig_target; ++ } ++ ++ /* Given an integral CONST_INT or CONST_VECTOR, return the low 64 bits. */ ++--- a/src/gcc/config/arm/arm-builtins.cc +++++ b/src/gcc/config/arm/arm-builtins.cc ++@@ -97,7 +97,7 @@ arm_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++ /* T (T, unsigned immediate). */ ++ static enum arm_type_qualifiers ++ arm_sat_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS] ++- = { qualifier_unsigned, qualifier_none, qualifier_unsigned_immediate }; +++ = { qualifier_none, qualifier_none, qualifier_unsigned_immediate }; ++ #define SAT_BINOP_UNSIGNED_IMM_QUALIFIERS \ ++ (arm_sat_binop_imm_qualifiers) ++ ++--- a/src/gcc/config/arm/arm.md +++++ b/src/gcc/config/arm/arm.md ++@@ -7466,7 +7466,7 @@ (define_expand "movdf" ++ && !arm_const_double_rtx (operands[1]) ++ && !(TARGET_VFP_DOUBLE && vfp3_const_double_rtx (operands[1]))) ++ { ++- rtx clobreg = gen_reg_rtx (DFmode); +++ rtx clobreg = gen_reg_rtx (DImode); ++ emit_insn (gen_no_literal_pool_df_immediate (operands[0], operands[1], ++ clobreg)); ++ DONE; ++--- a/src/gcc/config/arm/arm_mve.h +++++ b/src/gcc/config/arm/arm_mve.h ++@@ -9675,42 +9675,42 @@ __arm_vabdq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pr ++ ++ __extension__ extern __inline int8x16_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m_n_s8 (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p) ++ { ++ return __builtin_mve_vaddq_m_n_sv16qi (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline int32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m_n_s32 (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p) ++ { ++ return __builtin_mve_vaddq_m_n_sv4si (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline int16x8_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m_n_s16 (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p) ++ { ++ return __builtin_mve_vaddq_m_n_sv8hi (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline uint8x16_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m_n_u8 (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p) ++ { ++ return __builtin_mve_vaddq_m_n_uv16qi (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline uint32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m_n_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p) ++ { ++ return __builtin_mve_vaddq_m_n_uv4si (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline uint16x8_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m_n_u16 (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p) ++ { ++ return __builtin_mve_vaddq_m_n_uv8hi (__inactive, __a, __b, __p); ++ } ++@@ -16055,7 +16055,7 @@ __extension__ extern __inline int32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vadcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry) ++ { ++- __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); +++ __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); ++ int32x4_t __res = __builtin_mve_vadcq_sv4si (__a, __b); ++ *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; ++ return __res; ++@@ -16065,7 +16065,7 @@ __extension__ extern __inline uint32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vadcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry) ++ { ++- __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); +++ __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); ++ uint32x4_t __res = __builtin_mve_vadcq_uv4si (__a, __b); ++ *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; ++ return __res; ++@@ -16075,7 +16075,7 @@ __extension__ extern __inline int32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vadcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p) ++ { ++- __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); +++ __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); ++ int32x4_t __res = __builtin_mve_vadcq_m_sv4si (__inactive, __a, __b, __p); ++ *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; ++ return __res; ++@@ -16085,7 +16085,7 @@ __extension__ extern __inline uint32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vadcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p) ++ { ++- __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); +++ __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); ++ uint32x4_t __res = __builtin_mve_vadcq_m_uv4si (__inactive, __a, __b, __p); ++ *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; ++ return __res; ++@@ -16131,7 +16131,7 @@ __extension__ extern __inline int32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vsbcq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry) ++ { ++- __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); +++ __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); ++ int32x4_t __res = __builtin_mve_vsbcq_sv4si (__a, __b); ++ *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; ++ return __res; ++@@ -16141,7 +16141,7 @@ __extension__ extern __inline uint32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vsbcq_u32 (uint32x4_t __a, uint32x4_t __b, unsigned * __carry) ++ { ++- __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); +++ __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); ++ uint32x4_t __res = __builtin_mve_vsbcq_uv4si (__a, __b); ++ *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; ++ return __res; ++@@ -16151,7 +16151,7 @@ __extension__ extern __inline int32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vsbcq_m_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b, unsigned * __carry, mve_pred16_t __p) ++ { ++- __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); +++ __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); ++ int32x4_t __res = __builtin_mve_vsbcq_m_sv4si (__inactive, __a, __b, __p); ++ *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; ++ return __res; ++@@ -16161,7 +16161,7 @@ __extension__ extern __inline uint32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vsbcq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, uint32x4_t __b, unsigned * __carry, mve_pred16_t __p) ++ { ++- __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | (*__carry << 29)); +++ __builtin_arm_set_fpscr_nzcvqc((__builtin_arm_get_fpscr_nzcvqc () & ~0x20000000u) | ((*__carry & 0x1u) << 29)); ++ uint32x4_t __res = __builtin_mve_vsbcq_m_uv4si (__inactive, __a, __b, __p); ++ *__carry = (__builtin_arm_get_fpscr_nzcvqc () >> 29) & 0x1u; ++ return __res; ++@@ -16171,14 +16171,14 @@ __extension__ extern __inline void ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vst1q_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p) ++ { ++- return vstrbq_p_u8 (__addr, __value, __p); +++ return __arm_vstrbq_p_u8 (__addr, __value, __p); ++ } ++ ++ __extension__ extern __inline void ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vst1q_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p) ++ { ++- return vstrbq_p_s8 (__addr, __value, __p); +++ return __arm_vstrbq_p_s8 (__addr, __value, __p); ++ } ++ ++ __extension__ extern __inline void ++@@ -16203,14 +16203,14 @@ __extension__ extern __inline uint8x16_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vld1q_z_u8 (uint8_t const *__base, mve_pred16_t __p) ++ { ++- return vldrbq_z_u8 ( __base, __p); +++ return __arm_vldrbq_z_u8 ( __base, __p); ++ } ++ ++ __extension__ extern __inline int8x16_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vld1q_z_s8 (int8_t const *__base, mve_pred16_t __p) ++ { ++- return vldrbq_z_s8 ( __base, __p); +++ return __arm_vldrbq_z_s8 ( __base, __p); ++ } ++ ++ __extension__ extern __inline int8x16x2_t ++@@ -16253,14 +16253,14 @@ __extension__ extern __inline void ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vst1q_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p) ++ { ++- return vstrhq_p_u16 (__addr, __value, __p); +++ return __arm_vstrhq_p_u16 (__addr, __value, __p); ++ } ++ ++ __extension__ extern __inline void ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vst1q_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p) ++ { ++- return vstrhq_p_s16 (__addr, __value, __p); +++ return __arm_vstrhq_p_s16 (__addr, __value, __p); ++ } ++ ++ __extension__ extern __inline void ++@@ -16285,14 +16285,14 @@ __extension__ extern __inline uint16x8_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vld1q_z_u16 (uint16_t const *__base, mve_pred16_t __p) ++ { ++- return vldrhq_z_u16 ( __base, __p); +++ return __arm_vldrhq_z_u16 ( __base, __p); ++ } ++ ++ __extension__ extern __inline int16x8_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vld1q_z_s16 (int16_t const *__base, mve_pred16_t __p) ++ { ++- return vldrhq_z_s16 ( __base, __p); +++ return __arm_vldrhq_z_s16 ( __base, __p); ++ } ++ ++ __extension__ extern __inline int16x8x2_t ++@@ -16335,14 +16335,14 @@ __extension__ extern __inline void ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vst1q_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p) ++ { ++- return vstrwq_p_u32 (__addr, __value, __p); +++ return __arm_vstrwq_p_u32 (__addr, __value, __p); ++ } ++ ++ __extension__ extern __inline void ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vst1q_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p) ++ { ++- return vstrwq_p_s32 (__addr, __value, __p); +++ return __arm_vstrwq_p_s32 (__addr, __value, __p); ++ } ++ ++ __extension__ extern __inline void ++@@ -16367,14 +16367,14 @@ __extension__ extern __inline uint32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vld1q_z_u32 (uint32_t const *__base, mve_pred16_t __p) ++ { ++- return vldrwq_z_u32 ( __base, __p); +++ return __arm_vldrwq_z_u32 ( __base, __p); ++ } ++ ++ __extension__ extern __inline int32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vld1q_z_s32 (int32_t const *__base, mve_pred16_t __p) ++ { ++- return vldrwq_z_s32 ( __base, __p); +++ return __arm_vldrwq_z_s32 ( __base, __p); ++ } ++ ++ __extension__ extern __inline int32x4x2_t ++@@ -19837,7 +19837,7 @@ __extension__ extern __inline float16x8_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vld1q_z_f16 (float16_t const *__base, mve_pred16_t __p) ++ { ++- return vldrhq_z_f16 (__base, __p); +++ return __arm_vldrhq_z_f16 (__base, __p); ++ } ++ ++ __extension__ extern __inline void ++@@ -19853,7 +19853,7 @@ __extension__ extern __inline void ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vst1q_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p) ++ { ++- return vstrhq_p_f16 (__addr, __value, __p); +++ return __arm_vstrhq_p_f16 (__addr, __value, __p); ++ } ++ ++ __extension__ extern __inline float32x4x4_t ++@@ -19878,7 +19878,7 @@ __extension__ extern __inline float32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vld1q_z_f32 (float32_t const *__base, mve_pred16_t __p) ++ { ++- return vldrwq_z_f32 (__base, __p); +++ return __arm_vldrwq_z_f32 (__base, __p); ++ } ++ ++ __extension__ extern __inline void ++@@ -19894,7 +19894,7 @@ __extension__ extern __inline void ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++ __arm_vst1q_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p) ++ { ++- return vstrwq_p_f32 (__addr, __value, __p); +++ return __arm_vstrwq_p_f32 (__addr, __value, __p); ++ } ++ ++ __extension__ extern __inline float16x8_t ++@@ -26417,42 +26417,42 @@ __arm_vabdq_m (uint16x8_t __inactive, uint16x8_t __a, uint16x8_t __b, mve_pred16 ++ ++ __extension__ extern __inline int8x16_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m (int8x16_t __inactive, int8x16_t __a, int8_t __b, mve_pred16_t __p) ++ { ++ return __arm_vaddq_m_n_s8 (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline int32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m (int32x4_t __inactive, int32x4_t __a, int32_t __b, mve_pred16_t __p) ++ { ++ return __arm_vaddq_m_n_s32 (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline int16x8_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m (int16x8_t __inactive, int16x8_t __a, int16_t __b, mve_pred16_t __p) ++ { ++ return __arm_vaddq_m_n_s16 (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline uint8x16_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m (uint8x16_t __inactive, uint8x16_t __a, uint8_t __b, mve_pred16_t __p) ++ { ++ return __arm_vaddq_m_n_u8 (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline uint32x4_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m (uint32x4_t __inactive, uint32x4_t __a, uint32_t __b, mve_pred16_t __p) ++ { ++ return __arm_vaddq_m_n_u32 (__inactive, __a, __b, __p); ++ } ++ ++ __extension__ extern __inline uint16x8_t ++ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) ++-__arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, int __b, mve_pred16_t __p) +++__arm_vaddq_m (uint16x8_t __inactive, uint16x8_t __a, uint16_t __b, mve_pred16_t __p) ++ { ++ return __arm_vaddq_m_n_u16 (__inactive, __a, __b, __p); ++ } ++@@ -35582,13 +35582,29 @@ enum { ++ short: __ARM_mve_type_int_n, \ ++ int: __ARM_mve_type_int_n, \ ++ long: __ARM_mve_type_int_n, \ ++- double: __ARM_mve_type_fp_n, \ ++ long long: __ARM_mve_type_int_n, \ +++ _Float16: __ARM_mve_type_fp_n, \ +++ __fp16: __ARM_mve_type_fp_n, \ +++ float: __ARM_mve_type_fp_n, \ +++ double: __ARM_mve_type_fp_n, \ ++ unsigned char: __ARM_mve_type_int_n, \ ++ unsigned short: __ARM_mve_type_int_n, \ ++ unsigned int: __ARM_mve_type_int_n, \ ++ unsigned long: __ARM_mve_type_int_n, \ ++ unsigned long long: __ARM_mve_type_int_n, \ +++ signed char*: __ARM_mve_type_int8_t_ptr, \ +++ short*: __ARM_mve_type_int16_t_ptr, \ +++ int*: __ARM_mve_type_int32_t_ptr, \ +++ long*: __ARM_mve_type_int32_t_ptr, \ +++ long long*: __ARM_mve_type_int64_t_ptr, \ +++ _Float16*: __ARM_mve_type_float16_t_ptr, \ +++ __fp16*: __ARM_mve_type_float16_t_ptr, \ +++ float*: __ARM_mve_type_float32_t_ptr, \ +++ unsigned char*: __ARM_mve_type_uint8_t_ptr, \ +++ unsigned short*: __ARM_mve_type_uint16_t_ptr, \ +++ unsigned int*: __ARM_mve_type_uint32_t_ptr, \ +++ unsigned long*: __ARM_mve_type_uint32_t_ptr, \ +++ unsigned long long*: __ARM_mve_type_uint64_t_ptr, \ ++ default: __ARM_mve_unsupported_type)) ++ #else ++ #define __ARM_mve_typeid(x) _Generic(x, \ ++@@ -35647,30 +35663,67 @@ enum { ++ unsigned int: __ARM_mve_type_int_n, \ ++ unsigned long: __ARM_mve_type_int_n, \ ++ unsigned long long: __ARM_mve_type_int_n, \ +++ signed char*: __ARM_mve_type_int8_t_ptr, \ +++ short*: __ARM_mve_type_int16_t_ptr, \ +++ int*: __ARM_mve_type_int32_t_ptr, \ +++ long*: __ARM_mve_type_int32_t_ptr, \ +++ long long*: __ARM_mve_type_int64_t_ptr, \ +++ unsigned char*: __ARM_mve_type_uint8_t_ptr, \ +++ unsigned short*: __ARM_mve_type_uint16_t_ptr, \ +++ unsigned int*: __ARM_mve_type_uint32_t_ptr, \ +++ unsigned long*: __ARM_mve_type_uint32_t_ptr, \ +++ unsigned long long*: __ARM_mve_type_uint64_t_ptr, \ ++ default: __ARM_mve_unsupported_type)) ++ #endif /* MVE Floating point. */ ++ ++ extern void *__ARM_undef; ++ #define __ARM_mve_coerce(param, type) \ ++ _Generic(param, type: param, default: *(type *)__ARM_undef) ++-#define __ARM_mve_coerce1(param, type) \ ++- _Generic(param, type: param, const type: param, default: *(type *)__ARM_undef) ++-#define __ARM_mve_coerce2(param, type) \ ++- _Generic(param, type: param, float16_t: param, float32_t: param, default: *(type *)__ARM_undef) +++#define __ARM_mve_coerce_i_scalar(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, int8_t: param, int16_t: param, int32_t: param, int64_t: param, uint8_t: param, uint16_t: param, uint32_t: param, uint64_t: param, default: *(type *)__ARM_undef)) +++ +++#define __ARM_mve_coerce_s8_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, signed char*: param, default: *(type *)__ARM_undef)) +++#define __ARM_mve_coerce_u8_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, unsigned char*: param, default: *(type *)__ARM_undef)) +++ +++#define __ARM_mve_coerce_s16_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, short*: param, default: *(type *)__ARM_undef)) +++#define __ARM_mve_coerce_u16_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, unsigned short*: param, default: *(type *)__ARM_undef)) +++ +++#define __ARM_mve_coerce_s32_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, int*: param, long*: param, default: *(type *)__ARM_undef)) +++#define __ARM_mve_coerce_u32_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, unsigned int*: param, unsigned long*: param, default: *(type *)__ARM_undef)) +++ +++#define __ARM_mve_coerce_s64_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, long long*: param, default: *(type *)__ARM_undef)) +++#define __ARM_mve_coerce_u64_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, unsigned long long*: param, default: *(type *)__ARM_undef)) +++ +++#if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ +++#define __ARM_mve_coerce_f_scalar(param, type) \ +++ _Generic(param, type: param, const type: param, __fp16: param, default: _Generic (param, _Float16: param, float16_t: param, float32_t: param, default: *(type *)__ARM_undef)) +++#define __ARM_mve_coerce_f16_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, __fp16*: param, _Float16*: param, default: *(type *)__ARM_undef)) +++#define __ARM_mve_coerce_f32_ptr(param, type) \ +++ _Generic(param, type: param, const type: param, default: _Generic (param, float*: param, default: *(type *)__ARM_undef)) +++#endif ++ ++ #if (__ARM_FEATURE_MVE & 2) /* MVE Floating point. */ ++ ++ #define __arm_vst4q(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(__p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(__p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce_f16_ptr(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));}) ++ ++ #define __arm_vrndxq(p0) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -35847,6 +35900,10 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vorrq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vorrq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)));}) ++ ++@@ -35871,16 +35928,16 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_f16 (__ARM_mve_coerce(p0, float16x8_t), __ARM_mve_coerce(p1, float16x8_t)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_f32 (__ARM_mve_coerce(p0, float32x4_t), __ARM_mve_coerce(p1, float32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) ++ ++ #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -35897,10 +35954,10 @@ extern void *__ARM_undef; ++ #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -35925,14 +35982,14 @@ extern void *__ARM_undef; ++ #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -35957,14 +36014,14 @@ extern void *__ARM_undef; ++ #define __arm_vcmpeqq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpeqq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpeqq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpeqq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -35995,16 +36052,16 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpeqq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpeqq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpeqq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));}) ++ ++ #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36012,13 +36069,13 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) ++ ++ #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36028,11 +36085,11 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) ++ ++ #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36040,25 +36097,25 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) ++ ++ #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -36113,8 +36170,8 @@ extern void *__ARM_undef; ++ #define __arm_vmaxnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) ++ ++ #define __arm_vmaxnmq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36125,14 +36182,14 @@ extern void *__ARM_undef; ++ #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) ++ ++ #define __arm_vmaxnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) ++ ++ #define __arm_vminnmaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36143,8 +36200,8 @@ extern void *__ARM_undef; ++ #define __arm_vminnmavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) ++ ++ #define __arm_vbrsrq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -36166,14 +36223,14 @@ extern void *__ARM_undef; ++ #define __arm_vsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -36186,8 +36243,8 @@ extern void *__ARM_undef; ++ #define __arm_vminnmvq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t)));}) ++ ++ #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -36242,12 +36299,12 @@ extern void *__ARM_undef; ++ #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -36278,12 +36335,12 @@ extern void *__ARM_undef; ++ #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -36334,12 +36391,12 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36347,9 +36404,9 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36382,8 +36439,8 @@ extern void *__ARM_undef; ++ #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) ++ ++@@ -36396,17 +36453,17 @@ extern void *__ARM_undef; ++ #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) ++ ++ #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) ++@@ -36414,12 +36471,12 @@ extern void *__ARM_undef; ++ #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -36452,12 +36509,12 @@ extern void *__ARM_undef; ++ #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -36482,12 +36539,12 @@ extern void *__ARM_undef; ++ #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -36630,12 +36687,12 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vsriq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36714,44 +36771,44 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vqdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36941,11 +36998,11 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgtq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgtq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgtq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) ++ ++@@ -36957,11 +37014,11 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpleq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpleq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpleq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));}) ++ ++ #define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36971,11 +37028,11 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpltq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpltq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpltq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));}) ++ ++ #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -36988,14 +37045,14 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpneq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpneq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpneq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2));}) ++ ++ #define __arm_vcvtbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -37049,8 +37106,8 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double)), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double)), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));}) ++ ++@@ -37065,8 +37122,8 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double)));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double)));}) ++ ++ #define __arm_vmaxnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -37089,14 +37146,14 @@ extern void *__ARM_undef; ++ #define __arm_vmaxnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmavq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmavq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) ++ ++ #define __arm_vmaxnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vmaxnmvq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vmaxnmvq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) ++ ++ #define __arm_vminnmaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -37107,14 +37164,14 @@ extern void *__ARM_undef; ++ #define __arm_vminnmavq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmavq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmavq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) ++ ++ #define __arm_vminnmvq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) ++ ++ #define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -37176,13 +37233,13 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t)), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t)), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double)), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double)));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double)), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double)));}) ++ ++ #define __arm_vrshrnbq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -37283,11 +37340,11 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce2(__p1, double), p2), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce2(__p1, double), p2), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vcmpgeq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce_f_scalar(__p1, double), p2), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmpgeq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmpgeq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));}) ++ ++@@ -37316,14 +37373,14 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) ++ ++ #define __arm_vandq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -37464,15 +37521,15 @@ extern void *__ARM_undef; ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vfmaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vfmaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmaq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) ++ ++ #define __arm_vfmasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vfmasq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) ++ ++ #define __arm_vfmsq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -37507,14 +37564,14 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) ++ ++ #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -37541,14 +37598,14 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_m_n_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) ++ ++ #define __arm_vorrq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -37565,236 +37622,236 @@ extern void *__ARM_undef; ++ ++ #define __arm_vld1q(p0) (\ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_f32 (__ARM_mve_coerce1(p0, float32_t *)))) +++ int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *)))) ++ ++ #define __arm_vld1q_z(p0,p1) ( \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce1(p0, int8_t *), p1), \ ++- int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce1(p0, int16_t *), p1), \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), p1), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \ ++- int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce1(p0, float16_t *), p1), \ ++- int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1))) +++ int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \ +++ int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \ +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \ +++ int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld1q_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), p1), \ +++ int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld1q_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1))) ++ ++ #define __arm_vld2q(p0) ( \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce1(p0, float32_t *)))) +++ int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *)))) ++ ++ #define __arm_vld4q(p0) ( \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce1(p0, uint32_t *)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce1(p0, float16_t *)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce1(p0, float32_t *)))) +++ int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *)))) ++ ++ #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) ++ ++ #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) ++ ++ #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));}) ++ ++ #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce1(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));}) ++ ++ #define __arm_vldrwq_gather_offset(p0,p1) ( \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \ ++- int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1))) +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \ +++ int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1))) ++ ++ #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ( \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \ ++- int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2))) +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \ +++ int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2))) ++ ++ #define __arm_vldrwq_gather_shifted_offset(p0,p1) ( \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1), \ ++- int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce1(p0, float32_t *), p1))) +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \ +++ int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1))) ++ ++ #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ( \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1, p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1, p2), \ ++- int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce1(p0, float32_t *), p1, p2))) +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \ +++ int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2))) ++ ++ #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) ++ ++ #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x2_t]: __arm_vst2q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x2_t)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x2_t]: __arm_vst2q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x2_t)));}) ++ ++ #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vst1q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vst1q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));}) ++ ++ #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t)));}) ++ ++ #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8_t]: __arm_vstrhq_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, float16x8_t), p2));}) ++ ++ #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) ++ ++ #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) ++ ++ #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) ++ ++ #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) ++ ++ #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t), p2));}) ++ ++ #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __ARM_mve_coerce(__p1, float32x4_t)));}) ++ ++ #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) ++ ++ #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) ++ ++ #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t)));}) ++ ++ #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ +++ int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_float16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3));}) ++ ++ #define __arm_vstrwq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ ++@@ -37811,44 +37868,44 @@ extern void *__ARM_undef; ++ #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t)));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t)));}) ++ ++ #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_offset_p_f32 (__ARM_mve_coerce_f32_ptr(__p0, float32_t *), p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) ++ ++ #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) ++ ++ #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) ++ ++ #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t), p3));}) ++ ++ #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), __p1, __ARM_mve_coerce(__p2, float32x4_t)));}) ++ ++ #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -38021,19 +38078,19 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vaddq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vaddq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vaddq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) ++ ++ #define __arm_vandq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++@@ -38156,19 +38213,19 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vmulq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vmulq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vmulq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) ++ ++ #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++@@ -38254,10 +38311,22 @@ extern void *__ARM_undef; ++ #define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vsubq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \ ++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vsubq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3), \ ++- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce2(__p2, double), p3), \ ++- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce2(__p2, double), p3));}) +++ int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce_f_scalar(__p2, double), p3), \ +++ int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_fp_n]: __arm_vsubq_x_n_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce_f_scalar(__p2, double), p3));}) ++ ++ #define __arm_vcmulq_rot90_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++@@ -38281,16 +38350,16 @@ extern void *__ARM_undef; ++ #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ ++- int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce2(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \ +++ int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));}) ++ ++ #else /* MVE Integer. */ ++ ++@@ -38306,12 +38375,12 @@ extern void *__ARM_undef; ++ ++ #define __arm_vst4q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x4_t]: __arm_vst4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x4_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x4_t]: __arm_vst4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x4_t)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x4_t]: __arm_vst4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x4_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x4_t]: __arm_vst4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));}) ++ ++ #define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -38408,12 +38477,12 @@ extern void *__ARM_undef; ++ #define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -38440,12 +38509,12 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vshlq_r(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -38459,12 +38528,12 @@ extern void *__ARM_undef; ++ #define __arm_vrshlq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrshlq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vrshlq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrshlq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -38495,12 +38564,12 @@ extern void *__ARM_undef; ++ #define __arm_vqsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -38569,12 +38638,12 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrshlq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrshlq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrshlq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrshlq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vqrdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -38582,16 +38651,16 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vqdmulhq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) ++@@ -38599,12 +38668,12 @@ extern void *__ARM_undef; ++ #define __arm_vqaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -38620,7 +38689,11 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vorrq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vorrq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vorrq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vorrq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vorrq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vornq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -38635,12 +38708,12 @@ extern void *__ARM_undef; ++ #define __arm_vmulq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -38715,12 +38788,12 @@ extern void *__ARM_undef; ++ #define __arm_vhsubq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -38745,12 +38818,12 @@ extern void *__ARM_undef; ++ #define __arm_vhaddq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -38800,10 +38873,10 @@ extern void *__ARM_undef; ++ #define __arm_vbicq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1 (__p1, int)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1 (__p1, int)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1 (__p1, int)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1 (__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vbicq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar (__p1, int)), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vbicq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vbicq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vbicq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++@@ -38820,12 +38893,12 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int)));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vandq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -38856,12 +38929,12 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -38942,16 +39015,16 @@ extern void *__ARM_undef; ++ #define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) ++ ++ #define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));}) ++ ++@@ -38961,9 +39034,9 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vcmpgtq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -38971,9 +39044,9 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vcmpleq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -38981,9 +39054,9 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vcmpltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -38991,20 +39064,20 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++@@ -39029,12 +39102,12 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpeqq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpeqq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpeqq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) ++ ++ #define __arm_vbicq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -39144,25 +39217,25 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vqrdmladhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -39225,9 +39298,56 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgeq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgeq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgeq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16_t), p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32_t), p2));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgeq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) +++ +++ +++#define __arm_vcmpgtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ +++ __typeof(p1) __p1 = (p1); \ +++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpgtq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpgtq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpgtq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpgtq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) +++ +++#define __arm_vcmpleq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ +++ __typeof(p1) __p1 = (p1); \ +++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpleq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpleq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpleq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpleq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) +++ +++#define __arm_vcmpltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ +++ __typeof(p1) __p1 = (p1); \ +++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpltq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpltq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpltq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpltq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) +++ +++#define __arm_vcmpneq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ +++ __typeof(p1) __p1 = (p1); \ +++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vcmpneq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vcmpneq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vcmpneq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpneq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpneq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpneq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpneq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) ++ ++ #define __arm_vdupq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -39250,23 +39370,23 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vmlasq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -39291,9 +39411,9 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int)), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int)));}) ++ ++ #define __arm_vqdmlsdhq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -39456,12 +39576,12 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++@@ -39561,12 +39681,12 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vornq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -39594,12 +39714,12 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++@@ -39611,12 +39731,12 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++@@ -39631,12 +39751,12 @@ extern void *__ARM_undef; ++ ++ #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vstrwq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ ++@@ -39645,144 +39765,144 @@ extern void *__ARM_undef; ++ ++ #define __arm_vld1q(p0) (\ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce1(p0, uint32_t *)))) +++ int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)))) ++ ++ #define __arm_vldrhq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vldrhq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++ ++ #define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++ ++ #define __arm_vldrwq_gather_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));}) +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) ++ ++ #define __arm_vldrwq_gather_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));}) +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) ++ ++ #define __arm_vldrwq_gather_shifted_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1));}) +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) ++ ++ #define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce1(__p0, int32_t *), p1, p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce1(__p0, uint32_t *), p1, p2));}) +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) ++ ++ #define __arm_vst1q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vst1q_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vst1q_p_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vst1q_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vst1q_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vst1q_p_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vst1q_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vst1q_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++ ++ #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8x2_t]: __arm_vst2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8x2_t)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4x2_t]: __arm_vst2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4x2_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16x2_t]: __arm_vst2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16x2_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x2_t]: __arm_vst2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x2_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x2_t]: __arm_vst2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x2_t)));}) ++ ++ #define __arm_vstrhq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vstrhq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrhq_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrhq_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++ ++ #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ ++ #define __arm_vstrwq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vstrwq_p(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++ ++ #define __arm_vstrdq_scatter_base_p(p0,p1,p2,p3) ({ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ ++@@ -39797,58 +39917,58 @@ extern void *__ARM_undef; ++ #define __arm_vstrhq_scatter_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vstrhq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vstrhq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vstrhq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrhq_scatter_shifted_offset_p_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrhq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vstrwq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vstrwq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_offset_p_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_offset_p_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vstrwq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vstrwq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int32_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), __p1, __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_shifted_offset_p_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __p1, __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -39953,15 +40073,15 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vaddq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vaddq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vaddq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vaddq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++@@ -40055,15 +40175,15 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmulq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmulq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmulq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmulq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmulq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++@@ -40147,29 +40267,45 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint32x4_t]: __arm_vbrsrq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2, p3));}) ++ ++ #define __arm_vld1q_z(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce1(p0, int8_t *), p1), \ ++- int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce1(p0, int16_t *), p1), \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce1(p0, int32_t *), p1), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), p1), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce1(p0, uint16_t *), p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce1(p0, uint32_t *), p1))) +++ int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld1q_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), p1), \ +++ int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld1q_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), p1), \ +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld1q_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld1q_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), p1), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld1q_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), p1), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld1q_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1))) ++ ++ #define __arm_vld2q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce1(p0, uint32_t *)))) +++ int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld2q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld2q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld2q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld2q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld2q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)))) ++ ++ ++ #define __arm_vld4q(p0) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce1(p0, int8_t *)), \ ++- int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce1(p0, int16_t *)), \ ++- int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce1(p0, int32_t *)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce1(p0, uint8_t *)), \ ++- int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce1(p0, uint16_t *)), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce1(p0, uint32_t *)))) +++ int (*)[__ARM_mve_type_int8_t_ptr]: __arm_vld4q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *)), \ +++ int (*)[__ARM_mve_type_int16_t_ptr]: __arm_vld4q_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *)), \ +++ int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vld4q_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr]: __arm_vld4q_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *)), \ +++ int (*)[__ARM_mve_type_uint16_t_ptr]: __arm_vld4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *)), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vld4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *)))) +++ +++#define __arm_vsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ +++ __typeof(p2) __p2 = (p2); \ +++ _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vsubq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vsubq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vsubq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -40185,14 +40321,14 @@ extern void *__ARM_undef; ++ #define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce(__p0, int8_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce(__p0, int16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int64x2_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce(__p0, uint8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce(__p0, uint16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint64x2_t), p2));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2));}) ++ ++ #endif /* MVE Integer. */ ++ ++@@ -40303,62 +40439,62 @@ extern void *__ARM_undef; ++ #define __arm_vdwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) ++ ++ #define __arm_vdwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) ++ ++ #define __arm_vdwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) ++ ++ #define __arm_viwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) ++ ++ #define __arm_viwdupq_x_u16(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u16 ((uint32_t) __p1, p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) ++ ++ #define __arm_viwdupq_x_u32(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_x_n_u32 ((uint32_t) __p1, p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) ++ ++ #define __arm_vidupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u8 ((uint32_t) __p1, p2, p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) ++ ++ #define __arm_vddupq_x_u8(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u8 ((uint32_t) __p1, p2, p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u8 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) ++ ++ #define __arm_vidupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u16 ((uint32_t) __p1, p2, p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) ++ ++ #define __arm_vddupq_x_u16(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u16 ((uint32_t) __p1, p2, p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u16 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) ++ ++ #define __arm_vidupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_x_n_u32 ((uint32_t) __p1, p2, p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) ++ ++ #define __arm_vddupq_x_u32(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_x_n_u32 ((uint32_t) __p1, p2, p3), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_x_wb_u32 (__ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) ++ ++ #define __arm_vshrq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \ ++@@ -40372,12 +40508,12 @@ extern void *__ARM_undef; ++ #define __arm_vhaddq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u8( __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u16( __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_x_n_u32( __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++@@ -40402,12 +40538,12 @@ extern void *__ARM_undef; ++ #define __arm_vhsubq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_x_n_u32 (__ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhsubq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhsubq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhsubq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++@@ -40447,20 +40583,20 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_base_wb_u64 (p0, p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) ++ ++ #define __arm_vldrdq_gather_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \ ++- int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1))) +++ int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \ +++ int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1))) ++ ++ #define __arm_vldrdq_gather_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \ ++- int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2))) +++ int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \ +++ int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2))) ++ ++ #define __arm_vldrdq_gather_shifted_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce1(p0, int64_t *), p1), \ ++- int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1))) +++ int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \ +++ int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1))) ++ ++ #define __arm_vldrdq_gather_shifted_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \ ++- int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce1(p0, int64_t *), p1, p2), \ ++- int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce1(p0, uint64_t *), p1, p2))) +++ int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \ +++ int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2))) ++ ++ #define __arm_vadciq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -40516,36 +40652,36 @@ extern void *__ARM_undef; ++ ++ #define __arm_vldrbq_gather_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_z_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_z_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_z_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++ ++ #define __arm_vqrdmlahq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vqrdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vqdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vqrshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -40646,12 +40782,12 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqsubq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqsubq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqsubq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++@@ -40666,9 +40802,9 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqrdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vqrdmlsdhxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -40794,17 +40930,17 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_p_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vmlaldavaxq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_p_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) ++ ++ #define __arm_vmlsldavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -40874,10 +41010,10 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmvnq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmvnq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmvnq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce1(__p1, int) , p2), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce1(__p1, int) , p2), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce1(__p1, int) , p2));}) +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmvnq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int) , p2));}) ++ ++ #define __arm_vorrq_m_n(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -40943,12 +41079,12 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vhaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++@@ -40982,12 +41118,12 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vhsubq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vhsubq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vhsubq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vhsubq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vmaxq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -41015,23 +41151,23 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlaq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vmlasq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -41077,12 +41213,12 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8_t), p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t), p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqaddq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqaddq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqaddq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqaddq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++@@ -41094,17 +41230,17 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlahq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vqdmulhq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \ ++- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ +++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulhq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqdmulhq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++ int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) ++@@ -41115,15 +41251,15 @@ extern void *__ARM_undef; ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmullbq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmullbq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));}) +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmullbq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3));}) ++ ++ #define __arm_vqdmulltq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \ ++- int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3), \ +++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ +++ int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmulltq_m_n_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce_i_scalar(__p2, int), p3), \ ++ int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_m_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++ int (*)[__ARM_mve_type_int64x2_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_m_s32 (__ARM_mve_coerce(__p0, int64x2_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) ++ ++@@ -41189,9 +41325,9 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));}) ++ ++ #define __arm_vmullbq_poly_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -41202,12 +41338,12 @@ extern void *__ARM_undef; ++ ++ #define __arm_vldrbq_gather_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32(__ARM_mve_coerce1(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32(__ARM_mve_coerce1(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_s8(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_s16(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_s32(__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vldrbq_gather_offset_u8(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrbq_gather_offset_u16(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrbq_gather_offset_u32(__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vidupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -41215,9 +41351,9 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vidupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) ++ ++ #define __arm_vddupq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -41225,89 +41361,89 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), (uint32_t) __p1, p2, p3), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), (uint32_t) __p1, p2, p3), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vddupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), (uint32_t) __p1, p2, p3), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3));}) ++ ++ #define __arm_vidupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u16 ((uint32_t) __p0, p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) ++ ++ #define __arm_vidupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u32 ((uint32_t) __p0, p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) ++ ++ #define __arm_vidupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vidupq_n_u8 ((uint32_t) __p0, p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vidupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) ++ ++ #define __arm_vddupq_u16(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u16 ((uint32_t) __p0, p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) ++ ++ #define __arm_vddupq_u32(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u32 ((uint32_t) __p0, p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) ++ ++ #define __arm_vddupq_u8(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++ int (*)[__ARM_mve_type_int_n]: __arm_vddupq_n_u8 ((uint32_t) __p0, p1), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1));}) +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vddupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));}) ++ ++ #define __arm_viwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_viwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) ++ ++ #define __arm_viwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, (const int) p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, (const int) p2));}) +++ int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, (const int) p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, (const int) p2));}) ++ ++ #define __arm_viwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) +++ int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) ++ ++ #define __arm_viwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) +++ int (*)[__ARM_mve_type_int_n]: __arm_viwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_viwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) ++ ++ #define __arm_vdwdupq_m(p0,p1,p2,p3,p4) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t *), p2, p3, p4));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vdwdupq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_m_wb_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_u32_ptr(__p1, uint32_t *), p2, p3, p4));}) ++ ++ #define __arm_vdwdupq_u16(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) +++ int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u16 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u16 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) ++ ++ #define __arm_vdwdupq_u32(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) +++ int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u32 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) ++ ++ #define __arm_vdwdupq_u8(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++- int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce(__p0, uint32_t), p1, p2), \ ++- int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce(__p0, uint32_t *), p1, p2));}) +++ int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_n_u8 (__ARM_mve_coerce_i_scalar(__p0, int), p1, p2), \ +++ int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vdwdupq_wb_u8 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));}) ++ ++ #define __arm_vshlcq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -41343,14 +41479,14 @@ extern void *__ARM_undef; ++ #define __arm_vaddlvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vaddlvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddlvaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddlvaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++ ++ #define __arm_vaddlvq(p0) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -41365,22 +41501,22 @@ extern void *__ARM_undef; ++ #define __arm_vaddvaq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vaddvaq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vaddvaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vaddvaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vaddvaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vaddvaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vaddvaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vaddvaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++ ++ #define __arm_vaddvq(p0) ({ __typeof(p0) __p0 = (p0); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \ ++@@ -41406,9 +41542,9 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vcmpcsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -41416,9 +41552,9 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmpcsq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmpcsq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmpcsq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpcsq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2));}) ++ ++ #define __arm_vcmphiq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -41426,16 +41562,16 @@ extern void *__ARM_undef; ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t)), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t)), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t)));}) +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int)), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int)));}) ++ ++ #define __arm_vcmphiq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8_t), p2), \ ++- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16_t), p2), \ ++- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32_t), p2), \ +++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ +++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmphiq_m_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce_i_scalar(__p1, int), p2), \ ++ int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vcmphiq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++ int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcmphiq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++ int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcmphiq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++@@ -41532,34 +41668,34 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vmladavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaq_p_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaq_p_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaq_p_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaq_p_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vmladavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_s8 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_s16 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_s32 (__ARM_mve_coerce(__p0, int32_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaxq_u8 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaxq_u16 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaxq_u32 (__ARM_mve_coerce(__p0, uint32_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vmladavaxq_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmladavaxq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmladavaxq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmladavaxq_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmladavaxq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmladavaxq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vmladavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -41602,17 +41738,17 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_u16 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmlaldavaq_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vmlaldavaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vmlaldavaxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_s16 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavaxq_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavaxq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));}) ++ ++ #define __arm_vmlaldavq(p0,p1) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++@@ -41776,22 +41912,22 @@ extern void *__ARM_undef; ++ ++ #define __arm_vstrbq(p0,p1) ({ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t)), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_s16 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_s32 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_u8 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_u16 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_u32 (__ARM_mve_coerce_u8_ptr(p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t)));}) ++ ++ #define __arm_vstrbq_p(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16_t]: __arm_vstrbq_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int8x16_t), p2), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int16x8_t]: __arm_vstrbq_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int16x8_t), p2), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int32x4_t]: __arm_vstrbq_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, int32x4_t), p2), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), p2), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));}) ++ ++ #define __arm_vstrdq_scatter_base(p0,p1,p2) ({ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p2)])0, \ ++@@ -41807,61 +41943,61 @@ extern void *__ARM_undef; ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vrmlaldavhaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_p_s32 (__ARM_mve_coerce(__p0, int64_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_p_u32 (__ARM_mve_coerce(__p0, uint64_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vrmlaldavhaq_p_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vrmlaldavhaq_p_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vstrbq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t)), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t)), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t)));}) ++ ++ #define __arm_vstrbq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p1) __p1 = (p1); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ ++- int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ ++- int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_int8x16_t]: __arm_vstrbq_scatter_offset_p_s8 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, int8x16_t), p3), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vstrbq_scatter_offset_p_s16 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \ +++ int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vstrbq_scatter_offset_p_s32 (__ARM_mve_coerce_s8_ptr(__p0, int8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vstrbq_scatter_offset_p_u8 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vstrbq_scatter_offset_p_u16 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3), \ +++ int (*)[__ARM_mve_type_uint8_t_ptr][__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vstrbq_scatter_offset_p_u32 (__ARM_mve_coerce_u8_ptr(__p0, uint8_t *), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32x4_t), p3));}) ++ ++ #define __arm_vstrdq_scatter_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ ++- int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) +++ int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ +++ int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) ++ ++ #define __arm_vstrdq_scatter_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ ++- int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) +++ int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ +++ int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) ++ ++ #define __arm_vstrdq_scatter_shifted_offset_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ ++- int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) +++ int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t), p3), \ +++ int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_p_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t), p3));}) ++ ++ #define __arm_vstrdq_scatter_shifted_offset(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \ ++ __typeof(p2) __p2 = (p2); \ ++ _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p2)])0, \ ++- int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ ++- int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) +++ int (*)[__ARM_mve_type_int64_t_ptr][__ARM_mve_type_int64x2_t]: __arm_vstrdq_scatter_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(__p0, int64_t *), p1, __ARM_mve_coerce(__p2, int64x2_t)), \ +++ int (*)[__ARM_mve_type_uint64_t_ptr][__ARM_mve_type_uint64x2_t]: __arm_vstrdq_scatter_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(__p0, uint64_t *), p1, __ARM_mve_coerce(__p2, uint64x2_t)));}) ++ ++ #endif /* __cplusplus */ ++ #endif /* __ARM_FEATURE_MVE */ ++--- a/src/gcc/config/arm/constraints.md +++++ b/src/gcc/config/arm/constraints.md ++@@ -102,10 +102,6 @@ (define_constraint "Rg" ++ (match_test "TARGET_HAVE_MVE && ((ival == 1) || (ival == 2) ++ || (ival == 4) || (ival == 8))"))) ++ ++-;; True if the immediate is multiple of 8 and in range of -/+ 1016 for MVE. ++-(define_predicate "mve_vldrd_immediate" ++- (match_test "satisfies_constraint_Ri (op)")) ++- ++ (define_register_constraint "t" "TARGET_32BIT ? VFP_LO_REGS : NO_REGS" ++ "The VFP registers @code{s0}-@code{s31}.") ++ ++@@ -566,6 +562,22 @@ (define_constraint "US" ++ (match_code "symbol_ref") ++ ) ++ +++;; True if the immediate is the range +/- 1016 and multiple of 8 for MVE. +++(define_constraint "Ri" +++ "@internal In Thumb-2 state a constant is multiple of 8 and in range +++ of -/+ 1016 for MVE" +++ (and (match_code "const_int") +++ (match_test "TARGET_HAVE_MVE && (-1016 <= ival) && (ival <= 1016) +++ && ((ival % 8) == 0)"))) +++ +++;; True if the immediate is multiple of 2 and in range of -/+ 252 for MVE. +++(define_constraint "Rl" +++ "@internal In Thumb-2 state a constant is multiple of 2 and in range +++ of -/+ 252 for MVE" +++ (and (match_code "const_int") +++ (match_test "TARGET_HAVE_MVE && (-252 <= ival) && (ival <= 252) +++ && ((ival % 2) == 0)"))) +++ ++ (define_memory_constraint "Uz" ++ "@internal ++ A memory access that is accessible as an LDC/STC operand" ++--- a/src/gcc/config/arm/mve.md +++++ b/src/gcc/config/arm/mve.md ++@@ -134,7 +134,7 @@ (define_insn "mve_vrndq_m_f" ++ VRNDQ_M_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vrintzt.f%# %q0, %q2" +++ "vpst\;vrintzt.f%#\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -232,7 +232,7 @@ (define_insn "mve_vrev64q_f" ++ VREV64Q_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vrev64.%# %q0, %q1" +++ "vrev64.%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -245,7 +245,7 @@ (define_insn "mve_vnegq_f" ++ (neg:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vneg.f%# %q0, %q1" +++ "vneg.f%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -259,7 +259,7 @@ (define_insn "mve_vdupq_n_f" ++ VDUPQ_N_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vdup.%# %q0, %1" +++ "vdup.%#\t%q0, %1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -272,7 +272,7 @@ (define_insn "mve_vabsq_f" ++ (abs:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vabs.f%# %q0, %q1" +++ "vabs.f%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -286,7 +286,7 @@ (define_insn "mve_vrev32q_fv8hf" ++ VREV32Q_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vrev32.16 %q0, %q1" +++ "vrev32.16\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ;; ++@@ -299,7 +299,7 @@ (define_insn "mve_vcvttq_f32_f16v4sf" ++ VCVTTQ_F32_F16)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvtt.f32.f16 %q0, %q1" +++ "vcvtt.f32.f16\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -313,7 +313,7 @@ (define_insn "mve_vcvtbq_f32_f16v4sf" ++ VCVTBQ_F32_F16)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvtb.f32.f16 %q0, %q1" +++ "vcvtb.f32.f16\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -327,7 +327,7 @@ (define_insn "mve_vcvtq_to_f_" ++ VCVTQ_TO_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvt.f%#.%# %q0, %q1" +++ "vcvt.f%#.%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -341,7 +341,7 @@ (define_insn "mve_vrev64q_" ++ VREV64Q)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vrev64.%# %q0, %q1" +++ "vrev64.%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -355,7 +355,7 @@ (define_insn "mve_vcvtq_from_f_" ++ VCVTQ_FROM_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvt.%#.f%# %q0, %q1" +++ "vcvt.%#.f%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ;; [vqnegq_s]) ++@@ -367,7 +367,7 @@ (define_insn "mve_vqnegq_s" ++ VQNEGQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vqneg.s%# %q0, %q1" +++ "vqneg.s%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -381,7 +381,7 @@ (define_insn "mve_vqabsq_s" ++ VQABSQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vqabs.s%# %q0, %q1" +++ "vqabs.s%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -394,7 +394,7 @@ (define_insn "mve_vnegq_s" ++ (neg:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE" ++- "vneg.s%# %q0, %q1" +++ "vneg.s%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -428,7 +428,7 @@ (define_insn "mve_vdupq_n_" ++ VDUPQ_N)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vdup.%# %q0, %1" +++ "vdup.%#\t%q0, %1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -441,7 +441,7 @@ (define_insn "@mve_vclzq_s" ++ (clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE" ++- "vclz.i%# %q0, %q1" +++ "vclz.i%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ (define_expand "mve_vclzq_u" ++@@ -462,7 +462,7 @@ (define_insn "mve_vclsq_s" ++ VCLSQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vcls.s%# %q0, %q1" +++ "vcls.s%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -517,7 +517,7 @@ (define_insn "mve_vmovltq_" ++ VMOVLTQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmovlt.%# %q0, %q1" +++ "vmovlt.%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -531,7 +531,7 @@ (define_insn "mve_vmovlbq_" ++ VMOVLBQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmovlb.%# %q0, %q1" +++ "vmovlb.%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -545,7 +545,7 @@ (define_insn "mve_vcvtpq_" ++ VCVTPQ)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvtp.%#.f%# %q0, %q1" +++ "vcvtp.%#.f%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -559,7 +559,7 @@ (define_insn "mve_vcvtnq_" ++ VCVTNQ)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvtn.%#.f%# %q0, %q1" +++ "vcvtn.%#.f%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -573,7 +573,7 @@ (define_insn "mve_vcvtmq_" ++ VCVTMQ)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvtm.%#.f%# %q0, %q1" +++ "vcvtm.%#.f%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -587,7 +587,7 @@ (define_insn "mve_vcvtaq_" ++ VCVTAQ)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvta.%#.f%# %q0, %q1" +++ "vcvta.%#.f%#\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -601,7 +601,7 @@ (define_insn "mve_vmvnq_n_" ++ VMVNQ_N)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmvn.i%# %q0, %1" +++ "vmvn.i%#\t%q0, %1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -615,7 +615,7 @@ (define_insn "mve_vrev16q_v16qi" ++ VREV16Q)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vrev16.8 %q0, %q1" +++ "vrev16.8\t%q0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -629,7 +629,7 @@ (define_insn "mve_vaddlvq_v4si" ++ VADDLVQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vaddlv.32 %Q0, %R0, %q1" +++ "vaddlv.32\t%Q0, %R0, %q1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -643,7 +643,7 @@ (define_insn "mve_vctpqhi" ++ VCTPQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vctp. %1" +++ "vctp.\t%1" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -672,7 +672,7 @@ (define_insn "mve_vsubq_n_f" ++ VSUBQ_N_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vsub.f %q0, %q1, %2" +++ "vsub.f\t%q0, %q1, %2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -687,7 +687,7 @@ (define_insn "mve_vbrsrq_n_f" ++ VBRSRQ_N_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vbrsr. %q0, %q1, %2" +++ "vbrsr.\t%q0, %q1, %2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -716,7 +716,7 @@ (define_insn "mve_vcreateq_f" ++ VCREATEQ_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1" +++ "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -731,7 +731,7 @@ (define_insn "mve_vcreateq_" ++ VCREATEQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1" +++ "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -810,7 +810,7 @@ (define_insn "mve_vaddlvq_p_v4si" ++ VADDLVQ_P)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vaddlvt.32 %Q0, %R0, %q1" +++ "vpst\;vaddlvt.32\t%Q0, %R0, %q1" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -824,7 +824,7 @@ (define_insn "@mve_vcmpq_" ++ (match_operand:MVE_2 2 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE" ++- "vcmp.%# , %q1, %q2" +++ "vcmp.%#\t, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -873,7 +873,7 @@ (define_insn "mve_vaddq_n_" ++ VADDQ_N)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vadd.i%# %q0, %q1, %2" +++ "vadd.i%#\t%q0, %q1, %2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -888,7 +888,7 @@ (define_insn "mve_vaddvaq_" ++ VADDVAQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vaddva.%# %0, %q2" +++ "vaddva.%#\t%0, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -969,7 +969,7 @@ (define_insn "mve_vbrsrq_n_" ++ VBRSRQ_N)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vbrsr.%# %q0, %q1, %2" +++ "vbrsr.%#\t%q0, %q1, %2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -1828,7 +1828,7 @@ (define_insn "mve_vaddlvaq_v4si" ++ VADDLVAQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vaddlva.32 %Q0, %R0, %q2" +++ "vaddlva.32\t%Q0, %R0, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -1843,7 +1843,7 @@ (define_insn "mve_vaddq_n_f" ++ VADDQ_N_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vadd.f%# %q0, %q1, %2" +++ "vadd.f%#\t%q0, %q1, %2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -1857,7 +1857,7 @@ (define_insn "mve_vandq_f" ++ (match_operand:MVE_0 2 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vand %q0, %q1, %q2" +++ "vand\t%q0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -1871,7 +1871,7 @@ (define_insn "mve_vbicq_f" ++ (match_operand:MVE_0 2 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vbic %q0, %q1, %q2" +++ "vbic\t%q0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -1886,7 +1886,7 @@ (define_insn "mve_vbicq_n_" ++ VBICQ_N)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vbic.i%# %q0, %2" +++ "vbic.i%#\t%q0, %2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -1960,7 +1960,7 @@ (define_insn "mve_vctpq_mhi" ++ VCTPQ_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vctpt. %1" +++ "vpst\;vctpt.\t%1" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -1975,7 +1975,7 @@ (define_insn "mve_vcvtbq_f16_f32v8hf" ++ VCVTBQ_F16_F32)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvtb.f16.f32 %q0, %q2" +++ "vcvtb.f16.f32\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -1990,7 +1990,7 @@ (define_insn "mve_vcvttq_f16_f32v8hf" ++ VCVTTQ_F16_F32)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vcvtt.f16.f32 %q0, %q2" +++ "vcvtt.f16.f32\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2004,7 +2004,7 @@ (define_insn "mve_veorq_f" ++ (match_operand:MVE_0 2 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "veor %q0, %q1, %q2" +++ "veor\t%q0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2152,7 +2152,7 @@ (define_insn "mve_vmlaldavxq_s" ++ VMLALDAVXQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmlaldavx.s%# %Q0, %R0, %q1, %q2" +++ "vmlaldavx.s%#\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2167,7 +2167,7 @@ (define_insn "mve_vmlsldavq_s" ++ VMLSLDAVQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmlsldav.s%# %Q0, %R0, %q1, %q2" +++ "vmlsldav.s%#\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2182,7 +2182,7 @@ (define_insn "mve_vmlsldavxq_s" ++ VMLSLDAVXQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmlsldavx.s%# %Q0, %R0, %q1, %q2" +++ "vmlsldavx.s%#\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2255,7 +2255,7 @@ (define_insn "mve_vornq_f" ++ (match_operand:MVE_0 1 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vorn %q0, %q1, %q2" +++ "vorn\t%q0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2269,7 +2269,7 @@ (define_insn "mve_vorrq_f" ++ (match_operand:MVE_0 2 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vorr %q0, %q1, %q2" +++ "vorr\t%q0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2419,7 +2419,7 @@ (define_insn "mve_vrmlaldavhxq_sv4si" ++ VRMLALDAVHXQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vrmlaldavhx.s32 %Q0, %R0, %q1, %q2" +++ "vrmlaldavhx.s32\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2538,7 +2538,7 @@ (define_insn "mve_vrmlaldavhq_v4si" ++ VRMLALDAVHQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vrmlaldavh.32 %Q0, %R0, %q1, %q2" +++ "vrmlaldavh.32\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2554,7 +2554,7 @@ (define_insn "mve_vbicq_m_n_" ++ VBICQ_M_N)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vbict.i%# %q0, %2" +++ "vpst\;vbict.i%#\t%q0, %2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ;; ++@@ -2599,7 +2599,7 @@ (define_insn "mve_vcvtq_m_to_f_" ++ VCVTQ_M_TO_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vcvtt.f%#.%# %q0, %q2" +++ "vpst\;vcvtt.f%#.%#\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ;; ++@@ -2644,7 +2644,7 @@ (define_insn "mve_vrmlaldavhaq_v4si" ++ VRMLALDAVHAQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vrmlaldavha.32 %Q0, %R0, %q2, %q3" +++ "vrmlaldavha.32\t%Q0, %R0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -2707,7 +2707,7 @@ (define_insn "mve_vshlcq_" ++ (match_dup 4)] ++ VSHLCQ))] ++ "TARGET_HAVE_MVE" ++- "vshlc %q0, %1, %4") +++ "vshlc\t%q0, %1, %4") ++ ++ ;; ++ ;; [vabsq_m_s]) ++@@ -3041,7 +3041,7 @@ (define_insn "mve_vdupq_m_n_" ++ VDUPQ_M_N)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vdupt.%# %q0, %2" +++ "vpst\;vdupt.%#\t%q0, %2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -3265,7 +3265,7 @@ (define_insn "mve_vmvnq_m_" ++ VMVNQ_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vmvnt %q0, %q2" +++ "vpst\;vmvnt\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -3297,7 +3297,7 @@ (define_insn "@mve_vpselq_" ++ VPSELQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpsel %q0, %q1, %q2" +++ "vpsel\t%q0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -3498,7 +3498,7 @@ (define_insn "mve_vqshlq_m_r_" ++ ;; ++ (define_insn "mve_vrev64q_m_" ++ [ ++- (set (match_operand:MVE_2 0 "s_register_operand" "=w") +++ (set (match_operand:MVE_2 0 "s_register_operand" "=&w") ++ (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0") ++ (match_operand:MVE_2 2 "s_register_operand" "w") ++ (match_operand: 3 "vpr_register_operand" "Up")] ++@@ -3712,7 +3712,7 @@ (define_insn "mve_vaddlvaq_p_v4si" ++ VADDLVAQ_P)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vaddlvat.32 %Q0, %R0, %q2" +++ "vpst\;vaddlvat.32\t%Q0, %R0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ;; ++@@ -3922,7 +3922,7 @@ (define_insn "mve_vcvtbq_m_f16_f32v8hf" ++ VCVTBQ_M_F16_F32)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vcvtbt.f16.f32 %q0, %q2" +++ "vpst\;vcvtbt.f16.f32\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -3938,7 +3938,7 @@ (define_insn "mve_vcvtbq_m_f32_f16v4sf" ++ VCVTBQ_M_F32_F16)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vcvtbt.f32.f16 %q0, %q2" +++ "vpst\;vcvtbt.f32.f16\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -3954,7 +3954,7 @@ (define_insn "mve_vcvttq_m_f16_f32v8hf" ++ VCVTTQ_M_F16_F32)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vcvttt.f16.f32 %q0, %q2" +++ "vpst\;vcvttt.f16.f32\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -3970,7 +3970,7 @@ (define_insn "mve_vcvttq_m_f32_f16v4sf" ++ VCVTTQ_M_F32_F16)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vcvttt.f32.f16 %q0, %q2" +++ "vpst\;vcvttt.f32.f16\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -3986,7 +3986,7 @@ (define_insn "mve_vdupq_m_n_f" ++ VDUPQ_M_N_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vdupt.%# %q0, %2" +++ "vpst\;vdupt.%#\t%q0, %2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4158,7 +4158,7 @@ (define_insn "mve_vmlaldavaq_" ++ VMLALDAVAQ)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmlaldava.%# %Q0, %R0, %q2, %q3" +++ "vmlaldava.%#\t%Q0, %R0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -4174,7 +4174,7 @@ (define_insn "mve_vmlaldavaxq_s" ++ VMLALDAVAXQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmlaldavax.s%# %Q0, %R0, %q2, %q3" +++ "vmlaldavax.s%#\t%Q0, %R0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -4190,7 +4190,7 @@ (define_insn "mve_vmlaldavq_p_" ++ VMLALDAVQ_P)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vmlaldavt.%# %Q0, %R0, %q1, %q2" +++ "vpst\;vmlaldavt.%#\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4221,7 +4221,7 @@ (define_insn "mve_vmlsldavaq_s" ++ VMLSLDAVAQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmlsldava.s%# %Q0, %R0, %q2, %q3" +++ "vmlsldava.s%#\t%Q0, %R0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -4237,7 +4237,7 @@ (define_insn "mve_vmlsldavaxq_s" ++ VMLSLDAVAXQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vmlsldavax.s%# %Q0, %R0, %q2, %q3" +++ "vmlsldavax.s%#\t%Q0, %R0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -4253,7 +4253,7 @@ (define_insn "mve_vmlsldavq_p_s" ++ VMLSLDAVQ_P_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vmlsldavt.s%# %Q0, %R0, %q1, %q2" +++ "vpst\;vmlsldavt.s%#\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4269,7 +4269,7 @@ (define_insn "mve_vmlsldavxq_p_s" ++ VMLSLDAVXQ_P_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vmlsldavxt.s%# %Q0, %R0, %q1, %q2" +++ "vpst\;vmlsldavxt.s%#\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ;; ++@@ -4346,7 +4346,7 @@ (define_insn "mve_vmvnq_m_n_" ++ VMVNQ_M_N)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vmvnt.i%# %q0, %2" +++ "vpst\;vmvnt.i%#\t%q0, %2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ;; ++@@ -4377,7 +4377,7 @@ (define_insn "mve_vorrq_m_n_" ++ VORRQ_M_N)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vorrt.i%# %q0, %2" +++ "vpst\;vorrt.i%#\t%q0, %2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ;; ++@@ -4392,7 +4392,7 @@ (define_insn "@mve_vpselq_f" ++ VPSELQ_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpsel %q0, %q1, %q2" +++ "vpsel\t%q0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -4568,7 +4568,7 @@ (define_insn "mve_vrev32q_m_fv8hf" ++ VREV32Q_M_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vrev32t.16 %q0, %q2" +++ "vpst\;vrev32t.16\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4584,7 +4584,7 @@ (define_insn "mve_vrev32q_m_" ++ VREV32Q_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vrev32t.%# %q0, %q2" +++ "vpst\;vrev32t.%#\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4593,14 +4593,14 @@ (define_insn "mve_vrev32q_m_" ++ ;; ++ (define_insn "mve_vrev64q_m_f" ++ [ ++- (set (match_operand:MVE_0 0 "s_register_operand" "=w") +++ (set (match_operand:MVE_0 0 "s_register_operand" "=&w") ++ (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0") ++ (match_operand:MVE_0 2 "s_register_operand" "w") ++ (match_operand: 3 "vpr_register_operand" "Up")] ++ VREV64Q_M_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vrev64t.%# %q0, %q2" +++ "vpst\;vrev64t.%#\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4616,7 +4616,7 @@ (define_insn "mve_vrmlaldavhaxq_sv4si" ++ VRMLALDAVHAXQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vrmlaldavhax.s32 %Q0, %R0, %q2, %q3" +++ "vrmlaldavhax.s32\t%Q0, %R0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -4632,7 +4632,7 @@ (define_insn "mve_vrmlaldavhxq_p_sv4si" ++ VRMLALDAVHXQ_P_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vrmlaldavhxt.s32 %Q0, %R0, %q1, %q2" +++ "vpst\;vrmlaldavhxt.s32\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4648,7 +4648,7 @@ (define_insn "mve_vrmlsldavhaxq_sv4si" ++ VRMLSLDAVHAXQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vrmlsldavhax.s32 %Q0, %R0, %q2, %q3" +++ "vrmlsldavhax.s32\t%Q0, %R0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -4664,7 +4664,7 @@ (define_insn "mve_vrmlsldavhq_p_sv4si" ++ VRMLSLDAVHQ_P_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vrmlsldavht.s32 %Q0, %R0, %q1, %q2" +++ "vpst\;vrmlsldavht.s32\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4680,7 +4680,7 @@ (define_insn "mve_vrmlsldavhxq_p_sv4si" ++ VRMLSLDAVHXQ_P_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vrmlsldavhxt.s32 %Q0, %R0, %q1, %q2" +++ "vpst\;vrmlsldavhxt.s32\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4905,7 +4905,7 @@ (define_insn "mve_vrev16q_m_v16qi" ++ VREV16Q_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vrev16t.8 %q0, %q2" +++ "vpst\;vrev16t.8\t%q0, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4937,7 +4937,7 @@ (define_insn "mve_vrmlaldavhq_p_v4si" ++ VRMLALDAVHQ_P)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vrmlaldavht.32 %Q0, %R0, %q1, %q2" +++ "vpst\;vrmlaldavht.32\t%Q0, %R0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -4953,7 +4953,7 @@ (define_insn "mve_vrmlsldavhaq_sv4si" ++ VRMLSLDAVHAQ_S)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vrmlsldavha.s32 %Q0, %R0, %q2, %q3" +++ "vrmlsldavha.s32\t%Q0, %R0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -4972,7 +4972,7 @@ (define_insn "mve_vabavq_p_" ++ "TARGET_HAVE_MVE" ++ "vpst\;vabavt.%#\t%0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++-]) +++ (set_attr "length" "8")]) ++ ++ ;; ++ ;; [vqshluq_m_n_s]) ++@@ -4988,7 +4988,8 @@ (define_insn "mve_vqshluq_m_n_s" ++ ] ++ "TARGET_HAVE_MVE" ++ "vpst\n\tvqshlut.s%#\t%q0, %q2, %3" ++- [(set_attr "type" "mve_move")]) +++ [(set_attr "type" "mve_move") +++ (set_attr "length" "8")]) ++ ++ ;; ++ ;; [vshlq_m_s, vshlq_m_u]) ++@@ -5004,7 +5005,8 @@ (define_insn "mve_vshlq_m_" ++ ] ++ "TARGET_HAVE_MVE" ++ "vpst\;vshlt.%#\t%q0, %q2, %q3" ++- [(set_attr "type" "mve_move")]) +++ [(set_attr "type" "mve_move") +++ (set_attr "length" "8")]) ++ ++ ;; ++ ;; [vsriq_m_n_s, vsriq_m_n_u]) ++@@ -5020,7 +5022,8 @@ (define_insn "mve_vsriq_m_n_" ++ ] ++ "TARGET_HAVE_MVE" ++ "vpst\;vsrit.%#\t%q0, %q2, %3" ++- [(set_attr "type" "mve_move")]) +++ [(set_attr "type" "mve_move") +++ (set_attr "length" "8")]) ++ ++ ;; ++ ;; [vsubq_m_u, vsubq_m_s]) ++@@ -5036,7 +5039,8 @@ (define_insn "mve_vsubq_m_" ++ ] ++ "TARGET_HAVE_MVE" ++ "vpst\;vsubt.i%#\t%q0, %q2, %q3" ++- [(set_attr "type" "mve_move")]) +++ [(set_attr "type" "mve_move") +++ (set_attr "length" "8")]) ++ ++ ;; ++ ;; [vcvtq_m_n_to_f_u, vcvtq_m_n_to_f_s]) ++@@ -5118,7 +5122,7 @@ (define_insn "mve_vandq_m_" ++ VANDQ_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vandt %q0, %q2, %q3" +++ "vpst\;vandt\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -5135,7 +5139,7 @@ (define_insn "mve_vbicq_m_" ++ VBICQ_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vbict %q0, %q2, %q3" +++ "vpst\;vbict\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -5203,7 +5207,7 @@ (define_insn "mve_veorq_m_" ++ VEORQ_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;veort %q0, %q2, %q3" +++ "vpst\;veort\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -5458,7 +5462,7 @@ (define_insn "mve_vornq_m_" ++ VORNQ_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vornt %q0, %q2, %q3" +++ "vpst\;vornt\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -5475,7 +5479,7 @@ (define_insn "mve_vorrq_m_" ++ VORRQ_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vorrt %q0, %q2, %q3" +++ "vpst\;vorrt\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -6121,7 +6125,7 @@ (define_insn "mve_vmlaldavaxq_p_" ++ VMLALDAVAXQ_P)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;vmlaldavaxt.%# %Q0, %R0, %q2, %q3" +++ "vpst\;vmlaldavaxt.%#\t%Q0, %R0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -6647,7 +6651,7 @@ (define_insn "mve_vandq_m_f" ++ VANDQ_M_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vandt %q0, %q2, %q3" +++ "vpst\;vandt\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -6664,7 +6668,7 @@ (define_insn "mve_vbicq_m_f" ++ VBICQ_M_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vbict %q0, %q2, %q3" +++ "vpst\;vbict\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -6868,7 +6872,7 @@ (define_insn "mve_veorq_m_f" ++ VEORQ_M_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;veort %q0, %q2, %q3" +++ "vpst\;veort\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -7021,7 +7025,7 @@ (define_insn "mve_vornq_m_f" ++ VORNQ_M_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vornt %q0, %q2, %q3" +++ "vpst\;vornt\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -7038,7 +7042,7 @@ (define_insn "mve_vorrq_m_f" ++ VORRQ_M_F)) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vpst\;vorrt %q0, %q2, %q3" +++ "vpst\;vorrt\t%q0, %q2, %q3" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -7265,15 +7269,13 @@ (define_insn "mve_vstrwq_scatter_base_p_v4si" ++ } ++ [(set_attr "length" "8")]) ++ ++-;; ++-;; [vstrbq_p_s vstrbq_p_u] ++-;; ++ (define_insn "mve_vstrbq_p_" ++ [(set (match_operand: 0 "mve_memory_operand" "=Ux") ++- (unspec: [(match_operand:MVE_2 1 "s_register_operand" "w") ++- (match_operand: 2 "vpr_register_operand" "Up")] ++- VSTRBQ)) ++- ] +++ (unspec: +++ [(match_operand:MVE_2 1 "s_register_operand" "w") +++ (match_operand: 2 "vpr_register_operand" "Up") +++ (match_dup 0)] +++ VSTRBQ))] ++ "TARGET_HAVE_MVE" ++ { ++ rtx ops[2]; ++@@ -8072,10 +8074,11 @@ (define_insn "mve_vstrhq_fv8hf" ++ ;; ++ (define_insn "mve_vstrhq_p_fv8hf" ++ [(set (match_operand:V8HI 0 "mve_memory_operand" "=Ux") ++- (unspec:V8HI [(match_operand:V8HF 1 "s_register_operand" "w") ++- (match_operand:V8BI 2 "vpr_register_operand" "Up")] ++- VSTRHQ_F)) ++- ] +++ (unspec:V8HI +++ [(match_operand:V8HF 1 "s_register_operand" "w") +++ (match_operand:V8BI 2 "vpr_register_operand" "Up") +++ (match_dup 0)] +++ VSTRHQ_F))] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++ { ++ rtx ops[2]; ++@@ -8092,8 +8095,10 @@ (define_insn "mve_vstrhq_p_fv8hf" ++ ;; ++ (define_insn "mve_vstrhq_p_" ++ [(set (match_operand: 0 "mve_memory_operand" "=Ux") ++- (unspec: [(match_operand:MVE_6 1 "s_register_operand" "w") ++- (match_operand: 2 "vpr_register_operand" "Up")] +++ (unspec: +++ [(match_operand:MVE_6 1 "s_register_operand" "w") +++ (match_operand: 2 "vpr_register_operand" "Up") +++ (match_dup 0)] ++ VSTRHQ)) ++ ] ++ "TARGET_HAVE_MVE" ++@@ -8271,10 +8276,11 @@ (define_insn "mve_vstrwq_fv4sf" ++ ;; ++ (define_insn "mve_vstrwq_p_fv4sf" ++ [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux") ++- (unspec:V4SI [(match_operand:V4SF 1 "s_register_operand" "w") ++- (match_operand: 2 "vpr_register_operand" "Up")] ++- VSTRWQ_F)) ++- ] +++ (unspec:V4SI +++ [(match_operand:V4SF 1 "s_register_operand" "w") +++ (match_operand: 2 "vpr_register_operand" "Up") +++ (match_dup 0)] +++ VSTRWQ_F))] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++ { ++ rtx ops[2]; ++@@ -8291,10 +8297,11 @@ (define_insn "mve_vstrwq_p_fv4sf" ++ ;; ++ (define_insn "mve_vstrwq_p_v4si" ++ [(set (match_operand:V4SI 0 "mve_memory_operand" "=Ux") ++- (unspec:V4SI [(match_operand:V4SI 1 "s_register_operand" "w") ++- (match_operand:V4BI 2 "vpr_register_operand" "Up")] ++- VSTRWQ)) ++- ] +++ (unspec:V4SI +++ [(match_operand:V4SI 1 "s_register_operand" "w") +++ (match_operand:V4BI 2 "vpr_register_operand" "Up") +++ (match_dup 0)] +++ VSTRWQ))] ++ "TARGET_HAVE_MVE" ++ { ++ rtx ops[2]; ++@@ -8478,7 +8485,7 @@ (define_insn "mve_vstrdq_scatter_shifted_offset_p_v2di_insn" ++ (match_operand:HI 3 "vpr_register_operand" "Up")] ++ VSTRDSSOQ))] ++ "TARGET_HAVE_MVE" ++- "vpst\;vstrdt.64\t%q2, [%0, %q1, UXTW #3]" +++ "vpst\;vstrdt.64\t%q2, [%0, %q1, uxtw #3]" ++ [(set_attr "length" "8")]) ++ ++ ;; ++@@ -8507,7 +8514,7 @@ (define_insn "mve_vstrdq_scatter_shifted_offset_v2di_insn" ++ (match_operand:V2DI 2 "s_register_operand" "w")] ++ VSTRDSSOQ))] ++ "TARGET_HAVE_MVE" ++- "vstrd.64\t%q2, [%0, %q1, UXTW #3]" +++ "vstrd.64\t%q2, [%0, %q1, uxtw #3]" ++ [(set_attr "length" "4")]) ++ ++ ;; ++@@ -8923,7 +8930,7 @@ (define_insn "mve_vaddq" ++ (match_operand:MVE_2 2 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE" ++- "vadd.i%# %q0, %q1, %q2" +++ "vadd.i%#\t%q0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -8937,7 +8944,7 @@ (define_insn "mve_vaddq_f" ++ (match_operand:MVE_0 2 "s_register_operand" "w"))) ++ ] ++ "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" ++- "vadd.f%# %q0, %q1, %q2" +++ "vadd.f%#\t%q0, %q1, %q2" ++ [(set_attr "type" "mve_move") ++ ]) ++ ++@@ -9038,7 +9045,7 @@ (define_insn "mve_vddupq_u_insn" ++ (minus:SI (match_dup 2) ++ (match_operand:SI 4 "immediate_operand" "i")))] ++ "TARGET_HAVE_MVE" ++- "vddup.u%# %q0, %1, %3") +++ "vddup.u%#\t%q0, %1, %3") ++ ++ ;; ++ ;; [vddupq_m_n_u]) ++@@ -9074,7 +9081,7 @@ (define_insn "mve_vddupq_m_wb_u_insn" ++ (minus:SI (match_dup 3) ++ (match_operand:SI 6 "immediate_operand" "i")))] ++ "TARGET_HAVE_MVE" ++- "vpst\;\tvddupt.u%#\t%q0, %2, %4" +++ "vpst\;vddupt.u%#\t%q0, %2, %4" ++ [(set_attr "length""8")]) ++ ++ ;; ++@@ -9190,7 +9197,7 @@ (define_insn "mve_vdwdupq_m_wb_u_insn" ++ VDWDUPQ_M)) ++ ] ++ "TARGET_HAVE_MVE" ++- "vpst\;\tvdwdupt.u%#\t%q2, %3, %R4, %5" +++ "vpst\;vdwdupt.u%#\t%q2, %3, %R4, %5" ++ [(set_attr "type" "mve_move") ++ (set_attr "length""8")]) ++ ++@@ -9345,7 +9352,7 @@ (define_insn "mve_vstrwq_scatter_base_wb_p_v4si" ++ [(match_operand:V4SI 1 "s_register_operand" "0") ++ (match_operand:SI 2 "mve_vldrd_immediate" "Ri") ++ (match_operand:V4SI 3 "s_register_operand" "w") ++- (match_operand:V4BI 4 "vpr_register_operand")] +++ (match_operand:V4BI 4 "vpr_register_operand" "Up")] ++ VSTRWSBWBQ)) ++ (set (match_operand:V4SI 0 "s_register_operand" "=w") ++ (unspec:V4SI [(match_dup 1) (match_dup 2)] ++@@ -9394,9 +9401,9 @@ (define_insn "mve_vstrwq_scatter_base_wb_p_fv4sf" ++ [(set (mem:BLK (scratch)) ++ (unspec:BLK ++ [(match_operand:V4SI 1 "s_register_operand" "0") ++- (match_operand:SI 2 "mve_vldrd_immediate" "Ri") +++ (match_operand:SI 2 "mve_vstrw_immediate" "Rl") ++ (match_operand:V4SF 3 "s_register_operand" "w") ++- (match_operand:V4BI 4 "vpr_register_operand")] +++ (match_operand:V4BI 4 "vpr_register_operand" "Up")] ++ VSTRWQSBWB_F)) ++ (set (match_operand:V4SI 0 "s_register_operand" "=w") ++ (unspec:V4SI [(match_dup 1) (match_dup 2)] ++@@ -9408,7 +9415,7 @@ (define_insn "mve_vstrwq_scatter_base_wb_p_fv4sf" ++ ops[0] = operands[1]; ++ ops[1] = operands[2]; ++ ops[2] = operands[3]; ++- output_asm_insn ("vpst\;\tvstrwt.u32\t%q2, [%q0, %1]!",ops); +++ output_asm_insn ("vpst\;vstrwt.u32\t%q2, [%q0, %1]!",ops); ++ return ""; ++ } ++ [(set_attr "length" "8")]) ++@@ -9447,7 +9454,7 @@ (define_insn "mve_vstrdq_scatter_base_wb_p_v2di" ++ [(match_operand:V2DI 1 "s_register_operand" "0") ++ (match_operand:SI 2 "mve_vldrd_immediate" "Ri") ++ (match_operand:V2DI 3 "s_register_operand" "w") ++- (match_operand:HI 4 "vpr_register_operand")] +++ (match_operand:HI 4 "vpr_register_operand" "Up")] ++ VSTRDSBWBQ)) ++ (set (match_operand:V2DI 0 "s_register_operand" "=w") ++ (unspec:V2DI [(match_dup 1) (match_dup 2)] ++@@ -9459,7 +9466,7 @@ (define_insn "mve_vstrdq_scatter_base_wb_p_v2di" ++ ops[0] = operands[1]; ++ ops[1] = operands[2]; ++ ops[2] = operands[3]; ++- output_asm_insn ("vpst;vstrdt.u64\t%q2, [%q0, %1]!",ops); +++ output_asm_insn ("vpst\;vstrdt.u64\t%q2, [%q0, %1]!",ops); ++ return ""; ++ } ++ [(set_attr "length" "8")]) ++@@ -9768,7 +9775,7 @@ (define_expand "mve_vldrdq_gather_base_nowb_z_v2di" ++ ++ (define_insn "get_fpscr_nzcvqc" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++- (unspec:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))] +++ (unspec_volatile:SI [(reg:SI VFPCC_REGNUM)] UNSPEC_GET_FPSCR_NZCVQC))] ++ "TARGET_HAVE_MVE" ++ "vmrs\\t%0, FPSCR_nzcvqc" ++ [(set_attr "type" "mve_move")]) ++--- a/src/gcc/config/arm/predicates.md +++++ b/src/gcc/config/arm/predicates.md ++@@ -73,13 +73,13 @@ (define_predicate "mve_imm_32" ++ (define_predicate "mve_imm_selective_upto_8" ++ (match_test "satisfies_constraint_Rg (op)")) ++ ++-;; True if the immediate is the range +/- 1016 and multiple of 8 for MVE. ++-(define_constraint "Ri" ++- "@internal In Thumb-2 state a constant is multiple of 8 and in range ++- of -/+ 1016 for MVE" ++- (and (match_code "const_int") ++- (match_test "TARGET_HAVE_MVE && (-1016 <= ival) && (ival <= 1016) ++- && ((ival % 8) == 0)"))) +++;; True if the immediate is multiple of 8 and in range of -/+ 1016 for MVE. +++(define_predicate "mve_vldrd_immediate" +++ (match_test "satisfies_constraint_Ri (op)")) +++ +++;; True if the immediate is multiple of 2 and in range of -/+ 252 for MVE. +++(define_predicate "mve_vstrw_immediate" +++ (match_test "satisfies_constraint_Rl (op)")) ++ ++ ; Predicate for stack protector guard's address in ++ ; stack_protect_combined_set_insn and stack_protect_combined_test_insn patterns ++--- a/src/gcc/config/arm/vfp.md +++++ b/src/gcc/config/arm/vfp.md ++@@ -105,9 +105,9 @@ (define_insn "*thumb2_movhi_vfp" ++ case 8: ++ return "vmov%?.f32\t%0, %1\t%@ int"; ++ case 9: ++- return "vmsr%?\t P0, %1\t@ movhi"; +++ return "vmsr%?\tp0, %1\t@ movhi"; ++ case 10: ++- return "vmrs%?\t %0, P0\t@ movhi"; +++ return "vmrs%?\t%0, p0\t@ movhi"; ++ default: ++ gcc_unreachable (); ++ } ++@@ -209,9 +209,9 @@ (define_insn "*thumb2_movhi_fp16" ++ case 8: ++ return "vmov%?.f32\t%0, %1\t%@ int"; ++ case 9: ++- return "vmsr%?\t P0, %1\t%@ movhi"; +++ return "vmsr%?\tp0, %1\t%@ movhi"; ++ case 10: ++- return "vmrs%?\t%0, P0\t%@ movhi"; +++ return "vmrs%?\t%0, p0\t%@ movhi"; ++ default: ++ gcc_unreachable (); ++ } ++@@ -312,9 +312,9 @@ (define_insn "*thumb2_movsi_vfp" ++ case 12: case 13: ++ return output_move_vfp (operands); ++ case 14: ++- return \"vmsr\\t P0, %1\"; +++ return \"vmsr\\tp0, %1\"; ++ case 15: ++- return \"vmrs\\t %0, P0\"; +++ return \"vmrs\\t%0, p0\"; ++ case 16: ++ return \"mcr\\tp10, 7, %1, cr1, cr0, 0\\t @SET_FPSCR\"; ++ case 17: ++@@ -2138,7 +2138,7 @@ (define_insn "get_fpscr" ++ (define_insn_and_split "no_literal_pool_df_immediate" ++ [(set (match_operand:DF 0 "s_register_operand" "=w") ++ (match_operand:DF 1 "const_double_operand" "F")) ++- (clobber (match_operand:DF 2 "s_register_operand" "=r"))] +++ (clobber (match_operand:DI 2 "s_register_operand" "=r"))] ++ "arm_disable_literal_pool ++ && TARGET_VFP_BASE ++ && !arm_const_double_rtx (operands[1]) ++@@ -2153,8 +2153,9 @@ (define_insn_and_split "no_literal_pool_df_immediate" ++ unsigned HOST_WIDE_INT ival = zext_hwi (buf[order], 32); ++ ival |= (zext_hwi (buf[1 - order], 32) << 32); ++ rtx cst = gen_int_mode (ival, DImode); ++- emit_move_insn (simplify_gen_subreg (DImode, operands[2], DFmode, 0), cst); ++- emit_move_insn (operands[0], operands[2]); +++ emit_move_insn (operands[2], cst); +++ emit_move_insn (operands[0], +++ simplify_gen_subreg (DFmode, operands[2], DImode, 0)); ++ DONE; ++ } ++ ) ++--- a/src/gcc/config/avr/avr-arch.h +++++ b/src/gcc/config/avr/avr-arch.h ++@@ -195,6 +195,7 @@ typedef struct ++ ++ extern const avr_arch_t avr_arch_types[]; ++ extern const avr_arch_t *avr_arch; +++extern const avr_arch_t *avr_get_parch (const char *mcu); ++ ++ extern const avr_mcu_t avr_mcu_types[]; ++ ++--- a/src/gcc/config/avr/avr-devices.cc +++++ b/src/gcc/config/avr/avr-devices.cc ++@@ -153,4 +153,20 @@ avr_inform_core_architectures (void) ++ free (archs); ++ } ++ +++ +++/* When MCU names a core arch like "avr5", then return a pointer to the +++ respective entry in avr_arch_types[]. Otherwise, return NULL. */ +++ +++const avr_arch_t * +++avr_get_parch (const char *mcu) +++{ +++ for (size_t i = 0; i < ARRAY_SIZE (avr_arch_types); ++i) +++ { +++ if (strcmp (mcu, avr_arch_types[i].name) == 0) +++ return & avr_arch_types[i]; +++ } +++ +++ return NULL; +++} +++ ++ #endif // IN_GEN_AVR_MMCU_TEXI ++--- a/src/gcc/config/avr/avr-dimode.md +++++ b/src/gcc/config/avr/avr-dimode.md ++@@ -455,12 +455,18 @@ (define_expand "conditional_jump" ++ (define_expand "cbranch4" ++ [(set (pc) ++ (if_then_else (match_operator 0 "ordered_comparison_operator" ++- [(match_operand:ALL8 1 "register_operand" "") ++- (match_operand:ALL8 2 "nonmemory_operand" "")]) ++- (label_ref (match_operand 3 "" "")) ++- (pc)))] +++ [(match_operand:ALL8 1 "register_operand") +++ (match_operand:ALL8 2 "nonmemory_operand")]) +++ (label_ref (match_operand 3)) +++ (pc)))] ++ "avr_have_dimode" ++ { +++ int icode = (int) GET_CODE (operands[0]); +++ +++ targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false); +++ operands[0] = gen_rtx_fmt_ee ((enum rtx_code) icode, +++ VOIDmode, operands[1], operands[2]); +++ ++ rtx acc_a = gen_rtx_REG (mode, ACC_A); ++ ++ avr_fix_inputs (operands, 1 << 2, regmask (mode, ACC_A)); ++@@ -490,8 +496,8 @@ (define_insn_and_split "cbranch_2_split" ++ (if_then_else (match_operator 0 "ordered_comparison_operator" ++ [(reg:ALL8 ACC_A) ++ (reg:ALL8 ACC_B)]) ++- (label_ref (match_operand 1 "" "")) ++- (pc)))] +++ (label_ref (match_operand 1)) +++ (pc)))] ++ "avr_have_dimode" ++ "#" ++ "&& reload_completed" ++@@ -544,8 +550,8 @@ (define_insn_and_split "cbranch_const_2_split" ++ (if_then_else (match_operator 0 "ordered_comparison_operator" ++ [(reg:ALL8 ACC_A) ++ (match_operand:ALL8 1 "const_operand" "n Ynn")]) ++- (label_ref (match_operand 2 "" "")) ++- (pc))) +++ (label_ref (match_operand 2 "" "")) +++ (pc))) ++ (clobber (match_scratch:QI 3 "=&d"))] ++ "avr_have_dimode ++ && !s8_operand (operands[1], VOIDmode)" ++--- a/src/gcc/config/avr/avr-passes.def +++++ b/src/gcc/config/avr/avr-passes.def ++@@ -43,3 +43,23 @@ INSERT_PASS_BEFORE (pass_free_cfg, 1, avr_pass_recompute_notes); ++ insns withaout any insns in between. */ ++ ++ INSERT_PASS_AFTER (pass_expand, 1, avr_pass_casesi); +++ +++/* If-else decision trees generated for switch / case may produce sequences +++ like +++ +++ SREG = compare (reg, val); +++ if (SREG == 0) goto label1; +++ SREG = compare (reg, 1 + val); +++ if (SREG >= 0) goto label2; +++ +++ which can be optimized to +++ +++ SREG = compare (reg, val); +++ if (SREG == 0) goto label1; +++ if (SREG >= 0) goto label2; +++ +++ The optimal place for such a pass would be directly after expand, but +++ it's not possible for a jump insn to target more than one code label. +++ Hence, run a mini pass right before split2 which introduces REG_CC. */ +++ +++INSERT_PASS_BEFORE (pass_split_after_reload, 1, avr_pass_ifelse); ++--- a/src/gcc/config/avr/avr-protos.h +++++ b/src/gcc/config/avr/avr-protos.h ++@@ -58,6 +58,8 @@ extern const char *ret_cond_branch (rtx x, int len, int reverse); ++ extern const char *avr_out_movpsi (rtx_insn *, rtx*, int*); ++ extern const char *avr_out_sign_extend (rtx_insn *, rtx*, int*); ++ extern const char *avr_out_insert_notbit (rtx_insn *, rtx*, rtx, int*); +++extern const char *avr_out_plus_set_ZN (rtx*, int*); +++extern const char *avr_out_cmp_ext (rtx*, enum rtx_code, int*); ++ ++ extern const char *ashlqi3_out (rtx_insn *insn, rtx operands[], int *len); ++ extern const char *ashlhi3_out (rtx_insn *insn, rtx operands[], int *len); ++@@ -112,8 +114,6 @@ extern int jump_over_one_insn_p (rtx_insn *insn, rtx dest); ++ ++ extern void avr_final_prescan_insn (rtx_insn *insn, rtx *operand, ++ int num_operands); ++-extern int avr_simplify_comparison_p (machine_mode mode, ++- RTX_CODE op, rtx x); ++ extern RTX_CODE avr_normalize_condition (RTX_CODE condition); ++ extern void out_shift_with_cnt (const char *templ, rtx_insn *insn, ++ rtx operands[], int *len, int t_len); ++@@ -145,6 +145,7 @@ extern rtx tmp_reg_rtx; ++ extern rtx zero_reg_rtx; ++ extern rtx all_regs_rtx[32]; ++ extern rtx rampz_rtx; +++extern rtx cc_reg_rtx; ++ ++ #endif /* RTX_CODE */ ++ ++@@ -160,6 +161,7 @@ class rtl_opt_pass; ++ extern rtl_opt_pass *make_avr_pass_pre_proep (gcc::context *); ++ extern rtl_opt_pass *make_avr_pass_recompute_notes (gcc::context *); ++ extern rtl_opt_pass *make_avr_pass_casesi (gcc::context *); +++extern rtl_opt_pass *make_avr_pass_ifelse (gcc::context *); ++ ++ /* From avr-log.cc */ ++ ++--- a/src/gcc/config/avr/avr.cc +++++ b/src/gcc/config/avr/avr.cc ++@@ -359,6 +359,41 @@ public: ++ } ++ }; // avr_pass_casesi ++ +++ +++static const pass_data avr_pass_data_ifelse = +++{ +++ RTL_PASS, // type +++ "", // name (will be patched) +++ OPTGROUP_NONE, // optinfo_flags +++ TV_DF_SCAN, // tv_id +++ 0, // properties_required +++ 0, // properties_provided +++ 0, // properties_destroyed +++ 0, // todo_flags_start +++ TODO_df_finish | TODO_df_verify // todo_flags_finish +++}; +++ +++class avr_pass_ifelse : public rtl_opt_pass +++{ +++public: +++ avr_pass_ifelse (gcc::context *ctxt, const char *name) +++ : rtl_opt_pass (avr_pass_data_ifelse, ctxt) +++ { +++ this->name = name; +++ } +++ +++ void avr_rest_of_handle_ifelse (function*); +++ +++ virtual bool gate (function*) { return optimize > 0; } +++ +++ virtual unsigned int execute (function *func) +++ { +++ avr_rest_of_handle_ifelse (func); +++ +++ return 0; +++ } +++}; // avr_pass_ifelse +++ ++ } // anon namespace ++ ++ rtl_opt_pass* ++@@ -373,6 +408,12 @@ make_avr_pass_casesi (gcc::context *ctxt) ++ return new avr_pass_casesi (ctxt, "avr-casesi"); ++ } ++ +++rtl_opt_pass* +++make_avr_pass_ifelse (gcc::context *ctxt) +++{ +++ return new avr_pass_ifelse (ctxt, "avr-ifelse"); +++} +++ ++ ++ /* Make one parallel insn with all the patterns from insns i[0]..i[5]. */ ++ ++@@ -686,6 +727,304 @@ avr_pass_casesi::avr_rest_of_handle_casesi (function *func) ++ } ++ ++ +++/* A helper for the next method. Suppose we have two conditional branches +++ +++ if (reg xval1) goto label1; +++ if (reg xval2) goto label2; +++ +++ If the second comparison is redundant and there is a code such +++ that the sequence can be performed as +++ +++ REG_CC = compare (reg, xval1); +++ if (REG_CC 0) goto label1; +++ if (REG_CC 0) goto label2; +++ +++ then return . Otherwise, return UNKNOWN. +++ xval1 and xval2 are CONST_INT, and mode is the scalar int mode in which +++ the comparison will be carried out. reverse_cond1 can be set to reverse +++ condition cond1. This is useful if the second comparison does not follow +++ the first one, but is located after label1 like in: +++ +++ if (reg xval1) goto label1; +++ ... +++ label1: +++ if (reg xval2) goto label2; */ +++ +++static enum rtx_code +++avr_redundant_compare (enum rtx_code cond1, rtx xval1, +++ enum rtx_code cond2, rtx xval2, +++ machine_mode mode, bool reverse_cond1) +++{ +++ HOST_WIDE_INT ival1 = INTVAL (xval1); +++ HOST_WIDE_INT ival2 = INTVAL (xval2); +++ +++ unsigned HOST_WIDE_INT mask = GET_MODE_MASK (mode); +++ unsigned HOST_WIDE_INT uval1 = mask & UINTVAL (xval1); +++ unsigned HOST_WIDE_INT uval2 = mask & UINTVAL (xval2); +++ +++ if (reverse_cond1) +++ cond1 = reverse_condition (cond1); +++ +++ if (cond1 == EQ) +++ { +++ //////////////////////////////////////////////// +++ // A sequence like +++ // if (reg == val) goto label1; +++ // if (reg > val) goto label2; +++ // can be re-written using the same, simple comparison like in: +++ // REG_CC = compare (reg, val) +++ // if (REG_CC == 0) goto label1; +++ // if (REG_CC >= 0) goto label2; +++ if (ival1 == ival2 +++ && (cond2 == GT || cond2 == GTU)) +++ return avr_normalize_condition (cond2); +++ +++ // Similar, but the input sequence is like +++ // if (reg == val) goto label1; +++ // if (reg >= val) goto label2; +++ if (ival1 == ival2 +++ && (cond2 == GE || cond2 == GEU)) +++ return cond2; +++ +++ // Similar, but the input sequence is like +++ // if (reg == val) goto label1; +++ // if (reg >= val + 1) goto label2; +++ if ((cond2 == GE && ival2 == 1 + ival1) +++ || (cond2 == GEU && uval2 == 1 + uval1)) +++ return cond2; +++ +++ // Similar, but the input sequence is like +++ // if (reg == val) goto label1; +++ // if (reg > val - 1) goto label2; +++ if ((cond2 == GT && ival2 == ival1 - 1) +++ || (cond2 == GTU && uval2 == uval1 - 1)) +++ return avr_normalize_condition (cond2); +++ +++ ///////////////////////////////////////////////////////// +++ // A sequence like +++ // if (reg == val) goto label1; +++ // if (reg < 1 + val) goto label2; +++ // can be re-written as +++ // REG_CC = compare (reg, val) +++ // if (REG_CC == 0) goto label1; +++ // if (REG_CC < 0) goto label2; +++ if ((cond2 == LT && ival2 == 1 + ival1) +++ || (cond2 == LTU && uval2 == 1 + uval1)) +++ return cond2; +++ +++ // Similar, but with an input sequence like +++ // if (reg == val) goto label1; +++ // if (reg <= val) goto label2; +++ if (ival1 == ival2 +++ && (cond2 == LE || cond2 == LEU)) +++ return avr_normalize_condition (cond2); +++ +++ // Similar, but with an input sequence like +++ // if (reg == val) goto label1; +++ // if (reg < val) goto label2; +++ if (ival1 == ival2 +++ && (cond2 == LT || cond2 == LTU)) +++ return cond2; +++ +++ // Similar, but with an input sequence like +++ // if (reg == val) goto label1; +++ // if (reg <= val - 1) goto label2; +++ if ((cond2 == LE && ival2 == ival1 - 1) +++ || (cond2 == LEU && uval2 == uval1 - 1)) +++ return avr_normalize_condition (cond2); +++ +++ } // cond1 == EQ +++ +++ return UNKNOWN; +++} +++ +++ +++/* If-else decision trees generated for switch / case may produce sequences +++ like +++ +++ SREG = compare (reg, val); +++ if (SREG == 0) goto label1; +++ SREG = compare (reg, 1 + val); +++ if (SREG >= 0) goto label2; +++ +++ which can be optimized to +++ +++ SREG = compare (reg, val); +++ if (SREG == 0) goto label1; +++ if (SREG >= 0) goto label2; +++ +++ The optimal place for such a pass would be directly after expand, but +++ it's not possible for a jump insn to target more than one code label. +++ Hence, run a mini pass right before split2 which introduces REG_CC. */ +++ +++void +++avr_pass_ifelse::avr_rest_of_handle_ifelse (function*) +++{ +++ rtx_insn *next_insn; +++ +++ for (rtx_insn *insn = get_insns(); insn; insn = next_insn) +++ { +++ next_insn = next_nonnote_nondebug_insn (insn); +++ +++ if (! next_insn) +++ break; +++ +++ // Search for two cbranch insns. The first one is a cbranch. +++ // Filter for "cbranch4_insn" with mode in QI, HI, PSI, SI. +++ +++ if (! JUMP_P (insn)) +++ continue; +++ +++ int icode1 = recog_memoized (insn); +++ +++ if (icode1 != CODE_FOR_cbranchqi4_insn +++ && icode1 != CODE_FOR_cbranchhi4_insn +++ && icode1 != CODE_FOR_cbranchpsi4_insn +++ && icode1 != CODE_FOR_cbranchsi4_insn) +++ continue; +++ +++ rtx_jump_insn *insn1 = as_a (insn); +++ rtx_jump_insn *insn2 = nullptr; +++ bool follow_label1 = false; +++ +++ // Extract the operands of the first insn: +++ // $0 = comparison operator ($1, $2) +++ // $1 = reg +++ // $2 = reg or const_int +++ // $3 = code_label +++ // $4 = optional SCRATCH for HI, PSI, SI cases. +++ +++ const auto &op = recog_data.operand; +++ +++ extract_insn (insn1); +++ rtx xop1[5] = { op[0], op[1], op[2], op[3], op[4] }; +++ int n_operands = recog_data.n_operands; +++ +++ // For now, we can optimize cbranches that follow an EQ cbranch, +++ // and cbranches that follow the label of a NE cbranch. +++ +++ if (GET_CODE (xop1[0]) == EQ +++ && JUMP_P (next_insn) +++ && recog_memoized (next_insn) == icode1) +++ { +++ // The 2nd cbranch insn follows insn1, i.e. is located in the +++ // fallthrough path of insn1. +++ +++ insn2 = as_a (next_insn); +++ } +++ else if (GET_CODE (xop1[0]) == NE) +++ { +++ // insn1 might branch to a label followed by a cbranch. +++ +++ rtx target1 = JUMP_LABEL (insn1); +++ rtx_insn *code_label1 = JUMP_LABEL_AS_INSN (insn1); +++ rtx_insn *next = next_nonnote_nondebug_insn (code_label1); +++ rtx_insn *barrier = prev_nonnote_nondebug_insn (code_label1); +++ +++ if (// Target label of insn1 is used exactly once and +++ // is not a fallthru, i.e. is preceded by a barrier. +++ LABEL_NUSES (target1) == 1 +++ && barrier +++ && BARRIER_P (barrier) +++ // Following the target label is a cbranch of the same kind. +++ && next +++ && JUMP_P (next) +++ && recog_memoized (next) == icode1) +++ { +++ follow_label1 = true; +++ insn2 = as_a (next); +++ } +++ } +++ +++ if (! insn2) +++ continue; +++ +++ // Also extract operands of insn2, and filter for REG + CONST_INT +++ // comparsons against the same register. +++ +++ extract_insn (insn2); +++ rtx xop2[5] = { op[0], op[1], op[2], op[3], op[4] }; +++ +++ if (! rtx_equal_p (xop1[1], xop2[1]) +++ || ! CONST_INT_P (xop1[2]) +++ || ! CONST_INT_P (xop2[2])) +++ continue; +++ +++ machine_mode mode = GET_MODE (xop1[1]); +++ enum rtx_code code1 = GET_CODE (xop1[0]); +++ enum rtx_code code2 = GET_CODE (xop2[0]); +++ +++ code2 = avr_redundant_compare (code1, xop1[2], code2, xop2[2], +++ mode, follow_label1); +++ if (code2 == UNKNOWN) +++ continue; +++ +++ ////////////////////////////////////////////////////// +++ // Found a replacement. +++ +++ if (dump_file) +++ { +++ fprintf (dump_file, "\n;; Found chain of jump_insn %d and" +++ " jump_insn %d, follow_label1=%d:\n", +++ INSN_UID (insn1), INSN_UID (insn2), follow_label1); +++ print_rtl_single (dump_file, PATTERN (insn1)); +++ print_rtl_single (dump_file, PATTERN (insn2)); +++ } +++ +++ if (! follow_label1) +++ next_insn = next_nonnote_nondebug_insn (insn2); +++ +++ // Pop the new branch conditions and the new comparison. +++ // Prematurely split into compare + branch so that we can drop +++ // the 2nd comparison. The following pass, split2, splits all +++ // insns for REG_CC, and it should still work as usual even when +++ // there are already some REG_CC insns around. +++ +++ rtx xcond1 = gen_rtx_fmt_ee (code1, VOIDmode, cc_reg_rtx, const0_rtx); +++ rtx xcond2 = gen_rtx_fmt_ee (code2, VOIDmode, cc_reg_rtx, const0_rtx); +++ rtx xpat1 = gen_branch (xop1[3], xcond1); +++ rtx xpat2 = gen_branch (xop2[3], xcond2); +++ rtx xcompare = NULL_RTX; +++ +++ if (mode == QImode) +++ { +++ gcc_assert (n_operands == 4); +++ xcompare = gen_cmpqi3 (xop1[1], xop1[2]); +++ } +++ else +++ { +++ gcc_assert (n_operands == 5); +++ rtx (*gen_cmp)(rtx,rtx,rtx) +++ = mode == HImode ? gen_gen_comparehi +++ : mode == PSImode ? gen_gen_comparepsi +++ : gen_gen_comparesi; // SImode +++ xcompare = gen_cmp (xop1[1], xop1[2], xop1[4]); +++ } +++ +++ // Emit that stuff. +++ +++ rtx_insn *cmp = emit_insn_before (xcompare, insn1); +++ rtx_jump_insn *branch1 = emit_jump_insn_before (xpat1, insn1); +++ rtx_jump_insn *branch2 = emit_jump_insn_before (xpat2, insn2); +++ +++ JUMP_LABEL (branch1) = xop1[3]; +++ JUMP_LABEL (branch2) = xop2[3]; +++ // delete_insn() decrements LABEL_NUSES when deleting a JUMP_INSN, but +++ // when we pop a new JUMP_INSN, do it by hand. +++ ++LABEL_NUSES (xop1[3]); +++ ++LABEL_NUSES (xop2[3]); +++ +++ delete_insn (insn1); +++ delete_insn (insn2); +++ +++ // As a side effect, also recog the new insns. +++ gcc_assert (valid_insn_p (cmp)); +++ gcc_assert (valid_insn_p (branch1)); +++ gcc_assert (valid_insn_p (branch2)); +++ } // loop insns +++} +++ +++ ++ /* Set `avr_arch' as specified by `-mmcu='. ++ Return true on success. */ ++ ++@@ -1019,6 +1358,19 @@ avr_no_gccisr_function_p (tree func) ++ return avr_lookup_function_attribute1 (func, "no_gccisr"); ++ } ++ +++ +++/* Implement `TARGET_CAN_INLINE_P'. */ +++/* Some options like -mgas_isr_prologues depend on optimization level, +++ and the inliner might think that due to different options, inlining +++ is not permitted; see PR104327. */ +++ +++static bool +++avr_can_inline_p (tree /* caller */, tree /* callee */) +++{ +++ // No restrictions whatsoever. +++ return true; +++} +++ ++ /* Implement `TARGET_SET_CURRENT_FUNCTION'. */ ++ /* Sanity cheching for above function attributes. */ ++ ++@@ -3173,28 +3525,6 @@ avr_asm_final_postscan_insn (FILE *stream, rtx_insn *insn, rtx*, int) ++ } ++ ++ ++-/* Return 0 if undefined, 1 if always true or always false. */ ++- ++-int ++-avr_simplify_comparison_p (machine_mode mode, RTX_CODE op, rtx x) ++-{ ++- unsigned int max = (mode == QImode ? 0xff : ++- mode == HImode ? 0xffff : ++- mode == PSImode ? 0xffffff : ++- mode == SImode ? 0xffffffff : 0); ++- if (max && op && CONST_INT_P (x)) ++- { ++- if (unsigned_condition (op) != op) ++- max >>= 1; ++- ++- if (max != (INTVAL (x) & max) ++- && INTVAL (x) != 0xff) ++- return 1; ++- } ++- return 0; ++-} ++- ++- ++ /* Worker function for `FUNCTION_ARG_REGNO_P'. */ ++ /* Returns nonzero if REGNO is the number of a hard ++ register in which function arguments are sometimes passed. */ ++@@ -5677,29 +6007,36 @@ avr_frame_pointer_required_p (void) ++ || get_frame_size () > 0); ++ } ++ ++-/* Returns the condition of compare insn INSN, or UNKNOWN. */ +++ +++/* Returns the condition of the branch following INSN, where INSN is some +++ comparison. If the next insn is not a branch or the condition code set +++ by INSN might be used by more insns than the next one, return UNKNOWN. +++ For now, just look at the next insn, which misses some opportunities like +++ following jumps. */ ++ ++ static RTX_CODE ++ compare_condition (rtx_insn *insn) ++ { ++- rtx_insn *next = next_real_insn (insn); +++ rtx set; +++ rtx_insn *next = next_real_nondebug_insn (insn); ++ ++- if (next && JUMP_P (next)) +++ if (next +++ && JUMP_P (next) +++ // If SREG does not die in the next insn, it is used in more than one +++ // branch. This can happen due to pass .avr-ifelse optimizations. +++ && dead_or_set_regno_p (next, REG_CC) +++ // Branches are (set (pc) (if_then_else (COND (...)))). +++ && (set = single_set (next)) +++ && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) ++ { ++- rtx pat = PATTERN (next); ++- if (GET_CODE (pat) == PARALLEL) ++- pat = XVECEXP (pat, 0, 0); ++- rtx src = SET_SRC (pat); ++- ++- if (IF_THEN_ELSE == GET_CODE (src)) ++- return GET_CODE (XEXP (src, 0)); +++ return GET_CODE (XEXP (SET_SRC (set), 0)); ++ } ++ ++ return UNKNOWN; ++ } ++ ++ ++-/* Returns true iff INSN is a tst insn that only tests the sign. */ +++/* Returns true if INSN is a tst insn that only tests the sign. */ ++ ++ static bool ++ compare_sign_p (rtx_insn *insn) ++@@ -5709,23 +6046,95 @@ compare_sign_p (rtx_insn *insn) ++ } ++ ++ ++-/* Returns true iff the next insn is a JUMP_INSN with a condition ++- that needs to be swapped (GT, GTU, LE, LEU). */ +++/* Returns true if INSN is a compare insn with the EQ or NE condition. */ ++ ++ static bool ++-compare_diff_p (rtx_insn *insn) +++compare_eq_p (rtx_insn *insn) ++ { ++ RTX_CODE cond = compare_condition (insn); ++- return (cond == GT || cond == GTU || cond == LE || cond == LEU) ? cond : 0; +++ return (cond == EQ || cond == NE); ++ } ++ ++-/* Returns true iff INSN is a compare insn with the EQ or NE condition. */ ++ ++-static bool ++-compare_eq_p (rtx_insn *insn) +++/* Implement `TARGET_CANONICALIZE_COMPARISON'. */ +++/* Basically tries to convert "difficult" comparisons like GT[U] +++ and LE[U] to simple ones. Some asymmetric comparisons can be +++ transformed to EQ or NE against zero. */ +++ +++static void +++avr_canonicalize_comparison (int *icode, rtx *op0, rtx *op1, bool op0_fixed) ++ { ++- RTX_CODE cond = compare_condition (insn); ++- return (cond == EQ || cond == NE); +++ enum rtx_code code = (enum rtx_code) *icode; +++ machine_mode mode = GET_MODE (*op0); +++ +++ bool signed_p = code == GT || code == LE; +++ bool unsigned_p = code == GTU || code == LEU; +++ bool difficult_p = signed_p || unsigned_p; +++ +++ if (// Only do integers and fixed-points. +++ (! SCALAR_INT_MODE_P (mode) +++ && ! ALL_SCALAR_FIXED_POINT_MODE_P (mode)) +++ // Only do comparisons against a register. +++ || ! register_operand (*op0, mode)) +++ return; +++ +++ // Canonicalize "difficult" reg-reg comparisons. +++ +++ if (! op0_fixed +++ && difficult_p +++ && register_operand (*op1, mode)) +++ { +++ std::swap (*op0, *op1); +++ *icode = (int) swap_condition (code); +++ return; +++ } +++ +++ // Canonicalize comparisons against compile-time constants. +++ +++ if (CONST_INT_P (*op1) +++ || CONST_FIXED_P (*op1)) +++ { +++ // INT_MODE of the same size. +++ scalar_int_mode imode = int_mode_for_mode (mode).require (); +++ +++ unsigned HOST_WIDE_INT mask = GET_MODE_MASK (imode); +++ unsigned HOST_WIDE_INT maxval = signed_p ? mask >> 1 : mask; +++ +++ // Convert value *op1 to imode. +++ rtx xval = simplify_gen_subreg (imode, *op1, mode, 0); +++ +++ // Canonicalize difficult comparisons against const. +++ if (difficult_p +++ && (UINTVAL (xval) & mask) != maxval) +++ { +++ // Convert *op0 > *op1 to *op0 >= 1 + *op1. +++ // Convert *op0 <= *op1 to *op0 < 1 + *op1. +++ xval = simplify_binary_operation (PLUS, imode, xval, const1_rtx); +++ +++ // Convert value back to its original mode. +++ *op1 = simplify_gen_subreg (mode, xval, imode, 0); +++ +++ // Map > to >= and <= to <. +++ *icode = (int) avr_normalize_condition (code); +++ +++ return; +++ } +++ +++ // Some asymmetric comparisons can be turned into EQ or NE. +++ if (code == LTU && xval == const1_rtx) +++ { +++ *icode = (int) EQ; +++ *op1 = CONST0_RTX (mode); +++ return; +++ } +++ +++ if (code == GEU && xval == const1_rtx) +++ { +++ *icode = (int) NE; +++ *op1 = CONST0_RTX (mode); +++ return; +++ } +++ } ++ } ++ ++ ++@@ -6018,6 +6427,68 @@ avr_out_tstsi (rtx_insn *insn, rtx *op, int *plen) ++ } ++ ++ +++/* Output a comparison of a zero- or sign-extended register against a +++ plain register. CODE is SIGN_EXTEND or ZERO_EXTEND. Return "". +++ +++ PLEN != 0: Set *PLEN to the code length in words. Don't output anything. +++ PLEN == 0: Print instructions. */ +++ +++const char* +++avr_out_cmp_ext (rtx xop[], enum rtx_code code, int *plen) +++{ +++ // The smaller reg is the one that's to be extended. Get its index as z. +++ int z = GET_MODE_SIZE (GET_MODE (xop[1])) < GET_MODE_SIZE (GET_MODE (xop[0])); +++ rtx zreg = xop[z]; +++ rtx reg = xop[1 - z]; +++ machine_mode mode = GET_MODE (reg); +++ machine_mode zmode = GET_MODE (zreg); +++ rtx zex; +++ +++ if (plen) +++ *plen = 0; +++ +++ // zex holds the extended bytes above zreg. This is 0 for ZERO_EXTEND, +++ // and 0 or -1 for SIGN_EXTEND. +++ +++ if (code == SIGN_EXTEND) +++ { +++ // Sign-extend the high-byte of zreg to tmp_reg. +++ int zmsb = GET_MODE_SIZE (zmode) - 1; +++ rtx xzmsb = simplify_gen_subreg (QImode, zreg, zmode, zmsb); +++ +++ avr_asm_len ("mov __tmp_reg__,%0" CR_TAB +++ "rol __tmp_reg__" CR_TAB +++ "sbc __tmp_reg__,__tmp_reg__", &xzmsb, plen, 3); +++ zex = tmp_reg_rtx; +++ } +++ else if (code == ZERO_EXTEND) +++ { +++ zex = zero_reg_rtx; +++ } +++ else +++ gcc_unreachable(); +++ +++ // Now output n_bytes bytes of the very comparison. +++ +++ int n_bytes = GET_MODE_SIZE (mode); +++ +++ avr_asm_len ("cp %0,%1", xop, plen, 1); +++ +++ for (int b = 1; b < n_bytes; ++b) +++ { +++ rtx regs[2]; +++ regs[1 - z] = simplify_gen_subreg (QImode, reg, mode, b); +++ regs[z] = (b < GET_MODE_SIZE (zmode) +++ ? simplify_gen_subreg (QImode, zreg, zmode, b) +++ : zex); +++ +++ avr_asm_len ("cpc %0,%1", regs, plen, 1); +++ } +++ +++ return ""; +++} +++ +++ ++ /* Generate asm equivalent for various shifts. This only handles cases ++ that are not already carefully hand-optimized in ?sh??i3_out. ++ ++@@ -8160,6 +8631,122 @@ avr_out_plus (rtx insn, rtx *xop, int *plen, int *pcc, bool out_label) ++ } ++ ++ +++/* Output an instruction sequence for addition of REG in XOP[0] and CONST_INT +++ in XOP[1] in such a way that SREG.Z and SREG.N are set according to the +++ result. XOP[2] might be a d-regs clobber register. If XOP[2] is SCRATCH, +++ then the addition can be performed without a clobber reg. Return "". +++ +++ If PLEN == NULL, then output the instructions. +++ If PLEN != NULL, then set *PLEN to the length of the sequence in words. */ +++ +++const char* +++avr_out_plus_set_ZN (rtx *xop, int *plen) +++{ +++ if (plen) +++ *plen = 0; +++ +++ // Register to compare and value to compare against. +++ rtx xreg = xop[0]; +++ rtx xval = xop[1]; +++ +++ machine_mode mode = GET_MODE (xreg); +++ +++ // Number of bytes to operate on. +++ int n_bytes = GET_MODE_SIZE (mode); +++ +++ if (n_bytes == 1) +++ { +++ if (INTVAL (xval) == 1) +++ return avr_asm_len ("inc %0", xop, plen, 1); +++ +++ if (INTVAL (xval) == -1) +++ return avr_asm_len ("dec %0", xop, plen, 1); +++ } +++ +++ if (n_bytes == 2 +++ && test_hard_reg_class (ADDW_REGS, xreg) +++ && IN_RANGE (INTVAL (xval), 1, 63)) +++ { +++ // Add 16-bit value in [1..63] to a w register. +++ return avr_asm_len ("adiw %0, %1", xop, plen, 1); +++ } +++ +++ // Addition won't work; subtract the negative of XVAL instead. +++ xval = simplify_unary_operation (NEG, mode, xval, mode); +++ +++ // Value (0..0xff) held in clobber register xop[2] or -1 if unknown. +++ int clobber_val = -1; +++ +++ // [0] = Current sub-register. +++ // [1] = Current partial xval. +++ // [2] = 8-bit clobber d-register or SCRATCH. +++ rtx op[3]; +++ op[2] = xop[2]; +++ +++ // Work byte-wise from LSB to MSB. The lower two bytes might be +++ // SBIW'ed in one go. +++ for (int i = 0; i < n_bytes; ++i) +++ { +++ op[0] = simplify_gen_subreg (QImode, xreg, mode, i); +++ +++ if (i == 0 +++ && n_bytes >= 2 +++ && test_hard_reg_class (ADDW_REGS, op[0])) +++ { +++ op[1] = simplify_gen_subreg (HImode, xval, mode, 0); +++ if (IN_RANGE (INTVAL (op[1]), 0, 63)) +++ { +++ // SBIW can handle the lower 16 bits. +++ avr_asm_len ("sbiw %0, %1", op, plen, 1); +++ +++ // Next byte has already been handled: Skip it. +++ ++i; +++ continue; +++ } +++ } +++ +++ op[1] = simplify_gen_subreg (QImode, xval, mode, i); +++ +++ if (test_hard_reg_class (LD_REGS, op[0])) +++ { +++ // d-regs can subtract immediates. +++ avr_asm_len (i == 0 +++ ? "subi %0, %1" +++ : "sbci %0, %1", op, plen, 1); +++ } +++ else +++ { +++ int val8 = 0xff & INTVAL (op[1]); +++ if (val8 == 0) +++ { +++ // Any register can subtract 0. +++ avr_asm_len (i == 0 +++ ? "sub %0, __zero_reg__" +++ : "sbc %0, __zero_reg__", op, plen, 1); +++ } +++ else +++ { +++ // Use d-register to hold partial xval. +++ +++ if (val8 != clobber_val) +++ { +++ // Load partial xval to QI clobber reg and memoize for later. +++ gcc_assert (REG_P (op[2])); +++ avr_asm_len ("ldi %2, %1", op, plen, 1); +++ clobber_val = val8; +++ } +++ +++ avr_asm_len (i == 0 +++ ? "sub %0, %2" +++ : "sbc %0, %2", op, plen, 1); +++ } +++ } +++ } // Loop bytes. +++ +++ return ""; +++} +++ +++ ++ /* Output bit operation (IOR, AND, XOR) with register XOP[0] and compile ++ time constant XOP[2]: ++ ++@@ -9291,6 +9878,8 @@ avr_adjust_insn_length (rtx_insn *insn, int len) ++ case ADJUST_LEN_TSTSI: avr_out_tstsi (insn, op, &len); break; ++ case ADJUST_LEN_COMPARE: avr_out_compare (insn, op, &len); break; ++ case ADJUST_LEN_COMPARE64: avr_out_compare64 (insn, op, &len); break; +++ case ADJUST_LEN_CMP_UEXT: avr_out_cmp_ext (op, ZERO_EXTEND, &len); break; +++ case ADJUST_LEN_CMP_SEXT: avr_out_cmp_ext (op, SIGN_EXTEND, &len); break; ++ ++ case ADJUST_LEN_LSHRQI: lshrqi3_out (insn, op, &len); break; ++ case ADJUST_LEN_LSHRHI: lshrhi3_out (insn, op, &len); break; ++@@ -9311,6 +9900,7 @@ avr_adjust_insn_length (rtx_insn *insn, int len) ++ case ADJUST_LEN_CALL: len = AVR_HAVE_JMP_CALL ? 2 : 1; break; ++ ++ case ADJUST_LEN_INSERT_BITS: avr_out_insert_bits (op, &len); break; +++ case ADJUST_LEN_ADD_SET_ZN: avr_out_plus_set_ZN (op, &len); break; ++ ++ case ADJUST_LEN_INSV_NOTBIT: ++ avr_out_insert_notbit (insn, op, NULL_RTX, &len); ++@@ -9640,6 +10230,10 @@ avr_handle_addr_attribute (tree *node, tree name, tree args, ++ int flags ATTRIBUTE_UNUSED, bool *no_add) ++ { ++ bool io_p = startswith (IDENTIFIER_POINTER (name), "io"); +++ HOST_WIDE_INT io_start = avr_arch->sfr_offset; +++ HOST_WIDE_INT io_end = strcmp (IDENTIFIER_POINTER (name), "io_low") == 0 +++ ? io_start + 0x1f +++ : io_start + 0x3f; ++ location_t loc = DECL_SOURCE_LOCATION (*node); ++ ++ if (!VAR_P (*node)) ++@@ -9663,12 +10257,10 @@ avr_handle_addr_attribute (tree *node, tree name, tree args, ++ } ++ else if (io_p ++ && (!tree_fits_shwi_p (arg) ++- || !(strcmp (IDENTIFIER_POINTER (name), "io_low") == 0 ++- ? low_io_address_operand : io_address_operand) ++- (GEN_INT (TREE_INT_CST_LOW (arg)), QImode))) +++ || ! IN_RANGE (TREE_INT_CST_LOW (arg), io_start, io_end))) ++ { ++- warning_at (loc, OPT_Wattributes, "%qE attribute address " ++- "out of range", name); +++ warning_at (loc, OPT_Wattributes, "%qE attribute address out of range" +++ " 0x%x%s0x%x", name, (int) io_start, "...", (int) io_end); ++ *no_add = true; ++ } ++ else ++@@ -9694,6 +10286,12 @@ avr_handle_addr_attribute (tree *node, tree name, tree args, ++ warning_at (loc, OPT_Wattributes, "%qE attribute on non-volatile variable", ++ name); ++ +++ // Optimizers must not draw any conclusions from "static int addr;" etc. +++ // because the contents of `addr' are not given by its initializer but +++ // by the contents at the address as specified by the attribute. +++ if (VAR_P (*node) && ! *no_add) +++ TREE_THIS_VOLATILE (*node) = 1; +++ ++ return NULL_TREE; ++ } ++ ++@@ -9711,7 +10309,6 @@ avr_eval_addr_attrib (rtx x) ++ attr = lookup_attribute ("io", DECL_ATTRIBUTES (decl)); ++ if (!attr || !TREE_VALUE (attr)) ++ attr = lookup_attribute ("io_low", DECL_ATTRIBUTES (decl)); ++- gcc_assert (attr); ++ } ++ if (!attr || !TREE_VALUE (attr)) ++ attr = lookup_attribute ("address", DECL_ATTRIBUTES (decl)); ++@@ -9958,6 +10555,17 @@ avr_pgm_check_var_decl (tree node) ++ static void ++ avr_insert_attributes (tree node, tree *attributes) ++ { +++ if (VAR_P (node) +++ && ! TREE_STATIC (node) +++ && ! DECL_EXTERNAL (node)) +++ { +++ const char *names[] = { "io", "io_low", "address", NULL }; +++ for (const char **p = names; *p; ++p) +++ if (lookup_attribute (*p, *attributes)) +++ error ("variable %q+D with attribute %qs must be located in " +++ "static storage", node, *p); +++ } +++ ++ avr_pgm_check_var_decl (node); ++ ++ if (TARGET_MAIN_IS_OS_TASK ++@@ -10018,37 +10626,11 @@ avr_insert_attributes (tree node, tree *attributes) ++ /* Track need of __do_clear_bss. */ ++ ++ void ++-avr_asm_output_aligned_decl_common (FILE * stream, ++- tree decl, ++- const char *name, ++- unsigned HOST_WIDE_INT size, ++- unsigned int align, bool local_p) +++avr_asm_output_aligned_decl_common (FILE *stream, tree /* decl */, +++ const char *name, +++ unsigned HOST_WIDE_INT size, +++ unsigned int align, bool local_p) ++ { ++- rtx mem = decl == NULL_TREE ? NULL_RTX : DECL_RTL (decl); ++- rtx symbol; ++- ++- if (mem != NULL_RTX && MEM_P (mem) ++- && SYMBOL_REF_P ((symbol = XEXP (mem, 0))) ++- && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS))) ++- { ++- if (!local_p) ++- { ++- fprintf (stream, "\t.globl\t"); ++- assemble_name (stream, name); ++- fprintf (stream, "\n"); ++- } ++- if (SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS) ++- { ++- assemble_name (stream, name); ++- fprintf (stream, " = %ld\n", ++- (long) INTVAL (avr_eval_addr_attrib (symbol))); ++- } ++- else if (local_p) ++- error_at (DECL_SOURCE_LOCATION (decl), ++- "static IO declaration for %q+D needs an address", decl); ++- return; ++- } ++- ++ /* __gnu_lto_slim is just a marker for the linker injected by toplev.cc. ++ There is no need to trigger __do_clear_bss code for them. */ ++ ++@@ -10061,6 +10643,9 @@ avr_asm_output_aligned_decl_common (FILE * stream, ++ ASM_OUTPUT_ALIGNED_COMMON (stream, name, size, align); ++ } ++ +++ +++/* Implement `ASM_OUTPUT_ALIGNED_BSS'. */ +++ ++ void ++ avr_asm_asm_output_aligned_bss (FILE *file, tree decl, const char *name, ++ unsigned HOST_WIDE_INT size, int align, ++@@ -10068,20 +10653,10 @@ avr_asm_asm_output_aligned_bss (FILE *file, tree decl, const char *name, ++ (FILE *, tree, const char *, ++ unsigned HOST_WIDE_INT, int)) ++ { ++- rtx mem = decl == NULL_TREE ? NULL_RTX : DECL_RTL (decl); ++- rtx symbol; +++ if (!startswith (name, "__gnu_lto")) +++ avr_need_clear_bss_p = true; ++ ++- if (mem != NULL_RTX && MEM_P (mem) ++- && SYMBOL_REF_P ((symbol = XEXP (mem, 0))) ++- && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS))) ++- { ++- if (!(SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS)) ++- error_at (DECL_SOURCE_LOCATION (decl), ++- "IO definition for %q+D needs an address", decl); ++- avr_asm_output_aligned_decl_common (file, decl, name, size, align, false); ++- } ++- else ++- default_func (file, decl, name, size, align); +++ default_func (file, decl, name, size, align); ++ } ++ ++ ++@@ -10120,6 +10695,58 @@ avr_output_progmem_section_asm_op (const char *data) ++ } ++ ++ +++/* A noswitch section callback to output symbol definitions for +++ attributes "io", "io_low" and "address". */ +++ +++static bool +++avr_output_addr_attrib (tree decl, const char *name, +++ unsigned HOST_WIDE_INT /* size */, +++ unsigned HOST_WIDE_INT /* align */) +++{ +++ gcc_assert (DECL_RTL_SET_P (decl)); +++ +++ FILE *stream = asm_out_file; +++ bool local_p = ! DECL_WEAK (decl) && ! TREE_PUBLIC (decl); +++ rtx symbol, mem = DECL_RTL (decl); +++ +++ if (mem != NULL_RTX && MEM_P (mem) +++ && SYMBOL_REF_P ((symbol = XEXP (mem, 0))) +++ && (SYMBOL_REF_FLAGS (symbol) & (SYMBOL_FLAG_IO | SYMBOL_FLAG_ADDRESS))) +++ { +++ if (! local_p) +++ { +++ fprintf (stream, "\t%s\t", DECL_WEAK (decl) ? ".weak" : ".globl"); +++ assemble_name (stream, name); +++ fprintf (stream, "\n"); +++ } +++ +++ if (SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_ADDRESS) +++ { +++ assemble_name (stream, name); +++ fprintf (stream, " = %ld\n", +++ (long) INTVAL (avr_eval_addr_attrib (symbol))); +++ } +++ else if (local_p) +++ { +++ const char *names[] = { "io", "io_low", "address", NULL }; +++ for (const char **p = names; *p; ++p) +++ if (lookup_attribute (*p, DECL_ATTRIBUTES (decl))) +++ { +++ error ("static attribute %qs declaration for %q+D needs an " +++ "address", *p, decl); +++ break; +++ } +++ } +++ +++ return true; +++ } +++ +++ gcc_unreachable(); +++ +++ return false; +++} +++ +++ ++ /* Implement `TARGET_ASM_INIT_SECTIONS'. */ ++ ++ static void ++@@ -10135,6 +10762,7 @@ avr_asm_init_sections (void) ++ readonly_data_section->unnamed.callback = avr_output_data_section_asm_op; ++ data_section->unnamed.callback = avr_output_data_section_asm_op; ++ bss_section->unnamed.callback = avr_output_bss_section_asm_op; +++ tls_comm_section->noswitch.callback = avr_output_addr_attrib; ++ } ++ ++ ++@@ -10311,15 +10939,17 @@ avr_encode_section_info (tree decl, rtx rtl, int new_decl_p) ++ ++ tree io_low_attr = lookup_attribute ("io_low", attr); ++ tree io_attr = lookup_attribute ("io", attr); +++ tree address_attr = lookup_attribute ("address", attr); ++ ++ if (io_low_attr ++ && TREE_VALUE (io_low_attr) && TREE_VALUE (TREE_VALUE (io_low_attr))) ++- addr_attr = io_attr; +++ addr_attr = io_low_attr; ++ else if (io_attr ++ && TREE_VALUE (io_attr) && TREE_VALUE (TREE_VALUE (io_attr))) ++ addr_attr = io_attr; ++ else ++- addr_attr = lookup_attribute ("address", attr); +++ addr_attr = address_attr; +++ ++ if (io_low_attr ++ || (io_attr && addr_attr ++ && low_io_address_operand ++@@ -10334,6 +10964,36 @@ avr_encode_section_info (tree decl, rtx rtl, int new_decl_p) ++ don't use the exact value for constant propagation. */ ++ if (addr_attr && !DECL_EXTERNAL (decl)) ++ SYMBOL_REF_FLAGS (sym) |= SYMBOL_FLAG_ADDRESS; +++ +++ if (io_attr || io_low_attr || address_attr) +++ { +++ if (DECL_INITIAL (decl)) +++ { +++ /* Initializers are not yet parsed in TARGET_INSERT_ATTRIBUTES, +++ hence deny initializers now. The values of symbols with an +++ address attribute are determined by the attribute, not by +++ some initializer. */ +++ +++ error ("variable %q+D with attribute %qs must not have an " +++ "initializer", decl, +++ io_low_attr ? "io_low" : io_attr ? "io" : "address"); +++ } +++ else +++ { +++ /* PR112952: The only way to output a variable declaration in a +++ custom manner is by means of a noswitch section callback. +++ There are only three noswitch sections: comm_section, +++ lcomm_section and tls_comm_section. And there is no way to +++ wire a custom noswitch section to a decl. As lcomm_section +++ is bypassed with -fdata-sections -fno-common, there is no +++ other way than making use of tls_comm_section. As we are +++ using that section anyway, also use it in the public case. */ +++ +++ DECL_COMMON (decl) = 1; +++ set_decl_section_name (decl, (const char*) nullptr); +++ set_decl_tls_model (decl, (tls_model) 2); +++ } +++ } ++ } ++ ++ if (AVR_TINY ++@@ -10607,6 +11267,58 @@ avr_mul_highpart_cost (rtx x, int) ++ } ++ ++ +++/* Return the expected cost of a conditional branch like +++ (set (pc) +++ (if_then_else (X) +++ (label_ref *) +++ (pc))) +++ where X is some comparison operator. */ +++ +++static int +++avr_cbranch_cost (rtx x) +++{ +++ bool difficult_p = difficult_comparison_operator (x, VOIDmode); +++ +++ if (reload_completed) +++ { +++ // After reload, we basically just have plain branches. +++ return COSTS_N_INSNS (1 + difficult_p); +++ } +++ +++ rtx xreg = XEXP (x, 0); +++ rtx xval = XEXP (x, 1); +++ machine_mode mode = GET_MODE (xreg); +++ if (mode == VOIDmode) +++ mode = GET_MODE (xval); +++ int size = GET_MODE_SIZE (mode); +++ +++ if (GET_CODE (xreg) == ZERO_EXTEND +++ || GET_CODE (xval) == ZERO_EXTEND) +++ { +++ // *cbranch..0/1, code = zero_extend. +++ return COSTS_N_INSNS (size + 1); +++ } +++ +++ if (GET_CODE (xreg) == SIGN_EXTEND +++ || GET_CODE (xval) == SIGN_EXTEND) +++ { +++ // *cbranch..0/1, code = sign_extend. +++ // Make it a bit cheaper than it actually is (less reg pressure). +++ return COSTS_N_INSNS (size + 1 + 1); +++ } +++ +++ bool reg_p = register_operand (xreg, mode); +++ bool reg_or_0_p = reg_or_0_operand (xval, mode); +++ +++ return COSTS_N_INSNS (size +++ // For the branch +++ + 1 + difficult_p +++ // Combine might propagate constants other than zero +++ // into the 2nd operand. Make that more expensive. +++ + 1 * (!reg_p || !reg_or_0_p)); +++} +++ +++ ++ /* Mutually recursive subroutine of avr_rtx_cost for calculating the ++ cost of an RTX operand given its context. X is the rtx of the ++ operand, MODE is its mode, and OUTER is the rtx_code of this ++@@ -10844,6 +11556,15 @@ avr_rtx_costs_1 (rtx x, machine_mode mode, int outer_code, ++ *total += COSTS_N_INSNS (1); ++ return true; ++ } +++ if (IOR == code +++ && AND == GET_CODE (XEXP (x, 0)) +++ && AND == GET_CODE (XEXP (x, 1)) +++ && single_zero_operand (XEXP (XEXP (x, 0), 1), mode)) +++ { +++ // Open-coded bit transfer. +++ *total = COSTS_N_INSNS (2); +++ return true; +++ } ++ *total = COSTS_N_INSNS (GET_MODE_SIZE (mode)); ++ *total += avr_operand_rtx_cost (XEXP (x, 0), mode, code, 0, speed); ++ if (!CONST_INT_P (XEXP (x, 1))) ++@@ -11490,6 +12211,15 @@ avr_rtx_costs_1 (rtx x, machine_mode mode, int outer_code, ++ } ++ break; ++ +++ case IF_THEN_ELSE: +++ if (outer_code == SET +++ && XEXP (x, 2) == pc_rtx +++ && ordered_comparison_operator (XEXP (x, 0), VOIDmode)) +++ { +++ *total = avr_cbranch_cost (XEXP (x, 0)); +++ return true; +++ } +++ ++ default: ++ break; ++ } ++@@ -11515,6 +12245,52 @@ avr_rtx_costs (rtx x, machine_mode mode, int outer_code, ++ } ++ ++ +++/* Implement `TARGET_INSN_COST'. */ +++/* For some insns, it is not enough to look at the cost of the SET_SRC. +++ In that case, have a look at the entire insn, e.g. during insn combine. */ +++ +++static int +++avr_insn_cost (rtx_insn *insn, bool speed) +++{ +++ const int unknown_cost = -1; +++ int cost = unknown_cost; +++ +++ rtx set = single_set (insn); +++ +++ if (set +++ && ZERO_EXTRACT == GET_CODE (SET_DEST (set))) +++ { +++ // Try find anything that would flip the extracted bit. +++ bool not_bit_p = false; +++ +++ subrtx_iterator::array_type array; +++ FOR_EACH_SUBRTX (iter, array, SET_SRC (set), NONCONST) +++ { +++ enum rtx_code code = GET_CODE (*iter); +++ not_bit_p |= code == NOT || code == XOR || code == GE; +++ } +++ +++ // Don't go too deep into the analysis. In almost all cases, +++ // using BLD/BST is the best we can do for single-bit moves, +++ // even considering CSE. +++ cost = COSTS_N_INSNS (2 + not_bit_p); +++ } +++ +++ if (cost != unknown_cost) +++ { +++ if (avr_log.rtx_costs) +++ avr_edump ("\n%? (%s) insn_cost=%d\n%r\n", +++ speed ? "speed" : "size", cost, insn); +++ return cost; +++ } +++ +++ // Resort to what rtlanal.cc::insn_cost() implements as a default +++ // when targetm.insn_cost() is not implemented. +++ +++ return pattern_cost (PATTERN (insn), speed); +++} +++ +++ ++ /* Implement `TARGET_ADDRESS_COST'. */ ++ ++ static int ++@@ -11602,281 +12378,6 @@ avr_normalize_condition (RTX_CODE condition) ++ } ++ } ++ ++-/* Helper function for `avr_reorg'. */ ++- ++-static rtx ++-avr_compare_pattern (rtx_insn *insn) ++-{ ++- rtx pattern = single_set (insn); ++- ++- if (pattern ++- && NONJUMP_INSN_P (insn) ++- && REG_P (SET_DEST (pattern)) ++- && REGNO (SET_DEST (pattern)) == REG_CC ++- && GET_CODE (SET_SRC (pattern)) == COMPARE) ++- { ++- machine_mode mode0 = GET_MODE (XEXP (SET_SRC (pattern), 0)); ++- machine_mode mode1 = GET_MODE (XEXP (SET_SRC (pattern), 1)); ++- ++- /* The 64-bit comparisons have fixed operands ACC_A and ACC_B. ++- They must not be swapped, thus skip them. */ ++- ++- if ((mode0 == VOIDmode || GET_MODE_SIZE (mode0) <= 4) ++- && (mode1 == VOIDmode || GET_MODE_SIZE (mode1) <= 4)) ++- return pattern; ++- } ++- ++- return NULL_RTX; ++-} ++- ++-/* Helper function for `avr_reorg'. */ ++- ++-/* Expansion of switch/case decision trees leads to code like ++- ++- REG_CC = compare (Reg, Num) ++- if (REG_CC == 0) ++- goto L1 ++- ++- REG_CC = compare (Reg, Num) ++- if (REG_CC > 0) ++- goto L2 ++- ++- The second comparison is superfluous and can be deleted. ++- The second jump condition can be transformed from a ++- "difficult" one to a "simple" one because "REG_CC > 0" and ++- "REG_CC >= 0" will have the same effect here. ++- ++- This function relies on the way switch/case is being expaned ++- as binary decision tree. For example code see PR 49903. ++- ++- Return TRUE if optimization performed. ++- Return FALSE if nothing changed. ++- ++- INSN1 is a comparison, i.e. avr_compare_pattern != 0. ++- ++- We don't want to do this in text peephole because it is ++- tedious to work out jump offsets there and the second comparison ++- might have been transormed by `avr_reorg'. ++- ++- RTL peephole won't do because peephole2 does not scan across ++- basic blocks. */ ++- ++-static bool ++-avr_reorg_remove_redundant_compare (rtx_insn *insn1) ++-{ ++- rtx comp1, ifelse1, xcond1; ++- rtx_insn *branch1; ++- rtx comp2, ifelse2, xcond2; ++- rtx_insn *branch2, *insn2; ++- enum rtx_code code; ++- rtx_insn *jump; ++- rtx target, cond; ++- ++- /* Look out for: compare1 - branch1 - compare2 - branch2 */ ++- ++- branch1 = next_nonnote_nondebug_insn (insn1); ++- if (!branch1 || !JUMP_P (branch1)) ++- return false; ++- ++- insn2 = next_nonnote_nondebug_insn (branch1); ++- if (!insn2 || !avr_compare_pattern (insn2)) ++- return false; ++- ++- branch2 = next_nonnote_nondebug_insn (insn2); ++- if (!branch2 || !JUMP_P (branch2)) ++- return false; ++- ++- comp1 = avr_compare_pattern (insn1); ++- comp2 = avr_compare_pattern (insn2); ++- xcond1 = single_set (branch1); ++- xcond2 = single_set (branch2); ++- ++- if (!comp1 || !comp2 ++- || !rtx_equal_p (comp1, comp2) ++- || !xcond1 || SET_DEST (xcond1) != pc_rtx ++- || !xcond2 || SET_DEST (xcond2) != pc_rtx ++- || IF_THEN_ELSE != GET_CODE (SET_SRC (xcond1)) ++- || IF_THEN_ELSE != GET_CODE (SET_SRC (xcond2))) ++- { ++- return false; ++- } ++- ++- comp1 = SET_SRC (comp1); ++- ifelse1 = SET_SRC (xcond1); ++- ifelse2 = SET_SRC (xcond2); ++- ++- /* comp is COMPARE now and ifelse is IF_THEN_ELSE. */ ++- ++- if (EQ != GET_CODE (XEXP (ifelse1, 0)) ++- || !REG_P (XEXP (comp1, 0)) ++- || !CONST_INT_P (XEXP (comp1, 1)) ++- || XEXP (ifelse1, 2) != pc_rtx ++- || XEXP (ifelse2, 2) != pc_rtx ++- || LABEL_REF != GET_CODE (XEXP (ifelse1, 1)) ++- || LABEL_REF != GET_CODE (XEXP (ifelse2, 1)) ++- || !COMPARISON_P (XEXP (ifelse2, 0)) ++- || REG_CC != REGNO (XEXP (XEXP (ifelse1, 0), 0)) ++- || REG_CC != REGNO (XEXP (XEXP (ifelse2, 0), 0)) ++- || const0_rtx != XEXP (XEXP (ifelse1, 0), 1) ++- || const0_rtx != XEXP (XEXP (ifelse2, 0), 1)) ++- { ++- return false; ++- } ++- ++- /* We filtered the insn sequence to look like ++- ++- (set (reg:CC cc) ++- (compare (reg:M N) ++- (const_int VAL))) ++- (set (pc) ++- (if_then_else (eq (reg:CC cc) ++- (const_int 0)) ++- (label_ref L1) ++- (pc))) ++- ++- (set (reg:CC cc) ++- (compare (reg:M N) ++- (const_int VAL))) ++- (set (pc) ++- (if_then_else (CODE (reg:CC cc) ++- (const_int 0)) ++- (label_ref L2) ++- (pc))) ++- */ ++- ++- code = GET_CODE (XEXP (ifelse2, 0)); ++- ++- /* Map GT/GTU to GE/GEU which is easier for AVR. ++- The first two instructions compare/branch on EQ ++- so we may replace the difficult ++- ++- if (x == VAL) goto L1; ++- if (x > VAL) goto L2; ++- ++- with easy ++- ++- if (x == VAL) goto L1; ++- if (x >= VAL) goto L2; ++- ++- Similarly, replace LE/LEU by LT/LTU. */ ++- ++- switch (code) ++- { ++- case EQ: ++- case LT: case LTU: ++- case GE: case GEU: ++- break; ++- ++- case LE: case LEU: ++- case GT: case GTU: ++- code = avr_normalize_condition (code); ++- break; ++- ++- default: ++- return false; ++- } ++- ++- /* Wrap the branches into UNSPECs so they won't be changed or ++- optimized in the remainder. */ ++- ++- target = XEXP (XEXP (ifelse1, 1), 0); ++- cond = XEXP (ifelse1, 0); ++- jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn1); ++- ++- JUMP_LABEL (jump) = JUMP_LABEL (branch1); ++- ++- target = XEXP (XEXP (ifelse2, 1), 0); ++- cond = gen_rtx_fmt_ee (code, VOIDmode, cc_reg_rtx, const0_rtx); ++- jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn2); ++- ++- JUMP_LABEL (jump) = JUMP_LABEL (branch2); ++- ++- /* The comparisons in insn1 and insn2 are exactly the same; ++- insn2 is superfluous so delete it. */ ++- ++- delete_insn (insn2); ++- delete_insn (branch1); ++- delete_insn (branch2); ++- ++- return true; ++-} ++- ++- ++-/* Implement `TARGET_MACHINE_DEPENDENT_REORG'. */ ++-/* Optimize conditional jumps. */ ++- ++-static void ++-avr_reorg (void) ++-{ ++- rtx_insn *insn = get_insns(); ++- ++- for (insn = next_real_insn (insn); insn; insn = next_real_insn (insn)) ++- { ++- rtx pattern = avr_compare_pattern (insn); ++- ++- if (!pattern) ++- continue; ++- ++- if (optimize ++- && avr_reorg_remove_redundant_compare (insn)) ++- { ++- continue; ++- } ++- ++- if (compare_diff_p (insn)) ++- { ++- /* Now we work under compare insn with difficult branch. */ ++- ++- rtx_insn *next = next_real_insn (insn); ++- rtx pat = PATTERN (next); ++- if (GET_CODE (pat) == PARALLEL) ++- pat = XVECEXP (pat, 0, 0); ++- ++- pattern = SET_SRC (pattern); ++- ++- if (true_regnum (XEXP (pattern, 0)) >= 0 ++- && true_regnum (XEXP (pattern, 1)) >= 0) ++- { ++- rtx x = XEXP (pattern, 0); ++- rtx src = SET_SRC (pat); ++- rtx t = XEXP (src, 0); ++- PUT_CODE (t, swap_condition (GET_CODE (t))); ++- XEXP (pattern, 0) = XEXP (pattern, 1); ++- XEXP (pattern, 1) = x; ++- INSN_CODE (next) = -1; ++- } ++- else if (true_regnum (XEXP (pattern, 0)) >= 0 ++- && XEXP (pattern, 1) == const0_rtx) ++- { ++- /* This is a tst insn, we can reverse it. */ ++- rtx src = SET_SRC (pat); ++- rtx t = XEXP (src, 0); ++- ++- PUT_CODE (t, swap_condition (GET_CODE (t))); ++- XEXP (pattern, 1) = XEXP (pattern, 0); ++- XEXP (pattern, 0) = const0_rtx; ++- INSN_CODE (next) = -1; ++- INSN_CODE (insn) = -1; ++- } ++- else if (true_regnum (XEXP (pattern, 0)) >= 0 ++- && CONST_INT_P (XEXP (pattern, 1))) ++- { ++- rtx x = XEXP (pattern, 1); ++- rtx src = SET_SRC (pat); ++- rtx t = XEXP (src, 0); ++- machine_mode mode = GET_MODE (XEXP (pattern, 0)); ++- ++- if (avr_simplify_comparison_p (mode, GET_CODE (t), x)) ++- { ++- XEXP (pattern, 1) = gen_int_mode (INTVAL (x) + 1, mode); ++- PUT_CODE (t, avr_normalize_condition (GET_CODE (t))); ++- INSN_CODE (next) = -1; ++- INSN_CODE (insn) = -1; ++- } ++- } ++- } ++- } ++-} ++ ++ /* Returns register number for function return value.*/ ++ ++@@ -14572,6 +15073,8 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code) ++ #undef TARGET_ASM_FINAL_POSTSCAN_INSN ++ #define TARGET_ASM_FINAL_POSTSCAN_INSN avr_asm_final_postscan_insn ++ +++#undef TARGET_INSN_COST +++#define TARGET_INSN_COST avr_insn_cost ++ #undef TARGET_REGISTER_MOVE_COST ++ #define TARGET_REGISTER_MOVE_COST avr_register_move_cost ++ #undef TARGET_MEMORY_MOVE_COST ++@@ -14580,8 +15083,6 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code) ++ #define TARGET_RTX_COSTS avr_rtx_costs ++ #undef TARGET_ADDRESS_COST ++ #define TARGET_ADDRESS_COST avr_address_cost ++-#undef TARGET_MACHINE_DEPENDENT_REORG ++-#define TARGET_MACHINE_DEPENDENT_REORG avr_reorg ++ #undef TARGET_FUNCTION_ARG ++ #define TARGET_FUNCTION_ARG avr_function_arg ++ #undef TARGET_FUNCTION_ARG_ADVANCE ++@@ -14711,6 +15212,12 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code) ++ #undef TARGET_MD_ASM_ADJUST ++ #define TARGET_MD_ASM_ADJUST avr_md_asm_adjust ++ +++#undef TARGET_CAN_INLINE_P +++#define TARGET_CAN_INLINE_P avr_can_inline_p +++ +++#undef TARGET_CANONICALIZE_COMPARISON +++#define TARGET_CANONICALIZE_COMPARISON avr_canonicalize_comparison +++ ++ struct gcc_target targetm = TARGET_INITIALIZER; ++ ++ ++--- a/src/gcc/config/avr/avr.h +++++ b/src/gcc/config/avr/avr.h ++@@ -500,9 +500,11 @@ typedef struct avr_args ++ ++ extern const char *avr_devicespecs_file (int, const char**); ++ extern const char *avr_double_lib (int, const char**); +++extern const char *avr_no_devlib (int, const char**); ++ ++ #define EXTRA_SPEC_FUNCTIONS \ ++ { "double-lib", avr_double_lib }, \ +++ { "no-devlib", avr_no_devlib }, \ ++ { "device-specs-file", avr_devicespecs_file }, ++ ++ /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs. ++--- a/src/gcc/config/avr/avr.md +++++ b/src/gcc/config/avr/avr.md ++@@ -77,7 +77,6 @@ (define_c_enum "unspec" ++ UNSPEC_FMULS ++ UNSPEC_FMULSU ++ UNSPEC_COPYSIGN ++- UNSPEC_IDENTITY ++ UNSPEC_INSERT_BITS ++ UNSPEC_ROUND ++ ]) ++@@ -165,6 +164,7 @@ (define_attr "adjust_len" ++ ashlsi, ashrsi, lshrsi, ++ ashlpsi, ashrpsi, lshrpsi, ++ insert_bits, insv_notbit, insv_notbit_0, insv_notbit_7, +++ add_set_ZN, cmp_uext, cmp_sext, ++ no" ++ (const_string "no")) ++ ++@@ -251,11 +251,23 @@ (define_mode_iterator QIHI [QI HI]) ++ (define_mode_iterator QIHI2 [QI HI]) ++ (define_mode_iterator QISI [QI HI PSI SI]) ++ (define_mode_iterator QIDI [QI HI PSI SI DI]) +++(define_mode_iterator QIPSI [QI HI PSI]) ++ (define_mode_iterator HISI [HI PSI SI]) ++ +++;; Ordered integral and fixed-point modes of specific sizes. ++ (define_mode_iterator ALL1 [QI QQ UQQ]) ++ (define_mode_iterator ALL2 [HI HQ UHQ HA UHA]) ++ (define_mode_iterator ALL4 [SI SQ USQ SA USA]) +++(define_mode_iterator ALL234 [HI SI PSI +++ HQ UHQ HA UHA +++ SQ USQ SA USA]) +++ +++;; Ordered signed integral and signed fixed-point modes of specific sizes. +++(define_mode_iterator ALLs1 [QI QQ]) +++(define_mode_iterator ALLs2 [HI HQ HA]) +++(define_mode_iterator ALLs4 [SI SQ SA]) +++(define_mode_iterator ALLs234 [HI SI PSI +++ HQ HA SQ SA]) ++ ++ ;; All supported move-modes ++ (define_mode_iterator MOVMODE [QI QQ UQQ ++@@ -273,15 +285,17 @@ (define_mode_iterator SPLIT34 [SI SF PSI ++ SQ USQ SA USA]) ++ ++ ;; Define code iterators ++-;; Define two incarnations so that we can build the cross product. +++;; Define two incarnations so that we can build the cartesian product. ++ (define_code_iterator any_extend [sign_extend zero_extend]) ++ (define_code_iterator any_extend2 [sign_extend zero_extend]) ++ (define_code_iterator any_extract [sign_extract zero_extract]) ++ (define_code_iterator any_shiftrt [lshiftrt ashiftrt]) ++ +++(define_code_iterator piaop [plus ior and]) ++ (define_code_iterator bitop [xor ior and]) ++ (define_code_iterator xior [xor ior]) ++ (define_code_iterator eqne [eq ne]) +++(define_code_iterator gelt [ge lt]) ++ ++ (define_code_iterator ss_addsub [ss_plus ss_minus]) ++ (define_code_iterator us_addsub [us_plus us_minus]) ++@@ -309,6 +323,10 @@ (define_code_attr abelian ++ [(ss_minus "") (us_minus "") ++ (ss_plus "%") (us_plus "%")]) ++ +++(define_code_attr gelt_eqne +++ [(ge "eq") +++ (lt "ne")]) +++ ++ ;; Map RTX code to its standard insn name ++ (define_code_attr code_stdname ++ [(ashift "ashl") ++@@ -1529,9 +1547,8 @@ (define_insn_and_split "*usum_widenqihi3_split" ++ "#" ++ "&& reload_completed" ++ [(parallel [(set (match_dup 0) ++- (plus:HI ++- (zero_extend:HI (match_dup 1)) ++- (zero_extend:HI (match_dup 2)))) +++ (plus:HI (zero_extend:HI (match_dup 1)) +++ (zero_extend:HI (match_dup 2)))) ++ (clobber (reg:CC REG_CC))])]) ++ ++ ++@@ -2152,7 +2169,8 @@ (define_insn "*mulqi3_enh" ++ (define_expand "mulqi3_call" ++ [(set (reg:QI 24) (match_operand:QI 1 "register_operand" "")) ++ (set (reg:QI 22) (match_operand:QI 2 "register_operand" "")) ++- (parallel [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22))) +++ (parallel [(set (reg:QI 24) +++ (mult:QI (reg:QI 24) (reg:QI 22))) ++ (clobber (reg:QI 22))]) ++ (set (match_operand:QI 0 "register_operand" "") (reg:QI 24))] ++ "" ++@@ -2166,12 +2184,14 @@ (define_insn_and_split "*mulqi3_call_split" ++ "!AVR_HAVE_MUL" ++ "#" ++ "&& reload_completed" ++- [(parallel [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22))) +++ [(parallel [(set (reg:QI 24) +++ (mult:QI (reg:QI 24) (reg:QI 22))) ++ (clobber (reg:QI 22)) ++ (clobber (reg:CC REG_CC))])]) ++ ++ (define_insn "*mulqi3_call" ++- [(set (reg:QI 24) (mult:QI (reg:QI 24) (reg:QI 22))) +++ [(set (reg:QI 24) +++ (mult:QI (reg:QI 24) (reg:QI 22))) ++ (clobber (reg:QI 22)) ++ (clobber (reg:CC REG_CC))] ++ "!AVR_HAVE_MUL && reload_completed" ++@@ -2307,7 +2327,7 @@ (define_insn "*addpsi3.lt0" ++ [(set (match_operand:PSI 0 "register_operand" "=r") ++ (plus:PSI (lshiftrt:PSI (match_operand:PSI 1 "register_operand" "r") ++ (const_int 23)) ++- (match_operand:PSI 2 "register_operand" "0"))) +++ (match_operand:PSI 2 "register_operand" "0"))) ++ (clobber (reg:CC REG_CC))] ++ "reload_completed" ++ "mov __tmp_reg__,%C1\;lsl __tmp_reg__ ++@@ -2433,7 +2453,7 @@ (define_insn "*sumulqihi3" ++ [(set (match_operand:HI 0 "register_operand" "=r") ++ (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "a")) ++ (zero_extend:HI (match_operand:QI 2 "register_operand" "a")))) ++- (clobber (reg:CC REG_CC))] +++ (clobber (reg:CC REG_CC))] ++ "AVR_HAVE_MUL && reload_completed" ++ "mulsu %1,%2 ++ movw %0,r0 ++@@ -3088,7 +3108,7 @@ (define_insn_and_split "muluqihi3" ++ [(parallel [(set (match_dup 0) ++ (mult:HI (zero_extend:HI (match_dup 1)) ++ (match_dup 2))) ++- (clobber (reg:CC REG_CC))])]) +++ (clobber (reg:CC REG_CC))])]) ++ ++ (define_insn "*muluqihi3" ++ [(set (match_operand:HI 0 "register_operand" "=&r") ++@@ -3706,17 +3726,17 @@ (define_insn "*mulohisi3_call" ++ ;; CSE has problems to operate on hard regs. ++ ;; ++ (define_insn_and_split "divmodqi4" ++- [(set (match_operand:QI 0 "pseudo_register_operand" "") ++- (div:QI (match_operand:QI 1 "pseudo_register_operand" "") ++- (match_operand:QI 2 "pseudo_register_operand" ""))) ++- (set (match_operand:QI 3 "pseudo_register_operand" "") +++ [(set (match_operand:QI 0 "pseudo_register_operand") +++ (div:QI (match_operand:QI 1 "pseudo_register_operand") +++ (match_operand:QI 2 "pseudo_register_operand"))) +++ (set (match_operand:QI 3 "pseudo_register_operand") ++ (mod:QI (match_dup 1) (match_dup 2))) ++ (clobber (reg:QI 22)) ++ (clobber (reg:QI 23)) ++ (clobber (reg:QI 24)) ++ (clobber (reg:QI 25))] ++ "" ++- "this divmodqi4 pattern should have been splitted;" +++ { gcc_unreachable(); } ++ "" ++ [(set (reg:QI 24) (match_dup 1)) ++ (set (reg:QI 22) (match_dup 2)) ++@@ -3752,17 +3772,17 @@ (define_insn "*divmodqi4_call" ++ [(set_attr "type" "xcall")]) ++ ++ (define_insn_and_split "udivmodqi4" ++- [(set (match_operand:QI 0 "pseudo_register_operand" "") ++- (udiv:QI (match_operand:QI 1 "pseudo_register_operand" "") ++- (match_operand:QI 2 "pseudo_register_operand" ""))) ++- (set (match_operand:QI 3 "pseudo_register_operand" "") ++- (umod:QI (match_dup 1) (match_dup 2))) ++- (clobber (reg:QI 22)) ++- (clobber (reg:QI 23)) ++- (clobber (reg:QI 24)) ++- (clobber (reg:QI 25))] ++- "" ++- "this udivmodqi4 pattern should have been splitted;" +++ [(set (match_operand:QI 0 "pseudo_register_operand") +++ (udiv:QI (match_operand:QI 1 "pseudo_register_operand") +++ (match_operand:QI 2 "pseudo_register_operand"))) +++ (set (match_operand:QI 3 "pseudo_register_operand") +++ (umod:QI (match_dup 1) (match_dup 2))) +++ (clobber (reg:QI 22)) +++ (clobber (reg:QI 23)) +++ (clobber (reg:QI 24)) +++ (clobber (reg:QI 25))] +++ "" +++ { gcc_unreachable(); } ++ "" ++ [(set (reg:QI 24) (match_dup 1)) ++ (set (reg:QI 22) (match_dup 2)) ++@@ -3794,17 +3814,17 @@ (define_insn "*udivmodqi4_call" ++ [(set_attr "type" "xcall")]) ++ ++ (define_insn_and_split "divmodhi4" ++- [(set (match_operand:HI 0 "pseudo_register_operand" "") ++- (div:HI (match_operand:HI 1 "pseudo_register_operand" "") ++- (match_operand:HI 2 "pseudo_register_operand" ""))) ++- (set (match_operand:HI 3 "pseudo_register_operand" "") +++ [(set (match_operand:HI 0 "pseudo_register_operand") +++ (div:HI (match_operand:HI 1 "pseudo_register_operand") +++ (match_operand:HI 2 "pseudo_register_operand"))) +++ (set (match_operand:HI 3 "pseudo_register_operand") ++ (mod:HI (match_dup 1) (match_dup 2))) ++ (clobber (reg:QI 21)) ++ (clobber (reg:HI 22)) ++ (clobber (reg:HI 24)) ++ (clobber (reg:HI 26))] ++ "" ++- "this should have been splitted;" +++ { gcc_unreachable(); } ++ "" ++ [(set (reg:HI 24) (match_dup 1)) ++ (set (reg:HI 22) (match_dup 2)) ++@@ -3840,17 +3860,17 @@ (define_insn "*divmodhi4_call" ++ [(set_attr "type" "xcall")]) ++ ++ (define_insn_and_split "udivmodhi4" ++- [(set (match_operand:HI 0 "pseudo_register_operand" "") ++- (udiv:HI (match_operand:HI 1 "pseudo_register_operand" "") ++- (match_operand:HI 2 "pseudo_register_operand" ""))) ++- (set (match_operand:HI 3 "pseudo_register_operand" "") +++ [(set (match_operand:HI 0 "pseudo_register_operand") +++ (udiv:HI (match_operand:HI 1 "pseudo_register_operand") +++ (match_operand:HI 2 "pseudo_register_operand"))) +++ (set (match_operand:HI 3 "pseudo_register_operand") ++ (umod:HI (match_dup 1) (match_dup 2))) ++ (clobber (reg:QI 21)) ++ (clobber (reg:HI 22)) ++ (clobber (reg:HI 24)) ++ (clobber (reg:HI 26))] ++ "" ++- "this udivmodhi4 pattern should have been splitted.;" +++ { gcc_unreachable(); } ++ "" ++ [(set (reg:HI 24) (match_dup 1)) ++ (set (reg:HI 22) (match_dup 2)) ++@@ -3925,7 +3945,7 @@ (define_insn_and_split "*umulqihipsi3_split" ++ [(parallel [(set (match_dup 0) ++ (mult:PSI (zero_extend:PSI (match_dup 1)) ++ (zero_extend:PSI (match_dup 2)))) ++- (clobber (reg:CC REG_CC))])]) +++ (clobber (reg:CC REG_CC))])]) ++ ++ (define_insn "*umulqihipsi3" ++ [(set (match_operand:PSI 0 "register_operand" "=&r") ++@@ -4091,14 +4111,14 @@ (define_insn "*mulpsi3.libgcc" ++ ;; implementation works the other way round. ++ ++ (define_insn_and_split "divmodpsi4" ++- [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "") ++- (div:PSI (match_operand:PSI 1 "pseudo_register_operand" "") ++- (match_operand:PSI 2 "pseudo_register_operand" ""))) ++- (set (match_operand:PSI 3 "pseudo_register_operand" "") ++- (mod:PSI (match_dup 1) ++- (match_dup 2))) ++- (clobber (reg:DI 18)) ++- (clobber (reg:QI 26))])] +++ [(set (match_operand:PSI 0 "pseudo_register_operand") +++ (div:PSI (match_operand:PSI 1 "pseudo_register_operand") +++ (match_operand:PSI 2 "pseudo_register_operand"))) +++ (set (match_operand:PSI 3 "pseudo_register_operand") +++ (mod:PSI (match_dup 1) +++ (match_dup 2))) +++ (clobber (reg:DI 18)) +++ (clobber (reg:QI 26))] ++ "" ++ { gcc_unreachable(); } ++ "" ++@@ -4140,14 +4160,14 @@ (define_insn "*divmodpsi4_call" ++ [(set_attr "type" "xcall")]) ++ ++ (define_insn_and_split "udivmodpsi4" ++- [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "") ++- (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand" "") ++- (match_operand:PSI 2 "pseudo_register_operand" ""))) ++- (set (match_operand:PSI 3 "pseudo_register_operand" "") ++- (umod:PSI (match_dup 1) ++- (match_dup 2))) ++- (clobber (reg:DI 18)) ++- (clobber (reg:QI 26))])] +++ [(set (match_operand:PSI 0 "pseudo_register_operand") +++ (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand") +++ (match_operand:PSI 2 "pseudo_register_operand"))) +++ (set (match_operand:PSI 3 "pseudo_register_operand") +++ (umod:PSI (match_dup 1) +++ (match_dup 2))) +++ (clobber (reg:DI 18)) +++ (clobber (reg:QI 26))] ++ "" ++ { gcc_unreachable(); } ++ "" ++@@ -4191,17 +4211,18 @@ (define_insn "*udivmodpsi4_call" ++ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++ (define_insn_and_split "divmodsi4" ++- [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "") ++- (div:SI (match_operand:SI 1 "pseudo_register_operand" "") ++- (match_operand:SI 2 "pseudo_register_operand" ""))) ++- (set (match_operand:SI 3 "pseudo_register_operand" "") ++- (mod:SI (match_dup 1) (match_dup 2))) ++- (clobber (reg:SI 18)) ++- (clobber (reg:SI 22)) ++- (clobber (reg:HI 26)) ++- (clobber (reg:HI 30))])] +++ [(set (match_operand:SI 0 "pseudo_register_operand") +++ (div:SI (match_operand:SI 1 "pseudo_register_operand") +++ (match_operand:SI 2 "pseudo_register_operand"))) +++ (set (match_operand:SI 3 "pseudo_register_operand") +++ (mod:SI (match_dup 1) +++ (match_dup 2))) +++ (clobber (reg:SI 18)) +++ (clobber (reg:SI 22)) +++ (clobber (reg:HI 26)) +++ (clobber (reg:HI 30))] ++ "" ++- "this divmodsi4 pattern should have been splitted;" +++ { gcc_unreachable(); } ++ "" ++ [(set (reg:SI 22) (match_dup 1)) ++ (set (reg:SI 18) (match_dup 2)) ++@@ -4237,17 +4258,18 @@ (define_insn "*divmodsi4_call" ++ [(set_attr "type" "xcall")]) ++ ++ (define_insn_and_split "udivmodsi4" ++- [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "") ++- (udiv:SI (match_operand:SI 1 "pseudo_register_operand" "") ++- (match_operand:SI 2 "pseudo_register_operand" ""))) ++- (set (match_operand:SI 3 "pseudo_register_operand" "") ++- (umod:SI (match_dup 1) (match_dup 2))) ++- (clobber (reg:SI 18)) ++- (clobber (reg:SI 22)) ++- (clobber (reg:HI 26)) ++- (clobber (reg:HI 30))])] +++ [(set (match_operand:SI 0 "pseudo_register_operand") +++ (udiv:SI (match_operand:SI 1 "pseudo_register_operand") +++ (match_operand:SI 2 "pseudo_register_operand"))) +++ (set (match_operand:SI 3 "pseudo_register_operand") +++ (umod:SI (match_dup 1) +++ (match_dup 2))) +++ (clobber (reg:SI 18)) +++ (clobber (reg:SI 22)) +++ (clobber (reg:HI 26)) +++ (clobber (reg:HI 30))] ++ "" ++- "this udivmodsi4 pattern should have been splitted;" +++ { gcc_unreachable(); } ++ "" ++ [(set (reg:SI 22) (match_dup 1)) ++ (set (reg:SI 18) (match_dup 2)) ++@@ -4712,7 +4734,8 @@ (define_split ++ [(parallel [(set (match_operand:HISI 0 "register_operand") ++ (bitop:HISI (match_dup 0) ++ (match_operand:HISI 1 "register_operand"))) ++- (clobber (scratch:QI))])] +++ (clobber (scratch:QI)) +++ (clobber (reg:CC REG_CC))])] ++ "optimize ++ && reload_completed" ++ [(const_int 1)] ++@@ -4726,6 +4749,43 @@ (define_split ++ DONE; ++ }) ++ +++;; If $0 = $0 const requires a QI scratch, and d-reg $1 dies after +++;; the first insn, then we can replace +++;; $0 = $1 +++;; $0 = $0 const +++;; by +++;; $1 = $1 const +++;; $0 = $1 +++;; This transorms constraint alternative "r,0,n,&d" of the first operation +++;; to alternative "d,0,n,X". +++;; "*addhi3_clobber" "*addpsi3" "*addsi3" +++;; "*addhq3" "*adduhq3" "*addha3" "*adduha3" +++;; "*addsq3" "*addusq3" "*addsa3" "*addusa3" +++;; "*iorhi3" "*iorpsi3" "*iorsi3" +++;; "*andhi3" "*andpsi3" "*andsi3" +++(define_peephole2 +++ [(parallel [(set (match_operand:ORDERED234 0 "register_operand") +++ (match_operand:ORDERED234 1 "d_register_operand")) +++ (clobber (reg:CC REG_CC))]) +++ (parallel [(set (match_dup 0) +++ (piaop:ORDERED234 (match_dup 0) +++ (match_operand:ORDERED234 2 "const_operand"))) +++ ; A d-reg as scratch tells that this insn is expensive, and +++ ; that $0 is not a d-register: l-reg or something like SI:14 etc. +++ (clobber (match_operand:QI 3 "d_register_operand")) +++ (clobber (reg:CC REG_CC))])] +++ "peep2_reg_dead_p (1, operands[1])" +++ [(parallel [(set (match_dup 1) +++ (piaop:ORDERED234 (match_dup 1) +++ (match_dup 2))) +++ (clobber (scratch:QI)) +++ (clobber (reg:CC REG_CC))]) +++ ; Unfortunately, the following insn misses a REG_DEAD note for $1, +++ ; so this peep2 works only once. +++ (parallel [(set (match_dup 0) +++ (match_dup 1)) +++ (clobber (reg:CC REG_CC))])]) +++ ++ ++ ;; swap swap swap swap swap swap swap swap swap swap swap swap swap swap swap ++ ;; swap ++@@ -5684,7 +5744,7 @@ (define_insn "*lshr3" ++ ;; "lshrha3" "lshruha3" ++ (define_insn_and_split "lshr3" ++ [(set (match_operand:ALL2 0 "register_operand" "=r,r,r,r,r,r,r") ++- (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand" "0,0,0,r,0,0,0") +++ (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand" "0,0,0,r,0,0,0") ++ (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm")))] ++ "" ++ "#" ++@@ -5696,7 +5756,7 @@ (define_insn_and_split "lshr3" ++ ++ (define_insn "*lshr3" ++ [(set (match_operand:ALL2 0 "register_operand" "=r,r,r,r,r,r,r") ++- (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand" "0,0,0,r,0,0,0") +++ (lshiftrt:ALL2 (match_operand:ALL2 1 "register_operand" "0,0,0,r,0,0,0") ++ (match_operand:QI 2 "nop_general_operand" "r,L,P,O,K,n,Qm"))) ++ (clobber (reg:CC REG_CC))] ++ "reload_completed" ++@@ -6449,80 +6509,41 @@ (define_insn_and_split "zero_extendsidi2" ++ ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=> ++ ;; compare ++ ++-; Optimize negated tests into reverse compare if overflow is undefined. ++-(define_insn "*negated_tstqi" +++;; "*swapped_tstqi" "*swapped_tstqq" +++(define_insn "*swapped_tst" ++ [(set (reg:CC REG_CC) ++- (compare:CC (neg:QI (match_operand:QI 0 "register_operand" "r")) ++- (const_int 0)))] ++- "reload_completed && !flag_wrapv && !flag_trapv" ++- "cp __zero_reg__,%0" ++- [(set_attr "length" "1")]) ++- ++-(define_insn "*reversed_tstqi" ++- [(set (reg:CC REG_CC) ++- (compare:CC (const_int 0) ++- (match_operand:QI 0 "register_operand" "r")))] +++ (compare:CC (match_operand:ALLs1 0 "const0_operand" "Y00") +++ (match_operand:ALLs1 1 "register_operand" "r")))] ++ "reload_completed" ++- "cp __zero_reg__,%0" ++-[(set_attr "length" "2")]) +++ "cp __zero_reg__,%1" +++[(set_attr "length" "1")]) ++ ++-(define_insn "*negated_tsthi" ++- [(set (reg:CC REG_CC) ++- (compare:CC (neg:HI (match_operand:HI 0 "register_operand" "r")) ++- (const_int 0)))] ++- "reload_completed && !flag_wrapv && !flag_trapv" ++- "cp __zero_reg__,%A0 ++- cpc __zero_reg__,%B0" ++-[(set_attr "length" "2")]) ++- ++-;; Leave here the clobber used by the cmphi pattern for simplicity, even ++-;; though it is unused, because this pattern is synthesized by avr_reorg. ++-(define_insn "*reversed_tsthi" +++ +++;; "*swapped_tsthi" "*swapped_tsthq" "*swapped_tstha" +++(define_insn "*swapped_tst" ++ [(set (reg:CC REG_CC) ++- (compare:CC (const_int 0) ++- (match_operand:HI 0 "register_operand" "r"))) ++- (clobber (match_scratch:QI 1 "=X"))] +++ (compare:CC (match_operand:ALLs2 0 "const0_operand" "Y00") +++ (match_operand:ALLs2 1 "register_operand" "r")))] ++ "reload_completed" ++- "cp __zero_reg__,%A0 ++- cpc __zero_reg__,%B0" ++-[(set_attr "length" "2")]) +++ "cp __zero_reg__,%A1 +++ cpc __zero_reg__,%B1" +++ [(set_attr "length" "2")]) ++ ++-(define_insn "*negated_tstpsi" ++- [(set (reg:CC REG_CC) ++- (compare:CC (neg:PSI (match_operand:PSI 0 "register_operand" "r")) ++- (const_int 0)))] ++- "reload_completed && !flag_wrapv && !flag_trapv" ++- "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0" ++- [(set_attr "length" "3")]) ++ ++-(define_insn "*reversed_tstpsi" +++(define_insn "*swapped_tstpsi" ++ [(set (reg:CC REG_CC) ++ (compare:CC (const_int 0) ++- (match_operand:PSI 0 "register_operand" "r"))) ++- (clobber (match_scratch:QI 1 "=X"))] +++ (match_operand:PSI 0 "register_operand" "r")))] ++ "reload_completed" ++ "cp __zero_reg__,%A0\;cpc __zero_reg__,%B0\;cpc __zero_reg__,%C0" ++ [(set_attr "length" "3")]) ++ ++-(define_insn "*negated_tstsi" ++- [(set (reg:CC REG_CC) ++- (compare:CC (neg:SI (match_operand:SI 0 "register_operand" "r")) ++- (const_int 0)))] ++- "reload_completed && !flag_wrapv && !flag_trapv" ++- "cp __zero_reg__,%A0 ++- cpc __zero_reg__,%B0 ++- cpc __zero_reg__,%C0 ++- cpc __zero_reg__,%D0" ++- [(set_attr "length" "4")]) ++ ++-;; "*reversed_tstsi" ++-;; "*reversed_tstsq" "*reversed_tstusq" ++-;; "*reversed_tstsa" "*reversed_tstusa" ++-(define_insn "*reversed_tst" +++;; "*swapped_tstsi" "*swapped_tstsq" "*swapped_tstsa" +++(define_insn "*swapped_tst" ++ [(set (reg:CC REG_CC) ++- (compare:CC (match_operand:ALL4 0 "const0_operand" "Y00") ++- (match_operand:ALL4 1 "register_operand" "r"))) ++- (clobber (match_scratch:QI 2 "=X"))] +++ (compare:CC (match_operand:ALLs4 0 "const0_operand" "Y00") +++ (match_operand:ALLs4 1 "register_operand" "r")))] ++ "reload_completed" ++ "cp __zero_reg__,%A1 ++ cpc __zero_reg__,%B1 ++@@ -6536,38 +6557,40 @@ (define_insn "*reversed_tst" ++ (define_insn "cmp3" ++ [(set (reg:CC REG_CC) ++ (compare:CC (match_operand:ALL1 0 "register_operand" "r ,r,d") ++- (match_operand:ALL1 1 "nonmemory_operand" "Y00,r,i")))] +++ (match_operand:ALL1 1 "nonmemory_operand" "Y00,r,i")))] ++ "reload_completed" ++ "@ ++- tst %0 +++ cp %0, __zero_reg__ ++ cp %0,%1 ++ cpi %0,lo8(%1)" ++ [(set_attr "length" "1,1,1")]) ++ ++-(define_insn "*cmpqi_sign_extend" ++- [(set (reg:CC REG_CC) ++- (compare:CC (sign_extend:HI (match_operand:QI 0 "register_operand" "d")) ++- (match_operand:HI 1 "s8_operand" "n")))] ++- "reload_completed" ++- "cpi %0,lo8(%1)" ++- [(set_attr "length" "1")]) ++ ++- ++-(define_insn "*cmphi.zero-extend.0" +++;; May be generated by "*cbranch..0/1". +++(define_insn "*cmp..0" ++ [(set (reg:CC REG_CC) ++- (compare:CC (zero_extend:HI (match_operand:QI 0 "register_operand" "r")) ++- (match_operand:HI 1 "register_operand" "r")))] ++- "reload_completed" ++- "cp %0,%A1\;cpc __zero_reg__,%B1" ++- [(set_attr "length" "2")]) +++ (compare:CC (any_extend:HISI (match_operand:QIPSI 0 "register_operand" "r")) +++ (match_operand:HISI 1 "register_operand" "r")))] +++ "reload_completed +++ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" +++ { +++ return avr_out_cmp_ext (operands, , nullptr); +++ } +++ [(set_attr "adjust_len" "cmp_ext")]) ++ ++-(define_insn "*cmphi.zero-extend.1" +++;; Swapped version of the above. +++;; May be generated by "*cbranch..0/1". +++(define_insn "*cmp..1" ++ [(set (reg:CC REG_CC) ++- (compare:CC (match_operand:HI 0 "register_operand" "r") ++- (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))))] ++- "reload_completed" ++- "cp %A0,%1\;cpc %B0,__zero_reg__" ++- [(set_attr "length" "2")]) +++ (compare:CC (match_operand:HISI 0 "register_operand" "r") +++ (any_extend:HISI (match_operand:QIPSI 1 "register_operand" "r"))))] +++ "reload_completed +++ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" +++ { +++ return avr_out_cmp_ext (operands, , nullptr); +++ } +++ [(set_attr "adjust_len" "cmp_ext")]) +++ ++ ++ ;; "cmphi3" ++ ;; "cmphq3" "cmpuhq3" ++@@ -6575,8 +6598,8 @@ (define_insn "*cmphi.zero-extend.1" ++ (define_insn "cmp3" ++ [(set (reg:CC REG_CC) ++ (compare:CC (match_operand:ALL2 0 "register_operand" "!w ,r ,r,d ,r ,d,r") ++- (match_operand:ALL2 1 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn"))) ++- (clobber (match_scratch:QI 2 "=X ,X ,X,&d,&d ,X,&d"))] +++ (match_operand:ALL2 1 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn"))) +++ (clobber (match_scratch:QI 2 "=X ,X ,X,&d,&d ,X,&d"))] ++ "reload_completed" ++ { ++ switch (which_alternative) ++@@ -6603,14 +6626,14 @@ (define_insn "cmp3" ++ ++ return avr_out_compare (insn, operands, NULL); ++ } ++- [(set_attr "length" "1,2,2,3,4,2,4") +++ [(set_attr "length" "2,2,2,3,4,2,4") ++ (set_attr "adjust_len" "tsthi,tsthi,*,*,*,compare,compare")]) ++ ++ (define_insn "*cmppsi" ++ [(set (reg:CC REG_CC) ++ (compare:CC (match_operand:PSI 0 "register_operand" "r,r,d ,r ,d,r") ++- (match_operand:PSI 1 "nonmemory_operand" "L,r,s ,s ,M,n"))) ++- (clobber (match_scratch:QI 2 "=X,X,&d,&d ,X,&d"))] +++ (match_operand:PSI 1 "nonmemory_operand" "L,r,s ,s ,M,n"))) +++ (clobber (match_scratch:QI 2 "=X,X,&d,&d ,X,&d"))] ++ "reload_completed" ++ { ++ switch (which_alternative) ++@@ -6641,8 +6664,8 @@ (define_insn "*cmppsi" ++ (define_insn "*cmp" ++ [(set (reg:CC REG_CC) ++ (compare:CC (match_operand:ALL4 0 "register_operand" "r ,r ,d,r ,r") ++- (match_operand:ALL4 1 "nonmemory_operand" "Y00,r ,M,M ,n Ynn"))) ++- (clobber (match_scratch:QI 2 "=X ,X ,X,&d,&d"))] +++ (match_operand:ALL4 1 "nonmemory_operand" "Y00,r ,M,M ,n Ynn"))) +++ (clobber (match_scratch:QI 2 "=X ,X ,X,&d,&d"))] ++ "reload_completed" ++ { ++ if (0 == which_alternative) ++@@ -6656,6 +6679,13 @@ (define_insn "*cmp" ++ (set_attr "adjust_len" "tstsi,*,compare,compare,compare")]) ++ ++ +++;; A helper for avr_pass_ifelse::avr_rest_of_handle_ifelse(). +++(define_expand "gen_compare" +++ [(parallel [(set (reg:CC REG_CC) +++ (compare:CC (match_operand:HISI 0 "register_operand") +++ (match_operand:HISI 1 "const_int_operand"))) +++ (clobber (match_operand:QI 2 "scratch_operand"))])]) +++ ++ ;; ---------------------------------------------------------------------- ++ ;; JUMP INSTRUCTIONS ++ ;; ---------------------------------------------------------------------- ++@@ -6664,53 +6694,67 @@ (define_insn "*cmp" ++ (define_expand "cbranch4" ++ [(set (pc) ++ (if_then_else (match_operator 0 "ordered_comparison_operator" ++- [(match_operand:ALL1 1 "register_operand" "") ++- (match_operand:ALL1 2 "nonmemory_operand" "")]) ++- (label_ref (match_operand 3 "" "")) ++- (pc)))]) +++ [(match_operand:ALL1 1 "register_operand") +++ (match_operand:ALL1 2 "nonmemory_operand")]) +++ (label_ref (match_operand 3)) +++ (pc)))] +++ "" +++ { +++ int icode = (int) GET_CODE (operands[0]); +++ +++ targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false); +++ PUT_CODE (operands[0], (enum rtx_code) icode); +++ }) ++ ++ (define_expand "cbranch4" ++ [(parallel ++ [(set (pc) ++- (if_then_else ++- (match_operator 0 "ordered_comparison_operator" ++- [(match_operand:ORDERED234 1 "register_operand" "") ++- (match_operand:ORDERED234 2 "nonmemory_operand" "")]) ++- (label_ref (match_operand 3 "" "")) ++- (pc))) ++- (clobber (match_scratch:QI 4 ""))])]) ++- ++-;; "*cbranchqi4" ++-;; "*cbranchqq4" "*cbranchuqq4" ++-(define_insn_and_split "*cbranch4" +++ (if_then_else (match_operator 0 "ordered_comparison_operator" +++ [(match_operand:ALL234 1 "register_operand") +++ (match_operand:ALL234 2 "nonmemory_operand")]) +++ (label_ref (match_operand 3)) +++ (pc))) +++ (clobber (match_scratch:QI 4))])] +++ "" +++ { +++ int icode = (int) GET_CODE (operands[0]); +++ +++ targetm.canonicalize_comparison (&icode, &operands[1], &operands[2], false); +++ PUT_CODE (operands[0], (enum rtx_code) icode); +++ }) +++ +++ +++;; "cbranchqi4_insn" +++;; "cbranchqq4_insn" "cbranchuqq4_insn" +++(define_insn_and_split "cbranch4_insn" ++ [(set (pc) ++ (if_then_else (match_operator 0 "ordered_comparison_operator" ++- [(match_operand:ALL1 1 "register_operand" "r ,r,d") +++ [(match_operand:ALL1 1 "register_operand" "r ,r,d") ++ (match_operand:ALL1 2 "nonmemory_operand" "Y00,r,i")]) ++- (label_ref (match_operand 3 "" "")) ++- (pc)))] +++ (label_ref (match_operand 3)) +++ (pc)))] ++ "" ++ "#" ++ "reload_completed" ++ [(set (reg:CC REG_CC) ++- (compare:CC (match_dup 1) (match_dup 2))) +++ (compare:CC (match_dup 1) (match_dup 2))) ++ (set (pc) ++ (if_then_else (match_op_dup 0 ++ [(reg:CC REG_CC) (const_int 0)]) ++ (label_ref (match_dup 3)) ++- (pc)))] ++- "") +++ (pc)))]) ++ ++-;; "*cbranchsi4" "*cbranchsq4" "*cbranchusq4" "*cbranchsa4" "*cbranchusa4" ++-(define_insn_and_split "*cbranch4" +++;; "cbranchsi4_insn" +++;; "cbranchsq4_insn" "cbranchusq4_insn" "cbranchsa4_insn" "cbranchusa4_insn" +++(define_insn_and_split "cbranch4_insn" ++ [(set (pc) ++- (if_then_else ++- (match_operator 0 "ordered_comparison_operator" ++- [(match_operand:ALL4 1 "register_operand" "r ,r ,d,r ,r") ++- (match_operand:ALL4 2 "nonmemory_operand" "Y00,r ,M,M ,n Ynn")]) ++- (label_ref (match_operand 3 "" "")) ++- (pc))) ++- (clobber (match_scratch:QI 4 "=X ,X ,X,&d,&d"))] +++ (if_then_else +++ (match_operator 0 "ordered_comparison_operator" +++ [(match_operand:ALL4 1 "register_operand" "r ,r,d,r ,r") +++ (match_operand:ALL4 2 "nonmemory_operand" "Y00,r,M,M ,n Ynn")]) +++ (label_ref (match_operand 3)) +++ (pc))) +++ (clobber (match_scratch:QI 4 "=X ,X,X,&d,&d"))] ++ "" ++ "#" ++ "reload_completed" ++@@ -6721,19 +6765,18 @@ (define_insn_and_split "*cbranch4" ++ (if_then_else (match_op_dup 0 ++ [(reg:CC REG_CC) (const_int 0)]) ++ (label_ref (match_dup 3)) ++- (pc)))] ++- "") +++ (pc)))]) ++ ++-;; "*cbranchpsi4" ++-(define_insn_and_split "*cbranchpsi4" +++;; "cbranchpsi4_insn" +++(define_insn_and_split "cbranchpsi4_insn" ++ [(set (pc) ++- (if_then_else ++- (match_operator 0 "ordered_comparison_operator" ++- [(match_operand:PSI 1 "register_operand" "r,r,d ,r ,d,r") ++- (match_operand:PSI 2 "nonmemory_operand" "L,r,s ,s ,M,n")]) ++- (label_ref (match_operand 3 "" "")) ++- (pc))) ++- (clobber (match_scratch:QI 4 "=X,X,&d,&d ,X,&d"))] +++ (if_then_else +++ (match_operator 0 "ordered_comparison_operator" +++ [(match_operand:PSI 1 "register_operand" "r,r,d ,r ,d,r") +++ (match_operand:PSI 2 "nonmemory_operand" "L,r,s ,s ,M,n")]) +++ (label_ref (match_operand 3)) +++ (pc))) +++ (clobber (match_scratch:QI 4 "=X,X,&d,&d,X,&d"))] ++ "" ++ "#" ++ "reload_completed" ++@@ -6744,19 +6787,19 @@ (define_insn_and_split "*cbranchpsi4" ++ (if_then_else (match_op_dup 0 ++ [(reg:CC REG_CC) (const_int 0)]) ++ (label_ref (match_dup 3)) ++- (pc)))] ++- "") +++ (pc)))]) ++ ++-;; "*cbranchhi4" "*cbranchhq4" "*cbranchuhq4" "*cbranchha4" "*cbranchuha4" ++-(define_insn_and_split "*cbranch4" +++;; "cbranchhi4_insn" +++;; "cbranchhq4_insn" "cbranchuhq4_insn" "cbranchha4_insn" "cbranchuha4_insn" +++(define_insn_and_split "cbranch4_insn" ++ [(set (pc) ++- (if_then_else ++- (match_operator 0 "ordered_comparison_operator" ++- [(match_operand:ALL2 1 "register_operand" "!w ,r ,r,d ,r ,d,r") ++- (match_operand:ALL2 2 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn")]) ++- (label_ref (match_operand 3 "" "")) ++- (pc))) ++- (clobber (match_scratch:QI 4 "=X ,X ,X,&d,&d ,X,&d"))] +++ (if_then_else +++ (match_operator 0 "ordered_comparison_operator" +++ [(match_operand:ALL2 1 "register_operand" "!w ,r ,r,d ,r ,d,r") +++ (match_operand:ALL2 2 "nonmemory_operand" "Y00,Y00,r,s ,s ,M,n Ynn")]) +++ (label_ref (match_operand 3)) +++ (pc))) +++ (clobber (match_scratch:QI 4 "=X ,X ,X,&d,&d,X,&d"))] ++ "" ++ "#" ++ "reload_completed" ++@@ -6767,8 +6810,71 @@ (define_insn_and_split "*cbranch4" ++ (if_then_else (match_op_dup 0 ++ [(reg:CC REG_CC) (const_int 0)]) ++ (label_ref (match_dup 3)) ++- (pc)))] ++- "") +++ (pc)))]) +++ +++;; Combiner pattern to compare sign- or zero-extended register against +++;; a wider register, like comparing uint8_t against uint16_t. +++(define_insn_and_split "*cbranch..0" +++ [(set (pc) +++ (if_then_else (match_operator 0 "ordered_comparison_operator" +++ [(any_extend:HISI (match_operand:QIPSI 1 "register_operand" "r")) +++ (match_operand:HISI 2 "register_operand" "r")]) +++ (label_ref (match_operand 3)) +++ (pc)))] +++ "optimize +++ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" +++ "#" +++ "&& reload_completed" +++ [; "*cmp..0" +++ (set (reg:CC REG_CC) +++ (compare:CC (match_dup 1) +++ (match_dup 2))) +++ ; "branch" +++ (set (pc) +++ (if_then_else (match_op_dup 0 [(reg:CC REG_CC) +++ (const_int 0)]) +++ (label_ref (match_dup 3)) +++ (pc)))] +++ { +++ operands[1] = gen_rtx_ (mode, operands[1]); +++ if (difficult_comparison_operator (operands[0], VOIDmode)) +++ { +++ PUT_CODE (operands[0], swap_condition (GET_CODE (operands[0]))); +++ std::swap (operands[1], operands[2]); +++ } +++ }) +++ +++;; Same combiner pattern, but with swapped operands. +++(define_insn_and_split "*cbranch..0" +++ [(set (pc) +++ (if_then_else (match_operator 0 "ordered_comparison_operator" +++ [(match_operand:HISI 1 "register_operand" "r") +++ (any_extend:HISI (match_operand:QIPSI 2 "register_operand" "r"))]) +++ (label_ref (match_operand 3)) +++ (pc)))] +++ "optimize +++ && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" +++ "#" +++ "&& reload_completed" +++ [; "*cmp..0" +++ (set (reg:CC REG_CC) +++ (compare:CC (match_dup 1) +++ (match_dup 2))) +++ ; "branch" +++ (set (pc) +++ (if_then_else (match_op_dup 0 [(reg:CC REG_CC) +++ (const_int 0)]) +++ (label_ref (match_dup 3)) +++ (pc)))] +++ { +++ operands[2] = gen_rtx_ (mode, operands[2]); +++ if (difficult_comparison_operator (operands[0], VOIDmode)) +++ { +++ PUT_CODE (operands[0], swap_condition (GET_CODE (operands[0]))); +++ std::swap (operands[1], operands[2]); +++ } +++ }) +++ ++ ++ ;; Test a single bit in a QI/HI/SImode register. ++ ;; Combine will create zero extract patterns for single bit tests. ++@@ -6842,14 +6948,11 @@ (define_insn_and_split "*sbrx_and_branch_split" ++ "#" ++ "&& reload_completed" ++ [(parallel [(set (pc) ++- (if_then_else ++- (match_op_dup 0 ++- [(and:QISI ++- (match_dup 1) ++- (match_dup 2)) ++- (const_int 0)]) ++- (label_ref (match_dup 3)) ++- (pc))) +++ (if_then_else (match_op_dup 0 [(and:QISI (match_dup 1) +++ (match_dup 2)) +++ (const_int 0)]) +++ (label_ref (match_dup 3)) +++ (pc))) ++ (clobber (reg:CC REG_CC))])]) ++ ++ (define_insn "*sbrx_and_branch" ++@@ -6878,163 +6981,77 @@ (define_insn "*sbrx_and_branch" ++ (const_int 2) ++ (const_int 4))))]) ++ ++-;; Convert sign tests to bit 7/15/31 tests that match the above insns. ++-(define_peephole2 ++- [(set (reg:CC REG_CC) (compare:CC (match_operand:QI 0 "register_operand" "") ++- (const_int 0))) ++- (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0)) ++- (label_ref (match_operand 1 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" ++- [(parallel [(set (pc) (if_then_else (eq (zero_extract:HI (match_dup 0) ++- (const_int 1) ++- (const_int 7)) ++- (const_int 0)) ++- (label_ref (match_dup 1)) ++- (pc))) ++- (clobber (reg:CC REG_CC))])]) ++ ++-(define_peephole2 ++- [(set (reg:CC REG_CC) (compare:CC (match_operand:QI 0 "register_operand" "") ++- (const_int 0))) ++- (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0)) ++- (label_ref (match_operand 1 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" ++- [(parallel [(set (pc) (if_then_else (ne (zero_extract:HI (match_dup 0) ++- (const_int 1) ++- (const_int 7)) ++- (const_int 0)) ++- (label_ref (match_dup 1)) ++- (pc))) ++- (clobber (reg:CC REG_CC))])]) ++- ++-(define_peephole2 ++- [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:HI 0 "register_operand" "") ++- (const_int 0))) ++- (clobber (match_operand:HI 2 ""))]) ++- (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0)) ++- (label_ref (match_operand 1 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" ++- [(parallel [(set (pc) (if_then_else (eq (and:HI (match_dup 0) (const_int -32768)) ++- (const_int 0)) ++- (label_ref (match_dup 1)) ++- (pc))) ++- (clobber (reg:CC REG_CC))])]) ++- ++-(define_peephole2 ++- [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:HI 0 "register_operand" "") ++- (const_int 0))) ++- (clobber (match_operand:HI 2 ""))]) ++- (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0)) ++- (label_ref (match_operand 1 "" "")) ++- (pc))) +++;; Convert sign tests to bit 7 tests that match the above insns. +++(define_peephole2 ; "*sbrx_branch" +++ [(set (reg:CC REG_CC) +++ (compare:CC (match_operand:ALLs1 0 "register_operand") +++ (match_operand:ALLs1 1 "const0_operand"))) +++ (set (pc) +++ (if_then_else (gelt (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 2)) +++ (pc)))] +++ "peep2_regno_dead_p (2, REG_CC)" +++ [(parallel [(set (pc) +++ (if_then_else ( (zero_extract:HI (match_dup 0) +++ (const_int 1) +++ (match_dup 1)) +++ (const_int 0)) +++ (label_ref (match_dup 2)) +++ (pc))) ++ (clobber (reg:CC REG_CC))])] ++- "" ++- [(parallel [(set (pc) (if_then_else (ne (and:HI (match_dup 0) (const_int -32768)) ++- (const_int 0)) ++- (label_ref (match_dup 1)) ++- (pc))) ++- (clobber (reg:CC REG_CC))])]) +++ { +++ operands[0] = avr_to_int_mode (operands[0]); +++ operands[1] = GEN_INT (GET_MODE_BITSIZE (mode) - 1); +++ }) ++ ++-(define_peephole2 ++- [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:SI 0 "register_operand" "") ++- (const_int 0))) ++- (clobber (match_operand:SI 2 ""))]) ++- (parallel [(set (pc) (if_then_else (ge (reg:CC REG_CC) (const_int 0)) ++- (label_ref (match_operand 1 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" ++- [(parallel [(set (pc) (if_then_else (eq (and:SI (match_dup 0) (match_dup 2)) ++- (const_int 0)) ++- (label_ref (match_dup 1)) ++- (pc))) +++;; Convert sign tests to bit 15/23/31 tests that match the above insns. +++(define_peephole2 ; "*sbrx_branch" +++ [(parallel [(set (reg:CC REG_CC) +++ (compare:CC (match_operand:ALLs234 0 "register_operand") +++ (match_operand:ALLs234 1 "const0_operand"))) +++ (clobber (match_operand:QI 3 "scratch_operand"))]) +++ (set (pc) +++ (if_then_else (gelt (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 2)) +++ (pc)))] +++ "peep2_regno_dead_p (2, REG_CC)" +++ [(parallel [(set (pc) +++ (if_then_else ( (zero_extract:HI (match_dup 0) +++ (const_int 1) +++ (match_dup 1)) +++ (const_int 0)) +++ (label_ref (match_dup 2)) +++ (pc))) ++ (clobber (reg:CC REG_CC))])] ++- "operands[2] = gen_int_mode (-2147483647 - 1, SImode);") +++ { +++ operands[0] = avr_to_int_mode (operands[0]); +++ operands[1] = GEN_INT (GET_MODE_BITSIZE (mode) - 1); +++ }) ++ ++-(define_peephole2 ++- [(parallel [(set (reg:CC REG_CC) (compare:CC (match_operand:SI 0 "register_operand" "") ++- (const_int 0))) ++- (clobber (match_operand:SI 2 ""))]) ++- (parallel [(set (pc) (if_then_else (lt (reg:CC REG_CC) (const_int 0)) ++- (label_ref (match_operand 1 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" ++- [(parallel [(set (pc) (if_then_else (ne (and:SI (match_dup 0) (match_dup 2)) ++- (const_int 0)) ++- (label_ref (match_dup 1)) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "operands[2] = gen_int_mode (-2147483647 - 1, SImode);") ++ ++ ;; ************************************************************************ ++ ;; Implementation of conditional jumps here. ++ ;; Compare with 0 (test) jumps ++ ;; ************************************************************************ ++ ++-(define_insn_and_split "branch" +++(define_insn "branch" ++ [(set (pc) ++ (if_then_else (match_operator 1 "simple_comparison_operator" ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (label_ref (match_operand 0 "" "")) +++ [(reg:CC REG_CC) +++ (const_int 0)]) +++ (label_ref (match_operand 0)) ++ (pc)))] ++ "reload_completed" ++- "#" ++- "&& reload_completed" ++- [(parallel [(set (pc) ++- (if_then_else (match_op_dup 1 ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (label_ref (match_dup 0)) ++- (pc))) ++- (clobber (reg:CC REG_CC))])]) ++- ++-(define_insn "*branch" ++- [(set (pc) ++- (if_then_else (match_operator 1 "simple_comparison_operator" ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (label_ref (match_operand 0 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))] ++- "reload_completed" ++- { ++- return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0); ++- } ++- [(set_attr "type" "branch")]) ++- ++- ++-;; Same as above but wrap SET_SRC so that this branch won't be transformed ++-;; or optimized in the remainder. ++- ++-(define_insn "branch_unspec" ++- [(set (pc) ++- (unspec [(if_then_else (match_operator 1 "simple_comparison_operator" ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (label_ref (match_operand 0 "" "")) ++- (pc)) ++- ] UNSPEC_IDENTITY)) ++- (clobber (reg:CC REG_CC))] ++- "reload_completed" ++ { ++ return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0); ++ } ++ [(set_attr "type" "branch")]) ++ ++-;; **************************************************************** ++-;; AVR does not have following conditional jumps: LE,LEU,GT,GTU. ++-;; Convert them all to proper jumps. ++-;; ****************************************************************/ ++ ++-(define_insn_and_split "difficult_branch" +++(define_insn "difficult_branch" ++ [(set (pc) ++ (if_then_else (match_operator 1 "difficult_comparison_operator" ++ [(reg:CC REG_CC) ++@@ -7042,95 +7059,11 @@ (define_insn_and_split "difficult_branch" ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "reload_completed" ++- "#" ++- "&& reload_completed" ++- [(parallel [(set (pc) ++- (if_then_else (match_op_dup 1 ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (label_ref (match_dup 0)) ++- (pc))) ++- (clobber (reg:CC REG_CC))])]) ++- ++-(define_insn "*difficult_branch" ++- [(set (pc) ++- (if_then_else (match_operator 1 "difficult_comparison_operator" ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (label_ref (match_operand 0 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))] ++- "reload_completed" ++ { ++ return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0); ++ } ++ [(set_attr "type" "branch1")]) ++ ++-;; revers branch ++- ++-(define_insn_and_split "rvbranch" ++- [(set (pc) ++- (if_then_else (match_operator 1 "simple_comparison_operator" ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (pc) ++- (label_ref (match_operand 0 "" ""))))] ++- "reload_completed" ++- "#" ++- "&& reload_completed" ++- [(parallel [(set (pc) ++- (if_then_else (match_op_dup 1 ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (pc) ++- (label_ref (match_dup 0)))) ++- (clobber (reg:CC REG_CC))])]) ++- ++-(define_insn "*rvbranch" ++- [(set (pc) ++- (if_then_else (match_operator 1 "simple_comparison_operator" ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (pc) ++- (label_ref (match_operand 0 "" "")))) ++- (clobber (reg:CC REG_CC))] ++- "reload_completed" ++- { ++- return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1); ++- } ++- [(set_attr "type" "branch1")]) ++- ++-(define_insn_and_split "difficult_rvbranch" ++- [(set (pc) ++- (if_then_else (match_operator 1 "difficult_comparison_operator" ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (pc) ++- (label_ref (match_operand 0 "" ""))))] ++- "reload_completed" ++- "#" ++- "&& reload_completed" ++- [(parallel [(set (pc) ++- (if_then_else (match_op_dup 1 ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (pc) ++- (label_ref (match_dup 0)))) ++- (clobber (reg:CC REG_CC))])]) ++- ++-(define_insn "*difficult_rvbranch" ++- [(set (pc) ++- (if_then_else (match_operator 1 "difficult_comparison_operator" ++- [(reg:CC REG_CC) ++- (const_int 0)]) ++- (pc) ++- (label_ref (match_operand 0 "" "")))) ++- (clobber (reg:CC REG_CC))] ++- "reload_completed" ++- { ++- return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1); ++- } ++- [(set_attr "type" "branch")]) ++ ++ ;; ************************************************************************** ++ ;; Unconditional and other jump instructions. ++@@ -7656,15 +7589,14 @@ (define_peephole ; "*dec-and-branchsi!=-1.d.clobber" ++ (clobber (reg:CC REG_CC))]) ++ (parallel [(set (reg:CC REG_CC) ++ (compare:CC (match_dup 0) ++- (const_int -1))) ++- (clobber (match_operand:QI 1 "d_register_operand" ""))]) ++- (parallel [(set (pc) ++- (if_then_else (eqne (reg:CC REG_CC) ++- (const_int 0)) ++- (label_ref (match_operand 2 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" +++ (const_int -1))) +++ (clobber (match_operand:QI 1 "scratch_or_d_register_operand"))]) +++ (set (pc) +++ (if_then_else (eqne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 2)) +++ (pc)))] +++ "dead_or_set_regno_p (insn, REG_CC)" ++ { ++ const char *op; ++ int jump_mode; ++@@ -7700,15 +7632,14 @@ (define_peephole ; "*dec-and-branchhi!=-1" ++ (clobber (reg:CC REG_CC))]) ++ (parallel [(set (reg:CC REG_CC) ++ (compare:CC (match_dup 0) ++- (const_int -1))) +++ (const_int -1))) ++ (clobber (match_operand:QI 1 "d_register_operand" ""))]) ++- (parallel [(set (pc) ++- (if_then_else (eqne (reg:CC REG_CC) ++- (const_int 0)) ++- (label_ref (match_operand 2 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" +++ (set (pc) +++ (if_then_else (eqne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 2)) +++ (pc)))] +++ "dead_or_set_regno_p (insn, REG_CC)" ++ { ++ const char *op; ++ int jump_mode; ++@@ -7742,15 +7673,14 @@ (define_peephole ; "*dec-and-branchhi!=-1.d.clobber" ++ (clobber (reg:CC REG_CC))]) ++ (parallel [(set (reg:CC REG_CC) ++ (compare:CC (match_dup 0) ++- (const_int -1))) ++- (clobber (match_operand:QI 1 "d_register_operand" ""))]) ++- (parallel [(set (pc) ++- (if_then_else (eqne (reg:CC REG_CC) ++- (const_int 0)) ++- (label_ref (match_operand 2 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" +++ (const_int -1))) +++ (clobber (match_operand:QI 1 "scratch_or_d_register_operand"))]) +++ (set (pc) +++ (if_then_else (eqne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 2)) +++ (pc)))] +++ "dead_or_set_regno_p (insn, REG_CC)" ++ { ++ const char *op; ++ int jump_mode; ++@@ -7784,15 +7714,14 @@ (define_peephole ; "*dec-and-branchhi!=-1.l.clobber" ++ (clobber (reg:CC REG_CC))]) ++ (parallel [(set (reg:CC REG_CC) ++ (compare:CC (match_dup 0) ++- (const_int -1))) +++ (const_int -1))) ++ (clobber (match_operand:QI 1 "d_register_operand" ""))]) ++- (parallel [(set (pc) ++- (if_then_else (eqne (reg:CC REG_CC) ++- (const_int 0)) ++- (label_ref (match_operand 2 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" +++ (set (pc) +++ (if_then_else (eqne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 2)) +++ (pc)))] +++ "dead_or_set_regno_p (insn, REG_CC)" ++ { ++ const char *op; ++ int jump_mode; ++@@ -7822,14 +7751,13 @@ (define_peephole ; "*dec-and-branchqi!=-1" ++ (clobber (reg:CC REG_CC))]) ++ (set (reg:CC REG_CC) ++ (compare:CC (match_dup 0) ++- (const_int -1))) ++- (parallel [(set (pc) ++- (if_then_else (eqne (reg:CC REG_CC) ++- (const_int 0)) ++- (label_ref (match_operand 1 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "" +++ (const_int -1))) +++ (set (pc) +++ (if_then_else (eqne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 1)) +++ (pc)))] +++ "dead_or_set_regno_p (insn, REG_CC)" ++ { ++ const char *op; ++ int jump_mode; ++@@ -7855,14 +7783,14 @@ (define_peephole ; "*dec-and-branchqi!=-1" ++ (define_peephole ; "*cpse.eq" ++ [(set (reg:CC REG_CC) ++ (compare:CC (match_operand:ALL1 1 "register_operand" "r,r") ++- (match_operand:ALL1 2 "reg_or_0_operand" "r,Y00"))) ++- (parallel [(set (pc) ++- (if_then_else (eq (reg:CC REG_CC) ++- (const_int 0)) ++- (label_ref (match_operand 0 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "jump_over_one_insn_p (insn, operands[0])" +++ (match_operand:ALL1 2 "reg_or_0_operand" "r,Y00"))) +++ (set (pc) +++ (if_then_else (eq (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 0)) +++ (pc)))] +++ "jump_over_one_insn_p (insn, operands[0]) +++ && dead_or_set_regno_p (insn, REG_CC)" ++ "@ ++ cpse %1,%2 ++ cpse %1,__zero_reg__") ++@@ -7890,16 +7818,16 @@ (define_peephole ; "*cpse.eq" ++ ++ (define_peephole ; "*cpse.ne" ++ [(set (reg:CC REG_CC) ++- (compare:CC (match_operand:ALL1 1 "register_operand" "") ++- (match_operand:ALL1 2 "reg_or_0_operand" ""))) ++- (parallel [(set (pc) ++- (if_then_else (ne (reg:CC REG_CC) ++- (const_int 0)) ++- (label_ref (match_operand 0 "" "")) ++- (pc))) ++- (clobber (reg:CC REG_CC))])] ++- "!AVR_HAVE_JMP_CALL ++- || !TARGET_SKIP_BUG" +++ (compare:CC (match_operand:ALL1 1 "register_operand") +++ (match_operand:ALL1 2 "reg_or_0_operand"))) +++ (set (pc) +++ (if_then_else (ne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 0)) +++ (pc)))] +++ "(!AVR_HAVE_JMP_CALL +++ || !TARGET_SKIP_BUG) +++ && dead_or_set_regno_p (insn, REG_CC)" ++ { ++ if (operands[2] == CONST0_RTX (mode)) ++ operands[2] = zero_reg_rtx; ++@@ -8094,7 +8022,7 @@ (define_insn_and_split "delay_cycles_1" ++ (const_int 1)] ++ UNSPECV_DELAY_CYCLES) ++ (set (match_dup 1) ++- (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) +++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) ++ (clobber (match_dup 2)) ++ (clobber (reg:CC REG_CC))])]) ++ ++@@ -8126,7 +8054,7 @@ (define_insn_and_split "delay_cycles_2" ++ (const_int 2)] ++ UNSPECV_DELAY_CYCLES) ++ (set (match_dup 1) ++- (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) +++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) ++ (clobber (match_dup 2)) ++ (clobber (reg:CC REG_CC))])] ++ "" ++@@ -8163,7 +8091,7 @@ (define_insn_and_split "delay_cycles_3" ++ (const_int 3)] ++ UNSPECV_DELAY_CYCLES) ++ (set (match_dup 1) ++- (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) +++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) ++ (clobber (match_dup 2)) ++ (clobber (match_dup 3)) ++ (clobber (match_dup 4)) ++@@ -8206,7 +8134,7 @@ (define_insn_and_split "delay_cycles_4" ++ (const_int 4)] ++ UNSPECV_DELAY_CYCLES) ++ (set (match_dup 1) ++- (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) +++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) ++ (clobber (match_dup 2)) ++ (clobber (match_dup 3)) ++ (clobber (match_dup 4)) ++@@ -9095,16 +9023,20 @@ (define_insn "*movbitqi.1-6.b" ++ "bst %3,0\;bld %0,%4" ++ [(set_attr "length" "2")]) ++ ++-;; Move bit $3.0 into bit $0.0. ++-;; For bit 0, combiner generates slightly different pattern. ++-(define_insn "*movbitqi.0" ++- [(set (match_operand:QI 0 "register_operand" "=r") ++- (ior:QI (and:QI (match_operand:QI 1 "register_operand" "0") ++- (match_operand:QI 2 "single_zero_operand" "n")) ++- (and:QI (match_operand:QI 3 "register_operand" "r") ++- (const_int 1))))] ++- "0 == exact_log2 (~INTVAL(operands[2]) & GET_MODE_MASK (QImode))" ++- "bst %3,0\;bld %0,0" +++;; Move bit $3.x into bit $0.x. +++(define_insn "*movbit.0-6" +++ [(set (match_operand:QISI 0 "register_operand" "=r") +++ (ior:QISI (and:QISI (match_operand:QISI 1 "register_operand" "0") +++ (match_operand:QISI 2 "single_zero_operand" "n")) +++ (and:QISI (match_operand:QISI 3 "register_operand" "r") +++ (match_operand:QISI 4 "single_one_operand" "n"))))] +++ "GET_MODE_MASK(mode) +++ == (GET_MODE_MASK(mode) & (INTVAL(operands[2]) ^ INTVAL(operands[4])))" +++ { +++ auto bitmask = GET_MODE_MASK (mode) & UINTVAL (operands[4]); +++ operands[4] = GEN_INT (exact_log2 (bitmask)); +++ return "bst %T3%T4" CR_TAB "bld %T0%T4"; +++ } ++ [(set_attr "length" "2")]) ++ ++ ;; Move bit $2.0 into bit $0.7. ++@@ -9489,6 +9421,258 @@ (define_peephole2 ++ (clobber (reg:CC REG_CC))])]) ++ ++ +++;; Try optimize decrement-and-branch. When we have an addition followed +++;; by a comparison of the result against zero, we can output the addition +++;; in such a way that SREG.N and SREG.Z are set according to the result. +++ +++;; { -1, +1 } for QImode, otherwise the empty set. +++(define_mode_attr p1m1 [(QI "N P") +++ (HI "Yxx") (PSI "Yxx") (SI "Yxx")]) +++ +++;; FIXME: reload1.cc::do_output_reload() does not support output reloads +++;; for JUMP_INSNs, hence letting combine doing decrement-and-branch like +++;; the following might run into ICE. Doing reloads by hand is too painful... +++; +++; (define_insn_and_split "*add.for.eqne..cbranch" +++; [(set (pc) +++; (if_then_else (eqne (match_operand:QISI 1 "register_operand" "0") +++; (match_operand:QISI 2 "const_int_operand" "n")) +++; (label_ref (match_operand 4)) +++; (pc))) +++; (set (match_operand:QISI 0 "register_operand" "=r") +++; (plus:QISI (match_dup 1) +++; (match_operand:QISI 3 "const_int_operand" "n")))] +++; ;; No clobber for now as combine might not have one handy. +++; ;; We pop a scatch in split1. +++; "!reload_completed +++; && const0_rtx == simplify_binary_operation (PLUS, mode, +++; operands[2], operands[3])" +++; { gcc_unreachable(); } +++; "&& 1" +++; [(parallel [(set (pc) +++; (if_then_else (eqne (match_dup 1) +++; (match_dup 2)) +++; (label_ref (match_dup 4)) +++; (pc))) +++; (set (match_dup 0) +++; (plus:QISI (match_dup 1) +++; (match_dup 3))) +++; (clobber (scratch:QI))])]) +++; +++;; ...Hence, stick with RTL peepholes for now. Unfortunately, there is no +++;; canonical form, and if reload shuffles registers around, we might miss +++;; opportunities to match a decrement-and-branch. +++;; doloop_end doesn't reload either, so doloop_end also won't work. +++ +++(define_expand "gen_add_for__" +++ ; "*add.for.eqne." +++ [(parallel [(set (reg:CC REG_CC) +++ (compare:CC (plus:QISI (match_operand:QISI 0 "register_operand") +++ (match_operand:QISI 1 "const_int_operand")) +++ (const_int 0))) +++ (set (match_dup 0) +++ (plus:QISI (match_dup 0) +++ (match_dup 1))) +++ (clobber (match_operand:QI 3))]) +++ ; "branch" +++ (set (pc) +++ (if_then_else (eqne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_dup 2)) +++ (pc)))]) +++ +++ +++;; 1/3: A version without clobber: d-reg or 8-bit adds +/-1. +++(define_peephole2 +++ [(parallel [(set (match_operand:QISI 0 "register_operand") +++ (plus:QISI (match_dup 0) +++ (match_operand:QISI 1 "const_int_operand"))) +++ (clobber (reg:CC REG_CC))]) +++ (set (reg:CC REG_CC) +++ (compare:CC (match_dup 0) +++ (const_int 0))) +++ (set (pc) +++ (if_then_else (eqne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 2)) +++ (pc)))] +++ "peep2_regno_dead_p (3, REG_CC) +++ && (d_register_operand (operands[0], mode) +++ || (mode == QImode +++ && (INTVAL (operands[1]) == 1 +++ || INTVAL (operands[1]) == -1)))" +++ [(scratch)] +++ { +++ emit (gen_gen_add_for__ (operands[0], operands[1], operands[2], +++ gen_rtx_SCRATCH (QImode))); +++ DONE; +++ }) +++ +++;; 2/3: A version with clobber from the insn. +++(define_peephole2 +++ [(parallel [(set (match_operand:QISI 0 "register_operand") +++ (plus:QISI (match_dup 0) +++ (match_operand:QISI 1 "const_int_operand"))) +++ (clobber (match_operand:QI 3 "scratch_or_d_register_operand")) +++ (clobber (reg:CC REG_CC))]) +++ (parallel [(set (reg:CC REG_CC) +++ (compare:CC (match_dup 0) +++ (const_int 0))) +++ (clobber (match_operand:QI 4 "scratch_or_d_register_operand"))]) +++ (set (pc) +++ (if_then_else (eqne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 2)) +++ (pc)))] +++ "peep2_regno_dead_p (3, REG_CC)" +++ [(scratch)] +++ { +++ rtx scratch = REG_P (operands[3]) ? operands[3] : operands[4]; +++ +++ // We need either a d-register or a scratch register to clobber. +++ if (! REG_P (scratch) +++ && ! d_register_operand (operands[0], mode) +++ && ! (QImode == mode +++ && (INTVAL (operands[1]) == 1 +++ || INTVAL (operands[1]) == -1))) +++ { +++ FAIL; +++ } +++ emit (gen_gen_add_for__ (operands[0], operands[1], operands[2], +++ scratch)); +++ DONE; +++ }) +++ +++;; 3/3 A version with a clobber from peephole2. +++(define_peephole2 +++ [(match_scratch:QI 3 "d") +++ (parallel [(set (match_operand:QISI 0 "register_operand") +++ (plus:QISI (match_dup 0) +++ (match_operand:QISI 1 "const_int_operand"))) +++ (clobber (reg:CC REG_CC))]) +++ (set (reg:CC REG_CC) +++ (compare:CC (match_dup 0) +++ (const_int 0))) +++ (set (pc) +++ (if_then_else (eqne (reg:CC REG_CC) +++ (const_int 0)) +++ (label_ref (match_operand 2)) +++ (pc)))] +++ "peep2_regno_dead_p (3, REG_CC)" +++ [(scratch)] +++ { +++ emit (gen_gen_add_for__ (operands[0], operands[1], operands[2], +++ operands[3])); +++ DONE; +++ }) +++ +++;; Result of the above three peepholes is an addition that also +++;; performs an EQ or NE comparison (of the result) against zero. +++;; FIXME: Using (match_dup 0) instead of operands[3/4] makes rnregs +++;; barf in regrename.cc::merge_overlapping_regs(). For now, use the +++;; fix from PR50788: Constrain as "0". +++(define_insn "*add.for.eqne." +++ [(set (reg:CC REG_CC) +++ (compare:CC +++ (plus:QISI (match_operand:QISI 3 "register_operand" "0,0 ,0") +++ (match_operand:QISI 1 "const_int_operand" "n,,n")) +++ (const_int 0))) +++ (set (match_operand:QISI 0 "register_operand" "=d,*r ,r") +++ (plus:QISI (match_operand:QISI 4 "register_operand" "0,0 ,0") +++ (match_dup 1))) +++ (clobber (match_scratch:QI 2 "=X,X ,&d"))] +++ "reload_completed" +++ { +++ return avr_out_plus_set_ZN (operands, nullptr); +++ } +++ [(set_attr "adjust_len" "add_set_ZN")]) +++ +++ +++;; Swapping both comparison and branch condition. This can turn difficult +++;; branches to easy ones. And in some cases, a comparison against one can +++;; be turned into a comparison against zero. +++ +++(define_peephole2 ; "*swapped_tst" +++ [(parallel [(set (reg:CC REG_CC) +++ (compare:CC (match_operand:ALLs234 1 "register_operand") +++ (match_operand:ALLs234 2 "const_operand"))) +++ (clobber (match_operand:QI 3 "scratch_operand"))]) +++ (set (pc) +++ (if_then_else (match_operator 0 "ordered_comparison_operator" +++ [(reg:CC REG_CC) +++ (const_int 0)]) +++ (label_ref (match_operand 4)) +++ (pc)))] +++ "peep2_regno_dead_p (2, REG_CC)" +++ [(set (reg:CC REG_CC) +++ (compare:CC (match_dup 2) +++ (match_dup 1))) +++ ; "branch" +++ (set (pc) +++ (if_then_else (match_op_dup 0 [(reg:CC REG_CC) +++ (const_int 0)]) +++ (label_ref (match_dup 4)) +++ (pc)))] +++ { +++ rtx xval = avr_to_int_mode (operands[2]); +++ enum rtx_code code = GET_CODE (operands[0]); +++ +++ if (code == GT && xval == const0_rtx) +++ code = LT; +++ else if (code == GE && xval == const1_rtx) +++ code = LT; +++ else if (code == LE && xval == const0_rtx) +++ code = GE; +++ else if (code == LT && xval == const1_rtx) +++ code = GE; +++ else +++ FAIL; +++ +++ operands[2] = CONST0_RTX (mode); +++ PUT_CODE (operands[0], code); +++ }) +++ +++;; Same, but for 8-bit modes which have no scratch reg. +++(define_peephole2 ; "*swapped_tst" +++ [(set (reg:CC REG_CC) +++ (compare:CC (match_operand:ALLs1 1 "register_operand") +++ (match_operand:ALLs1 2 "const_operand"))) +++ (set (pc) +++ (if_then_else (match_operator 0 "ordered_comparison_operator" +++ [(reg:CC REG_CC) +++ (const_int 0)]) +++ (label_ref (match_operand 4)) +++ (pc)))] +++ "peep2_regno_dead_p (2, REG_CC)" +++ [(set (reg:CC REG_CC) +++ (compare:CC (match_dup 2) +++ (match_dup 1))) +++ ; "branch" +++ (set (pc) +++ (if_then_else (match_op_dup 0 [(reg:CC REG_CC) +++ (const_int 0)]) +++ (label_ref (match_dup 4)) +++ (pc)))] +++ { +++ rtx xval = avr_to_int_mode (operands[2]); +++ enum rtx_code code = GET_CODE (operands[0]); +++ +++ if (code == GT && xval == const0_rtx) +++ code = LT; +++ else if (code == GE && xval == const1_rtx) +++ code = LT; +++ else if (code == LE && xval == const0_rtx) +++ code = GE; +++ else if (code == LT && xval == const1_rtx) +++ code = GE; +++ else +++ FAIL; +++ +++ operands[2] = CONST0_RTX (mode); +++ PUT_CODE (operands[0], code); +++ }) +++ +++ ++ (define_expand "extzv" ++ [(set (match_operand:QI 0 "register_operand" "") ++ (zero_extract:QI (match_operand:QI 1 "register_operand" "") ++--- a/src/gcc/config/avr/avr.opt +++++ b/src/gcc/config/avr/avr.opt ++@@ -27,7 +27,7 @@ Target RejectNegative Joined Var(avr_mmcu) MissingArgError(missing device or arc ++ -mmcu=MCU Select the target MCU. ++ ++ mgas-isr-prologues ++-Target Var(avr_gasisr_prologues) UInteger Init(0) +++Target Var(avr_gasisr_prologues) UInteger Init(0) Optimization ++ Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues. ++ ++ mn-flash= ++@@ -61,11 +61,11 @@ Target RejectNegative Mask(NO_INTERRUPTS) ++ Change the stack pointer without disabling interrupts. ++ ++ mbranch-cost= ++-Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0) +++Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0) Optimization ++ Set the branch costs for conditional branch instructions. Reasonable values are small, non-negative integers. The default branch cost is 0. ++ ++ mmain-is-OS_task ++-Target Mask(MAIN_IS_OS_TASK) +++Target Mask(MAIN_IS_OS_TASK) Optimization ++ Treat main as if it had attribute OS_task. ++ ++ morder1 ++@@ -116,11 +116,11 @@ Target Mask(ABSDATA) ++ Assume that all data in static storage can be accessed by LDS / STS. This option is only useful for reduced Tiny devices. ++ ++ mdouble= ++-Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e) +++Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e) Save ++ -mdouble= Use bits wide double type. ++ ++ mlong-double= ++-Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e) +++Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e) Save ++ -mlong-double= Use bits wide long double type. ++ ++ nodevicelib ++--- a/src/gcc/config/avr/constraints.md +++++ b/src/gcc/config/avr/constraints.md ++@@ -245,6 +245,11 @@ (define_constraint "Ym2" ++ (match_test "INTVAL (avr_to_int_mode (op)) == -2")) ++ (match_test "satisfies_constraint_Cm2 (op)"))) ++ +++;; Constraint that's the empty set. Useful with mode and code iterators. +++(define_constraint "Yxx" +++ "A constraints that is always false" +++ (match_test "false")) +++ ++ (define_constraint "Yx2" ++ "Fixed-point or integer constant not in the range @minus{}2 @dots{} 2" ++ (and (ior (match_code "const_int") ++--- a/src/gcc/config/avr/driver-avr.cc +++++ b/src/gcc/config/avr/driver-avr.cc ++@@ -103,9 +103,14 @@ avr_devicespecs_file (int argc, const char **argv) ++ } ++ ++ return concat ("%{!nodevicespecs:-specs=device-specs", dir_separator_str, ++- "specs-", mmcu, "%s} %= 16 && REGNO (op) <= 31"))) ++ +++(define_predicate "scratch_or_d_register_operand" +++ (ior (match_operand 0 "d_register_operand") +++ (and (match_code ("scratch")) +++ (match_operand 0 "scratch_operand")))) +++ ++ (define_predicate "even_register_operand" ++ (and (match_code "reg") ++ (and (match_test "REGNO (op) <= 31") ++--- a/src/gcc/config/i386/cygwin.h +++++ b/src/gcc/config/i386/cygwin.h ++@@ -57,7 +57,7 @@ along with GCC; see the file COPYING3. If not see ++ ++ #undef ENDFILE_SPEC ++ #define ENDFILE_SPEC \ ++- "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}\ +++ "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \ ++ %{!shared:%:if-exists(default-manifest.o%s)}\ ++ %{fvtable-verify=none:%s; \ ++ fvtable-verify=preinit:vtv_end.o%s; \ ++--- a/src/gcc/config/i386/darwin.h +++++ b/src/gcc/config/i386/darwin.h ++@@ -109,8 +109,8 @@ along with GCC; see the file COPYING3. If not see ++ "%{!force_cpusubtype_ALL:-force_cpusubtype_ALL} " ++ ++ #undef ENDFILE_SPEC ++-#define ENDFILE_SPEC \ ++- "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \ +++#define ENDFILE_SPEC +++\ "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \ ++ %{mpc32:crtprec32.o%s} \ ++ %{mpc64:crtprec64.o%s} \ ++ %{mpc80:crtprec80.o%s}" TM_DESTRUCTOR ++--- a/src/gcc/config/i386/gnu-user-common.h +++++ b/src/gcc/config/i386/gnu-user-common.h ++@@ -47,7 +47,7 @@ along with GCC; see the file COPYING3. If not see ++ ++ /* Similar to standard GNU userspace, but adding -ffast-math support. */ ++ #define GNU_USER_TARGET_MATHFILE_SPEC \ ++- "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \ +++ "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \ ++ %{mpc32:crtprec32.o%s} \ ++ %{mpc64:crtprec64.o%s} \ ++ %{mpc80:crtprec80.o%s}" ++--- a/src/gcc/config/i386/i386-builtins.cc +++++ b/src/gcc/config/i386/i386-builtins.cc ++@@ -1790,7 +1790,7 @@ ix86_vectorize_builtin_gather (const_tree mem_vectype, ++ ? !TARGET_USE_GATHER_2PARTS ++ : (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 4u) ++ ? !TARGET_USE_GATHER_4PARTS ++- : !TARGET_USE_GATHER))) +++ : !TARGET_USE_GATHER_8PARTS))) ++ return NULL_TREE; ++ ++ if ((TREE_CODE (index_type) != INTEGER_TYPE ++--- a/src/gcc/config/i386/i386-features.cc +++++ b/src/gcc/config/i386/i386-features.cc ++@@ -1875,8 +1875,7 @@ public: ++ /* opt_pass methods: */ ++ virtual bool gate (function *) ++ { ++- return TARGET_AVX && TARGET_VZEROUPPER ++- && flag_expensive_optimizations && !optimize_size; +++ return TARGET_AVX && TARGET_VZEROUPPER; ++ } ++ ++ virtual unsigned int execute (function *) ++--- a/src/gcc/config/i386/i386-options.cc +++++ b/src/gcc/config/i386/i386-options.cc ++@@ -137,6 +137,11 @@ along with GCC; see the file COPYING3. If not see ++ #define m_GOLDMONT_PLUS (HOST_WIDE_INT_1U<x_ix86_tune_string ++ = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_TUNE]); ++- else if (orig_tune_defaulted) +++ /* If we have explicit arch string and no tune string specified, set +++ tune_string to NULL and later it will be overriden by arch_string +++ so target clones can get proper optimization. */ +++ else if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH] +++ || orig_tune_defaulted) ++ opts->x_ix86_tune_string = NULL; ++ ++ /* If fpmath= is not set, and we now have sse2 on 32-bit, use it. */ ++@@ -1696,20 +1705,46 @@ parse_mtune_ctrl_str (struct gcc_options *opts, bool dump) ++ curr_feature_string++; ++ clear = true; ++ } ++- for (i = 0; i < X86_TUNE_LAST; i++) ++- { ++- if (!strcmp (curr_feature_string, ix86_tune_feature_names[i])) ++- { ++- ix86_tune_features[i] = !clear; ++- if (dump) ++- fprintf (stderr, "Explicitly %s feature %s\n", ++- clear ? "clear" : "set", ix86_tune_feature_names[i]); ++- break; ++- } ++- } ++- if (i == X86_TUNE_LAST) ++- error ("unknown parameter to option %<-mtune-ctrl%>: %s", ++- clear ? curr_feature_string - 1 : curr_feature_string); +++ +++ if (!strcmp (curr_feature_string, "use_gather")) +++ { +++ ix86_tune_features[X86_TUNE_USE_GATHER_2PARTS] = !clear; +++ ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS] = !clear; +++ ix86_tune_features[X86_TUNE_USE_GATHER_8PARTS] = !clear; +++ if (dump) +++ fprintf (stderr, "Explicitly %s features use_gather_2parts," +++ " use_gather_4parts, use_gather_8parts\n", +++ clear ? "clear" : "set"); +++ +++ } +++ else if (!strcmp (curr_feature_string, "use_scatter")) +++ { +++ ix86_tune_features[X86_TUNE_USE_SCATTER_2PARTS] = !clear; +++ ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS] = !clear; +++ ix86_tune_features[X86_TUNE_USE_SCATTER_8PARTS] = !clear; +++ if (dump) +++ fprintf (stderr, "Explicitly %s features use_scatter_2parts," +++ " use_scatter_4parts, use_scatter_8parts\n", +++ clear ? "clear" : "set"); +++ } +++ else +++ { +++ for (i = 0; i < X86_TUNE_LAST; i++) +++ { +++ if (!strcmp (curr_feature_string, ix86_tune_feature_names[i])) +++ { +++ ix86_tune_features[i] = !clear; +++ if (dump) +++ fprintf (stderr, "Explicitly %s feature %s\n", +++ clear ? "clear" : "set", ix86_tune_feature_names[i]); +++ break; +++ } +++ } +++ +++ if (i == X86_TUNE_LAST) +++ error ("unknown parameter to option %<-mtune-ctrl%>: %s", +++ clear ? curr_feature_string - 1 : curr_feature_string); +++ } ++ curr_feature_string = next_feature_string; ++ } ++ while (curr_feature_string); ++@@ -2676,7 +2711,9 @@ ix86_option_override_internal (bool main_args_p, ++ sorry ("%<-mcall-ms2sysv-xlogues%> isn%'t currently supported with SEH"); ++ ++ if (!(opts_set->x_target_flags & MASK_VZEROUPPER) ++- && TARGET_EMIT_VZEROUPPER) +++ && TARGET_EMIT_VZEROUPPER +++ && flag_expensive_optimizations +++ && !optimize_size) ++ opts->x_target_flags |= MASK_VZEROUPPER; ++ if (!(opts_set->x_target_flags & MASK_STV)) ++ opts->x_target_flags |= MASK_STV; ++--- a/src/gcc/config/i386/i386.cc +++++ b/src/gcc/config/i386/i386.cc ++@@ -8268,10 +8268,11 @@ ix86_elim_entry_set_got (rtx reg) ++ rtx pat = PATTERN (c_insn); ++ if (GET_CODE (pat) == PARALLEL) ++ { ++- rtx vec = XVECEXP (pat, 0, 0); ++- if (GET_CODE (vec) == SET ++- && XINT (XEXP (vec, 1), 1) == UNSPEC_SET_GOT ++- && REGNO (XEXP (vec, 0)) == REGNO (reg)) +++ rtx set = XVECEXP (pat, 0, 0); +++ if (GET_CODE (set) == SET +++ && GET_CODE (SET_SRC (set)) == UNSPEC +++ && XINT (SET_SRC (set), 1) == UNSPEC_SET_GOT +++ && REGNO (SET_DEST (set)) == REGNO (reg)) ++ delete_insn (c_insn); ++ } ++ } ++@@ -12238,8 +12239,8 @@ output_pic_addr_const (FILE *file, rtx x, int code) ++ assemble_name (asm_out_file, buf); ++ break; ++ ++- case CONST_INT: ++- fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); +++ CASE_CONST_SCALAR_INT: +++ output_addr_const (file, x); ++ break; ++ ++ case CONST: ++@@ -14416,8 +14417,12 @@ ix86_avx_u128_mode_needed (rtx_insn *insn) ++ modes wider than 256 bits. It's only safe to issue a ++ vzeroupper if all SSE registers are clobbered. */ ++ const function_abi &abi = insn_callee_abi (insn); ++- if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS], ++- abi.mode_clobbers (V4DImode))) +++ /* Should be safe to issue an vzeroupper before sibling_call_p. +++ Also there not mode_exit for sibling_call, so there could be +++ missing vzeroupper for that. */ +++ if (!(SIBLING_CALL_P (insn) +++ || hard_reg_set_subset_p (reg_class_contents[SSE_REGS], +++ abi.mode_clobbers (V4DImode)))) ++ return AVX_U128_ANY; ++ ++ return AVX_U128_CLEAN; ++@@ -14555,7 +14560,19 @@ ix86_avx_u128_mode_after (int mode, rtx_insn *insn) ++ bool avx_upper_reg_found = false; ++ note_stores (insn, ix86_check_avx_upper_stores, &avx_upper_reg_found); ++ ++- return avx_upper_reg_found ? AVX_U128_DIRTY : AVX_U128_CLEAN; +++ if (avx_upper_reg_found) +++ return AVX_U128_DIRTY; +++ +++ /* If the function desn't clobber any sse registers or only clobber +++ 128-bit part, Then vzeroupper isn't issued before the function exit. +++ the status not CLEAN but ANY after the function. */ +++ const function_abi &abi = insn_callee_abi (insn); +++ if (!(SIBLING_CALL_P (insn) +++ || hard_reg_set_subset_p (reg_class_contents[SSE_REGS], +++ abi.mode_clobbers (V4DImode)))) +++ return AVX_U128_ANY; +++ +++ return AVX_U128_CLEAN; ++ } ++ ++ /* Otherwise, return current mode. Remember that if insn ++@@ -18396,8 +18413,10 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi) ++ tree itype = GET_MODE_INNER (TYPE_MODE (type)) == E_SFmode ++ ? intSI_type_node : intDI_type_node; ++ type = get_same_sized_vectype (itype, type); ++- arg2 = gimple_build (&stmts, VIEW_CONVERT_EXPR, type, arg2); ++ } +++ else +++ type = signed_type_for (type); +++ arg2 = gimple_build (&stmts, VIEW_CONVERT_EXPR, type, arg2); ++ tree zero_vec = build_zero_cst (type); ++ tree cmp_type = truth_type_for (type); ++ tree cmp = gimple_build (&stmts, LT_EXPR, cmp_type, arg2, zero_vec); ++@@ -18935,7 +18954,7 @@ ix86_vectorize_builtin_scatter (const_tree vectype, ++ ? !TARGET_USE_SCATTER_2PARTS ++ : (known_eq (TYPE_VECTOR_SUBPARTS (vectype), 4u) ++ ? !TARGET_USE_SCATTER_4PARTS ++- : !TARGET_USE_SCATTER)) +++ : !TARGET_USE_SCATTER_8PARTS)) ++ return NULL_TREE; ++ ++ if ((TREE_CODE (index_type) != INTEGER_TYPE ++--- a/src/gcc/config/i386/i386.h +++++ b/src/gcc/config/i386/i386.h ++@@ -398,10 +398,10 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST]; ++ ix86_tune_features[X86_TUNE_USE_GATHER_4PARTS] ++ #define TARGET_USE_SCATTER_4PARTS \ ++ ix86_tune_features[X86_TUNE_USE_SCATTER_4PARTS] ++-#define TARGET_USE_GATHER \ ++- ix86_tune_features[X86_TUNE_USE_GATHER] ++-#define TARGET_USE_SCATTER \ ++- ix86_tune_features[X86_TUNE_USE_SCATTER] +++#define TARGET_USE_GATHER_8PARTS \ +++ ix86_tune_features[X86_TUNE_USE_GATHER_8PARTS] +++#define TARGET_USE_SCATTER_8PARTS \ +++ ix86_tune_features[X86_TUNE_USE_SCATTER_8PARTS] ++ #define TARGET_FUSE_CMP_AND_BRANCH_32 \ ++ ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_32] ++ #define TARGET_FUSE_CMP_AND_BRANCH_64 \ ++--- a/src/gcc/config/i386/i386.md +++++ b/src/gcc/config/i386/i386.md ++@@ -2398,7 +2398,10 @@ (define_peephole2 ++ (clobber (reg:CC FLAGS_REG))])] ++ { ++ int shift = ctz_hwi (UINTVAL (operands[1])); ++- operands[1] = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode); +++ rtx op1 = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode); +++ if (ix86_endbr_immediate_operand (op1, VOIDmode)) +++ FAIL; +++ operands[1] = op1; ++ operands[2] = gen_int_mode (shift, QImode); ++ }) ++ ++@@ -3582,9 +3585,9 @@ (define_split ++ ;; Possible store forwarding (partial memory) stall in alternatives 4, 6 and 7. ++ (define_insn "*movdf_internal" ++ [(set (match_operand:DF 0 "nonimmediate_operand" ++- "=Yf*f,m ,Yf*f,?r ,!o,?*r ,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,r ,v,r ,o ,r ,m") +++ "=Yf*f,m ,Yf*f,?r ,!o,?*r ,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,?r,?v,r ,o ,r ,m") ++ (match_operand:DF 1 "general_operand" ++- "Yf*fm,Yf*f,G ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x,v,r ,roF,rF,rmF,rC"))] +++ "Yf*fm,Yf*f,G ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x, v, r,roF,rF,rmF,rC"))] ++ "!(MEM_P (operands[0]) && MEM_P (operands[1])) ++ && (lra_in_progress || reload_completed ++ || !CONST_DOUBLE_P (operands[1]) ++@@ -14160,7 +14163,8 @@ (define_insn_and_split "*jcc_bt_mask" ++ (const_int 1) ++ (and:SI ++ (match_operand:SI 2 "register_operand") ++- (match_operand 3 "const_int_operand")))]) +++ (match_operand 3 "const_int_operand"))) +++ (const_int 0)]) ++ (label_ref (match_operand 4)) ++ (pc))) ++ (clobber (reg:CC FLAGS_REG))] ++@@ -17066,8 +17070,10 @@ (define_expand "parityhi2" ++ "! TARGET_POPCNT" ++ { ++ rtx scratch = gen_reg_rtx (QImode); +++ rtx tmp = gen_reg_rtx (HImode); ++ ++- emit_insn (gen_parityhi2_cmp (operands[1])); +++ emit_move_insn (tmp, operands[1]); +++ emit_insn (gen_parityhi2_cmp (tmp)); ++ ++ ix86_expand_setcc (scratch, ORDERED, ++ gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx); ++--- a/src/gcc/config/i386/i386.opt +++++ b/src/gcc/config/i386/i386.opt ++@@ -420,6 +420,10 @@ mpc80 ++ Target RejectNegative ++ Set 80387 floating-point precision to 80-bit. ++ +++mdaz-ftz +++Target +++Set the FTZ and DAZ Flags. +++ ++ mpreferred-stack-boundary= ++ Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg) ++ Attempt to keep stack aligned to this power of 2. ++@@ -1214,3 +1218,11 @@ Do not use GOT to access external symbols. ++ -param=x86-stlf-window-ninsns= ++ Target Joined UInteger Var(x86_stlf_window_ninsns) Init(64) Param ++ Instructions number above which STFL stall penalty can be compensated. +++ +++mgather +++Target Alias(mtune-ctrl=, use_gather, ^use_gather) +++Enable vectorization for gather instruction. +++ +++mscatter +++Target Alias(mtune-ctrl=, use_scatter, ^use_scatter) +++Enable vectorization for scatter instruction. ++--- a/src/gcc/config/i386/mingw32.h +++++ b/src/gcc/config/i386/mingw32.h ++@@ -197,7 +197,7 @@ along with GCC; see the file COPYING3. If not see ++ ++ #undef ENDFILE_SPEC ++ #define ENDFILE_SPEC \ ++- "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \ +++ "%{mdaz-ftz:crtfastmath.o%s;Ofast|ffast-math|funsafe-math-optimizations:%{!mno-daz-ftz:crtfastmath.o%s}} \ ++ %{!shared:%:if-exists(default-manifest.o%s)}\ ++ %{fvtable-verify=none:%s; \ ++ fvtable-verify=preinit:vtv_end.o%s; \ ++--- a/src/gcc/config/i386/mmx.md +++++ b/src/gcc/config/i386/mmx.md ++@@ -1211,7 +1211,10 @@ (define_expand "signbitv2sf2" ++ (match_operand:V2SF 1 "register_operand") 0) ++ (match_dup 2)))] ++ "TARGET_MMX_WITH_SSE" ++- "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1);") +++{ +++ operands[1] = force_reg (V2SFmode, operands[1]); +++ operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (V2SFmode)-1); +++}) ++ ++ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ;; ++--- a/src/gcc/config/i386/sse.md +++++ b/src/gcc/config/i386/sse.md ++@@ -1411,12 +1411,12 @@ (define_expand "_load_mask" ++ }) ++ ++ (define_insn "*_load_mask" ++- [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v") ++- (vec_merge:VI12_AVX512VL ++- (unspec:VI12_AVX512VL ++- [(match_operand:VI12_AVX512VL 1 "memory_operand" "m")] +++ [(set (match_operand:VI12HF_AVX512VL 0 "register_operand" "=v") +++ (vec_merge:VI12HF_AVX512VL +++ (unspec:VI12HF_AVX512VL +++ [(match_operand:VI12HF_AVX512VL 1 "memory_operand" "m")] ++ UNSPEC_MASKLOAD) ++- (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C") +++ (match_operand:VI12HF_AVX512VL 2 "nonimm_or_0_operand" "0C") ++ (match_operand: 3 "register_operand" "Yk")))] ++ "TARGET_AVX512BW" ++ "vmovdqu\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}" ++@@ -1425,9 +1425,9 @@ (define_insn "*_load_mask" ++ (set_attr "mode" "")]) ++ ++ (define_insn_and_split "*_load" ++- [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v") ++- (unspec:VI12_AVX512VL ++- [(match_operand:VI12_AVX512VL 1 "memory_operand" "m")] +++ [(set (match_operand:VI12HF_AVX512VL 0 "register_operand" "=v") +++ (unspec:VI12HF_AVX512VL +++ [(match_operand:VI12HF_AVX512VL 1 "memory_operand" "m")] ++ UNSPEC_MASKLOAD))] ++ "TARGET_AVX512BW" ++ "#" ++@@ -1554,7 +1554,7 @@ (define_insn "_blendm" ++ (set_attr "prefix" "evex") ++ (set_attr "mode" "")]) ++ ++-(define_insn "_store_mask" +++(define_insn "*_store_mask" ++ [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m") ++ (vec_merge:V48_AVX512VL ++ (match_operand:V48_AVX512VL 1 "register_operand" "v") ++@@ -1582,7 +1582,7 @@ (define_insn "_store_mask" ++ (set_attr "memory" "store") ++ (set_attr "mode" "")]) ++ ++-(define_insn "_store_mask" +++(define_insn "*_store_mask" ++ [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m") ++ (vec_merge:VI12HF_AVX512VL ++ (match_operand:VI12HF_AVX512VL 1 "register_operand" "v") ++@@ -4848,7 +4848,10 @@ (define_expand "signbit2" ++ (match_operand:VF1_AVX2 1 "register_operand") 0) ++ (match_dup 2)))] ++ "TARGET_SSE2" ++- "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (mode)-1);") +++{ +++ operands[1] = force_reg (mode, operands[1]); +++ operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (mode)-1); +++}) ++ ++ ;; Also define scalar versions. These are used for abs, neg, and ++ ;; conditional move. Using subregs into vector modes causes register ++@@ -6318,6 +6321,14 @@ (define_int_attr complexpairopname ++ [(UNSPEC_COMPLEX_FMA_PAIR "fmaddc") ++ (UNSPEC_COMPLEX_FCMA_PAIR "fcmaddc")]) ++ +++(define_int_attr int_comm +++ [(UNSPEC_COMPLEX_FMA "") +++ (UNSPEC_COMPLEX_FMA_PAIR "") +++ (UNSPEC_COMPLEX_FCMA "") +++ (UNSPEC_COMPLEX_FCMA_PAIR "") +++ (UNSPEC_COMPLEX_FMUL "%") +++ (UNSPEC_COMPLEX_FCMUL "")]) +++ ++ (define_int_attr conj_op ++ [(UNSPEC_COMPLEX_FMA "") ++ (UNSPEC_COMPLEX_FCMA "_conj") ++@@ -6431,7 +6442,7 @@ (define_expand "cmla4" ++ (define_insn "fma__" ++ [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v") ++ (unspec:VF_AVX512FP16VL ++- [(match_operand:VF_AVX512FP16VL 1 "" "%v") +++ [(match_operand:VF_AVX512FP16VL 1 "" "v") ++ (match_operand:VF_AVX512FP16VL 2 "" "") ++ (match_operand:VF_AVX512FP16VL 3 "" "0")] ++ UNSPEC_COMPLEX_F_C_MA))] ++@@ -6495,7 +6506,7 @@ (define_insn_and_split "fma___fma_zero" ++ (define_insn "fma___pair" ++ [(set (match_operand:VF1_AVX512VL 0 "register_operand" "=&v") ++ (unspec:VF1_AVX512VL ++- [(match_operand:VF1_AVX512VL 1 "vector_operand" "%v") +++ [(match_operand:VF1_AVX512VL 1 "vector_operand" "v") ++ (match_operand:VF1_AVX512VL 2 "bcst_vector_operand" "vmBr") ++ (match_operand:VF1_AVX512VL 3 "vector_operand" "0")] ++ UNSPEC_COMPLEX_F_C_MA_PAIR))] ++@@ -6562,7 +6573,7 @@ (define_insn "___mask" ++ [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v") ++ (vec_merge:VF_AVX512FP16VL ++ (unspec:VF_AVX512FP16VL ++- [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "%v") +++ [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "v") ++ (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "") ++ (match_operand:VF_AVX512FP16VL 3 "register_operand" "0")] ++ UNSPEC_COMPLEX_F_C_MA) ++@@ -6586,7 +6597,7 @@ (define_expand "cmul3" ++ (define_insn "__" ++ [(set (match_operand:VF_AVX512FP16VL 0 "register_operand" "=&v") ++ (unspec:VF_AVX512FP16VL ++- [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "%v") +++ [(match_operand:VF_AVX512FP16VL 1 "nonimmediate_operand" "v") ++ (match_operand:VF_AVX512FP16VL 2 "nonimmediate_operand" "")] ++ UNSPEC_COMPLEX_F_C_MUL))] ++ "TARGET_AVX512FP16 && " ++@@ -16350,7 +16361,7 @@ (define_insn_and_split "*avx2_pcmp3_4" ++ (match_dup 4))] ++ UNSPEC_BLENDV))] ++ { ++- if (INTVAL (operands[5]) == 1) +++ if (INTVAL (operands[5]) == 5) ++ std::swap (operands[1], operands[2]); ++ operands[3] = gen_lowpart (mode, operands[3]); ++ }) ++@@ -16380,7 +16391,7 @@ (define_insn_and_split "*avx2_pcmp3_5" ++ (match_dup 4))] ++ UNSPEC_BLENDV))] ++ { ++- if (INTVAL (operands[5]) == 1) +++ if (INTVAL (operands[5]) == 5) ++ std::swap (operands[1], operands[2]); ++ }) ++ ++@@ -25973,17 +25984,21 @@ (define_expand "maskload" ++ "TARGET_AVX") ++ ++ (define_expand "maskload" ++- [(set (match_operand:V48H_AVX512VL 0 "register_operand") ++- (vec_merge:V48H_AVX512VL ++- (match_operand:V48H_AVX512VL 1 "memory_operand") +++ [(set (match_operand:V48_AVX512VL 0 "register_operand") +++ (vec_merge:V48_AVX512VL +++ (unspec:V48_AVX512VL +++ [(match_operand:V48_AVX512VL 1 "memory_operand")] +++ UNSPEC_MASKLOAD) ++ (match_dup 0) ++ (match_operand: 2 "register_operand")))] ++ "TARGET_AVX512F") ++ ++ (define_expand "maskload" ++- [(set (match_operand:VI12_AVX512VL 0 "register_operand") ++- (vec_merge:VI12_AVX512VL ++- (match_operand:VI12_AVX512VL 1 "memory_operand") +++ [(set (match_operand:VI12HF_AVX512VL 0 "register_operand") +++ (vec_merge:VI12HF_AVX512VL +++ (unspec:VI12HF_AVX512VL +++ [(match_operand:VI12HF_AVX512VL 1 "memory_operand")] +++ UNSPEC_MASKLOAD) ++ (match_dup 0) ++ (match_operand: 2 "register_operand")))] ++ "TARGET_AVX512BW") ++@@ -25998,21 +26013,66 @@ (define_expand "maskstore" ++ "TARGET_AVX") ++ ++ (define_expand "maskstore" ++- [(set (match_operand:V48H_AVX512VL 0 "memory_operand") ++- (vec_merge:V48H_AVX512VL ++- (match_operand:V48H_AVX512VL 1 "register_operand") ++- (match_dup 0) ++- (match_operand: 2 "register_operand")))] +++ [(set (match_operand:V48_AVX512VL 0 "memory_operand") +++ (unspec:V48_AVX512VL +++ [(match_operand:V48_AVX512VL 1 "register_operand") +++ (match_dup 0) +++ (match_operand: 2 "register_operand")] +++ UNSPEC_MASKMOV))] ++ "TARGET_AVX512F") ++ ++ (define_expand "maskstore" ++- [(set (match_operand:VI12_AVX512VL 0 "memory_operand") ++- (vec_merge:VI12_AVX512VL ++- (match_operand:VI12_AVX512VL 1 "register_operand") ++- (match_dup 0) ++- (match_operand: 2 "register_operand")))] +++ [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand") +++ (unspec:VI12HF_AVX512VL +++ [(match_operand:VI12HF_AVX512VL 1 "register_operand") +++ (match_dup 0) +++ (match_operand: 2 "register_operand")] +++ UNSPEC_MASKMOV))] ++ "TARGET_AVX512BW") ++ +++(define_insn "_store_mask" +++ [(set (match_operand:V48_AVX512VL 0 "memory_operand" "=m") +++ (unspec:V48_AVX512VL +++ [(match_operand:V48_AVX512VL 1 "register_operand" "v") +++ (match_dup 0) +++ (match_operand: 2 "register_operand" "Yk")] +++ UNSPEC_MASKMOV))] +++ "TARGET_AVX512F" +++{ +++ if (FLOAT_MODE_P (GET_MODE_INNER (mode))) +++ { +++ if (misaligned_operand (operands[0], mode)) +++ return "vmovu\t{%1, %0%{%2%}|%0%{%2%}, %1}"; +++ else +++ return "vmova\t{%1, %0%{%2%}|%0%{%2%}, %1}"; +++ } +++ else +++ { +++ if (misaligned_operand (operands[0], mode)) +++ return "vmovdqu\t{%1, %0%{%2%}|%0%{%2%}, %1}"; +++ else +++ return "vmovdqa\t{%1, %0%{%2%}|%0%{%2%}, %1}"; +++ } +++} +++ [(set_attr "type" "ssemov") +++ (set_attr "prefix" "evex") +++ (set_attr "memory" "store") +++ (set_attr "mode" "")]) +++ +++(define_insn "_store_mask" +++ [(set (match_operand:VI12HF_AVX512VL 0 "memory_operand" "=m") +++ (unspec:VI12HF_AVX512VL +++ [(match_operand:VI12HF_AVX512VL 1 "register_operand" "v") +++ (match_dup 0) +++ (match_operand: 2 "register_operand" "Yk")] +++ UNSPEC_MASKMOV))] +++ "TARGET_AVX512BW" +++ "vmovdqu\t{%1, %0%{%2%}|%0%{%2%}, %1}" +++ [(set_attr "type" "ssemov") +++ (set_attr "prefix" "evex") +++ (set_attr "memory" "store") +++ (set_attr "mode" "")]) +++ ++ (define_expand "cbranch4" ++ [(set (reg:CC FLAGS_REG) ++ (compare:CC (match_operand:VI48_AVX 1 "register_operand") ++--- a/src/gcc/config/i386/x86-tune.def +++++ b/src/gcc/config/i386/x86-tune.def ++@@ -467,7 +467,8 @@ DEF_TUNE (X86_TUNE_AVOID_4BYTE_PREFIXES, "avoid_4byte_prefixes", ++ /* X86_TUNE_USE_GATHER_2PARTS: Use gather instructions for vectors with 2 ++ elements. */ ++ DEF_TUNE (X86_TUNE_USE_GATHER_2PARTS, "use_gather_2parts", ++- ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE | m_GENERIC)) +++ ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE +++ | m_GENERIC | m_GDS)) ++ ++ /* X86_TUNE_USE_SCATTER_2PARTS: Use scater instructions for vectors with 2 ++ elements. */ ++@@ -477,7 +478,8 @@ DEF_TUNE (X86_TUNE_USE_SCATTER_2PARTS, "use_scatter_2parts", ++ /* X86_TUNE_USE_GATHER_4PARTS: Use gather instructions for vectors with 4 ++ elements. */ ++ DEF_TUNE (X86_TUNE_USE_GATHER_4PARTS, "use_gather_4parts", ++- ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE | m_GENERIC)) +++ ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER3 | m_ZNVER4 | m_ALDERLAKE +++ | m_GENERIC | m_GDS)) ++ ++ /* X86_TUNE_USE_SCATTER_4PARTS: Use scater instructions for vectors with 4 ++ elements. */ ++@@ -486,12 +488,13 @@ DEF_TUNE (X86_TUNE_USE_SCATTER_4PARTS, "use_scatter_4parts", ++ ++ /* X86_TUNE_USE_GATHER: Use gather instructions for vectors with 8 or more ++ elements. */ ++-DEF_TUNE (X86_TUNE_USE_GATHER, "use_gather", ++- ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER4 | m_ALDERLAKE | m_GENERIC)) +++DEF_TUNE (X86_TUNE_USE_GATHER_8PARTS, "use_gather_8parts", +++ ~(m_ZNVER1 | m_ZNVER2 | m_ZNVER4 | m_ALDERLAKE +++ | m_GENERIC | m_GDS)) ++ ++ /* X86_TUNE_USE_SCATTER: Use scater instructions for vectors with 8 or more ++ elements. */ ++-DEF_TUNE (X86_TUNE_USE_SCATTER, "use_scatter", +++DEF_TUNE (X86_TUNE_USE_SCATTER_8PARTS, "use_scatter_8parts", ++ ~(m_ZNVER4)) ++ ++ /* X86_TUNE_AVOID_128FMA_CHAINS: Avoid creating loops with tight 128bit or ++--- a/src/gcc/config/loongarch/gnu-user.h +++++ b/src/gcc/config/loongarch/gnu-user.h ++@@ -33,9 +33,14 @@ along with GCC; see the file COPYING3. If not see ++ #define GLIBC_DYNAMIC_LINKER \ ++ "/lib" ABI_GRLEN_SPEC "/ld-linux-loongarch-" ABI_SPEC ".so.1" ++ +++#define MUSL_ABI_SPEC \ +++ "%{mabi=lp64d:}" \ +++ "%{mabi=lp64f:-sp}" \ +++ "%{mabi=lp64s:-sf}" +++ ++ #undef MUSL_DYNAMIC_LINKER ++ #define MUSL_DYNAMIC_LINKER \ ++- "/lib" ABI_GRLEN_SPEC "/ld-musl-loongarch-" ABI_SPEC ".so.1" +++ "/lib/ld-musl-loongarch" ABI_GRLEN_SPEC MUSL_ABI_SPEC ".so.1" ++ ++ #undef GNU_USER_TARGET_LINK_SPEC ++ #define GNU_USER_TARGET_LINK_SPEC \ ++--- a/src/gcc/config/loongarch/loongarch.cc +++++ b/src/gcc/config/loongarch/loongarch.cc ++@@ -1098,7 +1098,9 @@ loongarch_first_stack_step (struct loongarch_frame_info *frame) ++ static void ++ loongarch_emit_stack_tie (void) ++ { ++- emit_insn (gen_stack_tie (Pmode, stack_pointer_rtx, hard_frame_pointer_rtx)); +++ emit_insn (gen_stack_tie (Pmode, stack_pointer_rtx, +++ frame_pointer_needed ? hard_frame_pointer_rtx +++ : stack_pointer_rtx)); ++ } ++ ++ #define PROBE_INTERVAL (1 << STACK_CHECK_PROBE_INTERVAL_EXP) ++@@ -4319,27 +4321,27 @@ loongarch_memmodel_needs_rel_acq_fence (enum memmodel model) ++ } ++ } ++ ++-/* Return true if a FENCE should be emitted to before a memory access to ++- implement the release portion of memory model MODEL. */ +++/* Return true if a FENCE should be emitted after a failed CAS to +++ implement the acquire semantic of failure_memorder. */ ++ ++ static bool ++-loongarch_memmodel_needs_release_fence (enum memmodel model) +++loongarch_cas_failure_memorder_needs_acquire (enum memmodel model) ++ { ++- switch (model) +++ switch (memmodel_base (model)) ++ { +++ case MEMMODEL_ACQUIRE: ++ case MEMMODEL_ACQ_REL: ++ case MEMMODEL_SEQ_CST: ++- case MEMMODEL_SYNC_SEQ_CST: ++- case MEMMODEL_RELEASE: ++- case MEMMODEL_SYNC_RELEASE: ++ return true; ++ ++- case MEMMODEL_ACQUIRE: ++- case MEMMODEL_CONSUME: ++- case MEMMODEL_SYNC_ACQUIRE: ++ case MEMMODEL_RELAXED: +++ case MEMMODEL_RELEASE: ++ return false; ++ +++ /* MEMMODEL_CONSUME is deliberately not handled because it's always +++ replaced by MEMMODEL_ACQUIRE as at now. If you see an ICE caused by +++ MEMMODEL_CONSUME, read the change (re)introducing it carefully and +++ decide what to do. See PR 59448 and get_memmodel in builtins.cc. */ ++ default: ++ gcc_unreachable (); ++ } ++@@ -4366,7 +4368,8 @@ loongarch_memmodel_needs_release_fence (enum memmodel model) ++ 'V' Print exact log2 of CONST_INT OP element 0 of a replicated ++ CONST_VECTOR in decimal. ++ 'A' Print a _DB suffix if the memory model requires a release. ++- 'G' Print a DBAR insn if the memory model requires a release. +++ 'G' Print a DBAR insn for CAS failure (with an acquire semantic if +++ needed, otherwise a simple load-load barrier). ++ 'i' Print i if the operand is not a register. */ ++ ++ static void ++@@ -4487,8 +4490,11 @@ loongarch_print_operand (FILE *file, rtx op, int letter) ++ break; ++ ++ case 'G': ++- if (loongarch_memmodel_needs_release_fence ((enum memmodel) INTVAL (op))) ++- fputs ("dbar\t0", file); +++ if (loongarch_cas_failure_memorder_needs_acquire ( +++ memmodel_from_int (INTVAL (op)))) +++ fputs ("dbar\t0b10100", file); +++ else +++ fputs ("dbar\t0x700", file); ++ break; ++ ++ case 'i': ++--- a/src/gcc/config/loongarch/loongarch.h +++++ b/src/gcc/config/loongarch/loongarch.h ++@@ -1148,3 +1148,8 @@ struct GTY (()) machine_function ++ (TARGET_HARD_FLOAT_ABI ? (TARGET_DOUBLE_FLOAT_ABI ? 8 : 4) : 0) ++ ++ #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN) +++ +++/* LoongArch maintains ICache/DCache coherency by hardware, +++ we just need "ibar" to avoid instruction hazard here. */ +++#undef CLEAR_INSN_CACHE +++#define CLEAR_INSN_CACHE(beg, end) __builtin_loongarch_ibar (0) ++--- a/src/gcc/config/loongarch/loongarch.md +++++ b/src/gcc/config/loongarch/loongarch.md ++@@ -93,6 +93,7 @@ (define_c_enum "unspecv" [ ++ ++ (define_constants ++ [(RETURN_ADDR_REGNUM 1) +++ (TP_REGNUM 2) ++ (T0_REGNUM 12) ++ (T1_REGNUM 13) ++ (S0_REGNUM 23) ++@@ -2622,6 +2623,10 @@ (define_insn "*jump_pic" ++ } ++ [(set_attr "type" "branch")]) ++ +++;; Micro-architecture unconditionally treats a "jr $ra" as "return from subroutine", +++;; non-returning indirect jumps through $ra would interfere with both subroutine +++;; return prediction and the more general indirect branch prediction. +++ ++ (define_expand "indirect_jump" ++ [(set (pc) (match_operand 0 "register_operand"))] ++ "" ++@@ -2632,7 +2637,7 @@ (define_expand "indirect_jump" ++ }) ++ ++ (define_insn "@indirect_jump" ++- [(set (pc) (match_operand:P 0 "register_operand" "r"))] +++ [(set (pc) (match_operand:P 0 "register_operand" "e"))] ++ "" ++ "jr\t%0" ++ [(set_attr "type" "jump") ++@@ -2655,7 +2660,7 @@ (define_expand "tablejump" ++ ++ (define_insn "@tablejump" ++ [(set (pc) ++- (match_operand:P 0 "register_operand" "r")) +++ (match_operand:P 0 "register_operand" "e")) ++ (use (label_ref (match_operand 1 "" "")))] ++ "" ++ "jr\t%0" ++@@ -3291,6 +3296,12 @@ (define_insn "@stack_tie" ++ [(set_attr "length" "0") ++ (set_attr "type" "ghost")]) ++ +++;; Named pattern for expanding thread pointer reference. +++(define_expand "get_thread_pointer" +++ [(set (match_operand:P 0 "register_operand" "=r") +++ (reg:P TP_REGNUM))] +++ "HAVE_AS_TLS" +++ {}) ++ ++ (define_split ++ [(match_operand 0 "small_data_pattern")] ++--- a/src/gcc/config/loongarch/sync.md +++++ b/src/gcc/config/loongarch/sync.md ++@@ -129,19 +129,18 @@ (define_insn "atomic_cas_value_strong" ++ (clobber (match_scratch:GPR 6 "=&r"))] ++ "" ++ { ++- return "%G5\\n\\t" ++- "1:\\n\\t" +++ return "1:\\n\\t" ++ "ll.\\t%0,%1\\n\\t" ++ "bne\\t%0,%z2,2f\\n\\t" ++ "or%i3\\t%6,$zero,%3\\n\\t" ++ "sc.\\t%6,%1\\n\\t" ++- "beq\\t$zero,%6,1b\\n\\t" +++ "beqz\\t%6,1b\\n\\t" ++ "b\\t3f\\n\\t" ++ "2:\\n\\t" ++- "dbar\\t0x700\\n\\t" +++ "%G5\\n\\t" ++ "3:\\n\\t"; ++ } ++- [(set (attr "length") (const_int 32))]) +++ [(set (attr "length") (const_int 28))]) ++ ++ (define_expand "atomic_compare_and_swap" ++ [(match_operand:SI 0 "register_operand" "") ;; bool output ++@@ -234,8 +233,7 @@ (define_insn "atomic_cas_value_cmp_and_7_" ++ (clobber (match_scratch:GPR 7 "=&r"))] ++ "" ++ { ++- return "%G6\\n\\t" ++- "1:\\n\\t" +++ return "1:\\n\\t" ++ "ll.\\t%0,%1\\n\\t" ++ "and\\t%7,%0,%2\\n\\t" ++ "bne\\t%7,%z4,2f\\n\\t" ++@@ -245,10 +243,10 @@ (define_insn "atomic_cas_value_cmp_and_7_" ++ "beq\\t$zero,%7,1b\\n\\t" ++ "b\\t3f\\n\\t" ++ "2:\\n\\t" ++- "dbar\\t0x700\\n\\t" +++ "%G6\\n\\t" ++ "3:\\n\\t"; ++ } ++- [(set (attr "length") (const_int 40))]) +++ [(set (attr "length") (const_int 36))]) ++ ++ (define_expand "atomic_compare_and_swap" ++ [(match_operand:SI 0 "register_operand" "") ;; bool output ++@@ -303,8 +301,7 @@ (define_insn "atomic_cas_value_add_7_" ++ (clobber (match_scratch:GPR 8 "=&r"))] ++ "" ++ { ++- return "%G6\\n\\t" ++- "1:\\n\\t" +++ return "1:\\n\\t" ++ "ll.\\t%0,%1\\n\\t" ++ "and\\t%7,%0,%3\\n\\t" ++ "add.w\\t%8,%0,%z5\\n\\t" ++@@ -314,7 +311,7 @@ (define_insn "atomic_cas_value_add_7_" ++ "beq\\t$zero,%7,1b"; ++ } ++ ++- [(set (attr "length") (const_int 32))]) +++ [(set (attr "length") (const_int 28))]) ++ ++ (define_insn "atomic_cas_value_sub_7_" ++ [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res ++@@ -330,8 +327,7 @@ (define_insn "atomic_cas_value_sub_7_" ++ (clobber (match_scratch:GPR 8 "=&r"))] ++ "" ++ { ++- return "%G6\\n\\t" ++- "1:\\n\\t" +++ return "1:\\n\\t" ++ "ll.\\t%0,%1\\n\\t" ++ "and\\t%7,%0,%3\\n\\t" ++ "sub.w\\t%8,%0,%z5\\n\\t" ++@@ -340,7 +336,7 @@ (define_insn "atomic_cas_value_sub_7_" ++ "sc.\\t%7,%1\\n\\t" ++ "beq\\t$zero,%7,1b"; ++ } ++- [(set (attr "length") (const_int 32))]) +++ [(set (attr "length") (const_int 28))]) ++ ++ (define_insn "atomic_cas_value_and_7_" ++ [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res ++@@ -356,8 +352,7 @@ (define_insn "atomic_cas_value_and_7_" ++ (clobber (match_scratch:GPR 8 "=&r"))] ++ "" ++ { ++- return "%G6\\n\\t" ++- "1:\\n\\t" +++ return "1:\\n\\t" ++ "ll.\\t%0,%1\\n\\t" ++ "and\\t%7,%0,%3\\n\\t" ++ "and\\t%8,%0,%z5\\n\\t" ++@@ -366,7 +361,7 @@ (define_insn "atomic_cas_value_and_7_" ++ "sc.\\t%7,%1\\n\\t" ++ "beq\\t$zero,%7,1b"; ++ } ++- [(set (attr "length") (const_int 32))]) +++ [(set (attr "length") (const_int 28))]) ++ ++ (define_insn "atomic_cas_value_xor_7_" ++ [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res ++@@ -382,8 +377,7 @@ (define_insn "atomic_cas_value_xor_7_" ++ (clobber (match_scratch:GPR 8 "=&r"))] ++ "" ++ { ++- return "%G6\\n\\t" ++- "1:\\n\\t" +++ return "1:\\n\\t" ++ "ll.\\t%0,%1\\n\\t" ++ "and\\t%7,%0,%3\\n\\t" ++ "xor\\t%8,%0,%z5\\n\\t" ++@@ -393,7 +387,7 @@ (define_insn "atomic_cas_value_xor_7_" ++ "beq\\t$zero,%7,1b"; ++ } ++ ++- [(set (attr "length") (const_int 32))]) +++ [(set (attr "length") (const_int 28))]) ++ ++ (define_insn "atomic_cas_value_or_7_" ++ [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res ++@@ -409,8 +403,7 @@ (define_insn "atomic_cas_value_or_7_" ++ (clobber (match_scratch:GPR 8 "=&r"))] ++ "" ++ { ++- return "%G6\\n\\t" ++- "1:\\n\\t" +++ return "1:\\n\\t" ++ "ll.\\t%0,%1\\n\\t" ++ "and\\t%7,%0,%3\\n\\t" ++ "or\\t%8,%0,%z5\\n\\t" ++@@ -420,7 +413,7 @@ (define_insn "atomic_cas_value_or_7_" ++ "beq\\t$zero,%7,1b"; ++ } ++ ++- [(set (attr "length") (const_int 32))]) +++ [(set (attr "length") (const_int 28))]) ++ ++ (define_insn "atomic_cas_value_nand_7_" ++ [(set (match_operand:GPR 0 "register_operand" "=&r") ;; res ++@@ -436,8 +429,7 @@ (define_insn "atomic_cas_value_nand_7_" ++ (clobber (match_scratch:GPR 8 "=&r"))] ++ "" ++ { ++- return "%G6\\n\\t" ++- "1:\\n\\t" +++ return "1:\\n\\t" ++ "ll.\\t%0,%1\\n\\t" ++ "and\\t%7,%0,%3\\n\\t" ++ "and\\t%8,%0,%z5\\n\\t" ++@@ -446,7 +438,7 @@ (define_insn "atomic_cas_value_nand_7_" ++ "sc.\\t%7,%1\\n\\t" ++ "beq\\t$zero,%7,1b"; ++ } ++- [(set (attr "length") (const_int 32))]) +++ [(set (attr "length") (const_int 28))]) ++ ++ (define_insn "atomic_cas_value_exchange_7_" ++ [(set (match_operand:GPR 0 "register_operand" "=&r") ++@@ -461,8 +453,7 @@ (define_insn "atomic_cas_value_exchange_7_" ++ (clobber (match_scratch:GPR 7 "=&r"))] ++ "" ++ { ++- return "%G6\\n\\t" ++- "1:\\n\\t" +++ return "1:\\n\\t" ++ "ll.\\t%0,%1\\n\\t" ++ "and\\t%7,%0,%z3\\n\\t" ++ "or%i5\\t%7,%7,%5\\n\\t" ++--- a/src/gcc/config/loongarch/t-loongarch +++++ b/src/gcc/config/loongarch/t-loongarch ++@@ -16,6 +16,10 @@ ++ # along with GCC; see the file COPYING3. If not see ++ # . ++ +++TM_H += $(srcdir)/config/loongarch/loongarch-driver.h +++OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h \ +++ $(srcdir)/config/loongarch/loongarch-tune.h +++ ++ # Canonical target triplet from config.gcc ++ LA_MULTIARCH_TRIPLET = $(patsubst LA_MULTIARCH_TRIPLET=%,%,$\ ++ $(filter LA_MULTIARCH_TRIPLET=%,$(tm_defines))) ++--- a/src/gcc/config/pa/pa.cc +++++ b/src/gcc/config/pa/pa.cc ++@@ -10400,7 +10400,7 @@ pa_asm_trampoline_template (FILE *f) ++ fputs ("\tldw 0(%r22),%r21\n", f); ++ fputs ("\tldw 4(%r22),%r19\n", f); ++ fputs ("\tbve (%r21)\n", f); ++- fputs ("\tldw 52(%r1),%r29\n", f); +++ fputs ("\tldw 52(%r20),%r29\n", f); ++ fputs ("\t.word 0\n", f); ++ fputs ("\t.word 0\n", f); ++ fputs ("\t.word 0\n", f); ++--- a/src/gcc/config/riscv/riscv.cc +++++ b/src/gcc/config/riscv/riscv.cc ++@@ -5600,9 +5600,8 @@ riscv_asan_shadow_offset (void) ++ /* We only have libsanitizer support for RV64 at present. ++ ++ This number must match kRiscv*_ShadowOffset* in the file ++- libsanitizer/asan/asan_mapping.h which is currently 1<<29 for rv64, ++- even though 1<<36 makes more sense. */ ++- return TARGET_64BIT ? (HOST_WIDE_INT_1 << 29) : 0; +++ libsanitizer/asan/asan_mapping.h. */ +++ return TARGET_64BIT ? HOST_WIDE_INT_UC (0xd55550000) : 0; ++ } ++ ++ /* Initialize the GCC target structure. */ ++--- a/src/gcc/config/rs6000/altivec.md +++++ b/src/gcc/config/rs6000/altivec.md ++@@ -385,14 +385,22 @@ (define_split ++ ++ (define_insn_and_split "sldoi_to_mov" ++ [(set (match_operand:VM 0 "altivec_register_operand") ++- (unspec:VM [(match_operand:VM 1 "easy_vector_constant") +++ (unspec:VM [(match_operand:VM 1 "const_vector_each_byte_same") ++ (match_dup 1) ++ (match_operand:QI 2 "u5bit_cint_operand")] ++ UNSPEC_VSLDOI))] ++- "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode) && can_create_pseudo_p ()" +++ "VECTOR_MEM_ALTIVEC_OR_VSX_P (mode) && can_create_pseudo_p ()" ++ "#" ++ "&& 1" ++- [(set (match_dup 0) (match_dup 1))]) +++ [(set (match_dup 0) (match_dup 1))] +++ "{ +++ if (!easy_vector_constant (operands[1], mode)) +++ { +++ rtx dest = gen_reg_rtx (mode); +++ emit_move_insn (dest, operands[1]); +++ operands[1] = dest; +++ } +++ }") ++ ++ (define_insn "get_vrsave_internal" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++--- a/src/gcc/config/rs6000/fusion.md +++++ b/src/gcc/config/rs6000/fusion.md ++@@ -22,7 +22,7 @@ ++ ;; load mode is DI result mode is clobber compare mode is CC extend is none ++ (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none" ++ [(set (match_operand:CC 2 "cc_reg_operand" "=x") ++- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m") +++ (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ") ++ (match_operand:DI 3 "const_m1_to_1_operand" "n"))) ++ (clobber (match_scratch:DI 0 "=r"))] ++ "(TARGET_P10_FUSION)" ++@@ -43,7 +43,7 @@ (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none" ++ ;; load mode is DI result mode is clobber compare mode is CCUNS extend is none ++ (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none" ++ [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") ++- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m") +++ (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ") ++ (match_operand:DI 3 "const_0_to_1_operand" "n"))) ++ (clobber (match_scratch:DI 0 "=r"))] ++ "(TARGET_P10_FUSION)" ++@@ -64,7 +64,7 @@ (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none" ++ ;; load mode is DI result mode is DI compare mode is CC extend is none ++ (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none" ++ [(set (match_operand:CC 2 "cc_reg_operand" "=x") ++- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m") +++ (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ") ++ (match_operand:DI 3 "const_m1_to_1_operand" "n"))) ++ (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] ++ "(TARGET_P10_FUSION)" ++@@ -85,7 +85,7 @@ (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none" ++ ;; load mode is DI result mode is DI compare mode is CCUNS extend is none ++ (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none" ++ [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") ++- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m") +++ (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ") ++ (match_operand:DI 3 "const_0_to_1_operand" "n"))) ++ (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] ++ "(TARGET_P10_FUSION)" ++@@ -104,17 +104,17 @@ (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none" ++ ++ ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 ++ ;; load mode is SI result mode is clobber compare mode is CC extend is none ++-(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none" +++(define_insn_and_split "*lwz_cmpwi_cr0_SI_clobber_CC_none" ++ [(set (match_operand:CC 2 "cc_reg_operand" "=x") ++- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") +++ (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m") ++ (match_operand:SI 3 "const_m1_to_1_operand" "n"))) ++ (clobber (match_scratch:SI 0 "=r"))] ++ "(TARGET_P10_FUSION)" ++- "lwa%X1 %0,%1\;cmpdi %2,%0,%3" +++ "lwz%X1 %0,%1\;cmpwi %2,%0,%3" ++ "&& reload_completed ++ && (cc_reg_not_cr0_operand (operands[2], CCmode) ++ || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), ++- SImode, NON_PREFIXED_DS))" +++ SImode, NON_PREFIXED_D))" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) ++ (compare:CC (match_dup 0) (match_dup 3)))] ++@@ -146,17 +146,17 @@ (define_insn_and_split "*lwz_cmpldi_cr0_SI_clobber_CCUNS_none" ++ ++ ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 ++ ;; load mode is SI result mode is SI compare mode is CC extend is none ++-(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none" +++(define_insn_and_split "*lwz_cmpwi_cr0_SI_SI_CC_none" ++ [(set (match_operand:CC 2 "cc_reg_operand" "=x") ++- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") +++ (compare:CC (match_operand:SI 1 "non_update_memory_operand" "m") ++ (match_operand:SI 3 "const_m1_to_1_operand" "n"))) ++ (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))] ++ "(TARGET_P10_FUSION)" ++- "lwa%X1 %0,%1\;cmpdi %2,%0,%3" +++ "lwz%X1 %0,%1\;cmpwi %2,%0,%3" ++ "&& reload_completed ++ && (cc_reg_not_cr0_operand (operands[2], CCmode) ++ || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), ++- SImode, NON_PREFIXED_DS))" +++ SImode, NON_PREFIXED_D))" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) ++ (compare:CC (match_dup 0) (match_dup 3)))] ++@@ -190,7 +190,7 @@ (define_insn_and_split "*lwz_cmpldi_cr0_SI_SI_CCUNS_none" ++ ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign ++ (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign" ++ [(set (match_operand:CC 2 "cc_reg_operand" "=x") ++- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") +++ (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ") ++ (match_operand:SI 3 "const_m1_to_1_operand" "n"))) ++ (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))] ++ "(TARGET_P10_FUSION)" ++@@ -205,6 +205,7 @@ (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign" ++ "" ++ [(set_attr "type" "fused_load_cmpi") ++ (set_attr "cost" "8") +++ (set_attr "sign_extend" "yes") ++ (set_attr "length" "8")]) ++ ++ ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 ++--- a/src/gcc/config/rs6000/genfusion.pl +++++ b/src/gcc/config/rs6000/genfusion.pl ++@@ -53,92 +53,136 @@ sub mode_to_ldst_char ++ return '?'; ++ } ++ +++sub gen_ld_cmpi_p10_one +++{ +++ my ($lmode, $result, $ccmode) = @_; +++ +++ my $np = "NON_PREFIXED_D"; +++ my $mempred = "non_update_memory_operand"; +++ my $extend; +++ +++ # We need to special case lwa. The prefixed_load_p function in rs6000.cc +++ # (which determines if a load instruction is prefixed) uses the fact that the +++ # register mode is different from the memory mode, and that the sign_extend +++ # attribute is set to use DS-form rules for the address instead of D-form. +++ # If the register size is the same, prefixed_load_p assumes we are doing a +++ # lwz. We change to use an lwz and word compare if we don't need to sign +++ # extend the SImode value. Otherwise if we need the value, we need to +++ # make sure the insn is marked as ds-form. +++ my $cmp_size_char = ($lmode eq "SI" +++ && $ccmode eq "CC" +++ && $result !~ /^EXT|^DI$/) ? "w" : "d"; +++ +++ if ($ccmode eq "CC") { +++ # ld and lwa are both DS-FORM. +++ ($lmode eq "DI") and $np = "NON_PREFIXED_DS"; +++ ($lmode eq "SI" && $cmp_size_char eq "d") and $np = "NON_PREFIXED_DS"; +++ } else { +++ if ($lmode eq "DI") { +++ # ld is DS-form, but lwz is not. +++ $np = "NON_PREFIXED_DS"; +++ } +++ } +++ +++ my $cmpl = ($ccmode eq "CC") ? "" : "l"; +++ my $echr = ($ccmode eq "CC" && $cmp_size_char eq "d") ? "a" : "z"; +++ if ($lmode eq "DI") { $echr = ""; } +++ my $constpred = ($ccmode eq "CC") ? "const_m1_to_1_operand" +++ : "const_0_to_1_operand"; +++ +++ # For clobber, we need a SI/DI reg in case we +++ # split because we have to sign/zero extend. +++ my $clobbermode = ($lmode =~ /^[QH]I$/) ? "GPR" : $lmode; +++ if ($result =~ /^EXT/ || $result eq "GPR" || $clobbermode eq "GPR") { +++ # We always need extension if result > lmode. +++ $extend = ($ccmode eq "CC") ? "sign" : "zero"; +++ } else { +++ # Result of SI/DI does not need sign extension. +++ $extend = "none"; +++ } +++ +++ my $ldst = mode_to_ldst_char($lmode); +++ +++ # DS-form addresses need YZ, and not m. +++ my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m"; +++ print < lmode. ++- if ( $ccmode eq 'CC' ) { ++- $extend = "sign"; ++- } else { ++- $extend = "zero"; ++- } ++- } else { ++- # Result of SI/DI does not need sign extension. ++- $extend = "none"; ++- } ++- print ";; load-cmpi fusion pattern generated by gen_ld_cmpi_p10\n"; ++- print ";; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend\n"; ++- ++- print "(define_insn_and_split \"*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}\"\n"; ++- print " [(set (match_operand:${ccmode} 2 \"cc_reg_operand\" \"=x\")\n"; ++- print " (compare:${ccmode} (match_operand:${lmode} 1 \"${mempred}\" \"m\")\n"; ++- if ($ccmode eq 'CCUNS') { print " "; } ++- print " (match_operand:${lmode} 3 \"${constpred}\" \"n\")))\n"; ++- if ($result eq 'clobber') { ++- print " (clobber (match_scratch:${clobbermode} 0 \"=r\"))]\n"; ++- } elsif ($result eq $lmode) { ++- print " (set (match_operand:${result} 0 \"gpc_reg_operand\" \"=r\") (match_dup 1))]\n"; ++- } else { ++- print " (set (match_operand:${result} 0 \"gpc_reg_operand\" \"=r\") (${extend}_extend:${result} (match_dup 1)))]\n"; ++- } ++- print " \"(TARGET_P10_FUSION)\"\n"; ++- print " \"l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3\"\n"; ++- print " \"&& reload_completed\n"; ++- print " && (cc_reg_not_cr0_operand (operands[2], CCmode)\n"; ++- print " || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),\n"; ++- print " ${lmode}mode, ${np}))\"\n"; ++- ++- if ($extend eq "none") { ++- print " [(set (match_dup 0) (match_dup 1))\n"; ++- } else { ++- $resultmode = $result; ++- if ( $result eq 'clobber' ) { $resultmode = $clobbermode } ++- print " [(set (match_dup 0) (${extend}_extend:${resultmode} (match_dup 1)))\n"; ++- } ++- print " (set (match_dup 2)\n"; ++- print " (compare:${ccmode} (match_dup 0) (match_dup 3)))]\n"; ++- print " \"\"\n"; ++- print " [(set_attr \"type\" \"fused_load_cmpi\")\n"; ++- print " (set_attr \"cost\" \"8\")\n"; ++- print " (set_attr \"length\" \"8\")])\n"; ++- print "\n"; +++ foreach my $lmode (qw/DI SI HI QI/) { +++ foreach my $result ("clobber", $lmode, "EXT$lmode") { +++ # EXTDI does not exist, and we cannot directly produce HI/QI results. +++ next if $result =~ /^(QI|HI|EXTDI)$/; +++ +++ # Don't allow EXTQI because that would allow HI result which we can't do. +++ $result = "GPR" if $result eq "EXTQI"; +++ +++ foreach my $ccmode (qw/CC CCUNS/) { +++ # We do not have signed single-byte loads. +++ next if ($lmode eq "QI" and $ccmode eq "CC"); +++ +++ gen_ld_cmpi_p10_one($lmode, $result, $ccmode); ++ } ++ } ++ } ++--- a/src/gcc/config/rs6000/predicates.md +++++ b/src/gcc/config/rs6000/predicates.md ++@@ -798,6 +798,43 @@ (define_predicate "easy_vector_constant_vsldoi" ++ (and (match_test "easy_altivec_constant (op, mode)") ++ (match_test "vspltis_shifted (op) != 0"))))) ++ +++;; Return true if this is a vector constant and each byte in +++;; it is the same. +++(define_predicate "const_vector_each_byte_same" +++ (match_code "const_vector") +++{ +++ rtx elt; +++ if (!const_vec_duplicate_p (op, &elt)) +++ return false; +++ +++ machine_mode emode = GET_MODE_INNER (mode); +++ unsigned HOST_WIDE_INT eval; +++ if (CONST_INT_P (elt)) +++ eval = INTVAL (elt); +++ else if (CONST_DOUBLE_AS_FLOAT_P (elt)) +++ { +++ gcc_assert (emode == SFmode || emode == DFmode); +++ long l[2]; +++ real_to_target (l, CONST_DOUBLE_REAL_VALUE (elt), emode); +++ /* real_to_target puts 32-bit pieces in each long. */ +++ eval = zext_hwi (l[0], 32); +++ eval |= zext_hwi (l[1], 32) << 32; +++ } +++ else +++ return false; +++ +++ unsigned int esize = GET_MODE_SIZE (emode); +++ unsigned char byte0 = eval & 0xff; +++ for (unsigned int i = 1; i < esize; i++) +++ { +++ eval >>= BITS_PER_UNIT; +++ if (byte0 != (eval & 0xff)) +++ return false; +++ } +++ +++ return true; +++}) +++ ++ ;; Return 1 if operand is a vector int register or is either a vector constant ++ ;; of all 0 bits of a vector constant of all 1 bits. ++ (define_predicate "vector_int_reg_or_same_bit" ++@@ -1088,20 +1125,6 @@ (define_predicate "lwa_operand" ++ return INTVAL (offset) % 4 == 0; ++ }) ++ ++-;; Return 1 if the operand is a memory operand that has a valid address for ++-;; a DS-form instruction. I.e. the address has to be either just a register, ++-;; or register + const where the two low order bits of const are zero. ++-(define_predicate "ds_form_mem_operand" ++- (match_code "subreg,mem") ++-{ ++- if (!any_memory_operand (op, mode)) ++- return false; ++- ++- rtx addr = XEXP (op, 0); ++- ++- return address_to_insn_form (addr, mode, NON_PREFIXED_DS) == INSN_FORM_DS; ++-}) ++- ++ ;; Return 1 if the operand, used inside a MEM, is a SYMBOL_REF. ++ (define_predicate "symbol_ref_operand" ++ (and (match_code "symbol_ref") ++--- a/src/gcc/config/rs6000/rs6000-builtins.def +++++ b/src/gcc/config/rs6000/rs6000-builtins.def ++@@ -2008,6 +2008,13 @@ ++ const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>); ++ XXSPLTD_V2DI vsx_xxspltd_v2di {} ++ +++ const vsq __builtin_pack_vector_int128 (unsigned long long, \ +++ unsigned long long); +++ PACK_V1TI packv1ti {} +++ +++ const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); +++ UNPACK_V1TI unpackv1ti {} +++ ++ ++ ; Power7 builtins (ISA 2.06). ++ [power7] ++@@ -2029,16 +2036,9 @@ ++ const unsigned int __builtin_divweu (unsigned int, unsigned int); ++ DIVWEU diveu_si {} ++ ++- const vsq __builtin_pack_vector_int128 (unsigned long long, \ ++- unsigned long long); ++- PACK_V1TI packv1ti {} ++- ++ void __builtin_ppc_speculation_barrier (); ++ SPECBARR speculation_barrier {} ++ ++- const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); ++- UNPACK_V1TI unpackv1ti {} ++- ++ ++ ; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing). ++ [power7-64] ++@@ -2796,6 +2796,19 @@ ++ const vsi __builtin_vsx_xxbrw_v4si (vsi); ++ XXBRW_V4SI p9_xxbrw_v4si {} ++ +++ const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128); +++ VSCEQPEQ xscmpexpqp_eq_kf {} +++ +++ const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128); +++ VSCEQPGT xscmpexpqp_gt_kf {} +++ +++ const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128); +++ VSCEQPLT xscmpexpqp_lt_kf {} +++ +++ const signed int \ +++ __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128); +++ VSCEQPUO xscmpexpqp_unordered_kf {} +++ ++ ++ ; Miscellaneous P9 functions ++ [power9] ++@@ -2878,19 +2891,6 @@ ++ fpmath _Float128 __builtin_mulf128_round_to_odd (_Float128, _Float128); ++ MULF128_ODD mulkf3_odd {} ++ ++- const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128); ++- VSCEQPEQ xscmpexpqp_eq_kf {} ++- ++- const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128); ++- VSCEQPGT xscmpexpqp_gt_kf {} ++- ++- const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128); ++- VSCEQPLT xscmpexpqp_lt_kf {} ++- ++- const signed int \ ++- __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128); ++- VSCEQPUO xscmpexpqp_unordered_kf {} ++- ++ fpmath _Float128 __builtin_sqrtf128_round_to_odd (_Float128); ++ SQRTF128_ODD sqrtkf2_odd {} ++ ++--- a/src/gcc/config/rs6000/rs6000-string.cc +++++ b/src/gcc/config/rs6000/rs6000-string.cc ++@@ -2811,11 +2811,17 @@ expand_block_move (rtx operands[], bool might_overlap) ++ gen_func.mov = gen_vsx_movv2di_64bit; ++ } ++ else if (TARGET_BLOCK_OPS_UNALIGNED_VSX ++- && TARGET_POWER10 && bytes < 16 +++ /* Only use lxvl/stxvl on 64bit POWER10. */ +++ && TARGET_POWER10 +++ && TARGET_64BIT +++ && bytes < 16 ++ && orig_bytes > 16 ++- && !(bytes == 1 || bytes == 2 ++- || bytes == 4 || bytes == 8) ++- && (align >= 128 || !STRICT_ALIGNMENT)) +++ && !(bytes == 1 +++ || bytes == 2 +++ || bytes == 4 +++ || bytes == 8) +++ && (align >= 128 +++ || !STRICT_ALIGNMENT)) ++ { ++ /* Only use lxvl/stxvl if it could replace multiple ordinary ++ loads+stores. Also don't use it unless we likely already ++--- a/src/gcc/config/rs6000/rs6000.cc +++++ b/src/gcc/config/rs6000/rs6000.cc ++@@ -8128,7 +8128,8 @@ darwin_rs6000_special_round_type_align (tree type, unsigned int computed, ++ type = TREE_TYPE (type); ++ } while (AGGREGATE_TYPE_P (type)); ++ ++- if (! AGGREGATE_TYPE_P (type) && type != error_mark_node) +++ if (type != error_mark_node && ! AGGREGATE_TYPE_P (type) +++ && ! TYPE_PACKED (type) && maximum_field_alignment == 0) ++ align = MAX (align, TYPE_ALIGN (type)); ++ ++ return align; ++@@ -17116,7 +17117,7 @@ output_toc (FILE *file, rtx x, int labelno, machine_mode mode) ++ if (DECIMAL_FLOAT_MODE_P (GET_MODE (x))) ++ REAL_VALUE_TO_TARGET_DECIMAL128 (*CONST_DOUBLE_REAL_VALUE (x), k); ++ else ++- REAL_VALUE_TO_TARGET_LONG_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), k); +++ real_to_target (k, CONST_DOUBLE_REAL_VALUE (x), GET_MODE (x)); ++ ++ if (TARGET_64BIT) ++ { ++@@ -21906,7 +21907,9 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, ++ *total = rs6000_cost->divsi; ++ } ++ /* Add in shift and subtract for MOD unless we have a mod instruction. */ ++- if (!TARGET_MODULO && (code == MOD || code == UMOD)) +++ if ((!TARGET_MODULO +++ || (RS6000_DISABLE_SCALAR_MODULO && SCALAR_INT_MODE_P (mode))) +++ && (code == MOD || code == UMOD)) ++ *total += COSTS_N_INSNS (2); ++ return false; ++ ++@@ -25250,15 +25253,21 @@ rs6000_need_ipa_fn_target_info (const_tree decl, ++ static bool ++ rs6000_update_ipa_fn_target_info (unsigned int &info, const gimple *stmt) ++ { +++#ifndef HAVE_AS_POWER10_HTM ++ /* Assume inline asm can use any instruction features. */ ++ if (gimple_code (stmt) == GIMPLE_ASM) ++ { ++- /* Should set any bits we concerned, for now OPTION_MASK_HTM is ++- the only bit we care about. */ ++- info |= RS6000_FN_TARGET_INFO_HTM; +++ const char *asm_str = gimple_asm_string (as_a (stmt)); +++ /* Ignore empty inline asm string. */ +++ if (strlen (asm_str) > 0) +++ /* Should set any bits we concerned, for now OPTION_MASK_HTM is +++ the only bit we care about. */ +++ info |= RS6000_FN_TARGET_INFO_HTM; ++ return false; ++ } ++- else if (gimple_code (stmt) == GIMPLE_CALL) +++#endif +++ +++ if (gimple_code (stmt) == GIMPLE_CALL) ++ { ++ tree fndecl = gimple_call_fndecl (stmt); ++ if (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_MD)) ++@@ -25286,49 +25295,44 @@ rs6000_can_inline_p (tree caller, tree callee) ++ tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller); ++ tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee); ++ ++- /* If the callee has no option attributes, then it is ok to inline. */ +++ /* If the caller/callee has option attributes, then use them. +++ Otherwise, use the command line options. */ ++ if (!callee_tree) ++- ret = true; +++ callee_tree = target_option_default_node; +++ if (!caller_tree) +++ caller_tree = target_option_default_node; ++ ++- else ++- { ++- HOST_WIDE_INT caller_isa; ++- struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree); ++- HOST_WIDE_INT callee_isa = callee_opts->x_rs6000_isa_flags; ++- HOST_WIDE_INT explicit_isa = callee_opts->x_rs6000_isa_flags_explicit; +++ struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree); +++ struct cl_target_option *caller_opts = TREE_TARGET_OPTION (caller_tree); ++ ++- /* If the caller has option attributes, then use them. ++- Otherwise, use the command line options. */ ++- if (caller_tree) ++- caller_isa = TREE_TARGET_OPTION (caller_tree)->x_rs6000_isa_flags; ++- else ++- caller_isa = rs6000_isa_flags; +++ HOST_WIDE_INT callee_isa = callee_opts->x_rs6000_isa_flags; +++ HOST_WIDE_INT caller_isa = caller_opts->x_rs6000_isa_flags; +++ HOST_WIDE_INT explicit_isa = callee_opts->x_rs6000_isa_flags_explicit; ++ ++- cgraph_node *callee_node = cgraph_node::get (callee); ++- if (ipa_fn_summaries && ipa_fn_summaries->get (callee_node) != NULL) +++ cgraph_node *callee_node = cgraph_node::get (callee); +++ if (ipa_fn_summaries && ipa_fn_summaries->get (callee_node) != NULL) +++ { +++ unsigned int info = ipa_fn_summaries->get (callee_node)->target_info; +++ if ((info & RS6000_FN_TARGET_INFO_HTM) == 0) ++ { ++- unsigned int info = ipa_fn_summaries->get (callee_node)->target_info; ++- if ((info & RS6000_FN_TARGET_INFO_HTM) == 0) ++- { ++- callee_isa &= ~OPTION_MASK_HTM; ++- explicit_isa &= ~OPTION_MASK_HTM; ++- } +++ callee_isa &= ~OPTION_MASK_HTM; +++ explicit_isa &= ~OPTION_MASK_HTM; ++ } +++ } ++ ++- /* Ignore -mpower8-fusion and -mpower10-fusion options for inlining ++- purposes. */ ++- callee_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION); ++- explicit_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION); +++ /* Ignore -mpower8-fusion and -mpower10-fusion options for inlining +++ purposes. */ +++ callee_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION); +++ explicit_isa &= ~(OPTION_MASK_P8_FUSION | OPTION_MASK_P10_FUSION); ++ ++- /* The callee's options must be a subset of the caller's options, i.e. ++- a vsx function may inline an altivec function, but a no-vsx function ++- must not inline a vsx function. However, for those options that the ++- callee has explicitly enabled or disabled, then we must enforce that ++- the callee's and caller's options match exactly; see PR70010. */ ++- if (((caller_isa & callee_isa) == callee_isa) ++- && (caller_isa & explicit_isa) == (callee_isa & explicit_isa)) ++- ret = true; ++- } +++ /* The callee's options must be a subset of the caller's options, i.e. +++ a vsx function may inline an altivec function, but a no-vsx function +++ must not inline a vsx function. However, for those options that the +++ callee has explicitly enabled or disabled, then we must enforce that +++ the callee's and caller's options match exactly; see PR70010. */ +++ if (((caller_isa & callee_isa) == callee_isa) +++ && (caller_isa & explicit_isa) == (callee_isa & explicit_isa)) +++ ret = true; ++ ++ if (TARGET_DEBUG_TARGET) ++ fprintf (stderr, "rs6000_can_inline_p:, caller %s, callee %s, %s inline\n", ++@@ -28603,7 +28607,6 @@ vec_const_128bit_to_bytes (rtx op, ++ ++ info->all_words_same ++ = (info->words[0] == info->words[1] ++- && info->words[0] == info->words[1] ++ && info->words[0] == info->words[2] ++ && info->words[0] == info->words[3]); ++ ++--- a/src/gcc/config/rs6000/rs6000.h +++++ b/src/gcc/config/rs6000/rs6000.h ++@@ -2632,3 +2632,9 @@ while (0) ++ rs6000_asm_output_opcode (STREAM); \ ++ } \ ++ while (0) +++ +++/* Disable generation of scalar modulo instructions due to performance issues +++ with certain input values. This can be removed in the future when the +++ issues have been resolved. */ +++#define RS6000_DISABLE_SCALAR_MODULO 1 +++ ++--- a/src/gcc/config/rs6000/rs6000.md +++++ b/src/gcc/config/rs6000/rs6000.md ++@@ -287,7 +287,7 @@ (define_attr "cannot_copy" "no,yes" (const_string "no")) ++ ;; Whether this insn has a prefixed form and a non-prefixed form. ++ (define_attr "maybe_prefixed" "no,yes" ++ (if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore, ++- integer,add") +++ integer,add,fused_load_cmpi") ++ (const_string "yes") ++ (const_string "no"))) ++ ++@@ -302,7 +302,7 @@ (define_attr "prefixed" "no,yes" ++ (eq_attr "maybe_prefixed" "no")) ++ (const_string "no") ++ ++- (eq_attr "type" "load,fpload,vecload") +++ (eq_attr "type" "load,fpload,vecload,fused_load_cmpi") ++ (if_then_else (match_test "prefixed_load_p (insn)") ++ (const_string "yes") ++ (const_string "no")) ++@@ -3359,6 +3359,17 @@ (define_expand "mod3" ++ FAIL; ++ ++ operands[2] = force_reg (mode, operands[2]); +++ +++ if (RS6000_DISABLE_SCALAR_MODULO) +++ { +++ temp1 = gen_reg_rtx (mode); +++ temp2 = gen_reg_rtx (mode); +++ +++ emit_insn (gen_div3 (temp1, operands[1], operands[2])); +++ emit_insn (gen_mul3 (temp2, temp1, operands[2])); +++ emit_insn (gen_sub3 (operands[0], operands[1], temp2)); +++ DONE; +++ } ++ } ++ else ++ { ++@@ -3378,17 +3389,36 @@ (define_insn "*mod3" ++ [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") ++ (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") ++ (match_operand:GPR 2 "gpc_reg_operand" "r")))] ++- "TARGET_MODULO" +++ "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO" ++ "mods %0,%1,%2" ++ [(set_attr "type" "div") ++ (set_attr "size" "")]) ++ +++;; This define_expand can be removed when RS6000_DISABLE_SCALAR_MODULO is +++;; removed. +++(define_expand "umod3" +++ [(set (match_operand:GPR 0 "gpc_reg_operand") +++ (umod:GPR (match_operand:GPR 1 "gpc_reg_operand") +++ (match_operand:GPR 2 "gpc_reg_operand")))] +++ "TARGET_MODULO" +++{ +++ if (RS6000_DISABLE_SCALAR_MODULO) +++ { +++ rtx temp1 = gen_reg_rtx (mode); +++ rtx temp2 = gen_reg_rtx (mode); +++ +++ emit_insn (gen_udiv3 (temp1, operands[1], operands[2])); +++ emit_insn (gen_mul3 (temp2, temp1, operands[2])); +++ emit_insn (gen_sub3 (operands[0], operands[1], temp2)); +++ DONE; +++ } +++}) ++ ++-(define_insn "umod3" +++(define_insn "*umod3" ++ [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") ++ (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") ++ (match_operand:GPR 2 "gpc_reg_operand" "r")))] ++- "TARGET_MODULO" +++ "TARGET_MODULO && !RS6000_DISABLE_SCALAR_MODULO" ++ "modu %0,%1,%2" ++ [(set_attr "type" "div") ++ (set_attr "size" "")]) ++@@ -3445,7 +3475,7 @@ (define_insn "umodti3" ++ [(set (match_operand:TI 0 "altivec_register_operand" "=v") ++ (umod:TI (match_operand:TI 1 "altivec_register_operand" "v") ++ (match_operand:TI 2 "altivec_register_operand" "v")))] ++- "TARGET_POWER10 && TARGET_POWERPC64" +++ "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO" ++ "vmoduq %0,%1,%2" ++ [(set_attr "type" "vecdiv") ++ (set_attr "size" "128")]) ++@@ -3454,7 +3484,7 @@ (define_insn "modti3" ++ [(set (match_operand:TI 0 "altivec_register_operand" "=v") ++ (mod:TI (match_operand:TI 1 "altivec_register_operand" "v") ++ (match_operand:TI 2 "altivec_register_operand" "v")))] ++- "TARGET_POWER10 && TARGET_POWERPC64" +++ "TARGET_POWER10 && TARGET_POWERPC64 && !RS6000_DISABLE_SCALAR_MODULO" ++ "vmodsq %0,%1,%2" ++ [(set_attr "type" "vecdiv") ++ (set_attr "size" "128")]) ++@@ -12215,33 +12245,26 @@ (define_expand "stack_protect_set" ++ DONE; ++ }) ++ ++-(define_insn "stack_protect_setsi" ++- [(set (match_operand:SI 0 "memory_operand" "=m") ++- (unspec:SI [(match_operand:SI 1 "memory_operand" "m")] UNSPEC_SP_SET)) ++- (set (match_scratch:SI 2 "=&r") (const_int 0))] ++- "TARGET_32BIT" ++- "lwz%U1%X1 %2,%1\;stw%U0%X0 %2,%0\;li %2,0" ++- [(set_attr "type" "three") ++- (set_attr "length" "12")]) ++- ++ ;; We can't use the prefixed attribute here because there are two memory ++ ;; instructions. We can't split the insn due to the fact that this operation ++ ;; needs to be done in one piece. ++-(define_insn "stack_protect_setdi" ++- [(set (match_operand:DI 0 "memory_operand" "=Y") ++- (unspec:DI [(match_operand:DI 1 "memory_operand" "Y")] UNSPEC_SP_SET)) ++- (set (match_scratch:DI 2 "=&r") (const_int 0))] ++- "TARGET_64BIT" +++(define_insn "stack_protect_set" +++ [(set (match_operand:P 0 "memory_operand" "=YZ") +++ (unspec:P [(match_operand:P 1 "memory_operand" "YZ")] UNSPEC_SP_SET)) +++ (set (match_scratch:P 2 "=&r") (const_int 0))] +++ "" ++ { ++- if (prefixed_memory (operands[1], DImode)) ++- output_asm_insn ("pld %2,%1", operands); +++ if (prefixed_memory (operands[1], mode)) +++ /* Prefixed load only supports D-form but no update and X-form. */ +++ output_asm_insn ("p %2,%1", operands); ++ else ++- output_asm_insn ("ld%U1%X1 %2,%1", operands); +++ output_asm_insn ("%U1%X1 %2,%1", operands); ++ ++- if (prefixed_memory (operands[0], DImode)) ++- output_asm_insn ("pstd %2,%0", operands); +++ if (prefixed_memory (operands[0], mode)) +++ /* Prefixed store only supports D-form but no update and X-form. */ +++ output_asm_insn ("pst %2,%0", operands); ++ else ++- output_asm_insn ("std%U0%X0 %2,%0", operands); +++ output_asm_insn ("st%U0%X0 %2,%0", operands); ++ ++ return "li %2,0"; ++ } ++@@ -12287,45 +12310,33 @@ (define_expand "stack_protect_test" ++ DONE; ++ }) ++ ++-(define_insn "stack_protect_testsi" ++- [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y") ++- (unspec:CCEQ [(match_operand:SI 1 "memory_operand" "m,m") ++- (match_operand:SI 2 "memory_operand" "m,m")] ++- UNSPEC_SP_TEST)) ++- (set (match_scratch:SI 4 "=r,r") (const_int 0)) ++- (clobber (match_scratch:SI 3 "=&r,&r"))] ++- "TARGET_32BIT" ++- "@ ++- lwz%U1%X1 %3,%1\;lwz%U2%X2 %4,%2\;xor. %3,%3,%4\;li %4,0 ++- lwz%U1%X1 %3,%1\;lwz%U2%X2 %4,%2\;cmplw %0,%3,%4\;li %3,0\;li %4,0" ++- [(set_attr "length" "16,20")]) ++- ++ ;; We can't use the prefixed attribute here because there are two memory ++ ;; instructions. We can't split the insn due to the fact that this operation ++ ;; needs to be done in one piece. ++-(define_insn "stack_protect_testdi" +++(define_insn "stack_protect_test" ++ [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y") ++- (unspec:CCEQ [(match_operand:DI 1 "memory_operand" "Y,Y") ++- (match_operand:DI 2 "memory_operand" "Y,Y")] +++ (unspec:CCEQ [(match_operand:P 1 "memory_operand" "YZ,YZ") +++ (match_operand:P 2 "memory_operand" "YZ,YZ")] ++ UNSPEC_SP_TEST)) ++- (set (match_scratch:DI 4 "=r,r") (const_int 0)) ++- (clobber (match_scratch:DI 3 "=&r,&r"))] ++- "TARGET_64BIT" +++ (set (match_scratch:P 4 "=r,r") (const_int 0)) +++ (clobber (match_scratch:P 3 "=&r,&r"))] +++ "" ++ { ++- if (prefixed_memory (operands[1], DImode)) ++- output_asm_insn ("pld %3,%1", operands); +++ if (prefixed_memory (operands[1], mode)) +++ /* Prefixed load only supports D-form but no update and X-form. */ +++ output_asm_insn ("p %3,%1", operands); ++ else ++- output_asm_insn ("ld%U1%X1 %3,%1", operands); +++ output_asm_insn ("%U1%X1 %3,%1", operands); ++ ++- if (prefixed_memory (operands[2], DImode)) ++- output_asm_insn ("pld %4,%2", operands); +++ if (prefixed_memory (operands[2], mode)) +++ output_asm_insn ("p %4,%2", operands); ++ else ++- output_asm_insn ("ld%U2%X2 %4,%2", operands); +++ output_asm_insn ("%U2%X2 %4,%2", operands); ++ ++ if (which_alternative == 0) ++ output_asm_insn ("xor. %3,%3,%4", operands); ++ else ++- output_asm_insn ("cmpld %0,%3,%4\;li %3,0", operands); +++ output_asm_insn ("cmpl %0,%3,%4\;li %3,0", operands); ++ ++ return "li %4,0"; ++ } ++--- a/src/gcc/config/rs6000/vsx.md +++++ b/src/gcc/config/rs6000/vsx.md ++@@ -2018,22 +2018,20 @@ (define_insn "*vsx_tsqrt2_internal" ++ "xtsqrtp %0,%x1" ++ [(set_attr "type" "")]) ++ ++-;; Fused vector multiply/add instructions. Support the classical Altivec ++-;; versions of fma, which allows the target to be a separate register from the ++-;; 3 inputs. Under VSX, the target must be either the addend or the first ++-;; multiply. ++- +++;; Fused vector multiply/add instructions. Do not generate the Altivec versions +++;; of fma (vmaddfp and vnmsubfp). These instructions allows the target to be a +++;; separate register from the 3 inputs, but they have different rounding +++;; behaviors than the VSX instructions. ++ (define_insn "*vsx_fmav4sf4" ++- [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,v") +++ [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa") ++ (fma:V4SF ++- (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa,v") ++- (match_operand:V4SF 2 "vsx_register_operand" "wa,0,v") ++- (match_operand:V4SF 3 "vsx_register_operand" "0,wa,v")))] +++ (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa") +++ (match_operand:V4SF 2 "vsx_register_operand" "wa,0") +++ (match_operand:V4SF 3 "vsx_register_operand" "0,wa")))] ++ "VECTOR_UNIT_VSX_P (V4SFmode)" ++ "@ ++ xvmaddasp %x0,%x1,%x2 ++- xvmaddmsp %x0,%x1,%x3 ++- vmaddfp %0,%1,%2,%3" +++ xvmaddmsp %x0,%x1,%x3" ++ [(set_attr "type" "vecfloat")]) ++ ++ (define_insn "*vsx_fmav2df4" ++@@ -2075,18 +2073,17 @@ (define_insn "*vsx_nfma4" ++ [(set_attr "type" "")]) ++ ++ (define_insn "*vsx_nfmsv4sf4" ++- [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,v") +++ [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa") ++ (neg:V4SF ++ (fma:V4SF ++- (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa,v") ++- (match_operand:V4SF 2 "vsx_register_operand" "wa,0,v") +++ (match_operand:V4SF 1 "vsx_register_operand" "%wa,wa") +++ (match_operand:V4SF 2 "vsx_register_operand" "wa,0") ++ (neg:V4SF ++- (match_operand:V4SF 3 "vsx_register_operand" "0,wa,v")))))] +++ (match_operand:V4SF 3 "vsx_register_operand" "0,wa")))))] ++ "VECTOR_UNIT_VSX_P (V4SFmode)" ++ "@ ++ xvnmsubasp %x0,%x1,%x2 ++- xvnmsubmsp %x0,%x1,%x3 ++- vnmsubfp %0,%1,%2,%3" +++ xvnmsubmsp %x0,%x1,%x3" ++ [(set_attr "type" "vecfloat")]) ++ ++ (define_insn "*vsx_nfmsv2df4" ++@@ -6560,7 +6557,7 @@ (define_insn "xxeval" ++ (match_operand:QI 4 "u8bit_cint_operand" "n")] ++ UNSPEC_XXEVAL))] ++ "TARGET_POWER10" ++- "xxeval %0,%1,%2,%3,%4" +++ "xxeval %x0,%x1,%x2,%x3,%4" ++ [(set_attr "type" "vecperm") ++ (set_attr "prefixed" "yes")]) ++ ++--- a/src/gcc/config/sh/sh.md +++++ b/src/gcc/config/sh/sh.md ++@@ -842,7 +842,7 @@ (define_split ++ if (SUBREG_P (reg)) ++ reg = SUBREG_REG (reg); ++ gcc_assert (REG_P (reg)); ++- if (find_regno_note (curr_insn, REG_DEAD, REGNO (reg)) != NULL_RTX) +++ if (find_regno_note (curr_insn, REG_DEAD, REGNO (reg)) == NULL_RTX) ++ FAIL; ++ ++ /* FIXME: Maybe also search the predecessor basic blocks to catch ++@@ -10680,6 +10680,45 @@ (define_peephole2 ++ && peep2_reg_dead_p (2, operands[1]) && peep2_reg_dead_p (3, operands[0])" ++ [(const_int 0)] ++ { +++ if (MEM_P (operands[3]) && reg_overlap_mentioned_p (operands[0], operands[3])) +++ { +++ // Take care when the eliminated operand[0] register is part of +++ // the destination memory address. +++ rtx addr = XEXP (operands[3], 0); +++ +++ if (REG_P (addr)) +++ operands[3] = replace_equiv_address (operands[3], operands[1]); +++ +++ else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0)) +++ && CONST_INT_P (XEXP (addr, 1)) +++ && REGNO (operands[0]) == REGNO (XEXP (addr, 0))) +++ operands[3] = replace_equiv_address (operands[3], +++ gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1))); +++ +++ else if (GET_CODE (addr) == PLUS && REG_P (XEXP (addr, 0)) +++ && REG_P (XEXP (addr, 1))) +++ { +++ // register + register address @(R0, Rn) +++ // can change only the Rn in the address, not R0. +++ if (REGNO (operands[0]) == REGNO (XEXP (addr, 0)) +++ && REGNO (XEXP (addr, 0)) != 0) +++ { +++ operands[3] = replace_equiv_address (operands[3], +++ gen_rtx_PLUS (SImode, operands[1], XEXP (addr, 1))); +++ } +++ else if (REGNO (operands[0]) == REGNO (XEXP (addr, 1)) +++ && REGNO (XEXP (addr, 1)) != 0) +++ { +++ operands[3] = replace_equiv_address (operands[3], +++ gen_rtx_PLUS (SImode, XEXP (addr, 0), operands[1])); +++ } +++ else +++ FAIL; +++ } +++ else +++ FAIL; +++ } +++ ++ emit_insn (gen_addsi3 (operands[1], operands[1], operands[2])); ++ sh_peephole_emit_move_insn (operands[3], operands[1]); ++ }) ++--- a/src/gcc/config/sh/sh_treg_combine.cc +++++ b/src/gcc/config/sh/sh_treg_combine.cc ++@@ -732,7 +732,14 @@ sh_treg_combine::record_set_of_reg (rtx reg, rtx_insn *start_insn, ++ } ++ else if (REG_P (new_entry.cstore.set_src ())) ++ { ++- // If it's a reg-reg copy follow the copied reg. +++ // If it's a reg-reg copy follow the copied reg, but ignore +++ // nop copies of the reg onto itself. +++ if (REGNO (new_entry.cstore.set_src ()) == REGNO (reg)) +++ { +++ i = prev_nonnote_nondebug_insn_bb (i); +++ continue; +++ } +++ ++ new_entry.cstore_reg_reg_copies.push_back (new_entry.cstore); ++ reg = new_entry.cstore.set_src (); ++ i = new_entry.cstore.insn; ++--- a/src/gcc/config/vax/vax.cc +++++ b/src/gcc/config/vax/vax.cc ++@@ -1833,7 +1833,9 @@ nonindexed_address_p (rtx x, bool strict) ++ } ++ ++ /* True if PROD is either a reg times size of mode MODE and MODE is less ++- than or equal 8 bytes, or just a reg if MODE is one byte. */ +++ than or equal 8 bytes, or just a reg if MODE is one byte. For a MULT +++ RTX we accept its operands in either order, however ASHIFT is not +++ commutative, so in that case reg has to be the left operand. */ ++ ++ static bool ++ index_term_p (rtx prod, machine_mode mode, bool strict) ++@@ -1852,8 +1854,9 @@ index_term_p (rtx prod, machine_mode mode, bool strict) ++ xfoo0 = XEXP (prod, 0); ++ xfoo1 = XEXP (prod, 1); ++ ++- if (CONST_INT_P (xfoo0) ++- && GET_MODE_SIZE (mode) == (log_p ? 1 << INTVAL (xfoo0) : INTVAL (xfoo0)) +++ if (!log_p +++ && CONST_INT_P (xfoo0) +++ && GET_MODE_SIZE (mode) == INTVAL (xfoo0) ++ && INDEX_REGISTER_P (xfoo1, strict)) ++ return true; ++ ++--- a/src/gcc/configure +++++ b/src/gcc/configure ++@@ -27959,6 +27959,49 @@ if test $gcc_cv_as_powerpc_mfcrf = yes; then ++ ++ $as_echo "#define HAVE_AS_MFCRF 1" >>confdefs.h ++ +++fi +++ +++ +++ case $target in +++ *-*-aix*) conftest_s=' .machine "pwr10" +++ .csect .text[PR] +++ tend. 0';; +++ *-*-darwin*) conftest_s=' .text +++ tend. 0';; +++ *) conftest_s=' .machine power10 +++ .text +++ tend. 0';; +++ esac +++ +++ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for htm support on Power10" >&5 +++$as_echo_n "checking assembler for htm support on Power10... " >&6; } +++if ${gcc_cv_as_power10_htm+:} false; then : +++ $as_echo_n "(cached) " >&6 +++else +++ gcc_cv_as_power10_htm=no +++ if test x$gcc_cv_as != x; then +++ $as_echo "$conftest_s" > conftest.s +++ if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5' +++ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 +++ (eval $ac_try) 2>&5 +++ ac_status=$? +++ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 +++ test $ac_status = 0; }; } +++ then +++ gcc_cv_as_power10_htm=yes +++ else +++ echo "configure: failed program was" >&5 +++ cat conftest.s >&5 +++ fi +++ rm -f conftest.o conftest.s +++ fi +++fi +++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_power10_htm" >&5 +++$as_echo "$gcc_cv_as_power10_htm" >&6; } +++if test $gcc_cv_as_power10_htm = yes; then +++ +++$as_echo "#define HAVE_AS_POWER10_HTM 1" >>confdefs.h +++ ++ fi ++ ++ ++--- a/src/gcc/configure.ac +++++ b/src/gcc/configure.ac ++@@ -5032,6 +5032,23 @@ gd: ++ [AC_DEFINE(HAVE_AS_MFCRF, 1, ++ [Define if your assembler supports mfcr field.])]) ++ +++ case $target in +++ *-*-aix*) conftest_s=' .machine "pwr10" +++ .csect .text[[PR]] +++ tend. 0';; +++ *-*-darwin*) conftest_s=' .text +++ tend. 0';; +++ *) conftest_s=' .machine power10 +++ .text +++ tend. 0';; +++ esac +++ +++ gcc_GAS_CHECK_FEATURE([htm support on Power10], +++ gcc_cv_as_power10_htm,, +++ [$conftest_s],, +++ [AC_DEFINE(HAVE_AS_POWER10_HTM, 1, +++ [Define if your assembler supports htm insns on power10.])]) +++ ++ case $target in ++ *-*-aix*) conftest_s=' .csect .text[[PR]] ++ LCF..0: ++--- a/src/gcc/cp/ChangeLog +++++ b/src/gcc/cp/ChangeLog ++@@ -1,3 +1,182 @@ +++2024-01-15 Patrick Palka +++ +++ Backported from master: +++ 2024-01-15 Patrick Palka +++ +++ PR c++/109899 +++ * init.cc (build_vec_delete_1): Assume expr_noexcept_p returns +++ false in a template context. +++ +++2023-12-24 Patrick Palka +++ +++ Backported from master: +++ 2023-09-22 Patrick Palka +++ +++ PR c++/111485 +++ * pt.cc (is_compatible_template_arg): New parameter 'args'. +++ Add the outer template arguments 'args' to 'new_args'. +++ (convert_template_argument): Pass 'args' to +++ is_compatible_template_arg. +++ +++2023-12-20 Patrick Palka +++ +++ Backported from master: +++ 2023-04-25 Patrick Palka +++ +++ PR c++/108975 +++ * pt.cc (value_dependent_expression_p) : +++ Suppress conservative early exit for reference variables +++ when DECL_HAS_VALUE_EXPR_P. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-08 Jakub Jelinek +++ +++ PR sanitizer/112727 +++ * cp-gimplify.cc (cp_fold): If SAVE_EXPR has been previously +++ folded, unshare_expr what is returned. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-04 Jakub Jelinek +++ +++ PR c++/112795 +++ * parser.cc (cp_parser_pragma_unroll): Use fold_non_dependent_expr +++ instead of maybe_constant_value. +++ +++2023-11-27 Patrick Palka +++ +++ Backported from master: +++ 2023-11-16 Patrick Palka +++ +++ PR c++/111703 +++ PR c++/107939 +++ * constexpr.cc (potential_constant_expression_1) : +++ Fix FUNCTION_POINTER_TYPE_P test. +++ +++2023-11-27 Patrick Palka +++ +++ Backported from master: +++ 2023-11-15 Patrick Palka +++ +++ PR c++/111703 +++ PR c++/112269 +++ * constexpr.cc (potential_constant_expression_1) : +++ Only consider var_in_maybe_constexpr_fn if 'now' is false. +++ : Likewise. +++ +++2023-11-17 Jason Merrill +++ +++ PR c++/112301 +++ PR c++/102191 +++ PR c++/33799 +++ * except.cc (maybe_splice_retval_cleanup): Clear +++ current_retval_sentinel when destroying retval. +++ * semantics.cc (nrv_data): Add in_nrv_cleanup. +++ (finalize_nrv): Set it. +++ (finalize_nrv_r): Fix handling of throwing cleanups. +++ +++2023-11-17 Jason Merrill +++ +++ * semantics.cc (finalize_nrv_r): [RETURN_EXPR]: Only replace the +++ INIT_EXPR. +++ +++2023-11-17 Jason Merrill +++ +++ PR c++/33799 +++ * except.cc (maybe_splice_retval_cleanup): Change +++ recognition of function body and try scopes. +++ * semantics.cc (do_poplevel): Call it after poplevel. +++ (at_try_scope): New. +++ * cp-tree.h (maybe_splice_retval_cleanup): Adjust. +++ +++2023-08-11 Jason Merrill +++ +++ PR c++/106310 +++ * parser.cc (cp_parser_template_name): Skip non-member +++ lookup after the template keyword. +++ (cp_parser_lookup_name): Pass down template_keyword_p. +++ +++2023-08-11 Jason Merrill +++ +++ PR c++/106890 +++ PR c++/109666 +++ * name-lookup.cc (maybe_push_to_top_level) +++ (maybe_pop_from_top_level): Split out... +++ * pt.cc (instantiate_body): ...from here. +++ * init.cc (maybe_instantiate_nsdmi_init): Use them. +++ * name-lookup.h: Declare them.. +++ +++2023-08-11 Jason Merrill +++ +++ PR c++/108099 +++ * decl.cc (grokdeclarator): Don't clear typedef_decl after 'unsigned +++ typedef' pedwarn. Use c_common_signed_or_unsigned_type. Also +++ handle 'signed typedef'. +++ +++2023-08-07 Patrick Palka +++ +++ Backported from master: +++ 2023-05-09 Patrick Palka +++ +++ PR c++/109761 +++ * parser.cc (cp_parser_class_specifier): Don't pass a class +++ context to noexcept_override_late_checks. +++ (noexcept_override_late_checks): Remove 'type' parameter +++ and use DECL_CONTEXT of 'fndecl' instead. +++ +++2023-07-12 Patrick Palka +++ +++ Backported from master: +++ 2023-06-29 Patrick Palka +++ +++ PR c++/110468 +++ * init.cc (maybe_instantiate_nsdmi_init): Mask out all +++ tsubst flags except for tf_warning_or_error. +++ +++2023-05-17 Jakub Jelinek +++ +++ Backported from master: +++ 2023-05-17 Jakub Jelinek +++ +++ PR c++/109868 +++ * init.cc (build_zero_init_1): Don't initialize zero-width bitfields. +++ For unions only initialize the first FIELD_DECL. +++ +++2023-05-15 Jason Merrill +++ +++ PR c++/109241 +++ * pt.cc (find_parameter_packs_r): Handle null TREE_BINFO. +++ +++2023-05-09 Patrick Palka +++ +++ Backported from master: +++ 2023-04-01 Patrick Palka +++ +++ PR c++/109160 +++ * cp-tree.h (do_auto_deduction): Add defaulted tmpl parameter. +++ * pt.cc (convert_template_argument): Pass 'in_decl' as 'tmpl' to +++ do_auto_deduction. +++ (tsubst_decl) : Pass 'tmpl' instead of 't' as +++ 'in_decl' to coerce_template_parms. +++ (unify) : Pass TPARMS_PRIMARY_TEMPLATE +++ as 'tmpl' to do_auto_deduction. +++ (do_auto_deduction): Document default arguments. Rename local +++ variable 'tmpl' to 'ctmpl'. Use 'tmpl' to obtain a full set of +++ template arguments for satisfaction in the adc_unify case. +++ +++2023-05-09 Jason Merrill +++ +++ PR c++/106740 +++ PR c++/105852 +++ * decl.cc (duplicate_decls): Change non-templated friend +++ check to an assert. +++ * pt.cc (tsubst_function_decl): Don't set DECL_TEMPLATE_INFO +++ on non-templated friends. +++ (tsubst_friend_function): Adjust. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/gcc/cp/constexpr.cc +++++ b/src/gcc/cp/constexpr.cc ++@@ -8777,7 +8777,12 @@ potential_constant_expression_1 (tree t, bool want_rval, bool strict, bool now, ++ } ++ else if (fun) ++ { ++- if (RECUR (fun, FUNCTION_POINTER_TYPE_P (fun) ? rval : any)) +++ if (TREE_TYPE (fun) +++ && FUNCTION_POINTER_TYPE_P (TREE_TYPE (fun))) +++ want_rval = rval; +++ else +++ want_rval = any; +++ if (RECUR (fun, want_rval)) ++ /* Might end up being a constant function pointer. But it ++ could also be a function object with constexpr op(), so ++ we pass 'any' so that the underlying VAR_DECL is deemed ++@@ -8847,7 +8852,7 @@ potential_constant_expression_1 (tree t, bool want_rval, bool strict, bool now, ++ return RECUR (DECL_VALUE_EXPR (t), rval); ++ } ++ if (want_rval ++- && !var_in_maybe_constexpr_fn (t) +++ && (now || !var_in_maybe_constexpr_fn (t)) ++ && !type_dependent_expression_p (t) ++ && !decl_maybe_constant_var_p (t) ++ && (strict ++@@ -8956,7 +8961,7 @@ potential_constant_expression_1 (tree t, bool want_rval, bool strict, bool now, ++ STRIP_NOPS (x); ++ if (is_this_parameter (x) && !is_capture_proxy (x)) ++ { ++- if (!var_in_maybe_constexpr_fn (x)) +++ if (now || !var_in_maybe_constexpr_fn (x)) ++ { ++ if (flags & tf_error) ++ error_at (loc, "use of % in a constant expression"); ++--- a/src/gcc/cp/cp-gimplify.cc +++++ b/src/gcc/cp/cp-gimplify.cc ++@@ -2453,7 +2453,14 @@ cp_fold (tree x) ++ fold_cache = hash_map::create_ggc (101); ++ ++ if (tree *cached = fold_cache->get (x)) ++- return *cached; +++ { +++ /* unshare_expr doesn't recurse into SAVE_EXPRs. If SAVE_EXPR's +++ argument has been folded into a tree invariant, make sure it is +++ unshared. See PR112727. */ +++ if (TREE_CODE (x) == SAVE_EXPR && *cached != x) +++ return unshare_expr (*cached); +++ return *cached; +++ } ++ ++ uid_sensitive_constexpr_evaluation_checker c; ++ ++--- a/src/gcc/cp/cp-tree.h +++++ b/src/gcc/cp/cp-tree.h ++@@ -7014,7 +7014,7 @@ extern tree begin_eh_spec_block (void); ++ extern void finish_eh_spec_block (tree, tree); ++ extern tree build_eh_type_type (tree); ++ extern tree cp_protect_cleanup_actions (void); ++-extern void maybe_splice_retval_cleanup (tree); +++extern void maybe_splice_retval_cleanup (tree, bool); ++ extern tree maybe_set_retval_sentinel (void); ++ ++ extern tree template_parms_to_args (tree); ++@@ -7295,7 +7295,8 @@ extern tree do_auto_deduction (tree, tree, tree, ++ auto_deduction_context ++ = adc_unspecified, ++ tree = NULL_TREE, ++- int = LOOKUP_NORMAL); +++ int = LOOKUP_NORMAL, +++ tree = NULL_TREE); ++ extern tree type_uses_auto (tree); ++ extern tree type_uses_auto_or_concept (tree); ++ extern void append_type_to_template_for_access_check (tree, tree, tree, ++--- a/src/gcc/cp/decl.cc +++++ b/src/gcc/cp/decl.cc ++@@ -2666,10 +2666,11 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden) ++ = TINFO_USED_TEMPLATE_ID (new_template_info); ++ } ++ ++- if (non_templated_friend_p (olddecl)) ++- /* Don't copy tinfo from a non-templated friend (PR105761). */; ++- else ++- DECL_TEMPLATE_INFO (newdecl) = DECL_TEMPLATE_INFO (olddecl); +++ /* We don't want to copy template info from a non-templated friend +++ (PR105761), but these shouldn't have DECL_TEMPLATE_INFO now. */ +++ gcc_checking_assert (!DECL_TEMPLATE_INFO (olddecl) +++ || !non_templated_friend_p (olddecl)); +++ DECL_TEMPLATE_INFO (newdecl) = DECL_TEMPLATE_INFO (olddecl); ++ } ++ ++ if (DECL_DECLARES_FUNCTION_P (newdecl)) ++@@ -12300,11 +12301,14 @@ grokdeclarator (const cp_declarator *declarator, ++ { ++ if (typedef_decl) ++ { ++- pedwarn (loc, OPT_Wpedantic, "%qs specified with %qT", ++- key, type); +++ pedwarn (loc, OPT_Wpedantic, +++ "%qs specified with typedef-name %qD", +++ key, typedef_decl); ++ ok = !flag_pedantic_errors; ++- type = DECL_ORIGINAL_TYPE (typedef_decl); ++- typedef_decl = NULL_TREE; +++ /* PR108099: __int128_t comes from c_common_nodes_and_builtins, +++ and is not built as a typedef. */ +++ if (is_typedef_decl (typedef_decl)) +++ type = DECL_ORIGINAL_TYPE (typedef_decl); ++ } ++ else if (declspecs->decltype_p) ++ error_at (loc, "%qs specified with %", key); ++@@ -12357,7 +12361,7 @@ grokdeclarator (const cp_declarator *declarator, ++ else if (type == char_type_node) ++ type = unsigned_char_type_node; ++ else if (typedef_decl) ++- type = unsigned_type_for (type); +++ type = c_common_unsigned_type (type); ++ else ++ type = unsigned_type_node; ++ } ++@@ -12371,6 +12375,8 @@ grokdeclarator (const cp_declarator *declarator, ++ type = long_integer_type_node; ++ else if (short_p) ++ type = short_integer_type_node; +++ else if (signed_p && typedef_decl) +++ type = c_common_signed_type (type); ++ ++ if (decl_spec_seq_has_spec_p (declspecs, ds_complex)) ++ { ++--- a/src/gcc/cp/except.cc +++++ b/src/gcc/cp/except.cc ++@@ -1318,21 +1318,20 @@ maybe_set_retval_sentinel () ++ on throw. */ ++ ++ void ++-maybe_splice_retval_cleanup (tree compound_stmt) +++maybe_splice_retval_cleanup (tree compound_stmt, bool is_try) ++ { ++- /* If we need a cleanup for the return value, add it in at the same level as +++ if (!current_function_decl || !cfun +++ || DECL_CONSTRUCTOR_P (current_function_decl) +++ || DECL_DESTRUCTOR_P (current_function_decl) +++ || !current_retval_sentinel) +++ return; +++ +++ /* if we need a cleanup for the return value, add it in at the same level as ++ pushdecl_outermost_localscope. And also in try blocks. */ ++- const bool function_body ++- = (current_binding_level->level_chain ++- && current_binding_level->level_chain->kind == sk_function_parms ++- /* When we're processing a default argument, c_f_d may not have been ++- set. */ ++- && current_function_decl); ++- ++- if ((function_body || current_binding_level->kind == sk_try) ++- && !DECL_CONSTRUCTOR_P (current_function_decl) ++- && !DECL_DESTRUCTOR_P (current_function_decl) ++- && current_retval_sentinel) +++ cp_binding_level *b = current_binding_level; +++ const bool function_body = b->kind == sk_function_parms; +++ +++ if (function_body || is_try) ++ { ++ location_t loc = DECL_SOURCE_LOCATION (current_function_decl); ++ tree_stmt_iterator iter = tsi_start (compound_stmt); ++@@ -1358,6 +1357,14 @@ maybe_splice_retval_cleanup (tree compound_stmt) ++ tsi_delink (&iter); ++ } ++ tree dtor = build_cleanup (retval); +++ if (!function_body) +++ { +++ /* Clear the sentinel so we don't try to destroy the retval again on +++ rethrow (c++/112301). */ +++ tree clear = build2 (MODIFY_EXPR, boolean_type_node, +++ current_retval_sentinel, boolean_false_node); +++ dtor = build2 (COMPOUND_EXPR, void_type_node, clear, dtor); +++ } ++ tree cond = build3 (COND_EXPR, void_type_node, current_retval_sentinel, ++ dtor, void_node); ++ tree cleanup = build_stmt (loc, CLEANUP_STMT, ++--- a/src/gcc/cp/init.cc +++++ b/src/gcc/cp/init.cc ++@@ -189,15 +189,21 @@ build_zero_init_1 (tree type, tree nelts, bool static_storage_p, ++ init = build_zero_cst (type); ++ else if (RECORD_OR_UNION_CODE_P (TREE_CODE (type))) ++ { ++- tree field; +++ tree field, next; ++ vec *v = NULL; ++ ++ /* Iterate over the fields, building initializations. */ ++- for (field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field)) +++ for (field = TYPE_FIELDS (type); field; field = next) ++ { +++ next = DECL_CHAIN (field); +++ ++ if (TREE_CODE (field) != FIELD_DECL) ++ continue; ++ +++ /* For unions, only the first field is initialized. */ +++ if (TREE_CODE (type) == UNION_TYPE) +++ next = NULL_TREE; +++ ++ if (TREE_TYPE (field) == error_mark_node) ++ continue; ++ ++@@ -212,6 +218,11 @@ build_zero_init_1 (tree type, tree nelts, bool static_storage_p, ++ continue; ++ } ++ +++ /* Don't add zero width bitfields. */ +++ if (DECL_C_BIT_FIELD (field) +++ && integer_zerop (DECL_SIZE (field))) +++ continue; +++ ++ /* Note that for class types there will be FIELD_DECLs ++ corresponding to base classes as well. Thus, iterating ++ over TYPE_FIELDs will result in correct initialization of ++@@ -230,10 +241,6 @@ build_zero_init_1 (tree type, tree nelts, bool static_storage_p, ++ if (value) ++ CONSTRUCTOR_APPEND_ELT(v, field, value); ++ } ++- ++- /* For unions, only the first field is initialized. */ ++- if (TREE_CODE (type) == UNION_TYPE) ++- break; ++ } ++ ++ /* Build a constructor to contain the initializations. */ ++@@ -572,6 +579,10 @@ maybe_instantiate_nsdmi_init (tree member, tsubst_flags_t complain) ++ tree init = DECL_INITIAL (member); ++ if (init && DECL_LANG_SPECIFIC (member) && DECL_TEMPLATE_INFO (member)) ++ { +++ /* Clear any special tsubst flags; the result of NSDMI instantiation +++ should be independent of the substitution context. */ +++ complain &= tf_warning_or_error; +++ ++ init = DECL_INITIAL (DECL_TI_TEMPLATE (member)); ++ location_t expr_loc ++ = cp_expr_loc_or_loc (init, DECL_SOURCE_LOCATION (member)); ++@@ -599,15 +610,9 @@ maybe_instantiate_nsdmi_init (tree member, tsubst_flags_t complain) ++ bool pushed = false; ++ tree ctx = DECL_CONTEXT (member); ++ ++- processing_template_decl_sentinel ptds (/*reset*/false); +++ bool push_to_top = maybe_push_to_top_level (member); ++ if (!currently_open_class (ctx)) ++ { ++- if (!LOCAL_CLASS_P (ctx)) ++- push_to_top_level (); ++- else ++- /* push_to_top_level would lose the necessary function context, ++- just reset processing_template_decl. */ ++- processing_template_decl = 0; ++ push_nested_class (ctx); ++ push_deferring_access_checks (dk_no_deferred); ++ pushed = true; ++@@ -635,9 +640,8 @@ maybe_instantiate_nsdmi_init (tree member, tsubst_flags_t complain) ++ { ++ pop_deferring_access_checks (); ++ pop_nested_class (); ++- if (!LOCAL_CLASS_P (ctx)) ++- pop_from_top_level (); ++ } +++ maybe_pop_from_top_level (push_to_top); ++ ++ input_location = sloc; ++ } ++@@ -4154,7 +4158,8 @@ build_vec_delete_1 (location_t loc, tree base, tree maxindex, tree type, ++ ++ /* If one destructor throws, keep trying to clean up the rest, unless we're ++ already in a build_vec_init cleanup. */ ++- if (flag_exceptions && !in_cleanup && !expr_noexcept_p (tmp, tf_none)) +++ if (flag_exceptions && !in_cleanup && !processing_template_decl +++ && !expr_noexcept_p (tmp, tf_none)) ++ { ++ loop = build2 (TRY_CATCH_EXPR, void_type_node, loop, ++ unshare_expr (loop)); ++--- a/src/gcc/cp/name-lookup.cc +++++ b/src/gcc/cp/name-lookup.cc ++@@ -8451,6 +8451,43 @@ pop_from_top_level (void) ++ free_saved_scope = s; ++ } ++ +++/* Like push_to_top_level, but not if D is function-local. Returns whether we +++ did push to top. */ +++ +++bool +++maybe_push_to_top_level (tree d) +++{ +++ /* Push if D isn't function-local, or is a lambda function, for which name +++ resolution is already done. */ +++ bool push_to_top +++ = !(current_function_decl +++ && !LAMBDA_FUNCTION_P (d) +++ && decl_function_context (d) == current_function_decl); +++ +++ if (push_to_top) +++ push_to_top_level (); +++ else +++ { +++ gcc_assert (!processing_template_decl); +++ push_function_context (); +++ cp_unevaluated_operand = 0; +++ c_inhibit_evaluation_warnings = 0; +++ } +++ +++ return push_to_top; +++} +++ +++/* Return from whatever maybe_push_to_top_level did. */ +++ +++void +++maybe_pop_from_top_level (bool push_to_top) +++{ +++ if (push_to_top) +++ pop_from_top_level (); +++ else +++ pop_function_context (); +++} +++ ++ /* Push into the scope of the namespace NS, even if it is deeply ++ nested within another namespace. */ ++ ++--- a/src/gcc/cp/name-lookup.h +++++ b/src/gcc/cp/name-lookup.h ++@@ -468,6 +468,8 @@ extern void push_nested_namespace (tree); ++ extern void pop_nested_namespace (tree); ++ extern void push_to_top_level (void); ++ extern void pop_from_top_level (void); +++extern bool maybe_push_to_top_level (tree); +++extern void maybe_pop_from_top_level (bool); ++ extern void push_using_decl_bindings (tree, tree); ++ ++ /* Lower level interface for modules. */ ++--- a/src/gcc/cp/parser.cc +++++ b/src/gcc/cp/parser.cc ++@@ -249,7 +249,7 @@ static cp_token_cache *cp_token_cache_new ++ static tree cp_parser_late_noexcept_specifier ++ (cp_parser *, tree); ++ static void noexcept_override_late_checks ++- (tree, tree); +++ (tree); ++ ++ static void cp_parser_initial_pragma ++ (cp_token *); ++@@ -2660,7 +2660,7 @@ static tree cp_parser_objc_struct_declaration ++ /* Utility Routines */ ++ ++ static cp_expr cp_parser_lookup_name ++- (cp_parser *, tree, enum tag_types, bool, bool, bool, tree *, location_t); +++ (cp_parser *, tree, enum tag_types, int, bool, bool, tree *, location_t); ++ static tree cp_parser_lookup_name_simple ++ (cp_parser *, tree, location_t); ++ static tree cp_parser_maybe_treat_template_as_class ++@@ -18590,7 +18590,7 @@ cp_parser_template_name (cp_parser* parser, ++ /* Look up the name. */ ++ decl = cp_parser_lookup_name (parser, identifier, ++ tag_type, ++- /*is_template=*/true, +++ /*is_template=*/1 + template_keyword_p, ++ /*is_namespace=*/false, ++ check_dependency_p, ++ /*ambiguous_decls=*/NULL, ++@@ -26151,7 +26151,7 @@ cp_parser_class_specifier_1 (cp_parser* parser) ++ /* The finish_struct call above performed various override checking, ++ but it skipped unparsed noexcept-specifier operands. Now that we ++ have resolved them, check again. */ ++- noexcept_override_late_checks (type, decl); +++ noexcept_override_late_checks (decl); ++ ++ /* Remove any member-function parameters from the symbol table. */ ++ pop_injected_parms (); ++@@ -27876,14 +27876,13 @@ cp_parser_late_noexcept_specifier (cp_parser *parser, tree default_arg) ++ } ++ ++ /* Perform late checking of overriding function with respect to their ++- noexcept-specifiers. TYPE is the class and FNDECL is the function ++- that potentially overrides some virtual function with the same ++- signature. */ +++ noexcept-specifiers. FNDECL is the member function that potentially +++ overrides some virtual function with the same signature. */ ++ ++ static void ++-noexcept_override_late_checks (tree type, tree fndecl) +++noexcept_override_late_checks (tree fndecl) ++ { ++- tree binfo = TYPE_BINFO (type); +++ tree binfo = TYPE_BINFO (DECL_CONTEXT (fndecl)); ++ tree base_binfo; ++ ++ if (DECL_STATIC_FUNCTION_P (fndecl)) ++@@ -30389,7 +30388,7 @@ prefer_type_arg (tag_types tag_type) ++ refer to types are ignored. ++ ++ If IS_TEMPLATE is TRUE, bindings that do not refer to templates are ++- ignored. +++ ignored. If IS_TEMPLATE IS 2, the 'template' keyword was specified. ++ ++ If IS_NAMESPACE is TRUE, bindings that do not refer to namespaces ++ are ignored. ++@@ -30404,7 +30403,7 @@ prefer_type_arg (tag_types tag_type) ++ static cp_expr ++ cp_parser_lookup_name (cp_parser *parser, tree name, ++ enum tag_types tag_type, ++- bool is_template, +++ int is_template, ++ bool is_namespace, ++ bool check_dependency, ++ tree *ambiguous_decls, ++@@ -30589,7 +30588,14 @@ cp_parser_lookup_name (cp_parser *parser, tree name, ++ else ++ decl = NULL_TREE; ++ ++- if (!decl) +++ /* If we didn't find a member and have dependent bases, the member lookup +++ is now dependent. */ +++ if (!dep && !decl && any_dependent_bases_p (object_type)) +++ dep = true; +++ +++ if (dep && is_template == 2) +++ /* The template keyword specifies a dependent template. */; +++ else if (!decl) ++ /* Look it up in the enclosing context. DR 141: When looking for a ++ template-name after -> or ., only consider class templates. */ ++ decl = lookup_name (name, is_namespace ? LOOK_want::NAMESPACE ++@@ -30602,8 +30608,7 @@ cp_parser_lookup_name (cp_parser *parser, tree name, ++ ++ /* If we know we're looking for a type (e.g. A in p->A::x), ++ mock up a typename. */ ++- if (!decl && object_type && tag_type != none_type ++- && dependentish_scope_p (object_type)) +++ if (!decl && dep && tag_type != none_type) ++ { ++ tree type = build_typename_type (object_type, name, name, ++ typename_type); ++@@ -47664,7 +47669,7 @@ cp_parser_pragma_unroll (cp_parser *parser, cp_token *pragma_tok) ++ location_t location = cp_lexer_peek_token (parser->lexer)->location; ++ tree expr = cp_parser_constant_expression (parser); ++ unsigned short unroll; ++- expr = maybe_constant_value (expr); +++ expr = fold_non_dependent_expr (expr); ++ HOST_WIDE_INT lunroll = 0; ++ if (!INTEGRAL_TYPE_P (TREE_TYPE (expr)) ++ || TREE_CODE (expr) != INTEGER_CST ++--- a/src/gcc/cp/pt.cc +++++ b/src/gcc/cp/pt.cc ++@@ -4106,10 +4106,14 @@ find_parameter_packs_r (tree *tp, int *walk_subtrees, void* data) ++ case TAG_DEFN: ++ t = TREE_TYPE (t); ++ if (CLASS_TYPE_P (t)) ++- /* Local class, need to look through the whole definition. */ ++- for (tree bb : BINFO_BASE_BINFOS (TYPE_BINFO (t))) ++- cp_walk_tree (&BINFO_TYPE (bb), &find_parameter_packs_r, ++- ppd, ppd->visited); +++ { +++ /* Local class, need to look through the whole definition. +++ TYPE_BINFO might be unset for a partial instantiation. */ +++ if (TYPE_BINFO (t)) +++ for (tree bb : BINFO_BASE_BINFOS (TYPE_BINFO (t))) +++ cp_walk_tree (&BINFO_TYPE (bb), &find_parameter_packs_r, +++ ppd, ppd->visited); +++ } ++ else ++ /* Enum, look at the values. */ ++ for (tree l = TYPE_VALUES (t); l; l = TREE_CHAIN (l)) ++@@ -8322,7 +8326,7 @@ canonicalize_expr_argument (tree arg, tsubst_flags_t complain) ++ constrained than the parameter. */ ++ ++ static bool ++-is_compatible_template_arg (tree parm, tree arg) +++is_compatible_template_arg (tree parm, tree arg, tree args) ++ { ++ tree parm_cons = get_constraints (parm); ++ ++@@ -8343,6 +8347,7 @@ is_compatible_template_arg (tree parm, tree arg) ++ { ++ tree aparms = DECL_INNERMOST_TEMPLATE_PARMS (arg); ++ new_args = template_parms_level_to_args (aparms); +++ new_args = add_to_template_args (args, new_args); ++ ++processing_template_decl; ++ parm_cons = tsubst_constraint_info (parm_cons, new_args, ++ tf_none, NULL_TREE); ++@@ -8601,7 +8606,7 @@ convert_template_argument (tree parm, ++ // Check that the constraints are compatible before allowing the ++ // substitution. ++ if (val != error_mark_node) ++- if (!is_compatible_template_arg (parm, arg)) +++ if (!is_compatible_template_arg (parm, arg, args)) ++ { ++ if (in_decl && (complain & tf_error)) ++ { ++@@ -8636,7 +8641,7 @@ convert_template_argument (tree parm, ++ else if (tree a = type_uses_auto (t)) ++ { ++ t = do_auto_deduction (t, arg, a, complain, adc_unify, args, ++- LOOKUP_IMPLICIT); +++ LOOKUP_IMPLICIT, /*tmpl=*/in_decl); ++ if (t == error_mark_node) ++ return error_mark_node; ++ } ++@@ -11339,9 +11344,10 @@ tsubst_friend_function (tree decl, tree args) ++ tree new_friend_template_info = DECL_TEMPLATE_INFO (new_friend); ++ tree new_friend_result_template_info = NULL_TREE; ++ bool new_friend_is_defn = ++- (DECL_INITIAL (DECL_TEMPLATE_RESULT ++- (template_for_substitution (new_friend))) ++- != NULL_TREE); +++ (new_friend_template_info +++ && (DECL_INITIAL (DECL_TEMPLATE_RESULT +++ (template_for_substitution (new_friend))) +++ != NULL_TREE)); ++ tree not_tmpl = new_friend; ++ ++ if (TREE_CODE (new_friend) == TEMPLATE_DECL) ++@@ -14175,6 +14181,10 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t complain, ++ && !LAMBDA_FUNCTION_P (t)) ++ return t; ++ +++ /* A non-templated friend doesn't get DECL_TEMPLATE_INFO. */ +++ if (non_templated_friend_p (t)) +++ goto friend_case; +++ ++ /* Calculate the most general template of which R is a ++ specialization. */ ++ gen_tmpl = most_general_template (DECL_TI_TEMPLATE (t)); ++@@ -14220,6 +14230,7 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t complain, ++ tsubst_friend_function, and we want only to create a ++ new decl (R) with appropriate types so that we can call ++ determine_specialization. */ +++ friend_case: ++ gen_tmpl = NULL_TREE; ++ argvec = NULL_TREE; ++ } ++@@ -14415,7 +14426,7 @@ tsubst_function_decl (tree t, tree args, tsubst_flags_t complain, ++ /* If this is an instantiation of a member template, clone it. ++ If it isn't, that'll be handled by ++ clone_constructors_and_destructors. */ ++- if (PRIMARY_TEMPLATE_P (gen_tmpl)) +++ if (gen_tmpl && PRIMARY_TEMPLATE_P (gen_tmpl)) ++ clone_cdtor (r, /*update_methods=*/false); ++ } ++ else if ((complain & tf_error) != 0 ++@@ -15022,7 +15033,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) ++ if (argvec != error_mark_node) ++ argvec = (coerce_innermost_template_parms ++ (DECL_TEMPLATE_PARMS (gen_tmpl), ++- argvec, t, complain, +++ argvec, tmpl, complain, ++ /*all*/true, /*defarg*/true)); ++ if (argvec == error_mark_node) ++ RETURN (error_mark_node); ++@@ -24449,7 +24460,9 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict, ++ if (tree a = type_uses_auto (tparm)) ++ { ++ tparm = do_auto_deduction (tparm, arg, a, ++- complain, adc_unify, targs); +++ complain, adc_unify, targs, +++ LOOKUP_NORMAL, +++ TPARMS_PRIMARY_TEMPLATE (tparms)); ++ if (tparm == error_mark_node) ++ return 1; ++ } ++@@ -26493,20 +26506,7 @@ instantiate_body (tree pattern, tree args, tree d, bool nested_p) ++ if (current_function_decl) ++ save_omp_privatization_clauses (omp_privatization_save); ++ ++- bool push_to_top ++- = !(current_function_decl ++- && !LAMBDA_FUNCTION_P (d) ++- && decl_function_context (d) == current_function_decl); ++- ++- if (push_to_top) ++- push_to_top_level (); ++- else ++- { ++- gcc_assert (!processing_template_decl); ++- push_function_context (); ++- cp_unevaluated_operand = 0; ++- c_inhibit_evaluation_warnings = 0; ++- } +++ bool push_to_top = maybe_push_to_top_level (d); ++ ++ if (VAR_P (d)) ++ { ++@@ -26619,10 +26619,7 @@ instantiate_body (tree pattern, tree args, tree d, bool nested_p) ++ if (!nested_p) ++ TI_PENDING_TEMPLATE_FLAG (DECL_TEMPLATE_INFO (d)) = 0; ++ ++- if (push_to_top) ++- pop_from_top_level (); ++- else ++- pop_function_context (); +++ maybe_pop_from_top_level (push_to_top); ++ ++ if (current_function_decl) ++ restore_omp_privatization_clauses (omp_privatization_save); ++@@ -27644,9 +27641,7 @@ value_dependent_expression_p (tree expression) ++ case VAR_DECL: ++ /* A constant with literal type and is initialized ++ with an expression that is value-dependent. */ ++- if (DECL_DEPENDENT_INIT_P (expression) ++- /* FIXME cp_finish_decl doesn't fold reference initializers. */ ++- || TYPE_REF_P (TREE_TYPE (expression))) +++ if (DECL_DEPENDENT_INIT_P (expression)) ++ return true; ++ if (DECL_HAS_VALUE_EXPR_P (expression)) ++ { ++@@ -27661,6 +27656,9 @@ value_dependent_expression_p (tree expression) ++ && value_expr == error_mark_node)) ++ return true; ++ } +++ else if (TYPE_REF_P (TREE_TYPE (expression))) +++ /* FIXME cp_finish_decl doesn't fold reference initializers. */ +++ return true; ++ return false; ++ ++ case DYNAMIC_CAST_EXPR: ++@@ -30334,13 +30332,20 @@ do_class_deduction (tree ptype, tree tmpl, tree init, ++ adc_requirement contexts to communicate the necessary template arguments ++ to satisfaction. OUTER_TARGS is ignored in other contexts. ++ ++- For partial-concept-ids, extra args may be appended to the list of deduced ++- template arguments prior to determining constraint satisfaction. */ +++ Additionally for adc_unify contexts TMPL is the template for which TYPE +++ is a template parameter type. +++ +++ For partial-concept-ids, extra args from OUTER_TARGS, TMPL and the current +++ scope may be appended to the list of deduced template arguments prior to +++ determining constraint satisfaction as appropriate. */ ++ ++ tree ++ do_auto_deduction (tree type, tree init, tree auto_node, ++- tsubst_flags_t complain, auto_deduction_context context, ++- tree outer_targs, int flags) +++ tsubst_flags_t complain /* = tf_warning_or_error */, +++ auto_deduction_context context /* = adc_unspecified */, +++ tree outer_targs /* = NULL_TREE */, +++ int flags /* = LOOKUP_NORMAL */, +++ tree tmpl /* = NULL_TREE */) ++ { ++ if (init == error_mark_node) ++ return error_mark_node; ++@@ -30359,9 +30364,9 @@ do_auto_deduction (tree type, tree init, tree auto_node, ++ auto_node. */ ++ complain &= ~tf_partial; ++ ++- if (tree tmpl = CLASS_PLACEHOLDER_TEMPLATE (auto_node)) +++ if (tree ctmpl = CLASS_PLACEHOLDER_TEMPLATE (auto_node)) ++ /* C++17 class template argument deduction. */ ++- return do_class_deduction (type, tmpl, init, flags, complain); +++ return do_class_deduction (type, ctmpl, init, flags, complain); ++ ++ if (init == NULL_TREE || TREE_TYPE (init) == NULL_TREE) ++ /* Nothing we can do with this, even in deduction context. */ ++@@ -30521,7 +30526,10 @@ do_auto_deduction (tree type, tree init, tree auto_node, ++ } ++ } ++ ++- tree full_targs = add_to_template_args (outer_targs, targs); +++ tree full_targs = outer_targs; +++ if (context == adc_unify && tmpl) +++ full_targs = add_outermost_template_args (tmpl, full_targs); +++ full_targs = add_to_template_args (full_targs, targs); ++ ++ /* HACK: Compensate for callers not always communicating all levels of ++ outer template arguments by filling in the outermost missing levels ++--- a/src/gcc/cp/semantics.cc +++++ b/src/gcc/cp/semantics.cc ++@@ -627,6 +627,17 @@ set_cleanup_locs (tree stmts, location_t loc) ++ set_cleanup_locs (stmt, loc); ++ } ++ +++/* True iff the innermost block scope is a try block. */ +++ +++static bool +++at_try_scope () +++{ +++ cp_binding_level *b = current_binding_level; +++ while (b && b->kind == sk_cleanup) +++ b = b->level_chain; +++ return b && b->kind == sk_try; +++} +++ ++ /* Finish a scope. */ ++ ++ tree ++@@ -634,11 +645,14 @@ do_poplevel (tree stmt_list) ++ { ++ tree block = NULL; ++ ++- maybe_splice_retval_cleanup (stmt_list); +++ bool was_try = at_try_scope (); ++ ++ if (stmts_are_full_exprs_p ()) ++ block = poplevel (kept_level_p (), 1, 0); ++ +++ /* This needs to come after poplevel merges sk_cleanup statement_lists. */ +++ maybe_splice_retval_cleanup (stmt_list, was_try); +++ ++ stmt_list = pop_stmt_list (stmt_list); ++ ++ /* input_location is the last token of the scope, usually a }. */ ++@@ -4829,6 +4843,7 @@ public: ++ tree var; ++ tree result; ++ hash_table > visited; +++ bool in_nrv_cleanup; ++ }; ++ ++ /* Helper function for walk_tree, used by finalize_nrv below. */ ++@@ -4845,14 +4860,50 @@ finalize_nrv_r (tree* tp, int* walk_subtrees, void* data) ++ *walk_subtrees = 0; ++ /* Change all returns to just refer to the RESULT_DECL; this is a nop, ++ but differs from using NULL_TREE in that it indicates that we care ++- about the value of the RESULT_DECL. */ +++ about the value of the RESULT_DECL. But preserve anything appended +++ by check_return_expr. */ ++ else if (TREE_CODE (*tp) == RETURN_EXPR) ++- TREE_OPERAND (*tp, 0) = dp->result; +++ { +++ tree *p = &TREE_OPERAND (*tp, 0); +++ while (TREE_CODE (*p) == COMPOUND_EXPR) +++ p = &TREE_OPERAND (*p, 0); +++ gcc_checking_assert (TREE_CODE (*p) == INIT_EXPR +++ && TREE_OPERAND (*p, 0) == dp->result); +++ *p = dp->result; +++ } ++ /* Change all cleanups for the NRV to only run when an exception is ++ thrown. */ ++ else if (TREE_CODE (*tp) == CLEANUP_STMT ++ && CLEANUP_DECL (*tp) == dp->var) ++- CLEANUP_EH_ONLY (*tp) = 1; +++ { +++ dp->in_nrv_cleanup = true; +++ cp_walk_tree (&CLEANUP_BODY (*tp), finalize_nrv_r, data, 0); +++ dp->in_nrv_cleanup = false; +++ cp_walk_tree (&CLEANUP_EXPR (*tp), finalize_nrv_r, data, 0); +++ *walk_subtrees = 0; +++ +++ CLEANUP_EH_ONLY (*tp) = true; +++ +++ /* If a cleanup might throw, we need to clear current_retval_sentinel on +++ the exception path so an outer cleanup added by +++ maybe_splice_retval_cleanup doesn't run. */ +++ if (cp_function_chain->throwing_cleanup) +++ { +++ tree clear = build2 (MODIFY_EXPR, boolean_type_node, +++ current_retval_sentinel, +++ boolean_false_node); +++ +++ /* We're already only on the EH path, just prepend it. */ +++ tree &exp = CLEANUP_EXPR (*tp); +++ exp = build2 (COMPOUND_EXPR, void_type_node, clear, exp); +++ } +++ } +++ /* Disable maybe_splice_retval_cleanup within the NRV cleanup scope, we don't +++ want to destroy the retval before the variable goes out of scope. */ +++ else if (TREE_CODE (*tp) == CLEANUP_STMT +++ && dp->in_nrv_cleanup +++ && CLEANUP_DECL (*tp) == dp->result) +++ CLEANUP_EXPR (*tp) = void_node; ++ /* Replace the DECL_EXPR for the NRV with an initialization of the ++ RESULT_DECL, if needed. */ ++ else if (TREE_CODE (*tp) == DECL_EXPR ++@@ -4908,6 +4959,7 @@ finalize_nrv (tree *tp, tree var, tree result) ++ ++ data.var = var; ++ data.result = result; +++ data.in_nrv_cleanup = false; ++ cp_walk_tree (tp, finalize_nrv_r, &data, 0); ++ } ++ ++--- a/src/gcc/cprop.cc +++++ b/src/gcc/cprop.cc ++@@ -22,6 +22,7 @@ along with GCC; see the file COPYING3. If not see ++ #include "coretypes.h" ++ #include "backend.h" ++ #include "rtl.h" +++#include "rtlanal.h" ++ #include "cfghooks.h" ++ #include "df.h" ++ #include "insn-config.h" ++@@ -795,7 +796,8 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) ++ /* If we've failed perform the replacement, have a single SET to ++ a REG destination and don't yet have a note, add a REG_EQUAL note ++ to not lose information. */ ++- if (!success && note == 0 && set != 0 && REG_P (SET_DEST (set))) +++ if (!success && note == 0 && set != 0 && REG_P (SET_DEST (set)) +++ && !contains_paradoxical_subreg_p (SET_SRC (set))) ++ note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src)); ++ } ++ ++--- a/src/gcc/d/ChangeLog +++++ b/src/gcc/d/ChangeLog ++@@ -1,3 +1,117 @@ +++2023-10-29 Iain Buclaw +++ +++ Backported from master: +++ 2023-10-29 Iain Buclaw +++ +++ PR d/110712 +++ * d-codegen.cc (d_build_call): Update call to convert_for_argument. +++ * d-convert.cc (is_valist_parameter_type): New function. +++ (check_valist_conversion): New function. +++ (convert_for_assignment): Update signature. Add check whether +++ assigning va_list is permissible. +++ (convert_for_argument): Likewise. +++ * d-tree.h (convert_for_assignment): Update signature. +++ (convert_for_argument): Likewise. +++ * expr.cc (ExprVisitor::visit (AssignExp *)): Update call to +++ convert_for_assignment. +++ +++2023-10-28 Iain Buclaw +++ +++ Backported from master: +++ 2023-10-28 Iain Buclaw +++ +++ PR d/112270 +++ * d-builtins.cc (d_build_d_type_nodes): Initialize d_bool_false_node, +++ d_bool_true_node. +++ * d-codegen.cc (build_array_struct_comparison): Use d_bool_false_node +++ instead of boolean_false_node. +++ * d-convert.cc (d_truthvalue_conversion): Use d_bool_false_node and +++ d_bool_true_node instead of boolean_false_node and boolean_true_node. +++ * d-tree.h (enum d_tree_index): Add DTI_BOOL_FALSE and DTI_BOOL_TRUE. +++ (d_bool_false_node): New macro. +++ (d_bool_true_node): New macro. +++ * modules.cc (build_dso_cdtor_fn): Use d_bool_false_node and +++ d_bool_true_node instead of boolean_false_node and boolean_true_node. +++ (register_moduleinfo): Use d_bool_type instead of boolean_type_node. +++ +++2023-08-15 Iain Buclaw +++ +++ PR d/110959 +++ * dmd/canthrow.d (Dsymbol_canThrow): Use foreachVar. +++ * dmd/declaration.d (TupleDeclaration::needThis): Likewise. +++ (TupleDeclaration::foreachVar): New function. +++ (VarDeclaration::setFieldOffset): Use foreachVar. +++ * dmd/dinterpret.d (Interpreter::visit (DeclarationExp)): Likewise. +++ * dmd/dsymbolsem.d (DsymbolSemanticVisitor::visit (VarDeclaration)): +++ Don't push tuple field members to the scope symbol table. +++ (determineFields): Handle pushing tuple field members here instead. +++ * dmd/dtoh.d (ToCppBuffer::visit (VarDeclaration)): Visit all tuple +++ fields. +++ (ToCppBuffer::visit (TupleDeclaration)): New function. +++ * dmd/expression.d (expandAliasThisTuples): Use foreachVar. +++ * dmd/foreachvar.d (VarWalker::visit (DeclarationExp)): Likewise. +++ * dmd/ob.d (genKill): Likewise. +++ (checkObErrors): Likewise. +++ * dmd/semantic2.d (Semantic2Visitor::visit (TupleDeclaration)): Visit +++ all tuple fields. +++ +++2023-07-07 Iain Buclaw +++ +++ Backported from master: +++ 2023-07-07 Iain Buclaw +++ +++ PR d/108842 +++ * decl.cc (DeclVisitor::visit (VarDeclaration *)): Only emit scalar +++ manifest constants. +++ (get_symbol_decl): Don't generate CONST_DECL for non-scalar manifest +++ constants. +++ * imports.cc (ImportVisitor::visit (VarDeclaration *)): New method. +++ +++2023-07-02 Iain Buclaw +++ +++ Backported from master: +++ 2023-07-02 Iain Buclaw +++ +++ PR d/110516 +++ * intrinsics.cc (expand_volatile_load): Set TREE_SIDE_EFFECTS on the +++ expanded expression. +++ (expand_volatile_store): Likewise. +++ +++2023-07-01 Iain Buclaw +++ +++ Backported from master: +++ 2023-07-01 Iain Buclaw +++ +++ PR d/110514 +++ * decl.cc (get_symbol_decl): Set TREE_READONLY on certain kinds of +++ const and immutable variables. +++ * expr.cc (ExprVisitor::visit (ArrayLiteralExp *)): Set TREE_READONLY +++ on immutable dynamic array literals. +++ +++2023-06-26 Iain Buclaw +++ +++ Backported from master: +++ 2023-06-26 Iain Buclaw +++ +++ PR d/110359 +++ * d-convert.cc (convert_for_rvalue): Only apply the @safe boolean +++ conversion to boolean fields of a union. +++ (convert_for_condition): Call convert_for_rvalue in the default case. +++ +++2023-06-26 Iain Buclaw +++ +++ Backported from master: +++ 2023-06-26 Iain Buclaw +++ +++ PR d/110113 +++ * dmd/escape.d (checkMutableArguments): Always allocate new buffer for +++ computing escapeBy. +++ +++2023-06-06 Iain Buclaw +++ +++ * dmd/MERGE: Merge upstream dmd 316b89f1e3. +++ * dmd/VERSION: Bump version to v2.100.2. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/gcc/d/d-builtins.cc +++++ b/src/gcc/d/d-builtins.cc ++@@ -846,6 +846,9 @@ d_build_d_type_nodes (void) ++ d_bool_type = make_unsigned_type (1); ++ TREE_SET_CODE (d_bool_type, BOOLEAN_TYPE); ++ +++ d_bool_false_node = TYPE_MIN_VALUE (d_bool_type); +++ d_bool_true_node = TYPE_MAX_VALUE (d_bool_type); +++ ++ char8_type_node = make_unsigned_type (8); ++ TYPE_STRING_FLAG (char8_type_node) = 1; ++ ++--- a/src/gcc/d/d-codegen.cc +++++ b/src/gcc/d/d-codegen.cc ++@@ -1105,7 +1105,7 @@ build_array_struct_comparison (tree_code code, StructDeclaration *sd, ++ if (length == 0 || result OP 0) break; */ ++ t = build_boolop (EQ_EXPR, length, d_convert (lentype, integer_zero_node)); ++ t = build_boolop (TRUTH_ORIF_EXPR, t, build_boolop (code, result, ++- boolean_false_node)); +++ d_bool_false_node)); ++ t = build1 (EXIT_EXPR, void_type_node, t); ++ add_stmt (t); ++ ++@@ -2197,14 +2197,16 @@ d_build_call (TypeFunction *tf, tree callable, tree object, ++ for (size_t i = 0; i < arguments->length; ++i) ++ { ++ Expression *arg = (*arguments)[i]; ++- tree targ = build_expr (arg); +++ tree targ; ++ ++ if (i - varargs < nparams && i >= varargs) ++ { ++ /* Actual arguments for declared formal arguments. */ ++ Parameter *parg = tf->parameterList[i - varargs]; ++- targ = convert_for_argument (targ, parg); +++ targ = convert_for_argument (arg, parg); ++ } +++ else +++ targ = build_expr (arg); ++ ++ /* Don't pass empty aggregates by value. */ ++ if (empty_aggregate_p (TREE_TYPE (targ)) && !TREE_ADDRESSABLE (targ) ++--- a/src/gcc/d/d-convert.cc +++++ b/src/gcc/d/d-convert.cc ++@@ -132,13 +132,13 @@ d_truthvalue_conversion (tree expr) ++ return expr; ++ ++ case INTEGER_CST: ++- return integer_zerop (expr) ? boolean_false_node ++- : boolean_true_node; +++ return integer_zerop (expr) ? d_bool_false_node +++ : d_bool_true_node; ++ ++ case REAL_CST: ++ return real_compare (NE_EXPR, &TREE_REAL_CST (expr), &dconst0) ++- ? boolean_true_node ++- : boolean_false_node; +++ ? d_bool_true_node +++ : d_bool_false_node; ++ ++ case ADDR_EXPR: ++ /* If we are taking the address of a decl that can never be null, ++@@ -148,7 +148,7 @@ d_truthvalue_conversion (tree expr) ++ warning (OPT_Waddress, ++ "the address of %qD will always evaluate as %", ++ TREE_OPERAND (expr, 0)); ++- return boolean_true_node; +++ return d_bool_true_node; ++ } ++ break; ++ ++@@ -620,7 +620,7 @@ convert_expr (tree exp, Type *etype, Type *totype) ++ return result ? result : convert (build_ctype (totype), exp); ++ } ++ ++-/* Return a TREE represenwation of EXPR, whose type has been converted from +++/* Return a TREE representation of EXPR, whose type has been converted from ++ * ETYPE to TOTYPE, and is being used in an rvalue context. */ ++ ++ tree ++@@ -635,20 +635,27 @@ convert_for_rvalue (tree expr, Type *etype, Type *totype) ++ { ++ /* If casting from bool, the result is either 0 or 1, any other value ++ violates @safe code, so enforce that it is never invalid. */ ++- if (CONSTANT_CLASS_P (expr)) ++- result = d_truthvalue_conversion (expr); ++- else +++ for (tree ref = expr; TREE_CODE (ref) == COMPONENT_REF; +++ ref = TREE_OPERAND (ref, 0)) ++ { ++- /* Reinterpret the boolean as an integer and test the first bit. ++- The generated code should end up being equivalent to: +++ /* If the expression is a field that's part of a union, reinterpret +++ the boolean as an integer and test the first bit. The generated +++ code should end up being equivalent to: ++ *cast(ubyte *)&expr & 1; */ ++- machine_mode bool_mode = TYPE_MODE (TREE_TYPE (expr)); ++- tree mtype = lang_hooks.types.type_for_mode (bool_mode, 1); ++- result = fold_build2 (BIT_AND_EXPR, mtype, ++- build_vconvert (mtype, expr), ++- build_one_cst (mtype)); +++ if (TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == UNION_TYPE) +++ { +++ machine_mode bool_mode = TYPE_MODE (TREE_TYPE (expr)); +++ tree mtype = lang_hooks.types.type_for_mode (bool_mode, 1); +++ result = fold_build2 (BIT_AND_EXPR, mtype, +++ build_vconvert (mtype, expr), +++ build_one_cst (mtype)); +++ break; +++ } ++ } ++ +++ if (result == NULL_TREE) +++ result = d_truthvalue_conversion (expr); +++ ++ result = convert (build_ctype (tbtype), result); ++ } ++ ++@@ -688,16 +695,86 @@ convert_for_rvalue (tree expr, Type *etype, Type *totype) ++ return result ? result : convert_expr (expr, etype, totype); ++ } ++ +++/* Helper for convert_for_assigment and convert_for_argument. +++ Returns true if EXPR is a va_list static array parameter. */ +++ +++static bool +++is_valist_parameter_type (Expression *expr) +++{ +++ Declaration *decl = NULL; +++ +++ if (VarExp *ve = expr->isVarExp ()) +++ decl = ve->var; +++ else if (SymOffExp *se = expr->isSymOffExp ()) +++ decl = se->var; +++ +++ if (decl != NULL && decl->isParameter () && valist_array_p (decl->type)) +++ return true; +++ +++ return false; +++} +++ +++/* Helper for convert_for_assigment and convert_for_argument. +++ Report erroneous uses of assigning or passing a va_list parameter. */ +++ +++static void +++check_valist_conversion (Expression *expr, Type *totype, bool in_assignment) +++{ +++ /* Parameter symbol and its converted type. */ +++ Declaration *decl = NULL; +++ /* Type of parameter when evaluated in the expression. */ +++ Type *type = NULL; +++ +++ if (VarExp *ve = expr->isVarExp ()) +++ { +++ decl = ve->var; +++ type = ve->var->type->nextOf ()->pointerTo (); +++ } +++ else if (SymOffExp *se = expr->isSymOffExp ()) +++ { +++ decl = se->var; +++ type = se->var->type->nextOf ()->pointerTo ()->pointerTo (); +++ } +++ +++ /* Should not be called unless is_valist_parameter_type also matched. */ +++ gcc_assert (decl != NULL && decl->isParameter () +++ && valist_array_p (decl->type)); +++ +++ /* OK if conversion between types is allowed. */ +++ if (type->implicitConvTo (totype) != MATCH::nomatch) +++ return; +++ +++ if (in_assignment) +++ { +++ error_at (make_location_t (expr->loc), "cannot convert parameter %qs " +++ "from type %qs to type %qs in assignment", +++ expr->toChars(), type->toChars (), totype->toChars ()); +++ } +++ else +++ { +++ error_at (make_location_t (expr->loc), "cannot convert parameter %qs " +++ "from type %qs to type %qs in argument passing", +++ expr->toChars(), type->toChars (), totype->toChars ()); +++ } +++ +++ inform (make_location_t (decl->loc), "parameters of type % " +++ "{aka %qs} are decayed to pointer types, and require % " +++ "to be converted back into a static array type", +++ decl->type->toChars ()); +++} +++ ++ /* Apply semantics of assignment to a value of type TOTYPE to EXPR ++- (e.g., pointer = array -> pointer = &array[0]) +++ For example: `pointer = array' gets lowered to `pointer = &array[0]'. +++ If LITERALP is true, then EXPR is a value used in the initialization +++ of another literal. ++ ++ Return a TREE representation of EXPR implicitly converted to TOTYPE ++ for use in assignment expressions MODIFY_EXPR, INIT_EXPR. */ ++ ++ tree ++-convert_for_assignment (tree expr, Type *etype, Type *totype) +++convert_for_assignment (Expression *expr, Type *totype, bool literalp) ++ { ++- Type *ebtype = etype->toBasetype (); +++ Type *ebtype = expr->type->toBasetype (); ++ Type *tbtype = totype->toBasetype (); ++ ++ /* Assuming this only has to handle converting a non Tsarray type to ++@@ -717,8 +794,8 @@ convert_for_assignment (tree expr, Type *etype, Type *totype) ++ vec *ce = NULL; ++ tree index = build2 (RANGE_EXPR, build_ctype (Type::tsize_t), ++ size_zero_node, size_int (count - 1)); ++- tree value = convert_for_assignment (expr, etype, sa_type->next); ++- +++ tree value = convert_for_assignment (expr, sa_type->next, +++ literalp); ++ /* Can't use VAR_DECLs in CONSTRUCTORS. */ ++ if (VAR_P (value)) ++ { ++@@ -739,38 +816,53 @@ convert_for_assignment (tree expr, Type *etype, Type *totype) ++ if ((tbtype->ty == TY::Tsarray || tbtype->ty == TY::Tstruct) ++ && ebtype->isintegral ()) ++ { ++- if (!integer_zerop (expr)) ++- gcc_unreachable (); ++- ++- return expr; +++ tree ret = build_expr (expr, false, literalp); +++ gcc_assert (integer_zerop (ret)); +++ return ret; ++ } ++ ++- return convert_for_rvalue (expr, etype, totype); +++ /* Assigning a va_list by value or reference, check whether RHS is a parameter +++ that has has been lowered by declaration_type or parameter_type. */ +++ if (is_valist_parameter_type (expr)) +++ check_valist_conversion (expr, totype, true); +++ +++ return convert_for_rvalue (build_expr (expr, false, literalp), +++ expr->type, totype); ++ } ++ ++ /* Return a TREE representation of EXPR converted to represent ++ the parameter type ARG. */ ++ ++ tree ++-convert_for_argument (tree expr, Parameter *arg) +++convert_for_argument (Expression *expr, Parameter *arg) ++ { +++ tree targ = build_expr (expr); +++ ++ /* Lazy arguments: expr should already be a delegate. */ ++ if (arg->storageClass & STClazy) ++- return expr; +++ return targ; ++ +++ /* Passing a va_list by value, check whether the target requires it to +++ be decayed to a pointer type. */ ++ if (valist_array_p (arg->type)) ++ { ++- /* Do nothing if the va_list has already been decayed to a pointer. */ ++- if (!POINTER_TYPE_P (TREE_TYPE (expr))) ++- return build_address (expr); ++- } ++- else if (parameter_reference_p (arg)) ++- { ++- /* Front-end shouldn't automatically take the address. */ ++- return convert (parameter_type (arg), build_address (expr)); +++ if (!POINTER_TYPE_P (TREE_TYPE (targ))) +++ return build_address (targ); +++ +++ /* Do nothing if the va_list has already been converted. */ +++ return targ; ++ } ++ ++- return expr; +++ /* Passing a va_list by reference, check if types are really compatible +++ after conversion from static array to pointer type. */ +++ if (is_valist_parameter_type (expr)) +++ check_valist_conversion (expr, arg->type, false); +++ +++ /* Front-end shouldn't automatically take the address of `ref' parameters. */ +++ if (parameter_reference_p (arg)) +++ return convert (parameter_type (arg), build_address (targ)); +++ +++ return targ; ++ } ++ ++ /* Perform default promotions for data used in expressions. ++@@ -845,7 +937,7 @@ convert_for_condition (tree expr, Type *type) ++ break; ++ ++ default: ++- result = expr; +++ result = convert_for_rvalue (expr, type, type); ++ break; ++ } ++ ++--- a/src/gcc/d/d-tree.h +++++ b/src/gcc/d/d-tree.h ++@@ -426,6 +426,9 @@ enum d_tree_index ++ DTI_NULL_ARRAY, ++ DTI_BOTTOM_TYPE, ++ +++ DTI_BOOL_FALSE, +++ DTI_BOOL_TRUE, +++ ++ DTI_MAX ++ }; ++ ++@@ -462,6 +465,9 @@ extern GTY(()) tree d_global_trees[DTI_MAX]; ++ #define null_array_node d_global_trees[DTI_NULL_ARRAY] ++ /* The bottom type, referred to as `noreturn` in code. */ ++ #define noreturn_type_node d_global_trees[DTI_BOTTOM_TYPE] +++/* D boolean values are always byte-sized, unlike boolean_type_node. */ +++#define d_bool_false_node d_global_trees[DTI_BOOL_FALSE] +++#define d_bool_true_node d_global_trees[DTI_BOOL_TRUE] ++ ++ /* A prefix for internal variables, which are not user-visible. */ ++ #if !defined (NO_DOT_IN_LABEL) ++@@ -600,8 +606,8 @@ extern tree d_truthvalue_conversion (tree); ++ extern tree d_convert (tree, tree); ++ extern tree convert_expr (tree, Type *, Type *); ++ extern tree convert_for_rvalue (tree, Type *, Type *); ++-extern tree convert_for_assignment (tree, Type *, Type *); ++-extern tree convert_for_argument (tree, Parameter *); +++extern tree convert_for_assignment (Expression *, Type *, bool = false); +++extern tree convert_for_argument (Expression *, Parameter *); ++ extern tree convert_for_condition (tree, Type *); ++ extern tree d_array_convert (Expression *); ++ extern tree d_array_convert (Type *, Expression *); ++--- a/src/gcc/d/decl.cc +++++ b/src/gcc/d/decl.cc ++@@ -781,7 +781,7 @@ public: ++ { ++ /* Do not store variables we cannot take the address of, ++ but keep the values for purposes of debugging. */ ++- if (!d->type->isscalar ()) +++ if (d->type->isscalar () && !d->type->hasPointers ()) ++ { ++ tree decl = get_symbol_decl (d); ++ d_pushdecl (decl); ++@@ -1199,6 +1199,20 @@ get_symbol_decl (Declaration *decl) ++ return decl->csym; ++ } ++ +++ if (VarDeclaration *vd = decl->isVarDeclaration ()) +++ { +++ /* CONST_DECL was initially intended for enumerals and may be used for +++ scalars in general, but not for aggregates. Here a non-constant +++ value is generated anyway so as its value can be used. */ +++ if (!vd->canTakeAddressOf () && !vd->type->isscalar ()) +++ { +++ gcc_assert (vd->_init && !vd->_init->isVoidInitializer ()); +++ Expression *ie = initializerToExpression (vd->_init); +++ decl->csym = build_expr (ie, false); +++ return decl->csym; +++ } +++ } +++ ++ /* Build the tree for the symbol. */ ++ FuncDeclaration *fd = decl->isFuncDeclaration (); ++ if (fd) ++@@ -1246,24 +1260,30 @@ get_symbol_decl (Declaration *decl) ++ if (vd->storage_class & STCextern) ++ DECL_EXTERNAL (decl->csym) = 1; ++ ++- /* CONST_DECL was initially intended for enumerals and may be used for ++- scalars in general, but not for aggregates. Here a non-constant ++- value is generated anyway so as the CONST_DECL only serves as a ++- placeholder for the value, however the DECL itself should never be ++- referenced in any generated code, or passed to the back-end. */ ++- if (vd->storage_class & STCmanifest) +++ if (!vd->canTakeAddressOf ()) ++ { ++ /* Cannot make an expression out of a void initializer. */ ++- if (vd->_init && !vd->_init->isVoidInitializer ()) ++- { ++- Expression *ie = initializerToExpression (vd->_init); +++ gcc_assert (vd->_init && !vd->_init->isVoidInitializer ()); +++ /* Non-scalar manifest constants have already been dealt with. */ +++ gcc_assert (vd->type->isscalar ()); ++ ++- if (!vd->type->isscalar ()) ++- DECL_INITIAL (decl->csym) = build_expr (ie, false); ++- else ++- DECL_INITIAL (decl->csym) = build_expr (ie, true); ++- } +++ Expression *ie = initializerToExpression (vd->_init); +++ DECL_INITIAL (decl->csym) = build_expr (ie, true); ++ } +++ +++ /* [type-qualifiers/const-and-immutable] +++ +++ `immutable` applies to data that cannot change. Immutable data values, +++ once constructed, remain the same for the duration of the program's +++ execution. */ +++ if (vd->isImmutable () && !vd->setInCtorOnly ()) +++ TREE_READONLY (decl->csym) = 1; +++ +++ /* `const` applies to data that cannot be changed by the const reference +++ to that data. It may, however, be changed by another reference to that +++ same data. */ +++ if (vd->isConst () && !vd->isDataseg ()) +++ TREE_READONLY (decl->csym) = 1; ++ } ++ ++ /* Set the declaration mangled identifier if static. */ ++--- a/src/gcc/d/dmd/MERGE +++++ b/src/gcc/d/dmd/MERGE ++@@ -1,4 +1,4 @@ ++-76e3b41375e3e1cb4dbca692b587d8e916c0b49f +++316b89f1e3dffcad488c26f56f58c8adfcb84b26 ++ ++ The first line of this file holds the git revision number of the last ++ merge done from the dlang/dmd repository. ++--- a/src/gcc/d/dmd/VERSION +++++ b/src/gcc/d/dmd/VERSION ++@@ -1 +1 @@ ++-v2.100.1 +++v2.100.2 ++--- a/src/gcc/d/dmd/canthrow.d +++++ b/src/gcc/d/dmd/canthrow.d ++@@ -270,18 +270,7 @@ private CT Dsymbol_canThrow(Dsymbol s, FuncDeclaration func, bool mustNotThrow) ++ } ++ else if (auto td = s.isTupleDeclaration()) ++ { ++- for (size_t i = 0; i < td.objects.dim; i++) ++- { ++- RootObject o = (*td.objects)[i]; ++- if (o.dyncast() == DYNCAST.expression) ++- { ++- Expression eo = cast(Expression)o; ++- if (auto se = eo.isDsymbolExp()) ++- { ++- result |= Dsymbol_canThrow(se.s, func, mustNotThrow); ++- } ++- } ++- } +++ td.foreachVar(&symbolDg); ++ } ++ return result; ++ } ++--- a/src/gcc/d/dmd/declaration.d +++++ b/src/gcc/d/dmd/declaration.d ++@@ -656,23 +656,46 @@ extern (C++) final class TupleDeclaration : Declaration ++ override bool needThis() ++ { ++ //printf("TupleDeclaration::needThis(%s)\n", toChars()); ++- for (size_t i = 0; i < objects.dim; i++) +++ return isexp ? foreachVar((s) { return s.needThis(); }) != 0 : false; +++ } +++ +++ /*********************************************************** +++ * Calls dg(Dsymbol) for each Dsymbol, which should be a VarDeclaration +++ * inside DsymbolExp (isexp == true). +++ * Params: +++ * dg = delegate to call for each Dsymbol +++ */ +++ extern (D) void foreachVar(scope void delegate(Dsymbol) dg) +++ { +++ assert(isexp); +++ foreach (o; *objects) ++ { ++- RootObject o = (*objects)[i]; ++- if (o.dyncast() == DYNCAST.expression) ++- { ++- Expression e = cast(Expression)o; ++- if (DsymbolExp ve = e.isDsymbolExp()) ++- { ++- Declaration d = ve.s.isDeclaration(); ++- if (d && d.needThis()) ++- { ++- return true; ++- } ++- } ++- } +++ if (auto e = o.isExpression()) +++ if (auto se = e.isDsymbolExp()) +++ dg(se.s); ++ } ++- return false; +++ } +++ +++ /*********************************************************** +++ * Calls dg(Dsymbol) for each Dsymbol, which should be a VarDeclaration +++ * inside DsymbolExp (isexp == true). +++ * If dg returns !=0, stops and returns that value else returns 0. +++ * Params: +++ * dg = delegate to call for each Dsymbol +++ * Returns: +++ * last value returned by dg() +++ */ +++ extern (D) int foreachVar(scope int delegate(Dsymbol) dg) +++ { +++ assert(isexp); +++ foreach (o; *objects) +++ { +++ if (auto e = o.isExpression()) +++ if (auto se = e.isDsymbolExp()) +++ if(auto ret = dg(se.s)) +++ return ret; +++ } +++ return 0; ++ } ++ ++ override inout(TupleDeclaration) isTupleDeclaration() inout ++@@ -1142,15 +1165,7 @@ extern (C++) class VarDeclaration : Declaration ++ // If this variable was really a tuple, set the offsets for the tuple fields ++ TupleDeclaration v2 = aliassym.isTupleDeclaration(); ++ assert(v2); ++- for (size_t i = 0; i < v2.objects.dim; i++) ++- { ++- RootObject o = (*v2.objects)[i]; ++- assert(o.dyncast() == DYNCAST.expression); ++- Expression e = cast(Expression)o; ++- assert(e.op == EXP.dSymbol); ++- DsymbolExp se = e.isDsymbolExp(); ++- se.s.setFieldOffset(ad, fieldState, isunion); ++- } +++ v2.foreachVar((s) { s.setFieldOffset(ad, fieldState, isunion); }); ++ return; ++ } ++ ++--- a/src/gcc/d/dmd/dinterpret.d +++++ b/src/gcc/d/dmd/dinterpret.d ++@@ -2291,16 +2291,12 @@ public: ++ result = null; ++ ++ // Reserve stack space for all tuple members ++- if (!td.objects) ++- return; ++- foreach (o; *td.objects) +++ td.foreachVar((s) ++ { ++- Expression ex = isExpression(o); ++- DsymbolExp ds = ex ? ex.isDsymbolExp() : null; ++- VarDeclaration v2 = ds ? ds.s.isVarDeclaration() : null; +++ VarDeclaration v2 = s.isVarDeclaration(); ++ assert(v2); ++ if (v2.isDataseg() && !v2.isCTFE()) ++- continue; +++ return 0; ++ ++ ctfeGlobals.stack.push(v2); ++ if (v2._init) ++@@ -2310,7 +2306,7 @@ public: ++ { ++ einit = interpretRegion(ie.exp, istate, goal); ++ if (exceptionOrCant(einit)) ++- return; +++ return 1; ++ } ++ else if (v2._init.isVoidInitializer()) ++ { ++@@ -2320,11 +2316,12 @@ public: ++ { ++ e.error("declaration `%s` is not yet implemented in CTFE", e.toChars()); ++ result = CTFEExp.cantexp; ++- return; +++ return 1; ++ } ++ setValue(v2, einit); ++ } ++- } +++ return 0; +++ }); ++ return; ++ } ++ if (v.isStatic()) ++--- a/src/gcc/d/dmd/dsymbolsem.d +++++ b/src/gcc/d/dmd/dsymbolsem.d ++@@ -650,7 +650,7 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor ++ else ++ ti = dsym._init ? dsym._init.syntaxCopy() : null; ++ ++- StorageClass storage_class = STC.temp | STC.local | dsym.storage_class; +++ StorageClass storage_class = STC.temp | dsym.storage_class; ++ if ((dsym.storage_class & STC.parameter) && (arg.storageClass & STC.parameter)) ++ storage_class |= arg.storageClass; ++ auto v = new VarDeclaration(dsym.loc, arg.type, id, ti, storage_class); ++@@ -659,14 +659,6 @@ private extern(C++) final class DsymbolSemanticVisitor : Visitor ++ ++ v.dsymbolSemantic(sc); ++ ++- if (sc.scopesym) ++- { ++- //printf("adding %s to %s\n", v.toChars(), sc.scopesym.toChars()); ++- if (sc.scopesym.members) ++- // Note this prevents using foreach() over members, because the limits can change ++- sc.scopesym.members.push(v); ++- } ++- ++ Expression e = new DsymbolExp(dsym.loc, v); ++ (*exps)[i] = e; ++ } ++@@ -6819,7 +6811,12 @@ bool determineFields(AggregateDeclaration ad) ++ return 1; ++ ++ if (v.aliassym) ++- return 0; // If this variable was really a tuple, skip it. +++ { +++ // If this variable was really a tuple, process each element. +++ if (auto tup = v.aliassym.isTupleDeclaration()) +++ return tup.foreachVar(tv => tv.apply(&func, ad)); +++ return 0; +++ } ++ ++ if (v.storage_class & (STC.static_ | STC.extern_ | STC.tls | STC.gshared | STC.manifest | STC.ctfe | STC.templateparameter)) ++ return 0; ++--- a/src/gcc/d/dmd/dtoh.d +++++ b/src/gcc/d/dmd/dtoh.d ++@@ -877,7 +877,11 @@ public: ++ // Tuple field are expanded into multiple VarDeclarations ++ // (we'll visit them later) ++ if (vd.type && vd.type.isTypeTuple()) +++ { +++ assert(vd.aliassym); +++ vd.toAlias().accept(this); ++ return; +++ } ++ ++ if (vd.originalType && vd.type == AST.Type.tsize_t) ++ origType = vd.originalType; ++@@ -1667,6 +1671,13 @@ public: ++ assert(false, "This node type should be handled in the EnumDeclaration"); ++ } ++ +++ override void visit(AST.TupleDeclaration tup) +++ { +++ debug (Debug_DtoH) mixin(traceVisit!tup); +++ +++ tup.foreachVar((s) { s.accept(this); }); +++ } +++ ++ /** ++ * Prints a member/parameter/variable declaration into `buf`. ++ * ++--- a/src/gcc/d/dmd/escape.d +++++ b/src/gcc/d/dmd/escape.d ++@@ -77,22 +77,7 @@ bool checkMutableArguments(Scope* sc, FuncDeclaration fd, TypeFunction tf, ++ bool isMutable; // true if reference to mutable ++ } ++ ++- /* Store escapeBy as static data escapeByStorage so we can keep reusing the same ++- * arrays rather than reallocating them. ++- */ ++- __gshared EscapeBy[] escapeByStorage; ++- auto escapeBy = escapeByStorage; ++- if (escapeBy.length < len) ++- { ++- auto newPtr = cast(EscapeBy*)mem.xrealloc(escapeBy.ptr, len * EscapeBy.sizeof); ++- // Clear the new section ++- memset(newPtr + escapeBy.length, 0, (len - escapeBy.length) * EscapeBy.sizeof); ++- escapeBy = newPtr[0 .. len]; ++- escapeByStorage = escapeBy; ++- } ++- else ++- escapeBy = escapeBy[0 .. len]; ++- +++ auto escapeBy = new EscapeBy[len]; ++ const paramLength = tf.parameterList.length; ++ ++ // Fill in escapeBy[] with arguments[], ethis, and outerVars[] ++@@ -212,13 +197,6 @@ bool checkMutableArguments(Scope* sc, FuncDeclaration fd, TypeFunction tf, ++ escape(i, eb, false); ++ } ++ ++- /* Reset the arrays in escapeBy[] so we can reuse them next time through ++- */ ++- foreach (ref eb; escapeBy) ++- { ++- eb.er.reset(); ++- } ++- ++ return errors; ++ } ++ ++--- a/src/gcc/d/dmd/expression.d +++++ b/src/gcc/d/dmd/expression.d ++@@ -348,14 +348,16 @@ int expandAliasThisTuples(Expressions* exps, size_t starti = 0) ++ if (TupleDeclaration td = exp.isAliasThisTuple) ++ { ++ exps.remove(u); ++- foreach (i, o; *td.objects) +++ size_t i; +++ td.foreachVar((s) ++ { ++- auto d = o.isExpression().isDsymbolExp().s.isDeclaration(); +++ auto d = s.isDeclaration(); ++ auto e = new DotVarExp(exp.loc, exp, d); ++ assert(d.type); ++ e.type = d.type; ++ exps.insert(u + i, e); ++- } +++ ++i; +++ }); ++ version (none) ++ { ++ printf("expansion ->\n"); ++--- a/src/gcc/d/dmd/foreachvar.d +++++ b/src/gcc/d/dmd/foreachvar.d ++@@ -75,19 +75,7 @@ void foreachVar(Expression e, void delegate(VarDeclaration) dgVar) ++ if (!v) ++ return; ++ if (TupleDeclaration td = v.toAlias().isTupleDeclaration()) ++- { ++- if (!td.objects) ++- return; ++- foreach (o; *td.objects) ++- { ++- Expression ex = isExpression(o); ++- DsymbolExp s = ex ? ex.isDsymbolExp() : null; ++- assert(s); ++- VarDeclaration v2 = s.s.isVarDeclaration(); ++- assert(v2); ++- dgVar(v2); ++- } ++- } +++ td.foreachVar((s) { dgVar(s.isVarDeclaration()); }); ++ else ++ dgVar(v); ++ Dsymbol s = v.toAlias(); ++--- a/src/gcc/d/dmd/ob.d +++++ b/src/gcc/d/dmd/ob.d ++@@ -1407,16 +1407,7 @@ void genKill(ref ObState obstate, ObNode* ob) ++ } ++ else if (auto td = s.isTupleDeclaration()) ++ { ++- foreach (o; *td.objects) ++- { ++- if (auto eo = o.isExpression()) ++- { ++- if (auto se = eo.isDsymbolExp()) ++- { ++- Dsymbol_visit(se.s); ++- } ++- } ++- } +++ td.foreachVar(&Dsymbol_visit); ++ } ++ } ++ ++@@ -2107,16 +2098,7 @@ void checkObErrors(ref ObState obstate) ++ } ++ else if (auto td = s.isTupleDeclaration()) ++ { ++- foreach (o; *td.objects) ++- { ++- if (auto eo = o.isExpression()) ++- { ++- if (auto se = eo.isDsymbolExp()) ++- { ++- Dsymbol_visit(se.s); ++- } ++- } ++- } +++ td.foreachVar(&Dsymbol_visit); ++ } ++ } ++ ++--- a/src/gcc/d/dmd/semantic2.d +++++ b/src/gcc/d/dmd/semantic2.d ++@@ -677,6 +677,11 @@ private extern(C++) final class Semantic2Visitor : Visitor ++ { ++ visit(cast(AggregateDeclaration) cd); ++ } +++ +++ override void visit(TupleDeclaration td) +++ { +++ td.foreachVar((s) { s.accept(this); }); +++ } ++ } ++ ++ /** ++--- a/src/gcc/d/expr.cc +++++ b/src/gcc/d/expr.cc ++@@ -1057,8 +1057,7 @@ public: ++ Declaration *decl = e->e1->isVarExp ()->var; ++ if (decl->storage_class & (STCout | STCref)) ++ { ++- tree t2 = convert_for_assignment (build_expr (e->e2), ++- e->e2->type, e->e1->type); +++ tree t2 = convert_for_assignment (e->e2, e->e1->type); ++ tree t1 = build_expr (e->e1); ++ /* Want reference to lhs, not indirect ref. */ ++ t1 = TREE_OPERAND (t1, 0); ++@@ -1078,8 +1077,7 @@ public: ++ if (tb1->ty == TY::Tstruct) ++ { ++ tree t1 = build_expr (e->e1); ++- tree t2 = convert_for_assignment (build_expr (e->e2, false, true), ++- e->e2->type, e->e1->type); +++ tree t2 = convert_for_assignment (e->e2, e->e1->type, true); ++ StructDeclaration *sd = tb1->isTypeStruct ()->sym; ++ ++ /* Look for struct = 0. */ ++@@ -1157,8 +1155,7 @@ public: ++ || (e->op == EXP::blit || e->e1->type->size () == 0)) ++ { ++ tree t1 = build_expr (e->e1); ++- tree t2 = convert_for_assignment (build_expr (e->e2), ++- e->e2->type, e->e1->type); +++ tree t2 = convert_for_assignment (e->e2, e->e1->type); ++ ++ this->result_ = build_assign (modifycode, t1, t2); ++ return; ++@@ -1192,8 +1189,7 @@ public: ++ ++ /* Simple assignment. */ ++ tree t1 = build_expr (e->e1); ++- tree t2 = convert_for_assignment (build_expr (e->e2), ++- e->e2->type, e->e1->type); +++ tree t2 = convert_for_assignment (e->e2, e->e1->type); ++ ++ this->result_ = build_assign (modifycode, t1, t2); ++ } ++@@ -2708,6 +2704,10 @@ public: ++ if (tb->ty == TY::Tarray) ++ ctor = d_array_value (type, size_int (e->elements->length), ctor); ++ +++ /* Immutable literals can be placed in rodata. */ +++ if (tb->isImmutable ()) +++ TREE_READONLY (decl) = 1; +++ ++ d_pushdecl (decl); ++ rest_of_decl_compilation (decl, 1, 0); ++ } ++--- a/src/gcc/d/imports.cc +++++ b/src/gcc/d/imports.cc ++@@ -127,6 +127,15 @@ public: ++ this->result_ = this->make_import (TYPE_STUB_DECL (type)); ++ } ++ +++ void visit (VarDeclaration *d) +++ { +++ /* Not all kinds of manifest constants create a CONST_DECL. */ +++ if (!d->canTakeAddressOf () && !d->type->isscalar ()) +++ return; +++ +++ visit ((Declaration *) d); +++ } +++ ++ /* For now, ignore importing other kinds of dsymbols. */ ++ void visit (ScopeDsymbol *) ++ { ++--- a/src/gcc/d/intrinsics.cc +++++ b/src/gcc/d/intrinsics.cc ++@@ -721,6 +721,7 @@ expand_volatile_load (tree callexp) ++ tree type = build_qualified_type (TREE_TYPE (ptrtype), TYPE_QUAL_VOLATILE); ++ tree result = indirect_ref (type, ptr); ++ TREE_THIS_VOLATILE (result) = 1; +++ TREE_SIDE_EFFECTS (result) = 1; ++ ++ return result; ++ } ++@@ -748,6 +749,7 @@ expand_volatile_store (tree callexp) ++ tree type = build_qualified_type (TREE_TYPE (ptrtype), TYPE_QUAL_VOLATILE); ++ tree result = indirect_ref (type, ptr); ++ TREE_THIS_VOLATILE (result) = 1; +++ TREE_SIDE_EFFECTS (result) = 1; ++ ++ /* (*(volatile T *) ptr) = value; */ ++ tree value = CALL_EXPR_ARG (callexp, 1); ++--- a/src/gcc/d/modules.cc +++++ b/src/gcc/d/modules.cc ++@@ -329,7 +329,7 @@ static tree ++ build_dso_cdtor_fn (bool ctor_p) ++ { ++ const char *name = ctor_p ? GDC_PREFIX ("dso_ctor") : GDC_PREFIX ("dso_dtor"); ++- tree condition = ctor_p ? boolean_true_node : boolean_false_node; +++ tree condition = ctor_p ? d_bool_true_node : d_bool_false_node; ++ ++ /* Declaration of dso_ctor/dso_dtor is: ++ ++@@ -452,7 +452,7 @@ register_moduleinfo (Module *decl, tree minfo) ++ d_finish_decl (dso_slot_node); ++ ++ dso_initialized_node = build_dso_registry_var (GDC_PREFIX ("dso_initialized"), ++- boolean_type_node); +++ d_bool_type); ++ d_finish_decl (dso_initialized_node); ++ ++ /* Declare dso_ctor() and dso_dtor(). */ ++--- a/src/gcc/dwarf2out.cc +++++ b/src/gcc/dwarf2out.cc ++@@ -26508,7 +26508,8 @@ process_scope_var (tree stmt, tree decl, tree origin, dw_die_ref context_die) ++ ++ if (die != NULL && die->die_parent == NULL) ++ add_child_die (context_die, die); ++- else if (TREE_CODE (decl_or_origin) == IMPORTED_DECL) +++ +++ if (TREE_CODE (decl_or_origin) == IMPORTED_DECL) ++ { ++ if (early_dwarf) ++ dwarf2out_imported_module_or_decl_1 (decl_or_origin, DECL_NAME (decl_or_origin), ++@@ -30107,8 +30108,13 @@ prune_unused_types_walk (dw_die_ref die) ++ case DW_TAG_reference_type: ++ case DW_TAG_rvalue_reference_type: ++ case DW_TAG_volatile_type: +++ case DW_TAG_restrict_type: +++ case DW_TAG_shared_type: +++ case DW_TAG_atomic_type: +++ case DW_TAG_immutable_type: ++ case DW_TAG_typedef: ++ case DW_TAG_array_type: +++ case DW_TAG_coarray_type: ++ case DW_TAG_friend: ++ case DW_TAG_enumeration_type: ++ case DW_TAG_subroutine_type: ++@@ -30117,6 +30123,8 @@ prune_unused_types_walk (dw_die_ref die) ++ case DW_TAG_subrange_type: ++ case DW_TAG_ptr_to_member_type: ++ case DW_TAG_file_type: +++ case DW_TAG_unspecified_type: +++ case DW_TAG_dynamic_type: ++ /* Type nodes are useful only when other DIEs reference them --- don't ++ mark them. */ ++ /* FALLTHROUGH */ ++--- a/src/gcc/fold-const.cc +++++ b/src/gcc/fold-const.cc ++@@ -14273,7 +14273,7 @@ multiple_of_p (tree type, const_tree top, const_tree bottom, bool nowrap) ++ && TREE_CODE (op2) == INTEGER_CST ++ && integer_pow2p (bottom) ++ && wi::multiple_of_p (wi::to_widest (op2), ++- wi::to_widest (bottom), UNSIGNED)) +++ wi::to_widest (bottom), SIGNED)) ++ return 1; ++ ++ op1 = gimple_assign_rhs1 (stmt); ++--- a/src/gcc/fortran/ChangeLog +++++ b/src/gcc/fortran/ChangeLog ++@@ -1,3 +1,90 @@ +++2023-12-01 Harald Anlauf +++ +++ Backported from master: +++ 2023-11-26 Harald Anlauf +++ +++ PR fortran/111880 +++ * resolve.cc (resolve_common_vars): Do not call gfc_add_in_common +++ for symbols that are USE associated or used in a submodule. +++ +++2023-10-21 Harald Anlauf +++ +++ Backported from master: +++ 2023-10-17 Harald Anlauf +++ +++ PR fortran/111837 +++ * frontend-passes.cc (traverse_io_block): Dependency check of loop +++ nest shall be triangular, not banded. +++ +++2023-08-06 Steve Kargl +++ +++ Backported from master: +++ 2022-12-18 Steve Kargl +++ +++ PR fortran/107397 +++ * decl.cc (add_init_expr_to_sym): Add check with new error message. +++ +++2023-07-20 Harald Anlauf +++ +++ Backported from master: +++ 2023-07-17 Harald Anlauf +++ +++ PR fortran/95947 +++ PR fortran/110658 +++ * trans-expr.cc (gfc_conv_procedure_call): For intrinsic procedures +++ whose result characteristics depends on the first argument and which +++ can be of type character, the character length will not be deferred. +++ +++2023-07-14 Harald Anlauf +++ +++ Backported from master: +++ 2023-07-11 Harald Anlauf +++ +++ PR fortran/110288 +++ * symbol.cc (gfc_copy_formal_args_intr): When deriving the formal +++ argument attributes from the actual ones for intrinsic procedure +++ calls, take special care of CHARACTER arguments that we do not +++ wrongly treat them formally as deferred-length. +++ +++2023-07-08 Harald Anlauf +++ +++ Backported from master: +++ 2023-07-08 Harald Anlauf +++ +++ PR fortran/110585 +++ * arith.cc (gfc_compare_expr): Handle equality comparison of constant +++ complex gfc_expr arguments. +++ +++2023-06-09 Jakub Jelinek +++ +++ Backported from master: +++ 2023-06-09 Jakub Jelinek +++ +++ PR fortran/96024 +++ * primary.cc (gfc_convert_to_structure_constructor): Only do +++ constant string ctor length verification and truncation/padding +++ if constant length has INTEGER type. +++ +++2023-06-04 Steve Kargl +++ +++ Backported from master: +++ 2023-06-02 Steve Kargl +++ +++ PR fortran/100607 +++ * resolve.cc (resolve_select_rank): Remove duplicate error. +++ (resolve_fl_var_and_proc): Prevent NULL pointer dereference and +++ suppress error message for temporary. +++ +++2023-05-20 Harald Anlauf +++ +++ Backported from master: +++ 2023-05-15 Harald Anlauf +++ +++ PR fortran/109846 +++ * expr.cc (gfc_check_vardef_context): Check appropriate pointer +++ attribute for CLASS vs. non-CLASS function result in variable +++ definition context. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/gcc/fortran/arith.cc +++++ b/src/gcc/fortran/arith.cc ++@@ -1080,6 +1080,11 @@ gfc_compare_expr (gfc_expr *op1, gfc_expr *op2, gfc_intrinsic_op op) ++ || (op1->value.logical && !op2->value.logical)); ++ break; ++ +++ case BT_COMPLEX: +++ gcc_assert (op == INTRINSIC_EQ); +++ rc = mpc_cmp (op1->value.complex, op2->value.complex); +++ break; +++ ++ default: ++ gfc_internal_error ("gfc_compare_expr(): Bad basic type"); ++ } ++--- a/src/gcc/fortran/decl.cc +++++ b/src/gcc/fortran/decl.cc ++@@ -2220,6 +2220,14 @@ add_init_expr_to_sym (const char *name, gfc_expr **initp, locus *var_locus) ++ sym->ts.f90_type = init->ts.f90_type; ++ } ++ +++ /* Catch the case: type(t), parameter :: x = z'1'. */ +++ if (sym->ts.type == BT_DERIVED && init->ts.type == BT_BOZ) +++ { +++ gfc_error ("Entity %qs at %L is incompatible with a BOZ " +++ "literal constant", name, &sym->declared_at); +++ return false; +++ } +++ ++ /* Add initializer. Make sure we keep the ranks sane. */ ++ if (sym->attr.dimension && init->rank == 0) ++ { ++--- a/src/gcc/fortran/expr.cc +++++ b/src/gcc/fortran/expr.cc ++@@ -6254,7 +6254,7 @@ gfc_check_vardef_context (gfc_expr* e, bool pointer, bool alloc_obj, ++ && !(sym->attr.flavor == FL_PROCEDURE && sym == sym->result) ++ && !(sym->attr.flavor == FL_PROCEDURE && sym->attr.proc_pointer) ++ && !(sym->attr.flavor == FL_PROCEDURE ++- && sym->attr.function && sym->attr.pointer)) +++ && sym->attr.function && attr.pointer)) ++ { ++ if (context) ++ gfc_error ("%qs in variable definition context (%s) at %L is not" ++--- a/src/gcc/fortran/frontend-passes.cc +++++ b/src/gcc/fortran/frontend-passes.cc ++@@ -1326,7 +1326,7 @@ traverse_io_block (gfc_code *code, bool *has_reached, gfc_code *prev) ++ if (iters[i]) ++ { ++ gfc_expr *var = iters[i]->var; ++- for (int j = i - 1; j < i; j++) +++ for (int j = 0; j < i; j++) ++ { ++ if (iters[j] ++ && (var_in_expr (var, iters[j]->start) ++--- a/src/gcc/fortran/primary.cc +++++ b/src/gcc/fortran/primary.cc ++@@ -3196,10 +3196,11 @@ gfc_convert_to_structure_constructor (gfc_expr *e, gfc_symbol *sym, gfc_expr **c ++ goto cleanup; ++ ++ /* For a constant string constructor, make sure the length is ++- correct; truncate of fill with blanks if needed. */ +++ correct; truncate or fill with blanks if needed. */ ++ if (this_comp->ts.type == BT_CHARACTER && !this_comp->attr.allocatable ++ && this_comp->ts.u.cl && this_comp->ts.u.cl->length ++ && this_comp->ts.u.cl->length->expr_type == EXPR_CONSTANT +++ && this_comp->ts.u.cl->length->ts.type == BT_INTEGER ++ && actual->expr->ts.type == BT_CHARACTER ++ && actual->expr->expr_type == EXPR_CONSTANT) ++ { ++--- a/src/gcc/fortran/resolve.cc +++++ b/src/gcc/fortran/resolve.cc ++@@ -965,8 +965,8 @@ resolve_common_vars (gfc_common_head *common_block, bool named_common) ++ ++ /* gfc_add_in_common may have been called before, but the reported errors ++ have been ignored to continue parsing. ++- We do the checks again here. */ ++- if (!csym->attr.use_assoc) +++ We do the checks again here, unless the symbol is USE associated. */ +++ if (!csym->attr.use_assoc && !csym->attr.used_in_submodule) ++ { ++ gfc_add_in_common (&csym->attr, csym->name, &common_block->where); ++ gfc_notify_std (GFC_STD_F2018_OBS, "COMMON block at %L", ++@@ -9923,11 +9923,6 @@ resolve_select_rank (gfc_code *code, gfc_namespace *old_ns) ++ || gfc_expr_attr (code->expr1).pointer)) ++ gfc_error ("RANK (*) at %L cannot be used with the pointer or " ++ "allocatable selector at %L", &c->where, &code->expr1->where); ++- ++- if (case_value == -1 && (gfc_expr_attr (code->expr1).allocatable ++- || gfc_expr_attr (code->expr1).pointer)) ++- gfc_error ("RANK (*) at %L cannot be used with the pointer or " ++- "allocatable selector at %L", &c->where, &code->expr1->where); ++ } ++ ++ /* Add EXEC_SELECT to switch on rank. */ ++@@ -12913,7 +12908,10 @@ resolve_fl_var_and_proc (gfc_symbol *sym, int mp_flag) ++ ++ if (allocatable) ++ { ++- if (dimension && as->type != AS_ASSUMED_RANK) +++ if (dimension +++ && as +++ && as->type != AS_ASSUMED_RANK +++ && !sym->attr.select_rank_temporary) ++ { ++ gfc_error ("Allocatable array %qs at %L must have a deferred " ++ "shape or assumed rank", sym->name, &sym->declared_at); ++--- a/src/gcc/fortran/symbol.cc +++++ b/src/gcc/fortran/symbol.cc ++@@ -4719,6 +4719,13 @@ gfc_copy_formal_args_intr (gfc_symbol *dest, gfc_intrinsic_sym *src, ++ formal_arg->sym->attr.flavor = FL_VARIABLE; ++ formal_arg->sym->attr.dummy = 1; ++ +++ /* Do not treat an actual deferred-length character argument wrongly +++ as template for the formal argument. */ +++ if (formal_arg->sym->ts.type == BT_CHARACTER +++ && !(formal_arg->sym->attr.allocatable +++ || formal_arg->sym->attr.pointer)) +++ formal_arg->sym->ts.deferred = false; +++ ++ if (formal_arg->sym->ts.type == BT_CHARACTER) ++ formal_arg->sym->ts.u.cl = gfc_new_charlen (gfc_current_ns, NULL); ++ ++--- a/src/gcc/fortran/trans-expr.cc +++++ b/src/gcc/fortran/trans-expr.cc ++@@ -7428,7 +7428,12 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, ++ (and other intrinsics?) and dummy functions. In the case of SPREAD, ++ we take the character length of the first argument for the result. ++ For dummies, we have to look through the formal argument list for ++- this function and use the character length found there.*/ +++ this function and use the character length found there. +++ Likewise, we handle the case of deferred-length character dummy +++ arguments to intrinsics that determine the characteristics of +++ the result, which cannot be deferred-length. */ +++ if (expr->value.function.isym) +++ ts.deferred = false; ++ if (ts.deferred) ++ cl.backend_decl = gfc_create_var (gfc_charlen_type_node, "slen"); ++ else if (!sym->attr.dummy) ++--- a/src/gcc/fwprop.cc +++++ b/src/gcc/fwprop.cc ++@@ -25,6 +25,7 @@ along with GCC; see the file COPYING3. If not see ++ #include "coretypes.h" ++ #include "backend.h" ++ #include "rtl.h" +++#include "rtlanal.h" ++ #include "df.h" ++ #include "rtl-ssa.h" ++ ++@@ -353,21 +354,6 @@ reg_single_def_p (rtx x) ++ return REG_P (x) && crtl->ssa->single_dominating_def (REGNO (x)); ++ } ++ ++-/* Return true if X contains a paradoxical subreg. */ ++- ++-static bool ++-contains_paradoxical_subreg_p (rtx x) ++-{ ++- subrtx_var_iterator::array_type array; ++- FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST) ++- { ++- x = *iter; ++- if (SUBREG_P (x) && paradoxical_subreg_p (x)) ++- return true; ++- } ++- return false; ++-} ++- ++ /* Try to substitute (set DEST SRC), which defines DEF, into note NOTE of ++ USE_INSN. Return the number of substitutions on success, otherwise return ++ -1 and leave USE_INSN unchanged. ++--- a/src/gcc/genmatch.cc +++++ b/src/gcc/genmatch.cc ++@@ -2548,7 +2548,8 @@ expr::gen_transform (FILE *f, int indent, const char *dest, bool gimple, ++ { ++ fprintf_indent (f, indent, "if (TREE_TYPE (_o%d[0]) != %s)\n", ++ depth, type); ++- indent += 2; +++ fprintf_indent (f, indent + 2, "{\n"); +++ indent += 4; ++ } ++ if (opr->kind == id_base::CODE) ++ fprintf_indent (f, indent, "_r%d = fold_build%d_loc (loc, %s, %s", ++@@ -2571,7 +2572,8 @@ expr::gen_transform (FILE *f, int indent, const char *dest, bool gimple, ++ } ++ if (*opr == CONVERT_EXPR) ++ { ++- indent -= 2; +++ fprintf_indent (f, indent - 2, "}\n"); +++ indent -= 4; ++ fprintf_indent (f, indent, "else\n"); ++ fprintf_indent (f, indent, " _r%d = _o%d[0];\n", depth, depth); ++ } ++--- a/src/gcc/gimple-fold.cc +++++ b/src/gcc/gimple-fold.cc ++@@ -7770,12 +7770,11 @@ get_base_constructor (tree base, poly_int64_pod *bit_offset, ++ } ++ } ++ ++-/* CTOR is CONSTRUCTOR of an array type. Fold a reference of SIZE bits ++- to the memory at bit OFFSET. When non-null, TYPE is the expected ++- type of the reference; otherwise the type of the referenced element ++- is used instead. When SIZE is zero, attempt to fold a reference to ++- the entire element which OFFSET refers to. Increment *SUBOFF by ++- the bit offset of the accessed element. */ +++/* CTOR is a CONSTRUCTOR of an array or vector type. Fold a reference of SIZE +++ bits to the memory at bit OFFSET. If non-null, TYPE is the expected type of +++ the reference; otherwise the type of the referenced element is used instead. +++ When SIZE is zero, attempt to fold a reference to the entire element OFFSET +++ refers to. Increment *SUBOFF by the bit offset of the accessed element. */ ++ ++ static tree ++ fold_array_ctor_reference (tree type, tree ctor, ++@@ -7940,13 +7939,11 @@ fold_array_ctor_reference (tree type, tree ctor, ++ return type ? build_zero_cst (type) : NULL_TREE; ++ } ++ ++-/* CTOR is CONSTRUCTOR of an aggregate or vector. Fold a reference ++- of SIZE bits to the memory at bit OFFSET. When non-null, TYPE ++- is the expected type of the reference; otherwise the type of ++- the referenced member is used instead. When SIZE is zero, ++- attempt to fold a reference to the entire member which OFFSET ++- refers to; in this case. Increment *SUBOFF by the bit offset ++- of the accessed member. */ +++/* CTOR is a CONSTRUCTOR of a record or union type. Fold a reference of SIZE +++ bits to the memory at bit OFFSET. If non-null, TYPE is the expected type of +++ the reference; otherwise the type of the referenced member is used instead. +++ When SIZE is zero, attempt to fold a reference to the entire member OFFSET +++ refers to. Increment *SUBOFF by the bit offset of the accessed member. */ ++ ++ static tree ++ fold_nonarray_ctor_reference (tree type, tree ctor, ++@@ -7958,8 +7955,7 @@ fold_nonarray_ctor_reference (tree type, tree ctor, ++ unsigned HOST_WIDE_INT cnt; ++ tree cfield, cval; ++ ++- FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), cnt, cfield, ++- cval) +++ FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), cnt, cfield, cval) ++ { ++ tree byte_offset = DECL_FIELD_OFFSET (cfield); ++ tree field_offset = DECL_FIELD_BIT_OFFSET (cfield); ++@@ -8031,6 +8027,19 @@ fold_nonarray_ctor_reference (tree type, tree ctor, ++ return NULL_TREE; ++ ++ offset_int inner_offset = offset_int (offset) - bitoffset; +++ +++ /* Integral bit-fields are left-justified on big-endian targets, so +++ we must arrange for native_encode_int to start at their MSB. */ +++ if (DECL_BIT_FIELD (cfield) && INTEGRAL_TYPE_P (TREE_TYPE (cfield))) +++ { +++ if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN) +++ return NULL_TREE; +++ const unsigned int encoding_size +++ = GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (TREE_TYPE (cfield))); +++ if (BYTES_BIG_ENDIAN) +++ inner_offset += encoding_size - wi::to_offset (field_size); +++ } +++ ++ return fold_ctor_reference (type, cval, ++ inner_offset.to_uhwi (), size, ++ from_decl, suboff); ++@@ -8043,7 +8052,7 @@ fold_nonarray_ctor_reference (tree type, tree ctor, ++ return build_zero_cst (type); ++ } ++ ++-/* CTOR is value initializing memory. Fold a reference of TYPE and +++/* CTOR is a value initializing memory. Fold a reference of TYPE and ++ bit size POLY_SIZE to the memory at bit POLY_OFFSET. When POLY_SIZE ++ is zero, attempt to fold a reference to the entire subobject ++ which OFFSET refers to. This is used when folding accesses to ++@@ -8084,7 +8093,8 @@ fold_ctor_reference (tree type, tree ctor, const poly_uint64 &poly_offset, ++ } ++ return ret; ++ } ++- /* For constants and byte-aligned/sized reads try to go through +++ +++ /* For constants and byte-aligned/sized reads, try to go through ++ native_encode/interpret. */ ++ if (CONSTANT_CLASS_P (ctor) ++ && BITS_PER_UNIT == 8 ++@@ -8100,7 +8110,12 @@ fold_ctor_reference (tree type, tree ctor, const poly_uint64 &poly_offset, ++ if (len > 0) ++ return native_interpret_expr (type, buf, len); ++ } ++- if (TREE_CODE (ctor) == CONSTRUCTOR) +++ +++ /* For constructors, try first a recursive local processing, but in any case +++ this requires the native storage order. */ +++ if (TREE_CODE (ctor) == CONSTRUCTOR +++ && !(AGGREGATE_TYPE_P (TREE_TYPE (ctor)) +++ && TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (ctor)))) ++ { ++ unsigned HOST_WIDE_INT dummy = 0; ++ if (!suboff) ++@@ -8115,9 +8130,9 @@ fold_ctor_reference (tree type, tree ctor, const poly_uint64 &poly_offset, ++ ret = fold_nonarray_ctor_reference (type, ctor, offset, size, ++ from_decl, suboff); ++ ++- /* Fall back to native_encode_initializer. Needs to be done ++- only in the outermost fold_ctor_reference call (because it itself ++- recurses into CONSTRUCTORs) and doesn't update suboff. */ +++ /* Otherwise fall back to native_encode_initializer. This may be done +++ only from the outermost fold_ctor_reference call (because it itself +++ recurses into CONSTRUCTORs and doesn't update suboff). */ ++ if (ret == NULL_TREE ++ && suboff == &dummy ++ && BITS_PER_UNIT == 8 ++--- a/src/gcc/gimple-range-cache.cc +++++ b/src/gcc/gimple-range-cache.cc ++@@ -448,7 +448,7 @@ block_range_cache::set_bb_range (tree name, const_basic_block bb, ++ { ++ unsigned v = SSA_NAME_VERSION (name); ++ if (v >= m_ssa_ranges.length ()) ++- m_ssa_ranges.safe_grow_cleared (num_ssa_names + 1); +++ m_ssa_ranges.safe_grow_cleared (num_ssa_names); ++ ++ if (!m_ssa_ranges[v]) ++ { ++@@ -515,7 +515,7 @@ void ++ block_range_cache::dump (FILE *f) ++ { ++ unsigned x; ++- for (x = 0; x < m_ssa_ranges.length (); ++x) +++ for (x = 1; x < m_ssa_ranges.length (); ++x) ++ { ++ if (m_ssa_ranges[x]) ++ { ++@@ -538,9 +538,12 @@ block_range_cache::dump (FILE *f, basic_block bb, bool print_varying) ++ bool summarize_varying = false; ++ for (x = 1; x < m_ssa_ranges.length (); ++x) ++ { +++ if (!m_ssa_ranges[x]) +++ continue; +++ ++ if (!gimple_range_ssa_p (ssa_name (x))) ++ continue; ++- if (m_ssa_ranges[x] && m_ssa_ranges[x]->get_bb_range (r, bb)) +++ if (m_ssa_ranges[x]->get_bb_range (r, bb)) ++ { ++ if (!print_varying && r.varying_p ()) ++ { ++@@ -557,11 +560,14 @@ block_range_cache::dump (FILE *f, basic_block bb, bool print_varying) ++ if (summarize_varying) ++ { ++ fprintf (f, "VARYING_P on entry : "); ++- for (x = 1; x < num_ssa_names; ++x) +++ for (x = 1; x < m_ssa_ranges.length (); ++x) ++ { +++ if (!m_ssa_ranges[x]) +++ continue; +++ ++ if (!gimple_range_ssa_p (ssa_name (x))) ++ continue; ++- if (m_ssa_ranges[x] && m_ssa_ranges[x]->get_bb_range (r, bb)) +++ if (m_ssa_ranges[x]->get_bb_range (r, bb)) ++ { ++ if (r.varying_p ()) ++ { ++--- a/src/gcc/gimple-range-gori.cc +++++ b/src/gcc/gimple-range-gori.cc ++@@ -880,6 +880,7 @@ gori_compute::logical_combine (irange &r, enum tree_code code, ++ res = false; ++ if (idx) ++ tracer.trailer (idx, "logical_combine", res, NULL_TREE, r); +++ return res; ++ } ++ ++ switch (code) ++--- a/src/gcc/gimple-ssa-store-merging.cc +++++ b/src/gcc/gimple-ssa-store-merging.cc ++@@ -4605,12 +4605,13 @@ imm_store_chain_info::output_merged_store (merged_store_group *group) ++ } ++ else if ((BYTES_BIG_ENDIAN ? start_gap : end_gap) > 0) ++ { ++- const unsigned HOST_WIDE_INT imask ++- = (HOST_WIDE_INT_1U << info->bitsize) - 1; +++ wide_int imask +++ = wi::mask (info->bitsize, false, +++ TYPE_PRECISION (TREE_TYPE (tem))); ++ tem = gimple_build (&seq, loc, ++ BIT_AND_EXPR, TREE_TYPE (tem), tem, ++- build_int_cst (TREE_TYPE (tem), ++- imask)); +++ wide_int_to_tree (TREE_TYPE (tem), +++ imask)); ++ } ++ const HOST_WIDE_INT shift ++ = (BYTES_BIG_ENDIAN ? end_gap : start_gap); ++--- a/src/gcc/gimplify.cc +++++ b/src/gcc/gimplify.cc ++@@ -6847,7 +6847,12 @@ gimplify_asm_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p) ++ stmt = gimple_build_asm_vec (TREE_STRING_POINTER (ASM_STRING (expr)), ++ inputs, outputs, clobbers, labels); ++ ++- gimple_asm_set_volatile (stmt, ASM_VOLATILE_P (expr) || noutputs == 0); +++ /* asm is volatile if it was marked by the user as volatile or +++ there are no outputs or this is an asm goto. */ +++ gimple_asm_set_volatile (stmt, +++ ASM_VOLATILE_P (expr) +++ || noutputs == 0 +++ || labels); ++ gimple_asm_set_input (stmt, ASM_INPUT_P (expr)); ++ gimple_asm_set_inline (stmt, ASM_INLINE_P (expr)); ++ ++--- a/src/gcc/go/ChangeLog +++++ b/src/gcc/go/ChangeLog ++@@ -1,3 +1,11 @@ +++2023-06-28 Paul E. Murphy +++ +++ Backported from master: +++ 2023-06-22 Paul E. Murphy +++ +++ * go-backend.cc [TARGET_AIX]: Rename and update usage to TARGET_AIX_OS. +++ * go-lang.cc: Likewise. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/gcc/go/go-backend.cc +++++ b/src/gcc/go/go-backend.cc ++@@ -45,8 +45,8 @@ along with GCC; see the file COPYING3. If not see ++ #define GO_EXPORT_SECTION_NAME ".go_export" ++ #endif ++ ++-#ifndef TARGET_AIX ++-#define TARGET_AIX 0 +++#ifndef TARGET_AIX_OS +++#define TARGET_AIX_OS 0 ++ #endif ++ ++ /* This file holds all the cases where the Go frontend needs ++@@ -107,7 +107,7 @@ go_write_export_data (const char *bytes, unsigned int size) ++ { ++ gcc_assert (targetm_common.have_named_sections); ++ sec = get_section (GO_EXPORT_SECTION_NAME, ++- TARGET_AIX ? SECTION_EXCLUDE : SECTION_DEBUG, +++ TARGET_AIX_OS ? SECTION_EXCLUDE : SECTION_DEBUG, ++ NULL); ++ } ++ ++--- a/src/gcc/go/go-lang.cc +++++ b/src/gcc/go/go-lang.cc ++@@ -39,8 +39,8 @@ along with GCC; see the file COPYING3. If not see ++ #include "go-c.h" ++ #include "go-gcc.h" ++ ++-#ifndef TARGET_AIX ++-#define TARGET_AIX 0 +++#ifndef TARGET_AIX_OS +++#define TARGET_AIX_OS 0 ++ #endif ++ ++ /* Language-dependent contents of a type. */ ++@@ -119,9 +119,9 @@ go_langhook_init (void) ++ args.compiling_runtime = go_compiling_runtime; ++ args.debug_escape_level = go_debug_escape_level; ++ args.debug_escape_hash = go_debug_escape_hash; ++- args.nil_check_size_threshold = TARGET_AIX ? -1 : 4096; +++ args.nil_check_size_threshold = TARGET_AIX_OS ? -1 : 4096; ++ args.debug_optimization = go_debug_optimization; ++- args.need_eqtype = TARGET_AIX ? true : false; +++ args.need_eqtype = TARGET_AIX_OS ? true : false; ++ args.linemap = go_get_linemap(); ++ args.backend = go_get_backend(); ++ go_create_gogo (&args); ++--- a/src/gcc/go/gofrontend/expressions.cc +++++ b/src/gcc/go/gofrontend/expressions.cc ++@@ -12325,7 +12325,8 @@ Call_expression::intrinsify(Gogo* gogo, ++ return Runtime::make_call(code, loc, 3, a1, a2, a3); ++ } ++ } ++- else if (package == "internal/abi") +++ else if (package == "internal/abi" +++ || package == "bootstrap/internal/abi") // for bootstrapping gc ++ { ++ if (is_method) ++ return NULL; ++--- a/src/gcc/go/gofrontend/gogo.cc +++++ b/src/gcc/go/gofrontend/gogo.cc ++@@ -3331,6 +3331,9 @@ class Create_function_descriptors : public Traverse ++ int ++ expression(Expression**); ++ +++ static bool +++ skip_descriptor(Gogo* gogo, const Named_object*); +++ ++ private: ++ Gogo* gogo_; ++ }; ++@@ -3341,6 +3344,9 @@ class Create_function_descriptors : public Traverse ++ int ++ Create_function_descriptors::function(Named_object* no) ++ { +++ if (Create_function_descriptors::skip_descriptor(this->gogo_, no)) +++ return TRAVERSE_CONTINUE; +++ ++ if (no->is_function() ++ && no->func_value()->enclosing() == NULL ++ && !no->func_value()->is_method() ++@@ -3428,6 +3434,28 @@ Create_function_descriptors::expression(Expression** pexpr) ++ return TRAVERSE_CONTINUE; ++ } ++ +++// The gc compiler has some special cases that it always compiles as +++// intrinsics. For those we don't want to generate a function +++// descriptor, as there will be no code for it to refer to. +++ +++bool +++Create_function_descriptors::skip_descriptor(Gogo* gogo, +++ const Named_object* no) +++{ +++ const std::string& pkgpath(no->package() == NULL +++ ? gogo->pkgpath() +++ : no->package()->pkgpath()); +++ +++ // internal/abi is the standard library package, +++ // bootstrap/internal/abi is the name used when bootstrapping the gc +++ // compiler. +++ +++ return ((pkgpath == "internal/abi" +++ || pkgpath == "bootstrap/internal/abi") +++ && (no->name() == "FuncPCABI0" +++ || no->name() == "FuncPCABIInternal")); +++} +++ ++ // Create function descriptors as needed. We need a function ++ // descriptor for all exported functions and for all functions that ++ // are referenced without being called. ++@@ -3449,7 +3477,8 @@ Gogo::create_function_descriptors() ++ if (no->is_function_declaration() ++ && !no->func_declaration_value()->type()->is_method() ++ && !Linemap::is_predeclared_location(no->location()) ++- && !Gogo::is_hidden_name(no->name())) +++ && !Gogo::is_hidden_name(no->name()) +++ && !Create_function_descriptors::skip_descriptor(this, no)) ++ fndecls.push_back(no); ++ } ++ for (std::vector::const_iterator p = fndecls.begin(); ++--- a/src/gcc/lra-eliminations.cc +++++ b/src/gcc/lra-eliminations.cc ++@@ -397,8 +397,8 @@ lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode, ++ rtx to = subst_p ? ep->to_rtx : ep->from_rtx; ++ ++ if (! update_p && ! full_p) ++- return gen_rtx_PLUS (Pmode, to, XEXP (x, 1)); ++- +++ return simplify_gen_binary (PLUS, Pmode, to, XEXP (x, 1)); +++ ++ if (maybe_ne (update_sp_offset, 0)) ++ offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0; ++ else ++--- a/src/gcc/match.pd +++++ b/src/gcc/match.pd ++@@ -1723,7 +1723,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) ++ /* (x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2) */ ++ (simplify ++ (bit_and (bit_ior @0 CONSTANT_CLASS_P@1) CONSTANT_CLASS_P@2) ++- (bit_ior (bit_and @0 @2) (bit_and @1 @2))) +++ (bit_ior (bit_and @0 @2) (bit_and! @1 @2))) ++ ++ /* Combine successive equal operations with constants. */ ++ (for bitop (bit_and bit_ior bit_xor) ++@@ -1732,7 +1732,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) ++ (if (!CONSTANT_CLASS_P (@0)) ++ /* This is the canonical form regardless of whether (bitop @1 @2) can be ++ folded to a constant. */ ++- (bitop @0 (bitop @1 @2)) +++ (bitop @0 (bitop! @1 @2)) ++ /* In this case we have three constants and (bitop @0 @1) doesn't fold ++ to a constant. This can happen if @0 or @1 is a POLY_INT_CST and if ++ the values involved are such that the operation can't be decided at ++@@ -2635,13 +2635,13 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) ++ forever if something doesn't simplify into a constant. */ ++ (if (!CONSTANT_CLASS_P (@0)) ++ (if (outer_op == PLUS_EXPR) ++- (plus (view_convert @0) (inner_op @2 (view_convert @1))) ++- (minus (view_convert @0) (neg_inner_op @2 (view_convert @1))))) +++ (plus (view_convert @0) (inner_op! @2 (view_convert @1))) +++ (minus (view_convert @0) (neg_inner_op! @2 (view_convert @1))))) ++ (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0)) ++ || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0))) ++ (if (outer_op == PLUS_EXPR) ++- (view_convert (plus @0 (inner_op (view_convert @2) @1))) ++- (view_convert (minus @0 (neg_inner_op (view_convert @2) @1)))) +++ (view_convert (plus @0 (inner_op! (view_convert @2) @1))) +++ (view_convert (minus @0 (neg_inner_op! (view_convert @2) @1)))) ++ /* If the constant operation overflows we cannot do the transform ++ directly as we would introduce undefined overflow, for example ++ with (a - 1) + INT_MIN. */ ++@@ -2672,10 +2672,10 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) ++ /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse ++ forever if something doesn't simplify into a constant. */ ++ (if (!CONSTANT_CLASS_P (@0)) ++- (minus (outer_op (view_convert @1) @2) (view_convert @0))) +++ (minus (outer_op! (view_convert @1) @2) (view_convert @0))) ++ (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0)) ++ || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0))) ++- (view_convert (minus (outer_op @1 (view_convert @2)) @0)) +++ (view_convert (minus (outer_op! @1 (view_convert @2)) @0)) ++ (if (types_match (type, @0)) ++ (with { tree cst = const_binop (outer_op, type, @1, @2); } ++ (if (cst && !TREE_OVERFLOW (cst)) ++@@ -2691,10 +2691,10 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) ++ /* If all 3 captures are CONSTANT_CLASS_P, punt, as we might recurse ++ forever if something doesn't simplify into a constant. */ ++ (if (!CONSTANT_CLASS_P (@0)) ++- (plus (view_convert @0) (minus @1 (view_convert @2)))) +++ (plus (view_convert @0) (minus! @1 (view_convert @2)))) ++ (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0)) ++ || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0))) ++- (view_convert (plus @0 (minus (view_convert @1) @2))) +++ (view_convert (plus @0 (minus! (view_convert @1) @2))) ++ (if (types_match (type, @0)) ++ (with { tree cst = const_binop (MINUS_EXPR, type, @1, @2); } ++ (if (cst && !TREE_OVERFLOW (cst)) ++@@ -3711,19 +3711,19 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) ++ int inside_ptr = POINTER_TYPE_P (inside_type); ++ int inside_float = FLOAT_TYPE_P (inside_type); ++ int inside_vec = VECTOR_TYPE_P (inside_type); ++- unsigned int inside_prec = TYPE_PRECISION (inside_type); +++ unsigned int inside_prec = element_precision (inside_type); ++ int inside_unsignedp = TYPE_UNSIGNED (inside_type); ++ int inter_int = INTEGRAL_TYPE_P (inter_type); ++ int inter_ptr = POINTER_TYPE_P (inter_type); ++ int inter_float = FLOAT_TYPE_P (inter_type); ++ int inter_vec = VECTOR_TYPE_P (inter_type); ++- unsigned int inter_prec = TYPE_PRECISION (inter_type); +++ unsigned int inter_prec = element_precision (inter_type); ++ int inter_unsignedp = TYPE_UNSIGNED (inter_type); ++ int final_int = INTEGRAL_TYPE_P (type); ++ int final_ptr = POINTER_TYPE_P (type); ++ int final_float = FLOAT_TYPE_P (type); ++ int final_vec = VECTOR_TYPE_P (type); ++- unsigned int final_prec = TYPE_PRECISION (type); +++ unsigned int final_prec = element_precision (type); ++ int final_unsignedp = TYPE_UNSIGNED (type); ++ } ++ (switch ++@@ -4186,6 +4186,10 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) ++ /* (v ? w : 0) ? a : b is just (v & w) ? a : b ++ Currently disabled after pass lvec because ARM understands ++ VEC_COND_EXPR but not a plain v==w fed to BIT_IOR_EXPR. */ +++#if GIMPLE +++/* These can only be done in gimple as fold likes to convert: +++ (CMP) & N into (CMP) ? N : 0 +++ and we try to match the same pattern again and again. */ ++ (simplify ++ (vec_cond (vec_cond:s @0 @3 integer_zerop) @1 @2) ++ (if (optimize_vectors_before_lowering_p () && types_match (@0, @3)) ++@@ -4220,6 +4224,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) ++ (vec_cond @0 @3 (vec_cond:s @1 @2 @3)) ++ (if (optimize_vectors_before_lowering_p () && types_match (@0, @1)) ++ (vec_cond (bit_and (bit_not @0) @1) @2 @3))) +++#endif ++ ++ /* Canonicalize mask ? { 0, ... } : { -1, ...} to ~mask if the mask ++ types are compatible. */ ++--- a/src/gcc/omp-expand.cc +++++ b/src/gcc/omp-expand.cc ++@@ -2564,7 +2564,8 @@ expand_omp_for_init_vars (struct omp_for_data *fd, gimple_stmt_iterator *gsi, ++ tree factor = fd->factor; ++ gcond *cond_stmt ++ = expand_omp_build_cond (gsi, NE_EXPR, factor, ++- build_zero_cst (TREE_TYPE (factor))); +++ build_zero_cst (TREE_TYPE (factor)), +++ true); ++ edge e = split_block (gsi_bb (*gsi), cond_stmt); ++ basic_block bb0 = e->src; ++ e->flags = EDGE_TRUE_VALUE; ++--- a/src/gcc/rtlanal.cc +++++ b/src/gcc/rtlanal.cc ++@@ -6990,3 +6990,18 @@ vec_series_lowpart_p (machine_mode result_mode, machine_mode op_mode, rtx sel) ++ } ++ return false; ++ } +++ +++/* Return true if X contains a paradoxical subreg. */ +++ +++bool +++contains_paradoxical_subreg_p (rtx x) +++{ +++ subrtx_var_iterator::array_type array; +++ FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST) +++ { +++ x = *iter; +++ if (SUBREG_P (x) && paradoxical_subreg_p (x)) +++ return true; +++ } +++ return false; +++} ++--- a/src/gcc/rtlanal.h +++++ b/src/gcc/rtlanal.h ++@@ -338,4 +338,6 @@ vec_series_highpart_p (machine_mode result_mode, machine_mode op_mode, ++ bool ++ vec_series_lowpart_p (machine_mode result_mode, machine_mode op_mode, rtx sel); ++ +++bool +++contains_paradoxical_subreg_p (rtx x); ++ #endif ++--- a/src/gcc/testsuite/ChangeLog +++++ b/src/gcc/testsuite/ChangeLog ++@@ -1,3 +1,5076 @@ +++2024-01-15 Patrick Palka +++ +++ Backported from master: +++ 2024-01-15 Patrick Palka +++ +++ PR c++/109899 +++ * g++.dg/cpp0x/initlist-array21.C: New test. +++ +++2024-01-08 Georg-Johann Lay +++ +++ Backported from master: +++ 2024-01-08 Georg-Johann Lay +++ +++ PR target/112952 +++ * gcc.target/avr/attribute-io.h: New file. +++ * gcc.target/avr/pr112952-0.c: New test. +++ * gcc.target/avr/pr112952-1.c: New test. +++ * gcc.target/avr/pr112952-2.c: New test. +++ * gcc.target/avr/pr112952-3.c: New test. +++ +++2023-12-24 Patrick Palka +++ +++ Backported from master: +++ 2023-09-22 Patrick Palka +++ +++ PR c++/111485 +++ * g++.dg/cpp2a/concepts-ttp5.C: New test. +++ * g++.dg/cpp2a/concepts-ttp6.C: New test. +++ +++2023-12-20 Patrick Palka +++ +++ Backported from master: +++ 2023-04-25 Patrick Palka +++ +++ PR c++/108975 +++ * g++.dg/cpp0x/lambda/lambda-const11a.C: New test. +++ +++2023-12-19 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-19 Jakub Jelinek +++ +++ PR target/112816 +++ * gcc.target/i386/sse2-pr112816-2.c: New test. +++ +++2023-12-18 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-18 Jakub Jelinek +++ +++ PR tree-optimization/113013 +++ * gcc.dg/pr113013.c: New test. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-08 Jakub Jelinek +++ +++ PR sanitizer/112727 +++ * c-c++-common/ubsan/pr112727.c: New test. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-11-29 Jakub Jelinek +++ +++ PR middle-end/112733 +++ * gcc.dg/pr112733.c: New test. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-05 Jakub Jelinek +++ +++ PR target/112845 +++ * gcc.dg/pr112845.c: New file. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-04 Jakub Jelinek +++ +++ PR target/112837 +++ * gcc.dg/pr112837.c: New test. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-04 Jakub Jelinek +++ +++ PR target/112816 +++ * gcc.target/i386/sse2-pr112816.c: New test. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-12-04 Jakub Jelinek +++ +++ PR c++/112795 +++ * g++.dg/ext/unroll-5.C: New test. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-11-25 Jakub Jelinek +++ +++ PR target/111408 +++ * gcc.c-torture/execute/pr111408.c: New test. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-11-13 Jakub Jelinek +++ +++ PR tree-optimization/111967 +++ * gcc.dg/tree-ssa/pr111967.c: New test. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-11-09 Jakub Jelinek +++ +++ PR c/112339 +++ * c-c++-common/ubsan/Wno-attributes-1.c: New test. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-07-19 Jakub Jelinek +++ +++ PR tree-optimization/110731 +++ * gcc.dg/pr110731.c: New test. +++ +++2023-12-15 Richard Biener +++ +++ Backported from master: +++ 2023-08-24 Richard Biener +++ +++ PR debug/111080 +++ * gcc.dg/debug/dwarf2/pr111080.c: New testcase. +++ +++2023-12-15 Richard Biener +++ +++ Backported from master: +++ 2023-08-25 Richard Biener +++ +++ PR tree-optimization/111137 +++ * gcc.dg/torture/pr111137.c: New testcase. +++ +++2023-12-15 Richard Biener +++ +++ Backported from master: +++ 2023-08-31 Richard Biener +++ +++ PR middle-end/111253 +++ * gcc.dg/Wfree-nonheap-object-7.c: New testcase. +++ +++2023-12-12 liuhongt +++ +++ Backported from master: +++ 2023-12-12 liuhongt +++ +++ * gcc.target/i386/pr112891.c: New test. +++ * gcc.target/i386/pr112891-2.c: New test. +++ +++2023-12-01 Harald Anlauf +++ +++ Backported from master: +++ 2023-11-26 Harald Anlauf +++ +++ PR fortran/111880 +++ * gfortran.dg/pr111880.f90: New test. +++ +++2023-11-27 Patrick Palka +++ +++ Backported from master: +++ 2023-11-16 Patrick Palka +++ +++ PR c++/111703 +++ PR c++/107939 +++ * g++.dg/cpp2a/concepts-fn8.C: Extend test. +++ * g++.dg/diagnostic/constexpr4.C: New test. +++ +++2023-11-27 Patrick Palka +++ +++ Backported from master: +++ 2023-11-15 Patrick Palka +++ +++ PR c++/111703 +++ PR c++/112269 +++ * g++.dg/cpp2a/concepts-fn8.C: New test. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-10-23 Richard Biener +++ +++ PR tree-optimization/111917 +++ * gcc.dg/torture/pr111917.c: New testcase. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-10-17 Richard Biener +++ +++ PR middle-end/111818 +++ * gcc.dg/torture/pr111818.c: New testcase. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-09-28 Richard Biener +++ +++ PR tree-optimization/111614 +++ * gcc.dg/torture/pr111614.c: New testcase. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-10-12 Richard Biener +++ +++ PR tree-optimization/111764 +++ * gcc.dg/vect/pr111764.c: New testcase. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-10-20 Richard Biener +++ +++ PR tree-optimization/111445 +++ * gcc.dg/torture/pr111445.c: New testcase. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-08-18 Richard Biener +++ +++ PR tree-optimization/111019 +++ * g++.dg/torture/pr111019.C: New testcase. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-08-03 Richard Biener +++ +++ PR tree-optimization/110702 +++ * gcc.dg/torture/pr110702.c: New testcase. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-07-06 Richard Biener +++ +++ PR tree-optimization/110556 +++ * gcc.dg/torture/pr110556.c: New testcase. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-07-06 Richard Biener +++ +++ PR tree-optimization/110515 +++ * g++.dg/opt/pr110515.C: New testcase. +++ +++2023-11-27 Richard Biener +++ +++ Backported from master: +++ 2023-06-20 Richard Biener +++ +++ PR debug/110295 +++ * g++.dg/debug/pr110295.C: New testcase. +++ +++2023-11-24 Uros Bizjak +++ +++ Backported from master: +++ 2023-11-23 Uros Bizjak +++ +++ PR target/112672 +++ * gcc.target/i386/pr112672.c: New test. +++ +++2023-11-22 Maciej W. Rozycki +++ +++ Backported from master: +++ 2023-11-22 Maciej W. Rozycki +++ +++ PR target/111815 +++ * gcc.dg/torture/pr111815.c: New test. +++ +++2023-11-17 Jason Merrill +++ +++ PR c++/112301 +++ PR c++/102191 +++ PR c++/33799 +++ * g++.dg/eh/return1.C: Add more cases. +++ +++2023-11-17 Jason Merrill +++ +++ PR c++/33799 +++ * g++.dg/eh/return1.C: Add label cases. +++ +++2023-11-16 Eric Botcazou +++ +++ * gnat.dg/varsize4.adb (Func): Initialize Byte_Read parameter. +++ +++2023-11-16 Eric Botcazou +++ +++ * gnat.dg/varsize4.ads, gnat.dg/varsize4.adb: New test. +++ * gnat.dg/varsize4_pkg.ads: New helper. +++ +++2023-11-16 Xi Ruoyao +++ +++ Backported from master: +++ 2023-11-15 Xi Ruoyao +++ +++ * gcc.target/loongarch/cas-acquire.c: New test. +++ +++2023-11-15 Kewen Lin +++ +++ Backported from master: +++ 2023-11-06 Kewen Lin +++ +++ PR target/111828 +++ * lib/target-supports.exp +++ (check_effective_target_powerpc_as_p10_htm): New proc. +++ * g++.target/powerpc/pr111828-1.C: New test. +++ * g++.target/powerpc/pr111828-2.C: New test. +++ +++2023-11-10 liuhongt +++ +++ Backported from master: +++ 2023-11-10 liuhongt +++ +++ * g++.target/i386/pr112443.C: New test. +++ +++2023-10-29 Iain Buclaw +++ +++ Backported from master: +++ 2023-10-29 Iain Buclaw +++ +++ PR d/110712 +++ * gdc.dg/pr110712.d: New test. +++ +++2023-10-28 Iain Buclaw +++ +++ Backported from master: +++ 2023-10-28 Iain Buclaw +++ +++ PR d/112270 +++ * gdc.dg/pr112270.d: New test. +++ +++2023-10-26 chenxiaolong +++ +++ Backported from master: +++ 2023-10-25 chenxiaolong +++ +++ * gcc.target/loongarch/builtin_thread_pointer.c: New test. +++ +++2023-10-26 liuhongt +++ +++ Backported from master: +++ 2023-07-06 liuhongt +++ +++ * gcc.target/i386/pr110170-3.c: New test. +++ +++2023-10-23 Kewen Lin +++ +++ Backported from master: +++ 2023-10-12 Kewen Lin +++ +++ PR target/111367 +++ * g++.target/powerpc/pr111367.C: New test. +++ +++2023-10-21 Harald Anlauf +++ +++ Backported from master: +++ 2023-10-17 Harald Anlauf +++ +++ PR fortran/111837 +++ * gfortran.dg/implied_do_io_8.f90: New test. +++ +++2023-10-16 Kewen Lin +++ +++ Backported from master: +++ 2023-09-25 Kewen Lin +++ +++ PR target/111380 +++ * gcc.target/powerpc/pr111380-1.c: New test. +++ * gcc.target/powerpc/pr111380-2.c: New test. +++ +++2023-10-16 Kewen Lin +++ +++ Backported from master: +++ 2023-09-25 Kewen Lin +++ +++ PR target/111366 +++ * g++.target/powerpc/pr111366.C: New test. +++ +++2023-10-07 Andrew Pinski +++ +++ Backported from master: +++ 2023-10-06 Andrew Pinski +++ +++ PR middle-end/111699 +++ * gcc.c-torture/compile/pr111699-1.c: New test. +++ +++2023-10-02 Pat Haugen +++ +++ Backported from master: +++ 2023-09-19 Pat Haugen +++ +++ * gcc.target/powerpc/clone1.c: Add xfails. +++ * gcc.target/powerpc/clone3.c: Likewise. +++ * gcc.target/powerpc/mod-1.c: Update scan strings and add xfails. +++ * gcc.target/powerpc/mod-2.c: Likewise. +++ * gcc.target/powerpc/p10-vdivq-vmodq.c: Add xfails. +++ +++2023-09-29 Wilco Dijkstra +++ +++ Backported from master: +++ 2023-09-28 Wilco Dijkstra +++ +++ PR target/111121 +++ * gcc.target/aarch64/mops_4.c: Add memmove testcases. +++ +++2023-09-26 Eric Botcazou +++ +++ * gnat.dg/opt102.adb:New test. +++ * gnat.dg/opt102_pkg.adb, gnat.dg/opt102_pkg.ads: New helper. +++ +++2023-09-20 Richard Sandiford +++ +++ Backported from master: +++ 2023-09-15 Richard Sandiford +++ +++ PR target/111411 +++ * gcc.dg/rtl/aarch64/pr111411.c: New test. +++ +++2023-09-12 Uros Bizjak +++ +++ PR target/111340 +++ * gcc.target/i386/pr111340.c: New test. +++ +++2023-09-12 Richard Sandiford +++ +++ * gcc.target/aarch64/stack-protector-8.c: New test. +++ * gcc.target/aarch64/stack-protector-9.c: Likewise. +++ +++2023-09-12 Richard Sandiford +++ +++ * gcc.target/aarch64/sve/pcs/stack_clash_3.c: Avoid redundant probes. +++ +++2023-09-12 Richard Sandiford +++ +++ * gcc.target/aarch64/stack-check-prologue-17.c: Expect the probe +++ to be at offset 1024 rather than offset 0. +++ * gcc.target/aarch64/stack-check-prologue-18.c: Likewise. +++ * gcc.target/aarch64/stack-check-prologue-19.c: Likewise. +++ +++2023-09-12 Richard Sandiford +++ +++ * gcc.target/aarch64/stack-check-prologue-18.c: New test. +++ * gcc.target/aarch64/stack-check-prologue-19.c: Likewise. +++ * gcc.target/aarch64/stack-check-prologue-20.c: Likewise. +++ +++2023-09-12 Richard Sandiford +++ +++ * gcc.target/aarch64/stack-check-prologue-17.c: New test. +++ +++2023-09-12 Haochen Gui +++ +++ Backported from master: +++ 2023-08-31 Haochen Gui +++ +++ PR target/96762 +++ * gcc.target/powerpc/pr96762.c: New. +++ +++2023-09-11 liuhongt +++ +++ Backported from master: +++ 2023-09-11 liuhongt +++ +++ * gcc.target/i386/pr111306.c: New test. +++ +++2023-08-30 Jakub Jelinek +++ +++ Backported from master: +++ 2023-08-30 Jakub Jelinek +++ +++ PR tree-optimization/110914 +++ * gcc.c-torture/execute/pr110914.c: New test. +++ +++2023-08-30 Jakub Jelinek +++ +++ Backported from master: +++ 2023-08-30 Jakub Jelinek +++ +++ PR tree-optimization/111015 +++ * gcc.dg/pr111015.c: New test. +++ +++2023-08-16 liuhongt +++ +++ Backported from master: +++ 2023-08-16 liuhongt +++ +++ * gcc.target/i386/avx2-gather-2.c: Adjust options to keep +++ gather vectorization. +++ * gcc.target/i386/avx2-gather-6.c: Ditto. +++ * gcc.target/i386/avx512f-pr88464-1.c: Ditto. +++ * gcc.target/i386/avx512f-pr88464-5.c: Ditto. +++ * gcc.target/i386/avx512vl-pr88464-1.c: Ditto. +++ * gcc.target/i386/avx512vl-pr88464-11.c: Ditto. +++ * gcc.target/i386/avx512vl-pr88464-3.c: Ditto. +++ * gcc.target/i386/avx512vl-pr88464-9.c: Ditto. +++ * gcc.target/i386/pr88531-1b.c: Ditto. +++ * gcc.target/i386/pr88531-1c.c: Ditto. +++ +++2023-08-15 Iain Buclaw +++ +++ PR d/110959 +++ * gdc.dg/pr110959.d: New test. +++ * gdc.test/runnable/test23010.d: New test. +++ +++2023-08-11 Jason Merrill +++ +++ PR c++/106310 +++ * g++.dg/template/template-keyword4.C: New test. +++ +++2023-08-11 Jason Merrill +++ +++ PR c++/106890 +++ PR c++/109666 +++ * g++.dg/cpp0x/nsdmi-array2.C: New test. +++ * g++.dg/cpp0x/nsdmi-template25.C: New test. +++ +++2023-08-11 Jason Merrill +++ +++ PR c++/108099 +++ * g++.dg/ext/int128-7.C: New test. +++ * g++.dg/ext/int128-8.C: New test. +++ * g++.dg/ext/unsigned-typedef2.C: New test. +++ * g++.dg/ext/unsigned-typedef3.C: New test. +++ +++2023-08-07 Patrick Palka +++ +++ Backported from master: +++ 2023-05-09 Patrick Palka +++ +++ PR c++/109761 +++ * g++.dg/cpp0x/noexcept78.C: New test. +++ +++2023-08-06 Jakub Jelinek +++ +++ Backported from master: +++ 2022-12-19 Jakub Jelinek +++ +++ PR fortran/107397 +++ * gfortran.dg/pr107397.f90: Adjust expected diagnostic wording and +++ add space between dg-error string and closing }. +++ +++2023-08-06 Steve Kargl +++ +++ Backported from master: +++ 2022-12-18 Steve Kargl +++ +++ PR fortran/107397 +++ * gfortran.dg/pr107397.f90: New test. +++ +++2023-08-01 Kewen Lin +++ +++ Backported from master: +++ 2023-07-26 Kewen Lin +++ +++ PR target/110741 +++ * g++.target/powerpc/pr110741.C: New test. +++ +++2023-07-20 Harald Anlauf +++ +++ Backported from master: +++ 2023-07-17 Harald Anlauf +++ +++ PR fortran/95947 +++ PR fortran/110658 +++ * gfortran.dg/deferred_character_37.f90: New test. +++ +++2023-07-19 Maciej W. Rozycki +++ +++ Backported from master: +++ 2023-07-11 Maciej W. Rozycki +++ +++ * gcc.dg/vect/pr97428.c: Limit to `vect_double' targets. +++ +++2023-07-14 Uros Bizjak +++ +++ Backported from master: +++ 2023-07-14 Uros Bizjak +++ +++ PR target/110206 +++ * gcc.target/i386/pr110206.c: New test. +++ +++2023-07-14 Harald Anlauf +++ +++ Backported from master: +++ 2023-07-11 Harald Anlauf +++ +++ PR fortran/110288 +++ * gfortran.dg/findloc_10.f90: New test. +++ +++2023-07-13 Uros Bizjak +++ +++ Backported from master: +++ 2023-07-13 Uros Bizjak +++ +++ PR target/106966 +++ * gcc.target/alpha/pr106966.c: New test. +++ +++2023-07-12 Patrick Palka +++ +++ Backported from master: +++ 2023-06-29 Patrick Palka +++ +++ PR c++/110468 +++ * g++.dg/cpp0x/noexcept79.C: New test. +++ +++2023-07-08 Harald Anlauf +++ +++ Backported from master: +++ 2023-07-08 Harald Anlauf +++ +++ PR fortran/110585 +++ * gfortran.dg/findloc_9.f90: New test. +++ +++2023-07-07 Iain Buclaw +++ +++ Backported from master: +++ 2023-07-07 Iain Buclaw +++ +++ PR d/108842 +++ * gdc.dg/pr98277.d: Add more tests. +++ * gdc.dg/pr108842.d: New test. +++ +++2023-07-05 Michael Meissner +++ +++ Backported from master: +++ 2023-06-23 Michael Meissner +++ Aaron Sawdey +++ +++ PR target/105325 +++ * g++.target/powerpc/pr105325.C: New test. +++ * gcc.target/powerpc/fusion-p10-ldcmpi.c: Update insn counts. +++ +++2023-07-02 Iain Buclaw +++ +++ Backported from master: +++ 2023-07-02 Iain Buclaw +++ +++ PR d/110516 +++ * gdc.dg/torture/pr110516a.d: New test. +++ * gdc.dg/torture/pr110516b.d: New test. +++ +++2023-07-01 Iain Buclaw +++ +++ Backported from master: +++ 2023-07-01 Iain Buclaw +++ +++ PR d/110514 +++ * gdc.dg/pr110514a.d: New test. +++ * gdc.dg/pr110514b.d: New test. +++ * gdc.dg/pr110514c.d: New test. +++ * gdc.dg/pr110514d.d: New test. +++ +++2023-06-30 Eric Botcazou +++ +++ * gcc.c-torture/execute/20230630-1.c: New test. +++ * gcc.c-torture/execute/20230630-2.c: Likewise. +++ * gcc.c-torture/execute/20230630-3.c: Likewise +++ * gcc.c-torture/execute/20230630-4.c: Likewise +++ +++2023-06-29 liuhongt +++ +++ * gcc.target/i386/pr110309.c: New test. +++ +++2023-06-29 Hongyu Wang +++ +++ Backported from master: +++ 2023-06-26 Hongyu Wang +++ +++ * gcc.target/i386/mvc17.c: New test. +++ +++2023-06-28 liuhongt +++ +++ * gcc.target/i386/avx-vzeroupper-29.c: New testcase. +++ * gcc.target/i386/avx-vzeroupper-12.c: Adjust testcase. +++ * gcc.target/i386/avx-vzeroupper-7.c: Ditto. +++ * gcc.target/i386/avx-vzeroupper-9.c: Ditto. +++ +++2023-06-27 Andrew Pinski +++ +++ Backported from master: +++ 2023-06-27 Andrew Pinski +++ +++ PR middle-end/110420 +++ PR middle-end/103979 +++ PR middle-end/98619 +++ * gcc.c-torture/compile/asmgoto-6.c: New test. +++ +++2023-06-26 Iain Buclaw +++ +++ Backported from master: +++ 2023-06-26 Iain Buclaw +++ +++ PR d/110359 +++ * gdc.dg/pr110359.d: New test. +++ +++2023-06-26 Iain Buclaw +++ +++ Backported from master: +++ 2023-06-26 Iain Buclaw +++ +++ PR d/110113 +++ * gdc.test/compilable/test23978.d: New test. +++ +++2023-06-23 Richard Biener +++ +++ Backported from master: +++ 2023-06-19 Richard Biener +++ +++ PR tree-optimization/110298 +++ * gcc.dg/torture/pr110298.c: New testcase. +++ +++2023-06-22 Alex Coplan +++ +++ Backported from master: +++ 2023-06-07 Alex Coplan +++ +++ PR target/110132 +++ * lib/target-supports.exp (check_effective_target_aarch64_asm_FUNC_ok): +++ Extend to ls64. +++ * g++.target/aarch64/acle/acle.exp: New. +++ * g++.target/aarch64/acle/ls64.C: New test. +++ * g++.target/aarch64/acle/ls64_lto.C: New test. +++ * gcc.target/aarch64/acle/ls64_lto.c: New test. +++ * gcc.target/aarch64/acle/pr110132.c: New test. +++ +++2023-06-22 Alex Coplan +++ +++ Backported from master: +++ 2023-06-07 Alex Coplan +++ +++ PR target/110100 +++ * gcc.target/aarch64/acle/pr110100.c: New test. +++ +++2023-06-20 Kewen Lin +++ +++ Backported from master: +++ 2023-06-13 Kewen Lin +++ +++ PR testsuite/110230 +++ PR target/109932 +++ * gcc.target/powerpc/pr109932-1.c: Adjust with int128 effective target. +++ * gcc.target/powerpc/pr109932-2.c: Ditto. +++ +++2023-06-20 Kewen Lin +++ +++ Backported from master: +++ 2023-06-12 Kewen Lin +++ +++ PR target/109932 +++ * gcc.target/powerpc/pr109932-1.c: New test. +++ * gcc.target/powerpc/pr109932-2.c: New test. +++ +++2023-06-20 Kewen Lin +++ +++ Backported from master: +++ 2023-06-12 Kewen Lin +++ +++ PR target/110011 +++ * gcc.target/powerpc/pr110011.c: New test. +++ +++2023-06-15 Xi Ruoyao +++ +++ Backported from master: +++ 2023-03-07 Xi Ruoyao +++ +++ * gcc.target/aarch64/shrink_wrap_1.c (dg-options): Add +++ -fno-stack-protector. +++ * gcc.target/aarch64/stack-check-cfa-1.c (dg-options): Add +++ -fno-stack-protector. +++ * gcc.target/aarch64/stack-check-cfa-2.c (dg-options): Add +++ -fno-stack-protector. +++ * gcc.target/aarch64/test_frame_17.c (dg-options): Add +++ -fno-stack-protector. +++ +++2023-06-15 Xi Ruoyao +++ +++ Backported from master: +++ 2023-03-07 Xi Ruoyao +++ +++ * gcc.target/aarch64/pr104005.c (dg-options): Add +++ -fno-stack-protector. +++ +++2023-06-15 Xi Ruoyao +++ +++ Backported from master: +++ 2023-03-07 Xi Ruoyao +++ +++ * gcc.target/aarch64/auto-init-7.c (dg-options): Add +++ -fno-stack-protector. +++ +++2023-06-15 Xi Ruoyao +++ +++ Backported from master: +++ 2023-03-07 Xi Ruoyao +++ +++ * gcc.target/aarch64/pr103147-10.c (dg-options): Add +++ -fno-stack-protector. +++ * g++.target/aarch64/pr103147-10.C: Likewise. +++ +++2023-06-15 Xi Ruoyao +++ +++ Backported from master: +++ 2023-03-07 Xi Ruoyao +++ +++ * gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp (sve_flags): +++ Add -fno-stack-protector. +++ +++2023-06-15 Xi Ruoyao +++ +++ Backported from master: +++ 2023-03-07 Xi Ruoyao +++ +++ PR testsuite/70150 +++ * gcc.target/aarch64/fuse_adrp_add_1.c (dg-options): Add +++ -fno-pie. +++ +++2023-06-15 Xi Ruoyao +++ +++ Backported from master: +++ 2023-03-07 Xi Ruoyao +++ +++ PR testsuite/70150 +++ * gcc.dg/tls/pr78796.c (dg-additional-options): Add -fno-pie +++ -no-pie for aarch64-*-*. +++ * gcc.target/aarch64/pr63304_1.c (dg-options): Add -fno-pie. +++ * gcc.target/aarch64/pr70120-2.c (dg-options): Add -fno-pie. +++ * gcc.target/aarch64/pr78733.c (dg-options): Add -fno-pie. +++ * gcc.target/aarch64/pr79041-2.c (dg-options): Add -fno-pie. +++ * gcc.target/aarch64/pr94530.c (dg-options): Add -fno-pie. +++ * gcc.target/aarch64/pr94577.c (dg-options): Add -fno-pie. +++ * gcc.target/aarch64/reload-valid-spoff.c (dg-options): Add +++ -fno-pie. +++ +++2023-06-15 Xi Ruoyao +++ +++ Backported from master: +++ 2023-03-07 Xi Ruoyao +++ +++ PR testsuite/70150 +++ * gcc.target/aarch64/aapcs64/aapcs64.exp (additional_flags): +++ Add -fno-pie -no-pie. +++ +++2023-06-10 Georg-Johann Lay +++ +++ PR target/109650 +++ Backport from 2023-05-10 master r14-1688. +++ * gcc.target/avr/torture/pr109650-1.c: New test. +++ * gcc.target/avr/torture/pr109650-2.c: New test. +++ +++2023-06-09 Iain Sandoe +++ +++ Backported from master: +++ 2023-06-02 Iain Sandoe +++ +++ PR target/110044 +++ * gcc.target/powerpc/darwin-abi-13-0.c: New test. +++ * gcc.target/powerpc/darwin-abi-13-1.c: New test. +++ * gcc.target/powerpc/darwin-abi-13-2.c: New test. +++ * gcc.target/powerpc/darwin-structs-0.h: New test. +++ +++2023-06-09 liuhongt +++ +++ * gcc.target/i386/pr110108-2.c: New test. +++ +++2023-06-08 Alex Coplan +++ +++ Backported from master: +++ 2023-05-25 Alex Coplan +++ +++ PR target/109800 +++ * gcc.target/arm/pure-code/pr109800.c: New test. +++ +++2023-06-08 Kyrylo Tkachov +++ +++ Backported from master: +++ 2023-05-24 Kyrylo Tkachov +++ +++ PR target/109939 +++ * gcc.target/arm/pr109939.c: New test. +++ +++2023-06-04 Steve Kargl +++ +++ Backported from master: +++ 2023-06-02 Steve Kargl +++ +++ PR fortran/100607 +++ * gfortran.dg/select_rank_6.f90: New test. +++ +++2023-05-30 Christophe Lyon +++ +++ Backported from master: +++ 2023-05-30 Christophe Lyon +++ +++ * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: +++ Support both definitions of int32_t. +++ +++2023-05-25 Georg-Johann Lay +++ +++ PR target/82931 +++ * gcc.target/avr/pr82931.c: New test. +++ +++2023-05-22 Michael Meissner +++ +++ PR target/70243 +++ * gcc.target/powerpc/pr70243.c: New test. Back port from master +++ 04/10/2023 change. +++ +++2023-05-22 Jakub Jelinek +++ +++ Backported from master: +++ 2023-05-21 Jakub Jelinek +++ +++ PR tree-optimization/109505 +++ * gcc.target/aarch64/sve/pr109505.c: New test. +++ +++2023-05-20 Harald Anlauf +++ +++ Backported from master: +++ 2023-05-15 Harald Anlauf +++ +++ PR fortran/109846 +++ * gfortran.dg/ptr-func-5.f90: New test. +++ +++2023-05-20 Triffid Hunter +++ +++ PR target/105753 +++ Backport from 2023-05-20 https://gcc.gnu.org/r14-1016 +++ * gcc.target/avr/torture/pr105753.c: New test. +++ +++2023-05-19 Patrick Palka +++ +++ Backported from master: +++ 2023-05-15 Patrick Palka +++ +++ * g++.dg/cpp23/feat-cxx2b.C: Test __cpp_auto_cast. +++ +++2023-05-18 Alexandre Oliva +++ +++ * gcc.target/arm/acle/cde-mve-full-assembly.c: Drop blank +++ after tab after vmsr, and lower the case of P0. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ * gcc.target/arm/mve/intrinsics/srshr.c: Update shift value. +++ * gcc.target/arm/mve/intrinsics/srshrl.c: Update shift value. +++ * gcc.target/arm/mve/intrinsics/uqshl.c: Update shift value. +++ * gcc.target/arm/mve/intrinsics/uqshll.c: Update shift value. +++ * gcc.target/arm/mve/intrinsics/urshr.c: Update shift value. +++ * gcc.target/arm/mve/intrinsics/urshrl.c: Update shift value. +++ * gcc.target/arm/mve/intrinsics/vadciq_m_s32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vadciq_m_u32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vadciq_s32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vadciq_u32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vadcq_m_s32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vadcq_m_u32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vadcq_s32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vadcq_u32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vsbciq_s32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vsbciq_u32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vsbcq_s32.c: Update to ubfx. +++ * gcc.target/arm/mve/intrinsics/vsbcq_u32.c: Update to ubfx. +++ * gcc.target/arm/mve/mve_const_shifts.c: New test. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ PR target/109697 +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: XFAIL check. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: XFAIL check. +++ * gcc.target/arm/mve/pr108177-1.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-10.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-11.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-12.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-13.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-13-run.c: use mve_fp +++ * gcc.target/arm/mve/pr108177-14.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-14-run.c: use mve_fp +++ * gcc.target/arm/mve/pr108177-2.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-3.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-4.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-5.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-6.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-7.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-8.c: Relax registers. +++ * gcc.target/arm/mve/pr108177-9.c: Relax registers. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ * gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vaddq_m.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vaddq_n.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c: Removed. +++ * gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c: Removed. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c: Removed. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: Add testcases. +++ * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: Add testcases. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2023-05-18 Stam Markianos-Wright +++ +++ * gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c: New. +++ +++2023-05-18 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/asrl.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/lsll.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/sqrshr.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/sqshl.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/sqshll.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/srshr.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/srshrl.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/uqrshl.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/uqrshll_sat48.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/uqshl.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/uqshll.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/urshr.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/urshrl.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vadciq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vadciq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vadciq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vadciq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vadcq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vadcq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vadcq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vadcq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vandq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbicq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vctp16q.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vctp16q_m.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vctp32q.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vctp32q_m.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vctp64q.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vctp64q_m.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vctp8q.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vctp8q_m.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/veorq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmaq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmaq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmsq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmsq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavxq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovnbq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovnbq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovnbq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovnbq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovntq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovntq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovntq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmovntq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vornq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vorrq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpnot.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vpselq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovntq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovntq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovntq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovntq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshlq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshlq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev16q_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev16q_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndaq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndaq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndmq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndmq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndnq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndnq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndpq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndpq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndxq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndxq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsbciq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsbciq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsbcq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsbcq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlcq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_r_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_r_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_r_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_r_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_r_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_r_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshlq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsliq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsriq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst1q_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vstrwq_f32.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrwq_u32.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vld1q_f16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vld1q_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_z_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_z_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_z_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_z_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_z_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld1q_z_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld4q_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld4q_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld4q_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld4q_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld4q_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld4q_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld4q_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld4q_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst2q_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst2q_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst2q_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst2q_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst2q_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst2q_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst2q_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst2q_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst4q_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst4q_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst4q_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst4q_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst4q_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst4q_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst4q_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vst4q_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrbq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vstrhq_u32.c: Likewise. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2023-04-06 Stam Markianos-Wright +++ +++ * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: Remove unused variables. +++ * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: Remove unused variables. +++ +++2023-05-18 Murray Steele +++ +++ Backported from master: +++ 2023-01-18 Murray Steele +++ +++ * gcc.target/arm/mve/general/preserve_user_namespace_1.c: New test. +++ +++2023-05-18 Andre Vieira +++ +++ Backported from master: +++ 2023-01-24 Andre Vieira +++ +++ * gcc.target/arm/mve/pr108177-1-run.c: New test. +++ * gcc.target/arm/mve/pr108177-1.c: New test. +++ * gcc.target/arm/mve/pr108177-10-run.c: New test. +++ * gcc.target/arm/mve/pr108177-10.c: New test. +++ * gcc.target/arm/mve/pr108177-11-run.c: New test. +++ * gcc.target/arm/mve/pr108177-11.c: New test. +++ * gcc.target/arm/mve/pr108177-12-run.c: New test. +++ * gcc.target/arm/mve/pr108177-12.c: New test. +++ * gcc.target/arm/mve/pr108177-13-run.c: New test. +++ * gcc.target/arm/mve/pr108177-13.c: New test. +++ * gcc.target/arm/mve/pr108177-14-run.c: New test. +++ * gcc.target/arm/mve/pr108177-14.c: New test. +++ * gcc.target/arm/mve/pr108177-2-run.c: New test. +++ * gcc.target/arm/mve/pr108177-2.c: New test. +++ * gcc.target/arm/mve/pr108177-3-run.c: New test. +++ * gcc.target/arm/mve/pr108177-3.c: New test. +++ * gcc.target/arm/mve/pr108177-4-run.c: New test. +++ * gcc.target/arm/mve/pr108177-4.c: New test. +++ * gcc.target/arm/mve/pr108177-5-run.c: New test. +++ * gcc.target/arm/mve/pr108177-5.c: New test. +++ * gcc.target/arm/mve/pr108177-6-run.c: New test. +++ * gcc.target/arm/mve/pr108177-6.c: New test. +++ * gcc.target/arm/mve/pr108177-7-run.c: New test. +++ * gcc.target/arm/mve/pr108177-7.c: New test. +++ * gcc.target/arm/mve/pr108177-8-run.c: New test. +++ * gcc.target/arm/mve/pr108177-8.c: New test. +++ * gcc.target/arm/mve/pr108177-9-run.c: New test. +++ * gcc.target/arm/mve/pr108177-9.c: New test. +++ * gcc.target/arm/mve/pr108177-main.x: New test include. +++ * gcc.target/arm/mve/pr108177.x: New test include. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2023-04-04 Stam Markianos-Wright +++ +++ * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Tighten test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Tighten test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Tighten test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Tighten test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Tighten test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Tighten test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Tighten test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Tighten test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Tighten test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Tighten test. +++ +++2023-05-18 Stam Markianos-Wright +++ +++ Backported from master: +++ 2023-01-16 Stam Markianos-Wright +++ +++ PR target/96795 +++ PR target/107515 +++ * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: New test. +++ * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: New test. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Add missing extern +++ "C". +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vld2q_f16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld2q_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld2q_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld2q_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vld2q_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqnegq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqnegq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqnegq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqabsq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqabsq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqabsq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vcmulq_f16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vcmulq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vcmlaq_f16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vnegq_f16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vnegq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vnegq_x_s8.c: Likewise. +++ * gcc.target/arm/simd/mve-vneg.c: Update test. +++ * gcc.target/arm/simd/mve-vshr.c: Likewise +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use +++ extern "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise. +++ * gcc.target/arm/simd/mve-vclz.c: Update test. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2023-01-25 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vclsq_m_s16.c: Use +++ check-function-bodies instead of scan-assembler checks. Use extern +++ "C" for C++ testing. +++ * gcc.target/arm/mve/intrinsics/vclsq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclsq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclsq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclsq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclsq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclsq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclsq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vclsq_x_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-12-08 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Extern functions +++ as "C". +++ * gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise. +++ +++2023-05-18 Christophe Lyon +++ +++ Backported from master: +++ 2022-09-30 Christophe Lyon +++ +++ * gcc.target/arm/mve/mve_load_memory_modes.c: Update expected +++ registers. +++ * gcc.target/arm/mve/mve_store_memory_modes.c: Likewise. +++ +++2023-05-18 Christophe Lyon +++ +++ Backported from master: +++ 2022-10-03 Christophe Lyon +++ +++ * gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c: New test. +++ +++2023-05-18 Christophe Lyon +++ +++ Backported from master: +++ 2022-12-01 Christophe Lyon +++ +++ * gcc.target/arm/simd/mve-compare-1.c: Update. +++ * gcc.target/arm/simd/mve-compare-scalar-1.c: Update. +++ * gcc.target/arm/simd/mve-vabs.c: Update. +++ * gcc.target/arm/simd/mve-vadd-1.c: Update. +++ * gcc.target/arm/simd/mve-vadd-scalar-1.c: Update. +++ * gcc.target/arm/simd/mve-vcmp.c: Update. +++ * gcc.target/arm/simd/pr101325.c: Update. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c: Improve tests. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_s16.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_s32.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_s8.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_u16.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_u32.c: +++ * gcc.target/arm/mve/intrinsics/vqsubq_u8.c: +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: +++ * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Improve tests. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Improve tests. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c: Improve tests. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c: Improve tests. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vsubq_f16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vmulq_f16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddlvq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvaq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vaddvq_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vabsq_f16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vabdq_f16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vabavq_p_s16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vabavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vabavq_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxaq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxavq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vmaxvq_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vminaq_m_s16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vminaq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminaq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminavq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_p_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vminvq_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmphiq_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpleq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpltq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcmpneq_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c: Improve tests. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c : Improve test. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c : Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_n_u16.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c : Likewise. +++ * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c : Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: +++ Update test. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: +++ Likewise. +++ * gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: +++ Likewise. +++ +++2023-05-18 Andrea Corallo +++ +++ Backported from master: +++ 2022-11-28 Andrea Corallo +++ +++ * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Improve test. +++ * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise. +++ * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise. +++ +++2023-05-17 Jakub Jelinek +++ +++ Backported from master: +++ 2023-05-17 Jakub Jelinek +++ +++ PR c++/109868 +++ * g++.dg/init/pr109868.C: New test. +++ +++2023-05-15 Jason Merrill +++ +++ PR c++/109241 +++ * g++.dg/cpp1y/lambda-generic-local-class2.C: New test. +++ +++2023-05-15 Richard Biener +++ +++ PR testsuite/108776 +++ * c-c++-common/rotate-11.c: Add --param logical-op-non-short-circuit=1. +++ +++2023-05-15 Richard Biener +++ +++ Backported from master: +++ 2023-05-15 Richard Biener +++ +++ * gcc.dg/vect/pr108950.c: Re-order dg-require-effective-target +++ and dg-do. +++ +++2023-05-10 Richard Biener +++ +++ Backported from master: +++ 2023-05-10 Richard Biener +++ +++ * g++.dg/torture/pr106922.C: Force _GLIBCXX_USE_CXX11_ABI to 1. +++ +++2023-05-09 Patrick Palka +++ +++ Backported from master: +++ 2023-04-01 Patrick Palka +++ +++ PR c++/109160 +++ * g++.dg/cpp2a/concepts-placeholder12.C: New test. +++ +++2023-05-09 Jakub Jelinek +++ +++ Backported from master: +++ 2023-05-09 Jakub Jelinek +++ +++ PR tree-optimization/109778 +++ * gcc.dg/lto/pr109778_0.c: New test. +++ * gcc.dg/lto/pr109778_1.c: New file. +++ +++2023-05-09 Jakub Jelinek +++ +++ Backported from master: +++ 2023-05-09 Jakub Jelinek +++ +++ PR tree-optimization/109778 +++ * gcc.c-torture/execute/pr109778.c: New test. +++ +++2023-05-09 Martin Uecker +++ +++ Backported from master: +++ 2023-02-18 Martin Uecker +++ +++ PR c/105660 +++ PR c/105660 +++ * gcc.dg/pr105660-1.c: New test. +++ * gcc.dg/pr105660-2.c: New test. +++ +++2023-05-09 Kewen Lin +++ +++ Backported from master: +++ 2023-04-26 Kewen Lin +++ +++ PR target/109069 +++ * gcc.target/powerpc/pr109069-1.c: New test. +++ * gcc.target/powerpc/pr109069-2-run.c: New test. +++ * gcc.target/powerpc/pr109069-2.c: New test. +++ * gcc.target/powerpc/pr109069-2.h: New test. +++ +++2023-05-09 Jason Merrill +++ +++ PR c++/106740 +++ PR c++/105852 +++ * g++.dg/template/friend78.C: New test. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/gcc/testsuite/c-c++-common/rotate-11.c +++++ b/src/gcc/testsuite/c-c++-common/rotate-11.c ++@@ -1,6 +1,6 @@ ++ /* PR tree-optimization/108440 */ ++ /* { dg-do compile { target { { ilp32 || lp64 } || llp64 } } } */ ++-/* { dg-options "-O2 -fdump-tree-optimized" } */ +++/* { dg-options "-O2 -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */ ++ /* { dg-final { scan-tree-dump-times " r<< " 5 "optimized" } } */ ++ /* { dg-final { scan-tree-dump-times " \\\& 7;" 4 "optimized" } } */ ++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/c-c++-common/ubsan/Wno-attributes-1.c ++@@ -0,0 +1,9 @@ +++/* PR c/112339 */ +++/* { dg-do compile { target { c++11 || c } } } */ +++/* { dg-options "-Wno-attributes=foo::no_sanitize -fsanitize=undefined" } */ +++/* { dg-additional-options "-std=c2x" { target c } } */ +++ +++[[foo::no_sanitize("bounds")]] void +++foo (void) +++{ +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/c-c++-common/ubsan/pr112727.c ++@@ -0,0 +1,17 @@ +++/* PR sanitizer/112727 */ +++/* { dg-do compile } */ +++/* { dg-options "-O2 -fsanitize=shift-exponent,bounds-strict -Wuninitialized" } */ +++ +++#ifndef __cplusplus +++#define bool _Bool +++#endif +++ +++struct S { bool s[8]; }; +++ +++void +++foo (const struct S *x) +++{ +++ unsigned n = 0; +++ for (unsigned j = 0; j < 8; j++) +++ n |= ((!x->s[j]) ? 1 : 0) << (16 + j); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist-array21.C ++@@ -0,0 +1,12 @@ +++// PR c++/109899 +++// { dg-do compile { target c++11 } } +++ +++struct A { A(); ~A(); }; +++ +++template +++using array = T[42]; +++ +++template +++void f() { +++ array{}; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11a.C ++@@ -0,0 +1,21 @@ +++// PR c++/108975 +++// A version of lambda-const11.C using a generic lambda. +++// { dg-do compile { target c++14 } } +++ +++template void g(); +++template struct A { }; +++ +++template +++void f() { +++ constexpr int dim = 1; +++ auto l = [&](auto) { +++ int n[dim * 1]; +++ using ty1 = decltype(g()); +++ using ty2 = A; +++ }; +++ l(0); +++ // In f, we shouldn't actually capture dim. +++ static_assert (sizeof(l) == 1, ""); +++} +++ +++template void f(); ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp0x/noexcept78.C ++@@ -0,0 +1,16 @@ +++// PR c++/109761 +++// { dg-do compile { target c++11 } } +++ +++struct base { +++ virtual void foo() noexcept { } +++ virtual ~base() { } +++}; +++ +++struct outer : base { +++ struct nested { +++ void foo() noexcept(noexcept(g())); // { dg-bogus "looser" } +++ ~nested() noexcept(noexcept(g())); // { dg-bogus "looser" } +++ }; +++ static void g(); +++}; +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp0x/noexcept79.C ++@@ -0,0 +1,18 @@ +++// PR c++/110468 +++// { dg-do compile { target c++11 } } +++ +++template +++struct variant { +++ variant() noexcept(T > 0); +++}; +++ +++template +++struct A { +++ variant m = {}; +++}; +++ +++struct B { +++ B(A<1>); +++}; +++ +++B b = {{}}; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C ++@@ -0,0 +1,15 @@ +++// PR c++/109666 +++// { dg-do compile { target c++11 } } +++ +++struct Point { +++ int value_; +++}; +++template struct StaticVector { +++ static StaticVector create() { +++ StaticVector output; +++ return output; +++ } +++ Point _M_elems[n]{}; +++ +++}; +++void f() { StaticVector<3>::create(); } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C ++@@ -0,0 +1,18 @@ +++// PR c++/106890 +++// { dg-do compile { target c++11 } } +++ +++struct A +++{ +++ int p; +++}; +++ +++template +++struct B : virtual public A +++{ +++ B() { } +++ B(int) { } +++ +++ int k = this->p; +++}; +++ +++template struct B; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp1y/lambda-generic-local-class2.C ++@@ -0,0 +1,13 @@ +++// PR c++/109241 +++// { dg-do compile { target c++14 } } +++// { dg-options "" } no pedantic +++ +++void g() { +++ [](auto) { +++ [](auto) { +++ ({ +++ struct A {}; +++ }); +++ }; +++ }(1); +++} ++--- a/src/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C +++++ b/src/gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C ++@@ -557,3 +557,9 @@ ++ #elif __cpp_multidimensional_subscript != 202110 ++ # error "__cpp_multidimensional_subscript != 202110" ++ #endif +++ +++#ifndef __cpp_auto_cast +++# error "__cpp_auto_cast" +++#elif __cpp_auto_cast != 202110 +++# error "__cpp_auto_cast != 202110" +++#endif ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-fn8.C ++@@ -0,0 +1,26 @@ +++// PR c++/111703 +++// { dg-do compile { target c++20 } } +++ +++template +++constexpr bool always_true() { return true; } +++ +++struct P { +++ P() = default; +++ +++ template +++ requires (always_true()) // { dg-bogus "used before its definition" } +++ constexpr P(const T&) { } +++ +++ int n, m; +++}; +++ +++void (*f)(P); +++P (*h)(P); +++ +++template +++constexpr bool g() { +++ P x; +++ f(x); // { dg-bogus "from here" } +++ f(h(x)); // { dg-bogus "from here" } +++ return true; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C ++@@ -0,0 +1,29 @@ +++// PR c++/109160 +++// { dg-do compile { target c++20 } } +++ +++template +++concept C = B; +++ +++template struct X { }; +++ +++template +++struct A { +++ template auto V> static void f(); +++ template auto V> static void g(X); +++ template auto V> static inline int value; +++ template auto V> struct D { }; +++}; +++ +++int main() { +++ A::f<0>(); +++ A::f<0>(); // { dg-error "no match|constraints" } +++ +++ A::g(X<0>{}); +++ A::g(X<0>{}); // { dg-error "no match|constraints" } +++ +++ bool v1 = A::value<0>; +++ bool v2 = A::value<0>; // { dg-error "constraints" } +++ +++ A::D<0> d1; +++ A::D<0> d2; // { dg-error "constraints" } +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-ttp5.C ++@@ -0,0 +1,24 @@ +++// PR c++/111485 +++// { dg-do compile { target c++20 } } +++ +++template constexpr bool always_true = true; +++ +++template concept C = always_true; +++template concept D = C || true; +++ +++template class TT> struct example; +++template class UU> using example_t = example; +++ +++template +++struct A { +++ template class TT> struct example; +++ +++ template class UU> using example_t = example; +++ +++ template +++ struct B { +++ template class UU> using example_t = example; +++ }; +++}; +++ +++template struct A::B; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-ttp6.C ++@@ -0,0 +1,17 @@ +++// PR c++/111485 +++// { dg-do compile { target c++20 } } +++ +++template constexpr bool always_true = true; +++ +++template concept C = always_true; +++ +++template requires C class TT> +++void f(); +++ +++template requires C +++struct A; +++ +++int main() { +++ f(); +++ f(); // { dg-error "no match|constraint mismatch" } +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/debug/pr110295.C ++@@ -0,0 +1,19 @@ +++// { dg-do compile } +++// { dg-options "-g" } +++ +++template +++struct QCachedT +++{ +++ void operator delete(void *, T *) {} +++}; +++template +++void exercise() +++{ +++ struct thing_t +++ : QCachedT +++ { +++ }; +++ thing_t *list[1]; +++ new thing_t; // { dg-warning "" } +++} +++int main() { exercise<1>(); } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/diagnostic/constexpr4.C ++@@ -0,0 +1,9 @@ +++// Verify we diagnose a call to a non-constant function pointer ahead of time. +++// { dg-do compile { target c++11 } } +++ +++bool (*f)(int); +++ +++template +++void g() { +++ static_assert(f(N), ""); // { dg-error "non-constant|'f' is not usable" } +++} ++--- a/src/gcc/testsuite/g++.dg/eh/return1.C +++++ b/src/gcc/testsuite/g++.dg/eh/return1.C ++@@ -16,13 +16,14 @@ extern "C" int printf (const char *, ...); ++ ++ struct X ++ { ++- X(bool throws) : throws_(throws) { ++c; DEBUG; } ++- X(const X& x); // not defined +++ X(bool throws) : i(-42), throws_(throws) { ++c; DEBUG; } +++ X(const X& x): i(x.i), throws_(x.throws_) { ++c; DEBUG; } ++ ~X() THROWS ++ { ++- ++d; DEBUG; +++ i = ++d; DEBUG; ++ if (throws_) { throw 1; } ++ } +++ int i; ++ private: ++ bool throws_; ++ }; ++@@ -33,6 +34,13 @@ X f() ++ return X(false); ++ } ++ +++X f2() +++{ +++ foo: +++ X x(true); +++ return X(false); +++} +++ ++ X g() ++ { ++ return X(true),X(false); ++@@ -54,6 +62,85 @@ X i() ++ return X(false); ++ } ++ +++X i2() +++{ +++ try { +++ foo: +++ X x(true); +++ return X(false); +++ } catch(...) {} +++ return X(false); +++} +++ +++// c++/112301 +++X i3() +++{ +++ try { +++ X x(true); +++ return X(false); +++ } catch(...) { throw; } +++} +++ +++X i4() +++{ +++ try { +++ X x(true); +++ X x2(false); +++ return x2; +++ } catch(...) { throw; } +++} +++ +++X i4a() +++{ +++ try { +++ X x2(false); +++ X x(true); +++ return x2; +++ } catch(...) { throw; } +++} +++ +++X i4b() +++{ +++ X x(true); +++ X x2(false); +++ return x2; +++} +++ +++X i4c() +++{ +++ X x2(false); +++ X x(true); +++ return x2; +++} +++ +++X i5() +++{ +++ X x2(false); +++ +++ try { +++ X x(true); +++ return x2; +++ } catch(...) { +++ if (x2.i != -42) +++ d += 42; +++ throw; +++ } +++} +++ +++X i6() +++{ +++ X x2(false); +++ +++ try { +++ X x(true); +++ return x2; +++ } catch(...) { +++ if (x2.i != -42) +++ d += 42; +++ } +++ return x2; +++} +++ ++ X j() ++ { ++ try { ++@@ -84,6 +171,8 @@ int main() ++ try { f(); } ++ catch (...) {} ++ +++ try { f2(); } catch (...) {} +++ ++ try { g(); } ++ catch (...) {} ++ ++@@ -93,6 +182,15 @@ int main() ++ try { i(); } ++ catch (...) {} ++ +++ try { i2(); } catch (...) {} +++ try { i3(); } catch (...) {} +++ try { i4(); } catch (...) {} +++ try { i4a(); } catch (...) {} +++ try { i4b(); } catch (...) {} +++ try { i4c(); } catch (...) {} +++ try { i5(); } catch (...) {} +++ try { i6(); } catch (...) {} +++ ++ try { j(); } catch (...) {} ++ ++ try { k(); } catch (...) {} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/ext/int128-7.C ++@@ -0,0 +1,4 @@ +++// PR c++/108099 +++// { dg-do compile { target { c++11 && int128 } } } +++ +++using i128 = signed __int128_t; // { dg-error "specified with" } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/ext/int128-8.C ++@@ -0,0 +1,24 @@ +++// PR c++/108099 +++// { dg-do compile { target { c++11 && int128 } } } +++// { dg-options "" } +++ +++using u128 = unsigned __int128_t; +++using s128 = signed __int128_t; +++template struct integral_constant { +++ static constexpr T value = v; +++}; +++typedef integral_constant false_type; +++typedef integral_constant true_type; +++template +++struct is_same : false_type {}; +++template +++struct is_same : true_type {}; +++static_assert (is_same <__int128, s128>::value, ""); +++static_assert (is_same ::value, ""); +++static_assert (is_same <__int128_t, s128>::value, ""); +++static_assert (is_same ::value, ""); +++static_assert (is_same <__uint128_t, u128>::value, ""); +++static_assert (sizeof (s128) == sizeof (__int128), ""); +++static_assert (sizeof (u128) == sizeof (unsigned __int128), ""); +++static_assert (s128(-1) < 0, ""); +++static_assert (u128(-1) > 0, ""); ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/ext/unroll-5.C ++@@ -0,0 +1,23 @@ +++// PR c++/112795 +++// { dg-do compile { target c++11 } } +++// { dg-options "-O2 -fdump-tree-cunrolli-details" } +++ +++void baz (int); +++constexpr int n = 3; +++ +++template +++void +++foo () +++{ +++#pragma GCC unroll(n) +++ for (int i = 0; i != n; ++i) +++ baz (i); +++} +++ +++void +++qux () +++{ +++ foo <2> (); +++} +++ +++// { dg-final { scan-tree-dump "loop with 3 iterations completely unrolled" "cunrolli" } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/ext/unsigned-typedef2.C ++@@ -0,0 +1,25 @@ +++// PR c++/108099 +++// { dg-do compile { target c++11 } } +++// { dg-options "" } +++ +++typedef long long t64; +++template struct integral_constant { +++ static constexpr T value = v; +++}; +++typedef integral_constant false_type; +++typedef integral_constant true_type; +++template +++struct is_same : false_type {}; +++template +++struct is_same : true_type {}; +++ +++using s64 = signed t64; +++static_assert (is_same ::value, ""); +++static_assert (is_same ::value, ""); +++static_assert (sizeof (s64) == sizeof (long long), ""); +++static_assert (s64(-1) < 0, ""); +++ +++using u64 = unsigned t64; +++static_assert (is_same ::value, ""); +++static_assert (sizeof (u64) == sizeof (unsigned long long), ""); +++static_assert (u64(-1) > 0, ""); ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/ext/unsigned-typedef3.C ++@@ -0,0 +1,25 @@ +++// PR c++/108099 +++// { dg-do compile { target c++11 } } +++// { dg-options "" } +++ +++typedef unsigned long long t64; +++template struct integral_constant { +++ static constexpr T value = v; +++}; +++typedef integral_constant false_type; +++typedef integral_constant true_type; +++template +++struct is_same : false_type {}; +++template +++struct is_same : true_type {}; +++ +++using s64 = signed t64; +++static_assert (is_same ::value, ""); +++static_assert (is_same ::value, ""); +++static_assert (sizeof (s64) == sizeof (long long), ""); +++static_assert (s64(-1) < 0, ""); +++ +++using u64 = unsigned t64; +++static_assert (is_same ::value, ""); +++static_assert (sizeof (u64) == sizeof (unsigned long long), ""); +++static_assert (u64(-1) > 0, ""); ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/init/pr109868.C ++@@ -0,0 +1,13 @@ +++// PR c++/109868 +++// { dg-do compile } +++// { dg-options "-O2" } +++ +++struct A { virtual void foo (); }; +++struct B { long b; int : 0; }; +++struct C : A { B c; }; +++ +++void +++bar (C *p) +++{ +++ *p = C (); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/opt/pr110515.C ++@@ -0,0 +1,223 @@ +++// { dg-do run } +++// { dg-require-effective-target c++11 } +++// { dg-options "-O2" } +++ +++typedef __UINT64_TYPE__ u64; +++ +++struct SmallDenseMap { +++ static constexpr u64 EmptyKey = 0xC0FFEUL; +++ struct V { u64 v; }; +++ +++ bool contains(u64 Val) { +++ V *TheSlot = nullptr; +++ return (LookupSlotFor(Val, TheSlot) ? 1 : 0); +++ } +++ +++ void try_emplace(u64 Key) { +++ V *TheSlot = nullptr; +++ if (LookupSlotFor(Key, TheSlot)) +++ return; +++ +++ // Otherwise, insert the new element. +++ InsertIntoSlot(TheSlot, Key); +++ } +++ +++ void moveFromOldSlots(V *OldSlotsBegin, V *OldSlotsEnd) { +++ Size = 0; +++ +++ V *B_ = u.o.Slots; +++ V *E_ = B_ + u.o.Capacity; +++ for (; B_ != E_; ++B_) +++ B_->v = EmptyKey; +++ +++ // Insert all the old elements. +++ V *O = OldSlotsBegin; +++ V *E = OldSlotsEnd; +++ for (; O != E; ++O) { +++ if (O->v != EmptyKey) { +++ // Insert the key/value into the new table. +++ V * N = nullptr; +++ LookupSlotFor(O->v, N); +++ N->v = O->v; +++ Size++; +++ } +++ } +++ } +++ +++ void InsertIntoSlot(V *TheSlot, u64 Key) { +++ unsigned NewSize = Size + 1; +++ unsigned Capacity = getCapacity(); +++ // Make sure we always keep at least one Empty value +++ if (NewSize >= Capacity) { +++ //fprintf(stderr, "GROW: size=%u capacity=%u -> ...\n", Size, Capacity); +++ grow(); +++ LookupSlotFor(Key, TheSlot); +++ Capacity = getCapacity(); +++ //fprintf(stderr, "GROW: ... -> size=%u capacity=%u\n", NewSize, Capacity); +++ } +++ +++ Size++; +++ +++ TheSlot->v = Key; +++ } +++ +++ bool LookupSlotFor(u64 Val, +++ V *&FoundSlot) { +++ V *SlotsPtr = getSlots(); +++ const unsigned Capacity = getCapacity(); +++ +++ for (unsigned i = 0; i < Capacity; ++i) { +++ V *ThisSlot = SlotsPtr + i; +++ if (Val == ThisSlot->v) { +++ FoundSlot = ThisSlot; +++ return true; +++ } +++ +++ if (ThisSlot->v == EmptyKey) { +++ FoundSlot = ThisSlot; +++ return false; +++ } +++ } +++ // Guarantee that within an array there is a match +++ // or Empty value where to insert a new vaue. +++ __builtin_trap(); +++ } +++ +++ // Needs to bea at least 1 to hld one empty value +++ static constexpr unsigned InlineSlots = 2; +++ +++ bool Small; +++ unsigned Size; +++ +++ struct LargeRep { +++ V *Slots; +++ unsigned Capacity; +++ }; +++ +++ union { +++ V i[InlineSlots]; // Small = true +++ LargeRep o; // Small = false +++ } u; +++ +++ explicit SmallDenseMap() : Small(true), Size(0) { +++ Size = 0; +++ +++ V *B = u.i; +++ V *E = B + InlineSlots; +++ for (; B != E; ++B) +++ B->v = EmptyKey; +++ } +++ +++ void grow() { +++ // assert: +++ if (!Small) __builtin_trap(); +++ +++ // First move the inline Slots into a temporary storage. +++ V TmpStorage[InlineSlots]; +++ V *TmpBegin = TmpStorage; +++ V *TmpEnd = TmpBegin; +++ +++ // Loop over the Slots, moving non-empty, non-tombstones into the +++ // temporary storage. Have the loop move the TmpEnd forward as it goes. +++ V *P = u.i; +++ V *E = P + InlineSlots; +++ for (; P != E; ++P) { +++ if (P->v != EmptyKey) { +++ TmpEnd->v = P->v; +++ ++TmpEnd; +++ } +++ } +++ +++ Small = false; +++ u.o = LargeRep{new V[128], 128}; +++ moveFromOldSlots(TmpBegin, TmpEnd); +++ } +++ +++ V *getSlots() { +++ if (Small) { +++ V * inl = u.i; +++ return inl; +++ } +++ else { +++ LargeRep * rep = &u.o; +++ return rep->Slots; +++ } +++ } +++ +++ unsigned getCapacity() { +++ if (Small) { +++ return InlineSlots; +++ } +++ else { +++ LargeRep * rep = &u.o; +++ return rep->Capacity; +++ } +++ } +++}; +++ +++#pragma GCC optimize(0) +++ +++struct P { +++ u64 f; +++ bool s; +++}; +++ +++static u64 ws = 0; +++static P WorkList[128]; +++ +++__attribute__((noipa)) +++static void popupateIni() { +++ for (u64 Var : (u64[]){8,7,6,5,4,3,0}) { +++ WorkList[ws++] = P{Var, false}; +++ } +++} +++ +++__attribute__((noipa)) +++static void checkCycle(u64 Var) { +++ // Detect cycles. +++ static bool seen[256]; +++ if (Var >= 256 || seen[Var]) __builtin_trap(); +++ seen[Var] = true; +++} +++ +++ +++__attribute__((noipa)) +++static void populateDeps(u64 Var) { +++ +++ WorkList[ws++] = P{Var, true}; +++ if (Var == 8) +++ WorkList[ws++] = P{0, false}; +++} +++ +++ +++__attribute__((noipa)) __attribute__((optimize(3))) +++static void bug() { +++ +++ // triggers growth on insert +++ SmallDenseMap Visited; +++ +++ popupateIni(); +++ +++ while (ws > 0) { +++ P Item = WorkList[--ws]; +++ u64 Var = Item.f; +++ bool visitedAllDependencies = Item.s; +++ +++ if (Visited.contains(Var)) { +++ continue; +++ } +++ +++ if (visitedAllDependencies) { +++ Visited.try_emplace(Var); +++ continue; +++ } +++ +++ checkCycle(Var); +++ populateDeps(Var); +++ } +++} +++ +++__attribute__((noipa)) +++int main() { +++ bug(); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/template/friend78.C ++@@ -0,0 +1,18 @@ +++// PR c++/106740 +++// { dg-additional-options -Wno-non-template-friend } +++ +++template struct EnumClass { friend int toString(EnumClass); }; +++struct AmhsConvInfoCoFw { +++ enum AftnTypeXMsgTypeEnum {}; +++ typedef EnumClass AftnTypeXMsgType; +++ const int getAftnTypeXMsgTypeAsStr() const; +++ struct MtcuAxgwInfo { +++ AftnTypeXMsgType mAftnTypeXMsgType; +++ }; +++}; +++const int AmhsConvInfoCoFw::getAftnTypeXMsgTypeAsStr() const { +++ MtcuAxgwInfo __trans_tmp_1; +++ toString(__trans_tmp_1.mAftnTypeXMsgType); +++ return 0; +++} +++int toString(AmhsConvInfoCoFw::AftnTypeXMsgType); ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/template/template-keyword4.C ++@@ -0,0 +1,18 @@ +++// PR c++/106310 +++ +++template +++struct set{}; +++ +++template< typename T > +++struct Base +++{ +++ template< int > int set(T const &); +++}; +++ +++template< typename T > +++struct Derived : Base< T > +++{ +++ void f(T const &arg) { +++ this->template set< 0 >(arg); +++ } +++}; ++--- a/src/gcc/testsuite/g++.dg/torture/pr106922.C +++++ b/src/gcc/testsuite/g++.dg/torture/pr106922.C ++@@ -4,8 +4,16 @@ ++ // -O1 doesn't iterate VN and thus has bogus uninit diagnostics ++ // { dg-skip-if "" { *-*-* } { "-O1" } { "" } } ++ +++// The testcase still emits bogus diagnostics with the pre-C++11 ABI +++#undef _GLIBCXX_USE_CXX11_ABI +++#define _GLIBCXX_USE_CXX11_ABI 1 +++ ++ #include ++ +++// When the library is not dual-ABI and defaults to old just compile +++// an empty TU +++#if _GLIBCXX_USE_CXX11_ABI +++ ++ #include ++ template ++ using Optional = std::optional; ++@@ -46,3 +54,4 @@ void test() ++ externals.external2 = internal2; ++ } ++ } +++#endif ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.dg/torture/pr111019.C ++@@ -0,0 +1,65 @@ +++// { dg-do run } +++// { dg-additional-options "-fstrict-aliasing" } +++ +++#include +++#include +++#include +++ +++class Base +++{ +++public: +++ Base* previous = nullptr; +++ Base* next = nullptr; +++ Base* target = nullptr; +++}; +++ +++class Target : public Base +++{ +++public: +++ __attribute__((always_inline)) ~Target() +++ { +++ while (this->next) +++ { +++ Base* n = this->next; +++ +++ if (n->previous) +++ n->previous->next = n->next; +++ if (n->next) +++ n->next->previous = n->previous; +++ n->previous = nullptr; +++ n->next = nullptr; +++ n->target = nullptr; +++ } +++ } +++}; +++ +++template +++class TargetWithData final : public Target +++{ +++public: +++ TargetWithData(T data) +++ : data(data) +++ {} +++ T data; +++}; +++ +++void test() +++{ +++ printf("test\n"); +++ Base ptr; +++ { +++ auto data = std::make_unique>(std::string("asdf")); +++ ptr.target = &*data; +++ ptr.previous = &*data; +++ data->next = &ptr; +++ +++ assert(ptr.target != nullptr); +++ } +++ assert(ptr.target == nullptr); +++} +++ +++int main(int, char**) +++{ +++ test(); +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/aarch64/acle/acle.exp ++@@ -0,0 +1,35 @@ +++# Copyright (C) 2014-2023 Free Software Foundation, Inc. +++ +++# This program is free software; you can redistribute it and/or modify +++# it under the terms of the GNU General Public License as published by +++# the Free Software Foundation; either version 3 of the License, or +++# (at your option) any later version. +++# +++# This program is distributed in the hope that it will be useful, +++# but WITHOUT ANY WARRANTY; without even the implied warranty of +++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +++# GNU General Public License for more details. +++# +++# You should have received a copy of the GNU General Public License +++# along with GCC; see the file COPYING3. If not see +++# . +++ +++# GCC testsuite that uses the `dg.exp' driver. +++ +++# Exit immediately if this isn't an AArch64 target. +++if ![istarget aarch64*-*-*] then { +++ return +++} +++ +++# Load support procs. +++load_lib g++-dg.exp +++ +++# Initialize `dg'. +++dg-init +++ +++# Main loop. +++dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \ +++ "" "" +++ +++# All done. +++dg-finish ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/aarch64/acle/ls64.C ++@@ -0,0 +1,10 @@ +++/* { dg-do compile } */ +++/* { dg-additional-options "-march=armv8.7-a" } */ +++#include +++int main() +++{ +++ data512_t d = __arm_ld64b ((const void *)0x1000); +++ __arm_st64b ((void *)0x2000, d); +++ uint64_t x = __arm_st64bv ((void *)0x3000, d); +++ x += __arm_st64bv0 ((void *)0x4000, d); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/aarch64/acle/ls64_lto.C ++@@ -0,0 +1,10 @@ +++/* { dg-do link { target aarch64_asm_ls64_ok } } */ +++/* { dg-additional-options "-march=armv8.7-a -flto" } */ +++#include +++int main() +++{ +++ data512_t d = __arm_ld64b ((const void *)0x1000); +++ __arm_st64b ((void *)0x2000, d); +++ uint64_t x = __arm_st64bv ((void *)0x3000, d); +++ x += __arm_st64bv0 ((void *)0x4000, d); +++} ++--- a/src/gcc/testsuite/g++.target/aarch64/pr103147-10.C +++++ b/src/gcc/testsuite/g++.target/aarch64/pr103147-10.C ++@@ -1,4 +1,4 @@ ++-/* { dg-options "-O2 -fpack-struct -mstrict-align" } */ +++/* { dg-options "-O2 -fpack-struct -mstrict-align -fno-stack-protector" } */ ++ /* { dg-final { check-function-bodies "**" "" "" } } */ ++ ++ #include ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/i386/pr112443.C ++@@ -0,0 +1,108 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target avx512bw } */ +++/* { dg-require-effective-target avx512vl } */ +++/* { dg-options "-O2 -std=c++17 -mavx512bw -mavx512vl" } */ +++ +++#include +++#include +++#include +++#include +++ +++#define AVX512BW +++#define AVX512VL +++ +++#include "avx512f-helper.h" +++ +++struct TensorIteratorBase{ +++ char* in; +++ char* out; +++ +++ void for_each(std::function loop){ +++ loop(out, in, 32); +++ } +++}; +++ +++class Vectorized { +++protected: +++ __m256i values; +++ +++ static inline __m256i invert(const __m256i& v) { +++ const auto ones = _mm256_set1_epi64x(-1); +++ return _mm256_xor_si256(ones, v); +++ } +++public: +++ operator __m256i() const { +++ return values; +++ } +++ +++ static constexpr int size() { +++ return 32; +++ } +++ +++ Vectorized() {} +++ Vectorized(__m256i v) : values(v) {} +++ Vectorized(uint8_t v) { values = _mm256_set1_epi8(v); } +++ static Vectorized blendv(const Vectorized& a, const Vectorized& b, +++ const Vectorized& mask) { +++ return _mm256_blendv_epi8(a, b, mask); +++ } +++ static Vectorized loadu(const void* ptr) { +++ return _mm256_loadu_si256(reinterpret_cast(ptr)); +++ } +++ void store(void* ptr) const { +++ _mm256_storeu_si256(reinterpret_cast<__m256i*>(ptr), values); +++ } +++ +++ Vectorized operator<(const Vectorized& other) const { +++ __m256i max = _mm256_max_epu8(values, other); +++ return invert(_mm256_cmpeq_epi8(max, values)); +++ } +++ Vectorized operator-(const Vectorized& b) { +++ return _mm256_sub_epi8(values, b); +++ } +++}; +++ +++std::ostream& operator<<(std::ostream& stream, const Vectorized& vec) { +++ uint8_t buf[Vectorized::size()]; +++ vec.store(buf); +++ stream << "vec["; +++ for (int i = 0; i != Vectorized::size(); i++) { +++ if (i != 0) +++ stream << ", "; +++ stream << buf[i]*1; +++ } +++ stream << "]"; +++ return stream; +++} +++ +++void run(TensorIteratorBase iter){ +++ Vectorized zero_vec(0); +++ Vectorized one_vec(1); +++ +++ iter.for_each([=](char* out, char* in, int64_t size) { +++ for (int64_t i = 0; i <= size - Vectorized::size(); i += Vectorized::size()) { +++ auto self_vec = Vectorized::loadu(in + i); +++ auto left = Vectorized::blendv(zero_vec, one_vec, zero_vec < self_vec); +++ auto right = Vectorized::blendv(zero_vec, one_vec, self_vec < zero_vec); +++ auto outv = left - right; +++ outv.store(out + i); +++ } +++ }); +++} +++ +++void +++test_256 (){ +++ char in[32]; +++ char out[32]; +++ for(auto& x: in) x = 1; +++ run(TensorIteratorBase{in, out}); +++ Vectorized::loadu (out); +++ for (int i = 0; i != 32; i++) +++ if (out[i] != 1) +++ __builtin_abort (); +++} +++ +++void +++test_128 () +++{ +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/powerpc/pr105325.C ++@@ -0,0 +1,28 @@ +++/* { dg-do assemble } */ +++/* { dg-require-effective-target lp64 } */ +++/* { dg-require-effective-target power10_ok } */ +++/* { dg-require-effective-target powerpc_prefixed_addr } */ +++/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */ +++ +++/* PR target/105324. Test that power10 fusion does not generate an LWA/CMPDI +++ with a large offset that the assembler rejects. Instead it should a +++ PLWZ/CMPWI combination. +++ +++ Originally, the code was dying because the fusion load + compare -1/0/1 +++ patterns did not handle the possibility that the load might be prefixed. +++ The -fstack-protector option is needed to show the bug. */ +++ +++struct Ath__array1D { +++ int _current; +++ int getCnt() { return _current; } +++}; +++struct extMeasure { +++ int _mapTable[10000]; +++ Ath__array1D _metRCTable; +++}; +++void measureRC() { +++ extMeasure m; +++ for (; m._metRCTable.getCnt();) +++ for (;;) +++ ; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/powerpc/pr110741.C ++@@ -0,0 +1,552 @@ +++/* { dg-do run { target { power10_hw } } } */ +++/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ +++ +++#include +++ +++typedef unsigned char uint8_t; +++ +++template +++static inline vector unsigned long long +++VSXTernaryLogic (vector unsigned long long a, vector unsigned long long b, +++ vector unsigned long long c) +++{ +++ return vec_ternarylogic (a, b, c, kTernLogOp); +++} +++ +++static vector unsigned long long +++VSXTernaryLogic (vector unsigned long long a, vector unsigned long long b, +++ vector unsigned long long c, int ternary_logic_op) +++{ +++ switch (ternary_logic_op & 0xFF) +++ { +++ case 0: +++ return VSXTernaryLogic<0> (a, b, c); +++ case 1: +++ return VSXTernaryLogic<1> (a, b, c); +++ case 2: +++ return VSXTernaryLogic<2> (a, b, c); +++ case 3: +++ return VSXTernaryLogic<3> (a, b, c); +++ case 4: +++ return VSXTernaryLogic<4> (a, b, c); +++ case 5: +++ return VSXTernaryLogic<5> (a, b, c); +++ case 6: +++ return VSXTernaryLogic<6> (a, b, c); +++ case 7: +++ return VSXTernaryLogic<7> (a, b, c); +++ case 8: +++ return VSXTernaryLogic<8> (a, b, c); +++ case 9: +++ return VSXTernaryLogic<9> (a, b, c); +++ case 10: +++ return VSXTernaryLogic<10> (a, b, c); +++ case 11: +++ return VSXTernaryLogic<11> (a, b, c); +++ case 12: +++ return VSXTernaryLogic<12> (a, b, c); +++ case 13: +++ return VSXTernaryLogic<13> (a, b, c); +++ case 14: +++ return VSXTernaryLogic<14> (a, b, c); +++ case 15: +++ return VSXTernaryLogic<15> (a, b, c); +++ case 16: +++ return VSXTernaryLogic<16> (a, b, c); +++ case 17: +++ return VSXTernaryLogic<17> (a, b, c); +++ case 18: +++ return VSXTernaryLogic<18> (a, b, c); +++ case 19: +++ return VSXTernaryLogic<19> (a, b, c); +++ case 20: +++ return VSXTernaryLogic<20> (a, b, c); +++ case 21: +++ return VSXTernaryLogic<21> (a, b, c); +++ case 22: +++ return VSXTernaryLogic<22> (a, b, c); +++ case 23: +++ return VSXTernaryLogic<23> (a, b, c); +++ case 24: +++ return VSXTernaryLogic<24> (a, b, c); +++ case 25: +++ return VSXTernaryLogic<25> (a, b, c); +++ case 26: +++ return VSXTernaryLogic<26> (a, b, c); +++ case 27: +++ return VSXTernaryLogic<27> (a, b, c); +++ case 28: +++ return VSXTernaryLogic<28> (a, b, c); +++ case 29: +++ return VSXTernaryLogic<29> (a, b, c); +++ case 30: +++ return VSXTernaryLogic<30> (a, b, c); +++ case 31: +++ return VSXTernaryLogic<31> (a, b, c); +++ case 32: +++ return VSXTernaryLogic<32> (a, b, c); +++ case 33: +++ return VSXTernaryLogic<33> (a, b, c); +++ case 34: +++ return VSXTernaryLogic<34> (a, b, c); +++ case 35: +++ return VSXTernaryLogic<35> (a, b, c); +++ case 36: +++ return VSXTernaryLogic<36> (a, b, c); +++ case 37: +++ return VSXTernaryLogic<37> (a, b, c); +++ case 38: +++ return VSXTernaryLogic<38> (a, b, c); +++ case 39: +++ return VSXTernaryLogic<39> (a, b, c); +++ case 40: +++ return VSXTernaryLogic<40> (a, b, c); +++ case 41: +++ return VSXTernaryLogic<41> (a, b, c); +++ case 42: +++ return VSXTernaryLogic<42> (a, b, c); +++ case 43: +++ return VSXTernaryLogic<43> (a, b, c); +++ case 44: +++ return VSXTernaryLogic<44> (a, b, c); +++ case 45: +++ return VSXTernaryLogic<45> (a, b, c); +++ case 46: +++ return VSXTernaryLogic<46> (a, b, c); +++ case 47: +++ return VSXTernaryLogic<47> (a, b, c); +++ case 48: +++ return VSXTernaryLogic<48> (a, b, c); +++ case 49: +++ return VSXTernaryLogic<49> (a, b, c); +++ case 50: +++ return VSXTernaryLogic<50> (a, b, c); +++ case 51: +++ return VSXTernaryLogic<51> (a, b, c); +++ case 52: +++ return VSXTernaryLogic<52> (a, b, c); +++ case 53: +++ return VSXTernaryLogic<53> (a, b, c); +++ case 54: +++ return VSXTernaryLogic<54> (a, b, c); +++ case 55: +++ return VSXTernaryLogic<55> (a, b, c); +++ case 56: +++ return VSXTernaryLogic<56> (a, b, c); +++ case 57: +++ return VSXTernaryLogic<57> (a, b, c); +++ case 58: +++ return VSXTernaryLogic<58> (a, b, c); +++ case 59: +++ return VSXTernaryLogic<59> (a, b, c); +++ case 60: +++ return VSXTernaryLogic<60> (a, b, c); +++ case 61: +++ return VSXTernaryLogic<61> (a, b, c); +++ case 62: +++ return VSXTernaryLogic<62> (a, b, c); +++ case 63: +++ return VSXTernaryLogic<63> (a, b, c); +++ case 64: +++ return VSXTernaryLogic<64> (a, b, c); +++ case 65: +++ return VSXTernaryLogic<65> (a, b, c); +++ case 66: +++ return VSXTernaryLogic<66> (a, b, c); +++ case 67: +++ return VSXTernaryLogic<67> (a, b, c); +++ case 68: +++ return VSXTernaryLogic<68> (a, b, c); +++ case 69: +++ return VSXTernaryLogic<69> (a, b, c); +++ case 70: +++ return VSXTernaryLogic<70> (a, b, c); +++ case 71: +++ return VSXTernaryLogic<71> (a, b, c); +++ case 72: +++ return VSXTernaryLogic<72> (a, b, c); +++ case 73: +++ return VSXTernaryLogic<73> (a, b, c); +++ case 74: +++ return VSXTernaryLogic<74> (a, b, c); +++ case 75: +++ return VSXTernaryLogic<75> (a, b, c); +++ case 76: +++ return VSXTernaryLogic<76> (a, b, c); +++ case 77: +++ return VSXTernaryLogic<77> (a, b, c); +++ case 78: +++ return VSXTernaryLogic<78> (a, b, c); +++ case 79: +++ return VSXTernaryLogic<79> (a, b, c); +++ case 80: +++ return VSXTernaryLogic<80> (a, b, c); +++ case 81: +++ return VSXTernaryLogic<81> (a, b, c); +++ case 82: +++ return VSXTernaryLogic<82> (a, b, c); +++ case 83: +++ return VSXTernaryLogic<83> (a, b, c); +++ case 84: +++ return VSXTernaryLogic<84> (a, b, c); +++ case 85: +++ return VSXTernaryLogic<85> (a, b, c); +++ case 86: +++ return VSXTernaryLogic<86> (a, b, c); +++ case 87: +++ return VSXTernaryLogic<87> (a, b, c); +++ case 88: +++ return VSXTernaryLogic<88> (a, b, c); +++ case 89: +++ return VSXTernaryLogic<89> (a, b, c); +++ case 90: +++ return VSXTernaryLogic<90> (a, b, c); +++ case 91: +++ return VSXTernaryLogic<91> (a, b, c); +++ case 92: +++ return VSXTernaryLogic<92> (a, b, c); +++ case 93: +++ return VSXTernaryLogic<93> (a, b, c); +++ case 94: +++ return VSXTernaryLogic<94> (a, b, c); +++ case 95: +++ return VSXTernaryLogic<95> (a, b, c); +++ case 96: +++ return VSXTernaryLogic<96> (a, b, c); +++ case 97: +++ return VSXTernaryLogic<97> (a, b, c); +++ case 98: +++ return VSXTernaryLogic<98> (a, b, c); +++ case 99: +++ return VSXTernaryLogic<99> (a, b, c); +++ case 100: +++ return VSXTernaryLogic<100> (a, b, c); +++ case 101: +++ return VSXTernaryLogic<101> (a, b, c); +++ case 102: +++ return VSXTernaryLogic<102> (a, b, c); +++ case 103: +++ return VSXTernaryLogic<103> (a, b, c); +++ case 104: +++ return VSXTernaryLogic<104> (a, b, c); +++ case 105: +++ return VSXTernaryLogic<105> (a, b, c); +++ case 106: +++ return VSXTernaryLogic<106> (a, b, c); +++ case 107: +++ return VSXTernaryLogic<107> (a, b, c); +++ case 108: +++ return VSXTernaryLogic<108> (a, b, c); +++ case 109: +++ return VSXTernaryLogic<109> (a, b, c); +++ case 110: +++ return VSXTernaryLogic<110> (a, b, c); +++ case 111: +++ return VSXTernaryLogic<111> (a, b, c); +++ case 112: +++ return VSXTernaryLogic<112> (a, b, c); +++ case 113: +++ return VSXTernaryLogic<113> (a, b, c); +++ case 114: +++ return VSXTernaryLogic<114> (a, b, c); +++ case 115: +++ return VSXTernaryLogic<115> (a, b, c); +++ case 116: +++ return VSXTernaryLogic<116> (a, b, c); +++ case 117: +++ return VSXTernaryLogic<117> (a, b, c); +++ case 118: +++ return VSXTernaryLogic<118> (a, b, c); +++ case 119: +++ return VSXTernaryLogic<119> (a, b, c); +++ case 120: +++ return VSXTernaryLogic<120> (a, b, c); +++ case 121: +++ return VSXTernaryLogic<121> (a, b, c); +++ case 122: +++ return VSXTernaryLogic<122> (a, b, c); +++ case 123: +++ return VSXTernaryLogic<123> (a, b, c); +++ case 124: +++ return VSXTernaryLogic<124> (a, b, c); +++ case 125: +++ return VSXTernaryLogic<125> (a, b, c); +++ case 126: +++ return VSXTernaryLogic<126> (a, b, c); +++ case 127: +++ return VSXTernaryLogic<127> (a, b, c); +++ case 128: +++ return VSXTernaryLogic<128> (a, b, c); +++ case 129: +++ return VSXTernaryLogic<129> (a, b, c); +++ case 130: +++ return VSXTernaryLogic<130> (a, b, c); +++ case 131: +++ return VSXTernaryLogic<131> (a, b, c); +++ case 132: +++ return VSXTernaryLogic<132> (a, b, c); +++ case 133: +++ return VSXTernaryLogic<133> (a, b, c); +++ case 134: +++ return VSXTernaryLogic<134> (a, b, c); +++ case 135: +++ return VSXTernaryLogic<135> (a, b, c); +++ case 136: +++ return VSXTernaryLogic<136> (a, b, c); +++ case 137: +++ return VSXTernaryLogic<137> (a, b, c); +++ case 138: +++ return VSXTernaryLogic<138> (a, b, c); +++ case 139: +++ return VSXTernaryLogic<139> (a, b, c); +++ case 140: +++ return VSXTernaryLogic<140> (a, b, c); +++ case 141: +++ return VSXTernaryLogic<141> (a, b, c); +++ case 142: +++ return VSXTernaryLogic<142> (a, b, c); +++ case 143: +++ return VSXTernaryLogic<143> (a, b, c); +++ case 144: +++ return VSXTernaryLogic<144> (a, b, c); +++ case 145: +++ return VSXTernaryLogic<145> (a, b, c); +++ case 146: +++ return VSXTernaryLogic<146> (a, b, c); +++ case 147: +++ return VSXTernaryLogic<147> (a, b, c); +++ case 148: +++ return VSXTernaryLogic<148> (a, b, c); +++ case 149: +++ return VSXTernaryLogic<149> (a, b, c); +++ case 150: +++ return VSXTernaryLogic<150> (a, b, c); +++ case 151: +++ return VSXTernaryLogic<151> (a, b, c); +++ case 152: +++ return VSXTernaryLogic<152> (a, b, c); +++ case 153: +++ return VSXTernaryLogic<153> (a, b, c); +++ case 154: +++ return VSXTernaryLogic<154> (a, b, c); +++ case 155: +++ return VSXTernaryLogic<155> (a, b, c); +++ case 156: +++ return VSXTernaryLogic<156> (a, b, c); +++ case 157: +++ return VSXTernaryLogic<157> (a, b, c); +++ case 158: +++ return VSXTernaryLogic<158> (a, b, c); +++ case 159: +++ return VSXTernaryLogic<159> (a, b, c); +++ case 160: +++ return VSXTernaryLogic<160> (a, b, c); +++ case 161: +++ return VSXTernaryLogic<161> (a, b, c); +++ case 162: +++ return VSXTernaryLogic<162> (a, b, c); +++ case 163: +++ return VSXTernaryLogic<163> (a, b, c); +++ case 164: +++ return VSXTernaryLogic<164> (a, b, c); +++ case 165: +++ return VSXTernaryLogic<165> (a, b, c); +++ case 166: +++ return VSXTernaryLogic<166> (a, b, c); +++ case 167: +++ return VSXTernaryLogic<167> (a, b, c); +++ case 168: +++ return VSXTernaryLogic<168> (a, b, c); +++ case 169: +++ return VSXTernaryLogic<169> (a, b, c); +++ case 170: +++ return VSXTernaryLogic<170> (a, b, c); +++ case 171: +++ return VSXTernaryLogic<171> (a, b, c); +++ case 172: +++ return VSXTernaryLogic<172> (a, b, c); +++ case 173: +++ return VSXTernaryLogic<173> (a, b, c); +++ case 174: +++ return VSXTernaryLogic<174> (a, b, c); +++ case 175: +++ return VSXTernaryLogic<175> (a, b, c); +++ case 176: +++ return VSXTernaryLogic<176> (a, b, c); +++ case 177: +++ return VSXTernaryLogic<177> (a, b, c); +++ case 178: +++ return VSXTernaryLogic<178> (a, b, c); +++ case 179: +++ return VSXTernaryLogic<179> (a, b, c); +++ case 180: +++ return VSXTernaryLogic<180> (a, b, c); +++ case 181: +++ return VSXTernaryLogic<181> (a, b, c); +++ case 182: +++ return VSXTernaryLogic<182> (a, b, c); +++ case 183: +++ return VSXTernaryLogic<183> (a, b, c); +++ case 184: +++ return VSXTernaryLogic<184> (a, b, c); +++ case 185: +++ return VSXTernaryLogic<185> (a, b, c); +++ case 186: +++ return VSXTernaryLogic<186> (a, b, c); +++ case 187: +++ return VSXTernaryLogic<187> (a, b, c); +++ case 188: +++ return VSXTernaryLogic<188> (a, b, c); +++ case 189: +++ return VSXTernaryLogic<189> (a, b, c); +++ case 190: +++ return VSXTernaryLogic<190> (a, b, c); +++ case 191: +++ return VSXTernaryLogic<191> (a, b, c); +++ case 192: +++ return VSXTernaryLogic<192> (a, b, c); +++ case 193: +++ return VSXTernaryLogic<193> (a, b, c); +++ case 194: +++ return VSXTernaryLogic<194> (a, b, c); +++ case 195: +++ return VSXTernaryLogic<195> (a, b, c); +++ case 196: +++ return VSXTernaryLogic<196> (a, b, c); +++ case 197: +++ return VSXTernaryLogic<197> (a, b, c); +++ case 198: +++ return VSXTernaryLogic<198> (a, b, c); +++ case 199: +++ return VSXTernaryLogic<199> (a, b, c); +++ case 200: +++ return VSXTernaryLogic<200> (a, b, c); +++ case 201: +++ return VSXTernaryLogic<201> (a, b, c); +++ case 202: +++ return VSXTernaryLogic<202> (a, b, c); +++ case 203: +++ return VSXTernaryLogic<203> (a, b, c); +++ case 204: +++ return VSXTernaryLogic<204> (a, b, c); +++ case 205: +++ return VSXTernaryLogic<205> (a, b, c); +++ case 206: +++ return VSXTernaryLogic<206> (a, b, c); +++ case 207: +++ return VSXTernaryLogic<207> (a, b, c); +++ case 208: +++ return VSXTernaryLogic<208> (a, b, c); +++ case 209: +++ return VSXTernaryLogic<209> (a, b, c); +++ case 210: +++ return VSXTernaryLogic<210> (a, b, c); +++ case 211: +++ return VSXTernaryLogic<211> (a, b, c); +++ case 212: +++ return VSXTernaryLogic<212> (a, b, c); +++ case 213: +++ return VSXTernaryLogic<213> (a, b, c); +++ case 214: +++ return VSXTernaryLogic<214> (a, b, c); +++ case 215: +++ return VSXTernaryLogic<215> (a, b, c); +++ case 216: +++ return VSXTernaryLogic<216> (a, b, c); +++ case 217: +++ return VSXTernaryLogic<217> (a, b, c); +++ case 218: +++ return VSXTernaryLogic<218> (a, b, c); +++ case 219: +++ return VSXTernaryLogic<219> (a, b, c); +++ case 220: +++ return VSXTernaryLogic<220> (a, b, c); +++ case 221: +++ return VSXTernaryLogic<221> (a, b, c); +++ case 222: +++ return VSXTernaryLogic<222> (a, b, c); +++ case 223: +++ return VSXTernaryLogic<223> (a, b, c); +++ case 224: +++ return VSXTernaryLogic<224> (a, b, c); +++ case 225: +++ return VSXTernaryLogic<225> (a, b, c); +++ case 226: +++ return VSXTernaryLogic<226> (a, b, c); +++ case 227: +++ return VSXTernaryLogic<227> (a, b, c); +++ case 228: +++ return VSXTernaryLogic<228> (a, b, c); +++ case 229: +++ return VSXTernaryLogic<229> (a, b, c); +++ case 230: +++ return VSXTernaryLogic<230> (a, b, c); +++ case 231: +++ return VSXTernaryLogic<231> (a, b, c); +++ case 232: +++ return VSXTernaryLogic<232> (a, b, c); +++ case 233: +++ return VSXTernaryLogic<233> (a, b, c); +++ case 234: +++ return VSXTernaryLogic<234> (a, b, c); +++ case 235: +++ return VSXTernaryLogic<235> (a, b, c); +++ case 236: +++ return VSXTernaryLogic<236> (a, b, c); +++ case 237: +++ return VSXTernaryLogic<237> (a, b, c); +++ case 238: +++ return VSXTernaryLogic<238> (a, b, c); +++ case 239: +++ return VSXTernaryLogic<239> (a, b, c); +++ case 240: +++ return VSXTernaryLogic<240> (a, b, c); +++ case 241: +++ return VSXTernaryLogic<241> (a, b, c); +++ case 242: +++ return VSXTernaryLogic<242> (a, b, c); +++ case 243: +++ return VSXTernaryLogic<243> (a, b, c); +++ case 244: +++ return VSXTernaryLogic<244> (a, b, c); +++ case 245: +++ return VSXTernaryLogic<245> (a, b, c); +++ case 246: +++ return VSXTernaryLogic<246> (a, b, c); +++ case 247: +++ return VSXTernaryLogic<247> (a, b, c); +++ case 248: +++ return VSXTernaryLogic<248> (a, b, c); +++ case 249: +++ return VSXTernaryLogic<249> (a, b, c); +++ case 250: +++ return VSXTernaryLogic<250> (a, b, c); +++ case 251: +++ return VSXTernaryLogic<251> (a, b, c); +++ case 252: +++ return VSXTernaryLogic<252> (a, b, c); +++ case 253: +++ return VSXTernaryLogic<253> (a, b, c); +++ case 254: +++ return VSXTernaryLogic<254> (a, b, c); +++ case 255: +++ return VSXTernaryLogic<255> (a, b, c); +++ default: +++ return a; +++ } +++} +++ +++int +++main (int argc, char **argv) +++{ +++ vector unsigned long long a = {0xD8, 0xDB}; +++ vector unsigned long long b = {0x6C, 0x6C}; +++ vector unsigned long long c = {0x56, 0x56}; +++ vector unsigned long long ternlog_result = VSXTernaryLogic (a, b, c, 0xB6); +++ +++ if (ternlog_result[0] != 0xffffffffffffff3dull +++ || ternlog_result[1] != 0xffffffffffffff3eull) +++ __builtin_abort (); +++ +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/powerpc/pr111366.C ++@@ -0,0 +1,48 @@ +++/* { dg-do compile } */ +++/* Use -Wno-attributes to suppress the possible warning on always_inline. */ +++/* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */ +++ +++/* Verify it doesn't emit any error messages. */ +++ +++#include +++#define HWY_PRAGMA(tokens) _Pragma (#tokens) +++#define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str) +++__attribute__ ((always_inline)) void +++PreventElision () +++{ +++ asm(""); +++} +++#define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10") +++HWY_BEFORE_NAMESPACE () namespace detail +++{ +++ template struct CappedTagChecker +++ { +++ }; +++} +++template +++using CappedTag = detail::CappedTagChecker; +++template struct ForeachCappedR +++{ +++ static void Do (size_t, size_t) +++ { +++ CappedTag d; +++ Test () (int(), d); +++ } +++}; +++template struct ForPartialVectors +++{ +++ template void operator() (T) +++ { +++ ForeachCappedR::Do (1, 1); +++ } +++}; +++struct TestFloorLog2 +++{ +++ template void operator() (T, DF) { PreventElision (); } +++}; +++void +++TestAllFloorLog2 () +++{ +++ ForPartialVectors () (float()); +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/powerpc/pr111367.C ++@@ -0,0 +1,22 @@ +++/* { dg-do assemble } */ +++/* { dg-require-effective-target power10_ok } */ +++/* { dg-options "-mdejagnu-cpu=power10 -fstack-protector-strong" } */ +++ +++/* Verify object file can be generated successfully. */ +++ +++struct SortAscending +++{ +++}; +++ +++typedef unsigned long long size_t; +++ +++void VQSort (long long *, size_t, SortAscending); +++ +++void +++BenchAllColdSort () +++{ +++ typedef long long T; +++ constexpr size_t kSize = 10 * 1000; +++ alignas (16) T items[kSize]; +++ VQSort (items, kSize, SortAscending ()); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/powerpc/pr111828-1.C ++@@ -0,0 +1,49 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target powerpc_as_p10_htm } */ +++/* Use -Wno-attributes to suppress the possible warning on always_inline. */ +++/* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */ +++ +++/* Verify it doesn't emit any error messages. */ +++ +++#include +++#define HWY_PRAGMA(tokens) _Pragma (#tokens) +++#define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str) +++__attribute__ ((always_inline)) void +++PreventElision (int output) +++{ +++ asm("nop" : "+r"(output) : : "memory"); +++} +++#define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10") +++HWY_BEFORE_NAMESPACE () namespace detail +++{ +++ template struct CappedTagChecker +++ { +++ }; +++} +++template +++using CappedTag = detail::CappedTagChecker; +++template struct ForeachCappedR +++{ +++ static void Do (size_t, size_t) +++ { +++ CappedTag d; +++ Test () (int(), d); +++ } +++}; +++template struct ForPartialVectors +++{ +++ template void operator() (T) +++ { +++ ForeachCappedR::Do (1, 1); +++ } +++}; +++struct TestFloorLog2 +++{ +++ template void operator() (T, DF) { PreventElision (0x10); } +++}; +++void +++TestAllFloorLog2 () +++{ +++ ForPartialVectors () (float()); +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/g++.target/powerpc/pr111828-2.C ++@@ -0,0 +1,52 @@ +++/* { dg-do compile } */ +++/* { dg-skip-if "HTM inline asm supported" { powerpc_as_p10_htm } } */ +++/* Use -Wno-attributes to suppress the possible warning on always_inline. */ +++/* { dg-options "-O2 -mdejagnu-cpu=power9 -Wno-attributes" } */ +++ +++/* Verify it emits error messages on non-empty inline asm. */ +++ +++#include +++#define HWY_PRAGMA(tokens) _Pragma (#tokens) +++#define HWY_PUSH_ATTRIBUTES(targets_str) HWY_PRAGMA (GCC target targets_str) +++__attribute__ ((always_inline)) void +++PreventElision (int output) /* { dg-error "inlining failed in call to .* target specific option mismatch" } */ +++{ +++ asm("nop" : "+r"(output) : : "memory"); +++} +++#define HWY_BEFORE_NAMESPACE() HWY_PUSH_ATTRIBUTES (",cpu=power10") +++HWY_BEFORE_NAMESPACE () namespace detail +++{ +++ template struct CappedTagChecker +++ { +++ }; +++} +++template +++using CappedTag = detail::CappedTagChecker; +++template struct ForeachCappedR +++{ +++ static void Do (size_t, size_t) +++ { +++ CappedTag d; +++ Test () (int(), d); +++ } +++}; +++template struct ForPartialVectors +++{ +++ template void operator() (T) +++ { +++ ForeachCappedR::Do (1, 1); +++ } +++}; +++struct TestFloorLog2 +++{ +++ template void operator() (T, DF) +++ { +++ PreventElision (0x10); /* { dg-message "called from here" } */ +++ } +++}; +++void +++TestAllFloorLog2 () +++{ +++ ForPartialVectors () (float()); +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.c-torture/compile/asmgoto-6.c ++@@ -0,0 +1,26 @@ +++ +++/* { dg-do compile } */ +++/* PR middle-end/110420 */ +++/* PR middle-end/103979 */ +++/* PR middle-end/98619 */ +++/* Test that the middle-end does not remove the asm goto +++ with an output. */ +++ +++static int t; +++void g(void); +++ +++void f(void) +++{ +++ int __gu_val; +++ asm goto("#my asm " +++ : "=&r"(__gu_val) +++ : +++ : +++ : Efault); +++ t = __gu_val; +++ g(); +++Efault: +++} +++ +++/* Make sure "my asm " is still in the assembly. */ +++/* { dg-final { scan-assembler "my asm " } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.c-torture/compile/pr111699-1.c ++@@ -0,0 +1,7 @@ +++typedef unsigned char __attribute__((__vector_size__ (8))) V; +++ +++void +++foo (V *v) +++{ +++ *v = (V) 0x107B9A7FF >= (*v <= 0); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.c-torture/execute/20230630-1.c ++@@ -0,0 +1,23 @@ +++struct S { +++ short int i : 12; +++ char c1 : 1; +++ char c2 : 1; +++ char c3 : 1; +++ char c4 : 1; +++}; +++ +++int main (void) +++{ +++ struct S s0 = { 341, 1, 1, 1, 1 }; +++ char *p = (char *) &s0; +++ +++#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +++ if (*p != 85) +++ __builtin_abort (); +++#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ +++ if (*p != 21) +++ __builtin_abort (); +++#endif +++ +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.c-torture/execute/20230630-2.c ++@@ -0,0 +1,29 @@ +++#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +++#define REVERSE_SSO __attribute__((scalar_storage_order("big-endian"))); +++#else +++#define REVERSE_SSO __attribute__((scalar_storage_order("little-endian"))); +++#endif +++ +++struct S { +++ short int i : 12; +++ char c1 : 1; +++ char c2 : 1; +++ char c3 : 1; +++ char c4 : 1; +++} REVERSE_SSO; +++ +++int main (void) +++{ +++ struct S s0 = { 341, 1, 1, 1, 1 }; +++ char *p = (char *) &s0; +++ +++#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +++ if (*p != 21) +++ __builtin_abort (); +++#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ +++ if (*p != 85) +++ __builtin_abort (); +++#endif +++ +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.c-torture/execute/20230630-3.c ++@@ -0,0 +1,27 @@ +++struct S { +++ int i : 24; +++ char c1 : 1; +++ char c2 : 1; +++ char c3 : 1; +++ char c4 : 1; +++ char c5 : 1; +++ char c6 : 1; +++ char c7 : 1; +++ char c8 : 1; +++}; +++ +++int main (void) +++{ +++ struct S s0 = { 1193046, 1, 1, 1, 1, 1, 1, 1, 1 }; +++ char *p = (char *) &s0; +++ +++#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +++ if (*p != 86) +++ __builtin_abort (); +++#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ +++ if (*p != 18) +++ __builtin_abort (); +++#endif +++ +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.c-torture/execute/20230630-4.c ++@@ -0,0 +1,33 @@ +++#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +++#define REVERSE_SSO __attribute__((scalar_storage_order("big-endian"))); +++#else +++#define REVERSE_SSO __attribute__((scalar_storage_order("little-endian"))); +++#endif +++ +++struct S { +++ int i : 24; +++ char c1 : 1; +++ char c2 : 1; +++ char c3 : 1; +++ char c4 : 1; +++ char c5 : 1; +++ char c6 : 1; +++ char c7 : 1; +++ char c8 : 1; +++} REVERSE_SSO; +++ +++int main (void) +++{ +++ struct S s0 = { 1193046, 1, 1, 1, 1, 1, 1, 1, 1 }; +++ char *p = (char *) &s0; +++ +++#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +++ if (*p != 18) +++ __builtin_abort (); +++#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ +++ if (*p != 86) +++ __builtin_abort (); +++#endif +++ +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr109778.c ++@@ -0,0 +1,26 @@ +++/* PR tree-optimization/109778 */ +++ +++int a, b, c, d, *e = &c; +++ +++static inline unsigned +++foo (unsigned char x) +++{ +++ x = 1 | x << 1; +++ x = x >> 4 | x << 4; +++ return x; +++} +++ +++static inline void +++bar (unsigned x) +++{ +++ *e = 8 > foo (x + 86) - 86; +++} +++ +++int +++main () +++{ +++ d = a && b; +++ bar (d + 4); +++ if (c != 1) +++ __builtin_abort (); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr110914.c ++@@ -0,0 +1,22 @@ +++/* PR tree-optimization/110914 */ +++ +++__attribute__ ((noipa)) int +++foo (const char *s, unsigned long l) +++{ +++ unsigned char r = 0; +++ __builtin_memcpy (&r, s, l != 0); +++ return r; +++} +++ +++int +++main () +++{ +++ const char *p = "123456"; +++ int a = foo (p, __builtin_strlen (p) - 5); +++ int b = foo (p, __builtin_strlen (p) - 6); +++ if (a != '1') +++ __builtin_abort (); +++ if (b != 0) +++ __builtin_abort (); +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr111408.c ++@@ -0,0 +1,26 @@ +++/* PR target/111408 */ +++ +++int a, b, c, d; +++short e; +++ +++int +++foo () +++{ +++ c = a % (sizeof (int) * 8); +++ if (b & 1 << c) +++ return -1; +++ return 0; +++} +++ +++int +++main () +++{ +++ for (; e != 1; e++) +++ { +++ int g = foo (); +++ if (g + d - 9 + d) +++ continue; +++ for (;;) +++ __builtin_abort (); +++ } +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/Wfree-nonheap-object-7.c ++@@ -0,0 +1,26 @@ +++/* { dg-do compile } */ +++/* { dg-options "-O2 -Wfree-nonheap-object" } */ +++ +++struct local_caches *get_local_caches_lcs; +++void *calloc(long, long); +++void *realloc(); +++ +++struct local_caches { +++ int *t_mem_caches; +++}; +++ +++struct local_caches *get_local_caches() { +++ if (get_local_caches_lcs) +++ return get_local_caches_lcs; +++ get_local_caches_lcs = calloc(1, 0); +++ return get_local_caches_lcs; +++} +++ +++void libtrace_ocache_free() { +++ struct local_caches lcs = *get_local_caches(), __trans_tmp_1 = lcs; +++ { +++ struct local_caches *lcs = &__trans_tmp_1; +++ lcs->t_mem_caches += 10; +++ __trans_tmp_1.t_mem_caches = realloc(__trans_tmp_1.t_mem_caches, sizeof(int)); // { dg-warning "called on pointer (?:(?!PHI).)*nonzero offset" } +++ } +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr111080.c ++@@ -0,0 +1,18 @@ +++/* { dg-do compile } */ +++/* { dg-options "-save-temps -gdwarf-3 -dA" } */ +++ +++struct foo { +++ int field_number_1; +++ int field_number_2; +++ int field_number_3; +++ int field_number_4; +++ int field_number_5; +++}; +++ +++typedef int fun_t(struct foo *restrict); +++ +++int main() { +++ return 0; +++} +++ +++/* { dg-final { scan-assembler-not "DW_TAG_structure_type" } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/lto/pr109778_0.c ++@@ -0,0 +1,22 @@ +++/* PR tree-optimization/109778 */ +++/* { dg-lto-do run } */ +++/* { dg-lto-options { "-O2 -flto" } } */ +++/* { dg-require-effective-target int32 } */ +++ +++int bar (int); +++ +++__attribute__((noipa)) int +++foo (int x) +++{ +++ x = bar (x); +++ x = (x << 16) | (int) ((unsigned) x >> 16); +++ return x & 0x10000000; +++} +++ +++int +++main () +++{ +++ if (foo (0) || foo (-1)) +++ __builtin_abort (); +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/lto/pr109778_1.c ++@@ -0,0 +1,7 @@ +++int +++bar (int x) +++{ +++ x &= 0x22222222; +++ x |= (int) 0xf1234567U; +++ return x; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/pr105660-1.c ++@@ -0,0 +1,13 @@ +++/* PR105660 +++ * { dg-do compile } +++ * { dg-options "-std=c17" } +++ */ +++ +++void gatherConservativeVars(int, int, int, int, int, int, int Hnvar, int, +++ int Hnyt, int Hnxyt, int, int Hstep, double[Hnyt], +++ double[Hnvar][Hstep][Hnxyt]); +++void gatherConservativeVars(int, int, int, int, int, int, int Hnvar, int, int Hnyt, +++ int Hnxyt, int, int Hstep, double[Hnyt], +++ double[Hnvar][Hstep][Hnxyt]); +++ +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/pr105660-2.c ++@@ -0,0 +1,12 @@ +++/* PR105660 +++ * { dg-do compile } +++ * { dg-options "-Wall -std=c17" } +++ */ +++ +++ +++struct bat_gen_conf_s; +++void batch_generator_create2(struct bat_gen_conf_s* config, int D, int N, const long bat_dims[D][N], const long tot_dims[D][N], const long tot_strs[D][N], const _Complex float* data[D]); +++void batch_generator_create2(struct bat_gen_conf_s* config, int D, int N, const long bat_dims[D][N], const long tot_dims[D][N], const long tot_strs[D][N], const _Complex float* data[D]); +++ +++ +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/pr110731.c ++@@ -0,0 +1,17 @@ +++/* PR tree-optimization/110731 */ +++/* { dg-do run { target int128 } } */ +++/* { dg-options "-O2" } */ +++ +++__int128 +++foo (void) +++{ +++ struct S { __int128 f : 119; } s = { ((__int128) -18014398509481984) << 64 }; +++ return s.f / 2; +++} +++ +++int +++main () +++{ +++ if (foo () != (((__int128) -9007199254740992) << 64)) +++ __builtin_abort (); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/pr111015.c ++@@ -0,0 +1,28 @@ +++/* PR tree-optimization/111015 */ +++/* { dg-do run { target int128 } } */ +++/* { dg-options "-O2" } */ +++ +++struct S { unsigned a : 4, b : 4; unsigned __int128 c : 70; } d; +++ +++__attribute__((noipa)) void +++foo (unsigned __int128 x, unsigned char y, unsigned char z) +++{ +++ d.a = y; +++ d.b = z; +++ d.c = x; +++} +++ +++int +++main () +++{ +++ foo (-1, 12, 5); +++ if (d.a != 12 +++ || d.b != 5 +++ || d.c != (-1ULL | (((unsigned __int128) 0x3f) << 64))) +++ __builtin_abort (); +++ foo (0x123456789abcdef0ULL | (((unsigned __int128) 26) << 64), 7, 11); +++ if (d.a != 7 +++ || d.b != 11 +++ || d.c != (0x123456789abcdef0ULL | (((unsigned __int128) 26) << 64))) +++ __builtin_abort (); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/pr112733.c ++@@ -0,0 +1,16 @@ +++/* PR middle-end/112733 */ +++/* { dg-do compile } */ +++/* { dg-options "-O2" } */ +++ +++signed char a, c; +++short b; +++ +++void +++foo (void) +++{ +++ signed char *e = &a; +++ c = foo != 0; +++ *e &= c; +++ for (; b; --b) +++ *e &= -128; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/pr112837.c ++@@ -0,0 +1,11 @@ +++/* PR target/112837 */ +++/* { dg-do compile } */ +++/* { dg-options "-fcompare-elim -fprofile" } */ +++/* { dg-additional-options "-fpie" { target pie } } */ +++/* { dg-require-profiling "-fprofile" } */ +++ +++void +++foo (int i) +++{ +++ foo (i); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/pr112845.c ++@@ -0,0 +1,9 @@ +++/* PR target/112845 */ +++/* { dg-do compile { target cet } } */ +++/* { dg-options "-Os -fcf-protection" } */ +++ +++unsigned long long +++foo (void) +++{ +++ return 0xfa1e0ff3ULL << 3; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/pr113013.c ++@@ -0,0 +1,14 @@ +++/* PR tree-optimization/113013 */ +++/* { dg-do compile } */ +++/* { dg-options "-std=gnu99 -O2" } */ +++ +++struct S { short x; } s; +++void *foo () __attribute__((__alloc_size__(1))); +++struct S *p; +++ +++__SIZE_TYPE__ +++bar (void) +++{ +++ p = foo (s); +++ return __builtin_dynamic_object_size (p, 0); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/rtl/aarch64/pr111411.c ++@@ -0,0 +1,57 @@ +++/* { dg-do compile { target aarch64*-*-* } } */ +++/* { dg-require-effective-target lp64 } */ +++/* { dg-options "-O -fdisable-rtl-postreload -fpeephole2 -fno-schedule-fusion" } */ +++ +++extern int data[]; +++ +++void __RTL (startwith ("ira")) foo (void *ptr) +++{ +++ (function "foo" +++ (param "ptr" +++ (DECL_RTL (reg/v:DI <0> [ ptr ])) +++ (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ])) +++ ) ;; param "ptr" +++ (insn-chain +++ (block 2 +++ (edge-from entry (flags "FALLTHRU")) +++ (cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK) +++ (insn 4 (set (reg:DI <0>) (reg:DI x0))) +++ (insn 5 (set (reg:DI <1>) +++ (plus:DI (reg:DI <0>) (const_int 768)))) +++ (insn 6 (set (mem:SI (plus:DI (reg:DI <0>) +++ (const_int 508)) [1 &data+508 S4 A4]) +++ (const_int 0))) +++ (insn 7 (set (mem:SI (plus:DI (reg:DI <1>) +++ (const_int -256)) [1 &data+512 S4 A4]) +++ (const_int 0))) +++ (edge-to exit (flags "FALLTHRU")) +++ ) ;; block 2 +++ ) ;; insn-chain +++ ) ;; function +++} +++ +++void __RTL (startwith ("ira")) bar (void *ptr) +++{ +++ (function "bar" +++ (param "ptr" +++ (DECL_RTL (reg/v:DI <0> [ ptr ])) +++ (DECL_RTL_INCOMING (reg/v:DI x0 [ ptr ])) +++ ) ;; param "ptr" +++ (insn-chain +++ (block 2 +++ (edge-from entry (flags "FALLTHRU")) +++ (cnote 3 [bb 2] NOTE_INSN_BASIC_BLOCK) +++ (insn 4 (set (reg:DI <0>) (reg:DI x0))) +++ (insn 5 (set (reg:DI <1>) +++ (plus:DI (reg:DI <0>) (const_int 768)))) +++ (insn 6 (set (mem:SI (plus:DI (reg:DI <1>) +++ (const_int -256)) [1 &data+512 S4 A4]) +++ (const_int 0))) +++ (insn 7 (set (mem:SI (plus:DI (reg:DI <0>) +++ (const_int 508)) [1 &data+508 S4 A4]) +++ (const_int 0))) +++ (edge-to exit (flags "FALLTHRU")) +++ ) ;; block 2 +++ ) ;; insn-chain +++ ) ;; function +++} ++--- a/src/gcc/testsuite/gcc.dg/tls/pr78796.c +++++ b/src/gcc/testsuite/gcc.dg/tls/pr78796.c ++@@ -1,7 +1,7 @@ ++ /* PR target/78796 */ ++ /* { dg-do run } */ ++ /* { dg-options "-O2" } */ ++-/* { dg-additional-options "-mcmodel=large" { target aarch64-*-* } } */ +++/* { dg-additional-options "-mcmodel=large -fno-pie -no-pie" { target aarch64-*-* } } */ ++ /* { dg-require-effective-target tls_runtime } */ ++ /* { dg-add-options tls } */ ++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/torture/pr110298.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++ +++int a, b, c, d, e; +++int f() { +++ c = 0; +++ for (; c >= 0; c--) { +++ d = 0; +++ for (; d <= 0; d++) { +++ e = 0; +++ for (; d + c + e >= 0; e--) +++ ; +++ a = 1; +++ b = 0; +++ for (; a; ++b) +++ a *= 2; +++ for (; b + d >= 0;) +++ return 0; +++ } +++ } +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/torture/pr110556.c ++@@ -0,0 +1,42 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target lp64 } */ +++/* { dg-additional-options "-fno-tree-fre -fno-delete-dead-exceptions -fnon-call-exceptions" } */ +++ +++typedef __INT32_TYPE__ int32_t; +++typedef __INT64_TYPE__ int64_t; +++ +++static int64_t __attribute__((noinline,noclone)) +++safe_mul_func_int64_t_s_s(int64_t si1, int64_t si2) +++{ +++ return ((((si1 > 0) && (si2 > 0) && (si1 > ( (9223372036854775807L) / si2))) +++ || ((si1 > 0) && (si2 <= 0) && (si2 < ( (-9223372036854775807L -1) / si1))) +++ || ((si1 <= 0) && (si2 > 0) && (si1 < ( (-9223372036854775807L -1) / si2))) +++ || ((si1 <= 0) && (si2 <= 0) && (si1 != 0) && (si2 < ( (9223372036854775807L) / si1)))) +++ ? ((si1)) : si1 * si2); +++} +++ +++static int32_t g_93 = 0x947A4BBFL; +++static int32_t tt = 6; +++int64_t ty, ty1; +++ +++static void func_34(void) +++{ +++ ty=safe_mul_func_int64_t_s_s (g_93, -1L) ; +++} +++static void func_30(void) +++{ +++ ty1=safe_mul_func_int64_t_s_s(0, tt); +++} +++static void func_6(void) +++{ +++ for (int g_9 = 5; (g_9 >= 0); g_9 -= 1) +++ { +++ func_34(); +++ func_30 (); +++ } +++} +++ +++int main () +++{ +++ func_6(); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/torture/pr110702.c ++@@ -0,0 +1,31 @@ +++/* { dg-do run } */ +++ +++void abort (void); +++ +++int a, b, c, d; +++long e[9][7][4]; +++ +++void f() +++{ +++ for (; a >= 0; a--) +++ { +++ b = 0; +++ for (; b <= 3; b++) +++ { +++ c = 0; +++ for (; c <= 3; c++) +++ { +++ int *g = &d; +++ *g = e[0][0][b] | e[a][b][a]; +++ } +++ } +++ } +++} +++ +++int main() +++{ +++ f(); +++ if (a != -1) +++ abort (); +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/torture/pr111137.c ++@@ -0,0 +1,30 @@ +++/* { dg-do run } */ +++ +++int b[3][8]; +++short d; +++volatile int t = 1; +++ +++void __attribute__((noipa)) +++foo() +++{ +++ int g = t; +++ for (int e = 1; e >= 0; e--) +++ { +++ d = 1; +++ for (; d >= 0; d--) +++ { +++ b[0][d * 2 + 1] = 0; +++ b[g - 1 + d][0] ^= 1; +++ b[0][d * 2 + 2] = 0; +++ b[g - 1 + d][1] ^= 1; +++ } +++ } +++} +++ +++int +++main() +++{ +++ foo (); +++ if (b[0][1] != 1) +++ __builtin_abort(); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/torture/pr111445.c ++@@ -0,0 +1,29 @@ +++/* { dg-do run } */ +++ +++extern void abort (void); +++short a, b; +++unsigned char c = 255; +++unsigned cnt; +++void __attribute__((noipa)) +++check (int x) +++{ +++ if (x != 0) +++ abort (); +++ cnt++; +++} +++int main() +++{ +++ int d; +++ unsigned char e; +++ d = 0; +++ for (; a >= 0; a--) { +++ int *f = &d; +++ *f = c; +++ } +++ e = 0; +++ for (; (unsigned char)(d - 255) + e <= 1; e++) +++ check (b); +++ if (cnt != 2) +++ abort (); +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/torture/pr111614.c ++@@ -0,0 +1,23 @@ +++/* { dg-do compile } */ +++ +++int a, b, c, d, e; +++static void f() { +++ int *g = &b; +++ b = 1; +++ for (; b >= 0; b--) { +++ c = 0; +++ for (; c <= 1; c++) +++ e = 0; +++ for (; e <= 1; e++) { +++ int h, i = h = 13; +++ for (; h; h--) +++ i = i << a; +++ d &= i + c + 9 + *g; +++ } +++ } +++} +++int main() { +++ f(); +++ for (;;) +++ ; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/torture/pr111815.c ++@@ -0,0 +1,26 @@ +++/* { dg-do run } */ +++ +++char x[] = { +++ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, +++ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, +++}; +++ +++__attribute__ ((noinline)) char * +++p (char *a, int o, int i) +++{ +++ return a + ++o + (1 << ++i); +++} +++ +++int +++main (void) +++{ +++ if (*p (x, 0, 0) != 3) +++ return 1; +++ if (*p (x, 1, 2) != 10) +++ return 1; +++ if (*p (x, 2, 1) != 7) +++ return 1; +++ if (*p (x, 3, 3) != 20) +++ return 1; +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/torture/pr111818.c ++@@ -0,0 +1,11 @@ +++/* { dg-do compile } */ +++ +++static void foo(const volatile unsigned int x, void *p) +++{ +++ __builtin_memcpy(p, (void *)&x, sizeof x); +++} +++ +++void bar(void *number) +++{ +++ foo(0, number); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/torture/pr111917.c ++@@ -0,0 +1,23 @@ +++/* { dg-do compile } */ +++/* { dg-additional-options "-funswitch-loops" } */ +++ +++long t; +++long a() { +++ long b = t, c = t; +++ for (; b < 31; b++) +++ c <<= 1; +++ return c; +++} +++long t1; +++static +++int d() { +++ if (!t1) +++ return 0; +++e: +++f: +++ for (; a();) +++ ; +++ goto f; +++ return 0; +++} +++int main() { d(); } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr111967.c ++@@ -0,0 +1,15 @@ +++/* PR tree-optimization/111967 */ +++/* { dg-do compile } */ +++/* { dg-options "-O2 -fno-tree-forwprop -fdump-tree-evrp-all" } */ +++ +++void bar (char *); +++int a; +++char *b; +++ +++void +++foo (void) +++{ +++ long c = a & 3; +++ if (c) +++ bar (b + c); +++} ++--- a/src/gcc/testsuite/gcc.dg/vect/pr108950.c +++++ b/src/gcc/testsuite/gcc.dg/vect/pr108950.c ++@@ -1,5 +1,5 @@ ++-/* { dg-require-effective-target vect_simd_clones } */ ++ /* { dg-do compile } */ +++/* { dg-require-effective-target vect_simd_clones } */ ++ ++ int m; ++ short int n; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.dg/vect/pr111764.c ++@@ -0,0 +1,16 @@ +++#include "tree-vect.h" +++ +++short b = 2; +++ +++int main() +++{ +++ check_vect (); +++ +++ for (int a = 1; a <= 9; a++) +++ b = b * b; +++ if (b != 0) +++ __builtin_abort (); +++ +++ return 0; +++} +++ ++--- a/src/gcc/testsuite/gcc.dg/vect/pr97428.c +++++ b/src/gcc/testsuite/gcc.dg/vect/pr97428.c ++@@ -1,4 +1,5 @@ ++ /* { dg-do compile } */ +++/* { dg-require-effective-target vect_double } */ ++ ++ typedef struct { double re, im; } dcmlx_t; ++ typedef struct { double re[4], im[4]; } dcmlx4_t; ++--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp +++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp ++@@ -27,7 +27,7 @@ if { ![istarget aarch64*-*-*] } then { ++ ++ torture-init ++ set-torture-options $C_TORTURE_OPTIONS ++-set additional_flags "-W -Wall -Wno-abi" +++set additional_flags "-W -Wall -Wno-abi -fno-pie -no-pie" ++ ++ # Test parameter passing. This uses abitest.S which relies on weak ++ # symbols. ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/ls64_lto.c ++@@ -0,0 +1,10 @@ +++/* { dg-do link { target aarch64_asm_ls64_ok } } */ +++/* { dg-additional-options "-march=armv8.7-a -flto" } */ +++#include +++int main(void) +++{ +++ data512_t d = __arm_ld64b ((const void *)0x1000); +++ __arm_st64b ((void *)0x2000, d); +++ uint64_t x = __arm_st64bv ((void *)0x3000, d); +++ x += __arm_st64bv0 ((void *)0x4000, d); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c ++@@ -0,0 +1,7 @@ +++/* { dg-do compile } */ +++/* { dg-options "-march=armv8.7-a -O2" } */ +++#include +++void do_st64b(data512_t data) { +++ __arm_st64b((void*)0x10000000, data); +++} +++/* { dg-final { scan-assembler {mov\tx([123])?[0-9], 268435456} } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/pr110132.c ++@@ -0,0 +1,15 @@ +++/* { dg-do compile } */ +++/* { dg-additional-options "-march=armv8.7-a" } */ +++ +++/* Check that ls64 builtins can be invoked using a preprocesed testcase +++ without triggering bogus builtin warnings, see PR110132. +++ +++ Note that this is purely to test GCC internals and user code should +++ include arm_acle.h to make use of these builtins. */ +++ +++#pragma GCC aarch64 "arm_acle.h" +++typedef __arm_data512_t data512_t; +++void f(void *p, data512_t d) +++{ +++ __arm_st64b (p, d); +++} ++--- a/src/gcc/testsuite/gcc.target/aarch64/auto-init-7.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/auto-init-7.c ++@@ -1,6 +1,6 @@ ++ /* Verify zero initialization for array, union, and structure type automatic variables. */ ++ /* { dg-do compile } */ ++-/* { dg-options "-ftrivial-auto-var-init=zero -fdump-rtl-expand" } */ +++/* { dg-options "-ftrivial-auto-var-init=zero -fdump-rtl-expand -fno-stack-protector" } */ ++ ++ struct S ++ { ++--- a/src/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c ++@@ -1,6 +1,6 @@ ++ /* { dg-do compile } */ ++ /* { dg-require-effective-target aarch64_small } */ ++-/* { dg-options "-O3 -mcpu=cortex-a57" } */ +++/* { dg-options "-O3 -mcpu=cortex-a57 -fno-pie" } */ ++ ++ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, ++ XGRF_REGS, ALL_REGS, LIM_REG_CLASSES }; ++--- a/src/gcc/testsuite/gcc.target/aarch64/mops_4.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/mops_4.c ++@@ -50,6 +50,54 @@ copy3 (int *x, int *y, long z, long *res) ++ *res = z; ++ } ++ +++/* +++** move1: +++** mov (x[0-9]+), x0 +++** cpyp \[\1\]!, \[x1\]!, x2! +++** cpym \[\1\]!, \[x1\]!, x2! +++** cpye \[\1\]!, \[x1\]!, x2! +++** str x0, \[x3\] +++** ret +++*/ +++void +++move1 (int *x, int *y, long z, int **res) +++{ +++ __builtin_memmove (x, y, z); +++ *res = x; +++} +++ +++/* +++** move2: +++** mov (x[0-9]+), x1 +++** cpyp \[x0\]!, \[\1\]!, x2! +++** cpym \[x0\]!, \[\1\]!, x2! +++** cpye \[x0\]!, \[\1\]!, x2! +++** str x1, \[x3\] +++** ret +++*/ +++void +++move2 (int *x, int *y, long z, int **res) +++{ +++ __builtin_memmove (x, y, z); +++ *res = y; +++} +++ +++/* +++** move3: +++** mov (x[0-9]+), x2 +++** cpyp \[x0\]!, \[x1\]!, \1! +++** cpym \[x0\]!, \[x1\]!, \1! +++** cpye \[x0\]!, \[x1\]!, \1! +++** str x2, \[x3\] +++** ret +++*/ +++void +++move3 (int *x, int *y, long z, long *res) +++{ +++ __builtin_memmove (x, y, z); +++ *res = z; +++} +++ ++ /* ++ ** set1: ++ ** mov (x[0-9]+), x0 ++--- a/src/gcc/testsuite/gcc.target/aarch64/pr103147-10.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/pr103147-10.c ++@@ -1,4 +1,4 @@ ++-/* { dg-options "-O2 -fpack-struct -mstrict-align" } */ +++/* { dg-options "-O2 -fpack-struct -mstrict-align -fno-stack-protector" } */ ++ /* { dg-final { check-function-bodies "**" "" "" } } */ ++ ++ #include ++--- a/src/gcc/testsuite/gcc.target/aarch64/pr104005.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/pr104005.c ++@@ -1,4 +1,4 @@ ++-/* { dg-options "-O2 -funroll-loops" } */ +++/* { dg-options "-O2 -funroll-loops -fno-stack-protector" } */ ++ ++ typedef int v2 __attribute__((vector_size(8))); ++ ++--- a/src/gcc/testsuite/gcc.target/aarch64/pr63304_1.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/pr63304_1.c ++@@ -1,6 +1,6 @@ ++ /* { dg-do assemble } */ ++ /* { dg-require-effective-target lp64 } */ ++-/* { dg-options "-O1 --save-temps" } */ +++/* { dg-options "-O1 --save-temps -fno-pie" } */ ++ #pragma GCC push_options ++ #pragma GCC target ("+nothing+simd,cmodel=small") ++ ++--- a/src/gcc/testsuite/gcc.target/aarch64/pr70120-2.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/pr70120-2.c ++@@ -1,6 +1,6 @@ ++ /* { dg-do compile } */ ++ /* { dg-require-effective-target lp64 } */ ++-/* { dg-options "-Og -freorder-functions -g3 -mcmodel=large" } */ +++/* { dg-options "-Og -freorder-functions -g3 -mcmodel=large -fno-pie" } */ ++ ++ typedef short v32u16 __attribute__ ((vector_size (32))); ++ typedef int v32u32 __attribute__ ((vector_size (32))); ++--- a/src/gcc/testsuite/gcc.target/aarch64/pr78733.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/pr78733.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads" } */ +++/* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads -fno-pie" } */ ++ /* { dg-require-effective-target lp64 } */ ++ /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* } { "-fpic" } { "" } } */ ++ ++--- a/src/gcc/testsuite/gcc.target/aarch64/pr79041-2.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/pr79041-2.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads" } */ +++/* { dg-options "-O2 -mcmodel=large -mpc-relative-literal-loads -fno-pie" } */ ++ /* { dg-require-effective-target lp64 } */ ++ /* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* } { "-fpic" } { "" } } */ ++ ++--- a/src/gcc/testsuite/gcc.target/aarch64/pr94530.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/pr94530.c ++@@ -1,6 +1,6 @@ ++ /* { dg-do compile } */ ++ /* { dg-require-effective-target lp64 } */ ++-/* { dg-options "-Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large" } */ +++/* { dg-options "-Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large -fno-pie" } */ ++ ++ extern void bar(const char *); ++ ++--- a/src/gcc/testsuite/gcc.target/aarch64/pr94577.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/pr94577.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-mcmodel=large -mabi=ilp32" } */ +++/* { dg-options "-mcmodel=large -mabi=ilp32 -fno-pie" } */ ++ ++ void ++ foo () ++--- a/src/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c ++@@ -1,6 +1,6 @@ ++ /* { dg-do compile } */ ++ /* { dg-require-effective-target lp64 } */ ++-/* { dg-options "-O2 -mcmodel=large -fno-builtin" } */ +++/* { dg-options "-O2 -mcmodel=large -fno-builtin -fno-pie" } */ ++ /* { dg-skip-if "-mcmodel=large -fPIC not currently supported" { aarch64-*-* } { "-fPIC" } { "" } } */ ++ ++ typedef long unsigned int size_t; ++--- a/src/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile { target { aarch64*-*-* } } } */ ++-/* { dg-options "-O2" } */ +++/* { dg-options "-O2 -fno-stack-protector" } */ ++ /* { dg-final { check-function-bodies "**" "" } } */ ++ ++ /* ++--- a/src/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-1.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables" } */ +++/* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables -fno-stack-protector" } */ ++ /* { dg-require-effective-target supports_stack_clash_protection } */ ++ ++ #define SIZE 128*1024 ++--- a/src/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-2.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables" } */ +++/* { dg-options "-O2 -fstack-clash-protection --param stack-clash-protection-guard-size=16 -funwind-tables -fno-stack-protector" } */ ++ /* { dg-require-effective-target supports_stack_clash_protection } */ ++ ++ #define SIZE 1280*1024 + 512 ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-17.c ++@@ -0,0 +1,55 @@ +++/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ +++ +++void f(int, ...); +++void g(); +++ +++/* +++** test1: +++** ... +++** str x30, \[sp\] +++** sub sp, sp, #1024 +++** cbnz w0, .* +++** bl g +++** ... +++*/ +++int test1(int z) { +++ __uint128_t x = 0; +++ int y[0x400]; +++ if (z) +++ { +++ f(0, 0, 0, 0, 0, 0, 0, &y, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); +++ } +++ g(); +++ return 1; +++} +++ +++/* +++** test2: +++** ... +++** str x30, \[sp\] +++** sub sp, sp, #1040 +++** str xzr, \[sp, #?1024\] +++** cbnz w0, .* +++** bl g +++** ... +++*/ +++int test2(int z) { +++ __uint128_t x = 0; +++ int y[0x400]; +++ if (z) +++ { +++ f(0, 0, 0, 0, 0, 0, 0, &y, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x); +++ } +++ g(); +++ return 1; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-18.c ++@@ -0,0 +1,100 @@ +++/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ +++ +++void f(int, ...); +++void g(); +++ +++/* +++** test1: +++** ... +++** str x30, \[sp\] +++** sub sp, sp, #4064 +++** str xzr, \[sp, #?1024\] +++** cbnz w0, .* +++** bl g +++** ... +++** str x26, \[sp, #?4128\] +++** ... +++*/ +++int test1(int z) { +++ __uint128_t x = 0; +++ int y[0x400]; +++ if (z) +++ { +++ asm volatile ("" ::: +++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); +++ f(0, 0, 0, 0, 0, 0, 0, &y, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x); +++ } +++ g(); +++ return 1; +++} +++ +++/* +++** test2: +++** ... +++** str x30, \[sp\] +++** sub sp, sp, #1040 +++** str xzr, \[sp, #?1024\] +++** cbnz w0, .* +++** bl g +++** ... +++*/ +++int test2(int z) { +++ __uint128_t x = 0; +++ int y[0x400]; +++ if (z) +++ { +++ asm volatile ("" ::: +++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); +++ f(0, 0, 0, 0, 0, 0, 0, &y, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x); +++ } +++ g(); +++ return 1; +++} +++ +++/* +++** test3: +++** ... +++** str x30, \[sp\] +++** sub sp, sp, #1024 +++** cbnz w0, .* +++** bl g +++** ... +++*/ +++int test3(int z) { +++ __uint128_t x = 0; +++ int y[0x400]; +++ if (z) +++ { +++ asm volatile ("" ::: +++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); +++ f(0, 0, 0, 0, 0, 0, 0, &y, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); +++ } +++ g(); +++ return 1; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-19.c ++@@ -0,0 +1,100 @@ +++/* { dg-options "-O2 -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ +++ +++void f(int, ...); +++void g(); +++ +++/* +++** test1: +++** ... +++** str x30, \[sp\] +++** sub sp, sp, #4064 +++** str xzr, \[sp, #?1024\] +++** cbnz w0, .* +++** bl g +++** ... +++** str x26, \[sp, #?4128\] +++** ... +++*/ +++int test1(int z) { +++ __uint128_t x = 0; +++ int y[0x400]; +++ if (z) +++ { +++ asm volatile ("" ::: +++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); +++ f(0, 0, 0, 0, 0, 0, 0, &y, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x); +++ } +++ g(); +++ return 1; +++} +++ +++/* +++** test2: +++** ... +++** str x30, \[sp\] +++** sub sp, sp, #1040 +++** str xzr, \[sp, #?1024\] +++** cbnz w0, .* +++** bl g +++** ... +++*/ +++int test2(int z) { +++ __uint128_t x = 0; +++ int y[0x400]; +++ if (z) +++ { +++ asm volatile ("" ::: +++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); +++ f(0, 0, 0, 0, 0, 0, 0, &y, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x); +++ } +++ g(); +++ return 1; +++} +++ +++/* +++** test3: +++** ... +++** str x30, \[sp\] +++** sub sp, sp, #1024 +++** cbnz w0, .* +++** bl g +++** ... +++*/ +++int test3(int z) { +++ __uint128_t x = 0; +++ int y[0x400]; +++ if (z) +++ { +++ asm volatile ("" ::: +++ "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"); +++ f(0, 0, 0, 0, 0, 0, 0, &y, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, +++ x, x, x, x, x, x, x, x, x, x, x, x, x, x, x, x); +++ } +++ g(); +++ return 1; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/stack-check-prologue-20.c ++@@ -0,0 +1,3 @@ +++/* { dg-options "-O2 -fstack-protector-all -fstack-clash-protection -fomit-frame-pointer --param stack-clash-protection-guard-size=12 -fsanitize=shadow-call-stack -ffixed-x18" } */ +++ +++#include "stack-check-prologue-19.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/stack-protector-8.c ++@@ -0,0 +1,95 @@ +++/* { dg-options " -O -fstack-protector-strong -mstack-protector-guard=sysreg -mstack-protector-guard-reg=tpidr2_el0 -mstack-protector-guard-offset=16" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ +++ +++void g(void *); +++__SVBool_t *h(void *); +++ +++/* +++** test1: +++** sub sp, sp, #288 +++** stp x29, x30, \[sp, #?272\] +++** add x29, sp, #?272 +++** mrs (x[0-9]+), tpidr2_el0 +++** ldr (x[0-9]+), \[\1, #?16\] +++** str \2, \[sp, #?264\] +++** mov \2, #?0 +++** add x0, sp, #?8 +++** bl g +++** ... +++** mrs .* +++** ... +++** bne .* +++** ... +++** ldp x29, x30, \[sp, #?272\] +++** add sp, sp, #?288 +++** ret +++** bl __stack_chk_fail +++*/ +++int test1() { +++ int y[0x40]; +++ g(y); +++ return 1; +++} +++ +++/* +++** test2: +++** stp x29, x30, \[sp, #?-16\]! +++** mov x29, sp +++** sub sp, sp, #1040 +++** mrs (x[0-9]+), tpidr2_el0 +++** ldr (x[0-9]+), \[\1, #?16\] +++** str \2, \[sp, #?1032\] +++** mov \2, #?0 +++** add x0, sp, #?8 +++** bl g +++** ... +++** mrs .* +++** ... +++** bne .* +++** ... +++** add sp, sp, #?1040 +++** ldp x29, x30, \[sp\], #?16 +++** ret +++** bl __stack_chk_fail +++*/ +++int test2() { +++ int y[0x100]; +++ g(y); +++ return 1; +++} +++ +++#pragma GCC target "+sve" +++ +++/* +++** test3: +++** stp x29, x30, \[sp, #?-16\]! +++** mov x29, sp +++** addvl sp, sp, #-18 +++** ... +++** str p4, \[sp\] +++** ... +++** sub sp, sp, #272 +++** mrs (x[0-9]+), tpidr2_el0 +++** ldr (x[0-9]+), \[\1, #?16\] +++** str \2, \[sp, #?264\] +++** mov \2, #?0 +++** add x0, sp, #?8 +++** bl h +++** ... +++** mrs .* +++** ... +++** bne .* +++** ... +++** add sp, sp, #?272 +++** ... +++** ldr p4, \[sp\] +++** ... +++** addvl sp, sp, #18 +++** ldp x29, x30, \[sp\], #?16 +++** ret +++** bl __stack_chk_fail +++*/ +++__SVBool_t test3() { +++ int y[0x40]; +++ return *h(y); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/stack-protector-9.c ++@@ -0,0 +1,33 @@ +++/* { dg-options "-O2 -mcpu=neoverse-v1 -fstack-protector-all" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ +++ +++/* +++** main: +++** ... +++** stp x29, x30, \[sp, #?-[0-9]+\]! +++** ... +++** sub sp, sp, #[0-9]+ +++** ... +++** str x[0-9]+, \[x29, #?-8\] +++** ... +++*/ +++int f(const char *); +++void g(void *); +++int main(int argc, char* argv[]) +++{ +++ int a; +++ int b; +++ char c[2+f(argv[1])]; +++ int d[0x100]; +++ char y; +++ +++ y=42; a=4; b=10; +++ c[0] = 'h'; c[1] = '\0'; +++ +++ c[f(argv[2])] = '\0'; +++ +++ __builtin_printf("%d %d\n%s\n", a, b, c); +++ g(d); +++ +++ return 0; +++} ++--- a/src/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp +++++ b/src/gcc/testsuite/gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp ++@@ -37,11 +37,12 @@ if ![info exists DEFAULT_CFLAGS] then { ++ # Initialize `dg'. ++ dg-init ++ ++-# Force SVE if we're not testing it already. +++# Force SVE if we're not testing it already. And, disable stack protector +++# to avoid test failures with --enable-default-ssp. ++ if { [check_effective_target_aarch64_sve] } { ++- set sve_flags "" +++ set sve_flags "-fno-stack-protector" ++ } else { ++- set sve_flags "-march=armv8.2-a+sve" +++ set sve_flags "-march=armv8.2-a+sve -fno-stack-protector" ++ } ++ ++ # Main loop. ++--- a/src/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/sve/pcs/stack_clash_3.c ++@@ -11,11 +11,10 @@ ++ ** mov x11, sp ++ ** ... ++ ** sub sp, sp, x13 ++-** str p4, \[sp\] ++ ** cbz w0, [^\n]* +++** str p4, \[sp\] ++ ** ... ++ ** ptrue p0\.b, all ++-** ldr p4, \[sp\] ++ ** addvl sp, sp, #1 ++ ** ldr x24, \[sp\], 32 ++ ** ret ++@@ -39,13 +38,12 @@ test_1 (int n) ++ ** mov x11, sp ++ ** ... ++ ** sub sp, sp, x13 ++-** str p4, \[sp\] ++ ** cbz w0, [^\n]* +++** str p4, \[sp\] ++ ** str p5, \[sp, #1, mul vl\] ++ ** str p6, \[sp, #2, mul vl\] ++ ** ... ++ ** ptrue p0\.b, all ++-** ldr p4, \[sp\] ++ ** addvl sp, sp, #1 ++ ** ldr x24, \[sp\], 32 ++ ** ret ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/aarch64/sve/pr109505.c ++@@ -0,0 +1,12 @@ +++/* PR tree-optimization/109505 */ +++/* { dg-do compile } */ +++/* { dg-options "-O2 -march=armv8.2-a+sve" } */ +++ +++#pragma GCC aarch64 "arm_sve.h" +++ +++unsigned long +++foo (unsigned long x) +++{ +++ unsigned long y = svcntb (); +++ return (x | 15) & y; +++} ++--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_17.c +++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_17.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-O2" } */ +++/* { dg-options "-O2 -fno-stack-protector" } */ ++ ++ /* Test reuse of stack adjustment temporaries. */ ++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/alpha/pr106966.c ++@@ -0,0 +1,13 @@ +++/* PR target/106906 */ +++/* { dg-do compile } */ +++/* { dg-options "-O2 -mbuild-constants" } */ +++ +++void +++do_console (unsigned short *vga) +++{ +++ vga[0] = 'H'; +++ vga[1] = 'e'; +++ vga[2] = 'l'; +++ vga[3] = 'l'; +++ vga[4] = 'o'; +++} ++--- a/src/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c +++++ b/src/gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c ++@@ -567,80 +567,80 @@ ++ contain back references). */ ++ /* ++ ** test_cde_vcx1q_mfloat16x8_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1q_mfloat32x4_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1q_muint8x16_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1q_muint16x8_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1q_muint32x4_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1q_muint64x2_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1q_mint8x16_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1q_mint16x8_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1q_mint32x4_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1q_mint64x2_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1t p0, q0, #32 ++ ** bx lr ++@@ -649,80 +649,80 @@ ++ ++ /* ++ ** test_cde_vcx1qa_mfloat16x8_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1qa_mfloat32x4_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1qa_muint8x16_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1qa_muint16x8_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1qa_muint32x4_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1qa_muint64x2_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1qa_mint8x16_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1qa_mint16x8_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1qa_mint32x4_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++ */ ++ /* ++ ** test_cde_vcx1qa_mint64x2_tintint: ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) ++-** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr P0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) +++** (?:vldr\.64 d0, \.L[0-9]*\n\tvldr\.64 d1, \.L[0-9]*\+8|vmsr p0, r2 @ movhi) ++ ** vpst ++ ** vcx1at p0, q0, #32 ++ ** bx lr ++@@ -731,8 +731,8 @@ ++ ++ /* ++ ** test_cde_vcx2q_mfloat16x8_tuint16x8_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -740,8 +740,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2q_mfloat16x8_tfloat32x4_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -749,8 +749,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2q_mfloat32x4_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -758,8 +758,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2q_mint64x2_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -767,8 +767,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2q_mint8x16_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -776,8 +776,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2q_muint16x8_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -785,8 +785,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2q_muint8x16_tint64x2_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -794,8 +794,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2q_muint8x16_tint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -803,8 +803,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2q_muint8x16_tuint16x8_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -812,8 +812,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2q_muint8x16_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2t p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -823,8 +823,8 @@ ++ ++ /* ++ ** test_cde_vcx2qa_mfloat16x8_tuint16x8_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -832,8 +832,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2qa_mfloat16x8_tfloat32x4_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -841,8 +841,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2qa_mfloat32x4_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -850,8 +850,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2qa_mint64x2_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -859,8 +859,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2qa_mint8x16_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -868,8 +868,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2qa_muint16x8_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -877,8 +877,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2qa_muint8x16_tint64x2_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -886,8 +886,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2qa_muint8x16_tint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -895,8 +895,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2qa_muint8x16_tuint16x8_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -904,8 +904,8 @@ ++ */ ++ /* ++ ** test_cde_vcx2qa_muint8x16_tuint8x16_tint: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r1 @ movhi) ++ ** vpst ++ ** vcx2at p0, (q[0-7]), q0, #32 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -915,8 +915,8 @@ ++ ++ /* ++ ** test_cde_vcx3q_muint8x16_tuint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -924,8 +924,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_mfloat16x8_tfloat16x8_tfloat16x8_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -933,8 +933,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_mfloat32x4_tuint64x2_tfloat16x8_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -942,8 +942,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_muint16x8_tuint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -951,8 +951,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_muint8x16_tuint16x8_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -960,8 +960,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_muint8x16_tuint8x16_tuint16x8_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -969,8 +969,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_mint8x16_tuint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -978,8 +978,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_muint8x16_tint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -987,8 +987,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_muint8x16_tuint8x16_tint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -996,8 +996,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_mint64x2_tuint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1005,8 +1005,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_muint8x16_tint64x2_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1014,8 +1014,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_muint8x16_tuint8x16_tint64x2_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1023,8 +1023,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3q_muint8x16_tint64x2_tint64x2_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3t p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1034,8 +1034,8 @@ ++ ++ /* ++ ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1043,8 +1043,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_mfloat16x8_tfloat16x8_tfloat16x8_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1052,8 +1052,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_mfloat32x4_tuint64x2_tfloat16x8_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1061,8 +1061,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_muint16x8_tuint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1070,8 +1070,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_muint8x16_tuint16x8_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1079,8 +1079,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_muint8x16_tuint8x16_tuint16x8_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1088,8 +1088,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_mint8x16_tuint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1097,8 +1097,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_muint8x16_tint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1106,8 +1106,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_muint8x16_tuint8x16_tint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1115,8 +1115,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_mint64x2_tuint8x16_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1124,8 +1124,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_muint8x16_tint64x2_tuint8x16_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1133,8 +1133,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_muint8x16_tuint8x16_tint64x2_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++@@ -1142,8 +1142,8 @@ ++ */ ++ /* ++ ** test_cde_vcx3qa_muint8x16_tint64x2_tint64x2_t: ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) ++-** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr P0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) +++** (?:vldr\.64 d(?:[02468]|1[024]), \.L[0-9]*\n\tvldr\.64 d(?:[13579]|1[135]), \.L[0-9]*\+8|vmsr p0, r0 @ movhi) ++ ** vpst ++ ** vcx3at p0, (q[0-7]), q0, q1, #15 ++ ** vmov q0, \1([[:space:]]+@ [^\n]*)? ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c ++@@ -0,0 +1,6 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#define __ARM_MVE_PRESERVE_USER_NAMESPACE +++#include ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** asrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64_t ++-asrl_reg (int64_t longval3, int32_t x) +++foo (int64_t value, int32_t shift) ++ { ++- return asrl (longval3, x); +++ return asrl (value, shift); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "asrl\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** lsll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint64_t ++-lsll_reg (uint64_t longval3, int32_t x) +++foo (uint64_t value, int32_t shift) ++ { ++- return lsll (longval3, x); +++ return lsll (value, shift); +++} +++ +++/* +++**foo1: +++** ... +++** lsll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint64_t +++foo1 (int32_t shift) +++{ +++ return lsll (1, shift); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "lsll\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c +++++ /dev/null ++@@ -1,47 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include ++-int8x16_t foo (int8x16_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-int16x8_t foo1 (int16x8_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-int32x4_t foo2 (int32x4_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-uint8x16_t foo3 (uint8x16_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-uint16x8_t foo4 (uint16x8_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-uint32x4_t foo5 (uint32x4_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-float16x8_t foo6 (float16x8_t a) ++-{ ++- return vaddq (a, (float16_t)23.6); ++-} ++-float32x4_t foo7 (float32x4_t a) ++-{ ++- return vaddq (a, (float32_t)23.46); ++-} ++-float16x8_t foo8 (float16x8_t a) ++-{ ++- return vaddq (a, 23.6); ++-} ++-float32x4_t foo9 (float32x4_t a) ++-{ ++- return vaddq (a, 23.46); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c ++@@ -0,0 +1,61 @@ +++/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +++/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -Wno-incompatible-pointer-types" { target c } } */ +++/* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -fpermissive" { target c++ } } */ +++#include "arm_mve.h" +++ +++float f1; +++double f2; +++float16_t f3; +++float32_t f4; +++__fp16 f5; +++#ifndef __cplusplus +++_Float16 f6; +++#endif +++ +++float16x8_t floatvec; +++ +++/* Test a few different supported ways of passing a scalar int value. +++The intrinsic vmulq was chosen arbitrarily, but it is representative of +++all intrinsics that take a non-const scalar value. */ +++void +++test_scalars (void) +++{ +++ /* Test a few different supported ways of passing a float value. */ +++ floatvec = vmulq(floatvec, 0.5); +++ floatvec = vmulq(floatvec, 0.5f); +++ floatvec = vmulq(floatvec, (__fp16) 0.5); +++ floatvec = vmulq(floatvec, f1); +++ floatvec = vmulq(floatvec, f2); +++ floatvec = vmulq(floatvec, f3); +++ floatvec = vmulq(floatvec, f4); +++ floatvec = vmulq(floatvec, f5); +++#ifndef __cplusplus +++ floatvec = vmulq(floatvec, f6); +++ floatvec = vmulq(floatvec, 0.15f16); +++ floatvec = vmulq(floatvec, (_Float16) 0.15); +++#endif +++} +++ +++/* Next, test a number of valid pointer overloads. */ +++void +++foo11 (__fp16 * addr, float16x8_t value) +++{ +++ vst1q (addr, value); +++} +++ +++#ifndef __cplusplus +++void +++foo12 (_Float16 * addr, float16x8_t value) +++{ +++ vst1q (addr, value); +++} +++#endif +++ +++void +++foo13 (float * addr, float32x4_t value) +++{ +++ vst1q (addr, value); +++} +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c ++@@ -0,0 +1,100 @@ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -Wno-incompatible-pointer-types" { target c } } */ +++/* { dg-additional-options "-O2 -Wno-pedantic -Wno-long-long -fpermissive" { target c++ } } */ +++#include "arm_mve.h" +++ +++int i1; +++short i2; +++long i3; +++long long i4; +++int8_t i5; +++int16_t i6; +++int32_t i7; +++int64_t i8; +++ +++int16x8_t intvec; +++ +++/* Test a few different supported ways of passing a scalar int value. +++The intrinsic vmulq was chosen arbitrarily, but it is representative of +++all intrinsics that take a non-const scalar value. */ +++void +++test_scalars (void) +++{ +++ intvec = vmulq(intvec, 2); +++ intvec = vmulq(intvec, (int32_t) 2); +++ intvec = vmulq(intvec, (short) 2); +++ intvec = vmulq(intvec, i1); +++ intvec = vmulq(intvec, i2); +++ intvec = vmulq(intvec, i3); +++ intvec = vmulq(intvec, i4); +++ intvec = vmulq(intvec, i5); +++ intvec = vmulq(intvec, i6); +++ intvec = vmulq(intvec, i7); +++ intvec = vmulq(intvec, i8); +++} +++ +++/* Next, test a number of valid pointer overloads. */ +++void +++foo1 (signed char * addr, int8x16_t value) +++{ +++ vst1q (addr, value); +++} +++ +++void +++foo2 (short * addr, int16x8_t value) +++{ +++ vst1q (addr, value); +++} +++ +++/* Glibc defines int32_t as 'int' while newlib defines it as 'long int'. +++ +++ Although these correspond to the same size, g++ complains when using the +++ 'wrong' version: +++ invalid conversion from 'long int*' to 'int32_t*' {aka 'int*'} [-fpermissive] +++ +++ The trick below is to make this test pass whether using glibc-based or +++ newlib-based toolchains. */ +++ +++#if defined(__GLIBC__) +++#define word_type int +++#else +++#define word_type long int +++#endif +++void +++foo3 (word_type * addr, int32x4_t value) +++{ +++ vst1q (addr, value); +++} +++ +++void +++foo5 (long long * addr, uint64x2_t value) +++{ +++ vldrdq_gather_offset (addr, value); +++} +++ +++void +++foo6 (unsigned char * addr, uint8x16_t value) +++{ +++ vst1q (addr, value); +++} +++ +++void +++foo7 (unsigned short * addr, uint16x8_t value) +++{ +++ vst1q (addr, value); +++} +++ +++void +++foo8 (unsigned word_type * addr, uint32x4_t value) +++{ +++ vst1q (addr, value); +++} +++ +++void +++foo10 (unsigned long long * addr, uint64x2_t value) +++{ +++ vldrdq_gather_offset (addr, value); +++} +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c +++++ /dev/null ++@@ -1,48 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include ++-mve_pred16_t p; ++- ++-int32x4_t fn1 (int32x4_t vecIdx) ++-{ ++- return vaddq_m(vuninitializedq_s32(), vecIdx, 1, p); ++-} ++- ++-int16x8_t fn2 (int16x8_t vecIdx) ++-{ ++- return vaddq_m(vuninitializedq_s16(), vecIdx, 1, p); ++-} ++- ++-int8x16_t fn3 (int8x16_t vecIdx) ++-{ ++- return vaddq_m(vuninitializedq_s8(), vecIdx, 1, p); ++-} ++- ++-uint32x4_t fn4 (uint32x4_t vecIdx) ++-{ ++- return vaddq_m(vuninitializedq_u32(), vecIdx, 1, p); ++-} ++- ++-uint16x8_t fn5 (uint16x8_t vecIdx) ++-{ ++- return vaddq_m(vuninitializedq_u16(), vecIdx, 1, p); ++-} ++- ++-uint8x16_t fn6 (uint8x16_t vecIdx) ++-{ ++- return vaddq_m(vuninitializedq_u8(), vecIdx, 1, p); ++-} ++- ++-float32x4_t fn7 (float32x4_t vecIdx) ++-{ ++- return vaddq_m(vuninitializedq_f32(), vecIdx, (float32_t) 1.23, p); ++-} ++- ++-float16x8_t fn8 (float16x8_t vecIdx) ++-{ ++- return vaddq_m(vuninitializedq_f16(), vecIdx, (float16_t) 1.40, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c +++++ /dev/null ++@@ -1,31 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include ++-int8x16_t foo (int8x16_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-int16x8_t foo1 (int16x8_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-int32x4_t foo2 (int32x4_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-uint8x16_t foo3 (uint8x16_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-uint16x8_t foo4 (uint16x8_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++-uint32x4_t foo5 (uint32x4_t a, int16_t b) ++-{ ++- return vaddq (a, (b<<3)); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint16x8_t ++-foo1 (uint16x8_t inactive, int32_t a, mve_pred16_t p) ++-{ ++- return vddupq_m (inactive, a, 1, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (uint32x4_t inactive, int32_t a, mve_pred16_t p) ++-{ ++- return vddupq_m (inactive, a, 4, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_m_n_u8.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint8x16_t ++-foo1 (uint8x16_t inactive, int32_t a, mve_pred16_t p) ++-{ ++- return vddupq_m (inactive, a, 4, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint16x8_t ++-foo1 (int32_t a) ++-{ ++- return vddupq_u16 (a, 4); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (int32_t a) ++-{ ++- return vddupq_u32 (a, 1); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_n_u8.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint8x16_t ++-foo1 (int32_t a) ++-{ ++- return vddupq_u8 (a, 1); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u16.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint16x8_t ++-foo1 (int32_t a, mve_pred16_t p) ++-{ ++- return vddupq_x_u16 (a, 1, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint32x4_t ++-foo1 (int32_t a, mve_pred16_t p) ++-{ ++- return vddupq_x_u32 (a, 4, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vddupq_x_n_u8.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint8x16_t ++-foo1 (int32_t a, mve_pred16_t p) ++-{ ++- return vddupq_x_u8 (a, 4, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint16x8_t ++-foo1 (int32_t a, uint32_t b, mve_pred16_t p) ++-{ ++- return vdwdupq_x_u16 (a, b, 1, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (int32_t a, uint32_t b, mve_pred16_t p) ++-{ ++- return vdwdupq_x_u32 (a, b, 4, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint8x16_t ++-foo1 (int32_t a, uint32_t b, mve_pred16_t p) ++-{ ++- return vdwdupq_x_u8 (a, b, 4, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint16x8_t ++-foo1 (uint16x8_t inactive, int32_t a, mve_pred16_t p) ++-{ ++- return vidupq_m (inactive, a, 4, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint32x4_t ++-foo1 (uint32x4_t inactive, int32_t a, mve_pred16_t p) ++-{ ++- return vidupq_m (inactive, a, 1, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_m_n_u8.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint8x16_t ++-foo1 (uint8x16_t inactive, int32_t a, mve_pred16_t p) ++-{ ++- return vidupq_m (inactive, a, 1, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint16x8_t ++-foo1 (int32_t a) ++-{ ++- return vidupq_u16 (a, 4); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint32x4_t ++-foo1 (int32_t a) ++-{ ++- return vidupq_u32 (a, 1); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_n_u8.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint8x16_t ++-foo1 (int32_t a) ++-{ ++- return vidupq_u8 (a, 1); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u16.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint16x8_t ++-foo1 (int32_t a, mve_pred16_t p) ++-{ ++- return vidupq_x_u16 (a, 4, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint32x4_t ++-foo1 (int32_t a, mve_pred16_t p) ++-{ ++- return vidupq_x_u32 (a, 1, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vidupq_x_n_u8.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint8x16_t ++-foo1 (int32_t a, mve_pred16_t p) ++-{ ++- return vidupq_x_u8 (a, 1, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint16x8_t ++-foo1 (int32_t a, uint32_t b, mve_pred16_t p) ++-{ ++- return viwdupq_x_u16 (a, b, 2, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (int32_t a, uint32_t b, mve_pred16_t p) ++-{ ++- return viwdupq_x_u32 (a, b, 4, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_viwdupq_x_n_u8.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint8x16_t ++-foo1 (int32_t a, uint32_t b, mve_pred16_t p) ++-{ ++- return viwdupq_x_u8 (a, b, 8, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_s64.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int64x2_t ++-foo1 (int64_t * base, uint64x2_t offset) ++-{ ++- return vldrdq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_u64.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint64x2_t ++-foo1 (uint64_t * base, uint64x2_t offset) ++-{ ++- return vldrdq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_s64.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int64x2_t ++-foo1 (int64_t * base, uint64x2_t offset, mve_pred16_t p) ++-{ ++- return vldrdq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_offset_z_u64.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint64x2_t ++-foo1 (uint64_t * base, uint64x2_t offset, mve_pred16_t p) ++-{ ++- return vldrdq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_s64.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int64x2_t ++-foo1 (int64_t * base, uint64x2_t offset) ++-{ ++- return vldrdq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_u64.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint64x2_t ++-foo1 (uint64_t * base, uint64x2_t offset) ++-{ ++- return vldrdq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_s64.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int64x2_t ++-foo1 (int64_t * base, uint64x2_t offset, mve_pred16_t p) ++-{ ++- return vldrdq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrdq_gather_shifted_offset_z_u64.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint64x2_t ++-foo1 (uint64_t * base, uint64x2_t offset, mve_pred16_t p) ++-{ ++- return vldrdq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_f16.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16_t * base, uint16x8_t offset) ++-{ ++- return vldrhq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s16.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int16x8_t ++-foo1 (int16_t * base, uint16x8_t offset) ++-{ ++- return vldrhq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_s32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int32x4_t ++-foo1 (int16_t * base, uint32x4_t offset) ++-{ ++- return vldrhq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u16.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint16x8_t ++-foo1 (uint16_t * base, uint16x8_t offset) ++-{ ++- return vldrhq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (uint16_t * base, uint32x4_t offset) ++-{ ++- return vldrhq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_f16.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16_t * base, uint16x8_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s16.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int16x8_t ++-foo1 (int16_t * base, uint16x8_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_s32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int32x4_t ++-foo1 (int16_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint16x8_t ++-foo1 (uint16_t * base, uint16x8_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_offset_z_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (uint16_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_f16.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16_t * base, uint16x8_t offset) ++-{ ++- return vldrhq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-int16x8_t ++-foo1 (int16_t * base, uint16x8_t offset) ++-{ ++- return vldrhq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_s32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-int32x4_t ++-foo1 (int16_t * base, uint32x4_t offset) ++-{ ++- return vldrhq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint16x8_t ++-foo1 (uint16_t * base, uint16x8_t offset) ++-{ ++- return vldrhq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (uint16_t * base, uint32x4_t offset) ++-{ ++- return vldrhq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_f16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16_t * base, uint16x8_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler "vldrht.f16" } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s16.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int16x8_t ++-foo1 (int16_t * base, uint16x8_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler "vldrht.u16" } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_s32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-int32x4_t ++-foo1 (int16_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u16.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint16x8_t ++-foo1 (uint16_t * base, uint16x8_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrhq_gather_shifted_offset_z_u32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-uint32x4_t ++-foo1 (uint16_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrhq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_f32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32_t * base, uint32x4_t offset) ++-{ ++- return vldrwq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_s32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-int32x4_t ++-foo1 (int32_t * base, uint32x4_t offset) ++-{ ++- return vldrwq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (uint32_t * base, uint32x4_t offset) ++-{ ++- return vldrwq_gather_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_f32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrwq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_s32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-int32x4_t ++-foo1 (int32_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrwq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_offset_z_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (uint32_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrwq_gather_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_f32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32_t * base, uint32x4_t offset) ++-{ ++- return vldrwq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_s32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-int32x4_t ++-foo1 (int32_t * base, uint32x4_t offset) ++-{ ++- return vldrwq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (uint32_t * base, uint32x4_t offset) ++-{ ++- return vldrwq_gather_shifted_offset (base, offset); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_f32.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrwq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_s32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-int32x4_t ++-foo1 (int32_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrwq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldrwq_gather_shifted_offset_z_u32.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++-/* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-uint32x4_t ++-foo1 (uint32_t * base, uint32x4_t offset, mve_pred16_t p) ++-{ ++- return vldrwq_gather_shifted_offset_z (base, offset, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset.c +++++ /dev/null ++@@ -1,141 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-int ++-foowu32( uint32_t * pDataSrc, uint32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- uint32x4_t vecIn1 = vldrwq_u32 ((uint32_t const *) pDataSrc); ++- uint32x4_t vecIn2 = vldrwq_u32 ((uint32_t const *) &pDataSrc[4]); ++- vstrwq_scatter_shifted_offset_u32 (pDataDest, vecOffs1, vecIn1); ++- vstrwq_scatter_shifted_offset_u32 (pDataDest, vecOffs2, vecIn2); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foowf32( float32_t * pDataSrc, float32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- float32x4_t vecIn1 = vldrwq_f32 ((float32_t const *) pDataSrc); ++- float32x4_t vecIn2 = vldrwq_f32 ((float32_t const *) &pDataSrc[4]); ++- vstrwq_scatter_shifted_offset_f32 (pDataDest, vecOffs1, vecIn1); ++- vstrwq_scatter_shifted_offset_f32 (pDataDest, vecOffs2, vecIn2); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foohu16( uint16_t * pDataSrc, uint16_t * pDataDest) ++-{ ++- const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5}; ++- const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14}; ++- uint16x8_t vecIn1 = vldrhq_u16 ((uint16_t const *) pDataSrc); ++- uint16x8_t vecIn2 = vldrhq_u16 ((uint16_t const *) &pDataSrc[8]); ++- vstrhq_scatter_shifted_offset_u16 (pDataDest, vecOffs1, vecIn1); ++- vstrhq_scatter_shifted_offset_u16 (pDataDest, vecOffs2, vecIn2); ++- pDataDest[16] = pDataSrc[16]; ++- return 0; ++-} ++- ++-int ++-foohu32( uint32_t * pDataSrc, uint32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- uint32x4_t vecIn1 = vldrhq_u32 ((uint16_t const *) pDataSrc); ++- uint32x4_t vecIn2 = vldrhq_u32 ((uint16_t const *) &pDataSrc[4]); ++- vstrhq_scatter_shifted_offset_u32 ((uint16_t *)pDataDest, vecOffs1, vecIn1); ++- vstrhq_scatter_shifted_offset_u32 ((uint16_t *)pDataDest, vecOffs2, vecIn2); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foohf16( float16_t * pDataSrc, float16_t * pDataDest) ++-{ ++- const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5}; ++- const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14}; ++- float16x8_t vecIn1 = vldrhq_f16 ((float16_t const *) pDataSrc); ++- float16x8_t vecIn2 = vldrhq_f16 ((float16_t const *) &pDataSrc[8]); ++- vstrhq_scatter_shifted_offset_f16 (pDataDest, vecOffs1, vecIn1); ++- vstrhq_scatter_shifted_offset_f16 (pDataDest, vecOffs2, vecIn2); ++- pDataDest[16] = pDataSrc[16]; ++- return 0; ++-} ++- ++-int ++-foodu64( uint64_t * pDataSrc, uint64_t * pDataDest) ++-{ ++- const uint64x2_t vecOffs1 = { 0, 1}; ++- const uint64x2_t vecOffs2 = { 2, 3}; ++- uint32x4_t vecIn1 = vldrwq_u32 ((uint32_t const *) pDataSrc); ++- uint32x4_t vecIn2 = vldrwq_u32 ((uint32_t const *) &pDataSrc[2]); ++- ++- vstrdq_scatter_shifted_offset_u64 (pDataDest, vecOffs1, (uint64x2_t) vecIn1); ++- vstrdq_scatter_shifted_offset_u64 (pDataDest, vecOffs2, (uint64x2_t) vecIn2); ++- ++- pDataDest[2] = pDataSrc[2]; ++- return 0; ++-} ++- ++-int ++-foows32( int32_t * pDataSrc, int32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- int32x4_t vecIn1 = vldrwq_s32 ((int32_t const *) pDataSrc); ++- int32x4_t vecIn2 = vldrwq_s32 ((int32_t const *) &pDataSrc[4]); ++- vstrwq_scatter_shifted_offset_s32 (pDataDest, vecOffs1, vecIn1); ++- vstrwq_scatter_shifted_offset_s32 (pDataDest, vecOffs2, vecIn2); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foohs16( int16_t * pDataSrc, int16_t * pDataDest) ++-{ ++- const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5}; ++- const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14}; ++- int16x8_t vecIn1 = vldrhq_s16 ((int16_t const *) pDataSrc); ++- int16x8_t vecIn2 = vldrhq_s16 ((int16_t const *) &pDataSrc[8]); ++- vstrhq_scatter_shifted_offset_s16 (pDataDest, vecOffs1, vecIn1); ++- vstrhq_scatter_shifted_offset_s16 (pDataDest, vecOffs2, vecIn2); ++- pDataDest[16] = pDataSrc[16]; ++- return 0; ++-} ++- ++-int ++-foohs32( int32_t * pDataSrc, int32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- int32x4_t vecIn1 = vldrhq_s32 ((int16_t const *) pDataSrc); ++- int32x4_t vecIn2 = vldrhq_s32 ((int16_t const *) &pDataSrc[4]); ++- vstrhq_scatter_shifted_offset_s32 ((int16_t *)pDataDest, vecOffs1, vecIn1); ++- vstrhq_scatter_shifted_offset_s32 ((int16_t *)pDataDest, vecOffs2, vecIn2); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foods64( int64_t * pDataSrc, int64_t * pDataDest) ++-{ ++- const uint64x2_t vecOffs1 = { 0, 1}; ++- const uint64x2_t vecOffs2 = { 2, 3}; ++- int32x4_t vecIn1 = vldrwq_s32 ((int32_t const *) pDataSrc); ++- int32x4_t vecIn2 = vldrwq_s32 ((int32_t const *) &pDataSrc[2]); ++- ++- vstrdq_scatter_shifted_offset_s64 (pDataDest, vecOffs1, (int64x2_t) vecIn1); ++- vstrdq_scatter_shifted_offset_s64 (pDataDest, vecOffs2, (int64x2_t) vecIn2); ++- ++- pDataDest[2] = pDataSrc[2]; ++- return 0; ++-} ++- ++-/* { dg-final { scan-assembler-times "vstr\[a-z\]" 20 } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_shifted_offset_p.c +++++ /dev/null ++@@ -1,142 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++- ++-mve_pred16_t __p; ++-int ++-foowu32( uint32_t * pDataSrc, uint32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- uint32x4_t vecIn1 = vldrwq_z_u32 ((uint32_t const *) pDataSrc, __p); ++- uint32x4_t vecIn2 = vldrwq_z_u32 ((uint32_t const *) &pDataSrc[4], __p); ++- vstrwq_scatter_shifted_offset_p_u32 (pDataDest, vecOffs1, vecIn1, __p); ++- vstrwq_scatter_shifted_offset_p_u32 (pDataDest, vecOffs2, vecIn2, __p); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foowf32( float32_t * pDataSrc, float32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- float32x4_t vecIn1 = vldrwq_z_f32 ((float32_t const *) pDataSrc, __p); ++- float32x4_t vecIn2 = vldrwq_z_f32 ((float32_t const *) &pDataSrc[4], __p); ++- vstrwq_scatter_shifted_offset_p_f32 (pDataDest, vecOffs1, vecIn1, __p); ++- vstrwq_scatter_shifted_offset_p_f32 (pDataDest, vecOffs2, vecIn2, __p); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foohu16( uint16_t * pDataSrc, uint16_t * pDataDest) ++-{ ++- const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5}; ++- const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14}; ++- uint16x8_t vecIn1 = vldrhq_z_u16 ((uint16_t const *) pDataSrc, __p); ++- uint16x8_t vecIn2 = vldrhq_z_u16 ((uint16_t const *) &pDataSrc[8], __p); ++- vstrhq_scatter_shifted_offset_p_u16 (pDataDest, vecOffs1, vecIn1, __p); ++- vstrhq_scatter_shifted_offset_p_u16 (pDataDest, vecOffs2, vecIn2, __p); ++- pDataDest[16] = pDataSrc[16]; ++- return 0; ++-} ++- ++-int ++-foohu32( uint32_t * pDataSrc, uint32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- uint32x4_t vecIn1 = vldrhq_z_u32 ((uint16_t const *) pDataSrc, __p); ++- uint32x4_t vecIn2 = vldrhq_z_u32 ((uint16_t const *) &pDataSrc[4], __p); ++- vstrhq_scatter_shifted_offset_p_u32 ((uint16_t *)pDataDest, vecOffs1, vecIn1, __p); ++- vstrhq_scatter_shifted_offset_p_u32 ((uint16_t *)pDataDest, vecOffs2, vecIn2, __p); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foohf16( float16_t * pDataSrc, float16_t * pDataDest) ++-{ ++- const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5}; ++- const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14}; ++- float16x8_t vecIn1 = vldrhq_z_f16 ((float16_t const *) pDataSrc, __p); ++- float16x8_t vecIn2 = vldrhq_z_f16 ((float16_t const *) &pDataSrc[8], __p); ++- vstrhq_scatter_shifted_offset_p_f16 (pDataDest, vecOffs1, vecIn1, __p); ++- vstrhq_scatter_shifted_offset_p_f16 (pDataDest, vecOffs2, vecIn2, __p); ++- pDataDest[16] = pDataSrc[16]; ++- return 0; ++-} ++- ++-int ++-foodu64( uint64_t * pDataSrc, uint64_t * pDataDest) ++-{ ++- const uint64x2_t vecOffs1 = { 0, 1}; ++- const uint64x2_t vecOffs2 = { 2, 3}; ++- uint32x4_t vecIn1 = vldrwq_z_u32 ((uint32_t const *) pDataSrc, __p); ++- uint32x4_t vecIn2 = vldrwq_z_u32 ((uint32_t const *) &pDataSrc[2], __p); ++- ++- vstrdq_scatter_shifted_offset_p_u64 (pDataDest, vecOffs1, (uint64x2_t) vecIn1, __p); ++- vstrdq_scatter_shifted_offset_p_u64 (pDataDest, vecOffs2, (uint64x2_t) vecIn2, __p); ++- ++- pDataDest[2] = pDataSrc[2]; ++- return 0; ++-} ++- ++-int ++-foows32( int32_t * pDataSrc, int32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- int32x4_t vecIn1 = vldrwq_z_s32 ((int32_t const *) pDataSrc, __p); ++- int32x4_t vecIn2 = vldrwq_z_s32 ((int32_t const *) &pDataSrc[4], __p); ++- vstrwq_scatter_shifted_offset_p_s32 (pDataDest, vecOffs1, vecIn1, __p); ++- vstrwq_scatter_shifted_offset_p_s32 (pDataDest, vecOffs2, vecIn2, __p); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foohs16( int16_t * pDataSrc, int16_t * pDataDest) ++-{ ++- const uint16x8_t vecOffs1 = { 0, 3, 6, 1, 4, 7, 2, 5}; ++- const uint16x8_t vecOffs2 = { 9, 11, 13, 10, 12, 15, 8, 14}; ++- int16x8_t vecIn1 = vldrhq_z_s16 ((int16_t const *) pDataSrc, __p); ++- int16x8_t vecIn2 = vldrhq_z_s16 ((int16_t const *) &pDataSrc[8], __p); ++- vstrhq_scatter_shifted_offset_p_s16 (pDataDest, vecOffs1, vecIn1, __p); ++- vstrhq_scatter_shifted_offset_p_s16 (pDataDest, vecOffs2, vecIn2, __p); ++- pDataDest[16] = pDataSrc[16]; ++- return 0; ++-} ++- ++-int ++-foohs32( int32_t * pDataSrc, int32_t * pDataDest) ++-{ ++- const uint32x4_t vecOffs1 = { 0, 3, 6, 1}; ++- const uint32x4_t vecOffs2 = { 4, 7, 2, 5}; ++- int32x4_t vecIn1 = vldrhq_z_s32 ((int16_t const *) pDataSrc, __p); ++- int32x4_t vecIn2 = vldrhq_z_s32 ((int16_t const *) &pDataSrc[4], __p); ++- vstrhq_scatter_shifted_offset_p_s32 ((int16_t *)pDataDest, vecOffs1, vecIn1, __p); ++- vstrhq_scatter_shifted_offset_p_s32 ((int16_t *)pDataDest, vecOffs2, vecIn2, __p); ++- pDataDest[8] = pDataSrc[8]; ++- return 0; ++-} ++- ++-int ++-foods64( int64_t * pDataSrc, int64_t * pDataDest) ++-{ ++- const uint64x2_t vecOffs1 = { 0, 1}; ++- const uint64x2_t vecOffs2 = { 2, 3}; ++- int32x4_t vecIn1 = vldrwq_z_s32 ((int32_t const *) pDataSrc, __p); ++- int32x4_t vecIn2 = vldrwq_z_s32 ((int32_t const *) &pDataSrc[2], __p); ++- ++- vstrdq_scatter_shifted_offset_p_s64 (pDataDest, vecOffs1, (int64x2_t) vecIn1, __p); ++- vstrdq_scatter_shifted_offset_p_s64 (pDataDest, vecOffs2, (int64x2_t) vecIn2, __p); ++- ++- pDataDest[2] = pDataSrc[2]; ++- return 0; ++-} ++- ++-/* { dg-final { scan-assembler-times "vstr\[a-z\]t" 20 } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** sqrshr (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32_t ++-sqrshr_reg (int32_t longval3, int32_t x) +++foo (int32_t value, int32_t shift) ++ { ++- return sqrshr (longval3, x); +++ return sqrshr (value, shift); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "sqrshr\\tr\[0-9\]+, r\[0-9\]+" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** sqrshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64_t ++-sqrshrl_reg (int64_t longval3, int32_t x) +++foo (int64_t value, int32_t shift) ++ { ++- return sqrshrl_sat48 (longval3, x); +++ return sqrshrl_sat48 (value, shift); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "sqrshrl\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** sqshl (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-sqshl_imm (int32_t longval3) +++foo (int32_t value) ++ { ++- return sqshl (longval3, 25); +++ return sqshl (value, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "sqshl\\tr\[0-9\]+, #25" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** sqshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-sqshll_imm(int64_t value) +++foo (int64_t value) ++ { ++- return sqshll (value, 21); +++ return sqshll (value, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "sqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** srshr (?:ip|fp|r[0-9]+), #1(?: @.*|) +++** ... +++*/ ++ int32_t ++-srshr_imm (int32_t longval3) +++foo (int32_t value) ++ { ++- return srshr (longval3, 25); +++ return srshr (value, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "srshr\\tr\[0-9\]+, #25" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** srshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?: @.*|) +++** ... +++*/ ++ int64_t ++-srshrl_imm(int64_t value) +++foo (int64_t value) ++ { ++- return srshrl (value, 21); +++ return srshrl (value, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "srshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** uqrshl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32_t ++-uqrshl_reg (uint32_t longval3, int32_t x) +++foo (uint32_t value, int32_t shift) ++ { ++- return uqrshl (longval3, x); +++ return uqrshl (value, shift); +++} +++ +++/* +++**foo1: +++** ... +++** uqrshl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32_t +++foo1 (int32_t shift) +++{ +++ return uqrshl (1, shift); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "uqrshl\\tr\[0-9\]+, r\[0-9\]+" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** uqrshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint64_t ++-uqrshll_reg (uint64_t longval3, int32_t x) +++foo (uint64_t value, int32_t shift) ++ { ++- return uqrshll_sat48 (longval3, x); +++ return uqrshll_sat48 (value, shift); +++} +++ +++/* +++**foo1: +++** ... +++** uqrshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint64_t +++foo1 (int32_t shift) +++{ +++ return uqrshll_sat48 (1, shift); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "uqrshll\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** uqshl (?:ip|fp|r[0-9]+), #1(?: @.*|) +++** ... +++*/ ++ uint32_t ++-uqshl_imm (uint32_t longval3) +++foo (uint32_t value) ++ { ++- return uqshl (longval3, 21); +++ return uqshl (value, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "uqshl\\tr\[0-9\]+, #21" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** uqshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?: @.*|) +++** ... +++*/ ++ uint64_t ++-uqshll_imm(uint64_t value) +++foo (uint64_t value) ++ { ++- return uqshll (value, 21); +++ return uqshll (value, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "uqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-uint64_t ++-urshr_imm (uint32_t longval3) +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** urshr (?:ip|fp|r[0-9]+), #1(?: @.*|) +++** ... +++*/ +++uint32_t +++foo (uint32_t value) +++{ +++ return urshr (value, 1); +++} +++ +++/* +++**foo1: +++** ... +++** urshr (?:ip|fp|r[0-9]+), #1(?: @.*|) +++** ... +++*/ +++uint32_t +++foo1 () ++ { ++- return urshr (longval3, 21); +++ return urshr (1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "urshr\\tr\[0-9\]+, #21" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** urshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?: @.*|) +++** ... +++*/ ++ uint64_t ++-urshrl_imm(uint64_t value) +++foo (uint64_t value) ++ { ++- return urshrl (value, 21); +++ return urshrl (value, 1); +++} +++ +++/* +++**foo1: +++** ... +++** urshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #1(?: @.*|) +++** ... +++*/ +++uint64_t +++foo1 () +++{ +++ return urshrl (1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "urshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vabavq_p_s16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vabavq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.s16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int16x8_t b, int16x8_t c, mve_pred16_t p) +++{ +++ return vabavq_p (1, b, c, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vabavq_p_s32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vabavq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.s32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int32x4_t b, int32x4_t c, mve_pred16_t p) +++{ +++ return vabavq_p (1, b, c, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) ++ { ++ return vabavq_p_s8 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) ++ { ++ return vabavq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.s8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int8x16_t b, int8x16_t c, mve_pred16_t p) +++{ +++ return vabavq_p (1, b, c, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p) ++ { ++ return vabavq_p_u16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p) ++ { ++ return vabavq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint16x8_t b, uint16x8_t c, mve_pred16_t p) +++{ +++ return vabavq_p (1, b, c, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) ++ { ++ return vabavq_p_u32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) ++ { ++ return vabavq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p) +++{ +++ return vabavq_p (1, b, c, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p) ++ { ++ return vabavq_p_u8 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p) ++ { ++ return vabavq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vabavt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabavt.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint8x16_t b, uint8x16_t c, mve_pred16_t p) +++{ +++ return vabavq_p (1, b, c, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int16x8_t b, int16x8_t c) ++ { ++ return vabavq_s16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vabav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int16x8_t b, int16x8_t c) ++ { ++ return vabavq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.s16" } } */ +++/* +++**foo2: +++** ... +++** vabav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int16x8_t b, int16x8_t c) +++{ +++ return vabavq (1, b, c); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int32x4_t b, int32x4_t c) ++ { ++ return vabavq_s32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vabav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int32x4_t b, int32x4_t c) ++ { ++ return vabavq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.s32" } } */ +++/* +++**foo2: +++** ... +++** vabav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int32x4_t b, int32x4_t c) +++{ +++ return vabavq (1, b, c); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int8x16_t b, int8x16_t c) ++ { ++ return vabavq_s8 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vabav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int8x16_t b, int8x16_t c) ++ { ++ return vabavq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.s8" } } */ +++/* +++**foo2: +++** ... +++** vabav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int8x16_t b, int8x16_t c) +++{ +++ return vabavq (1, b, c); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabav.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint16x8_t b, uint16x8_t c) ++ { ++ return vabavq_u16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vabav.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint16x8_t b, uint16x8_t c) ++ { ++ return vabavq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.u16" } } */ +++/* +++**foo2: +++** ... +++** vabav.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint16x8_t b, uint16x8_t c) +++{ +++ return vabavq (1, b, c); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabav.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint32x4_t b, uint32x4_t c) ++ { ++ return vabavq_u32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vabav.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint32x4_t b, uint32x4_t c) ++ { ++ return vabavq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.u32" } } */ +++/* +++**foo2: +++** ... +++** vabav.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint32x4_t b, uint32x4_t c) +++{ +++ return vabavq (1, b, c); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabav.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint8x16_t b, uint8x16_t c) ++ { ++ return vabavq_u8 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vabav.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint8x16_t b, uint8x16_t c) ++ { ++ return vabavq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vabav.u8" } } */ +++/* +++**foo2: +++** ... +++** vabav.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint8x16_t b, uint8x16_t c) +++{ +++ return vabavq (1, b, c); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabd.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vabdq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vabd.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vabdq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabd.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vabdq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vabd.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vabdq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vabdq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vabdq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vabdq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vabdq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vabdq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vabd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vabdq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vabdq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vabd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vabdq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vabdq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vabd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vabdq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vabdq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vabd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vabdq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vabdq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vabd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vabdq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vabdq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vabd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vabdq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vabd.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vabdq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vabdq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vabdq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vabdq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vabdq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabdt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabdt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vabdq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabs.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vabsq_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vabs.f16" } } */ +++ +++/* +++**foo1: +++** ... +++** vabs.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vabsq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabs.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a) ++ { ++ return vabsq_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vabs.f32" } } */ +++ +++/* +++**foo1: +++** ... +++** vabs.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a) +++{ +++ return vabsq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vabsq_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vabsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vabsq_m_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vabsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vabsq_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vabsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vabsq_m_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vabsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vabsq_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vabsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabs.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vabsq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vabs.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vabs.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vabsq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vabs.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabs.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vabsq_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vabs.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vabs.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vabsq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vabs.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vabs.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vabsq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vabs.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vabs.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vabsq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vabs.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vabsq_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vabsq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vabsq_x_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, mve_pred16_t p) ++ { ++ return vabsq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vabsq_x_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vabsq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vabsq_x_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vabsq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vabsq_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vabst.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vabst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vabsq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c ++@@ -1,23 +1,57 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p) +++foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p) ++ { ++ return vadciq_m_s32 (inactive, a, b, carry_out, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vadcit.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p) +++foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p) ++ { ++ return vadciq_m (inactive, a, b, carry_out, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vadcit.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c ++@@ -1,23 +1,57 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p) +++foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p) ++ { ++ return vadciq_m_u32 (inactive, a, b, carry_out, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vadcit.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p) +++foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p) ++ { ++ return vadciq_m (inactive, a, b, carry_out, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vadcit.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, unsigned * carry_out) +++foo (int32x4_t a, int32x4_t b, unsigned *carry_out) ++ { ++ return vadciq_s32 (a, b, carry_out); ++ } ++ ++-/* { dg-final { scan-assembler "vadci.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, unsigned * carry_out) +++foo1 (int32x4_t a, int32x4_t b, unsigned *carry_out) ++ { ++ return vadciq (a, b, carry_out); ++ } ++ ++-/* { dg-final { scan-assembler "vadci.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32x4_t b, unsigned * carry_out) +++foo (uint32x4_t a, uint32x4_t b, unsigned *carry_out) ++ { ++ return vadciq_u32 (a, b, carry_out); ++ } ++ ++-/* { dg-final { scan-assembler "vadci.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry_out) +++foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry_out) ++ { ++ return vadciq (a, b, carry_out); ++ } ++ ++-/* { dg-final { scan-assembler "vadci.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c ++@@ -1,23 +1,77 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p) +++foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p) ++ { ++ return vadcq_m_s32 (inactive, a, b, carry, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vadct.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p) +++foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p) ++ { ++ return vadcq_m (inactive, a, b, carry, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vadct.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c ++@@ -1,23 +1,77 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p) +++foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p) ++ { ++ return vadcq_m_u32 (inactive, a, b, carry, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vadct.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p) +++foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p) ++ { ++ return vadcq_m (inactive, a, b, carry, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vadct.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c ++@@ -1,21 +1,69 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, unsigned * carry) +++foo (int32x4_t a, int32x4_t b, unsigned *carry) ++ { ++ return vadcq_s32 (a, b, carry); ++ } ++ ++-/* { dg-final { scan-assembler "vadc.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, unsigned * carry) +++foo1 (int32x4_t a, int32x4_t b, unsigned *carry) ++ { ++ return vadcq (a, b, carry); ++ } ++ ++-/* { dg-final { scan-assembler "vadc.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c ++@@ -1,21 +1,69 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32x4_t b, unsigned * carry) +++foo (uint32x4_t a, uint32x4_t b, unsigned *carry) ++ { ++ return vadcq_u32 (a, b, carry); ++ } ++ ++-/* { dg-final { scan-assembler "vadc.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry) +++foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry) ++ { ++ return vadcq (a, b, carry); ++ } ++ ++-/* { dg-final { scan-assembler "vadc.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddlvat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vaddlvaq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlvat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddlvat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vaddlvaq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlvat.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddlvat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo (uint64_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vaddlvaq_p_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlvat.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddlvat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo1 (uint64_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vaddlvaq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlvat.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddlvat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint64_t +++foo2 (uint32x4_t b, mve_pred16_t p) +++{ +++ return vaddlvaq_p (1, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddlva.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b) ++ { ++ return vaddlvaq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlva.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddlva.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b) ++ { ++ return vaddlvaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlva.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddlva.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo (uint64_t a, uint32x4_t b) ++ { ++ return vaddlvaq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlva.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddlva.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo1 (uint64_t a, uint32x4_t b) ++ { ++ return vaddlvaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlva.u32" } } */ +++/* +++**foo2: +++** ... +++** vaddlva.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint64_t +++foo2 (uint32x4_t b) +++{ +++ return vaddlvaq (1, b); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddlvt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vaddlvq_p_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlvt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddlvt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vaddlvq_p (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlvt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddlvt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++ return vaddlvq_p_u32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlvt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddlvt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++ return vaddlvq_p (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlvt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddlv.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a) ++ { ++ return vaddlvq_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlv.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddlv.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a) ++ { ++- return vaddlvq_s32 (a); +++ return vaddlvq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vaddlv.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddlv.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo (uint32x4_t a) ++ { ++- return vaddlvq_u32 (a); +++ return vaddlvq_u32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vaddlv.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddlv.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo1 (uint32x4_t a) ++ { ++- return vaddlvq (a); +++ return vaddlvq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vaddlv.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vaddq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vaddq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vaddq_m (inactive, a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vaddq_m_n_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) +++{ +++ return vaddq_m (inactive, a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vaddq_m (inactive, a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vaddq_m_n_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) +++{ +++ return vaddq_m (inactive, a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vaddq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vaddq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vaddq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vaddq_m_n_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) +++{ +++ return vaddq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vaddq_m_n_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) +++{ +++ return vaddq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vaddq_m_n_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) +++{ +++ return vaddq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vaddq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vaddq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16_t b) ++ { ++ return vaddq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.f16" } } */ +++/* +++**foo2: +++** ... +++** vadd.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t a) +++{ +++ return vaddq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32_t b) ++ { ++ return vaddq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.f32" } } */ +++/* +++**foo2: +++** ... +++** vadd.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t a) +++{ +++ return vaddq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vaddq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vaddq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vaddq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vaddq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i16" } } */ +++/* +++**foo2: +++** ... +++** vadd.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a) +++{ +++ return vaddq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vaddq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i32" } } */ +++/* +++**foo2: +++** ... +++** vadd.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a) +++{ +++ return vaddq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vaddq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i8" } } */ +++/* +++**foo2: +++** ... +++** vadd.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a) +++{ +++ return vaddq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vaddq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vaddq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vaddq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vaddq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vaddq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vaddq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vadd.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vadd.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vaddq_x (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vaddq_x_n_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vaddq_x (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vaddq_x (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vaddq_x_n_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.f32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t a, mve_pred16_t p) +++{ +++ return vaddq_x (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vaddq_x_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vaddq_x_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vaddq_x_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vaddq_x_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vaddq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vaddq_x_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vaddq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vaddq_x_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vaddq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vaddq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vaddq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint16x8_t b, mve_pred16_t p) +++{ +++ return vaddvaq_p (1, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint32x4_t b, mve_pred16_t p) +++{ +++ return vaddvaq_p (1, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vaddvaq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvat.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvat.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint8x16_t b, mve_pred16_t p) +++{ +++ return vaddvaq_p (1, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddva.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int16x8_t b) ++ { ++ return vaddvaq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddva.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int16x8_t b) ++ { ++ return vaddvaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddva.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b) ++ { ++ return vaddvaq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddva.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b) ++ { ++ return vaddvaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddva.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int8x16_t b) ++ { ++ return vaddvaq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddva.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int8x16_t b) ++ { ++ return vaddvaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddva.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint16x8_t b) ++ { ++ return vaddvaq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddva.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint16x8_t b) ++ { ++ return vaddvaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.u16" } } */ +++/* +++**foo2: +++** ... +++** vaddva.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint16x8_t b) +++{ +++ return vaddvaq (1, b); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddva.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint32x4_t b) ++ { ++ return vaddvaq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddva.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint32x4_t b) ++ { ++ return vaddvaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.u32" } } */ +++/* +++**foo2: +++** ... +++** vaddva.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint32x4_t b) +++{ +++ return vaddvaq (1, b); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddva.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint8x16_t b) ++ { ++ return vaddvaq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddva.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint8x16_t b) ++ { ++ return vaddvaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vaddva.u8" } } */ +++/* +++**foo2: +++** ... +++** vaddva.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint8x16_t b) +++{ +++ return vaddvaq (1, b); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vaddvq_p_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vaddvq_p (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vaddvq_p_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vaddvq_p (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vaddvq_p_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vaddvq_p (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vaddvq_p_u16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vaddvq_p (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++ return vaddvq_p_u32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++ return vaddvq_p (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++ return vaddvq_p_u8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vaddvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint8x16_t a, mve_pred16_t p) ++ { ++ return vaddvq_p (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vaddvt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int16x8_t a) ++ { ++ return vaddvq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vaddv.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int16x8_t a) ++ { ++- return vaddvq_s16 (a); +++ return vaddvq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vaddv.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32x4_t a) ++ { ++ return vaddvq_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vaddv.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32x4_t a) ++ { ++- return vaddvq_s32 (a); +++ return vaddvq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vaddv.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int8x16_t a) ++ { ++ return vaddvq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vaddv.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int8x16_t a) ++ { ++ return vaddvq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vaddv.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint16x8_t a) ++ { ++- return vaddvq_u16 (a); +++ return vaddvq_u16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vaddv.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint16x8_t a) ++ { ++- return vaddvq (a); +++ return vaddvq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vaddv.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32x4_t a) ++ { ++- return vaddvq_u32 (a); +++ return vaddvq_u32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vaddv.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32x4_t a) ++ { ++- return vaddvq (a); +++ return vaddvq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vaddv.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vaddv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint8x16_t a) ++ { ++- return vaddvq_u8 (a); +++ return vaddvq_u8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vaddv.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vaddv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint8x16_t a) ++ { ++- return vaddvq (a); +++ return vaddvq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vaddv.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vandq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ ++ +++/* +++**foo1: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vandq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vandq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ ++ +++/* +++**foo1: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vandq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vandq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vandq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vandq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vandq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vandq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vandq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vandq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vandq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vandq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vandq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vandq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vandq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vandq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vandq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vandq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vandq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vandq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ ++ +++/* +++**foo1: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vandq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vandq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ ++ +++/* +++**foo1: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vandq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vandq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ ++ +++/* +++**foo1: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vandq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vandq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ ++ +++/* +++**foo1: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vandq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vandq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ ++ +++/* +++**foo1: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vandq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vandq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ ++ +++/* +++**foo1: +++** ... +++** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vandq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vand" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vandq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vandq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vandq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vandq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vandq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vandq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vandq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vandq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vandq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vandq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vandq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vandq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vandq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vandq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vandq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vandt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vandq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vbicq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ ++ +++/* +++**foo1: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vbicq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vbicq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ ++ +++/* +++**foo1: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vbicq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++- return vbicq_m_n_s16 (a, 16, p); +++ return vbicq_m_n_s16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++- return vbicq_m_n (a, 16, p); +++ return vbicq_m_n (a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vbicq_m_n_s32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vbicq_m_n (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vbicq_m_n_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vbicq_m_n (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++ return vbicq_m_n_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++ return vbicq_m_n (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vbicq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vbicq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vbicq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vbicq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vbicq_n_s16 (a, 1); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vbicq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler-times "vbic.i16" 2 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vbicq_n_s32 (a, 1); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vbicq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler-times "vbic.i32" 2 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++ return vbicq_n_u16 (a, 1); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a) ++ { ++ return vbicq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler-times "vbic.i16" 2 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a) ++ { ++ return vbicq_n_u32 (a, 1); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a) ++ { ++ return vbicq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler-times "vbic.i32" 2 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vbicq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ ++ +++/* +++**foo1: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vbicq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vbicq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ ++ +++/* +++**foo1: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vbicq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vbicq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ ++ +++/* +++**foo1: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vbicq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vbicq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ ++ +++/* +++**foo1: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vbicq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vbicq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ ++ +++/* +++**foo1: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vbicq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vbicq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ ++ +++/* +++**foo1: +++** ... +++** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vbicq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbic" } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vbicq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vbicq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vbicq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vbicq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vbicq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbict" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vbicq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m_n_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m_n_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m_n_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m_n_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m_n_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, int32_t b) ++ { ++ return vbrsrq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, int32_t b) ++ { ++ return vbrsrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, int32_t b) ++ { ++ return vbrsrq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, int32_t b) ++ { ++ return vbrsrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b) ++ { ++ return vbrsrq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b) ++ { ++ return vbrsrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vbrsrq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vbrsrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b) ++ { ++ return vbrsrq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b) ++ { ++ return vbrsrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b) ++ { ++ return vbrsrq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b) ++ { ++ return vbrsrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b) ++ { ++ return vbrsrq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b) ++ { ++ return vbrsrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b) ++ { ++ return vbrsrq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b) ++ { ++ return vbrsrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vbrsr.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x_n_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x_n_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vbrsrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vbrsrt.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcaddq_rot270_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcaddq_rot270_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vcaddq_rot270_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vcaddq_rot270_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vcaddq_rot270_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vcaddq_rot270_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vcaddq_rot270_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vcaddq_rot270_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcaddq_rot90_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcaddq_rot90_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vcaddq_rot90_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vcaddq_rot90_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vcaddq_rot90_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vcaddq_rot90_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vcaddq_rot90_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vcaddq_rot90_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcadd.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcaddt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vclsq_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclst.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vclsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vclsq_m_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclst.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vclsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vclsq_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclst.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vclsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcls.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vclsq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcls.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcls.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vclsq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcls.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcls.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vclsq_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcls.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcls.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vclsq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcls.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcls.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vclsq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcls.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcls.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vclsq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcls.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vclsq_x_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclst.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vclsq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vclsq_x_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclst.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vclsq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vclsq_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclst.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vclsq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vclzq_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vclzq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vclzq_m_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vclzq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vclzq_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vclzq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vclzq_m_u16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vclzq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vclzq_m_u32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vclzq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vclzq_m_u8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vclzq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vclzq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vclz.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vclzq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vclz.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vclzq_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vclz.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vclzq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vclz.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vclzq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vclz.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vclzq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vclz.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++- return vclzq_u16 (a); +++ return vclzq_u16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vclz.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a) ++ { ++- return vclzq (a); +++ return vclzq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vclz.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a) ++ { ++- return vclzq_u32 (a); +++ return vclzq_u32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vclz.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a) ++ { ++- return vclzq (a); +++ return vclzq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vclz.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a) ++ { ++- return vclzq_u8 (a); +++ return vclzq_u8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vclz.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a) ++ { ++- return vclzq (a); +++ return vclzq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vclz.i8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vclzq_x_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vclzq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vclzq_x_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vclzq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vclzq_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vclzq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vclzq_x_u16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vclzq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++ return vclzq_x_u32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++ return vclzq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++ return vclzq_x_u8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vclzt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, mve_pred16_t p) ++ { ++ return vclzq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, float16x8_t c) ++ { ++ return vcmlaq_f16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, float16x8_t c) ++ { ++ return vcmlaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, float32x4_t c) ++ { ++ return vcmlaq_f32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, float32x4_t c) ++ { ++ return vcmlaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) ++ { ++ return vcmlaq_m_f16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) ++ { ++ return vcmlaq_m (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) ++ { ++ return vcmlaq_m_f32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) ++ { ++ return vcmlaq_m (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, float16x8_t c) ++ { ++ return vcmlaq_rot180_f16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, float16x8_t c) ++ { ++ return vcmlaq_rot180 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, float32x4_t c) ++ { ++ return vcmlaq_rot180_f32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, float32x4_t c) ++ { ++ return vcmlaq_rot180 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot180_m_f16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot180_m (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot180_m_f32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot180_m (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, float16x8_t c) ++ { ++ return vcmlaq_rot270_f16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, float16x8_t c) ++ { ++ return vcmlaq_rot270 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, float32x4_t c) ++ { ++ return vcmlaq_rot270_f32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, float32x4_t c) ++ { ++ return vcmlaq_rot270 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot270_m_f16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot270_m (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot270_m_f32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot270_m (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, float16x8_t c) ++ { ++ return vcmlaq_rot90_f16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, float16x8_t c) ++ { ++ return vcmlaq_rot90 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, float32x4_t c) ++ { ++ return vcmlaq_rot90_f32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, float32x4_t c) ++ { ++ return vcmlaq_rot90 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vcmla.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot90_m_f16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot90_m (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot90_m_f32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) ++ { ++ return vcmlaq_rot90_m (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmlat.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vcmpcsq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vcmpcsq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vcmpcsq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcmpcsq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vcmpcsq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vcmpcsq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint16x8_t a) +++{ +++ return vcmpcsq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vcmpcsq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vcmpcsq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint32x4_t a) +++{ +++ return vcmpcsq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vcmpcsq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vcmpcsq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u8" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint8x16_t a) +++{ +++ return vcmpcsq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u16 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vcmpcsq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u16 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vcmpcsq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u32 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vcmpcsq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u32 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vcmpcsq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u8 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vcmpcsq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u8 cs, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vcmpcsq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmpeqq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmpeqq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vcmpeqq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_n_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vcmpeqq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vcmpeqq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_n_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a, mve_pred16_t p) +++{ +++ return vcmpeqq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vcmpeqq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vcmpeqq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vcmpeqq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcmpeqq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b) ++-{ ++- return vcmpeqq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b) ++ { ++ return vcmpeqq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a) +++{ +++ return vcmpeqq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b) ++-{ ++- return vcmpeqq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b) ++ { ++ return vcmpeqq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a) +++{ +++ return vcmpeqq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vcmpeqq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vcmpeqq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vcmpeqq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vcmpeqq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint16x8_t a) +++{ +++ return vcmpeqq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vcmpeqq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint32x4_t a) +++{ +++ return vcmpeqq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vcmpeqq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint8x16_t a) +++{ +++ return vcmpeqq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vcmpeqq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vcmpeqq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vcmpeqq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vcmpeqq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i16 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vcmpeqq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i32 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vcmpeqq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i8 eq, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vcmpeqq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmpgeq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmpgeq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vcmpgeq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_n_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vcmpgeq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vcmpgeq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_n_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a, mve_pred16_t p) +++{ +++ return vcmpgeq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpgeq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b) ++-{ ++- return vcmpgeq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b) ++ { ++ return vcmpgeq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a) +++{ +++ return vcmpgeq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b) ++-{ ++- return vcmpgeq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b) ++ { ++ return vcmpgeq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a) +++{ +++ return vcmpgeq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vcmpgeq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vcmpgeq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vcmpgeq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s8 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s16 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vcmpgeq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s16 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s32 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vcmpgeq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s32 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s8 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vcmpgeq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s8 ge, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vcmpgeq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmpgtq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmpgtq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vcmpgtq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_n_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vcmpgtq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vcmpgtq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_n_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a, mve_pred16_t p) +++{ +++ return vcmpgtq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpgtq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b) ++-{ ++- return vcmpgtq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b) ++ { ++ return vcmpgtq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a) +++{ +++ return vcmpgtq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b) ++-{ ++- return vcmpgtq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b) ++ { ++ return vcmpgtq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a) +++{ +++ return vcmpgtq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vcmpgtq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vcmpgtq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vcmpgtq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s8 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s16 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vcmpgtq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s16 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s32 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vcmpgtq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s32 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s8 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vcmpgtq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s8 gt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vcmpgtq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vcmphiq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vcmphiq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vcmphiq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u16 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u32 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.u8 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcmphiq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vcmphiq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vcmphiq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint16x8_t a) +++{ +++ return vcmphiq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vcmphiq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vcmphiq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint32x4_t a) +++{ +++ return vcmphiq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vcmphiq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vcmphiq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u8" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint8x16_t a) +++{ +++ return vcmphiq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u16 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vcmphiq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u16 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vcmphiq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u32 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vcmphiq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u32 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vcmphiq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.u8 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vcmphiq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.u8 hi, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vcmphiq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmpleq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmpleq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vcmpleq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_n_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vcmpleq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vcmpleq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_n_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a, mve_pred16_t p) +++{ +++ return vcmpleq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpleq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b) ++-{ ++- return vcmpleq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b) ++ { ++ return vcmpleq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a) +++{ +++ return vcmpleq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b) ++-{ ++- return vcmpleq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b) ++ { ++ return vcmpleq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a) +++{ +++ return vcmpleq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vcmpleq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vcmpleq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vcmpleq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s8 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s16 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vcmpleq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s16 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s32 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vcmpleq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s32 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s8 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vcmpleq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s8 le, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vcmpleq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmpltq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmpltq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vcmpltq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_n_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vcmpltq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vcmpltq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_n_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a, mve_pred16_t p) +++{ +++ return vcmpltq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s16 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s32 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.s8 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpltq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b) ++-{ ++- return vcmpltq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b) ++ { ++ return vcmpltq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a) +++{ +++ return vcmpltq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b) ++-{ ++- return vcmpltq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b) ++ { ++ return vcmpltq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a) +++{ +++ return vcmpltq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vcmpltq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vcmpltq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vcmpltq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s8 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s16 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vcmpltq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s16 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s32 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vcmpltq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s32 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.s8 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vcmpltq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.s8 lt, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vcmpltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmpneq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmpneq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vcmpneq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_n_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vcmpneq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vcmpneq_m (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_n_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a, mve_pred16_t p) +++{ +++ return vcmpneq_m (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vcmpneq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vcmpneq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c ++@@ -1,22 +1,71 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vcmpneq_m (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmpt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmpt.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vcmpneq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float16x8_t a, float16_t b) ++-{ ++- return vcmpneq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float16x8_t a, float16_t b) ++ { ++ return vcmpneq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float16x8_t a, float16_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float16x8_t a) +++{ +++ return vcmpneq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-mve_pred16_t ++-foo1 (float32x4_t a, float32_t b) ++-{ ++- return vcmpneq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (float32x4_t a, float32_t b) ++ { ++ return vcmpneq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (float32x4_t a, float32_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.f32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (float32x4_t a) +++{ +++ return vcmpneq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vcmpneq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vcmpneq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vcmpneq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vcmpneq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint16x8_t a) +++{ +++ return vcmpneq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vcmpneq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint32x4_t a) +++{ +++ return vcmpneq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c ++@@ -1,21 +1,59 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vcmpneq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ +++/* +++**foo2: { xfail *-*-* } +++** ... +++** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ +++mve_pred16_t +++foo2 (uint8x16_t a) +++{ +++ return vcmpneq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vcmpneq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vcmpneq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vcmpneq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vcmpneq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i16 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vcmpneq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i32 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vcmpneq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmp.i8 ne, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vcmpneq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmp.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmulq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmulq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmulq_rot180_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmulq_rot180 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmulq_rot180_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmulq_rot180 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot180_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot180_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot180_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot180_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot180_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot180_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot180_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot180_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmulq_rot270_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmulq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmulq_rot270_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmulq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot270_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot270_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot270_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot270_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vcmulq_rot90_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vcmulq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vcmulq_rot90_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vcmulq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcmul.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot90_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot90_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot90_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot90_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vcmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ float16x8_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++float16x8_t +++foo1 () +++{ +++ return vcreateq_f16 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ float32x4_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++float32x4_t +++foo1 () +++{ +++ return vcreateq_f32 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ int16x8_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++int16x8_t +++foo1 () +++{ +++ return vcreateq_s16 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ int32x4_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++int32x4_t +++foo1 () +++{ +++ return vcreateq_s32 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ int64x2_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_s64 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++int64x2_t +++foo1 () +++{ +++ return vcreateq_s64 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ int8x16_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++int8x16_t +++foo1 () +++{ +++ return vcreateq_s8 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ uint16x8_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++uint16x8_t +++foo1 () +++{ +++ return vcreateq_u16 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ uint32x4_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++uint32x4_t +++foo1 () +++{ +++ return vcreateq_u32 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ uint64x2_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_u64 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++uint64x2_t +++foo1 () +++{ +++ return vcreateq_u64 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c ++@@ -1,13 +1,42 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2 +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3 +++** ... +++*/ ++ uint8x16_t ++ foo (uint64_t a, uint64_t b) ++ { ++ return vcreateq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmov" } } */ +++/* +++**foo1: +++** ... +++** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +++** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +++** ... +++*/ +++uint8x16_t +++foo1 () +++{ +++ return vcreateq_u8 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c ++@@ -1,21 +1,44 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vctp.16 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32_t a) ++ { ++ return vctp16q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vctp.16" } } */ ++- +++/* +++**foo1: +++** ... +++** vctp.16 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++-foo1 (uint32_t a) +++foo1 () ++ { ++- return vctp16q (a); +++ return vctp16q (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vctp.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c ++@@ -1,22 +1,52 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vctpt.16 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++ return vctp16q_m (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vctpt.16" } } */ ++- +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vctpt.16 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++-foo1 (uint32_t a, mve_pred16_t p) +++foo1 (mve_pred16_t p) ++ { ++- return vctp16q_m (a, p); +++ return vctp16q_m (1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c ++@@ -1,21 +1,44 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vctp.32 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32_t a) ++ { ++ return vctp32q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vctp.32" } } */ ++- +++/* +++**foo1: +++** ... +++** vctp.32 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++-foo1 (uint32_t a) +++foo1 () ++ { ++- return vctp32q (a); +++ return vctp32q (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vctp.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c ++@@ -1,22 +1,52 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vctpt.32 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++ return vctp32q_m (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vctpt.32" } } */ ++- +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vctpt.32 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++-foo1 (uint32_t a, mve_pred16_t p) +++foo1 (mve_pred16_t p) ++ { ++- return vctp32q_m (a, p); +++ return vctp32q_m (1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c ++@@ -1,21 +1,44 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vctp.64 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32_t a) ++ { ++ return vctp64q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vctp.64" } } */ ++- +++/* +++**foo1: +++** ... +++** vctp.64 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++-foo1 (uint32_t a) +++foo1 () ++ { ++- return vctp64q (a); +++ return vctp64q (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vctp.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c ++@@ -1,22 +1,52 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vctpt.64 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++ return vctp64q_m (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vctpt.64" } } */ ++- +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vctpt.64 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++-foo1 (uint32_t a, mve_pred16_t p) +++foo1 (mve_pred16_t p) ++ { ++- return vctp64q_m (a, p); +++ return vctp64q_m (1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c ++@@ -1,21 +1,44 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vctp.8 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32_t a) ++ { ++ return vctp8q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vctp.8" } } */ ++- +++/* +++**foo1: +++** ... +++** vctp.8 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++-foo1 (uint32_t a) +++foo1 () ++ { ++- return vctp8q (a); +++ return vctp8q (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vctp.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c ++@@ -1,22 +1,52 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vctpt.8 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++ return vctp8q_m (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vctpt.8" } } */ ++- +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vctpt.8 (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++-foo1 (uint32_t a, mve_pred16_t p) +++foo1 (mve_pred16_t p) ++ { ++- return vctp8q_m (a, p); +++ return vctp8q_m (1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtaq_m_s16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtat.s16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtaq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtaq_m_s32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtat.s32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtaq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtaq_m_u16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtat.u16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtaq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtaq_m_u32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtat.u32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtaq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvta.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a) ++ { ++ return vcvtaq_s16_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvta.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvta.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a) ++ { ++ return vcvtaq_s32_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvta.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvta.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a) ++ { ++- return vcvtaq_u16_f16 (a); +++ return vcvtaq_u16_f16 (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vcvta.u16.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvta.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a) ++ { ++- return vcvtaq_u32_f32 (a); +++ return vcvtaq_u32_f32 (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vcvta.u32.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtaq_x_s16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtat.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtaq_x_s32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtat.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtaq_x_u16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtat.u16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtat.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtaq_x_u32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtat.u32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtb.f16.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float32x4_t b) ++ { ++ return vcvtbq_f16_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtb.f16.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtb.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float16x8_t a) ++ { ++ return vcvtbq_f32_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtb.f32.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c ++@@ -1,22 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtbt.f16.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcvtbq_m_f16_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtbt.f16.f32" } } */ ++- ++-float16x8_t ++-foo1 (float16x8_t a, float32x4_t b, mve_pred16_t p) ++-{ ++- return vcvtbq_m (a, b, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c ++@@ -1,22 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtbt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtbq_m_f32_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtbt.f32.f16" } } */ ++- ++-float32x4_t ++-foo1 (float32x4_t inactive, float16x8_t a, mve_pred16_t p) ++-{ ++- return vcvtbq_m (inactive, a, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtbt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtbq_x_f32_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtbt.f32.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtmq_m_s16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtmt.s16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtmq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtmq_m_s32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtmt.s32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtmq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtmq_m_u16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtmt.u16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtmq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtmq_m_u32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtmt.u32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtmq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtm.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a) ++ { ++ return vcvtmq_s16_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtm.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtm.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a) ++ { ++ return vcvtmq_s32_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtm.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtm.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a) ++ { ++- return vcvtmq_u16_f16 (a); +++ return vcvtmq_u16_f16 (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vcvtm.u16.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtm.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a) ++ { ++- return vcvtmq_u32_f32 (a); +++ return vcvtmq_u32_f32 (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vcvtm.u32.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtmq_x_s16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtmt.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtmq_x_s32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtmt.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtmq_x_u16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtmt.u16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtmt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtmq_x_u32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtmt.u32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtnq_m_s16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtnt.s16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtnq_m_s32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtnt.s32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtnq_m_u16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtnt.u16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtnq_m_u32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtnt.u32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtn.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a) ++ { ++ return vcvtnq_s16_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtn.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtn.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a) ++ { ++ return vcvtnq_s32_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtn.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtn.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a) ++ { ++- return vcvtnq_u16_f16 (a); +++ return vcvtnq_u16_f16 (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vcvtn.u16.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtn.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a) ++ { ++ return vcvtnq_u32_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtn.u32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtnq_x_s16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtnt.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtnq_x_s32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtnt.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtnq_x_u16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtnt.u16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtnt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtnq_x_u32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtnt.u32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtpq_m_s16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtpt.s16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtpq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtpq_m_s32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtpt.s32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtpq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtpq_m_u16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtpt.u16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtpq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtpq_m_u32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtpt.u32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtpq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtp.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a) ++ { ++ return vcvtpq_s16_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtp.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtp.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a) ++ { ++ return vcvtpq_s32_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtp.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtp.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a) ++ { ++- return vcvtpq_u16_f16 (a); +++ return vcvtpq_u16_f16 (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vcvtp.u16.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtp.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a) ++ { ++- return vcvtpq_u32_f32 (a); +++ return vcvtpq_u32_f32 (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vcvtp.u32.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtpq_x_s16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtpt.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtpq_x_s32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtpt.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtpq_x_u16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtpt.u16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtpt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtpq_x_u32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtpt.u32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (int16x8_t a) ++ { ++ return vcvtq_f16_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f16.s16" } } */ +++ +++/* +++**foo1: +++** ... +++** vcvt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (int16x8_t a) +++{ +++ return vcvtq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (uint16x8_t a) ++ { ++ return vcvtq_f16_u16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f16.u16" } } */ +++ +++/* +++**foo1: +++** ... +++** vcvt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (uint16x8_t a) +++{ +++ return vcvtq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (int32x4_t a) ++ { ++ return vcvtq_f32_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f32.s32" } } */ +++ +++/* +++**foo1: +++** ... +++** vcvt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (int32x4_t a) +++{ +++ return vcvtq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (uint32x4_t a) ++ { ++ return vcvtq_f32_u32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f32.u32" } } */ +++ +++/* +++**foo1: +++** ... +++** vcvt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (uint32x4_t a) +++{ +++ return vcvtq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_f16_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_f16_u16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_f32_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_f32_u32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n_f16_s16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n_f16_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n_f32_s32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++- return vcvtq_m_n_f32_u32 (inactive, a, 16, p); +++ return vcvtq_m_n_f32_u32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++- return vcvtq_m_n (inactive, a, 16, p); +++ return vcvtq_m_n (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n_s16_f16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n_s32_f32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n_u16_f16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n_u32_f32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_s16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_s32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_u16_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m_u32_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (int16x8_t a) ++ { ++ return vcvtq_n_f16_s16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f16.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcvt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vcvtq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f16.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (uint16x8_t a) ++ { ++ return vcvtq_n_f16_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f16.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vcvt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (uint16x8_t a) ++ { ++ return vcvtq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f16.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (int32x4_t a) ++ { ++ return vcvtq_n_f32_s32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f32.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcvt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vcvtq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f32.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (uint32x4_t a) ++ { ++ return vcvtq_n_f32_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f32.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vcvt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (uint32x4_t a) ++ { ++ return vcvtq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.f32.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.s16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a) ++ { ++ return vcvtq_n_s16_f16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.s32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a) ++ { ++ return vcvtq_n_s32_f32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.u16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a) ++ { ++ return vcvtq_n_u16_f16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.u16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.u32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a) ++ { ++ return vcvtq_n_u32_f32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.u32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a) ++ { ++ return vcvtq_s16_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a) ++ { ++ return vcvtq_s32_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvt.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a) ++ { ++- return vcvtq_u16_f16 (a); +++ return vcvtq_u16_f16 (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vcvt.u16.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a) ++ { ++- return vcvtq_u32_f32 (a); +++ return vcvtq_u32_f32 (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vcvt.u32.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_f16_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_f16_u16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_f32_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_f32_u32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n_f16_s16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n_f16_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n_f32_s32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++- return vcvtq_x_n_f32_u32 (a, 16, p); +++ return vcvtq_x_n_f32_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++- return vcvtq_x_n (a, 16, p); +++ return vcvtq_x_n (a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n_s16_f16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n_s32_f32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n_u16_f16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_n_u32_f32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_s16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_s32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_u16_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvtt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vcvtq_x_u32_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtt.f16.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float32x4_t b) ++ { ++ return vcvttq_f16_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtt.f16.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vcvtt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float16x8_t a) ++ { ++ return vcvttq_f32_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vcvtt.f32.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c ++@@ -1,22 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvttt.f16.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vcvttq_m_f16_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvttt.f16.f32" } } */ ++- ++-float16x8_t ++-foo1 (float16x8_t a, float32x4_t b, mve_pred16_t p) ++-{ ++- return vcvttq_m (a, b, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c ++@@ -1,22 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvttt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vcvttq_m_f32_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvttt.f32.f16" } } */ ++- ++-float32x4_t ++-foo1 (float32x4_t inactive, float16x8_t a, mve_pred16_t p) ++-{ ++- return vcvttq_m (inactive, a, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vcvttt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vcvttq_x_f32_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vcvttt.f32.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p) ++ { ++ return vddupq_m_n_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p) ++ { ++ return vddupq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, mve_pred16_t p) +++{ +++ return vddupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p) ++ { ++- return vddupq_m_n_u32 (inactive, a, 4, p); +++ return vddupq_m_n_u32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p) ++ { ++- return vddupq_m (inactive, a, 4, p); +++ return vddupq_m (inactive, a, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, mve_pred16_t p) +++{ +++ return vddupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p) ++ { ++- return vddupq_m_n_u8 (inactive, a, 4, p); +++ return vddupq_m_n_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p) ++ { ++- return vddupq_m (inactive, a, 4, p); +++ return vddupq_m (inactive, a, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, mve_pred16_t p) +++{ +++ return vddupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++ return vddupq_m_wb_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++ return vddupq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, mve_pred16_t p) +++{ +++ return vddupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_m_wb_u32 (inactive, a, 4, p); +++ return vddupq_m_wb_u32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_m (inactive, a, 4, p); +++ return vddupq_m (inactive, a, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, mve_pred16_t p) +++{ +++ return vddupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_m_wb_u8 (inactive, a, 4, p); +++ return vddupq_m_wb_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_m (inactive, a, 4, p); +++ return vddupq_m (inactive, a, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, mve_pred16_t p) +++{ +++ return vddupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t a) ++ { ++- return vddupq_n_u16 (a, 4); +++ return vddupq_n_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t a) ++ { ++- return vddupq_u16 (a, 4); +++ return vddupq_u16 (a, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 () +++{ +++ return vddupq_u16 (1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vddup.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a) ++ { ++ return vddupq_n_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t a) ++ { ++ return vddupq_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u32" } } */ +++/* +++**foo2: +++** ... +++** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 () +++{ +++ return vddupq_u32 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t a) ++ { ++ return vddupq_n_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t a) ++ { ++ return vddupq_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u8" } } */ +++/* +++**foo2: +++** ... +++** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 () +++{ +++ return vddupq_u8 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t *a) ++ { ++- return vddupq_wb_u16 (a, 4); +++ return vddupq_wb_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t *a) ++ { ++- return vddupq_u16 (a, 4); +++ return vddupq_u16 (a, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 () +++{ +++ return vddupq_u16 (1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vddup.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t *a) ++ { ++ return vddupq_wb_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t *a) ++ { ++ return vddupq_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u32" } } */ +++/* +++**foo2: +++** ... +++** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 () +++{ +++ return vddupq_u32 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t *a) ++ { ++ return vddupq_wb_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t *a) ++ { ++ return vddupq_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vddup.u8" } } */ +++/* +++**foo2: +++** ... +++** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 () +++{ +++ return vddupq_u8 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++ return vddupq_x_n_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t a, mve_pred16_t p) ++ { ++ return vddupq_x_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (mve_pred16_t p) +++{ +++ return vddupq_x_u16 (1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++- return vddupq_x_n_u32 (a, 4, p); +++ return vddupq_x_n_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t a, mve_pred16_t p) ++ { ++- return vddupq_x_u32 (a, 4, p); +++ return vddupq_x_u32 (a, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (mve_pred16_t p) +++{ +++ return vddupq_x_u32 (1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++- return vddupq_x_n_u8 (a, 4, p); +++ return vddupq_x_n_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t a, mve_pred16_t p) ++ { ++- return vddupq_x_u8 (a, 4, p); +++ return vddupq_x_u8 (a, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (mve_pred16_t p) +++{ +++ return vddupq_x_u8 (1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c ++@@ -1,25 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-uint32_t *a; +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (mve_pred16_t p) +++foo (uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_x_wb_u16 (a, 2, p); +++ return vddupq_x_wb_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (mve_pred16_t p) +++foo1 (uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_x_u16 (a, 2, p); +++ return vddupq_x_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (mve_pred16_t p) +++{ +++ return vddupq_x_u16 (1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c ++@@ -1,25 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-uint32_t *a; +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (mve_pred16_t p) +++foo (uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_x_wb_u32 (a, 8, p); +++ return vddupq_x_wb_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (mve_pred16_t p) +++foo1 (uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_x_u32 (a, 8, p); +++ return vddupq_x_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (mve_pred16_t p) +++{ +++ return vddupq_x_u32 (1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c ++@@ -1,25 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-uint32_t *a; +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (mve_pred16_t p) +++foo (uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_x_wb_u8 (a, 8, p); +++ return vddupq_x_wb_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (mve_pred16_t p) +++foo1 (uint32_t *a, mve_pred16_t p) ++ { ++- return vddupq_x_u8 (a, 8, p); +++ return vddupq_x_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vddupt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (mve_pred16_t p) +++{ +++ return vddupq_x_u8 (1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c ++@@ -1,22 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16_t a, mve_pred16_t p) ++ { ++ return vdupq_m_n_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16_t a, mve_pred16_t p) ++ { ++ return vdupq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t inactive, mve_pred16_t p) +++{ +++ return vdupq_m (inactive, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c ++@@ -1,22 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32_t a, mve_pred16_t p) ++ { ++ return vdupq_m_n_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32_t a, mve_pred16_t p) ++ { ++ return vdupq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t inactive, mve_pred16_t p) +++{ +++ return vdupq_m (inactive, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16_t a, mve_pred16_t p) ++ { ++ return vdupq_m_n_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16_t a, mve_pred16_t p) ++ { ++ return vdupq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32_t a, mve_pred16_t p) ++ { ++ return vdupq_m_n_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32_t a, mve_pred16_t p) ++ { ++ return vdupq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8_t a, mve_pred16_t p) ++ { ++ return vdupq_m_n_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8_t a, mve_pred16_t p) ++ { ++ return vdupq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c ++@@ -1,22 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16_t a, mve_pred16_t p) ++ { ++ return vdupq_m_n_u16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16_t a, mve_pred16_t p) ++ { ++ return vdupq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, mve_pred16_t p) +++{ +++ return vdupq_m (inactive, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c ++@@ -1,22 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p) ++ { ++ return vdupq_m_n_u32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p) ++ { ++ return vdupq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, mve_pred16_t p) +++{ +++ return vdupq_m (inactive, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c ++@@ -1,22 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8_t a, mve_pred16_t p) ++ { ++ return vdupq_m_n_u8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8_t a, mve_pred16_t p) ++ { ++ return vdupq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, mve_pred16_t p) +++{ +++ return vdupq_m (inactive, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16_t a) ++ { ++ return vdupq_n_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vdup.16" } } */ +++/* +++**foo1: +++** ... +++** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 () +++{ +++ return vdupq_n_f16 (1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32_t a) ++ { ++ return vdupq_n_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vdup.32" } } */ +++/* +++**foo1: +++** ... +++** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 () +++{ +++ return vdupq_n_f32 (1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c ++@@ -1,13 +1,28 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16_t a) ++ { ++ return vdupq_n_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vdup.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c ++@@ -1,13 +1,28 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32_t a) ++ { ++ return vdupq_n_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vdup.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8_t a) ++ { ++ return vdupq_n_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vdup.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16_t a) ++ { ++- return vdupq_n_u16 (a); +++ return vdupq_n_u16 (a); +++} +++ +++/* +++**foo1: +++** ... +++** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 () +++{ +++ return vdupq_n_u16 (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vdup.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a) ++ { ++- return vdupq_n_u32 (a); +++ return vdupq_n_u32 (a); +++} +++ +++/* +++**foo1: +++** ... +++** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 () +++{ +++ return vdupq_n_u32 (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vdup.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c ++@@ -1,13 +1,40 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8_t a) ++ { ++- return vdupq_n_u8 (a); +++ return vdupq_n_u8 (a); +++} +++ +++/* +++**foo1: +++** ... +++** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo1 () +++{ +++ return vdupq_n_u8 (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vdup.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c ++@@ -1,14 +1,48 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16_t a, mve_pred16_t p) ++ { ++ return vdupq_x_n_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.16" } } */ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (mve_pred16_t p) +++{ +++ return vdupq_x_n_f16 (1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c ++@@ -1,14 +1,48 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32_t a, mve_pred16_t p) ++ { ++ return vdupq_x_n_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.32" } } */ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (mve_pred16_t p) +++{ +++ return vdupq_x_n_f32 (1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16_t a, mve_pred16_t p) ++ { ++ return vdupq_x_n_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32_t a, mve_pred16_t p) ++ { ++ return vdupq_x_n_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8_t a, mve_pred16_t p) ++ { ++ return vdupq_x_n_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c ++@@ -1,14 +1,48 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16_t a, mve_pred16_t p) ++ { ++ return vdupq_x_n_u16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.16" } } */ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (mve_pred16_t p) +++{ +++ return vdupq_x_n_u16 (1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c ++@@ -1,14 +1,48 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++ return vdupq_x_n_u32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.32" } } */ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 (mve_pred16_t p) +++{ +++ return vdupq_x_n_u32 (1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c ++@@ -1,14 +1,48 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8_t a, mve_pred16_t p) ++ { ++ return vdupq_x_n_u8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdupt.8" } } */ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo1 (mve_pred16_t p) +++{ +++ return vdupq_x_n_u8 (1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 1, p); +++ return vdwdupq_m_n_u16 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vdwdupq_m (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, mve_pred16_t p) +++{ +++ return vdwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 4, p); +++ return vdwdupq_m_n_u32 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 4, p); +++ return vdwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, mve_pred16_t p) +++{ +++ return vdwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 4, p); +++ return vdwdupq_m_n_u8 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 4, p); +++ return vdwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, mve_pred16_t p) +++{ +++ return vdwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16x8_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p) +++foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 8, p); +++ return vdwdupq_m_wb_u16 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16x8_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p) +++foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 8, p); +++ return vdwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, mve_pred16_t p) +++{ +++ return vdwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p) +++foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 1, p); +++ return vdwdupq_m_wb_u32 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p) +++foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++ return vdwdupq_m (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, mve_pred16_t p) +++{ +++ return vdwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8x16_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p) +++foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 2, p); +++ return vdwdupq_m_wb_u8 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8x16_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p) +++foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_m (inactive, a, b, 2, p); +++ return vdwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, mve_pred16_t p) +++{ +++ return vdwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t a, uint32_t b) ++ { ++- return vdwdupq_n_u16 (a, b, 2); +++ return vdwdupq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vdwdup.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t a, uint32_t b) ++ { ++- return vdwdupq_u16 (a, b, 2); +++ return vdwdupq_u16 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 () +++{ +++ return vdwdupq_u16 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vdwdup.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a, uint32_t b) ++ { ++- return vdwdupq_n_u32 (a, b, 8); +++ return vdwdupq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vdwdup.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t a, uint32_t b) ++ { ++- return vdwdupq_u32 (a, b, 8); +++ return vdwdupq_u32 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 () +++{ +++ return vdwdupq_u32 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vdwdup.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t a, uint32_t b) ++ { ++- return vdwdupq_n_u8 (a, b, 4); +++ return vdwdupq_n_u8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vdwdup.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t a, uint32_t b) ++ { ++- return vdwdupq_u8 (a, b, 4); +++ return vdwdupq_u8 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 () +++{ +++ return vdwdupq_u8 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vdwdup.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t *a, uint32_t b) ++ { ++- return vdwdupq_wb_u16 (a, b, 2); +++ return vdwdupq_wb_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vdwdup.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t *a, uint32_t b) ++ { ++- return vdwdupq_u16 (a, b, 2); +++ return vdwdupq_u16 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 () +++{ +++ return vdwdupq_u16 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vdwdup.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t *a, uint32_t b) ++ { ++- return vdwdupq_wb_u32 (a, b, 8); +++ return vdwdupq_wb_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vdwdup.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t *a, uint32_t b) ++ { ++- return vdwdupq_u32 (a, b, 8); +++ return vdwdupq_u32 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 () +++{ +++ return vdwdupq_u32 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vdwdup.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t *a, uint32_t b) ++ { ++- return vdwdupq_wb_u8 (a, b, 4); +++ return vdwdupq_wb_u8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vdwdup.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t *a, uint32_t b) ++ { ++- return vdwdupq_u8 (a, b, 4); +++ return vdwdupq_u8 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 () +++{ +++ return vdwdupq_u8 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vdwdup.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vdwdupq_x_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vdwdupq_x_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (mve_pred16_t p) +++{ +++ return vdwdupq_x_u16 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_x_n_u32 (a, b, 4, p); +++ return vdwdupq_x_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_x_u32 (a, b, 4, p); +++ return vdwdupq_x_u32 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (mve_pred16_t p) +++{ +++ return vdwdupq_x_u32 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_x_n_u8 (a, b, 4, p); +++ return vdwdupq_x_n_u8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_x_u8 (a, b, 4, p); +++ return vdwdupq_x_u8 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (mve_pred16_t p) +++{ +++ return vdwdupq_x_u8 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_x_wb_u16 (a, b, 8, p); +++ return vdwdupq_x_wb_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo1 (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_x_u16 (a, b, 8, p); +++ return vdwdupq_x_u16 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (mve_pred16_t p) +++{ +++ return vdwdupq_x_u16 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++ return vdwdupq_x_wb_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo1 (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++ return vdwdupq_x_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (mve_pred16_t p) +++{ +++ return vdwdupq_x_u32 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_x_wb_u8 (a, b, 2, p); +++ return vdwdupq_x_wb_u8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo1 (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return vdwdupq_x_u8 (a, b, 2, p); +++ return vdwdupq_x_u8 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (mve_pred16_t p) +++{ +++ return vdwdupq_x_u8 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vdwdupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return veorq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ ++ +++/* +++**foo1: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return veorq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return veorq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ ++ +++/* +++**foo1: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return veorq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return veorq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return veorq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return veorq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return veorq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return veorq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return veorq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return veorq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return veorq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return veorq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return veorq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return veorq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return veorq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return veorq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return veorq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return veorq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return veorq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return veorq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ ++ +++/* +++**foo1: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return veorq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return veorq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ ++ +++/* +++**foo1: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return veorq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return veorq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ ++ +++/* +++**foo1: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return veorq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return veorq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ ++ +++/* +++**foo1: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return veorq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return veorq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ ++ +++/* +++**foo1: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return veorq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return veorq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ ++ +++/* +++**foo1: +++** ... +++** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return veorq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "veor" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return veorq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return veorq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return veorq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return veorq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return veorq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return veorq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return veorq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return veorq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return veorq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return veorq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return veorq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return veorq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return veorq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return veorq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return veorq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return veorq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "veort" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vfma.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16x8_t a, float16x8_t b, float16x8_t c) +++foo (float16x8_t add, float16x8_t m1, float16x8_t m2) ++ { ++- return vfmaq_f16 (a, b, c); +++ return vfmaq_f16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vfma.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vfma.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16x8_t c) +++foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2) ++ { ++- return vfmaq (a, b, c); +++ return vfmaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vfma.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vfma.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32x4_t a, float32x4_t b, float32x4_t c) +++foo (float32x4_t add, float32x4_t m1, float32x4_t m2) ++ { ++- return vfmaq_f32 (a, b, c); +++ return vfmaq_f32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vfma.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vfma.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32x4_t c) +++foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2) ++ { ++- return vfmaq (a, b, c); +++ return vfmaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vfma.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) +++foo (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p) ++ { ++- return vfmaq_m_f16 (a, b, c, p); +++ return vfmaq_m_f16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) +++foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p) ++ { ++- return vfmaq_m (a, b, c, p); +++ return vfmaq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmat.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) +++foo (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p) ++ { ++- return vfmaq_m_f32 (a, b, c, p); +++ return vfmaq_m_f32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) +++foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p) ++ { ++- return vfmaq_m (a, b, c, p); +++ return vfmaq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmat.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p) ++-{ ++- return vfmaq_m (a, b, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p) +++foo (float16x8_t add, float16x8_t m1, float16_t m2, mve_pred16_t p) ++ { ++- return vfmaq_m_n_f16 (a, b, c, p); +++ return vfmaq_m_n_f16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p) +++foo1 (float16x8_t add, float16x8_t m1, float16_t m2, mve_pred16_t p) ++ { ++- return vfmaq_m (a, b, c, p); +++ return vfmaq_m (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t add, float16x8_t m1, mve_pred16_t p) +++{ +++ return vfmaq_m (add, m1, 1.1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmat.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p) ++-{ ++- return vfmaq_m (a, b, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p) +++foo (float32x4_t add, float32x4_t m1, float32_t m2, mve_pred16_t p) ++ { ++- return vfmaq_m_n_f32 (a, b, c, p); +++ return vfmaq_m_n_f32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p) +++foo1 (float32x4_t add, float32x4_t m1, float32_t m2, mve_pred16_t p) ++ { ++- return vfmaq_m (a, b, c, p); +++ return vfmaq_m (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmat.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t add, float32x4_t m1, mve_pred16_t p) +++{ +++ return vfmaq_m (add, m1, 1.1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmat.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16_t c) ++-{ ++- return vfmaq (a, b, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vfma.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16x8_t a, float16x8_t b, float16_t c) +++foo (float16x8_t add, float16x8_t m1, float16_t m2) ++ { ++- return vfmaq_n_f16 (a, b, c); +++ return vfmaq_n_f16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vfma.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vfma.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16_t c) +++foo1 (float16x8_t add, float16x8_t m1, float16_t m2) ++ { ++- return vfmaq (a, b, c); +++ return vfmaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vfma.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t add, float16x8_t m1) +++{ +++ return vfmaq (add, m1, 1.1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vfma.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32_t c) ++-{ ++- return vfmaq (a, b, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vfma.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32x4_t a, float32x4_t b, float32_t c) +++foo (float32x4_t add, float32x4_t m1, float32_t m2) ++ { ++- return vfmaq_n_f32 (a, b, c); +++ return vfmaq_n_f32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vfma.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vfma.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32_t c) +++foo1 (float32x4_t add, float32x4_t m1, float32_t m2) ++ { ++- return vfmaq (a, b, c); +++ return vfmaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vfma.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t add, float32x4_t m1) +++{ +++ return vfmaq (add, m1, 1.1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vfma.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p) ++-{ ++- return vfmasq_m (a, b, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmast.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p) +++foo (float16x8_t m1, float16x8_t m2, float16_t add, mve_pred16_t p) ++ { ++- return vfmasq_m_n_f16 (a, b, c, p); +++ return vfmasq_m_n_f16 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmast.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmast.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p) +++foo1 (float16x8_t m1, float16x8_t m2, float16_t add, mve_pred16_t p) ++ { ++- return vfmasq_m (a, b, c, p); +++ return vfmasq_m (m1, m2, add, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmast.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t m1, float16x8_t m2, mve_pred16_t p) +++{ +++ return vfmasq_m (m1, m2, 1.1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmast.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p) ++-{ ++- return vfmasq_m (a, b, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmast.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p) +++foo (float32x4_t m1, float32x4_t m2, float32_t add, mve_pred16_t p) ++ { ++- return vfmasq_m_n_f32 (a, b, c, p); +++ return vfmasq_m_n_f32 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmast.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmast.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p) +++foo1 (float32x4_t m1, float32x4_t m2, float32_t add, mve_pred16_t p) ++ { ++- return vfmasq_m (a, b, c, p); +++ return vfmasq_m (m1, m2, add, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmast.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t m1, float32x4_t m2, mve_pred16_t p) +++{ +++ return vfmasq_m (m1, m2, 1.1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmast.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16_t c) ++-{ ++- return vfmasq (a, b, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vfmas.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16x8_t a, float16x8_t b, float16_t c) +++foo (float16x8_t m1, float16x8_t m2, float16_t add) ++ { ++- return vfmasq_n_f16 (a, b, c); +++ return vfmasq_n_f16 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vfmas.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vfmas.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16_t c) +++foo1 (float16x8_t m1, float16x8_t m2, float16_t add) ++ { ++- return vfmasq (a, b, c); +++ return vfmasq (m1, m2, add); +++} +++ +++/* +++**foo2: +++** ... +++** vfmas.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t m1, float16x8_t m2) +++{ +++ return vfmasq (m1, m2, 1.1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vfmas.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32_t c) ++-{ ++- return vfmasq (a, b, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vfmas.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32x4_t a, float32x4_t b, float32_t c) +++foo (float32x4_t m1, float32x4_t m2, float32_t add) ++ { ++- return vfmasq_n_f32 (a, b, c); +++ return vfmasq_n_f32 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vfmas.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vfmas.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32_t c) +++foo1 (float32x4_t m1, float32x4_t m2, float32_t add) ++ { ++- return vfmasq (a, b, c); +++ return vfmasq (m1, m2, add); +++} +++ +++/* +++**foo2: +++** ... +++** vfmas.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t m1, float32x4_t m2) +++{ +++ return vfmasq (m1, m2, 1.1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vfmas.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vfms.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16x8_t a, float16x8_t b, float16x8_t c) +++foo (float16x8_t add, float16x8_t m1, float16x8_t m2) ++ { ++- return vfmsq_f16 (a, b, c); +++ return vfmsq_f16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vfms.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vfms.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16x8_t c) +++foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2) ++ { ++- return vfmsq (a, b, c); +++ return vfmsq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vfms.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vfms.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32x4_t a, float32x4_t b, float32x4_t c) +++foo (float32x4_t add, float32x4_t m1, float32x4_t m2) ++ { ++- return vfmsq_f32 (a, b, c); +++ return vfmsq_f32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vfms.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vfms.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32x4_t c) +++foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2) ++ { ++- return vfmsq (a, b, c); +++ return vfmsq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vfms.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmst.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) +++foo (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p) ++ { ++- return vfmsq_m_f16 (a, b, c, p); +++ return vfmsq_m_f16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmst.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmst.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) +++foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p) ++ { ++- return vfmsq_m (a, b, c, p); +++ return vfmsq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmst.f16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmst.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) +++foo (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p) ++ { ++- return vfmsq_m_f32 (a, b, c, p); +++ return vfmsq_m_f32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmst.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vfmst.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) +++foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p) ++ { ++- return vfmsq_m (a, b, c, p); +++ return vfmsq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vfmst.f32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_n_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) +++{ +++ return vhaddq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_n_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) +++{ +++ return vhaddq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_n_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) +++{ +++ return vhaddq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vhaddq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vhaddq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vhaddq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vhaddq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vhaddq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u16" } } */ +++/* +++**foo2: +++** ... +++** vhadd.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a) +++{ +++ return vhaddq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vhaddq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u32" } } */ +++/* +++**foo2: +++** ... +++** vhadd.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a) +++{ +++ return vhaddq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vhaddq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u8" } } */ +++/* +++**foo2: +++** ... +++** vhadd.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a) +++{ +++ return vhaddq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vhaddq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vhaddq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vhaddq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vhaddq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vhaddq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vhaddq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhadd.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vhaddq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vhaddq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vhaddq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vhaddq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhaddt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhcadd.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vhcaddq_rot270_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhcadd.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vhcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhcadd.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vhcaddq_rot270_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhcadd.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vhcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhcadd.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vhcaddq_rot270_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhcadd.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vhcaddq_rot270 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot270_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhcadd.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vhcaddq_rot90_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhcadd.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vhcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhcadd.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vhcaddq_rot90_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhcadd.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vhcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhcadd.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vhcaddq_rot90_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhcadd.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vhcaddq_rot90 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhcadd.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhcaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhcaddq_rot90_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_n_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) +++{ +++ return vhsubq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_n_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) +++{ +++ return vhsubq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_n_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) +++{ +++ return vhsubq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vhsubq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vhsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vhsubq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vhsubq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vhsubq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vhsubq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u16" } } */ +++/* +++**foo2: +++** ... +++** vhsub.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a) +++{ +++ return vhsubq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vhsubq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u32" } } */ +++/* +++**foo2: +++** ... +++** vhsub.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a) +++{ +++ return vhsubq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vhsubq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u8" } } */ +++/* +++**foo2: +++** ... +++** vhsub.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a) +++{ +++ return vhsubq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vhsubq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vhsubq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vhsubq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vhsubq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vhsubq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vhsub.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vhsubq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vhsub.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vhsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vhsub.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vhsubq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vhsubq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vhsubq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vhsubq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vhsubt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vhsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vhsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p) ++ { ++- return vidupq_m_n_u16 (inactive, a, 4, p); +++ return vidupq_m_n_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p) ++ { ++- return vidupq_m (inactive, a, 4, p); +++ return vidupq_m (inactive, a, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, mve_pred16_t p) +++{ +++ return vidupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p) ++ { ++ return vidupq_m_n_u32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p) ++ { ++ return vidupq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, mve_pred16_t p) +++{ +++ return vidupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p) ++ { ++ return vidupq_m_n_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p) ++ { ++ return vidupq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, mve_pred16_t p) +++{ +++ return vidupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++- return vidupq_m_wb_u16 (inactive, a, 4, p); +++ return vidupq_m_wb_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++- return vidupq_m (inactive, a, 4, p); +++ return vidupq_m (inactive, a, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, mve_pred16_t p) +++{ +++ return vidupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++ return vidupq_m_wb_u32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++ return vidupq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, mve_pred16_t p) +++{ +++ return vidupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++ return vidupq_m_wb_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p) ++ { ++ return vidupq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, mve_pred16_t p) +++{ +++ return vidupq_m (inactive, 1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t a) ++ { ++- return vidupq_n_u16 (a, 4); +++ return vidupq_n_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t a) ++ { ++- return vidupq_u16 (a, 4); +++ return vidupq_u16 (a, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 () +++{ +++ return vidupq_u16 (1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vidup.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a) ++ { ++ return vidupq_n_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t a) ++ { ++ return vidupq_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u32" } } */ +++/* +++**foo2: +++** ... +++** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 () +++{ +++ return vidupq_u32 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t a) ++ { ++ return vidupq_n_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t a) ++ { ++ return vidupq_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u8" } } */ +++/* +++**foo2: +++** ... +++** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 () +++{ +++ return vidupq_u8 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t *a) ++ { ++- return vidupq_wb_u16 (a, 4); +++ return vidupq_wb_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t *a) ++ { ++- return vidupq_u16 (a, 4); +++ return vidupq_u16 (a, 1); +++} +++ +++/* +++**foo2: +++** ... +++** vidup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 () +++{ +++ return vidupq_u16 (1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vidup.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t *a) ++ { ++ return vidupq_wb_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t *a) ++ { ++ return vidupq_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u32" } } */ +++/* +++**foo2: +++** ... +++** vidup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 () +++{ +++ return vidupq_u32 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t *a) ++ { ++ return vidupq_wb_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t *a) ++ { ++ return vidupq_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vidup.u8" } } */ +++/* +++**foo2: +++** ... +++** vidup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 () +++{ +++ return vidupq_u8 (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++- return vidupq_x_n_u16 (a, 4, p); +++ return vidupq_x_n_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t a, mve_pred16_t p) ++ { ++- return vidupq_x_u16 (a, 4, p); +++ return vidupq_x_u16 (a, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (mve_pred16_t p) +++{ +++ return vidupq_x_u16 (1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++ return vidupq_x_n_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t a, mve_pred16_t p) ++ { ++ return vidupq_x_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (mve_pred16_t p) +++{ +++ return vidupq_x_u32 (1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t a, mve_pred16_t p) ++ { ++ return vidupq_x_n_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t a, mve_pred16_t p) ++ { ++ return vidupq_x_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (mve_pred16_t p) +++{ +++ return vidupq_x_u8 (1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c ++@@ -1,25 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-uint32_t *a; +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (mve_pred16_t p) +++foo (uint32_t *a, mve_pred16_t p) ++ { ++- return vidupq_x_wb_u16 (a, 8, p); +++ return vidupq_x_wb_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (mve_pred16_t p) +++foo1 (uint32_t *a, mve_pred16_t p) ++ { ++- return vidupq_x_u16 (a, 8, p); +++ return vidupq_x_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (mve_pred16_t p) +++{ +++ return vidupq_x_u16 (1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c ++@@ -1,25 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-uint32_t *a; +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (mve_pred16_t p) +++foo (uint32_t *a, mve_pred16_t p) ++ { ++- return vidupq_x_wb_u32 (a, 2, p); +++ return vidupq_x_wb_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (mve_pred16_t p) +++foo1 (uint32_t *a, mve_pred16_t p) ++ { ++- return vidupq_x_u32 (a, 2, p); +++ return vidupq_x_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (mve_pred16_t p) +++{ +++ return vidupq_x_u32 (1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c ++@@ -1,25 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-uint32_t * a; +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (mve_pred16_t p) +++foo (uint32_t *a, mve_pred16_t p) ++ { ++- return vidupq_x_wb_u8 (a, 2, p); +++ return vidupq_x_wb_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (mve_pred16_t p) +++foo1 (uint32_t *a, mve_pred16_t p) ++ { ++- return vidupq_x_u8 (a, 2, p); +++ return vidupq_x_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vidupt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vidupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (mve_pred16_t p) +++{ +++ return vidupq_x_u8 (1, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m_n_u16 (inactive, a, b, 2, p); +++ return viwdupq_m_n_u16 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m (inactive, a, b, 2, p); +++ return viwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, mve_pred16_t p) +++{ +++ return viwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m_n_u32 (inactive, a, b, 4, p); +++ return viwdupq_m_n_u32 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m (inactive, a, b, 4, p); +++ return viwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, mve_pred16_t p) +++{ +++ return viwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m_n_u8 (inactive, a, b, 8, p); +++ return viwdupq_m_n_u8 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m (inactive, a, b, 8, p); +++ return viwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, mve_pred16_t p) +++{ +++ return viwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m_wb_u16 (inactive, a, b, 2, p); +++ return viwdupq_m_wb_u16 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m (inactive, a, b, 2, p); +++ return viwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, mve_pred16_t p) +++{ +++ return viwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m_wb_u32 (inactive, a, b, 4, p); +++ return viwdupq_m_wb_u32 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m (inactive, a, b, 4, p); +++ return viwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, mve_pred16_t p) +++{ +++ return viwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m_wb_u8 (inactive, a, b, 8, p); +++ return viwdupq_m_wb_u8 (inactive, a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_m (inactive, a, b, 8, p); +++ return viwdupq_m (inactive, a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, mve_pred16_t p) +++{ +++ return viwdupq_m (inactive, 1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t a, uint32_t b) ++ { ++- return viwdupq_n_u16 (a, b, 2); +++ return viwdupq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "viwdup.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t a, uint32_t b) ++ { ++- return viwdupq_u16 (a, b, 2); +++ return viwdupq_u16 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 () +++{ +++ return viwdupq_u16 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "viwdup.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a, uint32_t b) ++ { ++- return viwdupq_n_u32 (a, b, 4); +++ return viwdupq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "viwdup.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t a, uint32_t b) ++ { ++- return viwdupq_u32 (a, b, 4); +++ return viwdupq_u32 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 () +++{ +++ return viwdupq_u32 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "viwdup.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t a, uint32_t b) ++ { ++ return viwdupq_n_u8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "viwdup.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t a, uint32_t b) ++ { ++ return viwdupq_u8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "viwdup.u8" } } */ +++/* +++**foo2: +++** ... +++** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 () +++{ +++ return viwdupq_u8 (1, 1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint32_t * a, uint32_t b) +++foo (uint32_t *a, uint32_t b) ++ { ++- return viwdupq_wb_u16 (a, b, 4); +++ return viwdupq_wb_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "viwdup.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint32_t * a, uint32_t b) +++foo1 (uint32_t *a, uint32_t b) ++ { ++- return viwdupq_u16 (a, b, 4); +++ return viwdupq_u16 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** viwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 () +++{ +++ return viwdupq_u16 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "viwdup.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t * a, uint32_t b) +++foo (uint32_t *a, uint32_t b) ++ { ++- return viwdupq_wb_u32 (a, b, 8); +++ return viwdupq_wb_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "viwdup.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32_t * a, uint32_t b) +++foo1 (uint32_t *a, uint32_t b) ++ { ++- return viwdupq_u32 (a, b, 8); +++ return viwdupq_u32 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** viwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 () +++{ +++ return viwdupq_u32 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "viwdup.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint32_t * a, uint32_t b) +++foo (uint32_t *a, uint32_t b) ++ { ++- return viwdupq_wb_u8 (a, b, 2); +++ return viwdupq_wb_u8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "viwdup.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint32_t * a, uint32_t b) +++foo1 (uint32_t *a, uint32_t b) ++ { ++- return viwdupq_u8 (a, b, 2); +++ return viwdupq_u8 (a, b, 1); +++} +++ +++/* +++**foo2: +++** ... +++** viwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 () +++{ +++ return viwdupq_u8 (1, 1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "viwdup.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_n_u16 (a, b, 2, p); +++ return viwdupq_x_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_u16 (a, b, 2, p); +++ return viwdupq_x_u16 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (mve_pred16_t p) +++{ +++ return viwdupq_x_u16 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_n_u32 (a, b, 4, p); +++ return viwdupq_x_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_u32 (a, b, 4, p); +++ return viwdupq_x_u32 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (mve_pred16_t p) +++{ +++ return viwdupq_x_u32 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_n_u8 (a, b, 8, p); +++ return viwdupq_x_n_u8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint32_t a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_u8 (a, b, 8, p); +++ return viwdupq_x_u8 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (mve_pred16_t p) +++{ +++ return viwdupq_x_u8 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_wb_u16 (a, b, 8, p); +++ return viwdupq_x_wb_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo1 (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_u16 (a, b, 8, p); +++ return viwdupq_x_u16 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (mve_pred16_t p) +++{ +++ return viwdupq_x_u16 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_wb_u32 (a, b, 2, p); +++ return viwdupq_x_wb_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo1 (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_u32 (a, b, 2, p); +++ return viwdupq_x_u32 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (mve_pred16_t p) +++{ +++ return viwdupq_x_u32 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_wb_u8 (a, b, 4, p); +++ return viwdupq_x_wb_u8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint32_t * a, uint32_t b, mve_pred16_t p) +++foo1 (uint32_t *a, uint32_t b, mve_pred16_t p) ++ { ++- return viwdupq_x_u8 (a, b, 4, p); +++ return viwdupq_x_u8 (a, b, 1, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** viwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (mve_pred16_t p) +++{ +++ return viwdupq_x_u8 (1, 1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "viwdupt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16_t const * base) +++foo (float16_t const *base) ++ { ++ return vld1q_f16 (base); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16_t const * base) +++foo1 (float16_t const *base) ++ { ++ return vld1q (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrh.16" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32_t const * base) +++foo (float32_t const *base) ++ { ++ return vld1q_f32 (base); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32_t const * base) +++foo1 (float32_t const *base) ++ { ++ return vld1q (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrw.32" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16_t const * base) +++foo (int16_t const *base) ++ { ++ return vld1q_s16 (base); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16_t const * base) +++foo1 (int16_t const *base) ++ { ++ return vld1q (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrh.16" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32_t const * base) +++foo (int32_t const *base) ++ { ++ return vld1q_s32 (base); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32_t const * base) +++foo1 (int32_t const *base) ++ { ++ return vld1q (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrw.32" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8_t const * base) +++foo (int8_t const *base) ++ { ++ return vld1q_s8 (base); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8_t const * base) +++foo1 (int8_t const *base) ++ { ++ return vld1q (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrb.8" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16_t const * base) +++foo (uint16_t const *base) ++ { ++ return vld1q_u16 (base); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16_t const * base) +++foo1 (uint16_t const *base) ++ { ++ return vld1q (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrh.16" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t const * base) +++foo (uint32_t const *base) ++ { ++ return vld1q_u32 (base); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32_t const * base) +++foo1 (uint32_t const *base) ++ { ++ return vld1q (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrw.32" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c ++@@ -1,20 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8_t const * base) +++foo (uint8_t const *base) ++ { ++ return vld1q_u8 (base); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8_t const * base) +++foo1 (uint8_t const *base) ++ { ++ return vld1q (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrb.8" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16_t const * base, mve_pred16_t p) +++foo (float16_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z_f16 (base, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16_t const * base, mve_pred16_t p) +++foo1 (float16_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 2 } } */ ++-/* { dg-final { scan-assembler-times "vldrht.16" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32_t const * base, mve_pred16_t p) +++foo (float32_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z_f32 (base, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32_t const * base, mve_pred16_t p) +++foo1 (float32_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 2 } } */ ++-/* { dg-final { scan-assembler-times "vldrwt.32" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16_t const * base, mve_pred16_t p) +++foo (int16_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z_s16 (base, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16_t const * base, mve_pred16_t p) +++foo1 (int16_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 2 } } */ ++-/* { dg-final { scan-assembler-times "vldrht.16" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32_t const * base, mve_pred16_t p) +++foo (int32_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z_s32 (base, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32_t const * base, mve_pred16_t p) +++foo1 (int32_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 2 } } */ ++-/* { dg-final { scan-assembler-times "vldrwt.32" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8_t const * base, mve_pred16_t p) +++foo (int8_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z_s8 (base, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8_t const * base, mve_pred16_t p) +++foo1 (int8_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 2 } } */ ++-/* { dg-final { scan-assembler-times "vldrbt.8" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16_t const * base, mve_pred16_t p) +++foo (uint16_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z_u16 (base, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16_t const * base, mve_pred16_t p) +++foo1 (uint16_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 2 } } */ ++-/* { dg-final { scan-assembler-times "vldrht.16" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t const * base, mve_pred16_t p) +++foo (uint32_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z_u32 (base, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32_t const * base, mve_pred16_t p) +++foo1 (uint32_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 2 } } */ ++-/* { dg-final { scan-assembler-times "vldrwt.32" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8_t const * base, mve_pred16_t p) +++foo (uint8_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z_u8 (base, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8_t const * base, mve_pred16_t p) +++foo1 (uint8_t const *base, mve_pred16_t p) ++ { ++ return vld1q_z (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 2 } } */ ++-/* { dg-final { scan-assembler-times "vldrbt.8" 2 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float16x8x2_t ++-foo (float16_t const * addr) +++foo (float16_t const *addr) ++ { ++ return vld2q_f16 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.16" } } */ ++-/* { dg-final { scan-assembler "vld21.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float16x8x2_t ++-foo1 (float16_t const * addr) +++foo1 (float16_t const *addr) ++ { ++ return vld2q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float32x4x2_t ++-foo (float32_t const * addr) +++foo (float32_t const *addr) ++ { ++ return vld2q_f32 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.32" } } */ ++-/* { dg-final { scan-assembler "vld21.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float32x4x2_t ++-foo1 (float32_t const * addr) +++foo1 (float32_t const *addr) ++ { ++ return vld2q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8x2_t ++-foo (int16_t const * addr) +++foo (int16_t const *addr) ++ { ++ return vld2q_s16 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.16" } } */ ++-/* { dg-final { scan-assembler "vld21.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8x2_t ++-foo1 (int16_t const * addr) +++foo1 (int16_t const *addr) ++ { ++ return vld2q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4x2_t ++-foo (int32_t const * addr) +++foo (int32_t const *addr) ++ { ++ return vld2q_s32 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.32" } } */ ++-/* { dg-final { scan-assembler "vld21.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4x2_t ++-foo1 (int32_t const * addr) +++foo1 (int32_t const *addr) ++ { ++ return vld2q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int8x16x2_t ++-foo (int8_t const * addr) +++foo (int8_t const *addr) ++ { ++ return vld2q_s8 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.8" } } */ ++-/* { dg-final { scan-assembler "vld21.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int8x16x2_t ++-foo1 (int8_t const * addr) +++foo1 (int8_t const *addr) ++ { ++ return vld2q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8x2_t ++-foo (uint16_t const * addr) +++foo (uint16_t const *addr) ++ { ++ return vld2q_u16 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.16" } } */ ++-/* { dg-final { scan-assembler "vld21.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8x2_t ++-foo1 (uint16_t const * addr) +++foo1 (uint16_t const *addr) ++ { ++ return vld2q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4x2_t ++-foo (uint32_t const * addr) +++foo (uint32_t const *addr) ++ { ++ return vld2q_u32 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.32" } } */ ++-/* { dg-final { scan-assembler "vld21.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4x2_t ++-foo1 (uint32_t const * addr) +++foo1 (uint32_t const *addr) ++ { ++ return vld2q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint8x16x2_t ++-foo (uint8_t const * addr) +++foo (uint8_t const *addr) ++ { ++ return vld2q_u8 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.8" } } */ ++-/* { dg-final { scan-assembler "vld21.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint8x16x2_t ++-foo1 (uint8_t const * addr) +++foo1 (uint8_t const *addr) ++ { ++ return vld2q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld20.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c ++@@ -1,24 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ float16x8x4_t ++-foo (float16_t const * addr) +++foo (float16_t const *addr) ++ { ++ return vld4q_f16 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.16" } } */ ++-/* { dg-final { scan-assembler "vld41.16" } } */ ++-/* { dg-final { scan-assembler "vld42.16" } } */ ++-/* { dg-final { scan-assembler "vld43.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ float16x8x4_t ++-foo1 (float16_t const * addr) +++foo1 (float16_t const *addr) ++ { ++ return vld4q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c ++@@ -1,24 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ float32x4x4_t ++-foo (float32_t const * addr) +++foo (float32_t const *addr) ++ { ++ return vld4q_f32 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.32" } } */ ++-/* { dg-final { scan-assembler "vld41.32" } } */ ++-/* { dg-final { scan-assembler "vld42.32" } } */ ++-/* { dg-final { scan-assembler "vld43.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ float32x4x4_t ++-foo1 (float32_t const * addr) +++foo1 (float32_t const *addr) ++ { ++ return vld4q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c ++@@ -1,24 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ int16x8x4_t ++-foo (int16_t const * addr) +++foo (int16_t const *addr) ++ { ++ return vld4q_s16 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.16" } } */ ++-/* { dg-final { scan-assembler "vld41.16" } } */ ++-/* { dg-final { scan-assembler "vld42.16" } } */ ++-/* { dg-final { scan-assembler "vld43.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ int16x8x4_t ++-foo1 (int16_t const * addr) +++foo1 (int16_t const *addr) ++ { ++ return vld4q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c ++@@ -1,24 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ int32x4x4_t ++-foo (int32_t const * addr) +++foo (int32_t const *addr) ++ { ++ return vld4q_s32 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.32" } } */ ++-/* { dg-final { scan-assembler "vld41.32" } } */ ++-/* { dg-final { scan-assembler "vld42.32" } } */ ++-/* { dg-final { scan-assembler "vld43.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ int32x4x4_t ++-foo1 (int32_t const * addr) +++foo1 (int32_t const *addr) ++ { ++ return vld4q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c ++@@ -1,24 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ int8x16x4_t ++-foo (int8_t const * addr) +++foo (int8_t const *addr) ++ { ++ return vld4q_s8 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.8" } } */ ++-/* { dg-final { scan-assembler "vld41.8" } } */ ++-/* { dg-final { scan-assembler "vld42.8" } } */ ++-/* { dg-final { scan-assembler "vld43.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vld40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ int8x16x4_t ++-foo1 (int8_t const * addr) +++foo1 (int8_t const *addr) ++ { ++ return vld4q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c ++@@ -1,24 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ uint16x8x4_t ++-foo (uint16_t const * addr) +++foo (uint16_t const *addr) ++ { ++ return vld4q_u16 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.16" } } */ ++-/* { dg-final { scan-assembler "vld41.16" } } */ ++-/* { dg-final { scan-assembler "vld42.16" } } */ ++-/* { dg-final { scan-assembler "vld43.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ uint16x8x4_t ++-foo1 (uint16_t const * addr) +++foo1 (uint16_t const *addr) ++ { ++ return vld4q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c ++@@ -1,24 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ uint32x4x4_t ++-foo (uint32_t const * addr) +++foo (uint32_t const *addr) ++ { ++ return vld4q_u32 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.32" } } */ ++-/* { dg-final { scan-assembler "vld41.32" } } */ ++-/* { dg-final { scan-assembler "vld42.32" } } */ ++-/* { dg-final { scan-assembler "vld43.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ uint32x4x4_t ++-foo1 (uint32_t const * addr) +++foo1 (uint32_t const *addr) ++ { ++ return vld4q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c ++@@ -1,24 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vld40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ uint8x16x4_t ++-foo (uint8_t const * addr) +++foo (uint8_t const *addr) ++ { ++ return vld4q_u8 (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.8" } } */ ++-/* { dg-final { scan-assembler "vld41.8" } } */ ++-/* { dg-final { scan-assembler "vld42.8" } } */ ++-/* { dg-final { scan-assembler "vld43.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vld40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vld43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ uint8x16x4_t ++-foo1 (uint8_t const * addr) +++foo1 (uint8_t const *addr) ++ { ++ return vld4q (addr); ++ } ++ ++-/* { dg-final { scan-assembler "vld40.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int8_t const * base, uint16x8_t offset) +++foo (int8_t const *base, uint16x8_t offset) ++ { ++ return vldrbq_gather_offset_s16 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrb.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int8_t const * base, uint16x8_t offset) +++foo1 (int8_t const *base, uint16x8_t offset) ++ { ++ return vldrbq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int8_t const * base, uint32x4_t offset) +++foo (int8_t const *base, uint32x4_t offset) ++ { ++ return vldrbq_gather_offset_s32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrb.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int8_t const * base, uint32x4_t offset) +++foo1 (int8_t const *base, uint32x4_t offset) ++ { ++ return vldrbq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8_t const * base, uint8x16_t offset) +++foo (int8_t const *base, uint8x16_t offset) ++ { ++ return vldrbq_gather_offset_s8 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrb.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8_t const * base, uint8x16_t offset) +++foo1 (int8_t const *base, uint8x16_t offset) ++ { ++ return vldrbq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint8_t const * base, uint16x8_t offset) +++foo (uint8_t const *base, uint16x8_t offset) ++ { ++ return vldrbq_gather_offset_u16 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrb.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint8_t const * base, uint16x8_t offset) +++foo1 (uint8_t const *base, uint16x8_t offset) ++ { ++ return vldrbq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint8_t const * base, uint32x4_t offset) +++foo (uint8_t const *base, uint32x4_t offset) ++ { ++ return vldrbq_gather_offset_u32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrb.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint8_t const * base, uint32x4_t offset) +++foo1 (uint8_t const *base, uint32x4_t offset) ++ { ++ return vldrbq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8_t const * base, uint8x16_t offset) +++foo (uint8_t const *base, uint8x16_t offset) ++ { ++ return vldrbq_gather_offset_u8 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrb.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8_t const * base, uint8x16_t offset) +++foo1 (uint8_t const *base, uint8x16_t offset) ++ { ++ return vldrbq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int8_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo (int8_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z_s16 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int8_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo1 (int8_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int8_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (int8_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z_s32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int8_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (int8_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8_t const * base, uint8x16_t offset, mve_pred16_t p) +++foo (int8_t const *base, uint8x16_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z_s8 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8_t const * base, uint8x16_t offset, mve_pred16_t p) +++foo1 (int8_t const *base, uint8x16_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint8_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo (uint8_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z_u16 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint8_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo1 (uint8_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint8_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (uint8_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z_u32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint8_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (uint8_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8_t const * base, uint8x16_t offset, mve_pred16_t p) +++foo (uint8_t const *base, uint8x16_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z_u8 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8_t const * base, uint8x16_t offset, mve_pred16_t p) +++foo1 (uint8_t const *base, uint8x16_t offset, mve_pred16_t p) ++ { ++ return vldrbq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int8_t const * base) +++foo (int8_t const *base) ++ { ++ return vldrbq_s16 (base); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int8_t const * base) +++foo (int8_t const *base) ++ { ++ return vldrbq_s32 (base); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8_t const * base) +++foo (int8_t const *base) ++ { ++ return vldrbq_s8 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrb.8" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint8_t const * base) +++foo (uint8_t const *base) ++ { ++ return vldrbq_u16 (base); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint8_t const * base) +++foo (uint8_t const *base) ++ { ++ return vldrbq_u32 (base); ++ } ++ ++-/* { dg-final { scan-assembler "vldrb.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8_t const * base) +++foo (uint8_t const *base) ++ { ++ return vldrbq_u8 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrb.8" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c ++@@ -1,13 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int8_t const * base, mve_pred16_t p) +++foo (int8_t const *base, mve_pred16_t p) ++ { ++ return vldrbq_z_s16 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c ++@@ -1,13 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int8_t const * base, mve_pred16_t p) +++foo (int8_t const *base, mve_pred16_t p) ++ { ++ return vldrbq_z_s32 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8_t const * base, mve_pred16_t p) +++foo (int8_t const *base, mve_pred16_t p) ++ { ++ return vldrbq_z_s8 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrbt.8" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c ++@@ -1,13 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint8_t const * base, mve_pred16_t p) +++foo (uint8_t const *base, mve_pred16_t p) ++ { ++ return vldrbq_z_u16 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c ++@@ -1,13 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint8_t const * base, mve_pred16_t p) +++foo (uint8_t const *base, mve_pred16_t p) ++ { ++ return vldrbq_z_u32 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrbt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8_t const * base, mve_pred16_t p) +++foo (uint8_t const *base, mve_pred16_t p) ++ { ++ return vldrbq_z_u8 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrbt.8" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrd.64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (uint64x2_t addr) ++ { ++- return vldrdq_gather_base_s64 (addr, 8); +++ return vldrdq_gather_base_s64 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrd.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrd.64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint64x2_t addr) ++ { ++- return vldrdq_gather_base_u64 (addr, 8); +++ return vldrdq_gather_base_u64 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrd.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c ++@@ -1,16 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrd.64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ int64x2_t ++-foo (uint64x2_t * addr) +++foo (uint64x2_t *addr) ++ { ++- return vldrdq_gather_base_wb_s64 (addr, 8); +++ return vldrdq_gather_base_wb_s64 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrd.64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */ ++-/* { dg-final { scan-assembler-times "vstrw.32" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c ++@@ -1,16 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrd.64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++-foo (uint64x2_t * addr) +++foo (uint64x2_t *addr) ++ { ++- return vldrdq_gather_base_wb_u64 (addr, 8); +++ return vldrdq_gather_base_wb_u64 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrd.64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */ ++-/* { dg-final { scan-assembler-times "vstrw.32" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ +++ ++ #include "arm_mve.h" ++ ++-int64x2_t foo (uint64x2_t * addr, mve_pred16_t p) +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ +++int64x2_t +++foo (uint64x2_t *addr, mve_pred16_t p) ++ { ++- return vldrdq_gather_base_wb_z_s64 (addr, 1016, p); +++ return vldrdq_gather_base_wb_z_s64 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vldrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */ ++-/* { dg-final { scan-assembler-times "vstrw.32" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ +++ ++ #include "arm_mve.h" ++ ++-uint64x2_t foo (uint64x2_t * addr, mve_pred16_t p) +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ +++uint64x2_t +++foo (uint64x2_t *addr, mve_pred16_t p) ++ { ++- return vldrdq_gather_base_wb_z_u64 (addr, 8, p); +++ return vldrdq_gather_base_wb_z_u64 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vldrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */ ++-/* { dg-final { scan-assembler-times "vstrw.32" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c ++@@ -1,13 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (uint64x2_t addr, mve_pred16_t p) ++ { ++- return vldrdq_gather_base_z_s64 (addr, 8, p); +++ return vldrdq_gather_base_z_s64 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c ++@@ -1,13 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint64x2_t addr, mve_pred16_t p) ++ { ++- return vldrdq_gather_base_z_u64 (addr, 8, p); +++ return vldrdq_gather_base_z_u64 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++-foo (int64_t const * base, uint64x2_t offset) +++foo (int64_t const *base, uint64x2_t offset) ++ { ++ return vldrdq_gather_offset_s64 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrd.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++-foo1 (int64_t const * base, uint64x2_t offset) +++foo1 (int64_t const *base, uint64x2_t offset) ++ { ++ return vldrdq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrd.u64" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++-foo (uint64_t const * base, uint64x2_t offset) +++foo (uint64_t const *base, uint64x2_t offset) ++ { ++ return vldrdq_gather_offset_u64 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrd.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++-foo1 (uint64_t const * base, uint64x2_t offset) +++foo1 (uint64_t const *base, uint64x2_t offset) ++ { ++ return vldrdq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrd.u64" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++-foo (int64_t const * base, uint64x2_t offset, mve_pred16_t p) +++foo (int64_t const *base, uint64x2_t offset, mve_pred16_t p) ++ { ++ return vldrdq_gather_offset_z_s64 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++-foo1 (int64_t const * base, uint64x2_t offset, mve_pred16_t p) +++foo1 (int64_t const *base, uint64x2_t offset, mve_pred16_t p) ++ { ++ return vldrdq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++-foo (uint64_t const * base, uint64x2_t offset, mve_pred16_t p) +++foo (uint64_t const *base, uint64x2_t offset, mve_pred16_t p) ++ { ++ return vldrdq_gather_offset_z_u64 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++-foo1 (uint64_t const * base, uint64x2_t offset, mve_pred16_t p) +++foo1 (uint64_t const *base, uint64x2_t offset, mve_pred16_t p) ++ { ++ return vldrdq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++-foo (int64_t const * base, uint64x2_t offset) +++foo (int64_t const *base, uint64x2_t offset) ++ { ++ return vldrdq_gather_shifted_offset_s64 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrd.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++-foo1 (int64_t const * base, uint64x2_t offset) +++foo1 (int64_t const *base, uint64x2_t offset) ++ { ++ return vldrdq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrd.u64" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++-foo (uint64_t const * base, uint64x2_t offset) +++foo (uint64_t const *base, uint64x2_t offset) ++ { ++ return vldrdq_gather_shifted_offset_u64 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrd.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++-foo1 (uint64_t const * base, uint64x2_t offset) +++foo1 (uint64_t const *base, uint64x2_t offset) ++ { ++ return vldrdq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrd.u64" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++-foo (int64_t const * base, uint64x2_t offset, mve_pred16_t p) +++foo (int64_t const *base, uint64x2_t offset, mve_pred16_t p) ++ { ++ return vldrdq_gather_shifted_offset_z_s64 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ int64x2_t ++-foo1 (int64_t const * base, uint64x2_t offset, mve_pred16_t p) +++foo1 (int64_t const *base, uint64x2_t offset, mve_pred16_t p) ++ { ++ return vldrdq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++-foo (uint64_t const * base, uint64x2_t offset, mve_pred16_t p) +++foo (uint64_t const *base, uint64x2_t offset, mve_pred16_t p) ++ { ++ return vldrdq_gather_shifted_offset_z_u64 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ uint64x2_t ++-foo1 (uint64_t const * base, uint64x2_t offset, mve_pred16_t p) +++foo1 (uint64_t const *base, uint64x2_t offset, mve_pred16_t p) ++ { ++ return vldrdq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrdt.u64" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16_t const * base) +++foo (float16_t const *base) ++ { ++ return vldrhq_f16 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrh.16" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16_t const * base, uint16x8_t offset) +++foo (float16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_offset_f16 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16_t const * base, uint16x8_t offset) +++foo1 (float16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16_t const * base, uint16x8_t offset) +++foo (int16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_offset_s16 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16_t const * base, uint16x8_t offset) +++foo1 (int16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int16_t const * base, uint32x4_t offset) +++foo (int16_t const *base, uint32x4_t offset) ++ { ++ return vldrhq_gather_offset_s32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int16_t const * base, uint32x4_t offset) +++foo1 (int16_t const *base, uint32x4_t offset) ++ { ++ return vldrhq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16_t const * base, uint16x8_t offset) +++foo (uint16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_offset_u16 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16_t const * base, uint16x8_t offset) +++foo1 (uint16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint16_t const * base, uint32x4_t offset) +++foo (uint16_t const *base, uint32x4_t offset) ++ { ++ return vldrhq_gather_offset_u32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint16_t const * base, uint32x4_t offset) +++foo1 (uint16_t const *base, uint32x4_t offset) ++ { ++ return vldrhq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo (float16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z_f16 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo1 (float16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo (int16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z_s16 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo1 (int16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int16_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (int16_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z_s32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int16_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (int16_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo (uint16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z_u16 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo1 (uint16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint16_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (uint16_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z_u32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint16_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (uint16_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16_t const * base, uint16x8_t offset) +++foo (float16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_shifted_offset_f16 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16_t const * base, uint16x8_t offset) +++foo1 (float16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16_t const * base, uint16x8_t offset) +++foo (int16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_shifted_offset_s16 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16_t const * base, uint16x8_t offset) +++foo1 (int16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int16_t const * base, uint32x4_t offset) +++foo (int16_t const *base, uint32x4_t offset) ++ { ++ return vldrhq_gather_shifted_offset_s32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int16_t const * base, uint32x4_t offset) +++foo1 (int16_t const *base, uint32x4_t offset) ++ { ++ return vldrhq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16_t const * base, uint16x8_t offset) +++foo (uint16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_shifted_offset_u16 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16_t const * base, uint16x8_t offset) +++foo1 (uint16_t const *base, uint16x8_t offset) ++ { ++ return vldrhq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint16_t const * base, uint32x4_t offset) +++foo (uint16_t const *base, uint32x4_t offset) ++ { ++ return vldrhq_gather_shifted_offset_u32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint16_t const * base, uint32x4_t offset) +++foo1 (uint16_t const *base, uint32x4_t offset) ++ { ++ return vldrhq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrh.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo (float16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z_f16 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo1 (float16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo1 (float16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo (int16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z_s16 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo1 (int16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int16_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (int16_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z_s32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int16_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (int16_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo (uint16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z_u16 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16_t const * base, uint16x8_t offset, mve_pred16_t p) +++foo1 (uint16_t const *base, uint16x8_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint16_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (uint16_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z_u32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint16_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (uint16_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrhq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrht.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16_t const * base) +++foo (int16_t const *base) ++ { ++ return vldrhq_s16 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrh.16" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int16_t const * base) +++foo (int16_t const *base) ++ { ++ return vldrhq_s32 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrh.s32" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16_t const * base) +++foo (uint16_t const *base) ++ { ++ return vldrhq_u16 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrh.16" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint16_t const * base) +++foo (uint16_t const *base) ++ { ++ return vldrhq_u32 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrh.u32" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float16x8_t ++-foo (float16_t const * base, mve_pred16_t p) +++foo (float16_t const *base, mve_pred16_t p) ++ { ++ return vldrhq_z_f16 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrht.16" 1 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16_t const * base, mve_pred16_t p) +++foo (int16_t const *base, mve_pred16_t p) ++ { ++ return vldrhq_z_s16 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrht.16" 1 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int16_t const * base, mve_pred16_t p) +++foo (int16_t const *base, mve_pred16_t p) ++ { ++ return vldrhq_z_s32 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrht.s32" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16_t const * base, mve_pred16_t p) +++foo (uint16_t const *base, mve_pred16_t p) ++ { ++ return vldrhq_z_u16 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrht.16" 1 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint16_t const * base, mve_pred16_t p) +++foo (uint16_t const *base, mve_pred16_t p) ++ { ++ return vldrhq_z_u32 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrht.u32" 1 } } */ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32_t const * base) +++foo (float32_t const *base) ++ { ++ return vldrwq_f32 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrw.32" 1 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (uint32x4_t addr) ++ { ++- return vldrwq_gather_base_f32 (addr, 4); +++ return vldrwq_gather_base_f32 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (uint32x4_t addr) ++ { ++- return vldrwq_gather_base_s32 (addr, 4); +++ return vldrwq_gather_base_s32 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t addr) ++ { ++- return vldrwq_gather_base_u32 (addr, 4); +++ return vldrwq_gather_base_u32 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c ++@@ -1,16 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (uint32x4_t * addr) +++foo (uint32x4_t *addr) ++ { ++- return vldrwq_gather_base_wb_f32 (addr, 8); +++ return vldrwq_gather_base_wb_f32 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++-/* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c ++@@ -1,16 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (uint32x4_t * addr) +++foo (uint32x4_t *addr) ++ { ++- return vldrwq_gather_base_wb_s32 (addr, 8); +++ return vldrwq_gather_base_wb_s32 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++-/* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c ++@@ -1,16 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t * addr) +++foo (uint32x4_t *addr) ++ { ++- return vldrwq_gather_base_wb_u32 (addr, 8); +++ return vldrwq_gather_base_wb_u32 (addr, 0); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++-/* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c ++@@ -1,18 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (uint32x4_t * addr, mve_pred16_t p) +++foo (uint32x4_t *addr, mve_pred16_t p) ++ { ++- return vldrwq_gather_base_wb_z_f32 (addr, 8, p); +++ return vldrwq_gather_base_wb_z_f32 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++-/* { dg-final { scan-assembler "vmsr\t P0, r\[0-9\]+.*" } } */ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c ++@@ -1,18 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (uint32x4_t * addr, mve_pred16_t p) +++foo (uint32x4_t *addr, mve_pred16_t p) ++ { ++- return vldrwq_gather_base_wb_z_s32 (addr, 8, p); +++ return vldrwq_gather_base_wb_z_s32 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++-/* { dg-final { scan-assembler "vmsr\t P0, r\[0-9\]+.*" } } */ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c ++@@ -1,18 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t * addr, mve_pred16_t p) +++foo (uint32x4_t *addr, mve_pred16_t p) ++ { ++- return vldrwq_gather_base_wb_z_u32 (addr, 8, p); +++ return vldrwq_gather_base_wb_z_u32 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++-/* { dg-final { scan-assembler "vmsr\t P0, r\[0-9\]+.*" } } */ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */ ++-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c ++@@ -1,13 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (uint32x4_t addr, mve_pred16_t p) ++ { ++- return vldrwq_gather_base_z_f32 (addr, 4, p); +++ return vldrwq_gather_base_z_f32 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c ++@@ -1,13 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (uint32x4_t addr, mve_pred16_t p) ++ { ++- return vldrwq_gather_base_z_s32 (addr, 4, p); +++ return vldrwq_gather_base_z_s32 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c ++@@ -1,13 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t addr, mve_pred16_t p) ++ { ++- return vldrwq_gather_base_z_u32 (addr, 4, p); +++ return vldrwq_gather_base_z_u32 (addr, 0, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32_t const * base, uint32x4_t offset) +++foo (float32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_offset_f32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32_t const * base, uint32x4_t offset) +++foo1 (float32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32_t const * base, uint32x4_t offset) +++foo (int32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_offset_s32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32_t const * base, uint32x4_t offset) +++foo1 (int32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t const * base, uint32x4_t offset) +++foo (uint32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_offset_u32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32_t const * base, uint32x4_t offset) +++foo1 (uint32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (float32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_offset_z_f32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (float32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (int32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_offset_z_s32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (int32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (uint32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_offset_z_u32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (uint32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32_t const * base, uint32x4_t offset) +++foo (float32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_shifted_offset_f32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32_t const * base, uint32x4_t offset) +++foo1 (float32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32_t const * base, uint32x4_t offset) +++foo (int32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_shifted_offset_s32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32_t const * base, uint32x4_t offset) +++foo1 (int32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t const * base, uint32x4_t offset) +++foo (uint32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_shifted_offset_u32 (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32_t const * base, uint32x4_t offset) +++foo1 (uint32_t const *base, uint32x4_t offset) ++ { ++ return vldrwq_gather_shifted_offset (base, offset); ++ } ++ ++-/* { dg-final { scan-assembler "vldrw.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (float32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_shifted_offset_z_f32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo1 (float32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (float32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (int32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_shifted_offset_z_s32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (int32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo (uint32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_shifted_offset_z_u32 (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32_t const * base, uint32x4_t offset, mve_pred16_t p) +++foo1 (uint32_t const *base, uint32x4_t offset, mve_pred16_t p) ++ { ++ return vldrwq_gather_shifted_offset_z (base, offset, p); ++ } ++ ++-/* { dg-final { scan-assembler "vldrwt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32_t const * base) +++foo (int32_t const *base) ++ { ++ return vldrwq_s32 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrw.32" 1 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c ++@@ -1,14 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t const * base) +++foo (uint32_t const *base) ++ { ++ return vldrwq_u32 (base); ++ } ++ ++-/* { dg-final { scan-assembler-times "vldrw.32" 1 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ float32x4_t ++-foo (float32_t const * base, mve_pred16_t p) +++foo (float32_t const *base, mve_pred16_t p) ++ { ++ return vldrwq_z_f32 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrwt.32" 1 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32_t const * base, mve_pred16_t p) +++foo (int32_t const *base, mve_pred16_t p) ++ { ++ return vldrwq_z_s32 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrwt.32" 1 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c ++@@ -1,15 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32_t const * base, mve_pred16_t p) +++foo (uint32_t const *base, mve_pred16_t p) ++ { ++ return vldrwq_z_u32 (base, p); ++ } ++ ++-/* { dg-final { scan-assembler-times "vpst" 1 } } */ ++-/* { dg-final { scan-assembler-times "vldrwt.32" 1 } } */ +++#ifdef __cplusplus +++} +++#endif +++ ++ /* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxat.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmaxaq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxat.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxat.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmaxaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxat.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmaxaq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxat.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmaxaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxat.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmaxaq_m_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxat.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxat.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmaxaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxa.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b) ++ { ++ return vmaxaq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxa.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmaxa.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int16x8_t b) ++ { ++ return vmaxaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxa.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxa.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b) ++ { ++ return vmaxaq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxa.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmaxa.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32x4_t b) ++ { ++ return vmaxaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxa.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxa.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b) ++ { ++ return vmaxaq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxa.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmaxa.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int8x16_t b) ++ { ++ return vmaxaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxa.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo (uint16_t a, int16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo1 (uint16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmaxavq_p (a, b, p); ++ } ++ ++- ++-int16_t ++-foo2 (uint8_t a, int16x8_t b, mve_pred16_t p) +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint16_t +++foo2 (int16x8_t b, mve_pred16_t p) ++ { ++- return vmaxavq_p (a, b, p); +++ return vmaxavq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxavt.s16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmaxavq_p (a, b, p); ++ } ++ ++- ++-int32_t ++-foo2 (uint16_t a, int32x4_t b, mve_pred16_t p) +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int32x4_t b, mve_pred16_t p) ++ { ++- return vmaxavq_p (a, b, p); +++ return vmaxavq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxavt.s32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo (uint8_t a, int8x16_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo1 (uint8_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmaxavq_p (a, b, p); ++ } ++ ++- ++-int8_t ++-foo2 (uint32_t a, int8x16_t b, mve_pred16_t p) +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint8_t +++foo2 (int8x16_t b, mve_pred16_t p) ++ { ++- return vmaxavq_p (a, b, p); +++ return vmaxavq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxavt.s8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxav.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo (uint16_t a, int16x8_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint16_t a, int16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxav.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo1 (uint16_t a, int16x8_t b) ++ { ++ return vmaxavq (a, b); ++ } ++ ++- ++-int16_t ++-foo2 (uint8_t a, int16x8_t b) +++/* +++**foo2: +++** ... +++** vmaxav.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint16_t +++foo2 (int16x8_t b) ++ { ++- return vmaxavq (a, b); +++ return vmaxavq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxav.s16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxav.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int32x4_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint32_t a, int32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxav.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int32x4_t b) ++ { ++ return vmaxavq (a, b); ++ } ++ ++- ++-int32_t ++-foo2 (uint16_t a, int32x4_t b) +++/* +++**foo2: +++** ... +++** vmaxav.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int32x4_t b) ++ { ++- return vmaxavq (a, b); +++ return vmaxavq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxav.s32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxav.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo (uint8_t a, int8x16_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint8_t a, int8x16_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxav.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo1 (uint8_t a, int8x16_t b) ++ { ++ return vmaxavq (a, b); ++ } ++ ++- ++-int8_t ++-foo2 (uint32_t a, int8x16_t b) +++/* +++**foo2: +++** ... +++** vmaxav.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint8_t +++foo2 (int8x16_t b) ++ { ++- return vmaxavq (a, b); +++ return vmaxavq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxav.s8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxnma.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vmaxnmaq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxnma.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmaxnma.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vmaxnmaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxnma.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxnma.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vmaxnmaq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxnma.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmaxnma.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vmaxnmaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxnma.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmat.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmaxnmaq_m_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxnmat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmat.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmaxnmaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmat.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmaxnmaq_m_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxnmat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmat.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmaxnmaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16_t ++-foo1 (float16_t a, float16x8_t b) ++-{ ++- return vmaxnmavq (a, b); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxnmav.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo (float16_t a, float16x8_t b) ++ { ++@@ -11,18 +22,32 @@ foo (float16_t a, float16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxnmav.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo1 (float16_t a, float16x8_t b) ++ { ++ return vmaxnmavq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmaxnmav.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++-foo2 (float32_t a, float16x8_t b) +++foo2 (float16x8_t b) ++ { ++- return vmaxnmavq (a, b); +++ return vmaxnmavq (1.1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxnmav.f16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32_t ++-foo1 (float32_t a, float32x4_t b) ++-{ ++- return vmaxnmavq (a, b); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxnmav.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo (float32_t a, float32x4_t b) ++ { ++@@ -11,18 +22,32 @@ foo (float32_t a, float32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxnmav.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo1 (float32_t a, float32x4_t b) ++ { ++ return vmaxnmavq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmaxnmav.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++-foo2 (float16_t a, float32x4_t b) +++foo2 (float32x4_t b) ++ { ++- return vmaxnmavq (a, b); +++ return vmaxnmavq (1.1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxnmav.f32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16_t ++-foo1 (float16_t a, float16x8_t b, mve_pred16_t p) ++-{ ++- return vmaxnmavq_p (a, b, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmavt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo (float16_t a, float16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmavt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo1 (float16_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmaxnmavq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmavt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++-foo2 (float32_t a, float16x8_t b, mve_pred16_t p) +++foo2 (float16x8_t b, mve_pred16_t p) ++ { ++- return vmaxnmavq_p (a, b, p); +++ return vmaxnmavq_p (1.1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxnmavt.f16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32_t ++-foo1 (float32_t a, float32x4_t b, mve_pred16_t p) ++-{ ++- return vmaxnmavq_p (a, b, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmavt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo (float32_t a, float32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmavt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo1 (float32_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmaxnmavq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmavt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++-foo2 (float16_t a, float32x4_t b, mve_pred16_t p) +++foo2 (float32x4_t b, mve_pred16_t p) ++ { ++- return vmaxnmavq_p (a, b, p); +++ return vmaxnmavq_p (1.1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxnmavt.f32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxnm.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vmaxnmq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxnm.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmaxnm.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vmaxnmq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxnm.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxnm.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vmaxnmq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxnm.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmaxnm.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vmaxnmq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmaxnm.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmaxnmq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxnmt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmaxnmq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxnmt.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmaxnmq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxnmt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmaxnmq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxnmt.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmaxnmq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxnmt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmaxnmq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmaxnmq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxnmt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmaxnmq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16_t ++-foo1 (float16_t a, float16x8_t b) ++-{ ++- return vmaxnmvq (23.35, b); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxnmv.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo (float16_t a, float16x8_t b) ++ { ++@@ -11,18 +22,32 @@ foo (float16_t a, float16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxnmv.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo1 (float16_t a, float16x8_t b) ++ { ++ return vmaxnmvq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmaxnmv.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++-foo2 (float32_t a, float16x8_t b) +++foo2 (float16x8_t b) ++ { ++- return vmaxnmvq (a, b); +++ return vmaxnmvq (1.1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxnmv.f16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32_t ++-foo1 (float32_t a, float32x4_t b) ++-{ ++- return vmaxnmvq (34.56, b); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxnmv.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo (float32_t a, float32x4_t b) ++ { ++@@ -11,18 +22,32 @@ foo (float32_t a, float32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxnmv.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo1 (float32_t a, float32x4_t b) ++ { ++ return vmaxnmvq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmaxnmv.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++-foo2 (float16_t a, float32x4_t b) +++foo2 (float32x4_t b) ++ { ++- return vmaxnmvq (a, b); +++ return vmaxnmvq (1.1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxnmv.f32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16_t ++-foo1 (float16_t a, float16x8_t b, mve_pred16_t p) ++-{ ++- return vmaxnmvq_p (a, b, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmvt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo (float16_t a, float16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmvt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo1 (float16_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmaxnmvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmvt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++-foo2 (float32_t a, float16x8_t b, mve_pred16_t p) +++foo2 (float16x8_t b, mve_pred16_t p) ++ { ++- return vmaxnmvq_p (a, b, p); +++ return vmaxnmvq_p (1.1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxnmvt.f16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32_t ++-foo1 (float32_t a, float32x4_t b, mve_pred16_t p) ++-{ ++- return vmaxnmvq_p (a, b, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmvt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo (float32_t a, float32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmvt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo1 (float32_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmaxnmvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxnmvt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++-foo2 (float16_t a, float32x4_t b, mve_pred16_t p) +++foo2 (float32x4_t b, mve_pred16_t p) ++ { ++- return vmaxnmvq_p (a, b, p); +++ return vmaxnmvq_p (1.1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxnmvt.f32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmaxq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmaxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmaxq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmaxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmaxq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmaxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmaxq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmaxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmaxq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmaxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmaxq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmaxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmax.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vmaxq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmax.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vmaxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmax.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vmaxq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmax.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vmaxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmax.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vmaxq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmax.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vmaxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmax.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vmaxq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmax.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vmaxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmax.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vmaxq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmax.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vmaxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmax.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vmaxq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmax.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vmaxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmax.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmaxq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmaxq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmaxq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmaxq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmaxq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmaxq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmaxq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmaxq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmaxq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmaxq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmaxq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmaxt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmaxq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16_t ++ foo (int16_t a, int16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,24 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16_t ++ foo1 (int16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmaxvq_p (a, b, p); ++ } ++ ++- ++-int16_t ++-foo2 (int8_t a, int16x8_t b, mve_pred16_t p) ++-{ ++- return vmaxvq_p (a, b, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxvt.s16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,24 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmaxvq_p (a, b, p); ++ } ++ ++- ++-int32_t ++-foo2 (int16_t a, int32x4_t b, mve_pred16_t p) ++-{ ++- return vmaxvq_p (a, b, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxvt.s32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8_t ++ foo (int8_t a, int8x16_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,24 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8_t ++ foo1 (int8_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmaxvq_p (a, b, p); ++ } ++ ++- ++-int8_t ++-foo2 (int32_t a, int8x16_t b, mve_pred16_t p) ++-{ ++- return vmaxvq_p (a, b, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxvt.s8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo (uint16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmaxvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++-foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p) +++foo2 (uint16x8_t b, mve_pred16_t p) ++ { ++- return vmaxvq_p (a, b, p); +++ return vmaxvq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxvt.u16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmaxvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p) +++foo2 (uint32x4_t b, mve_pred16_t p) ++ { ++- return vmaxvq_p (a, b, p); +++ return vmaxvq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxvt.u32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo (uint8_t a, uint8x16_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmaxvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmaxvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++-foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p) +++foo2 (uint8x16_t b, mve_pred16_t p) ++ { ++- return vmaxvq_p (a, b, p); +++ return vmaxvq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxvt.u8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16_t ++ foo (int16_t a, int16x8_t b) ++ { ++@@ -11,18 +22,20 @@ foo (int16_t a, int16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16_t ++ foo1 (int16_t a, int16x8_t b) ++ { ++ return vmaxvq (a, b); ++ } ++ ++- ++-int16_t ++-foo2 (int8_t a, int16x8_t b) ++-{ ++- return vmaxvq (a, b); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxv.s16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b) ++ { ++@@ -11,18 +22,20 @@ foo (int32_t a, int32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b) ++ { ++ return vmaxvq (a, b); ++ } ++ ++- ++-int32_t ++-foo2 (int16_t a, int32x4_t b) ++-{ ++- return vmaxvq (a, b); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxv.s32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8_t ++ foo (int8_t a, int8x16_t b) ++ { ++@@ -11,18 +22,20 @@ foo (int8_t a, int8x16_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8_t ++ foo1 (int8_t a, int8x16_t b) ++ { ++ return vmaxvq (a, b); ++ } ++ ++- ++-int8_t ++-foo2 (int32_t a, int8x16_t b) ++-{ ++- return vmaxvq (a, b); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxv.s8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo (uint16_t a, uint16x8_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint16_t a, uint16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo1 (uint16_t a, uint16x8_t b) ++ { ++ return vmaxvq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmaxv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++-foo2 (uint32_t a, uint16x8_t b) +++foo2 (uint16x8_t b) ++ { ++- return vmaxvq (a, b); +++ return vmaxvq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxv.u16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint32x4_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint32_t a, uint32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint32x4_t b) ++ { ++ return vmaxvq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmaxv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo2 (uint8_t a, uint32x4_t b) +++foo2 (uint32x4_t b) ++ { ++- return vmaxvq (a, b); +++ return vmaxvq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxv.u32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmaxv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo (uint8_t a, uint8x16_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint8_t a, uint8x16_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmaxv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo1 (uint8_t a, uint8x16_t b) ++ { ++ return vmaxvq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmaxv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++-foo2 (uint16_t a, uint8x16_t b) +++foo2 (uint8x16_t b) ++ { ++- return vmaxvq (a, b); +++ return vmaxvq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vmaxv.u8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminat.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vminaq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminat.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminat.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vminaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminat.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vminaq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminat.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vminaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminat.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vminaq_m_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminat.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminat.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vminaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmina.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b) ++ { ++ return vminaq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmina.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmina.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int16x8_t b) ++ { ++ return vminaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmina.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmina.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b) ++ { ++ return vminaq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmina.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmina.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32x4_t b) ++ { ++ return vminaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmina.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmina.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b) ++ { ++ return vminaq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmina.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmina.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int8x16_t b) ++ { ++ return vminaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmina.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo (uint16_t a, int16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint16_t a, int16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo1 (uint16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vminavq_p (a, b, p); ++ } ++ ++- ++-int16_t ++-foo2 (uint8_t a, int16x8_t b, mve_pred16_t p) +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint16_t +++foo2 (int16x8_t b, mve_pred16_t p) ++ { ++- return vminavq_p (a, b, p); +++ return vminavq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminavt.s16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint32_t a, int32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vminavq_p (a, b, p); ++ } ++ ++- ++-int32_t ++-foo2 (uint16_t a, int32x4_t b, mve_pred16_t p) +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int32x4_t b, mve_pred16_t p) ++ { ++- return vminavq_p (a, b, p); +++ return vminavq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminavt.s32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo (uint8_t a, int8x16_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint8_t a, int8x16_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo1 (uint8_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vminavq_p (a, b, p); ++ } ++ ++- ++-int8_t ++-foo2 (uint32_t a, int8x16_t b, mve_pred16_t p) +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint8_t +++foo2 (int8x16_t b, mve_pred16_t p) ++ { ++- return vminavq_p (a, b, p); +++ return vminavq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminavt.s8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminav.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo (uint16_t a, int16x8_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint16_t a, int16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminav.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo1 (uint16_t a, int16x8_t b) ++ { ++ return vminavq (a, b); ++ } ++ ++- ++-int16_t ++-foo2 (uint8_t a, int16x8_t b) +++/* +++**foo2: +++** ... +++** vminav.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint16_t +++foo2 (int16x8_t b) ++ { ++- return vminavq (a, b); +++ return vminavq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminav.s16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminav.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, int32x4_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint32_t a, int32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminav.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, int32x4_t b) ++ { ++ return vminavq (a, b); ++ } ++ ++- ++-int32_t ++-foo2 (uint16_t a, int32x4_t b) +++/* +++**foo2: +++** ... +++** vminav.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (int32x4_t b) ++ { ++- return vminavq (a, b); +++ return vminavq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminav.s32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminav.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo (uint8_t a, int8x16_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint8_t a, int8x16_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminav.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo1 (uint8_t a, int8x16_t b) ++ { ++ return vminavq (a, b); ++ } ++ ++- ++-int8_t ++-foo2 (uint32_t a, int8x16_t b) +++/* +++**foo2: +++** ... +++** vminav.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint8_t +++foo2 (int8x16_t b) ++ { ++- return vminavq (a, b); +++ return vminavq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminav.s8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminnma.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vminnmaq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vminnma.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vminnma.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vminnmaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vminnma.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminnma.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vminnmaq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vminnma.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vminnma.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vminnmaq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vminnma.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmat.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vminnmaq_m_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminnmat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmat.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vminnmaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmat.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vminnmaq_m_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminnmat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmat.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vminnmaq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16_t ++-foo1 (float16_t a, float16x8_t b) ++-{ ++- return vminnmavq (a, b); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminnmav.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo (float16_t a, float16x8_t b) ++ { ++@@ -11,18 +22,32 @@ foo (float16_t a, float16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminnmav.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo1 (float16_t a, float16x8_t b) ++ { ++ return vminnmavq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vminnmav.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++-foo2 (float32_t a, float16x8_t b) +++foo2 (float16x8_t b) ++ { ++- return vminnmavq (a, b); +++ return vminnmavq (1.1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminnmav.f16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32_t ++-foo1 (float32_t a, float32x4_t b) ++-{ ++- return vminnmavq (a, b); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminnmav.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo (float32_t a, float32x4_t b) ++ { ++@@ -11,18 +22,32 @@ foo (float32_t a, float32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminnmav.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo1 (float32_t a, float32x4_t b) ++ { ++ return vminnmavq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vminnmav.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++-foo2 (float16_t a, float32x4_t b) +++foo2 (float32x4_t b) ++ { ++- return vminnmavq (a, b); +++ return vminnmavq (1.1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminnmav.f32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16_t ++-foo1 (float16_t a, float16x8_t b, mve_pred16_t p) ++-{ ++- return vminnmavq_p (a, b, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmavt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo (float16_t a, float16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmavt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo1 (float16_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vminnmavq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmavt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++-foo2 (float32_t a, float16x8_t b, mve_pred16_t p) +++foo2 (float16x8_t b, mve_pred16_t p) ++ { ++- return vminnmavq_p (a, b, p); +++ return vminnmavq_p (1.1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminnmavt.f16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32_t ++-foo1 (float32_t a, float32x4_t b, mve_pred16_t p) ++-{ ++- return vminnmavq_p (a, b, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmavt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo (float32_t a, float32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmavt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo1 (float32_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vminnmavq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmavt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++-foo2 (float16_t a, float32x4_t b, mve_pred16_t p) +++foo2 (float32x4_t b, mve_pred16_t p) ++ { ++- return vminnmavq_p (a, b, p); +++ return vminnmavq_p (1.1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminnmavt.f32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminnm.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vminnmq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vminnm.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vminnm.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vminnmq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vminnm.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminnm.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vminnmq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vminnm.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vminnm.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vminnmq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vminnm.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vminnmq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminnmt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vminnmq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminnmt.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vminnmq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminnmt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vminnmq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminnmt.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vminnmq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminnmt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vminnmq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vminnmq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vminnmt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vminnmq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16_t ++-foo1 (float16_t a, float16x8_t b) ++-{ ++- return vminnmvq (a, b); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminnmv.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo (float16_t a, float16x8_t b) ++ { ++@@ -11,18 +22,32 @@ foo (float16_t a, float16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminnmv.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo1 (float16_t a, float16x8_t b) ++ { ++ return vminnmvq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vminnmv.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++-foo2 (float32_t a, float16x8_t b) +++foo2 (float16x8_t b) ++ { ++- return vminnmvq (a, b); +++ return vminnmvq (1.1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminnmv.f16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32_t ++-foo1 (float32_t a, float32x4_t b) ++-{ ++- return vminnmvq (a, b); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminnmv.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo (float32_t a, float32x4_t b) ++ { ++@@ -11,18 +22,32 @@ foo (float32_t a, float32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminnmv.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo1 (float32_t a, float32x4_t b) ++ { ++ return vminnmvq (a, b); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vminnmv.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++-foo2 (float16_t a, float32x4_t b) +++foo2 (float32x4_t b) ++ { ++- return vminnmvq (a, b); +++ return vminnmvq (1.1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminnmv.f32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16_t ++-foo1 (float16_t a, float16x8_t b, mve_pred16_t p) ++-{ ++- return vminnmvq_p (a, b, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmvt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo (float16_t a, float16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (float16_t a, float16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmvt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++ foo1 (float16_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vminnmvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmvt.f16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16_t ++-foo2 (float32_t a, float16x8_t b, mve_pred16_t p) +++foo2 (float16x8_t b, mve_pred16_t p) ++ { ++- return vminnmvq_p (a, b, p); +++ return vminnmvq_p (1.1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminnmvt.f16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32_t ++-foo1 (float32_t a, float32x4_t b, mve_pred16_t p) ++-{ ++- return vminnmvq_p (a, b, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmvt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo (float32_t a, float32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (float32_t a, float32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmvt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++ foo1 (float32_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vminnmvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminnmvt.f32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32_t ++-foo2 (float16_t a, float32x4_t b, mve_pred16_t p) +++foo2 (float32x4_t b, mve_pred16_t p) ++ { ++- return vminnmvq_p (a, b, p); +++ return vminnmvq_p (1.1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminnmvt.f32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vminq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vminq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vminq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vminq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vminq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vminq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vminq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vminq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vminq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vminq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vminq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vminq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmin.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vminq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmin.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vminq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmin.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vminq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmin.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vminq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmin.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vminq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmin.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vminq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmin.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vminq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmin.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vminq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmin.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vminq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmin.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vminq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmin.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vminq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmin.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vminq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmin.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vminq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vminq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vminq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vminq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vminq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vminq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vminq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vminq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vminq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vminq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vminq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmint.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmint.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vminq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16_t ++ foo (int16_t a, int16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,24 @@ foo (int16_t a, int16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16_t ++ foo1 (int16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vminvq_p (a, b, p); ++ } ++ ++- ++-int16_t ++-foo2 (int8_t a, int16x8_t b, mve_pred16_t p) ++-{ ++- return vminvq_p (a, b, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminvt.s16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,24 @@ foo (int32_t a, int32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vminvq_p (a, b, p); ++ } ++ ++- ++-int32_t ++-foo2 (int16_t a, int32x4_t b, mve_pred16_t p) ++-{ ++- return vminvq_p (a, b, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminvt.s32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8_t ++ foo (int8_t a, int8x16_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,24 @@ foo (int8_t a, int8x16_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8_t ++ foo1 (int8_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vminvq_p (a, b, p); ++ } ++ ++- ++-int8_t ++-foo2 (int32_t a, int8x16_t b, mve_pred16_t p) ++-{ ++- return vminvq_p (a, b, p); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminvt.s8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo (uint16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint16_t a, uint16x8_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo1 (uint16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vminvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++-foo2 (uint32_t a, uint16x8_t b, mve_pred16_t p) +++foo2 (uint16x8_t b, mve_pred16_t p) ++ { ++- return vminvq_p (a, b, p); +++ return vminvq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminvt.u16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint32x4_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint32_t a, uint32x4_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vminvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo2 (uint8_t a, uint32x4_t b, mve_pred16_t p) +++foo2 (uint32x4_t b, mve_pred16_t p) ++ { ++- return vminvq_p (a, b, p); +++ return vminvq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminvt.u32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c ++@@ -1,9 +1,24 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo (uint8_t a, uint8x16_t b, mve_pred16_t p) ++ { ++@@ -11,18 +26,40 @@ foo (uint8_t a, uint8x16_t b, mve_pred16_t p) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo1 (uint8_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vminvq_p (a, b, p); ++ } ++ ++- +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vminvt.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++-foo2 (uint16_t a, uint8x16_t b, mve_pred16_t p) +++foo2 (uint8x16_t b, mve_pred16_t p) ++ { ++- return vminvq_p (a, b, p); +++ return vminvq_p (1, b, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminvt.u8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16_t ++ foo (int16_t a, int16x8_t b) ++ { ++@@ -11,17 +22,20 @@ foo (int16_t a, int16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminv.s16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16_t ++ foo1 (int16_t a, int16x8_t b) ++ { ++ return vminvq (a, b); ++ } ++ ++-int16_t ++-foo2 (int8_t a, int16x8_t b) ++-{ ++- return vminvq (a, b); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminv.s16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b) ++ { ++@@ -11,17 +22,20 @@ foo (int32_t a, int32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminv.s32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b) ++ { ++ return vminvq (a, b); ++ } ++ ++-int32_t ++-foo2 (int8_t a, int32x4_t b) ++-{ ++- return vminvq (a, b); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminv.s32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8_t ++ foo (int8_t a, int8x16_t b) ++ { ++@@ -11,17 +22,20 @@ foo (int8_t a, int8x16_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminv.s8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8_t ++ foo1 (int8_t a, int8x16_t b) ++ { ++ return vminvq (a, b); ++ } ++ ++-int8_t ++-foo2 (int32_t a, int8x16_t b) ++-{ ++- return vminvq (a, b); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminv.s8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo (uint16_t a, uint16x8_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint16_t a, uint16x8_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16_t ++ foo1 (uint16_t a, uint16x8_t b) ++ { ++ return vminvq (a, b); ++ } ++ ++- ++-uint8_t ++-foo2 (uint32_t a, uint16x8_t b) +++/* +++**foo2: +++** ... +++** vminv.u16 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint16_t +++foo2 (uint16x8_t b) ++ { ++- return vminvq (a, b); +++ return vminvq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminv.u16" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo (uint32_t a, uint32x4_t b) ++ { ++@@ -11,17 +22,32 @@ foo (uint32_t a, uint32x4_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++ foo1 (uint32_t a, uint32x4_t b) ++ { ++ return vminvq (a, b); ++ } ++ +++/* +++**foo2: +++** ... +++** vminv.u32 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo2 (uint16_t a, uint32x4_t b) +++foo2 (uint32x4_t b) ++ { ++- return vminvq (a, b); +++ return vminvq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminv.u32" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c ++@@ -1,9 +1,20 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vminv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo (uint8_t a, uint8x16_t b) ++ { ++@@ -11,18 +22,32 @@ foo (uint8_t a, uint8x16_t b) ++ } ++ ++ +++/* +++**foo1: +++** ... +++** vminv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8_t ++ foo1 (uint8_t a, uint8x16_t b) ++ { ++ return vminvq (a, b); ++ } ++ ++- ++-uint16_t ++-foo2 (uint32_t a, uint8x16_t b) +++/* +++**foo2: +++** ... +++** vminv.u8 (?:ip|fp|r[0-9]+), q[0-9]+(?: @.*|) +++** ... +++*/ +++uint8_t +++foo2 (uint8x16_t b) ++ { ++- return vminvq (a, b); +++ return vminvq (1, b); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++-/* { dg-final { scan-assembler-times "vminv.u8" 3 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +++foo (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p_s16 (a, b, c, p); +++ return vmladavaq_p_s16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavat.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +++foo1 (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p (a, b, c, p); +++ return vmladavaq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavat.s16" } } */ ++-/* { dg-final { scan-assembler "vmladavat.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +++foo (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p_s32 (a, b, c, p); +++ return vmladavaq_p_s32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +++foo1 (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p (a, b, c, p); +++ return vmladavaq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavat.s32" } } */ ++-/* { dg-final { scan-assembler "vmladavat.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) +++foo (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p_s8 (a, b, c, p); +++ return vmladavaq_p_s8 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavat.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) +++foo1 (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p (a, b, c, p); +++ return vmladavaq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavat.s8" } } */ ++-/* { dg-final { scan-assembler "vmladavat.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c ++@@ -1,22 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p) +++foo (uint32_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p_u16 (a, b, c, p); +++ return vmladavaq_p_u16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavat.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint32_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p) +++foo1 (uint32_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p (a, b, c, p); +++ return vmladavaq_p (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) +++{ +++ return vmladavaq_p (1, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavat.u16" } } */ ++-/* { dg-final { scan-assembler "vmladavat.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c ++@@ -1,22 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) +++foo (uint32_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p_u32 (a, b, c, p); +++ return vmladavaq_p_u32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavat.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint32_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) +++foo1 (uint32_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p (a, b, c, p); +++ return vmladavaq_p (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) +++{ +++ return vmladavaq_p (1, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavat.u32" } } */ ++-/* { dg-final { scan-assembler "vmladavat.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c ++@@ -1,22 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p) +++foo (uint32_t add, uint8x16_t m1, uint8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p_u8 (a, b, c, p); +++ return vmladavaq_p_u8 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavat.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint32_t a, uint8x16_t b, uint8x16_t c, mve_pred16_t p) +++foo1 (uint32_t add, uint8x16_t m1, uint8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavaq_p (a, b, c, p); +++ return vmladavaq_p (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavat.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p) +++{ +++ return vmladavaq_p (1, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavat.u8" } } */ ++-/* { dg-final { scan-assembler "vmladavat.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladava.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int16x8_t b, int16x8_t c) +++foo (int32_t add, int16x8_t m1, int16x8_t m2) ++ { ++- return vmladavaq_s16 (a, b, c); +++ return vmladavaq_s16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladava.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladava.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int16x8_t b, int16x8_t c) +++foo1 (int32_t add, int16x8_t m1, int16x8_t m2) ++ { ++- return vmladavaq (a, b, c); +++ return vmladavaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladava.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladava.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int32x4_t b, int32x4_t c) +++foo (int32_t add, int32x4_t m1, int32x4_t m2) ++ { ++- return vmladavaq_s32 (a, b, c); +++ return vmladavaq_s32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladava.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladava.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int32x4_t b, int32x4_t c) +++foo1 (int32_t add, int32x4_t m1, int32x4_t m2) ++ { ++- return vmladavaq (a, b, c); +++ return vmladavaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladava.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladava.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int8x16_t b, int8x16_t c) +++foo (int32_t add, int8x16_t m1, int8x16_t m2) ++ { ++- return vmladavaq_s8 (a, b, c); +++ return vmladavaq_s8 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladava.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladava.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int8x16_t b, int8x16_t c) +++foo1 (int32_t add, int8x16_t m1, int8x16_t m2) ++ { ++- return vmladavaq (a, b, c); +++ return vmladavaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladava.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladava.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint32_t a, uint16x8_t b, uint16x8_t c) +++foo (uint32_t add, uint16x8_t m1, uint16x8_t m2) ++ { ++- return vmladavaq_u16 (a, b, c); +++ return vmladavaq_u16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladava.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladava.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint32_t a, uint16x8_t b, uint16x8_t c) +++foo1 (uint32_t add, uint16x8_t m1, uint16x8_t m2) ++ { ++- return vmladavaq (a, b, c); +++ return vmladavaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vmladava.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint16x8_t m1, uint16x8_t m2) +++{ +++ return vmladavaq (1, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladava.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladava.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint32_t a, uint32x4_t b, uint32x4_t c) +++foo (uint32_t add, uint32x4_t m1, uint32x4_t m2) ++ { ++- return vmladavaq_u32 (a, b, c); +++ return vmladavaq_u32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladava.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladava.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint32_t a, uint32x4_t b, uint32x4_t c) +++foo1 (uint32_t add, uint32x4_t m1, uint32x4_t m2) ++ { ++- return vmladavaq (a, b, c); +++ return vmladavaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vmladava.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint32x4_t m1, uint32x4_t m2) +++{ +++ return vmladavaq (1, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladava.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladava.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint32_t a, uint8x16_t b, uint8x16_t c) +++foo (uint32_t add, uint8x16_t m1, uint8x16_t m2) ++ { ++- return vmladavaq_u8 (a, b, c); +++ return vmladavaq_u8 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladava.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladava.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint32_t a, uint8x16_t b, uint8x16_t c) +++foo1 (uint32_t add, uint8x16_t m1, uint8x16_t m2) ++ { ++- return vmladavaq (a, b, c); +++ return vmladavaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vmladava.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32_t +++foo2 (uint8x16_t m1, uint8x16_t m2) +++{ +++ return vmladavaq (1, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladava.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavaxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +++foo (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavaxq_p_s16 (a, b, c, p); +++ return vmladavaxq_p_s16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavaxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavaxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +++foo1 (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavaxq_p (a, b, c, p); +++ return vmladavaxq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavaxt.s16" } } */ ++-/* { dg-final { scan-assembler "vmladavaxt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavaxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +++foo (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavaxq_p_s32 (a, b, c, p); +++ return vmladavaxq_p_s32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavaxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavaxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +++foo1 (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavaxq_p (a, b, c, p); +++ return vmladavaxq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavaxt.s32" } } */ ++-/* { dg-final { scan-assembler "vmladavaxt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavaxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) +++foo (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavaxq_p_s8 (a, b, c, p); +++ return vmladavaxq_p_s8 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavaxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavaxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) +++foo1 (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavaxq_p (a, b, c, p); +++ return vmladavaxq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavaxt.s8" } } */ ++-/* { dg-final { scan-assembler "vmladavaxt.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladavax.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int16x8_t b, int16x8_t c) +++foo (int32_t add, int16x8_t m1, int16x8_t m2) ++ { ++- return vmladavaxq_s16 (a, b, c); +++ return vmladavaxq_s16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavax.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladavax.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int16x8_t b, int16x8_t c) +++foo1 (int32_t add, int16x8_t m1, int16x8_t m2) ++ { ++- return vmladavaxq (a, b, c); +++ return vmladavaxq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavax.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladavax.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int32x4_t b, int32x4_t c) +++foo (int32_t add, int32x4_t m1, int32x4_t m2) ++ { ++- return vmladavaxq_s32 (a, b, c); +++ return vmladavaxq_s32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavax.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladavax.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int32x4_t b, int32x4_t c) +++foo1 (int32_t add, int32x4_t m1, int32x4_t m2) ++ { ++- return vmladavaxq (a, b, c); +++ return vmladavaxq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavax.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladavax.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32_t a, int8x16_t b, int8x16_t c) +++foo (int32_t add, int8x16_t m1, int8x16_t m2) ++ { ++- return vmladavaxq_s8 (a, b, c); +++ return vmladavaxq_s8 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavax.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladavax.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32_t a, int8x16_t b, int8x16_t c) +++foo1 (int32_t add, int8x16_t m1, int8x16_t m2) ++ { ++- return vmladavaxq (a, b, c); +++ return vmladavaxq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavax.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int16x8_t a, int16x8_t b, mve_pred16_t p) +++foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p_s16 (a, b, p); +++ return vmladavq_p_s16 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +++foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p (a, b, p); +++ return vmladavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32x4_t a, int32x4_t b, mve_pred16_t p) +++foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p_s32 (a, b, p); +++ return vmladavq_p_s32 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +++foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p (a, b, p); +++ return vmladavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int8x16_t a, int8x16_t b, mve_pred16_t p) +++foo (int8x16_t m1, int8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p_s8 (a, b, p); +++ return vmladavq_p_s8 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) +++foo1 (int8x16_t m1, int8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p (a, b, p); +++ return vmladavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavt.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) +++foo (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p_u16 (a, b, p); +++ return vmladavq_p_u16 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) +++foo1 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p (a, b, p); +++ return vmladavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) +++foo (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p_u32 (a, b, p); +++ return vmladavq_p_u32 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) +++foo1 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p (a, b, p); +++ return vmladavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) +++foo (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p_u8 (a, b, p); +++ return vmladavq_p_u8 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavt.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) +++foo1 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavq_p (a, b, p); +++ return vmladavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int16x8_t a, int16x8_t b) +++foo (int16x8_t m1, int16x8_t m2) ++ { ++- return vmladavq_s16 (a, b); +++ return vmladavq_s16 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladav.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int16x8_t a, int16x8_t b) +++foo1 (int16x8_t m1, int16x8_t m2) ++ { ++- return vmladavq (a, b); +++ return vmladavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladav.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32x4_t a, int32x4_t b) +++foo (int32x4_t m1, int32x4_t m2) ++ { ++- return vmladavq_s32 (a, b); +++ return vmladavq_s32 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladav.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32x4_t a, int32x4_t b) +++foo1 (int32x4_t m1, int32x4_t m2) ++ { ++- return vmladavq (a, b); +++ return vmladavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladav.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int8x16_t a, int8x16_t b) +++foo (int8x16_t m1, int8x16_t m2) ++ { ++- return vmladavq_s8 (a, b); +++ return vmladavq_s8 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladav.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int8x16_t a, int8x16_t b) +++foo1 (int8x16_t m1, int8x16_t m2) ++ { ++- return vmladavq (a, b); +++ return vmladavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladav.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladav.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint16x8_t a, uint16x8_t b) +++foo (uint16x8_t m1, uint16x8_t m2) ++ { ++- return vmladavq_u16 (a, b); +++ return vmladavq_u16 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladav.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladav.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint16x8_t a, uint16x8_t b) +++foo1 (uint16x8_t m1, uint16x8_t m2) ++ { ++- return vmladavq (a, b); +++ return vmladavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladav.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladav.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint32x4_t a, uint32x4_t b) +++foo (uint32x4_t m1, uint32x4_t m2) ++ { ++- return vmladavq_u32 (a, b); +++ return vmladavq_u32 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladav.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladav.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint32x4_t a, uint32x4_t b) +++foo1 (uint32x4_t m1, uint32x4_t m2) ++ { ++- return vmladavq (a, b); +++ return vmladavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladav.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladav.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo (uint8x16_t a, uint8x16_t b) +++foo (uint8x16_t m1, uint8x16_t m2) ++ { ++- return vmladavq_u8 (a, b); +++ return vmladavq_u8 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladav.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladav.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32_t ++-foo1 (uint8x16_t a, uint8x16_t b) +++foo1 (uint8x16_t m1, uint8x16_t m2) ++ { ++- return vmladavq (a, b); +++ return vmladavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladav.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int16x8_t a, int16x8_t b, mve_pred16_t p) +++foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavxq_p_s16 (a, b, p); +++ return vmladavxq_p_s16 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +++foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmladavxq_p (a, b, p); +++ return vmladavxq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavxt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32x4_t a, int32x4_t b, mve_pred16_t p) +++foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavxq_p_s32 (a, b, p); +++ return vmladavxq_p_s32 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +++foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmladavxq_p (a, b, p); +++ return vmladavxq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavxt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int8x16_t a, int8x16_t b, mve_pred16_t p) +++foo (int8x16_t m1, int8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavxq_p_s8 (a, b, p); +++ return vmladavxq_p_s8 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmladavxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) +++foo1 (int8x16_t m1, int8x16_t m2, mve_pred16_t p) ++ { ++- return vmladavxq_p (a, b, p); +++ return vmladavxq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavxt.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladavx.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int16x8_t a, int16x8_t b) +++foo (int16x8_t m1, int16x8_t m2) ++ { ++- return vmladavxq_s16 (a, b); +++ return vmladavxq_s16 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavx.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladavx.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int16x8_t a, int16x8_t b) +++foo1 (int16x8_t m1, int16x8_t m2) ++ { ++- return vmladavxq (a, b); +++ return vmladavxq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavx.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladavx.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int32x4_t a, int32x4_t b) +++foo (int32x4_t m1, int32x4_t m2) ++ { ++- return vmladavxq_s32 (a, b); +++ return vmladavxq_s32 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladavx.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int32x4_t a, int32x4_t b) +++foo1 (int32x4_t m1, int32x4_t m2) ++ { ++- return vmladavxq (a, b); +++ return vmladavxq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavx.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmladavx.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo (int8x16_t a, int8x16_t b) +++foo (int8x16_t m1, int8x16_t m2) ++ { ++- return vmladavxq_s8 (a, b); +++ return vmladavxq_s8 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmladavx.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmladavx.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++-foo1 (int8x16_t a, int8x16_t b) +++foo1 (int8x16_t m1, int8x16_t m2) ++ { ++- return vmladavxq (a, b); +++ return vmladavxq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmladavx.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +++foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaq_p_s16 (a, b, c, p); +++ return vmlaldavaq_p_s16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavat.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +++foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaq_p (a, b, c, p); +++ return vmlaldavaq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavat.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +++foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaq_p_s32 (a, b, c, p); +++ return vmlaldavaq_p_s32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +++foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaq_p (a, b, c, p); +++ return vmlaldavaq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavat.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo (uint64_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p) +++foo (uint64_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaq_p_u16 (a, b, c, p); +++ return vmlaldavaq_p_u16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavat.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo1 (uint64_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p) +++foo1 (uint64_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaq_p (a, b, c, p); +++ return vmlaldavaq_p (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint64_t +++foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) +++{ +++ return vmlaldavaq_p (1, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavat.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) +++foo (uint64_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaq_p_u32 (a, b, c, p); +++ return vmlaldavaq_p_u32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavat.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) +++foo1 (uint64_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaq_p (a, b, c, p); +++ return vmlaldavaq_p (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint64_t +++foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) +++{ +++ return vmlaldavaq_p (1, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavat.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldava.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int64_t a, int16x8_t b, int16x8_t c) +++foo (int64_t add, int16x8_t m1, int16x8_t m2) ++ { ++- return vmlaldavaq_s16 (a, b, c); +++ return vmlaldavaq_s16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldava.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldava.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int64_t a, int16x8_t b, int16x8_t c) +++foo1 (int64_t add, int16x8_t m1, int16x8_t m2) ++ { ++- return vmlaldavaq (a, b, c); +++ return vmlaldavaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldava.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldava.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int64_t a, int32x4_t b, int32x4_t c) +++foo (int64_t add, int32x4_t m1, int32x4_t m2) ++ { ++- return vmlaldavaq_s32 (a, b, c); +++ return vmlaldavaq_s32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldava.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldava.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int64_t a, int32x4_t b, int32x4_t c) +++foo1 (int64_t add, int32x4_t m1, int32x4_t m2) ++ { ++- return vmlaldavaq (a, b, c); +++ return vmlaldavaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldava.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldava.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo (uint64_t a, uint16x8_t b, uint16x8_t c) +++foo (uint64_t add, uint16x8_t m1, uint16x8_t m2) ++ { ++- return vmlaldavaq_u16 (a, b, c); +++ return vmlaldavaq_u16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldava.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldava.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo1 (uint64_t a, uint16x8_t b, uint16x8_t c) +++foo1 (uint64_t add, uint16x8_t m1, uint16x8_t m2) ++ { ++- return vmlaldavaq (a, b, c); +++ return vmlaldavaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vmlaldava.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint64_t +++foo2 (uint16x8_t m1, uint16x8_t m2) +++{ +++ return vmlaldavaq (1, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldava.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldava.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo (uint64_t a, uint32x4_t b, uint32x4_t c) +++foo (uint64_t add, uint32x4_t m1, uint32x4_t m2) ++ { ++- return vmlaldavaq_u32 (a, b, c); +++ return vmlaldavaq_u32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldava.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldava.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo1 (uint64_t a, uint32x4_t b, uint32x4_t c) +++foo1 (uint64_t add, uint32x4_t m1, uint32x4_t m2) ++ { ++- return vmlaldavaq (a, b, c); +++ return vmlaldavaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vmlaldava.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint64_t +++foo2 (uint32x4_t m1, uint32x4_t m2) +++{ +++ return vmlaldavaq (1, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldava.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +++foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaxq_p_s16 (a, b, c, p); +++ return vmlaldavaxq_p_s16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +++foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaxq_p (a, b, c, p); +++ return vmlaldavaxq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +++foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaxq_p_s32 (a, b, c, p); +++ return vmlaldavaxq_p_s32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +++foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavaxq_p (a, b, c, p); +++ return vmlaldavaxq_p (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int64_t a, int16x8_t b, int16x8_t c) +++foo (int64_t add, int16x8_t m1, int16x8_t m2) ++ { ++- return vmlaldavaxq_s16 (a, b, c); +++ return vmlaldavaxq_s16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavax.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int64_t a, int16x8_t b, int16x8_t c) +++foo1 (int64_t add, int16x8_t m1, int16x8_t m2) ++ { ++- return vmlaldavaxq (a, b, c); +++ return vmlaldavaxq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavax.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int64_t a, int32x4_t b, int32x4_t c) +++foo (int64_t add, int32x4_t m1, int32x4_t m2) ++ { ++- return vmlaldavaxq_s32 (a, b, c); +++ return vmlaldavaxq_s32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavax.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int64_t a, int32x4_t b, int32x4_t c) +++foo1 (int64_t add, int32x4_t m1, int32x4_t m2) ++ { ++- return vmlaldavaxq (a, b, c); +++ return vmlaldavaxq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavax.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int16x8_t a, int16x8_t b, mve_pred16_t p) +++foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavq_p_s16 (a, b, p); +++ return vmlaldavq_p_s16 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +++foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavq_p (a, b, p); +++ return vmlaldavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int32x4_t a, int32x4_t b, mve_pred16_t p) +++foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavq_p_s32 (a, b, p); +++ return vmlaldavq_p_s32 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +++foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavq_p (a, b, p); +++ return vmlaldavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavt.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) +++foo (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavq_p_u16 (a, b, p); +++ return vmlaldavq_p_u16 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavt.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) +++foo1 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavq_p (a, b, p); +++ return vmlaldavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) +++foo (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavq_p_u32 (a, b, p); +++ return vmlaldavq_p_u32 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) +++foo1 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavq_p (a, b, p); +++ return vmlaldavq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldav.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int16x8_t a, int16x8_t b) +++foo (int16x8_t m1, int16x8_t m2) ++ { ++- return vmlaldavq_s16 (a, b); +++ return vmlaldavq_s16 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldav.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldav.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int16x8_t a, int16x8_t b) +++foo1 (int16x8_t m1, int16x8_t m2) ++ { ++- return vmlaldavq (a, b); +++ return vmlaldavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldav.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldav.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int32x4_t a, int32x4_t b) +++foo (int32x4_t m1, int32x4_t m2) ++ { ++- return vmlaldavq_s32 (a, b); +++ return vmlaldavq_s32 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldav.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldav.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int32x4_t a, int32x4_t b) +++foo1 (int32x4_t m1, int32x4_t m2) ++ { ++- return vmlaldavq (a, b); +++ return vmlaldavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldav.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldav.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo (uint16x8_t a, uint16x8_t b) +++foo (uint16x8_t m1, uint16x8_t m2) ++ { ++- return vmlaldavq_u16 (a, b); +++ return vmlaldavq_u16 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldav.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldav.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo1 (uint16x8_t a, uint16x8_t b) +++foo1 (uint16x8_t m1, uint16x8_t m2) ++ { ++- return vmlaldavq (a, b); +++ return vmlaldavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldav.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldav.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo (uint32x4_t a, uint32x4_t b) +++foo (uint32x4_t m1, uint32x4_t m2) ++ { ++- return vmlaldavq_u32 (a, b); +++ return vmlaldavq_u32 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldav.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldav.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++-foo1 (uint32x4_t a, uint32x4_t b) +++foo1 (uint32x4_t m1, uint32x4_t m2) ++ { ++- return vmlaldavq (a, b); +++ return vmlaldavq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldav.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int16x8_t a, int16x8_t b, mve_pred16_t p) +++foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavxq_p_s16 (a, b, p); +++ return vmlaldavxq_p_s16 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +++foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p) ++ { ++- return vmlaldavxq_p (a, b, p); +++ return vmlaldavxq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavxt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int32x4_t a, int32x4_t b, mve_pred16_t p) +++foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavxq_p_s32 (a, b, p); +++ return vmlaldavxq_p_s32 (m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlaldavxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +++foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p) ++ { ++- return vmlaldavxq_p (a, b, p); +++ return vmlaldavxq_p (m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavxt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldavx.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int16x8_t a, int16x8_t b) +++foo (int16x8_t m1, int16x8_t m2) ++ { ++- return vmlaldavxq_s16 (a, b); +++ return vmlaldavxq_s16 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavx.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldavx.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int16x8_t a, int16x8_t b) +++foo1 (int16x8_t m1, int16x8_t m2) ++ { ++- return vmlaldavxq (a, b); +++ return vmlaldavxq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavx.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlaldavx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo (int32x4_t a, int32x4_t b) +++foo (int32x4_t m1, int32x4_t m2) ++ { ++- return vmlaldavxq_s32 (a, b); +++ return vmlaldavxq_s32 (m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmlaldavx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlaldavx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++-foo1 (int32x4_t a, int32x4_t b) +++foo1 (int32x4_t m1, int32x4_t m2) ++ { ++- return vmlaldavxq (a, b); +++ return vmlaldavxq (m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlaldavx.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m_n_s16 (a, b, c, p); +++ return vmlaq_m_n_s16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m (a, b, c, p); +++ return vmlaq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m_n_s32 (a, b, c, p); +++ return vmlaq_m_n_s32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m (a, b, c, p); +++ return vmlaq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m_n_s8 (a, b, c, p); +++ return vmlaq_m_n_s8 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m (a, b, c, p); +++ return vmlaq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p) +++foo (uint16x8_t add, uint16x8_t m1, uint16_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m_n_u16 (a, b, c, p); +++ return vmlaq_m_n_u16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p) +++foo1 (uint16x8_t add, uint16x8_t m1, uint16_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m (a, b, c, p); +++ return vmlaq_m (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t add, uint16x8_t m1, mve_pred16_t p) +++{ +++ return vmlaq_m (add, m1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p) +++foo (uint32x4_t add, uint32x4_t m1, uint32_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m_n_u32 (a, b, c, p); +++ return vmlaq_m_n_u32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p) +++foo1 (uint32x4_t add, uint32x4_t m1, uint32_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m (a, b, c, p); +++ return vmlaq_m (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t add, uint32x4_t m1, mve_pred16_t p) +++{ +++ return vmlaq_m (add, m1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p) +++foo (uint8x16_t add, uint8x16_t m1, uint8_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m_n_u8 (a, b, c, p); +++ return vmlaq_m_n_u8 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p) +++foo1 (uint8x16_t add, uint8x16_t m1, uint8_t m2, mve_pred16_t p) ++ { ++- return vmlaq_m (a, b, c, p); +++ return vmlaq_m (add, m1, m2, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlat.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t add, uint8x16_t m1, mve_pred16_t p) +++{ +++ return vmlaq_m (add, m1, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlat.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmla.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c) +++foo (int16x8_t add, int16x8_t m1, int16_t m2) ++ { ++- return vmlaq_n_s16 (a, b, c); +++ return vmlaq_n_s16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmla.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmla.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c) +++foo1 (int16x8_t add, int16x8_t m1, int16_t m2) ++ { ++- return vmlaq (a, b, c); +++ return vmlaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmla.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmla.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c) +++foo (int32x4_t add, int32x4_t m1, int32_t m2) ++ { ++- return vmlaq_n_s32 (a, b, c); +++ return vmlaq_n_s32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmla.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmla.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c) +++foo1 (int32x4_t add, int32x4_t m1, int32_t m2) ++ { ++- return vmlaq (a, b, c); +++ return vmlaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmla.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmla.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c) +++foo (int8x16_t add, int8x16_t m1, int8_t m2) ++ { ++- return vmlaq_n_s8 (a, b, c); +++ return vmlaq_n_s8 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmla.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmla.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c) +++foo1 (int8x16_t add, int8x16_t m1, int8_t m2) ++ { ++- return vmlaq (a, b, c); +++ return vmlaq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmla.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmla.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16x8_t a, uint16x8_t b, uint16_t c) +++foo (uint16x8_t add, uint16x8_t m1, uint16_t m2) ++ { ++- return vmlaq_n_u16 (a, b, c); +++ return vmlaq_n_u16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmla.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmla.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16x8_t a, uint16x8_t b, uint16_t c) +++foo1 (uint16x8_t add, uint16x8_t m1, uint16_t m2) ++ { ++- return vmlaq (a, b, c); +++ return vmlaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vmla.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t add, uint16x8_t m1) +++{ +++ return vmlaq (add, m1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmla.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmla.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32x4_t b, uint32_t c) +++foo (uint32x4_t add, uint32x4_t m1, uint32_t m2) ++ { ++- return vmlaq_n_u32 (a, b, c); +++ return vmlaq_n_u32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmla.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmla.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32x4_t b, uint32_t c) +++foo1 (uint32x4_t add, uint32x4_t m1, uint32_t m2) ++ { ++- return vmlaq (a, b, c); +++ return vmlaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vmla.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t add, uint32x4_t m1) +++{ +++ return vmlaq (add, m1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmla.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmla.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8x16_t a, uint8x16_t b, uint8_t c) +++foo (uint8x16_t add, uint8x16_t m1, uint8_t m2) ++ { ++- return vmlaq_n_u8 (a, b, c); +++ return vmlaq_n_u8 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vmla.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmla.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8x16_t a, uint8x16_t b, uint8_t c) +++foo1 (uint8x16_t add, uint8x16_t m1, uint8_t m2) ++ { ++- return vmlaq (a, b, c); +++ return vmlaq (add, m1, m2); +++} +++ +++/* +++**foo2: +++** ... +++** vmla.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t add, uint8x16_t m1) +++{ +++ return vmlaq (add, m1, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmla.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) ++ { ++- return vmlasq_m_n_s16 (a, b, c, p); +++ return vmlasq_m_n_s16 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) ++ { ++- return vmlasq_m (a, b, c, p); +++ return vmlasq_m (m1, m2, add, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) ++ { ++- return vmlasq_m_n_s32 (a, b, c, p); +++ return vmlasq_m_n_s32 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) ++ { ++- return vmlasq_m (a, b, c, p); +++ return vmlasq_m (m1, m2, add, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) ++ { ++- return vmlasq_m_n_s8 (a, b, c, p); +++ return vmlasq_m_n_s8 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) ++ { ++- return vmlasq_m (a, b, c, p); +++ return vmlasq_m (m1, m2, add, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p) +++foo (uint16x8_t m1, uint16x8_t m2, uint16_t add, mve_pred16_t p) ++ { ++- return vmlasq_m_n_u16 (a, b, c, p); +++ return vmlasq_m_n_u16 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p) +++foo1 (uint16x8_t m1, uint16x8_t m2, uint16_t add, mve_pred16_t p) ++ { ++- return vmlasq_m (a, b, c, p); +++ return vmlasq_m (m1, m2, add, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) +++{ +++ return vmlasq_m (m1, m2, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p) +++foo (uint32x4_t m1, uint32x4_t m2, uint32_t add, mve_pred16_t p) ++ { ++- return vmlasq_m_n_u32 (a, b, c, p); +++ return vmlasq_m_n_u32 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p) +++foo1 (uint32x4_t m1, uint32x4_t m2, uint32_t add, mve_pred16_t p) ++ { ++- return vmlasq_m (a, b, c, p); +++ return vmlasq_m (m1, m2, add, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) +++{ +++ return vmlasq_m (m1, m2, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p) +++foo (uint8x16_t m1, uint8x16_t m2, uint8_t add, mve_pred16_t p) ++ { ++- return vmlasq_m_n_u8 (a, b, c, p); +++ return vmlasq_m_n_u8 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p) +++foo1 (uint8x16_t m1, uint8x16_t m2, uint8_t add, mve_pred16_t p) ++ { ++- return vmlasq_m (a, b, c, p); +++ return vmlasq_m (m1, m2, add, p); +++} +++ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlast.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p) +++{ +++ return vmlasq_m (m1, m2, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmlast.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlas.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c) +++foo (int16x8_t m1, int16x8_t m2, int16_t add) ++ { ++- return vmlasq_n_s16 (a, b, c); +++ return vmlasq_n_s16 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vmlas.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlas.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c) +++foo1 (int16x8_t m1, int16x8_t m2, int16_t add) ++ { ++- return vmlasq (a, b, c); +++ return vmlasq (m1, m2, add); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlas.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlas.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c) +++foo (int32x4_t m1, int32x4_t m2, int32_t add) ++ { ++- return vmlasq_n_s32 (a, b, c); +++ return vmlasq_n_s32 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vmlas.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlas.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c) +++foo1 (int32x4_t m1, int32x4_t m2, int32_t add) ++ { ++- return vmlasq (a, b, c); +++ return vmlasq (m1, m2, add); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlas.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlas.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c) +++foo (int8x16_t m1, int8x16_t m2, int8_t add) ++ { ++- return vmlasq_n_s8 (a, b, c); +++ return vmlasq_n_s8 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vmlas.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlas.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c) +++foo1 (int8x16_t m1, int8x16_t m2, int8_t add) ++ { ++- return vmlasq (a, b, c); +++ return vmlasq (m1, m2, add); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlas.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlas.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16x8_t a, uint16x8_t b, uint16_t c) +++foo (uint16x8_t m1, uint16x8_t m2, uint16_t add) ++ { ++- return vmlasq_n_u16 (a, b, c); +++ return vmlasq_n_u16 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vmlas.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlas.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16x8_t a, uint16x8_t b, uint16_t c) +++foo1 (uint16x8_t m1, uint16x8_t m2, uint16_t add) ++ { ++- return vmlasq (a, b, c); +++ return vmlasq (m1, m2, add); +++} +++ +++/* +++**foo2: +++** ... +++** vmlas.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t m1, uint16x8_t m2) +++{ +++ return vmlasq (m1, m2, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlas.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlas.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32x4_t b, uint32_t c) +++foo (uint32x4_t m1, uint32x4_t m2, uint32_t add) ++ { ++- return vmlasq_n_u32 (a, b, c); +++ return vmlasq_n_u32 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vmlas.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlas.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32x4_t b, uint32_t c) +++foo1 (uint32x4_t m1, uint32x4_t m2, uint32_t add) ++ { ++- return vmlasq (a, b, c); +++ return vmlasq (m1, m2, add); +++} +++ +++/* +++**foo2: +++** ... +++** vmlas.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t m1, uint32x4_t m2) +++{ +++ return vmlasq (m1, m2, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlas.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlas.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8x16_t a, uint8x16_t b, uint8_t c) +++foo (uint8x16_t m1, uint8x16_t m2, uint8_t add) ++ { ++- return vmlasq_n_u8 (a, b, c); +++ return vmlasq_n_u8 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vmlas.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlas.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8x16_t a, uint8x16_t b, uint8_t c) +++foo1 (uint8x16_t m1, uint8x16_t m2, uint8_t add) ++ { ++- return vmlasq (a, b, c); +++ return vmlasq (m1, m2, add); +++} +++ +++/* +++**foo2: +++** ... +++** vmlas.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t m1, uint8x16_t m2) +++{ +++ return vmlasq (m1, m2, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmlas.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavat.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vmlsdavaq_p_s16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavat.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavat.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vmlsdavaq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavat.s16" } } */ ++-/* { dg-final { scan-assembler "vmlsdavat.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavat.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vmlsdavaq_p_s32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavat.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vmlsdavaq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavat.s32" } } */ ++-/* { dg-final { scan-assembler "vmlsdavat.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavat.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) ++ { ++ return vmlsdavaq_p_s8 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavat.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavat.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) ++ { ++ return vmlsdavaq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavat.s8" } } */ ++-/* { dg-final { scan-assembler "vmlsdavat.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdava.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int16x8_t b, int16x8_t c) ++ { ++ return vmlsdavaq_s16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdava.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdava.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int16x8_t b, int16x8_t c) ++ { ++ return vmlsdavaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdava.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdava.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b, int32x4_t c) ++ { ++ return vmlsdavaq_s32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdava.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdava.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b, int32x4_t c) ++ { ++ return vmlsdavaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdava.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdava.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int8x16_t b, int8x16_t c) ++ { ++ return vmlsdavaq_s8 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdava.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdava.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int8x16_t b, int8x16_t c) ++ { ++ return vmlsdavaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdava.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavaxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vmlsdavaxq_p_s16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavaxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavaxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vmlsdavaxq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavaxt.s16" } } */ ++-/* { dg-final { scan-assembler "vmlsdavaxt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavaxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vmlsdavaxq_p_s32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavaxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavaxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vmlsdavaxq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavaxt.s32" } } */ ++-/* { dg-final { scan-assembler "vmlsdavaxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavaxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) ++ { ++ return vmlsdavaxq_p_s8 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavaxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavaxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) ++ { ++ return vmlsdavaxq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavaxt.s8" } } */ ++-/* { dg-final { scan-assembler "vmlsdavaxt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdavax.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int16x8_t b, int16x8_t c) ++ { ++ return vmlsdavaxq_s16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavax.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdavax.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int16x8_t b, int16x8_t c) ++ { ++ return vmlsdavaxq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavax.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdavax.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int32x4_t b, int32x4_t c) ++ { ++ return vmlsdavaxq_s32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavax.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdavax.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int32x4_t b, int32x4_t c) ++ { ++ return vmlsdavaxq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavax.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdavax.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32_t a, int8x16_t b, int8x16_t c) ++ { ++ return vmlsdavaxq_s8 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavax.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdavax.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32_t a, int8x16_t b, int8x16_t c) ++ { ++ return vmlsdavaxq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavax.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmlsdavq_p_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmlsdavq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmlsdavq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmlsdavq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmlsdavq_p_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmlsdavq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vmlsdavq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdav.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vmlsdavq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdav.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vmlsdavq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdav.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vmlsdavq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdav.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vmlsdavq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdav.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vmlsdavq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdav.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmlsdavxq_p_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmlsdavxq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavxt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmlsdavxq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmlsdavxq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmlsdavxq_p_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsdavxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmlsdavxq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavxt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdavx.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vmlsdavxq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavx.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdavx.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vmlsdavxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavx.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdavx.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vmlsdavxq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdavx.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vmlsdavxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavx.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsdavx.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vmlsdavxq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavx.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsdavx.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vmlsdavxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsdavx.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavat.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vmlsldavaq_p_s16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavat.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavat.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vmlsldavaq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavat.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vmlsldavaq_p_s32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vmlsldavaq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavat.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsldava.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int16x8_t b, int16x8_t c) ++ { ++ return vmlsldavaq_s16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldava.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsldava.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int16x8_t b, int16x8_t c) ++ { ++ return vmlsldavaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldava.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsldava.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vmlsldavaq_s32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldava.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsldava.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vmlsldavaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldava.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vmlsldavaxq_p_s16 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavaxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) ++ { ++ return vmlsldavaxq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavaxt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vmlsldavaxq_p_s32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavaxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vmlsldavaxq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavaxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int16x8_t b, int16x8_t c) ++ { ++ return vmlsldavaxq_s16 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavax.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int16x8_t b, int16x8_t c) ++ { ++ return vmlsldavaxq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavax.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vmlsldavaxq_s32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavax.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vmlsldavaxq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavax.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmlsldavq_p_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmlsldavq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmlsldavq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmlsldavq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsldav.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vmlsldavq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldav.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsldav.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vmlsldavq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldav.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsldav.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vmlsldavq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldav.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsldav.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vmlsldavq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldav.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmlsldavxq_p_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmlsldavxq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavxt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmlsldavxq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmlsldavxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmlsldavxq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsldavx.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vmlsldavxq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavx.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsldavx.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vmlsldavxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavx.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmlsldavx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vmlsldavxq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmlsldavx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vmlsldavxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmlsldavx.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vmovlbq_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovlbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vmovlbq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vmovlbq_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovlbt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vmovlbq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vmovlbq_m_u16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovlbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vmovlbq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vmovlbq_m_u8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovlbt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vmovlbq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovlb.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a) ++ { ++ return vmovlbq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovlb.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a) ++ { ++ return vmovlbq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovlb.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a) ++ { ++ return vmovlbq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlb.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovlb.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a) ++ { ++ return vmovlbq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlb.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovlb.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a) ++ { ++- return vmovlbq_u16 (a); +++ return vmovlbq_u16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlb.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovlb.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a) ++ { ++- return vmovlbq (a); +++ return vmovlbq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmovlb.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovlb.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a) ++ { ++- return vmovlbq_u8 (a); +++ return vmovlbq_u8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlb.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovlb.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a) ++ { ++- return vmovlbq (a); +++ return vmovlbq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmovlb.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vmovlbq_x_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovlbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vmovlbq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vmovlbq_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovlbt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vmovlbq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vmovlbq_x_u16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovlbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vmovlbq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++ return vmovlbq_x_u8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovlbt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovlbt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, mve_pred16_t p) ++ { ++ return vmovlbq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vmovltq_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovltt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vmovltq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vmovltq_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovltt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vmovltq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vmovltq_m_u16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovltt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vmovltq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vmovltq_m_u8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovltt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vmovltq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovlt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a) ++ { ++ return vmovltq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovlt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a) ++ { ++ return vmovltq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovlt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a) ++ { ++ return vmovltq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovlt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a) ++ { ++ return vmovltq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovlt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a) ++ { ++- return vmovltq_u16 (a); +++ return vmovltq_u16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovlt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a) ++ { ++- return vmovltq (a); +++ return vmovltq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmovlt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovlt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a) ++ { ++- return vmovltq_u8 (a); +++ return vmovltq_u8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmovlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovlt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a) ++ { ++- return vmovltq (a); +++ return vmovltq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmovlt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vmovltq_x_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovltt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vmovltq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vmovltq_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovltt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vmovltq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vmovltq_x_u16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovltt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vmovltq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++ return vmovltq_x_u8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovltt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovltt.u8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, mve_pred16_t p) ++ { ++ return vmovltq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovnbt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmovnbq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovnbt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovnbt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmovnbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovnbt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmovnbq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovnbt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovnbt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmovnbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovnbt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmovnbq_m_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovnbt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovnbt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmovnbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovnbt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmovnbq_m_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovnbt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovnbt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmovnbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovnb.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vmovnbq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnb.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovnb.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vmovnbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnb.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovnb.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++ return vmovnbq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnb.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovnb.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++ return vmovnbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnb.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovnb.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vmovnbq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnb.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovnb.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vmovnbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnb.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovnb.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++ return vmovnbq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnb.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovnb.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++ return vmovnbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnb.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovntt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmovntq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovntt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovntt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmovntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovntt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmovntq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovntt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovntt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmovntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovntt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmovntq_m_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovntt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovntt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmovntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovntt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmovntq_m_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmovntt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmovntt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmovntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovnt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vmovntq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovnt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vmovntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovnt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++ return vmovntq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovnt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++ return vmovntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovnt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vmovntq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovnt.i16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vmovntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmovnt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++ return vmovntq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmovnt.i32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++ return vmovntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmovnt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulhq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulhq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulhq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulhq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulhq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulhq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vmulhq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vmulhq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vmulhq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vmulhq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vmulhq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vmulhq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmulh.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulhq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulhq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulhq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulhq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulhq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulhq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulht.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vmullbq_int_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vmullbq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vmullbq_int_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vmullbq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullb.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vmullbq_int_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullb.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vmullbq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullb.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vmullbq_int_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullb.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vmullbq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullb.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vmullbq_int_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullb.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vmullbq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullb.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vmullbq_int_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullb.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vmullbq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_poly_m_p16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.p16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_poly_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.p16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_poly_m_p8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.p8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_poly_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.p8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullb.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vmullbq_poly_p16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.p16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullb.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vmullbq_poly (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.p16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullb.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vmullbq_poly_p8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.p8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullb.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vmullbq_poly (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullb.p8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_poly_x_p16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.p16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmullbq_poly_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_poly_x_p8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmullbt.p8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmullbq_poly_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vmulltq_int_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vmulltq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vmulltq_int_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vmulltq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vmulltq_int_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vmulltq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vmulltq_int_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vmulltq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vmulltq_int_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vmulltq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vmulltq_int_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vmulltq_int (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_int_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_poly_m_p16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.p16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_poly_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.p16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_poly_m_p8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.p8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_poly_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.p8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vmulltq_poly_p16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.p16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vmulltq_poly (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.p16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmullt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vmulltq_poly_p8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.p8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmullt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vmulltq_poly (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmullt.p8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_poly_x_p16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.p16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulltq_poly_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_poly_x_p8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmulltt.p8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulltq_poly_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vmulq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vmulq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vmulq_m (inactive, a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vmulq_m_n_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) +++{ +++ return vmulq_m (inactive, a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vmulq_m (inactive, a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vmulq_m_n_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) +++{ +++ return vmulq_m (inactive, a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vmulq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vmulq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vmulq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vmulq_m_n_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) +++{ +++ return vmulq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vmulq_m_n_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) +++{ +++ return vmulq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vmulq_m_n_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) +++{ +++ return vmulq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t a, float16_t b) ++-{ ++- return vmulq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16_t b) ++ { ++ return vmulq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.f16" } } */ +++/* +++**foo2: +++** ... +++** vmul.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t a) +++{ +++ return vmulq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t a, float32_t b) ++-{ ++- return vmulq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32_t b) ++ { ++ return vmulq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.f32" } } */ +++/* +++**foo2: +++** ... +++** vmul.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t a) +++{ +++ return vmulq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vmulq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vmulq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vmulq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vmulq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i16" } } */ +++/* +++**foo2: +++** ... +++** vmul.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a) +++{ +++ return vmulq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vmulq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i32" } } */ +++/* +++**foo2: +++** ... +++** vmul.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a) +++{ +++ return vmulq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vmulq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i8" } } */ +++/* +++**foo2: +++** ... +++** vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a) +++{ +++ return vmulq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vmulq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vmulq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vmulq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vmulq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vmulq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vmulq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vmulq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vmul.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vmulq_x (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vmulq_x_n_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vmulq_x (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vmulq_x (a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vmulq_x_n_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.f32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t a, mve_pred16_t p) +++{ +++ return vmulq_x (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vmulq_x_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vmulq_x_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vmulq_x_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vmulq_x_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vmulq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vmulq_x_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vmulq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vmulq_x_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vmulq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmult.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vmulq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmult.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, mve_pred16_t p) ++ { ++- return vmvnq_m_n_s16 (inactive, 2, p); +++ return vmvnq_m_n_s16 (inactive, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, mve_pred16_t p) ++ { ++- return vmvnq_m (inactive, 2, p); +++ return vmvnq_m (inactive, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, mve_pred16_t p) ++ { ++- return vmvnq_m_n_s32 (inactive, 2, p); +++ return vmvnq_m_n_s32 (inactive, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, mve_pred16_t p) ++ { ++- return vmvnq_m (inactive, 2, p); +++ return vmvnq_m (inactive, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, mve_pred16_t p) ++ { ++- return vmvnq_m_n_u16 (inactive, 4, p); +++ return vmvnq_m_n_u16 (inactive, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, mve_pred16_t p) ++ { ++- return vmvnq_m (inactive, 4, p); +++ return vmvnq_m (inactive, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, mve_pred16_t p) ++ { ++- return vmvnq_m_n_u32 (inactive, 4, p); +++ return vmvnq_m_n_u32 (inactive, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, mve_pred16_t p) ++ { ++- return vmvnq_m (inactive, 4, p); +++ return vmvnq_m (inactive, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vmvnq_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vmvnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vmvnq_m_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vmvnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vmvnq_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vmvnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vmvnq_m_u16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vmvnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vmvnq_m_u32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vmvnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vmvnq_m_u8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vmvnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo () ++ { ++ return vmvnq_n_s16 (1); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo () ++ { ++- return vmvnq_n_s32 (2); +++ return vmvnq_n_s32 (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmvn.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo () ++ { ++- return vmvnq_n_u16 (1); +++ return vmvnq_n_u16 (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmvn.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c ++@@ -1,13 +1,28 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo () ++ { ++- return vmvnq_n_u32 (2); +++ return vmvnq_n_u32 (1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmvn.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vmvnq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ ++ +++/* +++**foo1: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vmvnq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vmvnq_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ ++ +++/* +++**foo1: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vmvnq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vmvnq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ ++ +++/* +++**foo1: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vmvnq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++- return vmvnq_u16 (a); +++ return vmvnq_u16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ ++ +++/* +++**foo1: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a) ++ { ++- return vmvnq (a); +++ return vmvnq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a) ++ { ++- return vmvnq_u32 (a); +++ return vmvnq_u32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ ++ +++/* +++**foo1: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a) ++ { ++- return vmvnq (a); +++ return vmvnq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a) ++ { ++- return vmvnq_u8 (a); +++ return vmvnq_u8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ ++ +++/* +++**foo1: +++** ... +++** vmvn q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a) ++ { ++- return vmvnq (a); +++ return vmvnq (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vmvn" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (mve_pred16_t p) ++ { ++- return vmvnq_x_n_s16 (2, p); +++ return vmvnq_x_n_s16 (1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (mve_pred16_t p) ++ { ++- return vmvnq_x_n_s32 (2, p); +++ return vmvnq_x_n_s32 (1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (mve_pred16_t p) ++ { ++- return vmvnq_x_n_u16 (4, p); +++ return vmvnq_x_n_u16 (1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c ++@@ -1,14 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (mve_pred16_t p) ++ { ++- return vmvnq_x_n_u32 (4, p); +++ return vmvnq_x_n_u32 (1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vmvnq_x_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vmvnq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vmvnq_x_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vmvnq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vmvnq_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vmvnq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vmvnq_x_u16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vmvnq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++ return vmvnq_x_u32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++ return vmvnq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++ return vmvnq_x_u8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, mve_pred16_t p) ++ { ++ return vmvnq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vmvnt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vneg.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vnegq_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vneg.f16" } } */ +++ +++/* +++**foo1: +++** ... +++** vneg.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vnegq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vneg.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a) ++ { ++ return vnegq_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vneg.f32" } } */ +++ +++/* +++**foo1: +++** ... +++** vneg.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a) +++{ +++ return vnegq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vnegq_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vnegq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vnegq_m_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vnegq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vnegq_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vnegq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vnegq_m_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vnegq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vnegq_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vnegq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vneg.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vnegq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vneg.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vneg.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vnegq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vneg.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vneg.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vnegq_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vneg.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vneg.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vnegq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vneg.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vneg.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vnegq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vneg.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vneg.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vnegq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vneg.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vnegq_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vnegq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vnegq_x_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, mve_pred16_t p) ++ { ++ return vnegq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vnegq_x_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vnegq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vnegq_x_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vnegq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vnegq_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vnegt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vnegq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vornq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ ++ +++/* +++**foo1: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vornq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vornq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ ++ +++/* +++**foo1: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vornq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vornq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vornq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vornq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vornq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vornq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vornq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vornq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vornq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vornq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vornq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vornq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vornq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vornq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vornq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vornq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vornq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vornq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ ++ +++/* +++**foo1: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vornq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vornq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ ++ +++/* +++**foo1: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vornq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vornq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ ++ +++/* +++**foo1: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vornq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vornq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ ++ +++/* +++**foo1: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vornq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vornq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ ++ +++/* +++**foo1: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vornq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vornq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ ++ +++/* +++**foo1: +++** ... +++** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vornq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorn" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vornq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vornq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vornq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vornq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vornq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vornq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vornq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vornq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vornq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vornq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vornq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vornq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vornq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vornq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vornq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vornt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vornq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vorrq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ ++ +++/* +++**foo1: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vorrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vorrq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ ++ +++/* +++**foo1: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vorrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++- return vorrq_m_n_s16 (a, 253, p); +++ return vorrq_m_n_s16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++- return vorrq_m_n (a, 253, p); +++ return vorrq_m_n (a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vorrq_m_n_s32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vorrq_m_n (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vorrq_m_n_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vorrq_m_n (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++ return vorrq_m_n_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++ return vorrq_m_n (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vorrq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vorrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vorrq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vorrq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vorrq_n_s16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vorr.i16" } } */ +++ +++/* +++**foo1: +++** ... +++** vorr.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int16x8_t +++foo1 (int16x8_t a) +++{ +++ return vorrq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vorrq_n_s32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vorr.i32" } } */ +++ +++/* +++**foo1: +++** ... +++** vorr.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int32x4_t +++foo1 (int32x4_t a) +++{ +++ return vorrq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++ return vorrq_n_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vorr.i16" } } */ +++ +++/* +++**foo1: +++** ... +++** vorr.i16 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (uint16x8_t a) +++{ +++ return vorrq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a) ++ { ++- return vorrq_n_u32 (a, 44); +++ return vorrq_n_u32 (a, 1); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vorr.i32 q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 (uint32x4_t a) +++{ +++ return vorrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vorr.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vorrq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ ++ +++/* +++**foo1: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vorrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vorrq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ ++ +++/* +++**foo1: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vorrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vorrq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ ++ +++/* +++**foo1: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vorrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vorrq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ ++ +++/* +++**foo1: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vorrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vorrq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ ++ +++/* +++**foo1: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vorrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vorrq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ ++ +++/* +++**foo1: +++** ... +++** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vorrq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vorr" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vorrq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vorrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vorrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vorrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vorrq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vorrt" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vorrq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c ++@@ -1,21 +1,32 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpnot(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +++** ... +++*/ ++ mve_pred16_t ++ foo (mve_pred16_t a) ++ { ++ return vpnot (a); ++ } ++ ++-/* { dg-final { scan-assembler "vpnot" } } */ ++- ++-mve_pred16_t ++-foo1 (mve_pred16_t a) ++-{ ++- return vpnot (a); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpnot" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vpselq_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vpselq_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vpselq_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vpselq_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int64x2_t a, int64x2_t b, mve_pred16_t p) ++ { ++ return vpselq_s64 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int64x2_t a, int64x2_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vpselq_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vpselq_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vpselq_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint64x2_t a, uint64x2_t b, mve_pred16_t p) ++ { ++ return vpselq_u64 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo1 (uint64x2_t a, uint64x2_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c ++@@ -1,21 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vpselq_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vpselq (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpsel" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqabst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vqabsq_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqabst.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqabst.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vqabsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqabst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vqabsq_m_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqabst.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqabst.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vqabsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqabst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vqabsq_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqabst.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqabst.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vqabsq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqabs.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vqabsq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqabs.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqabs.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vqabsq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqabs.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqabs.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vqabsq_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqabs.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqabs.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vqabsq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqabs.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqabs.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vqabsq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqabs.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqabs.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vqabsq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqabs.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_n_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) +++{ +++ return vqaddq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_n_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) +++{ +++ return vqaddq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_n_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) +++{ +++ return vqaddq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vqaddq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vqaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqaddt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vqaddq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vqaddq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vqaddq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vqaddq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u16" } } */ +++/* +++**foo2: +++** ... +++** vqadd.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a) +++{ +++ return vqaddq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vqaddq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u32" } } */ +++/* +++**foo2: +++** ... +++** vqadd.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a) +++{ +++ return vqaddq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vqaddq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u8" } } */ +++/* +++**foo2: +++** ... +++** vqadd.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a) +++{ +++ return vqaddq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vqaddq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vqaddq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vqaddq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vqaddq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vqaddq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vqaddq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vqaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqadd.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmladhq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmladhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmladhq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmladhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmladhq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmladhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqdmladhq_s16 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqdmladhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqdmladhq_s32 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqdmladhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqdmladhq_s8 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqdmladhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmladhxq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladhxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmladhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladhxt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmladhxq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladhxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmladhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladhxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmladhxq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladhxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmladhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmladhxt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqdmladhxq_s16 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladhx.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqdmladhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladhx.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqdmladhxq_s32 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladhx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqdmladhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladhx.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqdmladhxq_s8 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladhx.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqdmladhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmladhx.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) ++ { ++- return vqdmlahq_m_n_s16 (a, b, c, p); +++ return vqdmlahq_m_n_s16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlaht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) ++ { ++- return vqdmlahq_m (a, b, c, p); +++ return vqdmlahq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlaht.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) ++ { ++- return vqdmlahq_m_n_s32 (a, b, c, p); +++ return vqdmlahq_m_n_s32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlaht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) ++ { ++- return vqdmlahq_m (a, b, c, p); +++ return vqdmlahq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlaht.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) ++ { ++- return vqdmlahq_m_n_s8 (a, b, c, p); +++ return vqdmlahq_m_n_s8 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlaht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) ++ { ++- return vqdmlahq_m (a, b, c, p); +++ return vqdmlahq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlaht.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c) +++foo (int16x8_t add, int16x8_t m1, int16_t m2) ++ { ++- return vqdmlahq_n_s16 (a, b, c); +++ return vqdmlahq_n_s16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlah.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c) +++foo1 (int16x8_t add, int16x8_t m1, int16_t m2) ++ { ++- return vqdmlahq (a, b, c); +++ return vqdmlahq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqdmlah.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c) +++foo (int32x4_t add, int32x4_t m1, int32_t m2) ++ { ++- return vqdmlahq_n_s32 (a, b, c); +++ return vqdmlahq_n_s32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlah.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c) +++foo1 (int32x4_t add, int32x4_t m1, int32_t m2) ++ { ++- return vqdmlahq (a, b, c); +++ return vqdmlahq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqdmlah.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c) +++foo (int8x16_t add, int8x16_t m1, int8_t m2) ++ { ++- return vqdmlahq_n_s8 (a, b, c); +++ return vqdmlahq_n_s8 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlah.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c) +++foo1 (int8x16_t add, int8x16_t m1, int8_t m2) ++ { ++- return vqdmlahq (a, b, c); +++ return vqdmlahq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqdmlah.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlasht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) ++ { ++- return vqdmlashq_m_n_s16 (a, b, c, p); +++ return vqdmlashq_m_n_s16 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlasht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlasht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) ++ { ++- return vqdmlashq_m (a, b, c, p); +++ return vqdmlashq_m (m1, m2, add, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlasht.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlasht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) ++ { ++- return vqdmlashq_m_n_s32 (a, b, c, p); +++ return vqdmlashq_m_n_s32 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlasht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlasht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) ++ { ++- return vqdmlashq_m (a, b, c, p); +++ return vqdmlashq_m (m1, m2, add, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlasht.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlasht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) ++ { ++- return vqdmlashq_m_n_s8 (a, b, c, p); +++ return vqdmlashq_m_n_s8 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlasht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlasht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) ++ { ++- return vqdmlashq_m (a, b, c, p); +++ return vqdmlashq_m (m1, m2, add, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlasht.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c) +++foo (int16x8_t m1, int16x8_t m2, int16_t add) ++ { ++- return vqdmlashq_n_s16 (a, b, c); +++ return vqdmlashq_n_s16 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlash.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c) +++foo1 (int16x8_t m1, int16x8_t m2, int16_t add) ++ { ++- return vqdmlashq (a, b, c); +++ return vqdmlashq (m1, m2, add); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqdmlash.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c) +++foo (int32x4_t m1, int32x4_t m2, int32_t add) ++ { ++- return vqdmlashq_n_s32 (a, b, c); +++ return vqdmlashq_n_s32 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlash.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c) +++foo1 (int32x4_t m1, int32x4_t m2, int32_t add) ++ { ++- return vqdmlashq (a, b, c); +++ return vqdmlashq (m1, m2, add); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqdmlash.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c) +++foo (int8x16_t m1, int8x16_t m2, int8_t add) ++ { ++- return vqdmlashq_n_s8 (a, b, c); +++ return vqdmlashq_n_s8 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlash.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c) +++foo1 (int8x16_t m1, int8x16_t m2, int8_t add) ++ { ++- return vqdmlashq (a, b, c); +++ return vqdmlashq (m1, m2, add); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqdmlash.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqdmlsdhq_s16 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqdmlsdhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqdmlsdhq_s32 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqdmlsdhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqdmlsdhq_s8 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqdmlsdhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhxq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdhxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdhxt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhxq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdhxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdhxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhxq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdhxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmlsdhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmlsdhxt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqdmlsdhxq_s16 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdhx.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqdmlsdhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdhx.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqdmlsdhxq_s32 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdhx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqdmlsdhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdhx.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqdmlsdhxq_s8 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdhx.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqdmlsdhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmlsdhx.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vqdmulhq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vqdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vqdmulhq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vqdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vqdmulhq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vqdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vqdmulhq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vqdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vqdmulhq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vqdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vqdmulhq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vqdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmulh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmullbt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqdmullbq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmullbt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqdmullbq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmullbt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqdmullbq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmullbt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqdmullbq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmullbq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmullbq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmullbq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmullbq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmullb.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vqdmullbq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmullb.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vqdmullbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmullb.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vqdmullbq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmullb.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vqdmullbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vqdmullbq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vqdmullbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vqdmullbq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vqdmullbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulltt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqdmulltq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulltt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqdmulltq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulltt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqdmulltq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulltt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqdmulltq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmulltq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqdmulltq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmulltq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqdmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqdmulltq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmullt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vqdmulltq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmullt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vqdmulltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmullt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vqdmulltq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmullt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vqdmulltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vqdmulltq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vqdmulltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqdmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vqdmulltq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqdmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vqdmulltq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqdmullt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovnbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqmovnbq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovnbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovnbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqmovnbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovnbt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqmovnbq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovnbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovnbt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqmovnbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovnbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqmovnbq_m_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovnbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovnbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqmovnbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovnbt.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqmovnbq_m_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovnbt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovnbt.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqmovnbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovnb.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vqmovnbq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovnb.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vqmovnbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovnb.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++ return vqmovnbq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovnb.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++ return vqmovnbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovnb.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vqmovnbq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnb.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovnb.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vqmovnbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnb.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovnb.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++ return vqmovnbq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnb.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovnb.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++ return vqmovnbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnb.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovntt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqmovntq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovntt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovntt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqmovntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovntt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqmovntq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovntt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovntt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqmovntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovntt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqmovntq_m_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovntt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovntt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqmovntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovntt.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqmovntq_m_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovntt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovntt.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqmovntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovnt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vqmovntq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovnt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vqmovntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovnt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++ return vqmovntq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovnt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++ return vqmovntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovnt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vqmovntq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovnt.u16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vqmovntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovnt.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++ return vqmovntq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovnt.u32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++ return vqmovntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovnt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovunbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqmovunbq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovunbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovunbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqmovunbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovunbt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqmovunbq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovunbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovunbt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqmovunbq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovunb.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b) ++ { ++ return vqmovunbq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovunb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovunb.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b) ++ { ++ return vqmovunbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovunb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovunb.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b) ++ { ++ return vqmovunbq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovunb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovunb.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b) ++ { ++ return vqmovunbq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovunb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovuntt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqmovuntq_m_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovuntt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovuntt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqmovuntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovuntt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqmovuntq_m_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqmovuntt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqmovuntt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqmovuntq_m (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovunt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b) ++ { ++ return vqmovuntq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovunt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovunt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b) ++ { ++ return vqmovuntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovunt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqmovunt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b) ++ { ++ return vqmovuntq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovunt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqmovunt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b) ++ { ++ return vqmovuntq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqmovunt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqnegt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vqnegq_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqnegt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqnegt.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vqnegq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqnegt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vqnegq_m_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqnegt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqnegt.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vqnegq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqnegt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vqnegq_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqnegt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqnegt.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vqnegq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqneg.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vqnegq_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqneg.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqneg.s16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vqnegq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqneg.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqneg.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vqnegq_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqneg.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqneg.s32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vqnegq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqneg.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqneg.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vqnegq_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqneg.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqneg.s8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vqnegq (a); ++ } ++ ++-/* { dg-final { scan-assembler "vqneg.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmladhq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmladhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmladhq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmladhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmladhq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmladhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqrdmladhq_s16 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqrdmladhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqrdmladhq_s32 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqrdmladhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqrdmladhq_s8 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqrdmladhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmladhxq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladhxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmladhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladhxt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmladhxq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladhxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmladhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladhxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmladhxq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladhxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmladhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmladhxt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqrdmladhxq_s16 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladhx.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqrdmladhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladhx.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqrdmladhxq_s32 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladhx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqrdmladhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladhx.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqrdmladhxq_s8 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladhx.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqrdmladhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmladhx.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) ++ { ++- return vqrdmlahq_m_n_s16 (a, b, c, p); +++ return vqrdmlahq_m_n_s16 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlaht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) ++ { ++- return vqrdmlahq_m (a, b, c, p); +++ return vqrdmlahq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlaht.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) ++ { ++- return vqrdmlahq_m_n_s32 (a, b, c, p); +++ return vqrdmlahq_m_n_s32 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlaht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) ++ { ++- return vqrdmlahq_m (a, b, c, p); +++ return vqrdmlahq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlaht.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) ++ { ++- return vqrdmlahq_m_n_s8 (a, b, c, p); +++ return vqrdmlahq_m_n_s8 (add, m1, m2, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlaht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) ++ { ++- return vqrdmlahq_m (a, b, c, p); +++ return vqrdmlahq_m (add, m1, m2, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlaht.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c) +++foo (int16x8_t add, int16x8_t m1, int16_t m2) ++ { ++- return vqrdmlahq_n_s16 (a, b, c); +++ return vqrdmlahq_n_s16 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlah.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c) +++foo1 (int16x8_t add, int16x8_t m1, int16_t m2) ++ { ++- return vqrdmlahq (a, b, c); +++ return vqrdmlahq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqrdmlah.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c) +++foo (int32x4_t add, int32x4_t m1, int32_t m2) ++ { ++- return vqrdmlahq_n_s32 (a, b, c); +++ return vqrdmlahq_n_s32 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlah.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c) +++foo1 (int32x4_t add, int32x4_t m1, int32_t m2) ++ { ++- return vqrdmlahq (a, b, c); +++ return vqrdmlahq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqrdmlah.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c) +++foo (int8x16_t add, int8x16_t m1, int8_t m2) ++ { ++- return vqrdmlahq_n_s8 (a, b, c); +++ return vqrdmlahq_n_s8 (add, m1, m2); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlah.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c) +++foo1 (int8x16_t add, int8x16_t m1, int8_t m2) ++ { ++- return vqrdmlahq (a, b, c); +++ return vqrdmlahq (add, m1, m2); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqrdmlah.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlasht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) ++ { ++- return vqrdmlashq_m_n_s16 (a, b, c, p); +++ return vqrdmlashq_m_n_s16 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlasht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlasht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +++foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) ++ { ++- return vqrdmlashq_m (a, b, c, p); +++ return vqrdmlashq_m (m1, m2, add, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlasht.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlasht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) ++ { ++- return vqrdmlashq_m_n_s32 (a, b, c, p); +++ return vqrdmlashq_m_n_s32 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlasht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlasht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +++foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) ++ { ++- return vqrdmlashq_m (a, b, c, p); +++ return vqrdmlashq_m (m1, m2, add, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlasht.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlasht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) ++ { ++- return vqrdmlashq_m_n_s8 (a, b, c, p); +++ return vqrdmlashq_m_n_s8 (m1, m2, add, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlasht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlasht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +++foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) ++ { ++- return vqrdmlashq_m (a, b, c, p); +++ return vqrdmlashq_m (m1, m2, add, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlasht.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, int16x8_t b, int16_t c) +++foo (int16x8_t m1, int16x8_t m2, int16_t add) ++ { ++- return vqrdmlashq_n_s16 (a, b, c); +++ return vqrdmlashq_n_s16 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlash.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, int16x8_t b, int16_t c) +++foo1 (int16x8_t m1, int16x8_t m2, int16_t add) ++ { ++- return vqrdmlashq (a, b, c); +++ return vqrdmlashq (m1, m2, add); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqrdmlash.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, int32_t c) +++foo (int32x4_t m1, int32x4_t m2, int32_t add) ++ { ++- return vqrdmlashq_n_s32 (a, b, c); +++ return vqrdmlashq_n_s32 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlash.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, int32_t c) +++foo1 (int32x4_t m1, int32x4_t m2, int32_t add) ++ { ++- return vqrdmlashq (a, b, c); +++ return vqrdmlashq (m1, m2, add); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqrdmlash.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, int8x16_t b, int8_t c) +++foo (int8x16_t m1, int8x16_t m2, int8_t add) ++ { ++- return vqrdmlashq_n_s8 (a, b, c); +++ return vqrdmlashq_n_s8 (m1, m2, add); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlash.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, int8x16_t b, int8_t c) +++foo1 (int8x16_t m1, int8x16_t m2, int8_t add) ++ { ++- return vqrdmlashq (a, b, c); +++ return vqrdmlashq (m1, m2, add); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqrdmlash.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqrdmlsdhq_s16 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqrdmlsdhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqrdmlsdhq_s32 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqrdmlsdhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqrdmlsdhq_s8 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqrdmlsdhq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhxq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdhxt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdhxt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhxq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdhxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdhxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhxq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdhxt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmlsdhxq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmlsdhxt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqrdmlsdhxq_s16 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdhx.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) ++ { ++ return vqrdmlsdhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdhx.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqrdmlsdhxq_s32 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdhx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) ++ { ++ return vqrdmlsdhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdhx.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqrdmlsdhxq_s8 (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdhx.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) ++ { ++ return vqrdmlsdhxq (inactive, a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmlsdhx.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrdmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrdmulht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vqrdmulhq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vqrdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vqrdmulhq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vqrdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vqrdmulhq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vqrdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vqrdmulhq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vqrdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vqrdmulhq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vqrdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vqrdmulhq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vqrdmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrdmulh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshlt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b) ++ { ++ return vqrshlq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vqrshlq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b) ++ { ++ return vqrshlq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b) ++ { ++ return vqrshlq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b) ++ { ++ return vqrshlq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b) ++ { ++ return vqrshlq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vqrshlq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vqrshlq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vqrshlq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b) ++ { ++ return vqrshlq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int16x8_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b) ++ { ++ return vqrshlq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32x4_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b) ++ { ++ return vqrshlq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int8x16_t b) ++ { ++ return vqrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrnbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrnbq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrnbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrnbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrnbt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrnbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrnbq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrnbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrnbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrnbt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrnbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrnbq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrnbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrnbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrnbt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrnbt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrnbq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrnbt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrnbt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrnbt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrnb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vqrshrnbq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrnb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vqrshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrnb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++ return vqrshrnbq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrnb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++ return vqrshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrnb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vqrshrnbq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnb.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrnb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vqrshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnb.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrnb.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++ return vqrshrnbq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnb.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrnb.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++ return vqrshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnb.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrntq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrntt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrntt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrntq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrntt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrntt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrntt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrntq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrntt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrntt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrntt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrntt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrntq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrntt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrntt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrntt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrnt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vqrshrntq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrnt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vqrshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrnt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++ return vqrshrntq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrnt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++ return vqrshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrnt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vqrshrntq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrnt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vqrshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrnt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++ return vqrshrntq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrnt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++ return vqrshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrnt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrunbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrunbq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrunbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrunbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshrunbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrunbt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrunbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrunbq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrunbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshrunbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshrunbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshrunbt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrunb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b) ++ { ++ return vqrshrunbq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrunb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrunb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b) ++ { ++ return vqrshrunbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrunb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrunb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b) ++ { ++ return vqrshrunbq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrunb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrunb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b) ++ { ++ return vqrshrunbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrunb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshruntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshruntq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshruntt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshruntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqrshruntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshruntt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshruntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshruntq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshruntt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqrshruntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqrshruntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqrshruntt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrunt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b) ++ { ++ return vqrshruntq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrunt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrunt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b) ++ { ++ return vqrshruntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrunt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqrshrunt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b) ++ { ++ return vqrshruntq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrunt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqrshrunt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b) ++ { ++ return vqrshruntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqrshrunt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n_s16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n_s32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n_s8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n_u32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vqshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqshlq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vqshlq_n_s16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vqshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vqshlq_n_s32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vqshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vqshlq_n_s8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vqshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++ return vqshlq_n_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a) ++ { ++ return vqshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a) ++ { ++ return vqshlq_n_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a) ++ { ++ return vqshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a) ++ { ++ return vqshlq_n_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a) ++ { ++ return vqshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b) ++ { ++ return vqshlq_r_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b) ++ { ++ return vqshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vqshlq_r_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vqshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b) ++ { ++ return vqshlq_r_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b) ++ { ++ return vqshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b) ++ { ++ return vqshlq_r_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b) ++ { ++ return vqshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b) ++ { ++ return vqshlq_r_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b) ++ { ++ return vqshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b) ++ { ++ return vqshlq_r_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b) ++ { ++ return vqshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vqshlq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vqshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vqshlq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vqshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vqshlq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vqshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b) ++ { ++ return vqshlq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int16x8_t b) ++ { ++ return vqshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b) ++ { ++ return vqshlq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32x4_t b) ++ { ++ return vqshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b) ++ { ++ return vqshlq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int8x16_t b) ++ { ++ return vqshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlut.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++- return vqshluq_m_n_s16 (inactive, a, 7, p); +++ return vqshluq_m_n_s16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlut.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlut.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++- return vqshluq_m (inactive, a, 7, p); +++ return vqshluq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlut.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++- return vqshluq_m_n_s32 (inactive, a, 7, p); +++ return vqshluq_m_n_s32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlut.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlut.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++- return vqshluq_m (inactive, a, 7, p); +++ return vqshluq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlut.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++- return vqshluq_m_n_s8 (inactive, a, 7, p); +++ return vqshluq_m_n_s8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshlut.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshlut.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++- return vqshluq_m (inactive, a, 7, p); +++ return vqshluq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshlu.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (int16x8_t a) ++ { ++- return vqshluq_n_s16 (a, 7); +++ return vqshluq_n_s16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshlu.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshlu.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (int16x8_t a) ++ { ++- return vqshluq (a, 7); +++ return vqshluq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqshlu.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshlu.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (int32x4_t a) ++ { ++- return vqshluq_n_s32 (a, 7); +++ return vqshluq_n_s32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshlu.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshlu.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (int32x4_t a) ++ { ++- return vqshluq (a, 7); +++ return vqshluq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqshlu.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshlu.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (int8x16_t a) ++ { ++- return vqshluq_n_s8 (a, 7); +++ return vqshluq_n_s8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshlu.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshlu.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (int8x16_t a) ++ { ++- return vqshluq (a, 7); +++ return vqshluq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqshlu.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrnbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vqshrnbq_m_n_s16 (a, b, 7, p); +++ return vqshrnbq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrnbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrnbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vqshrnbq_m (a, b, 7, p); +++ return vqshrnbq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrnbt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrnbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vqshrnbq_m_n_s32 (a, b, 11, p); +++ return vqshrnbq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrnbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrnbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vqshrnbq_m (a, b, 11, p); +++ return vqshrnbq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrnbt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrnbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqshrnbq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrnbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrnbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrnbt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrnbt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqshrnbq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrnbt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrnbt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrnbt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrnb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vqshrnbq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrnb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vqshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrnb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++- return vqshrnbq_n_s32 (a, b, 2); +++ return vqshrnbq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrnb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++- return vqshrnbq (a, b, 2); +++ return vqshrnbq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqshrnb.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrnb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vqshrnbq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnb.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrnb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vqshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnb.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrnb.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++- return vqshrnbq_n_u32 (a, b, 15); +++ return vqshrnbq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnb.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrnb.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++- return vqshrnbq (a, b, 15); +++ return vqshrnbq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vqshrnb.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshrntq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrntt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrntt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshrntq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrntt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrntt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrntt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqshrntq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrntt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrntt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrntt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrntt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqshrntq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrntt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrntt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrntt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrnt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vqshrntq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrnt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vqshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrnt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++ return vqshrntq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrnt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++ return vqshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrnt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vqshrntq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrnt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vqshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrnt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++ return vqshrntq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrnt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++ return vqshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrnt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrunbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshrunbq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrunbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrunbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshrunbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrunbt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrunbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshrunbq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrunbt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshrunbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshrunbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshrunbt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrunb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b) ++ { ++ return vqshrunbq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrunb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrunb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b) ++ { ++ return vqshrunbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrunb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrunb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b) ++ { ++ return vqshrunbq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrunb.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrunb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b) ++ { ++ return vqshrunbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrunb.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshruntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshruntq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshruntt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshruntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqshruntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshruntt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshruntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshruntq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshruntt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqshruntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqshruntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqshruntt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrunt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int16x8_t b) ++ { ++ return vqshruntq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrunt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrunt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int16x8_t b) ++ { ++ return vqshruntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrunt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqshrunt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32x4_t b) ++ { ++ return vqshruntq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrunt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqshrunt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32x4_t b) ++ { ++ return vqshruntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vqshrunt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_n_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) +++{ +++ return vqsubq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_n_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) +++{ +++ return vqsubq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_n_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) +++{ +++ return vqsubq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vqsubq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vqsubt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vqsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vqsubt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vqsubq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vqsubq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vqsubq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vqsubq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u16" } } */ +++/* +++**foo2: +++** ... +++** vqsub.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a) +++{ +++ return vqsubq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vqsubq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u32" } } */ +++/* +++**foo2: +++** ... +++** vqsub.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a) +++{ +++ return vqsubq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vqsubq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u8" } } */ +++/* +++**foo2: +++** ... +++** vqsub.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a) +++{ +++ return vqsubq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vqsubq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vqsubq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vqsubq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vqsubq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vqsubq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vqsub.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vqsubq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vqsub.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vqsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vqsub.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vrev16q_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev16t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vrev16q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev16q_m_u8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev16t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev16q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev16.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vrev16q_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev16.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev16.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vrev16q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev16.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev16.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a) ++ { ++- return vrev16q_u8 (a); +++ return vrev16q_u8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev16.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev16.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a) ++ { ++- return vrev16q (a); +++ return vrev16q (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrev16.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vrev16q_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev16t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vrev16q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev16q_x_u8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev16t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev16q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vrev32q_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev32.16" } } */ +++ +++/* +++**foo1: +++** ... +++** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vrev32q (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vrev32q_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vrev32q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_m_u16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev32q_m_u8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev32q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c ++@@ -1,21 +1,41 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vrev32q_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev32.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vrev32q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev32.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev32.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vrev32q_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev32.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev32.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vrev32q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev32.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++- return vrev32q_u16 (a); +++ return vrev32q_u16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev32.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a) ++ { ++- return vrev32q (a); +++ return vrev32q (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrev32.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev32.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a) ++ { ++- return vrev32q_u8 (a); +++ return vrev32q_u8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev32.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev32.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a) ++ { ++- return vrev32q (a); +++ return vrev32q (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrev32.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_x_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vrev32q_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vrev32q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_x_u16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vrev32q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev32q_x_u8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev32t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev32q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vrev64q_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.16" } } */ +++ +++/* +++**foo1: +++** ... +++** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vrev64q (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a) ++ { ++ return vrev64q_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.32" } } */ +++ +++/* +++**foo1: +++** ... +++** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a) +++{ +++ return vrev64q (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_m_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16-clobber.c ++@@ -0,0 +1,17 @@ +++/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +++/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-additional-options "-O2" } */ +++ +++#include "arm_mve.h" +++ +++int16x8_t +++foo (int16x8_t a, mve_pred16_t p) +++{ +++ return vrev64q_m_s16 (a, a, p); +++} +++ +++float16x8_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vrev64q_m_f16 (a, a, p); +++} ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_m_s16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_m_s32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vrev64q_m_s8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vrev64q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_m_u16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_m_u32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev64q_m_u8 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev64q_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vrev64q_s16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vrev64q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++ return vrev64q_s32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++ return vrev64q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev64.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vrev64q_s8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev64.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vrev64q (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++- return vrev64q_u16 (a); +++ return vrev64q_u16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a) ++ { ++- return vrev64q (a); +++ return vrev64q (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrev64.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a) ++ { ++- return vrev64q_u32 (a); +++ return vrev64q_u32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a) ++ { ++- return vrev64q (a); +++ return vrev64q (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrev64.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrev64.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a) ++ { ++- return vrev64q_u8 (a); +++ return vrev64q_u8 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrev64.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrev64.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a) ++ { ++- return vrev64q (a); +++ return vrev64q (a); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrev64.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_x_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_x_s16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_x_s32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++ return vrev64q_x_s8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++ return vrev64q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_x_u16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++ return vrev64q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_x_u32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++ return vrev64q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev64q_x_u8 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrev64t.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, mve_pred16_t p) ++ { ++ return vrev64q_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vrhaddq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrhadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vrhaddq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrhadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vrhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrhadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vrhaddq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrhadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vrhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrhadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vrhaddq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrhadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vrhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrhadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vrhaddq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrhadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vrhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrhadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vrhaddq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrhadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vrhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrhadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vrhaddq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrhadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vrhaddq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrhadd.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrhaddt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vrhaddq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavhat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vrmlaldavhaq_p_s32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavhat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vrmlaldavhaq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhat.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c ++@@ -1,21 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavhat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) ++ { ++ return vrmlaldavhaq_p_u32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhat.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavhat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) ++ { ++ return vrmlaldavhaq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhat.u32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavhat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint64_t +++foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p) +++{ +++ return vrmlaldavhaq_p (1, b, c, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlaldavha.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vrmlaldavhaq_s32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavha.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlaldavha.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vrmlaldavhaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavha.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlaldavha.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo (uint64_t a, uint32x4_t b, uint32x4_t c) ++ { ++ return vrmlaldavhaq_u32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavha.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlaldavha.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo1 (uint64_t a, uint32x4_t b, uint32x4_t c) ++ { ++ return vrmlaldavhaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavha.u32" } } */ +++/* +++**foo2: +++** ... +++** vrmlaldavha.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint64_t +++foo2 (uint32x4_t b, uint32x4_t c) +++{ +++ return vrmlaldavhaq (1, b, c); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavhaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vrmlaldavhaxq_p_s32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhaxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavhaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vrmlaldavhaxq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhaxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlaldavhax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vrmlaldavhaxq_s32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhax.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlaldavhax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vrmlaldavhaxq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhax.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavht.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmlaldavhq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavht.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmlaldavhq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavht.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrmlaldavhq_p_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavht.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavht.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrmlaldavhq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavht.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlaldavh.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vrmlaldavhq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlaldavh.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vrmlaldavhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlaldavh.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vrmlaldavhq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavh.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlaldavh.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint64_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vrmlaldavhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavh.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavhxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmlaldavhxq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlaldavhxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmlaldavhxq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlaldavhx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vrmlaldavhxq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlaldavhx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vrmlaldavhxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlaldavhx.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlsldavhat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vrmlsldavhaq_p_s32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhat.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlsldavhat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vrmlsldavhaq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhat.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlsldavha.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vrmlsldavhaq_s32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavha.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlsldavha.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vrmlsldavhaq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavha.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlsldavhaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vrmlsldavhaxq_p_s32 (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhaxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlsldavhaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) ++ { ++ return vrmlsldavhaxq_p (a, b, c, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhaxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlsldavhax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vrmlsldavhaxq_s32 (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhax.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlsldavhax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int64_t a, int32x4_t b, int32x4_t c) ++ { ++ return vrmlsldavhaxq (a, b, c); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhax.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlsldavht.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmlsldavhq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlsldavht.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmlsldavhq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlsldavh.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vrmlsldavhq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlsldavh.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vrmlsldavhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlsldavhxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmlsldavhxq_p_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhxt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmlsldavhxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmlsldavhxq_p (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhxt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmlsldavhx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vrmlsldavhxq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhx.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmlsldavhx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int64_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vrmlsldavhxq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmlsldavhx.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vrmulhq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vrmulhq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vrmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vrmulhq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vrmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vrmulhq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vrmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vrmulhq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vrmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vrmulhq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vrmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vrmulhq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vrmulhq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrmulh.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrmulht.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vrmulhq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrinta.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vrndaq_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrinta.f16" } } */ +++ +++/* +++**foo1: +++** ... +++** vrinta.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vrndaq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrinta.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a) ++ { ++ return vrndaq_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrinta.f32" } } */ +++ +++/* +++**foo1: +++** ... +++** vrinta.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a) +++{ +++ return vrndaq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintat.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndaq_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintat.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndaq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintat.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndaq_m_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintat.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndaq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintat.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndaq_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintat.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintat.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndaq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintat.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndaq_x_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintat.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintat.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndaq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintm.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vrndmq_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintm.f16" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintm.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vrndmq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintm.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a) ++ { ++ return vrndmq_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintm.f32" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintm.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a) +++{ +++ return vrndmq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintmt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndmq_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintmt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintmt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndmq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintmt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndmq_m_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintmt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintmt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndmq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintmt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndmq_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintmt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintmt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndmq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintmt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndmq_x_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintmt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintmt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndmq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintn.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vrndnq_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintn.f16" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintn.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vrndnq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintn.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a) ++ { ++ return vrndnq_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintn.f32" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintn.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a) +++{ +++ return vrndnq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintnt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndnq_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintnt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintnt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintnt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndnq_m_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintnt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintnt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndnq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintnt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndnq_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintnt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintnt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndnq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintnt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndnq_x_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintnt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintnt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndnq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintp.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vrndpq_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintp.f16" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintp.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vrndpq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintp.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a) ++ { ++ return vrndpq_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintp.f32" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintp.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a) +++{ +++ return vrndpq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintpt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndpq_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintpt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndpq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintpt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndpq_m_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintpt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndpq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintpt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndpq_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintpt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintpt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndpq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintpt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndpq_x_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintpt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintpt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndpq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintz.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vrndq_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintz.f16" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintz.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vrndq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintz.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a) ++ { ++ return vrndq_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintz.f32" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintz.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a) +++{ +++ return vrndq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintzt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndq_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintzt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintzt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintzt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndq_m_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintzt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintzt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintzt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndq_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintzt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintzt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintzt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndq_x_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintzt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintzt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintx.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a) ++ { ++ return vrndxq_f16 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintx.f16" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintx.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a) +++{ +++ return vrndxq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c ++@@ -1,13 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrintx.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a) ++ { ++ return vrndxq_f32 (a); ++ } ++ ++-/* { dg-final { scan-assembler "vrintx.f32" } } */ +++ +++/* +++**foo1: +++** ... +++** vrintx.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a) +++{ +++ return vrndxq (a); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintxt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndxq_m_f16 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintxt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintxt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) ++ { ++ return vrndxq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintxt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndxq_m_f32 (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintxt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintxt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) ++ { ++ return vrndxq_m (inactive, a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintxt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndxq_x_f16 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintxt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintxt.f16 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, mve_pred16_t p) ++ { ++ return vrndxq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintxt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndxq_x_f32 (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrintxt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrintxt.f32 q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, mve_pred16_t p) ++ { ++ return vrndxq_x (a, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_n (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrshlq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b) ++ { ++ return vrshlq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vrshlq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b) ++ { ++ return vrshlq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b) ++ { ++ return vrshlq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b) ++ { ++ return vrshlq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b) ++ { ++ return vrshlq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vrshlq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vrshlq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vrshlq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b) ++ { ++ return vrshlq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int16x8_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b) ++ { ++ return vrshlq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32x4_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b) ++ { ++ return vrshlq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int8x16_t b) ++ { ++ return vrshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vrshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshlq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshlq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshlq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshlq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrshlq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrshlq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshlq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshlq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshlq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshlq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrshlq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vrshlq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshrnbq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrnbt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrnbt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshrnbq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrnbt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrnbt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrshrnbq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrnbt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrnbt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrshrnbq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrnbt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrshrnbq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrnbt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vrshrnbq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnb.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vrshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnb.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++ return vrshrnbq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnb.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++ return vrshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnb.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vrshrnbq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnb.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vrshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnb.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++ return vrshrnbq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnb.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++ return vrshrnbq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnb.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshrntq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrntt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vrshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrntt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshrntq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrntt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vrshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrntt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrshrntq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrntt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vrshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrntt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrshrntq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrntt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vrshrntq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrntt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++ return vrshrntq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++ return vrshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++ return vrshrntq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++ return vrshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++ return vrshrntq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++ return vrshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++ return vrshrntq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++ return vrshrntq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshrnt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++- return vrshrq_m_n_s16 (inactive, a, 16, p); +++ return vrshrq_m_n_s16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++- return vrshrq_m (inactive, a, 16, p); +++ return vrshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++- return vrshrq_m_n_s32 (inactive, a, 32, p); +++ return vrshrq_m_n_s32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++- return vrshrq_m (inactive, a, 32, p); +++ return vrshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++- return vrshrq_m_n_s8 (inactive, a, 8, p); +++ return vrshrq_m_n_s8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++- return vrshrq_m (inactive, a, 8, p); +++ return vrshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++- return vrshrq_m_n_u16 (inactive, a, 16, p); +++ return vrshrq_m_n_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++- return vrshrq_m (inactive, a, 16, p); +++ return vrshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++- return vrshrq_m_n_u32 (inactive, a, 32, p); +++ return vrshrq_m_n_u32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++- return vrshrq_m (inactive, a, 32, p); +++ return vrshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++- return vrshrq_m_n_u8 (inactive, a, 8, p); +++ return vrshrq_m_n_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++- return vrshrq_m (inactive, a, 8, p); +++ return vrshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshr.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++- return vrshrq_n_s16 (a, 16); +++ return vrshrq_n_s16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshr.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshr.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++- return vrshrq (a, 16); +++ return vrshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrshr.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshr.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++- return vrshrq_n_s32 (a, 32); +++ return vrshrq_n_s32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshr.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshr.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++- return vrshrq (a, 32); +++ return vrshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrshr.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshr.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++- return vrshrq_n_s8 (a, 8); +++ return vrshrq_n_s8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshr.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshr.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++- return vrshrq (a, 8); +++ return vrshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrshr.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshr.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++- return vrshrq_n_u16 (a, 16); +++ return vrshrq_n_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshr.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshr.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a) ++ { ++- return vrshrq (a, 16); +++ return vrshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrshr.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshr.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a) ++ { ++- return vrshrq_n_u32 (a, 32); +++ return vrshrq_n_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshr.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshr.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a) ++ { ++- return vrshrq (a, 32); +++ return vrshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrshr.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vrshr.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a) ++ { ++- return vrshrq_n_u8 (a, 8); +++ return vrshrq_n_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vrshr.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vrshr.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a) ++ { ++- return vrshrq (a, 8); +++ return vrshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vrshr.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++- return vrshrq_x_n_s16 (a, 16, p); +++ return vrshrq_x_n_s16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, mve_pred16_t p) ++ { ++- return vrshrq_x (a, 16, p); +++ return vrshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++- return vrshrq_x_n_s32 (a, 32, p); +++ return vrshrq_x_n_s32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, mve_pred16_t p) ++ { ++- return vrshrq_x (a, 32, p); +++ return vrshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++- return vrshrq_x_n_s8 (a, 8, p); +++ return vrshrq_x_n_s8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, mve_pred16_t p) ++ { ++- return vrshrq_x (a, 8, p); +++ return vrshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++- return vrshrq_x_n_u16 (a, 16, p); +++ return vrshrq_x_n_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, mve_pred16_t p) ++ { ++- return vrshrq_x (a, 16, p); +++ return vrshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++- return vrshrq_x_n_u32 (a, 32, p); +++ return vrshrq_x_n_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, mve_pred16_t p) ++ { ++- return vrshrq_x (a, 32, p); +++ return vrshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++- return vrshrq_x_n_u8 (a, 8, p); +++ return vrshrq_x_n_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vrshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, mve_pred16_t p) ++ { ++- return vrshrq_x (a, 8, p); +++ return vrshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vrshrt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c ++@@ -1,23 +1,57 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsbcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p) +++foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p) ++ { ++ return vsbciq_m_s32 (inactive, a, b, carry_out, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsbcit.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsbcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p) +++foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p) ++ { ++ return vsbciq_m (inactive, a, b, carry_out, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsbcit.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c ++@@ -1,23 +1,57 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsbcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p) +++foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p) ++ { ++ return vsbciq_m_u32 (inactive, a, b, carry_out, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsbcit.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsbcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p) +++foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p) ++ { ++ return vsbciq_m (inactive, a, b, carry_out, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsbcit.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsbci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, unsigned * carry_out) +++foo (int32x4_t a, int32x4_t b, unsigned *carry_out) ++ { ++ return vsbciq_s32 (a, b, carry_out); ++ } ++ ++-/* { dg-final { scan-assembler "vsbci.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsbci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, unsigned * carry_out) +++foo1 (int32x4_t a, int32x4_t b, unsigned *carry_out) ++ { ++- return vsbciq_s32 (a, b, carry_out); +++ return vsbciq (a, b, carry_out); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsbci.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsbci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32x4_t b, unsigned * carry_out) +++foo (uint32x4_t a, uint32x4_t b, unsigned *carry_out) ++ { ++ return vsbciq_u32 (a, b, carry_out); ++ } ++ ++-/* { dg-final { scan-assembler "vsbci.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsbci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry_out) +++foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry_out) ++ { ++- return vsbciq_u32 (a, b, carry_out); +++ return vsbciq (a, b, carry_out); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsbci.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c ++@@ -1,23 +1,77 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p) +++foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p) ++ { ++- return vsbcq_m_s32 (inactive, a, b, carry, p); +++ return vsbcq_m_s32 (inactive, a, b, carry, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsbct.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1(int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p) +++foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p) ++ { ++- return vsbcq_m (inactive, a, b, carry, p); +++ return vsbcq_m (inactive, a, b, carry, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsbct.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c ++@@ -1,22 +1,77 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p) +++foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p) ++ { ++- return vsbcq_m_u32 (inactive, a, b, carry, p); +++ return vsbcq_m_u32 (inactive, a, b, carry, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsbct.i32" } } */ +++ +++/* +++**foo1: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p) +++foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p) ++ { ++- return vsbcq_m (inactive, a, b, carry, p); +++ return vsbcq_m (inactive, a, b, carry, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsbct.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c ++@@ -1,21 +1,69 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vsbc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, int32x4_t b, unsigned * carry) +++foo (int32x4_t a, int32x4_t b, unsigned *carry) ++ { ++ return vsbcq_s32 (a, b, carry); ++ } ++ ++-/* { dg-final { scan-assembler "vsbc.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vsbc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, int32x4_t b, unsigned * carry) +++foo1 (int32x4_t a, int32x4_t b, unsigned *carry) ++ { ++ return vsbcq (a, b, carry); ++ } ++ ++-/* { dg-final { scan-assembler "vsbc.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c ++@@ -1,21 +1,69 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vsbc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32x4_t b, unsigned * carry) +++foo (uint32x4_t a, uint32x4_t b, unsigned *carry) ++ { ++ return vsbcq_u32 (a, b, carry); ++ } ++ ++-/* { dg-final { scan-assembler "vsbc.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** lsls (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29(?: @.*|) +++** ... +++** and (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #536870912(?: @.*|) +++** ... +++** orrs (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vsbc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +++** ... +++** ubfx (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry) +++foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry) ++ { ++ return vsbcq (a, b, carry); ++ } ++ ++-/* { dg-final { scan-assembler "vsbc.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo (float16_t a, float16x8_t b) ++-{ ++- return vsetq_lane (23.26, b, 0); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c ++@@ -1,15 +1,53 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16_t a, float16x8_t b) ++ { ++- return vsetq_lane_f16 (a, b, 0); +++ return vsetq_lane_f16 (a, b, 1); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16_t a, float16x8_t b) +++{ +++ return vsetq_lane (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vmov.16" } } */ +++/* +++**foo2: +++** ... +++** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t b) +++{ +++ return vsetq_lane (1.1, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo (float32_t a, float32x4_t b) ++-{ ++- return vsetq_lane (23.34, b, 0); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c ++@@ -1,15 +1,53 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32_t a, float32x4_t b) ++ { ++- return vsetq_lane_f32 (a, b, 0); +++ return vsetq_lane_f32 (a, b, 1); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32_t a, float32x4_t b) +++{ +++ return vsetq_lane (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vmov.32" } } */ +++/* +++**foo2: +++** ... +++** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t b) +++{ +++ return vsetq_lane (1.1, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c ++@@ -1,15 +1,41 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16_t a, int16x8_t b) ++ { ++- return vsetq_lane_s16 (a, b, 0); +++ return vsetq_lane_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vmov.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++int16x8_t +++foo1 (int16_t a, int16x8_t b) +++{ +++ return vsetq_lane (a, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c ++@@ -1,15 +1,41 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32_t a, int32x4_t b) ++ { ++- return vsetq_lane_s32 (a, b, 0); +++ return vsetq_lane_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vmov.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++int32x4_t +++foo1 (int32_t a, int32x4_t b) +++{ +++ return vsetq_lane (a, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c ++@@ -1,16 +1,41 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++-/* { dg-require-effective-target arm_hard_ok } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-mfloat-abi=hard -O2" } */ +++/* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int64x2_t ++ foo (int64_t a, int64x2_t b) ++ { ++- return vsetq_lane_s64 (a, b, 0); +++ return vsetq_lane_s64 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]} } } */ ++ +++/* +++**foo1: +++** ... +++** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++int64x2_t +++foo1 (int64_t a, int64x2_t b) +++{ +++ return vsetq_lane (a, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c ++@@ -1,15 +1,41 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8_t a, int8x16_t b) ++ { ++- return vsetq_lane_s8 (a, b, 0); +++ return vsetq_lane_s8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vmov.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++int8x16_t +++foo1 (int8_t a, int8x16_t b) +++{ +++ return vsetq_lane (a, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c ++@@ -1,15 +1,53 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16_t a, uint16x8_t b) ++ { ++- return vsetq_lane_u16 (a, b, 0); +++ return vsetq_lane_u16 (a, b, 1); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (uint16_t a, uint16x8_t b) +++{ +++ return vsetq_lane (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vmov.16" } } */ +++/* +++**foo2: +++** ... +++** vmov.16 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t b) +++{ +++ return vsetq_lane (1, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c ++@@ -1,15 +1,53 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32_t a, uint32x4_t b) ++ { ++- return vsetq_lane_u32 (a, b, 0); +++ return vsetq_lane_u32 (a, b, 1); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 (uint32_t a, uint32x4_t b) +++{ +++ return vsetq_lane (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vmov.32" } } */ +++/* +++**foo2: +++** ... +++** vmov.32 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t b) +++{ +++ return vsetq_lane (1, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c ++@@ -1,16 +1,53 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++-/* { dg-require-effective-target arm_hard_ok } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++-/* { dg-additional-options "-mfloat-abi=hard -O2" } */ +++/* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint64x2_t ++ foo (uint64_t a, uint64x2_t b) ++ { ++- return vsetq_lane_u64 (a, b, 0); +++ return vsetq_lane_u64 (a, b, 1); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint64x2_t +++foo1 (uint64_t a, uint64x2_t b) +++{ +++ return vsetq_lane (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler {vmov\td0, r[1-9]*[0-9], r[1-9]*[0-9]} } } */ +++/* +++**foo2: +++** ... +++** vmov d[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint64x2_t +++foo2 (uint64x2_t b) +++{ +++ return vsetq_lane (1, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c ++@@ -1,15 +1,53 @@ ++-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8_t a, uint8x16_t b) ++ { ++- return vsetq_lane_u8 (a, b, 0); +++ return vsetq_lane_u8 (a, b, 1); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo1 (uint8_t a, uint8x16_t b) +++{ +++ return vsetq_lane (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vmov.8" } } */ +++/* +++**foo2: +++** ... +++** vmov.8 q[0-9]+\[1\], (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t b) +++{ +++ return vsetq_lane (1, b, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, uint32_t * b, mve_pred16_t p) +++foo (int16x8_t a, uint32_t *b, mve_pred16_t p) ++ { ++- return vshlcq_m_s16 (a, b, 32, p); +++ return vshlcq_m_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, uint32_t * b, mve_pred16_t p) +++foo1 (int16x8_t a, uint32_t *b, mve_pred16_t p) ++ { ++- return vshlcq_m (a, b, 32, p); +++ return vshlcq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, uint32_t * b, mve_pred16_t p) +++foo (int32x4_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, uint32_t * b, mve_pred16_t p) +++foo1 (int32x4_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, uint32_t * b, mve_pred16_t p) +++foo (int8x16_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m_s8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, uint32_t * b, mve_pred16_t p) +++foo1 (int8x16_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16x8_t a, uint32_t * b, mve_pred16_t p) +++foo (uint16x8_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16x8_t a, uint32_t * b, mve_pred16_t p) +++foo1 (uint16x8_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32_t * b, mve_pred16_t p) +++foo (uint32x4_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32_t * b, mve_pred16_t p) +++foo1 (uint32x4_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8x16_t a, uint32_t * b, mve_pred16_t p) +++foo (uint8x16_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m_u8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8x16_t a, uint32_t * b, mve_pred16_t p) +++foo1 (uint8x16_t a, uint32_t *b, mve_pred16_t p) ++ { ++ return vshlcq_m (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlct" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo (int16x8_t a, uint32_t * b) +++foo (int16x8_t a, uint32_t *b) ++ { ++ return vshlcq_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ ++ +++/* +++**foo1: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++-foo1 (int16x8_t a, uint32_t * b) +++foo1 (int16x8_t a, uint32_t *b) ++ { ++ return vshlcq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo (int32x4_t a, uint32_t * b) +++foo (int32x4_t a, uint32_t *b) ++ { ++ return vshlcq_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ ++ +++/* +++**foo1: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++-foo1 (int32x4_t a, uint32_t * b) +++foo1 (int32x4_t a, uint32_t *b) ++ { ++ return vshlcq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo (int8x16_t a, uint32_t * b) +++foo (int8x16_t a, uint32_t *b) ++ { ++ return vshlcq_s8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ ++ +++/* +++**foo1: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++-foo1 (int8x16_t a, uint32_t * b) +++foo1 (int8x16_t a, uint32_t *b) ++ { ++ return vshlcq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo (uint16x8_t a, uint32_t * b) +++foo (uint16x8_t a, uint32_t *b) ++ { ++ return vshlcq_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ ++ +++/* +++**foo1: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++-foo1 (uint16x8_t a, uint32_t * b) +++foo1 (uint16x8_t a, uint32_t *b) ++ { ++ return vshlcq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo (uint32x4_t a, uint32_t * b) +++foo (uint32x4_t a, uint32_t *b) ++ { ++ return vshlcq_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ ++ +++/* +++**foo1: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++-foo1 (uint32x4_t a, uint32_t * b) +++foo1 (uint32x4_t a, uint32_t *b) ++ { ++ return vshlcq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo (uint8x16_t a, uint32_t * b) +++foo (uint8x16_t a, uint32_t *b) ++ { ++ return vshlcq_u8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ ++ +++/* +++**foo1: +++** ... +++** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++-foo1 (uint8x16_t a, uint32_t * b) +++foo1 (uint8x16_t a, uint32_t *b) ++ { ++ return vshlcq (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshlc" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vshllbq_m_n_s16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vshllbq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vshllbq_m_n_s8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vshllbq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vshllbq_m_n_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vshllbq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vshllbq_m_n_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vshllbq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshllb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a) ++ { ++ return vshllbq_n_s16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllb.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshllb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a) ++ { ++ return vshllbq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllb.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshllb.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a) ++ { ++ return vshllbq_n_s8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllb.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshllb.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a) ++ { ++ return vshllbq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllb.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshllb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a) ++ { ++ return vshllbq_n_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllb.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshllb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a) ++ { ++ return vshllbq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllb.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshllb.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a) ++ { ++ return vshllbq_n_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllb.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshllb.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a) ++ { ++ return vshllbq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllb.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++- return vshllbq_x_n_s16 (a, 1, p); +++ return vshllbq_x_n_s16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int32x4_t +++foo1 (int16x8_t a, mve_pred16_t p) +++{ +++ return vshllbq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++- return vshllbq_x_n_s8 (a, 1, p); +++ return vshllbq_x_n_s8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int16x8_t +++foo1 (int8x16_t a, mve_pred16_t p) +++{ +++ return vshllbq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++- return vshllbq_x_n_u16 (a, 1, p); +++ return vshllbq_x_n_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vshllbq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++- return vshllbq_x_n_u8 (a, 1, p); +++ return vshllbq_x_n_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshllbt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshllbt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vshllbq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vshlltq_m_n_s16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vshlltq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vshlltq_m_n_s8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vshlltq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vshlltq_m_n_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vshlltq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vshlltq_m_n_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vshlltq_m (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshllt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a) ++ { ++ return vshlltq_n_s16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshllt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int16x8_t a) ++ { ++ return vshlltq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshllt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a) ++ { ++ return vshlltq_n_s8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshllt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int8x16_t a) ++ { ++ return vshlltq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshllt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a) ++ { ++ return vshlltq_n_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshllt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint16x8_t a) ++ { ++ return vshlltq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshllt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a) ++ { ++ return vshlltq_n_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshllt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint8x16_t a) ++ { ++ return vshlltq (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshllt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++- return vshlltq_x_n_s16 (a, 1, p); +++ return vshlltq_x_n_s16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int32x4_t +++foo1 (int16x8_t a, mve_pred16_t p) +++{ +++ return vshlltq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++- return vshlltq_x_n_s8 (a, 1, p); +++ return vshlltq_x_n_s8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int16x8_t +++foo1 (int8x16_t a, mve_pred16_t p) +++{ +++ return vshlltq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++- return vshlltq_x_n_u16 (a, 1, p); +++ return vshlltq_x_n_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vshlltq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++- return vshlltq_x_n_u8 (a, 1, p); +++ return vshlltq_x_n_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlltt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlltt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vshlltq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n_s16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n_s32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n_s8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n_u32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++ return vshlq_m_n (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b, mve_pred16_t p) ++ { ++ return vshlq_m_r (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vshlq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vshlq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vshlq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vshlq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vshlq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vshlq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vshlq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++ return vshlq_n_s16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++ return vshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++- return vshlq_n_s32 (a, 16); +++ return vshlq_n_s32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++- return vshlq_n (a, 16); +++ return vshlq_n (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshl.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++ return vshlq_n_s8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++ return vshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++- return vshlq_n_u16 (a, 11); +++ return vshlq_n_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a) ++ { ++- return vshlq_n (a, 11); +++ return vshlq_n (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshl.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a) ++ { ++ return vshlq_n_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a) ++ { ++ return vshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a) ++ { ++ return vshlq_n_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a) ++ { ++ return vshlq_n (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32_t b) ++ { ++ return vshlq_r_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32_t b) ++ { ++ return vshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vshlq_r_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int32_t b) ++ { ++ return vshlq_r_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int32_t b) ++ { ++ return vshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int32_t b) ++ { ++ return vshlq_r_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int32_t b) ++ { ++ return vshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32_t b) ++ { ++ return vshlq_r_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32_t b) ++ { ++ return vshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int32_t b) ++ { ++ return vshlq_r_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int32_t b) ++ { ++ return vshlq_r (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vshlq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vshlq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vshlq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.s8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b) ++ { ++ return vshlq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, int16x8_t b) ++ { ++ return vshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b) ++ { ++ return vshlq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, int32x4_t b) ++ { ++ return vshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b) ++ { ++ return vshlq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, int8x16_t b) ++ { ++ return vshlq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vshl.u8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++- return vshlq_x_n_s16 (a, 1, p); +++ return vshlq_x_n_s16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int16x8_t +++foo1 (int16x8_t a, mve_pred16_t p) +++{ +++ return vshlq_x_n (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++- return vshlq_x_n_s32 (a, 1, p); +++ return vshlq_x_n_s32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int32x4_t +++foo1 (int32x4_t a, mve_pred16_t p) +++{ +++ return vshlq_x_n (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++- return vshlq_x_n_s8 (a, 1, p); +++ return vshlq_x_n_s8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int8x16_t +++foo1 (int8x16_t a, mve_pred16_t p) +++{ +++ return vshlq_x_n (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++- return vshlq_x_n_u16 (a, 1, p); +++ return vshlq_x_n_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vshlq_x_n (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, mve_pred16_t p) ++ { ++- return vshlq_x_n_u32 (a, 1, p); +++ return vshlq_x_n_u32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vshlq_x_n (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++- return vshlq_x_n_u8 (a, 1, p); +++ return vshlq_x_n_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo1 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vshlq_x_n (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vshlq_x_s16 (a, b, p); +++ return vshlq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++int16x8_t +++foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +++{ +++ return vshlq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vshlq_x_s32 (a, b, p); +++ return vshlq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++int32x4_t +++foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +++{ +++ return vshlq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++- return vshlq_x_s8 (a, b, p); +++ return vshlq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++int8x16_t +++foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) +++{ +++ return vshlq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vshlq_x_u16 (a, b, p); +++ return vshlq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p) +++{ +++ return vshlq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vshlq_x_u32 (a, b, p); +++ return vshlq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p) +++{ +++ return vshlq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++- return vshlq_x_u8 (a, b, p); +++ return vshlq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshlt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p) +++{ +++ return vshlq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vshrnbq_m_n_s16 (a, b, 8, p); +++ return vshrnbq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrnbt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vshrnbq_m (a, b, 8, p); +++ return vshrnbq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrnbt.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vshrnbq_m_n_s32 (a, b, 16, p); +++ return vshrnbq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrnbt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vshrnbq_m (a, b, 16, p); +++ return vshrnbq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrnbt.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++- return vshrnbq_m_n_u16 (a, b, 8, p); +++ return vshrnbq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrnbt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++- return vshrnbq_m (a, b, 8, p); +++ return vshrnbq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrnbt.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++- return vshrnbq_m_n_u32 (a, b, 16, p); +++ return vshrnbq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrnbt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++- return vshrnbq_m (a, b, 16, p); +++ return vshrnbq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrnbt.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++- return vshrnbq_n_s16 (a, b, 8); +++ return vshrnbq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshrnb.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++- return vshrnbq (a, b, 8); +++ return vshrnbq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshrnb.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++- return vshrnbq_n_s32 (a, b, 16); +++ return vshrnbq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshrnb.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++- return vshrnbq (a, b, 16); +++ return vshrnbq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshrnb.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++- return vshrnbq_n_u16 (a, b, 8); +++ return vshrnbq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshrnb.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++- return vshrnbq (a, b, 8); +++ return vshrnbq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshrnb.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++- return vshrnbq_n_u32 (a, b, 16); +++ return vshrnbq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshrnb.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++- return vshrnbq (a, b, 16); +++ return vshrnbq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshrnb.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vshrntq_m_n_s16 (a, b, 8, p); +++ return vshrntq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrntt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vshrntq_m (a, b, 8, p); +++ return vshrntq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrntt.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vshrntq_m_n_s32 (a, b, 16, p); +++ return vshrntq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrntt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vshrntq_m (a, b, 16, p); +++ return vshrntq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrntt.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++- return vshrntq_m_n_u16 (a, b, 8, p); +++ return vshrntq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrntt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) ++ { ++- return vshrntq_m (a, b, 8, p); +++ return vshrntq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrntt.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++- return vshrntq_m_n_u32 (a, b, 16, p); +++ return vshrntq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrntt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) ++ { ++- return vshrntq_m (a, b, 16, p); +++ return vshrntq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrntt.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int16x8_t b) ++ { ++- return vshrntq_n_s16 (a, b, 8); +++ return vshrntq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshrnt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int16x8_t b) ++ { ++- return vshrntq (a, b, 8); +++ return vshrntq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshrnt.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int32x4_t b) ++ { ++- return vshrntq_n_s32 (a, b, 16); +++ return vshrntq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshrnt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int32x4_t b) ++ { ++- return vshrntq (a, b, 16); +++ return vshrntq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshrnt.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint16x8_t b) ++ { ++- return vshrntq_n_u16 (a, b, 8); +++ return vshrntq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshrnt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint16x8_t b) ++ { ++- return vshrntq (a, b, 8); +++ return vshrntq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshrnt.i16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint32x4_t b) ++ { ++- return vshrntq_n_u32 (a, b, 16); +++ return vshrntq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshrnt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint32x4_t b) ++ { ++- return vshrntq (a, b, 16); +++ return vshrntq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshrnt.i32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++- return vshrq_m_n_s16 (inactive, a, 16, p); +++ return vshrq_m_n_s16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) ++ { ++- return vshrq_m (inactive, a, 16, p); +++ return vshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++- return vshrq_m_n_s32 (inactive, a, 32, p); +++ return vshrq_m_n_s32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) ++ { ++- return vshrq_m (inactive, a, 32, p); +++ return vshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++- return vshrq_m_n_s8 (inactive, a, 8, p); +++ return vshrq_m_n_s8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) ++ { ++- return vshrq_m (inactive, a, 8, p); +++ return vshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++- return vshrq_m_n_u16 (inactive, a, 16, p); +++ return vshrq_m_n_u16 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) ++ { ++- return vshrq_m (inactive, a, 16, p); +++ return vshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++- return vshrq_m_n_u32 (inactive, a, 32, p); +++ return vshrq_m_n_u32 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) ++ { ++- return vshrq_m (inactive, a, 32, p); +++ return vshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++- return vshrq_m_n_u8 (inactive, a, 8, p); +++ return vshrq_m_n_u8 (inactive, a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) ++ { ++- return vshrq_m (inactive, a, 8, p); +++ return vshrq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshr.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a) ++ { ++- return vshrq_n_s16 (a, 16); +++ return vshrq_n_s16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshr.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshr.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a) ++ { ++- return vshrq (a, 16); +++ return vshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshr.s16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshr.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a) ++ { ++- return vshrq_n_s32 (a, 32); +++ return vshrq_n_s32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshr.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshr.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a) ++ { ++- return vshrq (a, 32); +++ return vshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshr.s32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshr.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a) ++ { ++- return vshrq_n_s8 (a, 8); +++ return vshrq_n_s8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshr.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshr.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a) ++ { ++- return vshrq (a, 8); +++ return vshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshr.s8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshr.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a) ++ { ++- return vshrq_n_u16 (a, 16); +++ return vshrq_n_u16 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshr.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vshr.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a) ++ { ++- return vshrq (a, 16); +++ return vshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshr.u16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshr.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a) ++ { ++- return vshrq_n_u32 (a, 32); +++ return vshrq_n_u32 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshr.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vshr.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a) ++ { ++- return vshrq (a, 32); +++ return vshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshr.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vshr.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a) ++ { ++- return vshrq_n_u8 (a, 8); +++ return vshrq_n_u8 (a, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vshr.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vshr.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a) ++ { ++- return vshrq (a, 8); +++ return vshrq (a, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vshr.u8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, mve_pred16_t p) ++ { ++- return vshrq_x_n_s16 (a, 16, p); +++ return vshrq_x_n_s16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.s16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int16x8_t +++foo1 (int16x8_t a, mve_pred16_t p) +++{ +++ return vshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, mve_pred16_t p) ++ { ++- return vshrq_x_n_s32 (a, 32, p); +++ return vshrq_x_n_s32 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.s32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int32x4_t +++foo1 (int32x4_t a, mve_pred16_t p) +++{ +++ return vshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, mve_pred16_t p) ++ { ++- return vshrq_x_n_s8 (a, 8, p); +++ return vshrq_x_n_s8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.s8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++int8x16_t +++foo1 (int8x16_t a, mve_pred16_t p) +++{ +++ return vshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, mve_pred16_t p) ++ { ++- return vshrq_x_n_u16 (a, 16, p); +++ return vshrq_x_n_u16 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.u16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, mve_pred16_t p) ++ { ++- return vshrq_x_n_u8 (a, 8, p); +++ return vshrq_x_n_u8 (a, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vshrt.u8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo1 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vshrq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vsliq_m_n_s16 (a, b, 15, p); +++ return vsliq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vsliq_m (a, b, 15, p); +++ return vsliq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vsliq_m_n_s32 (a, b, 31, p); +++ return vsliq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vsliq_m (a, b, 31, p); +++ return vsliq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++- return vsliq_m_n_s8 (a, b, 7, p); +++ return vsliq_m_n_s8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++- return vsliq_m (a, b, 7, p); +++ return vsliq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++- return vsliq_m_n_u16 (a, b, 15, p); +++ return vsliq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++- return vsliq_m (a, b, 15, p); +++ return vsliq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++- return vsliq_m_n_u32 (a, b, 31, p); +++ return vsliq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++- return vsliq_m (a, b, 31, p); +++ return vsliq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++- return vsliq_m_n_u8 (a, b, 7, p); +++ return vsliq_m_n_u8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vslit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++- return vsliq_m (a, b, 7, p); +++ return vsliq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vslit.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsli.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++- return vsliq_n_s16 (a, b, 15); +++ return vsliq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsli.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsli.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++- return vsliq (a, b, 15); +++ return vsliq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsli.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsli.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++- return vsliq_n_s32 (a, b, 31); +++ return vsliq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsli.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsli.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++- return vsliq (a, b, 31); +++ return vsliq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsli.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsli.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++- return vsliq_n_s8 (a, b, 7); +++ return vsliq_n_s8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsli.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vsli.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++- return vsliq (a, b, 7); +++ return vsliq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsli.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsli.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++- return vsliq_n_u16 (a, b, 15); +++ return vsliq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsli.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsli.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++- return vsliq (a, b, 15); +++ return vsliq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsli.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsli.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++- return vsliq_n_u32 (a, b, 31); +++ return vsliq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsli.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsli.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++- return vsliq (a, b, 31); +++ return vsliq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsli.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsli.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++- return vsliq_n_u8 (a, b, 7); +++ return vsliq_n_u8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsli.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vsli.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++- return vsliq (a, b, 7); +++ return vsliq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsli.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vsriq_m_n_s16 (a, b, 4, p); +++ return vsriq_m_n_s16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsrit.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vsriq_m (a, b, 4, p); +++ return vsriq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vsriq_m_n_s32 (a, b, 2, p); +++ return vsriq_m_n_s32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsrit.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vsriq_m (a, b, 2, p); +++ return vsriq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++- return vsriq_m_n_s8 (a, b, 4, p); +++ return vsriq_m_n_s8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsrit.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++- return vsriq_m (a, b, 4, p); +++ return vsriq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++- return vsriq_m_n_u16 (a, b, 4, p); +++ return vsriq_m_n_u16 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsrit.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++- return vsriq_m (a, b, 4, p); +++ return vsriq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++- return vsriq_m_n_u32 (a, b, 4, p); +++ return vsriq_m_n_u32 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsrit.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++- return vsriq_m (a, b, 4, p); +++ return vsriq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++- return vsriq_m_n_u8 (a, b, 4, p); +++ return vsriq_m_n_u8 (a, b, 1, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsrit.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsrit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++- return vsriq_m (a, b, 4, p); +++ return vsriq_m (a, b, 1, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsri.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++- return vsriq_n_s16 (a, b, 4); +++ return vsriq_n_s16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsri.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsri.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++- return vsriq (a, b, 4); +++ return vsriq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsri.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsri.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++- return vsriq_n_s32 (a, b, 4); +++ return vsriq_n_s32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsri.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsri.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++- return vsriq (a, b, 4); +++ return vsriq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsri.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsri.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++- return vsriq_n_s8 (a, b, 4); +++ return vsriq_n_s8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsri.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vsri.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++- return vsriq (a, b, 4); +++ return vsriq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsri.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsri.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++- return vsriq_n_u16 (a, b, 4); +++ return vsriq_n_u16 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsri.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsri.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++- return vsriq (a, b, 4); +++ return vsriq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsri.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsri.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++- return vsriq_n_u32 (a, b, 4); +++ return vsriq_n_u32 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsri.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsri.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++- return vsriq (a, b, 4); +++ return vsriq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsri.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsri.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++- return vsriq_n_u8 (a, b, 4); +++ return vsriq_n_u8 (a, b, 1); ++ } ++ ++-/* { dg-final { scan-assembler "vsri.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vsri.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++- return vsriq (a, b, 4); +++ return vsriq (a, b, 1); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vsri.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c ++@@ -1,25 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-void ++-foo (float16_t * addr, float16x8_t value) ++-{ ++- vst1q_f16 (addr, value); ++-} +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float16_t * addr, float16x8_t value) +++foo (float16_t *base, float16x8_t value) ++ { ++- vst1q (addr, value); +++ return vst1q_f16 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler-times "vstrh.16" 2 } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo2 (float16_t a, float16x8_t x) +++foo1 (float16_t *base, float16x8_t value) ++ { ++- vst1q (&a, x); +++ return vst1q (base, value); ++ } +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float32_t * addr, float32x4_t value) +++foo (float32_t *base, float32x4_t value) ++ { ++- vst1q_f32 (addr, value); +++ return vst1q_f32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float32_t * addr, float32x4_t value) +++foo1 (float32_t *base, float32x4_t value) ++ { ++- vst1q (addr, value); +++ return vst1q (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float16_t * addr, float16x8_t value, mve_pred16_t p) +++foo (float16_t *base, float16x8_t value, mve_pred16_t p) ++ { ++- vst1q_p_f16 (addr, value, p); +++ return vst1q_p_f16 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float16_t * addr, float16x8_t value, mve_pred16_t p) +++foo1 (float16_t *base, float16x8_t value, mve_pred16_t p) ++ { ++- vst1q_p (addr, value, p); +++ return vst1q_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float32_t * addr, float32x4_t value, mve_pred16_t p) +++foo (float32_t *base, float32x4_t value, mve_pred16_t p) ++ { ++- vst1q_p_f32 (addr, value, p); +++ return vst1q_p_f32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float32_t * addr, float32x4_t value, mve_pred16_t p) +++foo1 (float32_t *base, float32x4_t value, mve_pred16_t p) ++ { ++- vst1q_p (addr, value, p); +++ return vst1q_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * addr, int16x8_t value, mve_pred16_t p) +++foo (int16_t *base, int16x8_t value, mve_pred16_t p) ++ { ++- vst1q_p_s16 (addr, value, p); +++ return vst1q_p_s16 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * addr, int16x8_t value, mve_pred16_t p) +++foo1 (int16_t *base, int16x8_t value, mve_pred16_t p) ++ { ++- vst1q_p (addr, value, p); +++ return vst1q_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int32_t * addr, int32x4_t value, mve_pred16_t p) +++foo (int32_t *base, int32x4_t value, mve_pred16_t p) ++ { ++- vst1q_p_s32 (addr, value, p); +++ return vst1q_p_s32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int32_t * addr, int32x4_t value, mve_pred16_t p) +++foo1 (int32_t *base, int32x4_t value, mve_pred16_t p) ++ { ++- vst1q_p (addr, value, p); +++ return vst1q_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * addr, int8x16_t value, mve_pred16_t p) +++foo (int8_t *base, int8x16_t value, mve_pred16_t p) ++ { ++- vst1q_p_s8 (addr, value, p); +++ return vst1q_p_s8 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int8x16_t value, mve_pred16_t p) +++foo1 (int8_t *base, int8x16_t value, mve_pred16_t p) ++ { ++- vst1q_p (addr, value, p); +++ return vst1q_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * addr, uint16x8_t value, mve_pred16_t p) +++foo (uint16_t *base, uint16x8_t value, mve_pred16_t p) ++ { ++- vst1q_p_u16 (addr, value, p); +++ return vst1q_p_u16 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * addr, uint16x8_t value, mve_pred16_t p) +++foo1 (uint16_t *base, uint16x8_t value, mve_pred16_t p) ++ { ++- vst1q_p (addr, value, p); +++ return vst1q_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32_t * addr, uint32x4_t value, mve_pred16_t p) +++foo (uint32_t *base, uint32x4_t value, mve_pred16_t p) ++ { ++- vst1q_p_u32 (addr, value, p); +++ return vst1q_p_u32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32_t * addr, uint32x4_t value, mve_pred16_t p) +++foo1 (uint32_t *base, uint32x4_t value, mve_pred16_t p) ++ { ++- vst1q_p (addr, value, p); +++ return vst1q_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * addr, uint8x16_t value, mve_pred16_t p) +++foo (uint8_t *base, uint8x16_t value, mve_pred16_t p) ++ { ++- vst1q_p_u8 (addr, value, p); +++ return vst1q_p_u8 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint8x16_t value, mve_pred16_t p) +++foo1 (uint8_t *base, uint8x16_t value, mve_pred16_t p) ++ { ++- vst1q_p (addr, value, p); +++ return vst1q_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c ++@@ -1,25 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-void ++-foo (int16_t * addr, int16x8_t value) ++-{ ++- vst1q_s16 (addr, value); ++-} +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * addr, int16x8_t value) +++foo (int16_t *base, int16x8_t value) ++ { ++- vst1q (addr, value); +++ return vst1q_s16 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler-times "vstrh.16" 2 } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo2 (int16_t a, int16x8_t x) +++foo1 (int16_t *base, int16x8_t value) ++ { ++- vst1q (&a, x); +++ return vst1q (base, value); ++ } +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int32_t * addr, int32x4_t value) +++foo (int32_t *base, int32x4_t value) ++ { ++- vst1q_s32 (addr, value); +++ return vst1q_s32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int32_t * addr, int32x4_t value) +++foo1 (int32_t *base, int32x4_t value) ++ { ++- vst1q (addr, value); +++ return vst1q (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c ++@@ -1,25 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-void ++-foo (int8_t * addr, int8x16_t value) ++-{ ++- vst1q_s8 (addr, value); ++-} +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int8x16_t value) +++foo (int8_t *base, int8x16_t value) ++ { ++- vst1q (addr, value); +++ return vst1q_s8 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler-times "vstrb.8" 2 } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo2 (int8_t a, int8x16_t x) +++foo1 (int8_t *base, int8x16_t value) ++ { ++- vst1q (&a, x); +++ return vst1q (base, value); ++ } +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c ++@@ -1,25 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-void ++-foo (uint16_t * addr, uint16x8_t value) ++-{ ++- vst1q_u16 (addr, value); ++-} +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * addr, uint16x8_t value) +++foo (uint16_t *base, uint16x8_t value) ++ { ++- vst1q (addr, value); +++ return vst1q_u16 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler-times "vstrh.16" 2 } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo2 (uint16_t a, uint16x8_t x) +++foo1 (uint16_t *base, uint16x8_t value) ++ { ++- vst1q (&a, x); +++ return vst1q (base, value); ++ } +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32_t * addr, uint32x4_t value) +++foo (uint32_t *base, uint32x4_t value) ++ { ++- vst1q_u32 (addr, value); +++ return vst1q_u32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32_t * addr, uint32x4_t value) +++foo1 (uint32_t *base, uint32x4_t value) ++ { ++- vst1q (addr, value); +++ return vst1q (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c ++@@ -1,25 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ ++-void ++-foo (uint8_t * addr, uint8x16_t value) ++-{ ++- vst1q_u8 (addr, value); ++-} +++#ifdef __cplusplus +++extern "C" { +++#endif ++ +++/* +++**foo: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint8x16_t value) +++foo (uint8_t *base, uint8x16_t value) ++ { ++- vst1q (addr, value); +++ return vst1q_u8 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler-times "vstrb.8" 2 } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo2 (uint8_t a, uint8x16_t x) +++foo1 (uint8_t *base, uint8x16_t value) ++ { ++- vst1q (&a, x); +++ return vst1q (base, value); ++ } +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float16_t * addr, float16x8x2_t value) +++foo (float16_t *addr, float16x8x2_t value) ++ { ++- vst2q_f16 (addr, value); +++ return vst2q_f16 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst20.16" } } */ ++-/* { dg-final { scan-assembler "vst21.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float16_t * addr, float16x8x2_t value) +++foo1 (float16_t *addr, float16x8x2_t value) ++ { ++- vst2q (addr, value); +++ return vst2q (addr, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vst20.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float32_t * addr, float32x4x2_t value) +++foo (float32_t *addr, float32x4x2_t value) ++ { ++- vst2q_f32 (addr, value); +++ return vst2q_f32 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst20.32" } } */ ++-/* { dg-final { scan-assembler "vst21.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float32_t * addr, float32x4x2_t value) +++foo1 (float32_t *addr, float32x4x2_t value) ++ { ++- vst2q (addr, value); +++ return vst2q (addr, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vst20.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * addr, int16x8x2_t value) +++foo (int16_t *addr, int16x8x2_t value) ++ { ++- vst2q_s16 (addr, value); +++ return vst2q_s16 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst20.16" } } */ ++-/* { dg-final { scan-assembler "vst21.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * addr, int16x8x2_t value) +++foo1 (int16_t *addr, int16x8x2_t value) ++ { ++- vst2q (addr, value); +++ return vst2q (addr, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vst20.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int32_t * addr, int32x4x2_t value) +++foo (int32_t *addr, int32x4x2_t value) ++ { ++- vst2q_s32 (addr, value); +++ return vst2q_s32 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst20.32" } } */ ++-/* { dg-final { scan-assembler "vst21.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int32_t * addr, int32x4x2_t value) +++foo1 (int32_t *addr, int32x4x2_t value) ++ { ++- vst2q (addr, value); +++ return vst2q (addr, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vst20.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * addr, int8x16x2_t value) +++foo (int8_t *addr, int8x16x2_t value) ++ { ++- vst2q_s8 (addr, value); +++ return vst2q_s8 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst20.8" } } */ ++-/* { dg-final { scan-assembler "vst21.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vst20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int8x16x2_t value) +++foo1 (int8_t *addr, int8x16x2_t value) ++ { ++- vst2q (addr, value); +++ return vst2q (addr, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vst20.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * addr, uint16x8x2_t value) +++foo (uint16_t *addr, uint16x8x2_t value) ++ { ++- vst2q_u16 (addr, value); +++ return vst2q_u16 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst20.16" } } */ ++-/* { dg-final { scan-assembler "vst21.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * addr, uint16x8x2_t value) +++foo1 (uint16_t *addr, uint16x8x2_t value) ++ { ++- vst2q (addr, value); +++ return vst2q (addr, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vst20.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32_t * addr, uint32x4x2_t value) +++foo (uint32_t *addr, uint32x4x2_t value) ++ { ++- vst2q_u32 (addr, value); +++ return vst2q_u32 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst20.32" } } */ ++-/* { dg-final { scan-assembler "vst21.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32_t * addr, uint32x4x2_t value) +++foo1 (uint32_t *addr, uint32x4x2_t value) ++ { ++- vst2q (addr, value); +++ return vst2q (addr, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vst20.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c ++@@ -1,22 +1,45 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * addr, uint8x16x2_t value) +++foo (uint8_t *addr, uint8x16x2_t value) ++ { ++- vst2q_u8 (addr, value); +++ return vst2q_u8 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst20.8" } } */ ++-/* { dg-final { scan-assembler "vst21.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vst20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++** vst21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint8x16x2_t value) +++foo1 (uint8_t *addr, uint8x16x2_t value) ++ { ++- vst2q (addr, value); +++ return vst2q (addr, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vst20.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c ++@@ -1,37 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo (float16_t * addr, float16x8x4_t value) +++foo (float16_t *addr, float16x8x4_t value) ++ { ++- vst4q_f16 (addr, value); +++ return vst4q_f16 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.16" } } */ ++-/* { dg-final { scan-assembler "vst41.16" } } */ ++-/* { dg-final { scan-assembler "vst42.16" } } */ ++-/* { dg-final { scan-assembler "vst43.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo1 (float16_t * addr, float16x8x4_t value) +++foo1 (float16_t *addr, float16x8x4_t value) ++ { ++- vst4q (addr, value); +++ return vst4q (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.16" } } */ ++-/* { dg-final { scan-assembler "vst41.16" } } */ ++-/* { dg-final { scan-assembler "vst42.16" } } */ ++-/* { dg-final { scan-assembler "vst43.16" } } */ ++- ++-void ++-foo2 (float16_t * addr, float16x8x4_t value) ++-{ ++- vst4q_f16 (addr, value); ++- addr += 32; ++- vst4q_f16 (addr, value); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!} } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c ++@@ -1,37 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo (float32_t * addr, float32x4x4_t value) +++foo (float32_t *addr, float32x4x4_t value) ++ { ++- vst4q_f32 (addr, value); +++ return vst4q_f32 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.32" } } */ ++-/* { dg-final { scan-assembler "vst41.32" } } */ ++-/* { dg-final { scan-assembler "vst42.32" } } */ ++-/* { dg-final { scan-assembler "vst43.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo1 (float32_t * addr, float32x4x4_t value) +++foo1 (float32_t *addr, float32x4x4_t value) ++ { ++- vst4q (addr, value); +++ return vst4q (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.32" } } */ ++-/* { dg-final { scan-assembler "vst41.32" } } */ ++-/* { dg-final { scan-assembler "vst42.32" } } */ ++-/* { dg-final { scan-assembler "vst43.32" } } */ ++- ++-void ++-foo2 (float32_t * addr, float32x4x4_t value) ++-{ ++- vst4q_f32 (addr, value); ++- addr += 16; ++- vst4q_f32 (addr, value); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!} } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c ++@@ -1,37 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo (int16_t * addr, int16x8x4_t value) +++foo (int16_t *addr, int16x8x4_t value) ++ { ++- vst4q_s16 (addr, value); +++ return vst4q_s16 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.16" } } */ ++-/* { dg-final { scan-assembler "vst41.16" } } */ ++-/* { dg-final { scan-assembler "vst42.16" } } */ ++-/* { dg-final { scan-assembler "vst43.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo1 (int16_t * addr, int16x8x4_t value) +++foo1 (int16_t *addr, int16x8x4_t value) ++ { ++- vst4q (addr, value); +++ return vst4q (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.16" } } */ ++-/* { dg-final { scan-assembler "vst41.16" } } */ ++-/* { dg-final { scan-assembler "vst42.16" } } */ ++-/* { dg-final { scan-assembler "vst43.16" } } */ ++- ++-void ++-foo2 (int16_t * addr, int16x8x4_t value) ++-{ ++- vst4q_s16 (addr, value); ++- addr += 32; ++- vst4q_s16 (addr, value); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!} } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c ++@@ -1,37 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo (int32_t * addr, int32x4x4_t value) +++foo (int32_t *addr, int32x4x4_t value) ++ { ++- vst4q_s32 (addr, value); +++ return vst4q_s32 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.32" } } */ ++-/* { dg-final { scan-assembler "vst41.32" } } */ ++-/* { dg-final { scan-assembler "vst42.32" } } */ ++-/* { dg-final { scan-assembler "vst43.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo1 (int32_t * addr, int32x4x4_t value) +++foo1 (int32_t *addr, int32x4x4_t value) ++ { ++- vst4q (addr, value); +++ return vst4q (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.32" } } */ ++-/* { dg-final { scan-assembler "vst41.32" } } */ ++-/* { dg-final { scan-assembler "vst42.32" } } */ ++-/* { dg-final { scan-assembler "vst43.32" } } */ ++- ++-void ++-foo2 (int32_t * addr, int32x4x4_t value) ++-{ ++- vst4q_s32 (addr, value); ++- addr += 16; ++- vst4q_s32 (addr, value); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!} } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c ++@@ -1,37 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo (int8_t * addr, int8x16x4_t value) +++foo (int8_t *addr, int8x16x4_t value) ++ { ++- vst4q_s8 (addr, value); +++ return vst4q_s8 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.8" } } */ ++-/* { dg-final { scan-assembler "vst41.8" } } */ ++-/* { dg-final { scan-assembler "vst42.8" } } */ ++-/* { dg-final { scan-assembler "vst43.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vst40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int8x16x4_t value) +++foo1 (int8_t *addr, int8x16x4_t value) ++ { ++- vst4q (addr, value); +++ return vst4q (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.8" } } */ ++-/* { dg-final { scan-assembler "vst41.8" } } */ ++-/* { dg-final { scan-assembler "vst42.8" } } */ ++-/* { dg-final { scan-assembler "vst43.8" } } */ ++- ++-void ++-foo2 (int8_t * addr, int8x16x4_t value) ++-{ ++- vst4q_s8 (addr, value); ++- addr += 16*4; ++- vst4q_s8 (addr, value); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler {vst43.8\s\{.*\}, \[.*\]!} } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c ++@@ -1,37 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo (uint16_t * addr, uint16x8x4_t value) +++foo (uint16_t *addr, uint16x8x4_t value) ++ { ++- vst4q_u16 (addr, value); +++ return vst4q_u16 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.16" } } */ ++-/* { dg-final { scan-assembler "vst41.16" } } */ ++-/* { dg-final { scan-assembler "vst42.16" } } */ ++-/* { dg-final { scan-assembler "vst43.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo1 (uint16_t * addr, uint16x8x4_t value) +++foo1 (uint16_t *addr, uint16x8x4_t value) ++ { ++- vst4q (addr, value); +++ return vst4q (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.16" } } */ ++-/* { dg-final { scan-assembler "vst41.16" } } */ ++-/* { dg-final { scan-assembler "vst42.16" } } */ ++-/* { dg-final { scan-assembler "vst43.16" } } */ ++- ++-void ++-foo2 (uint16_t * addr, uint16x8x4_t value) ++-{ ++- vst4q_u16 (addr, value); ++- addr += 32; ++- vst4q_u16 (addr, value); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!} } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c ++@@ -1,37 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo (uint32_t * addr, uint32x4x4_t value) +++foo (uint32_t *addr, uint32x4x4_t value) ++ { ++- vst4q_u32 (addr, value); +++ return vst4q_u32 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.32" } } */ ++-/* { dg-final { scan-assembler "vst41.32" } } */ ++-/* { dg-final { scan-assembler "vst42.32" } } */ ++-/* { dg-final { scan-assembler "vst43.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo1 (uint32_t * addr, uint32x4x4_t value) +++foo1 (uint32_t *addr, uint32x4x4_t value) ++ { ++- vst4q (addr, value); +++ return vst4q (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.32" } } */ ++-/* { dg-final { scan-assembler "vst41.32" } } */ ++-/* { dg-final { scan-assembler "vst42.32" } } */ ++-/* { dg-final { scan-assembler "vst43.32" } } */ ++- ++-void ++-foo2 (uint32_t * addr, uint32x4x4_t value) ++-{ ++- vst4q_u32 (addr, value); ++- addr += 16; ++- vst4q_u32 (addr, value); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!} } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c ++@@ -1,37 +1,47 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vst40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo (uint8_t * addr, uint8x16x4_t value) +++foo (uint8_t *addr, uint8x16x4_t value) ++ { ++- vst4q_u8 (addr, value); +++ return vst4q_u8 (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.8" } } */ ++-/* { dg-final { scan-assembler "vst41.8" } } */ ++-/* { dg-final { scan-assembler "vst42.8" } } */ ++-/* { dg-final { scan-assembler "vst43.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vst40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** vst43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\] +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint8x16x4_t value) +++foo1 (uint8_t *addr, uint8x16x4_t value) ++ { ++- vst4q (addr, value); +++ return vst4q (addr, value); ++ } ++ ++-/* { dg-final { scan-assembler "vst40.8" } } */ ++-/* { dg-final { scan-assembler "vst41.8" } } */ ++-/* { dg-final { scan-assembler "vst42.8" } } */ ++-/* { dg-final { scan-assembler "vst43.8" } } */ ++- ++-void ++-foo2 (uint8_t * addr, uint8x16x4_t value) ++-{ ++- vst4q_u8 (addr, value); ++- addr += 16*4; ++- vst4q_u8 (addr, value); +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler {vst43.8\s\{.*\}, \[.*\]!} } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * addr, int16x8_t value, mve_pred16_t p) +++foo (int8_t *base, int16x8_t value, mve_pred16_t p) ++ { ++- vstrbq_p_s16 (addr, value, p); +++ return vstrbq_p_s16 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int16x8_t value, mve_pred16_t p) +++foo1 (int8_t *base, int16x8_t value, mve_pred16_t p) ++ { ++- vstrbq_p (addr, value, p); +++ return vstrbq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * addr, int32x4_t value, mve_pred16_t p) +++foo (int8_t *base, int32x4_t value, mve_pred16_t p) ++ { ++- vstrbq_p_s32 (addr, value, p); +++ return vstrbq_p_s32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int32x4_t value, mve_pred16_t p) +++foo1 (int8_t *base, int32x4_t value, mve_pred16_t p) ++ { ++- vstrbq_p (addr, value, p); +++ return vstrbq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * addr, int8x16_t value, mve_pred16_t p) +++foo (int8_t *base, int8x16_t value, mve_pred16_t p) ++ { ++- vstrbq_p_s8 (addr, value, p); +++ return vstrbq_p_s8 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int8x16_t value, mve_pred16_t p) +++foo1 (int8_t *base, int8x16_t value, mve_pred16_t p) ++ { ++- vstrbq_p (addr, value, p); +++ return vstrbq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * addr, uint16x8_t value, mve_pred16_t p) +++foo (uint8_t *base, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrbq_p_u16 (addr, value, p); +++ return vstrbq_p_u16 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint16x8_t value, mve_pred16_t p) +++foo1 (uint8_t *base, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrbq_p (addr, value, p); +++ return vstrbq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * addr, uint32x4_t value, mve_pred16_t p) +++foo (uint8_t *base, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrbq_p_u32 (addr, value, p); +++ return vstrbq_p_u32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint32x4_t value, mve_pred16_t p) +++foo1 (uint8_t *base, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrbq_p (addr, value, p); +++ return vstrbq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * addr, uint8x16_t value, mve_pred16_t p) +++foo (uint8_t *base, uint8x16_t value, mve_pred16_t p) ++ { ++- vstrbq_p_u8 (addr, value, p); +++ return vstrbq_p_u8 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint8x16_t value, mve_pred16_t p) +++foo1 (uint8_t *base, uint8x16_t value, mve_pred16_t p) ++ { ++- vstrbq_p (addr, value, p); +++ return vstrbq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * addr, int16x8_t value) +++foo (int8_t *base, int16x8_t value) ++ { ++- vstrbq_s16 (addr, value); +++ return vstrbq_s16 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int16x8_t value) +++foo1 (int8_t *base, int16x8_t value) ++ { ++- vstrbq (addr, value); +++ return vstrbq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * addr, int32x4_t value) +++foo (int8_t *base, int32x4_t value) ++ { ++- vstrbq_s32 (addr, value); +++ return vstrbq_s32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int32x4_t value) +++foo1 (int8_t *base, int32x4_t value) ++ { ++- vstrbq (addr, value); +++ return vstrbq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * addr, int8x16_t value) +++foo (int8_t *base, int8x16_t value) ++ { ++- vstrbq_s8 (addr, value); +++ return vstrbq_s8 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * addr, int8x16_t value) +++foo1 (int8_t *base, int8x16_t value) ++ { ++- vstrbq (addr, value); +++ return vstrbq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) +++foo (int8_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p_s16 (base, offset, value, p); +++ return vstrbq_scatter_offset_p_s16 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) +++foo1 (int8_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p (base, offset, value, p); +++ return vstrbq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo (int8_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p_s32 (base, offset, value, p); +++ return vstrbq_scatter_offset_p_s32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo1 (int8_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p (base, offset, value, p); +++ return vstrbq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * base, uint8x16_t offset, int8x16_t value, mve_pred16_t p) +++foo (int8_t *base, uint8x16_t offset, int8x16_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p_s8 (base, offset, value, p); +++ return vstrbq_scatter_offset_p_s8 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * base, uint8x16_t offset, int8x16_t value, mve_pred16_t p) +++foo1 (int8_t *base, uint8x16_t offset, int8x16_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p (base, offset, value, p); +++ return vstrbq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) +++foo (uint8_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p_u16 (base, offset, value, p); +++ return vstrbq_scatter_offset_p_u16 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) +++foo1 (uint8_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p (base, offset, value, p); +++ return vstrbq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo (uint8_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p_u32 (base, offset, value, p); +++ return vstrbq_scatter_offset_p_u32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo1 (uint8_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p (base, offset, value, p); +++ return vstrbq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p) +++foo (uint8_t *base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p_u8 (base, offset, value, p); +++ return vstrbq_scatter_offset_p_u8 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p) +++foo1 (uint8_t *base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p) ++ { ++- vstrbq_scatter_offset_p (base, offset, value, p); +++ return vstrbq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrbt.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * base, uint16x8_t offset, int16x8_t value) +++foo (int8_t *base, uint16x8_t offset, int16x8_t value) ++ { ++- vstrbq_scatter_offset_s16 (base, offset, value); +++ return vstrbq_scatter_offset_s16 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * base, uint16x8_t offset, int16x8_t value) +++foo1 (int8_t *base, uint16x8_t offset, int16x8_t value) ++ { ++- vstrbq_scatter_offset (base, offset, value); +++ return vstrbq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * base, uint32x4_t offset, int32x4_t value) +++foo (int8_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrbq_scatter_offset_s32 (base, offset, value); +++ return vstrbq_scatter_offset_s32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * base, uint32x4_t offset, int32x4_t value) +++foo1 (int8_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrbq_scatter_offset (base, offset, value); +++ return vstrbq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int8_t * base, uint8x16_t offset, int8x16_t value) +++foo (int8_t *base, uint8x16_t offset, int8x16_t value) ++ { ++- vstrbq_scatter_offset_s8 (base, offset, value); +++ return vstrbq_scatter_offset_s8 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int8_t * base, uint8x16_t offset, int8x16_t value) +++foo1 (int8_t *base, uint8x16_t offset, int8x16_t value) ++ { ++- vstrbq_scatter_offset (base, offset, value); +++ return vstrbq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * base, uint16x8_t offset, uint16x8_t value) +++foo (uint8_t *base, uint16x8_t offset, uint16x8_t value) ++ { ++- vstrbq_scatter_offset_u16 (base, offset, value); +++ return vstrbq_scatter_offset_u16 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * base, uint16x8_t offset, uint16x8_t value) +++foo1 (uint8_t *base, uint16x8_t offset, uint16x8_t value) ++ { ++- vstrbq_scatter_offset (base, offset, value); +++ return vstrbq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * base, uint32x4_t offset, uint32x4_t value) +++foo (uint8_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrbq_scatter_offset_u32 (base, offset, value); +++ return vstrbq_scatter_offset_u32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * base, uint32x4_t offset, uint32x4_t value) +++foo1 (uint8_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrbq_scatter_offset (base, offset, value); +++ return vstrbq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * base, uint8x16_t offset, uint8x16_t value) +++foo (uint8_t *base, uint8x16_t offset, uint8x16_t value) ++ { ++- vstrbq_scatter_offset_u8 (base, offset, value); +++ return vstrbq_scatter_offset_u8 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * base, uint8x16_t offset, uint8x16_t value) +++foo1 (uint8_t *base, uint8x16_t offset, uint8x16_t value) ++ { ++- vstrbq_scatter_offset (base, offset, value); +++ return vstrbq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * addr, uint16x8_t value) +++foo (uint8_t *base, uint16x8_t value) ++ { ++- vstrbq_u16 (addr, value); +++ return vstrbq_u16 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint16x8_t value) +++foo1 (uint8_t *base, uint16x8_t value) ++ { ++- vstrbq (addr, value); +++ return vstrbq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * addr, uint32x4_t value) +++foo (uint8_t *base, uint32x4_t value) ++ { ++- vstrbq_u32 (addr, value); +++ return vstrbq_u32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint32x4_t value) +++foo1 (uint8_t *base, uint32x4_t value) ++ { ++- vstrbq (addr, value); +++ return vstrbq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint8_t * addr, uint8x16_t value) +++foo (uint8_t *base, uint8x16_t value) ++ { ++- vstrbq_u8 (addr, value); +++ return vstrbq_u8 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrb.8" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint8_t * addr, uint8x16_t value) +++foo1 (uint8_t *base, uint8x16_t value) ++ { ++- vstrbq (addr, value); +++ return vstrbq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrb.8" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64x2_t addr, const int offset, int64x2_t value, mve_pred16_t p) +++foo (uint64x2_t addr, int64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_base_p_s64 (addr, 8, value, p); +++ return vstrdq_scatter_base_p_s64 (addr, 0, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrdt.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64x2_t addr, const int offset, int64x2_t value, mve_pred16_t p) +++foo1 (uint64x2_t addr, int64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_base_p (addr, 8, value, p); +++ return vstrdq_scatter_base_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrdt.u64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64x2_t addr, const int offset, uint64x2_t value, mve_pred16_t p) +++foo (uint64x2_t addr, uint64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_base_p_u64 (addr, 8, value, p); +++ return vstrdq_scatter_base_p_u64 (addr, 0, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrdt.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64x2_t addr, const int offset, uint64x2_t value, mve_pred16_t p) +++foo1 (uint64x2_t addr, uint64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_base_p (addr, 8, value, p); +++ return vstrdq_scatter_base_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrdt.u64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64x2_t addr, const int offset, int64x2_t value) +++foo (uint64x2_t addr, int64x2_t value) ++ { ++- vstrdq_scatter_base_s64 (addr, 1016, value); +++ return vstrdq_scatter_base_s64 (addr, 0, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrd.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64x2_t addr, const int offset, int64x2_t value) +++foo1 (uint64x2_t addr, int64x2_t value) ++ { ++- vstrdq_scatter_base (addr, 1016, value); +++ return vstrdq_scatter_base (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrd.u64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64x2_t addr, const int offset, uint64x2_t value) +++foo (uint64x2_t addr, uint64x2_t value) ++ { ++- vstrdq_scatter_base_u64 (addr, 8, value); +++ return vstrdq_scatter_base_u64 (addr, 0, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrd.u64" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64x2_t addr, const int offset, uint64x2_t value) +++foo1 (uint64x2_t addr, uint64x2_t value) ++ { ++- vstrdq_scatter_base (addr, 8, value); +++ return vstrdq_scatter_base (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrd.u64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c ++@@ -1,19 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p) +++foo (uint64x2_t *addr, int64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_base_wb_p_s64 (addr, 8, value, p); +++ return vstrdq_scatter_base_wb_p_s64 (addr, 0, value, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p) +++foo1 (uint64x2_t *addr, int64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_base_wb_p (addr, 8, value, p); +++ return vstrdq_scatter_base_wb_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c ++@@ -1,19 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p) +++foo (uint64x2_t *addr, uint64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_base_wb_p_u64 (addr, 8, value, p); +++ return vstrdq_scatter_base_wb_p_u64 (addr, 0, value, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p) +++foo1 (uint64x2_t *addr, uint64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_base_wb_p (addr, 8, value, p); +++ return vstrdq_scatter_base_wb_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c ++@@ -1,19 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64x2_t * addr, const int offset, int64x2_t value) +++foo (uint64x2_t *addr, int64x2_t value) ++ { ++- vstrdq_scatter_base_wb_s64 (addr, 8, value); +++ return vstrdq_scatter_base_wb_s64 (addr, 0, value); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64x2_t * addr, const int offset, int64x2_t value) +++foo1 (uint64x2_t *addr, int64x2_t value) ++ { ++- vstrdq_scatter_base_wb (addr, 8, value); +++ return vstrdq_scatter_base_wb (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c ++@@ -1,19 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64x2_t * addr, const int offset, uint64x2_t value) +++foo (uint64x2_t *addr, uint64x2_t value) ++ { ++- vstrdq_scatter_base_wb_u64 (addr, 8, value); +++ return vstrdq_scatter_base_wb_u64 (addr, 0, value); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64x2_t * addr, const int offset, uint64x2_t value) +++foo1 (uint64x2_t *addr, uint64x2_t value) ++ { ++- vstrdq_scatter_base_wb (addr, 8, value); +++ return vstrdq_scatter_base_wb (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) +++foo (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_offset_p_s64 (base, offset, value, p); +++ return vstrdq_scatter_offset_p_s64 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrdt.64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) +++foo1 (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_offset_p (base, offset, value, p); +++ return vstrdq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrdt.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) +++foo (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_offset_p_u64 (base, offset, value, p); +++ return vstrdq_scatter_offset_p_u64 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrdt.64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) +++foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_offset_p (base, offset, value, p); +++ return vstrdq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrdt.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int64_t * base, uint64x2_t offset, int64x2_t value) +++foo (int64_t *base, uint64x2_t offset, int64x2_t value) ++ { ++- vstrdq_scatter_offset_s64 (base, offset, value); +++ return vstrdq_scatter_offset_s64 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrd.64" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int64_t * base, uint64x2_t offset, int64x2_t value) +++foo1 (int64_t *base, uint64x2_t offset, int64x2_t value) ++ { ++- vstrdq_scatter_offset (base, offset, value); +++ return vstrdq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrd.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64_t * base, uint64x2_t offset, uint64x2_t value) +++foo (uint64_t *base, uint64x2_t offset, uint64x2_t value) ++ { ++- vstrdq_scatter_offset_u64 (base, offset, value); +++ return vstrdq_scatter_offset_u64 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrd.64" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value) +++foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value) ++ { ++- vstrdq_scatter_offset (base, offset, value); +++ return vstrdq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrd.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) +++foo (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_shifted_offset_p_s64 (base, offset, value, p); +++ return vstrdq_scatter_shifted_offset_p_s64 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrdt.64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) +++foo1 (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrdq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrdt.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) +++foo (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_shifted_offset_p_u64 (base, offset, value, p); +++ return vstrdq_scatter_shifted_offset_p_u64 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrdt.64" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) +++foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) ++ { ++- vstrdq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrdq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrdt.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int64_t * base, uint64x2_t offset, int64x2_t value) +++foo (int64_t *base, uint64x2_t offset, int64x2_t value) ++ { ++- vstrdq_scatter_shifted_offset_s64 (base, offset, value); +++ return vstrdq_scatter_shifted_offset_s64 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrd.64" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int64_t * base, uint64x2_t offset, int64x2_t value) +++foo1 (int64_t *base, uint64x2_t offset, int64x2_t value) ++ { ++- vstrdq_scatter_shifted_offset (base, offset, value); +++ return vstrdq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrd.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint64_t * base, uint64x2_t offset, uint64x2_t value) +++foo (uint64_t *base, uint64x2_t offset, uint64x2_t value) ++ { ++- vstrdq_scatter_shifted_offset_u64 (base, offset, value); +++ return vstrdq_scatter_shifted_offset_u64 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrd.64" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value) +++foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value) ++ { ++- vstrdq_scatter_shifted_offset (base, offset, value); +++ return vstrdq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrd.64" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float16_t * addr, float16x8_t value) +++foo (float16_t *base, float16x8_t value) ++ { ++- vstrhq_f16 (addr, value); +++ return vstrhq_f16 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float16_t * addr, float16x8_t value) +++foo1 (float16_t *base, float16x8_t value) ++ { ++- vstrhq (addr, value); +++ return vstrhq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float16_t * addr, float16x8_t value, mve_pred16_t p) +++foo (float16_t *base, float16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_p_f16 (addr, value, p); +++ return vstrhq_p_f16 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float16_t * addr, float16x8_t value, mve_pred16_t p) +++foo1 (float16_t *base, float16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_p (addr, value, p); +++ return vstrhq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * addr, int16x8_t value, mve_pred16_t p) +++foo (int16_t *base, int16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_p_s16 (addr, value, p); +++ return vstrhq_p_s16 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * addr, int16x8_t value, mve_pred16_t p) +++foo1 (int16_t *base, int16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_p (addr, value, p); +++ return vstrhq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * addr, int32x4_t value, mve_pred16_t p) +++foo (int16_t *base, int32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_p_s32 (addr, value, p); +++ return vstrhq_p_s32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * addr, int32x4_t value, mve_pred16_t p) +++foo1 (int16_t *base, int32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_p (addr, value, p); +++ return vstrhq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * addr, uint16x8_t value, mve_pred16_t p) +++foo (uint16_t *base, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_p_u16 (addr, value, p); +++ return vstrhq_p_u16 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * addr, uint16x8_t value, mve_pred16_t p) +++foo1 (uint16_t *base, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_p (addr, value, p); +++ return vstrhq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * addr, uint32x4_t value, mve_pred16_t p) +++foo (uint16_t *base, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_p_u32 (addr, value, p); +++ return vstrhq_p_u32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * addr, uint32x4_t value, mve_pred16_t p) +++foo1 (uint16_t *base, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_p (addr, value, p); +++ return vstrhq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * addr, int16x8_t value) +++foo (int16_t *base, int16x8_t value) ++ { ++- vstrhq_s16 (addr, value); +++ return vstrhq_s16 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * addr, int16x8_t value) +++foo1 (int16_t *base, int16x8_t value) ++ { ++- vstrhq (addr, value); +++ return vstrhq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * addr, int32x4_t value) +++foo (int16_t *base, int32x4_t value) ++ { ++- vstrhq_s32 (addr, value); +++ return vstrhq_s32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * addr, int32x4_t value) +++foo1 (int16_t *base, int32x4_t value) ++ { ++- vstrhq (addr, value); +++ return vstrhq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float16_t * base, uint16x8_t offset, float16x8_t value) +++foo (float16_t *base, uint16x8_t offset, float16x8_t value) ++ { ++- vstrhq_scatter_offset_f16 (base, offset, value); +++ return vstrhq_scatter_offset_f16 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float16_t * base, uint16x8_t offset, float16x8_t value) +++foo1 (float16_t *base, uint16x8_t offset, float16x8_t value) ++ { ++- vstrhq_scatter_offset (base, offset, value); +++ return vstrhq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p) +++foo (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p_f16 (base, offset, value, p); +++ return vstrhq_scatter_offset_p_f16 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p) +++foo1 (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p (base, offset, value, p); +++ return vstrhq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) +++foo (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p_s16 (base, offset, value, p); +++ return vstrhq_scatter_offset_p_s16 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) +++foo1 (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p (base, offset, value, p); +++ return vstrhq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p_s32 (base, offset, value, p); +++ return vstrhq_scatter_offset_p_s32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo1 (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p (base, offset, value, p); +++ return vstrhq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) +++foo (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p_u16 (base, offset, value, p); +++ return vstrhq_scatter_offset_p_u16 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) +++foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p (base, offset, value, p); +++ return vstrhq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p_u32 (base, offset, value, p); +++ return vstrhq_scatter_offset_p_u32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_offset_p (base, offset, value, p); +++ return vstrhq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * base, uint16x8_t offset, int16x8_t value) +++foo (int16_t *base, uint16x8_t offset, int16x8_t value) ++ { ++- vstrhq_scatter_offset_s16 (base, offset, value); +++ return vstrhq_scatter_offset_s16 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * base, uint16x8_t offset, int16x8_t value) +++foo1 (int16_t *base, uint16x8_t offset, int16x8_t value) ++ { ++- vstrhq_scatter_offset (base, offset, value); +++ return vstrhq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * base, uint32x4_t offset, int32x4_t value) +++foo (int16_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrhq_scatter_offset_s32 (base, offset, value); +++ return vstrhq_scatter_offset_s32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * base, uint32x4_t offset, int32x4_t value) +++foo1 (int16_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrhq_scatter_offset (base, offset, value); +++ return vstrhq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * base, uint16x8_t offset, uint16x8_t value) +++foo (uint16_t *base, uint16x8_t offset, uint16x8_t value) ++ { ++- vstrhq_scatter_offset_u16 (base, offset, value); +++ return vstrhq_scatter_offset_u16 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value) +++foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value) ++ { ++- vstrhq_scatter_offset (base, offset, value); +++ return vstrhq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * base, uint32x4_t offset, uint32x4_t value) +++foo (uint16_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrhq_scatter_offset_u32 (base, offset, value); +++ return vstrhq_scatter_offset_u32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value) +++foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrhq_scatter_offset (base, offset, value); +++ return vstrhq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float16_t * base, uint16x8_t offset, float16x8_t value) +++foo (float16_t *base, uint16x8_t offset, float16x8_t value) ++ { ++- vstrhq_scatter_shifted_offset_f16 (base, offset, value); +++ return vstrhq_scatter_shifted_offset_f16 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float16_t * base, uint16x8_t offset, float16x8_t value) +++foo1 (float16_t *base, uint16x8_t offset, float16x8_t value) ++ { ++- vstrhq_scatter_shifted_offset (base, offset, value); +++ return vstrhq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p) +++foo (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p_f16 (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p_f16 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p) +++foo1 (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) +++foo (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p_s16 (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p_s16 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) +++foo1 (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p_s32 (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p_s32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo1 (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) +++foo (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p_u16 (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p_u16 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) +++foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p_u32 (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p_u32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrhq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrht.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * base, uint16x8_t offset, int16x8_t value) +++foo (int16_t *base, uint16x8_t offset, int16x8_t value) ++ { ++- vstrhq_scatter_shifted_offset_s16 (base, offset, value); +++ return vstrhq_scatter_shifted_offset_s16 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * base, uint16x8_t offset, int16x8_t value) +++foo1 (int16_t *base, uint16x8_t offset, int16x8_t value) ++ { ++- vstrhq_scatter_shifted_offset (base, offset, value); +++ return vstrhq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int16_t * base, uint32x4_t offset, int32x4_t value) +++foo (int16_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrhq_scatter_shifted_offset_s32 (base, offset, value); +++ return vstrhq_scatter_shifted_offset_s32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int16_t * base, uint32x4_t offset, int32x4_t value) +++foo1 (int16_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrhq_scatter_shifted_offset (base, offset, value); +++ return vstrhq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * base, uint16x8_t offset, uint16x8_t value) +++foo (uint16_t *base, uint16x8_t offset, uint16x8_t value) ++ { ++- vstrhq_scatter_shifted_offset_u16 (base, offset, value); +++ return vstrhq_scatter_shifted_offset_u16 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value) +++foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value) ++ { ++- vstrhq_scatter_shifted_offset (base, offset, value); +++ return vstrhq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * base, uint32x4_t offset, uint32x4_t value) +++foo (uint16_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrhq_scatter_shifted_offset_u32 (base, offset, value); +++ return vstrhq_scatter_shifted_offset_u32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value) +++foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrhq_scatter_shifted_offset (base, offset, value); +++ return vstrhq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * addr, uint16x8_t value) +++foo (uint16_t *base, uint16x8_t value) ++ { ++- vstrhq_u16 (addr, value); +++ return vstrhq_u16 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * addr, uint16x8_t value) +++foo1 (uint16_t *base, uint16x8_t value) ++ { ++- vstrhq (addr, value); +++ return vstrhq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.16" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint16_t * addr, uint32x4_t value) +++foo (uint16_t *base, uint32x4_t value) ++ { ++- vstrhq_u32 (addr, value); +++ return vstrhq_u32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint16_t * addr, uint32x4_t value) +++foo1 (uint16_t *base, uint32x4_t value) ++ { ++- vstrhq (addr, value); +++ return vstrhq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrh.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float32_t * addr, float32x4_t value) +++foo (float32_t *base, float32x4_t value) ++ { ++- vstrwq_f32 (addr, value); +++ return vstrwq_f32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float32_t * addr, float32x4_t value) +++foo1 (float32_t *base, float32x4_t value) ++ { ++- vstrwq (addr, value); +++ return vstrwq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float32_t * addr, float32x4_t value, mve_pred16_t p) +++foo (float32_t *base, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_p_f32 (addr, value, p); +++ return vstrwq_p_f32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float32_t * addr, float32x4_t value, mve_pred16_t p) +++foo1 (float32_t *base, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_p (addr, value, p); +++ return vstrwq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int32_t * addr, int32x4_t value, mve_pred16_t p) +++foo (int32_t *base, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_p_s32 (addr, value, p); +++ return vstrwq_p_s32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int32_t * addr, int32x4_t value, mve_pred16_t p) +++foo1 (int32_t *base, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_p (addr, value, p); +++ return vstrwq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32_t * addr, uint32x4_t value, mve_pred16_t p) +++foo (uint32_t *base, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_p_u32 (addr, value, p); +++ return vstrwq_p_u32 (base, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32_t * addr, uint32x4_t value, mve_pred16_t p) +++foo1 (uint32_t *base, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_p (addr, value, p); +++ return vstrwq_p (base, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int32_t * addr, int32x4_t value) +++foo (int32_t *base, int32x4_t value) ++ { ++- vstrwq_s32 (addr, value); +++ return vstrwq_s32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int32_t * addr, int32x4_t value) +++foo1 (int32_t *base, int32x4_t value) ++ { ++- vstrwq (addr, value); +++ return vstrwq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo (uint32x4_t addr, float32x4_t value) ++ { ++- vstrwq_scatter_base_f32 (addr, 8, value); +++ return vstrwq_scatter_base_f32 (addr, 0, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo1 (uint32x4_t addr, float32x4_t value) ++ { ++- vstrwq_scatter_base (addr, 8, value); +++ return vstrwq_scatter_base (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo (uint32x4_t addr, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_p_f32 (addr, 8, value, p); +++ return vstrwq_scatter_base_p_f32 (addr, 0, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo1 (uint32x4_t addr, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_p (addr, 8, value, p); +++ return vstrwq_scatter_base_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo (uint32x4_t addr, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_p_s32 (addr, 8, value, p); +++ return vstrwq_scatter_base_p_s32 (addr, 0, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo1 (uint32x4_t addr, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_p (addr, 8, value, p); +++ return vstrwq_scatter_base_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo (uint32x4_t addr, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_p_u32 (addr, 8, value, p); +++ return vstrwq_scatter_base_p_u32 (addr, 0, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo1 (uint32x4_t addr, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_p (addr, 8, value, p); +++ return vstrwq_scatter_base_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo (uint32x4_t addr, int32x4_t value) ++ { ++- vstrwq_scatter_base_s32 (addr, 8, value); +++ return vstrwq_scatter_base_s32 (addr, 0, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo1 (uint32x4_t addr, int32x4_t value) ++ { ++- vstrwq_scatter_base (addr, 8, value); +++ return vstrwq_scatter_base (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo (uint32x4_t addr, uint32x4_t value) ++ { ++- vstrwq_scatter_base_u32 (addr, 8, value); +++ return vstrwq_scatter_base_u32 (addr, 0, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.u32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++ foo1 (uint32x4_t addr, uint32x4_t value) ++ { ++- vstrwq_scatter_base (addr, 8, value); +++ return vstrwq_scatter_base (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.u32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c ++@@ -1,19 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32x4_t * addr, const int offset, float32x4_t value) +++foo (uint32x4_t *addr, float32x4_t value) ++ { ++- vstrwq_scatter_base_wb_f32 (addr, 8, value); +++ return vstrwq_scatter_base_wb_f32 (addr, 0, value); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32x4_t * addr, const int offset, float32x4_t value) +++foo1 (uint32x4_t *addr, float32x4_t value) ++ { ++- vstrwq_scatter_base_wb (addr, 8, value); +++ return vstrwq_scatter_base_wb (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c ++@@ -1,19 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p) +++foo (uint32x4_t *addr, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_wb_p_f32 (addr, 8, value, p); +++ return vstrwq_scatter_base_wb_p_f32 (addr, 0, value, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p) +++foo1 (uint32x4_t *addr, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_wb_p (addr, 8, value, p); +++ return vstrwq_scatter_base_wb_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c ++@@ -1,19 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p) +++foo (uint32x4_t *addr, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_wb_p_s32 (addr, 8, value, p); +++ return vstrwq_scatter_base_wb_p_s32 (addr, 0, value, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p) +++foo1 (uint32x4_t *addr, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_wb_p (addr, 8, value, p); +++ return vstrwq_scatter_base_wb_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c ++@@ -1,19 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p) +++foo (uint32x4_t *addr, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_wb_p_u32 (addr, 8, value, p); +++ return vstrwq_scatter_base_wb_p_u32 (addr, 0, value, p); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p) +++foo1 (uint32x4_t *addr, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_base_wb_p (addr, 8, value, p); +++ return vstrwq_scatter_base_wb_p (addr, 0, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c ++@@ -1,19 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32x4_t * addr, const int offset, int32x4_t value) +++foo (uint32x4_t *addr, int32x4_t value) ++ { ++- vstrwq_scatter_base_wb_s32 (addr, 8, value); +++ return vstrwq_scatter_base_wb_s32 (addr, 0, value); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32x4_t * addr, const int offset, int32x4_t value) +++foo1 (uint32x4_t *addr, int32x4_t value) ++ { ++- vstrwq_scatter_base_wb (addr, 8, value); +++ return vstrwq_scatter_base_wb (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c ++@@ -1,19 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32x4_t * addr, uint32x4_t value) +++foo (uint32x4_t *addr, uint32x4_t value) ++ { ++- vstrwq_scatter_base_wb_u32 (addr, 8, value); +++ return vstrwq_scatter_base_wb_u32 (addr, 0, value); ++ } ++ +++ +++/* +++**foo1: +++** ... +++** vstrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32x4_t * addr, uint32x4_t value) +++foo1 (uint32x4_t *addr, uint32x4_t value) ++ { ++- vstrwq_scatter_base_wb (addr, 8, value); +++ return vstrwq_scatter_base_wb (addr, 0, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float32_t * base, uint32x4_t offset, float32x4_t value) +++foo (float32_t *base, uint32x4_t offset, float32x4_t value) ++ { ++- vstrwq_scatter_offset_f32 (base, offset, value); +++ return vstrwq_scatter_offset_f32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float32_t * base, uint32x4_t offset, float32x4_t value) +++foo1 (float32_t *base, uint32x4_t offset, float32x4_t value) ++ { ++- vstrwq_scatter_offset (base, offset, value); +++ return vstrwq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_f32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p) +++foo (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_offset_p_f32 (base, offset, value, p); +++ return vstrwq_scatter_offset_p_f32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p) +++foo1 (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_offset_p (base, offset, value, p); +++ return vstrwq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_offset_p_s32 (base, offset, value, p); +++ return vstrwq_scatter_offset_p_s32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo1 (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_offset_p (base, offset, value, p); +++ return vstrwq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_offset_p_u32 (base, offset, value, p); +++ return vstrwq_scatter_offset_p_u32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_offset_p (base, offset, value, p); +++ return vstrwq_scatter_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int32_t * base, uint32x4_t offset, int32x4_t value) +++foo (int32_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrwq_scatter_offset_s32 (base, offset, value); +++ return vstrwq_scatter_offset_s32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int32_t * base, uint32x4_t offset, int32x4_t value) +++foo1 (int32_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrwq_scatter_offset (base, offset, value); +++ return vstrwq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32_t * base, uint32x4_t offset, uint32x4_t value) +++foo (uint32_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrwq_scatter_offset_u32 (base, offset, value); +++ return vstrwq_scatter_offset_u32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value) +++foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrwq_scatter_offset (base, offset, value); +++ return vstrwq_scatter_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float32_t * base, uint32x4_t offset, float32x4_t value) +++foo (float32_t *base, uint32x4_t offset, float32x4_t value) ++ { ++- vstrwq_scatter_shifted_offset_f32 (base, offset, value); +++ return vstrwq_scatter_shifted_offset_f32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float32_t * base, uint32x4_t offset, float32x4_t value) +++foo1 (float32_t *base, uint32x4_t offset, float32x4_t value) ++ { ++- vstrwq_scatter_shifted_offset (base, offset, value); +++ return vstrwq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_f32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p) +++foo (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_shifted_offset_p_f32 (base, offset, value, p); +++ return vstrwq_scatter_shifted_offset_p_f32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (float32_t * base, uint32x4_t offset, float32x4_t value, mve_pred16_t p) +++foo1 (float32_t *base, uint32x4_t offset, float32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrwq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_s32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_shifted_offset_p_s32 (base, offset, value, p); +++ return vstrwq_scatter_shifted_offset_p_s32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int32_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) +++foo1 (int32_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrwq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_p_u32.c ++@@ -1,21 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_shifted_offset_p_u32 (base, offset, value, p); +++ return vstrwq_scatter_shifted_offset_p_u32 (base, offset, value, p); ++ } ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) +++foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p) ++ { ++- vstrwq_scatter_shifted_offset_p (base, offset, value, p); +++ return vstrwq_scatter_shifted_offset_p (base, offset, value, p); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrwt.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo (int32_t * base, uint32x4_t offset, int32x4_t value) +++foo (int32_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrwq_scatter_shifted_offset_s32 (base, offset, value); +++ return vstrwq_scatter_shifted_offset_s32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (int32_t * base, uint32x4_t offset, int32x4_t value) +++foo1 (int32_t *base, uint32x4_t offset, int32x4_t value) ++ { ++- vstrwq_scatter_shifted_offset (base, offset, value); +++ return vstrwq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shifted_offset_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32_t * base, uint32x4_t offset, uint32x4_t value) +++foo (uint32_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrwq_scatter_shifted_offset_u32 (base, offset, value); +++ return vstrwq_scatter_shifted_offset_u32 (base, offset, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32_t * base, uint32x4_t offset, uint32x4_t value) +++foo1 (uint32_t *base, uint32x4_t offset, uint32x4_t value) ++ { ++- vstrwq_scatter_shifted_offset (base, offset, value); +++ return vstrwq_scatter_shifted_offset (base, offset, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo (uint32_t * addr, uint32x4_t value) +++foo (uint32_t *base, uint32x4_t value) ++ { ++- vstrwq_u32 (addr, value); +++ return vstrwq_u32 (base, value); ++ } ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ ++ +++/* +++**foo1: +++** ... +++** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +++** ... +++*/ ++ void ++-foo1 (uint32_t * addr, uint32x4_t value) +++foo1 (uint32_t *base, uint32x4_t value) ++ { ++- vstrwq (addr, value); +++ return vstrwq (base, value); +++} +++ +++#ifdef __cplusplus ++ } +++#endif ++ ++-/* { dg-final { scan-assembler "vstrw.32" } } */ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b) ++ { ++ return vsubq_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16x8_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b) ++ { ++ return vsubq_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32x4_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vsubq_m_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vsubq_m_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vsubq_m (inactive, a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vsubq_m_n_f16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) +++{ +++ return vsubq_m (inactive, a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vsubq_m (inactive, a, 23.23, p); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vsubq_m_n_f32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) +++{ +++ return vsubq_m (inactive, a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vsubq_m_n_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vsubq_m_n_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c ++@@ -1,23 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vsubq_m_n_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vsubq_m_n_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) +++{ +++ return vsubq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vsubq_m_n_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) +++{ +++ return vsubq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c ++@@ -1,23 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vsubq_m_n_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) +++{ +++ return vsubq_m (inactive, a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vsubq_m_s16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vsubq_m_s32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vsubq_m_s8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vsubq_m_u16 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vsubq_m_u32 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c ++@@ -1,22 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vsubq_m_u8 (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++ return vsubq_m (inactive, a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo1 (float16x8_t a, float16_t b) ++-{ ++- return vsubq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16_t b) ++ { ++ return vsubq_n_f16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo1 (float16x8_t a, float16_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.f16" } } */ +++/* +++**foo2: +++** ... +++** vsub.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t a) +++{ +++ return vsubq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c +++++ /dev/null ++@@ -1,12 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo1 (float32x4_t a, float32_t b) ++-{ ++- return vsubq (a, 23.23); ++-} ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c ++@@ -1,21 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32_t b) ++ { ++ return vsubq_n_f32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo1 (float32x4_t a, float32_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.f32" } } */ +++/* +++**foo2: +++** ... +++** vsub.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t a) +++{ +++ return vsubq (a, 1.1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ ++-/* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b) ++ { ++ return vsubq_n_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ ++-/* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b) ++ { ++ return vsubq_n_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c ++@@ -1,22 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ ++-/* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b) ++ { ++ return vsubq_n_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ ++-/* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b) ++ { ++ return vsubq_n_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i16" } } */ +++/* +++**foo2: +++** ... +++** vsub.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a) +++{ +++ return vsubq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ ++-/* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b) ++ { ++ return vsubq_n_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i32" } } */ +++/* +++**foo2: +++** ... +++** vsub.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a) +++{ +++ return vsubq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c ++@@ -1,22 +1,53 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ ++-/* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b) ++ { ++ return vsubq_n_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i8" } } */ +++/* +++**foo2: +++** ... +++** vsub.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a) +++{ +++ return vsubq (a, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b) ++ { ++ return vsubq_s16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo1 (int16x8_t a, int16x8_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b) ++ { ++ return vsubq_s32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo1 (int32x4_t a, int32x4_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b) ++ { ++ return vsubq_s8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo1 (int8x16_t a, int8x16_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b) ++ { ++ return vsubq_u16 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo1 (uint16x8_t a, uint16x8_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i16" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b) ++ { ++ return vsubq_u32 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo1 (uint32x4_t a, uint32x4_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i32" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c ++@@ -1,21 +1,41 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vsub.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b) ++ { ++ return vsubq_u8 (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vsub.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo1 (uint8x16_t a, uint8x16_t b) ++ { ++ return vsubq (a, b); ++ } ++ ++-/* { dg-final { scan-assembler "vsub.i8" } } */ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16x8_t b, mve_pred16_t p) ++ { ++- return vsubq_x_f16 (a, b, p); +++ return vsubq_x_f16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32x4_t b, mve_pred16_t p) ++ { ++- return vsubq_x_f32 (a, b, p); +++ return vsubq_x_f32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float16x8_t ++-foo (float16x8_t a, float16_t b, mve_pred16_t p) ++-{ ++- return vsubq_x_n_f16 (a, 23.23, p); ++-} ++- ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c ++@@ -1,15 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float16x8_t ++ foo (float16x8_t a, float16_t b, mve_pred16_t p) ++ { ++- return vsubq_x_n_f16 (a, b, p); +++ return vsubq_x_n_f16 (a, b, p); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo1 (float16x8_t a, float16_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float16x8_t +++foo2 (float16x8_t a, mve_pred16_t p) +++{ +++ return vsubq_x (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++deleted file mode 100644 ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c +++++ /dev/null ++@@ -1,13 +0,0 @@ ++-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++-/* { dg-add-options arm_v8_1m_mve_fp } */ ++-/* { dg-additional-options "-O2" } */ ++- ++-#include "arm_mve.h" ++-float32x4_t ++-foo (float32x4_t a, float32_t b, mve_pred16_t p) ++-{ ++- return vsubq_x_n_f32 (a, 23.23, p); ++-} ++- ++- ++-/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c ++@@ -1,15 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ ++ /* { dg-add-options arm_v8_1m_mve_fp } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ float32x4_t ++ foo (float32x4_t a, float32_t b, mve_pred16_t p) ++ { ++- return vsubq_x_n_f32 (a, b, p); +++ return vsubq_x_n_f32 (a, b, p); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo1 (float32x4_t a, float32_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.f32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++float32x4_t +++foo2 (float32x4_t a, mve_pred16_t p) +++{ +++ return vsubq_x (a, 1.1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16_t b, mve_pred16_t p) ++ { ++- return vsubq_x_n_s16 (a, b, p); +++ return vsubq_x_n_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++int16x8_t +++foo1 (int16x8_t a, int16_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32_t b, mve_pred16_t p) ++ { ++- return vsubq_x_n_s32 (a, b, p); +++ return vsubq_x_n_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++int32x4_t +++foo1 (int32x4_t a, int32_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8_t b, mve_pred16_t p) ++ { ++- return vsubq_x_n_s8 (a, b, p); +++ return vsubq_x_n_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++int8x16_t +++foo1 (int8x16_t a, int8_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c ++@@ -1,15 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16_t b, mve_pred16_t p) ++ { ++- return vsubq_x_n_u16 (a, b, p); +++ return vsubq_x_n_u16 (a, b, p); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo2 (uint16x8_t a, mve_pred16_t p) +++{ +++ return vsubq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c ++@@ -1,15 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32_t b, mve_pred16_t p) ++ { ++- return vsubq_x_n_u32 (a, b, p); +++ return vsubq_x_n_u32 (a, b, p); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo2 (uint32x4_t a, mve_pred16_t p) +++{ +++ return vsubq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c ++@@ -1,15 +1,65 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8_t b, mve_pred16_t p) ++ { ++- return vsubq_x_n_u8 (a, b, p); +++ return vsubq_x_n_u8 (a, b, p); +++} +++ +++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ +++/* +++**foo2: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo2 (uint8x16_t a, mve_pred16_t p) +++{ +++ return vsubq_x (a, 1, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif ++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int16x8_t ++ foo (int16x8_t a, int16x8_t b, mve_pred16_t p) ++ { ++- return vsubq_x_s16 (a, b, p); +++ return vsubq_x_s16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++int16x8_t +++foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int32x4_t ++ foo (int32x4_t a, int32x4_t b, mve_pred16_t p) ++ { ++- return vsubq_x_s32 (a, b, p); +++ return vsubq_x_s32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++int32x4_t +++foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ int8x16_t ++ foo (int8x16_t a, int8x16_t b, mve_pred16_t p) ++ { ++- return vsubq_x_s8 (a, b, p); +++ return vsubq_x_s8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++int8x16_t +++foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint16x8_t ++ foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) ++ { ++- return vsubq_x_u16 (a, b, p); +++ return vsubq_x_u16 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i16" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint16x8_t +++foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint32x4_t ++ foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) ++ { ++- return vsubq_x_u32 (a, b, p); +++ return vsubq_x_u32 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i32" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint32x4_t +++foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++--- a/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c ++@@ -1,15 +1,49 @@ ++ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ ++ /* { dg-add-options arm_v8_1m_mve } */ ++ /* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ ++ ++ #include "arm_mve.h" ++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ ++ uint8x16_t ++ foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) ++ { ++- return vsubq_x_u8 (a, b, p); +++ return vsubq_x_u8 (a, b, p); ++ } ++ ++-/* { dg-final { scan-assembler "vpst" } } */ ++-/* { dg-final { scan-assembler "vsubt.i8" } } */ ++ +++/* +++**foo1: +++** ... +++** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +++** ... +++** vpst(?: @.*|) +++** ... +++** vsubt.i8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +++** ... +++*/ +++uint8x16_t +++foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) +++{ +++ return vsubq_x (a, b, p); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++\ No newline at end of file ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/mve_const_shifts.c ++@@ -0,0 +1,41 @@ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-additional-options "-O2" } */ +++/* { dg-final { check-function-bodies "**" "" } } */ +++ +++#include "arm_mve.h" +++ +++#ifdef __cplusplus +++extern "C" { +++#endif +++ +++/* +++**foo11: +++** ... +++** movs r0, #2 +++** ... +++*/ +++uint32_t +++foo11 () +++{ +++ return uqshl (1, 1); +++} +++ +++/* +++**foo12: +++** ... +++** movs r0, #2 +++** movs r1, #0 +++** ... +++*/ +++uint64_t +++foo12 () +++{ +++ return uqshll (1, 1); +++} +++ +++#ifdef __cplusplus +++} +++#endif +++ +++/* { dg-final { scan-assembler-not "__ARM_undef" } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/mve_load_memory_modes.c ++@@ -7,7 +7,7 @@ ++ /* ++ **off_load8_0: ++ ** ... ++-** vldrb.8 q0, \[r0, #16\] +++** vldrb.8 q[0-7], \[r0, #16\] ++ ** ... ++ */ ++ int8x16_t off_load8_0 (int8_t * a) ++@@ -18,7 +18,7 @@ int8x16_t off_load8_0 (int8_t * a) ++ /* ++ **off_load8_1: ++ ** ... ++-** vldrb.u16 q0, \[r0, #1\] +++** vldrb.u16 q[0-7], \[r0, #1\] ++ ** ... ++ */ ++ uint16x8_t off_load8_1 (uint8_t * a) ++@@ -29,7 +29,7 @@ uint16x8_t off_load8_1 (uint8_t * a) ++ /* ++ **off_load8_2: ++ ** ... ++-** vldrb.s32 q0, \[r0, #127\] +++** vldrb.s32 q[0-7], \[r0, #127\] ++ ** ... ++ */ ++ int32x4_t off_load8_2 (int8_t * a) ++@@ -40,7 +40,7 @@ int32x4_t off_load8_2 (int8_t * a) ++ /* ++ **off_load8_3: ++ ** ... ++-** vldrb.8 q0, \[r0, #-127\] +++** vldrb.8 q[0-7], \[r0, #-127\] ++ ** ... ++ */ ++ uint8x16_t off_load8_3 (uint8_t * a) ++@@ -51,7 +51,7 @@ uint8x16_t off_load8_3 (uint8_t * a) ++ /* ++ **not_off_load8_0: ++ ** ... ++-** vldrb.8 q0, \[r[0-9]+\] +++** vldrb.8 q[0-7], \[r[0-7]+\] ++ ** ... ++ */ ++ int8x16_t not_off_load8_0 (int8_t * a) ++@@ -62,7 +62,7 @@ int8x16_t not_off_load8_0 (int8_t * a) ++ /* ++ **off_loadfp16_0: ++ ** ... ++-** vldrh.16 q0, \[r0, #-244\] +++** vldrh.16 q[0-7], \[r0, #-244\] ++ ** ... ++ */ ++ float16x8_t off_loadfp16_0 (float16_t *a) ++@@ -73,7 +73,7 @@ float16x8_t off_loadfp16_0 (float16_t *a) ++ /* ++ **off_load16_0: ++ ** ... ++-** vldrh.16 q0, \[r0, #-2\] +++** vldrh.16 q[0-7], \[r0, #-2\] ++ ** ... ++ */ ++ uint16x8_t off_load16_0 (uint16_t * a) ++@@ -84,7 +84,7 @@ uint16x8_t off_load16_0 (uint16_t * a) ++ /* ++ **off_load16_1: ++ ** ... ++-** vldrh.u32 q0, \[r0, #254\] +++** vldrh.u32 q[0-7], \[r0, #254\] ++ ** ... ++ */ ++ uint32x4_t off_load16_1 (uint16_t * a) ++@@ -95,7 +95,7 @@ uint32x4_t off_load16_1 (uint16_t * a) ++ /* ++ **not_off_load16_0: ++ ** ... ++-** vldrh.16 q0, \[r[0-9]+\] +++** vldrh.16 q[0-7], \[r[0-7]+\] ++ ** ... ++ */ ++ int16x8_t not_off_load16_0 (int8_t * a) ++@@ -106,7 +106,7 @@ int16x8_t not_off_load16_0 (int8_t * a) ++ /* ++ **not_off_load16_1: ++ ** ... ++-** vldrh.u32 q0, \[r[0-9]+\] +++** vldrh.u32 q[0-7], \[r[0-7]+\] ++ ** ... ++ */ ++ uint32x4_t not_off_load16_1 (uint16_t * a) ++@@ -117,7 +117,7 @@ uint32x4_t not_off_load16_1 (uint16_t * a) ++ /* ++ **off_loadfp32_0: ++ ** ... ++-** vldrw.32 q0, \[r0, #24\] +++** vldrw.32 q[0-7], \[r0, #24\] ++ ** ... ++ */ ++ float32x4_t off_loadfp32_0 (float32_t *a) ++@@ -128,7 +128,7 @@ float32x4_t off_loadfp32_0 (float32_t *a) ++ /* ++ **off_load32_0: ++ ** ... ++-** vldrw.32 q0, \[r0, #4\] +++** vldrw.32 q[0-7], \[r0, #4\] ++ ** ... ++ */ ++ uint32x4_t off_load32_0 (uint32_t * a) ++@@ -139,7 +139,7 @@ uint32x4_t off_load32_0 (uint32_t * a) ++ /* ++ **off_load32_1: ++ ** ... ++-** vldrw.32 q0, \[r0, #-508\] +++** vldrw.32 q[0-7], \[r0, #-508\] ++ ** ... ++ */ ++ int32x4_t off_load32_1 (int32_t * a) ++@@ -149,7 +149,7 @@ int32x4_t off_load32_1 (int32_t * a) ++ /* ++ **pre_load8_0: ++ ** ... ++-** vldrb.8 q[0-9]+, \[r0, #16\]! +++** vldrb.8 q[0-7], \[r0, #16\]! ++ ** ... ++ */ ++ int8_t* pre_load8_0 (int8_t * a, int8x16_t *v) ++@@ -162,7 +162,7 @@ int8_t* pre_load8_0 (int8_t * a, int8x16_t *v) ++ /* ++ **pre_load8_1: ++ ** ... ++-** vldrb.u16 q[0-9]+, \[r0, #4\]! +++** vldrb.u16 q[0-7], \[r0, #4\]! ++ ** ... ++ */ ++ uint8_t* pre_load8_1 (uint8_t * a, uint16x8_t *v) ++@@ -175,7 +175,7 @@ uint8_t* pre_load8_1 (uint8_t * a, uint16x8_t *v) ++ /* ++ **pre_loadfp16_0: ++ ** ... ++-** vldrh.16 q[0-9]+, \[r0, #128\]! +++** vldrh.16 q[0-7], \[r0, #128\]! ++ ** ... ++ */ ++ float16_t* pre_loadfp16_0 (float16_t *a, float16x8_t *v) ++@@ -188,7 +188,7 @@ float16_t* pre_loadfp16_0 (float16_t *a, float16x8_t *v) ++ /* ++ **pre_load16_0: ++ ** ... ++-** vldrh.16 q[0-9]+, \[r0, #-254\]! +++** vldrh.16 q[0-7], \[r0, #-254\]! ++ ** ... ++ */ ++ int16_t* pre_load16_0 (int16_t * a, int16x8_t *v) ++@@ -201,7 +201,7 @@ int16_t* pre_load16_0 (int16_t * a, int16x8_t *v) ++ /* ++ **pre_load16_1: ++ ** ... ++-** vldrh.s32 q[0-9]+, \[r0, #52\]! +++** vldrh.s32 q[0-7], \[r0, #52\]! ++ ** ... ++ */ ++ int16_t* pre_load16_1 (int16_t * a, int32x4_t *v) ++@@ -214,7 +214,7 @@ int16_t* pre_load16_1 (int16_t * a, int32x4_t *v) ++ /* ++ **pre_loadfp32_0: ++ ** ... ++-** vldrw.32 q[0-9]+, \[r0, #-72\]! +++** vldrw.32 q[0-7], \[r0, #-72\]! ++ ** ... ++ */ ++ float32_t* pre_loadfp32_0 (float32_t *a, float32x4_t *v) ++@@ -228,7 +228,7 @@ float32_t* pre_loadfp32_0 (float32_t *a, float32x4_t *v) ++ /* ++ **pre_load32_0: ++ ** ... ++-** vldrw.32 q[0-9]+, \[r0, #-4\]! +++** vldrw.32 q[0-7], \[r0, #-4\]! ++ ** ... ++ */ ++ uint32_t* pre_load32_0 (uint32_t * a, uint32x4_t *v) ++@@ -242,7 +242,7 @@ uint32_t* pre_load32_0 (uint32_t * a, uint32x4_t *v) ++ /* ++ **post_load8_0: ++ ** ... ++-** vldrb.8 q[0-9]+, \[r0\], #26 +++** vldrb.8 q[0-7], \[r0\], #26 ++ ** ... ++ */ ++ uint8_t* post_load8_0 (uint8_t * a, uint8x16_t *v) ++@@ -255,7 +255,7 @@ uint8_t* post_load8_0 (uint8_t * a, uint8x16_t *v) ++ /* ++ **post_load8_1: ++ ** ... ++-** vldrb.s16 q[0-9]+, \[r0\], #-1 +++** vldrb.s16 q[0-7], \[r0\], #-1 ++ ** ... ++ */ ++ int8_t* post_load8_1 (int8_t * a, int16x8_t *v) ++@@ -268,7 +268,7 @@ int8_t* post_load8_1 (int8_t * a, int16x8_t *v) ++ /* ++ **post_load8_2: ++ ** ... ++-** vldrb.8 q[0-9]+, \[r0\], #26 +++** vldrb.8 q[0-7], \[r0\], #26 ++ ** ... ++ */ ++ uint8_t* post_load8_2 (uint8_t * a, uint8x16_t *v) ++@@ -281,7 +281,7 @@ uint8_t* post_load8_2 (uint8_t * a, uint8x16_t *v) ++ /* ++ **post_load8_3: ++ ** ... ++-** vldrb.s16 q[0-9]+, \[r0\], #-1 +++** vldrb.s16 q[0-7], \[r0\], #-1 ++ ** ... ++ */ ++ int8_t* post_load8_3 (int8_t * a, int16x8_t *v) ++@@ -294,7 +294,7 @@ int8_t* post_load8_3 (int8_t * a, int16x8_t *v) ++ /* ++ **post_loadfp16_0: ++ ** ... ++-** vldrh.16 q[0-9]+, \[r0\], #-24 +++** vldrh.16 q[0-7], \[r0\], #-24 ++ ** ... ++ */ ++ float16_t* post_loadfp16_0 (float16_t *a, float16x8_t *v) ++@@ -307,7 +307,7 @@ float16_t* post_loadfp16_0 (float16_t *a, float16x8_t *v) ++ /* ++ **post_load16_0: ++ ** ... ++-** vldrh.16 q[0-9]+, \[r0\], #-126 +++** vldrh.16 q[0-7], \[r0\], #-126 ++ ** ... ++ */ ++ uint16_t* post_load16_0 (uint16_t * a, uint16x8_t *v) ++@@ -320,7 +320,7 @@ uint16_t* post_load16_0 (uint16_t * a, uint16x8_t *v) ++ /* ++ **post_load16_1: ++ ** ... ++-** vldrh.u32 q[0-9]+, \[r0\], #16 +++** vldrh.u32 q[0-7], \[r0\], #16 ++ ** ... ++ */ ++ uint16_t* post_load16_1 (uint16_t * a, uint32x4_t *v) ++@@ -333,7 +333,7 @@ uint16_t* post_load16_1 (uint16_t * a, uint32x4_t *v) ++ /* ++ **post_loadfp32_0: ++ ** ... ++-** vldrw.32 q[0-9]+, \[r0\], #4 +++** vldrw.32 q[0-7], \[r0\], #4 ++ ** ... ++ */ ++ float32_t* post_loadfp32_0 (float32_t *a, float32x4_t *v) ++@@ -346,7 +346,7 @@ float32_t* post_loadfp32_0 (float32_t *a, float32x4_t *v) ++ /* ++ **post_load32_0: ++ ** ... ++-** vldrw.32 q[0-9]+, \[r0\], #-16 +++** vldrw.32 q[0-7], \[r0\], #-16 ++ ** ... ++ */ ++ int32_t* post_load32_0 (int32_t * a, int32x4_t *v) ++--- a/src/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c +++++ b/src/gcc/testsuite/gcc.target/arm/mve/mve_store_memory_modes.c ++@@ -7,7 +7,7 @@ ++ /* ++ **off_store8_0: ++ ** ... ++-** vstrb.8 q0, \[r0, #16\] +++** vstrb.8 q[0-7], \[r0, #16\] ++ ** ... ++ */ ++ uint8_t *off_store8_0 (uint8_t * a, uint8x16_t v) ++@@ -19,7 +19,7 @@ uint8_t *off_store8_0 (uint8_t * a, uint8x16_t v) ++ /* ++ **off_store8_1: ++ ** ... ++-** vstrb.16 q0, \[r0, #-1\] +++** vstrb.16 q[0-7], \[r0, #-1\] ++ ** ... ++ */ ++ int8_t *off_store8_1 (int8_t * a, int16x8_t v) ++@@ -31,7 +31,7 @@ int8_t *off_store8_1 (int8_t * a, int16x8_t v) ++ /* ++ **off_store8_2: ++ ** ... ++-** vstrb.32 q0, \[r0, #-127\] +++** vstrb.32 q[0-7], \[r0, #-127\] ++ ** ... ++ */ ++ uint8_t *off_store8_2 (uint8_t * a, uint32x4_t v) ++@@ -43,7 +43,7 @@ uint8_t *off_store8_2 (uint8_t * a, uint32x4_t v) ++ /* ++ **off_store8_3: ++ ** ... ++-** vstrb.8 q0, \[r0, #127\] +++** vstrb.8 q[0-7], \[r0, #127\] ++ ** ... ++ */ ++ int8_t *off_store8_3 (int8_t * a, int8x16_t v) ++@@ -55,7 +55,7 @@ int8_t *off_store8_3 (int8_t * a, int8x16_t v) ++ /* ++ **not_off_store8_0: ++ ** ... ++-** vstrb.8 q0, \[r[0-9]+\] +++** vstrb.8 q[0-7], \[r[0-7]+\] ++ ** ... ++ */ ++ uint8_t *not_off_store8_0 (uint8_t * a, uint8x16_t v) ++@@ -67,7 +67,7 @@ uint8_t *not_off_store8_0 (uint8_t * a, uint8x16_t v) ++ /* ++ **off_storefp16_0: ++ ** ... ++-** vstrh.16 q0, \[r0, #250\] +++** vstrh.16 q[0-7], \[r0, #250\] ++ ** ... ++ */ ++ float16_t *off_storefp16_0 (float16_t *a, float16x8_t v) ++@@ -79,7 +79,7 @@ float16_t *off_storefp16_0 (float16_t *a, float16x8_t v) ++ /* ++ **off_store16_0: ++ ** ... ++-** vstrh.16 q0, \[r0, #4\] +++** vstrh.16 q[0-7], \[r0, #4\] ++ ** ... ++ */ ++ int16_t *off_store16_0 (int16_t * a, int16x8_t v) ++@@ -91,7 +91,7 @@ int16_t *off_store16_0 (int16_t * a, int16x8_t v) ++ /* ++ **off_store16_1: ++ ** ... ++-** vstrh.32 q0, \[r0, #-254\] +++** vstrh.32 q[0-7], \[r0, #-254\] ++ ** ... ++ */ ++ int16_t *off_store16_1 (int16_t * a, int32x4_t v) ++@@ -103,7 +103,7 @@ int16_t *off_store16_1 (int16_t * a, int32x4_t v) ++ /* ++ **not_off_store16_0: ++ ** ... ++-** vstrh.16 q0, \[r[0-9]+\] +++** vstrh.16 q[0-7], \[r[0-7]+\] ++ ** ... ++ */ ++ uint8_t *not_off_store16_0 (uint8_t * a, uint16x8_t v) ++@@ -115,7 +115,7 @@ uint8_t *not_off_store16_0 (uint8_t * a, uint16x8_t v) ++ /* ++ **not_off_store16_1: ++ ** ... ++-** vstrh.32 q0, \[r[0-9]+\] +++** vstrh.32 q[0-7], \[r[0-7]+\] ++ ** ... ++ */ ++ int16_t *not_off_store16_1 (int16_t * a, int32x4_t v) ++@@ -127,7 +127,7 @@ int16_t *not_off_store16_1 (int16_t * a, int32x4_t v) ++ /* ++ **off_storefp32_0: ++ ** ... ++-** vstrw.32 q0, \[r0, #-412\] +++** vstrw.32 q[0-7], \[r0, #-412\] ++ ** ... ++ */ ++ float32_t *off_storefp32_0 (float32_t *a, float32x4_t v) ++@@ -139,7 +139,7 @@ float32_t *off_storefp32_0 (float32_t *a, float32x4_t v) ++ /* ++ **off_store32_0: ++ ** ... ++-** vstrw.32 q0, \[r0, #-4\] +++** vstrw.32 q[0-7], \[r0, #-4\] ++ ** ... ++ */ ++ int32_t *off_store32_0 (int32_t * a, int32x4_t v) ++@@ -151,7 +151,7 @@ int32_t *off_store32_0 (int32_t * a, int32x4_t v) ++ /* ++ **off_store32_1: ++ ** ... ++-** vstrw.32 q0, \[r0, #508\] +++** vstrw.32 q[0-7], \[r0, #508\] ++ ** ... ++ */ ++ uint32_t *off_store32_1 (uint32_t * a, uint32x4_t v) ++@@ -163,7 +163,7 @@ uint32_t *off_store32_1 (uint32_t * a, uint32x4_t v) ++ /* ++ **pre_store8_0: ++ ** ... ++-** vstrb.8 q[0-9]+, \[r0, #-16\]! +++** vstrb.8 q[0-7], \[r0, #-16\]! ++ ** ... ++ */ ++ uint8_t* pre_store8_0 (uint8_t * a, uint8x16_t v) ++@@ -176,7 +176,7 @@ uint8_t* pre_store8_0 (uint8_t * a, uint8x16_t v) ++ /* ++ **pre_store8_1: ++ ** ... ++-** vstrb.16 q[0-9]+, \[r0, #4\]! +++** vstrb.16 q[0-7], \[r0, #4\]! ++ ** ... ++ */ ++ int8_t* pre_store8_1 (int8_t * a, int16x8_t v) ++@@ -189,7 +189,7 @@ int8_t* pre_store8_1 (int8_t * a, int16x8_t v) ++ /* ++ **pre_storefp16_0: ++ ** ... ++-** vstrh.16 q0, \[r0, #8\]! +++** vstrh.16 q[0-7], \[r0, #8\]! ++ ** ... ++ */ ++ float16_t *pre_storefp16_0 (float16_t *a, float16x8_t v) ++@@ -202,7 +202,7 @@ float16_t *pre_storefp16_0 (float16_t *a, float16x8_t v) ++ /* ++ **pre_store16_0: ++ ** ... ++-** vstrh.16 q[0-9]+, \[r0, #254\]! +++** vstrh.16 q[0-7], \[r0, #254\]! ++ ** ... ++ */ ++ uint16_t* pre_store16_0 (uint16_t * a, uint16x8_t v) ++@@ -215,7 +215,7 @@ uint16_t* pre_store16_0 (uint16_t * a, uint16x8_t v) ++ /* ++ **pre_store16_1: ++ ** ... ++-** vstrh.32 q[0-9]+, \[r0, #-52\]! +++** vstrh.32 q[0-7], \[r0, #-52\]! ++ ** ... ++ */ ++ int16_t* pre_store16_1 (int16_t * a, int32x4_t v) ++@@ -228,7 +228,7 @@ int16_t* pre_store16_1 (int16_t * a, int32x4_t v) ++ /* ++ **pre_storefp32_0: ++ ** ... ++-** vstrw.32 q0, \[r0, #-4\]! +++** vstrw.32 q[0-7], \[r0, #-4\]! ++ ** ... ++ */ ++ float32_t *pre_storefp32_0 (float32_t *a, float32x4_t v) ++@@ -241,7 +241,7 @@ float32_t *pre_storefp32_0 (float32_t *a, float32x4_t v) ++ /* ++ **pre_store32_0: ++ ** ... ++-** vstrw.32 q[0-9]+, \[r0, #4\]! +++** vstrw.32 q[0-7], \[r0, #4\]! ++ ** ... ++ */ ++ int32_t* pre_store32_0 (int32_t * a, int32x4_t v) ++@@ -255,7 +255,7 @@ int32_t* pre_store32_0 (int32_t * a, int32x4_t v) ++ /* ++ **post_store8_0: ++ ** ... ++-** vstrb.8 q[0-9]+, \[r0\], #-26 +++** vstrb.8 q[0-7], \[r0\], #-26 ++ ** ... ++ */ ++ int8_t* post_store8_0 (int8_t * a, int8x16_t v) ++@@ -268,7 +268,7 @@ int8_t* post_store8_0 (int8_t * a, int8x16_t v) ++ /* ++ **post_store8_1: ++ ** ... ++-** vstrb.16 q[0-9]+, \[r0\], #1 +++** vstrb.16 q[0-7], \[r0\], #1 ++ ** ... ++ */ ++ uint8_t* post_store8_1 (uint8_t * a, uint16x8_t v) ++@@ -281,7 +281,7 @@ uint8_t* post_store8_1 (uint8_t * a, uint16x8_t v) ++ /* ++ **post_store8_2: ++ ** ... ++-** vstrb.8 q[0-9]+, \[r0\], #-26 +++** vstrb.8 q[0-7], \[r0\], #-26 ++ ** ... ++ */ ++ int8_t* post_store8_2 (int8_t * a, int8x16_t v) ++@@ -294,7 +294,7 @@ int8_t* post_store8_2 (int8_t * a, int8x16_t v) ++ /* ++ **post_store8_3: ++ ** ... ++-** vstrb.16 q[0-9]+, \[r0\], #7 +++** vstrb.16 q[0-7], \[r0\], #7 ++ ** ... ++ */ ++ uint8_t* post_store8_3 (uint8_t * a, uint16x8_t v) ++@@ -307,7 +307,7 @@ uint8_t* post_store8_3 (uint8_t * a, uint16x8_t v) ++ /* ++ **post_storefp16_0: ++ ** ... ++-** vstrh.16 q[0-9]+, \[r0\], #-16 +++** vstrh.16 q[0-7], \[r0\], #-16 ++ ** ... ++ */ ++ float16_t *post_storefp16_0 (float16_t *a, float16x8_t v) ++@@ -320,7 +320,7 @@ float16_t *post_storefp16_0 (float16_t *a, float16x8_t v) ++ /* ++ **post_store16_0: ++ ** ... ++-** vstrh.16 q[0-9]+, \[r0\], #126 +++** vstrh.16 q[0-7], \[r0\], #126 ++ ** ... ++ */ ++ int16_t* post_store16_0 (int16_t * a, int16x8_t v) ++@@ -333,7 +333,7 @@ int16_t* post_store16_0 (int16_t * a, int16x8_t v) ++ /* ++ **post_store16_1: ++ ** ... ++-** vstrh.32 q[0-9]+, \[r0\], #-16 +++** vstrh.32 q[0-7], \[r0\], #-16 ++ ** ... ++ */ ++ uint16_t* post_store16_1 (uint16_t * a, uint32x4_t v) ++@@ -346,7 +346,7 @@ uint16_t* post_store16_1 (uint16_t * a, uint32x4_t v) ++ /* ++ **post_storefp32_0: ++ ** ... ++-** vstrw.32 q[0-9]+, \[r0\], #-16 +++** vstrw.32 q[0-7], \[r0\], #-16 ++ ** ... ++ */ ++ float32_t* post_storefp32_0 (float32_t * a, float32x4_t v) ++@@ -359,7 +359,7 @@ float32_t* post_storefp32_0 (float32_t * a, float32x4_t v) ++ /* ++ **post_store32_0: ++ ** ... ++-** vstrw.32 q[0-9]+, \[r0\], #16 +++** vstrw.32 q[0-7], \[r0\], #16 ++ ** ... ++ */ ++ int32_t* post_store32_0 (int32_t * a, int32x4_t v) ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c ++@@ -0,0 +1,67 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include +++ +++volatile int32x4_t c1; +++volatile uint32x4_t c2; +++int *carry; +++ +++int +++main () +++{ +++ int32x4_t a1 = vcreateq_s32 (0, 0); +++ int32x4_t b1 = vcreateq_s32 (0, 0); +++ int32x4_t inactive1 = vcreateq_s32 (0, 0); +++ +++ uint32x4_t a2 = vcreateq_u32 (0, 0); +++ uint32x4_t b2 = vcreateq_u32 (0, 0); +++ uint32x4_t inactive2 = vcreateq_u32 (0, 0); +++ +++ mve_pred16_t p = 0xFFFF; +++ (*carry) = 0xFFFFFFFF; +++ +++ __builtin_arm_set_fpscr_nzcvqc (0); +++ c1 = vadcq (a1, b1, carry); +++ if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000) +++ __builtin_abort (); +++ (*carry) = 0xFFFFFFFF; +++ __builtin_arm_set_fpscr_nzcvqc (0); +++ c2 = vadcq (a2, b2, carry); +++ if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000) +++ __builtin_abort (); +++ (*carry) = 0xFFFFFFFF; +++ __builtin_arm_set_fpscr_nzcvqc (0); +++ c1 = vsbcq (a1, b1, carry); +++ if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000) +++ __builtin_abort (); +++ (*carry) = 0xFFFFFFFF; +++ __builtin_arm_set_fpscr_nzcvqc (0); +++ c2 = vsbcq (a2, b2, carry); +++ if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000) +++ __builtin_abort (); +++ (*carry) = 0xFFFFFFFF; +++ __builtin_arm_set_fpscr_nzcvqc (0); +++ c1 = vadcq_m (inactive1, a1, b1, carry, p); +++ if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000) +++ __builtin_abort (); +++ (*carry) = 0xFFFFFFFF; +++ __builtin_arm_set_fpscr_nzcvqc (0); +++ c2 = vadcq_m (inactive2, a2, b2, carry, p); +++ if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000) +++ __builtin_abort (); +++ (*carry) = 0xFFFFFFFF; +++ __builtin_arm_set_fpscr_nzcvqc (0); +++ c1 = vsbcq_m (inactive1, a1, b1, carry, p); +++ if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000) +++ __builtin_abort (); +++ (*carry) = 0xFFFFFFFF; +++ __builtin_arm_set_fpscr_nzcvqc (0); +++ c2 = vsbcq_m (inactive2, a2, b2, carry, p); +++ if (__builtin_arm_get_fpscr_nzcvqc () & !0x20000000) +++ __builtin_abort (); +++ +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-1-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2 --save-temps" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-1.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE uint8x16_t +++#define INTRINSIC vstrbq_u8 +++#define INTRINSIC_P vstrbq_p_u8 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-10-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-10.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE int32x4_t +++#define INTRINSIC vstrhq_s32 +++#define INTRINSIC_P vstrhq_p_s32 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-11-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-11.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE uint32x4_t +++#define INTRINSIC vstrwq_u32 +++#define INTRINSIC_P vstrwq_p_u32 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-12-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-12.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE int32x4_t +++#define INTRINSIC vstrwq_s32 +++#define INTRINSIC_P vstrwq_p_s32 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve_fp } */ +++ +++#include "pr108177-13.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE float16x8_t +++#define INTRINSIC vstrhq_f16 +++#define INTRINSIC_P vstrhq_p_f16 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve_fp } */ +++ +++#include "pr108177-14.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve_fp } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE float32x4_t +++#define INTRINSIC vstrwq_f32 +++#define INTRINSIC_P vstrwq_p_f32 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-2-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-2.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE int8x16_t +++#define INTRINSIC vstrbq_s8 +++#define INTRINSIC_P vstrbq_p_s8 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-3-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-3.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE uint16x8_t +++#define INTRINSIC vstrbq_u16 +++#define INTRINSIC_P vstrbq_p_u16 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-4-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-4.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE int16x8_t +++#define INTRINSIC vstrbq_s16 +++#define INTRINSIC_P vstrbq_p_s16 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-5-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-5.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE uint32x4_t +++#define INTRINSIC vstrbq_u32 +++#define INTRINSIC_P vstrbq_p_u32 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-6-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-6.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE int32x4_t +++#define INTRINSIC vstrbq_s32 +++#define INTRINSIC_P vstrbq_p_s32 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-7-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-7.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE uint16x8_t +++#define INTRINSIC vstrhq_u16 +++#define INTRINSIC_P vstrhq_p_u16 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-8-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-8.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE int16x8_t +++#define INTRINSIC vstrhq_s16 +++#define INTRINSIC_P vstrhq_p_s16 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-9-run.c ++@@ -0,0 +1,6 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target arm_mve_hw } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++ +++#include "pr108177-9.c" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +++/* { dg-options "-O2" } */ +++/* { dg-add-options arm_v8_1m_mve } */ +++/* { dg-final { check-function-bodies "**" "" "" } } */ +++ +++/* +++** test: +++**... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] +++**... +++*/ +++ +++#define TYPE uint32x4_t +++#define INTRINSIC vstrhq_u32 +++#define INTRINSIC_P vstrhq_p_u32 +++ +++#include "pr108177.x" ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177-main.x ++@@ -0,0 +1,31 @@ +++#include +++extern void abort (void); +++ +++__attribute__ ((noipa)) void +++write_expected (uint32x4_t v, void *a) +++{ +++ TYPE _v = (TYPE) v; +++ INTRINSIC (a, _v); +++} +++ +++void test (uint32x4_t, void *, mve_pred16_t, mve_pred16_t); +++ +++int main(void) +++{ +++ uint32x4_t v = {0, 1, 2, 3}; +++ uint32_t actual[] = {0, 0, 0, 0}; +++ uint32_t expected[] = {0, 0, 0, 0}; +++ +++ write_expected (v, &(expected[0])); +++ +++ mve_pred16_t p1 = 0xff00; +++ mve_pred16_t p2 = 0x00ff; +++ +++ test (v, (void *)&actual[0], p1, p2); +++ +++ if (__builtin_memcmp (&actual[0], &expected[0], 16) != 0) +++ abort (); +++ +++ return 0; +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/mve/pr108177.x ++@@ -0,0 +1,9 @@ +++#include "pr108177-main.x" +++ +++__attribute__ ((noipa)) void +++test (uint32x4_t v, void *a, mve_pred16_t p1, mve_pred16_t p2) +++{ +++ TYPE _v = (TYPE) v; +++ INTRINSIC_P (a, _v, p1); +++ INTRINSIC_P (a, _v, p2); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/pr109939.c ++@@ -0,0 +1,14 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_sat_ok } */ +++/* { dg-add-options arm_sat } */ +++/* { dg-additional-options "-O -Wall -Wconversion" } */ +++ +++#include +++ +++int dbg_ssat_out; +++int dbg_ssat_in; +++ +++void test_arm_ssat(void) +++{ +++ dbg_ssat_out = __ssat(dbg_ssat_in, 16); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c ++@@ -0,0 +1,4 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target arm_hard_ok } */ +++/* { dg-options "-O2 -march=armv7-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mbig-endian -mpure-code" } */ +++double f() { return 5.0; } ++--- a/src/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/mve-compare-1.c ++@@ -50,31 +50,31 @@ TEST_TYPE (vs32, __INT32_TYPE__, COMPARE_REG_AND_ZERO, 16) ++ TEST_TYPE (vu32, __UINT32_TYPE__, COMPARE_REG, 16) ++ ++ /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }. ++-/* { dg-final { scan-assembler-times {\tvcmp.i8 eq, q[0-9]+, q[0-9]+\n} 4 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.i8 ne, q[0-9]+, q[0-9]+\n} 4 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s8 lt, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s8 le, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s8 gt, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s8 ge, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u8 hi, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u8 cs, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i8\teq, q[0-9]+, q[0-9]+\n} 4 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i8\tne, q[0-9]+, q[0-9]+\n} 4 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s8\tlt, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s8\tle, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s8\tgt, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s8\tge, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u8\thi, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u8\tcs, q[0-9]+, q[0-9]+\n} 2 } } */ ++ ++ /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }. ++-/* { dg-final { scan-assembler-times {\tvcmp.i16 eq, q[0-9]+, q[0-9]+\n} 4 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.i16 ne, q[0-9]+, q[0-9]+\n} 4 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s16 lt, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s16 le, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s16 gt, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s16 ge, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u16 hi, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u16 cs, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i16\teq, q[0-9]+, q[0-9]+\n} 4 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i16\tne, q[0-9]+, q[0-9]+\n} 4 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s16\tlt, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s16\tle, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s16\tgt, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s16\tge, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u16\thi, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u16\tcs, q[0-9]+, q[0-9]+\n} 2 } } */ ++ ++ /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }. ++-/* { dg-final { scan-assembler-times {\tvcmp.i32 eq, q[0-9]+, q[0-9]+\n} 4 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.i32 ne, q[0-9]+, q[0-9]+\n} 4 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s32 lt, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s32 le, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s32 gt, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s32 ge, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u32 hi, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u32 cs, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i32\teq, q[0-9]+, q[0-9]+\n} 4 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i32\tne, q[0-9]+, q[0-9]+\n} 4 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s32\tlt, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s32\tle, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s32\tgt, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s32\tge, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u32\thi, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u32\tcs, q[0-9]+, q[0-9]+\n} 2 } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/mve-compare-scalar-1.c ++@@ -39,31 +39,31 @@ TEST_TYPE (vs32, __INT32_TYPE__, 16) ++ TEST_TYPE (vu32, __UINT32_TYPE__, 16) ++ ++ /* { 8 bits } x { eq, ne, lt, le, gt, ge, hi, cs }. ++-/* { dg-final { scan-assembler-times {\tvcmp.i8 eq, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.i8 ne, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s8 lt, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s8 le, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s8 gt, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s8 ge, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u8 hi, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u8 cs, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i8\teq, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i8\tne, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s8\tlt, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s8\tle, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s8\tgt, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s8\tge, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u8\thi, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u8\tcs, q[0-9]+, q[0-9]+\n} 2 } } */ ++ ++ /* { 16 bits } x { eq, ne, lt, le, gt, ge, hi, cs }. ++-/* { dg-final { scan-assembler-times {\tvcmp.i16 eq, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.i16 ne, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s16 lt, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s16 le, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s16 gt, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s16 ge, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u16 hi, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u16 cs, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i16\teq, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i16\tne, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s16\tlt, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s16\tle, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s16\tgt, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s16\tge, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u16\thi, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u16\tcs, q[0-9]+, q[0-9]+\n} 2 } } */ ++ ++ /* { 32 bits } x { eq, ne, lt, le, gt, ge, hi, cs }. ++-/* { dg-final { scan-assembler-times {\tvcmp.i32 eq, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.i32 ne, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s32 lt, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s32 le, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s32 gt, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s32 ge, q[0-9]+, q[0-9]+\n} 1 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u32 hi, q[0-9]+, q[0-9]+\n} 2 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u32 cs, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i32\teq, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i32\tne, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s32\tlt, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s32\tle, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s32\tgt, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s32\tge, q[0-9]+, q[0-9]+\n} 1 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u32\thi, q[0-9]+, q[0-9]+\n} 2 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u32\tcs, q[0-9]+, q[0-9]+\n} 2 } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/mve-vabs.c ++@@ -38,7 +38,7 @@ FUNC(f, float, 16, 8, vabs) ++ integer optimizations actually generate a call to memmove, the other ones a ++ 'vabs'. */ ++ /* { dg-final { scan-assembler-times {vabs.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */ ++-/* { dg-final { scan-assembler-times {vabs.f[0-9]+ q[0-9]+, q[0-9]+} 2 } } */ +++/* { dg-final { scan-assembler-times {vabs.f[0-9]+\tq[0-9]+, q[0-9]+} 2 } } */ ++ /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 5 } } */ ++ /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 5 } } */ ++ /* { dg-final { scan-assembler-times {memmove} 3 } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c ++@@ -22,9 +22,9 @@ FUNC(u, uint, 16, 8, +, vadd) ++ FUNC(s, int, 8, 16, +, vadd) ++ FUNC(u, uint, 8, 16, +, vadd) ++ ++-/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ ++-/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ ++-/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ +++/* { dg-final { scan-assembler-times {vadd\.i32\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ +++/* { dg-final { scan-assembler-times {vadd\.i16\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ +++/* { dg-final { scan-assembler-times {vadd\.i8\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ ++ ++ void test_vadd_f32 (float * dest, float * a, float * b) { ++ int i; ++@@ -32,7 +32,7 @@ void test_vadd_f32 (float * dest, float * a, float * b) { ++ dest[i] = a[i] + b[i]; ++ } ++ } ++-/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ +++/* { dg-final { scan-assembler-times {vadd\.f32\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ ++ ++ void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) { ++ int i; ++@@ -40,4 +40,4 @@ void test_vadd_f16 (__fp16 * dest, __fp16 * a, __fp16 * b) { ++ dest[i] = a[i] + b[i]; ++ } ++ } ++-/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ +++/* { dg-final { scan-assembler-times {vadd\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/mve-vadd-scalar-1.c ++@@ -24,9 +24,9 @@ FUNC_IMM(u, uint, 8, 16, +, vaddimm) ++ ++ /* For the moment we do not select the T2 vadd variant operating on a scalar ++ final argument. */ ++-/* { dg-final { scan-assembler-times {vadd\.i32 q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */ ++-/* { dg-final { scan-assembler-times {vadd\.i16 q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */ ++-/* { dg-final { scan-assembler-times {vadd\.i8 q[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {vadd\.i32\tq[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {vadd\.i16\tq[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {vadd\.i8\tq[0-9]+, q[0-9]+, r[0-9]+} 2 { xfail *-*-* } } } */ ++ ++ void test_vaddimm_f32 (float * dest, float * a) { ++ int i; ++@@ -34,7 +34,7 @@ void test_vaddimm_f32 (float * dest, float * a) { ++ dest[i] = a[i] + 5.0; ++ } ++ } ++-/* { dg-final { scan-assembler-times {vadd\.f32 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {vadd\.f32\tq[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */ ++ ++ /* Note that dest[i] = a[i] + 5.0f16 is not vectorized. */ ++ void test_vaddimm_f16 (__fp16 * dest, __fp16 * a) { ++@@ -44,4 +44,4 @@ void test_vaddimm_f16 (__fp16 * dest, __fp16 * a) { ++ dest[i] = a[i] + b; ++ } ++ } ++-/* { dg-final { scan-assembler-times {vadd\.f16 q[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {vadd\.f16\tq[0-9]+, q[0-9]+, r[0-9]+} 1 { xfail *-*-* } } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c ++@@ -23,6 +23,6 @@ FUNC(u, uint, 8, clz) ++ ++ /* 16 and 8-bit versions are not vectorized because they need pack/unpack ++ patterns since __builtin_clz uses 32-bit parameter and return value. */ ++-/* { dg-final { scan-assembler-times {vclz\.i32 q[0-9]+, q[0-9]+} 2 } } */ ++-/* { dg-final { scan-assembler-times {vclz\.i16 q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */ ++-/* { dg-final { scan-assembler-times {vclz\.i8 q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {vclz\.i32\tq[0-9]+, q[0-9]+} 2 } } */ +++/* { dg-final { scan-assembler-times {vclz\.i16\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {vclz\.i8\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/mve-vcmp.c ++@@ -36,15 +36,15 @@ ALL_FUNCS(>=, vcmpge) ++ ++ /* MVE has only 128-bit vectors, so we can vectorize only half of the ++ functions above. */ ++-/* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+ eq, q[0-9]+, q[0-9]+\n} 6 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+ ne, q[0-9]+, q[0-9]+\n} 6 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+\teq, q[0-9]+, q[0-9]+\n} 6 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.i[0-9]+\tne, q[0-9]+, q[0-9]+\n} 6 } } */ ++ ++ /* lt, le, gt, ge apply to signed types, cs and hi to unsigned types. */ ++ /* lt and le with unsigned types are replaced with the opposite condition, hence ++ the double number of matches for cs and hi. */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+ lt, q[0-9]+, q[0-9]+\n} 3 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+ le, q[0-9]+, q[0-9]+\n} 3 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+ gt, q[0-9]+, q[0-9]+\n} 3 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+ ge, q[0-9]+, q[0-9]+\n} 3 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+ cs, q[0-9]+, q[0-9]+\n} 6 } } */ ++-/* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+ hi, q[0-9]+, q[0-9]+\n} 6 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tlt, q[0-9]+, q[0-9]+\n} 3 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tle, q[0-9]+, q[0-9]+\n} 3 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tgt, q[0-9]+, q[0-9]+\n} 3 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.s[0-9]+\tge, q[0-9]+, q[0-9]+\n} 3 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+\tcs, q[0-9]+, q[0-9]+\n} 6 } } */ +++/* { dg-final { scan-assembler-times {\tvcmp.u[0-9]+\thi, q[0-9]+, q[0-9]+\n} 6 } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c ++@@ -45,8 +45,8 @@ FUNC(f, float, 16, 8, -, vneg) ++ ++ /* MVE has only 128-bit vectors, so we can vectorize only half of the ++ functions above. */ ++-/* { dg-final { scan-assembler-times {vneg.s[0-9]+ q[0-9]+, q[0-9]+} 6 } } */ ++-/* { dg-final { scan-assembler-times {vneg.f[0-9]+ q[0-9]+, q[0-9]+} 2 } } */ +++/* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */ +++/* { dg-final { scan-assembler-times {vneg.f[0-9]+\tq[0-9]+, q[0-9]+} 2 } } */ ++ /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 8 } } */ ++ /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 8 } } */ ++ /* { dg-final { scan-assembler-not {orr\tr[0-9]+, r[0-9]+, r[0-9]+} } } */ ++--- a/src/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c ++@@ -58,7 +58,7 @@ FUNC_IMM(u, uint, 8, 16, >>, vshrimm) ++ /* Vector right shifts use vneg and left shifts. */ ++ /* { dg-final { scan-assembler-times {vshl.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */ ++ /* { dg-final { scan-assembler-times {vshl.u[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */ ++-/* { dg-final { scan-assembler-times {vneg.s[0-9]+ q[0-9]+, q[0-9]+} 6 } } */ +++/* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */ ++ ++ ++ /* Shift by immediate. */ ++--- a/src/gcc/testsuite/gcc.target/arm/simd/pr101325.c +++++ b/src/gcc/testsuite/gcc.target/arm/simd/pr101325.c ++@@ -9,6 +9,6 @@ unsigned foo(int8x16_t v, int8x16_t w) ++ { ++ return vcmpeqq (v, w); ++ } ++-/* { dg-final { scan-assembler {\tvcmp.i8 eq} } } */ ++-/* { dg-final { scan-assembler {\tvmrs\tr[0-9]+, P0} } } */ +++/* { dg-final { scan-assembler {\tvcmp.i8\teq} } } */ +++/* { dg-final { scan-assembler {\tvmrs\tr[0-9]+, p0} } } */ ++ /* { dg-final { scan-assembler {\tuxth} } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/avr/attribute-io.h ++@@ -0,0 +1,74 @@ +++/* { dg-do run } */ +++/* { dg-options "-Os -save-temps" } */ +++ +++__attribute__((address(1234))) +++int g_1234; +++ +++__attribute__((weak, address(4321))) +++int w_4321; +++ +++__attribute__((address(5678))) +++static int l_5678; +++ +++__attribute__((io_low(__AVR_SFR_OFFSET__ + 3))) +++volatile unsigned char g_low; +++ +++__attribute__((weak, io_low(__AVR_SFR_OFFSET__ + 2))) +++volatile unsigned char w_low; +++ +++__attribute__((io_low(__AVR_SFR_OFFSET__ + 1))) +++static volatile unsigned char l_low; +++ +++__attribute__((io(__AVR_SFR_OFFSET__ + 35))) +++volatile unsigned char g_io; +++ +++__attribute__((weak, io(__AVR_SFR_OFFSET__ + 34))) +++volatile unsigned char w_io; +++ +++__attribute__((io(__AVR_SFR_OFFSET__ + 33))) +++static volatile unsigned char l_io; +++ +++#define CMP(SYM, VAL) \ +++ do { \ +++ unsigned x; \ +++ __asm ("" : "=d" (x) : "0" (& SYM)); \ +++ if (x != VAL) \ +++ __builtin_abort(); \ +++ } while(0) +++ +++ +++int main (void) +++{ +++ CMP (g_1234, 1234); +++ CMP (w_4321, 4321); +++ CMP (l_5678, 5678); +++ +++ CMP (g_low, __AVR_SFR_OFFSET__ + 3); +++ CMP (w_low, __AVR_SFR_OFFSET__ + 2); +++ CMP (l_low, __AVR_SFR_OFFSET__ + 1); +++ +++ CMP (g_io, __AVR_SFR_OFFSET__ + 35); +++ CMP (w_io, __AVR_SFR_OFFSET__ + 34); +++ CMP (l_io, __AVR_SFR_OFFSET__ + 33); +++ +++ l_low = l_io; +++ g_low = g_io; +++ w_low = w_io; +++ l_low |= 1; +++ g_low |= 2; +++ w_low |= 4; +++ +++ return 0; +++} +++ +++/* { dg-final { scan-assembler "g_1234 = 1234" } } */ +++/* { dg-final { scan-assembler "w_4321 = 4321" } } */ +++/* { dg-final { scan-assembler "l_5678 = 5678" } } */ +++ +++/* { dg-final { scan-assembler "\\.globl g_1234" } } */ +++/* { dg-final { scan-assembler "\\.globl g_low" } } */ +++/* { dg-final { scan-assembler "\\.globl g_io" } } */ +++ +++/* { dg-final { scan-assembler "\\.weak w_4321" } } */ +++/* { dg-final { scan-assembler "\\.weak w_low" } } */ +++/* { dg-final { scan-assembler "\\.weak w_io" } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/avr/pr112952-0.c ++@@ -0,0 +1,16 @@ +++/* { dg-do run } */ +++/* { dg-options "-Os -save-temps -fno-data-sections -fno-common" } */ +++ +++#include "attribute-io.h" +++ +++/* { dg-final { scan-assembler "g_1234 = 1234" } } */ +++/* { dg-final { scan-assembler "w_4321 = 4321" } } */ +++/* { dg-final { scan-assembler "l_5678 = 5678" } } */ +++ +++/* { dg-final { scan-assembler "\\.globl g_1234" } } */ +++/* { dg-final { scan-assembler "\\.globl g_low" } } */ +++/* { dg-final { scan-assembler "\\.globl g_io" } } */ +++ +++/* { dg-final { scan-assembler "\\.weak w_4321" } } */ +++/* { dg-final { scan-assembler "\\.weak w_low" } } */ +++/* { dg-final { scan-assembler "\\.weak w_io" } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/avr/pr112952-1.c ++@@ -0,0 +1,16 @@ +++/* { dg-do run } */ +++/* { dg-options "-Os -save-temps -fno-data-sections -fcommon" } */ +++ +++#include "attribute-io.h" +++ +++/* { dg-final { scan-assembler "g_1234 = 1234" } } */ +++/* { dg-final { scan-assembler "w_4321 = 4321" } } */ +++/* { dg-final { scan-assembler "l_5678 = 5678" } } */ +++ +++/* { dg-final { scan-assembler "\\.globl g_1234" } } */ +++/* { dg-final { scan-assembler "\\.globl g_low" } } */ +++/* { dg-final { scan-assembler "\\.globl g_io" } } */ +++ +++/* { dg-final { scan-assembler "\\.weak w_4321" } } */ +++/* { dg-final { scan-assembler "\\.weak w_low" } } */ +++/* { dg-final { scan-assembler "\\.weak w_io" } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/avr/pr112952-2.c ++@@ -0,0 +1,16 @@ +++/* { dg-do run } */ +++/* { dg-options "-Os -save-temps -fdata-sections -fno-common" } */ +++ +++#include "attribute-io.h" +++ +++/* { dg-final { scan-assembler "g_1234 = 1234" } } */ +++/* { dg-final { scan-assembler "w_4321 = 4321" } } */ +++/* { dg-final { scan-assembler "l_5678 = 5678" } } */ +++ +++/* { dg-final { scan-assembler "\\.globl g_1234" } } */ +++/* { dg-final { scan-assembler "\\.globl g_low" } } */ +++/* { dg-final { scan-assembler "\\.globl g_io" } } */ +++ +++/* { dg-final { scan-assembler "\\.weak w_4321" } } */ +++/* { dg-final { scan-assembler "\\.weak w_low" } } */ +++/* { dg-final { scan-assembler "\\.weak w_io" } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/avr/pr112952-3.c ++@@ -0,0 +1,16 @@ +++/* { dg-do run } */ +++/* { dg-options "-Os -save-temps -fdata-sections -fcommon" } */ +++ +++#include "attribute-io.h" +++ +++/* { dg-final { scan-assembler "g_1234 = 1234" } } */ +++/* { dg-final { scan-assembler "w_4321 = 4321" } } */ +++/* { dg-final { scan-assembler "l_5678 = 5678" } } */ +++ +++/* { dg-final { scan-assembler "\\.globl g_1234" } } */ +++/* { dg-final { scan-assembler "\\.globl g_low" } } */ +++/* { dg-final { scan-assembler "\\.globl g_io" } } */ +++ +++/* { dg-final { scan-assembler "\\.weak w_4321" } } */ +++/* { dg-final { scan-assembler "\\.weak w_low" } } */ +++/* { dg-final { scan-assembler "\\.weak w_io" } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/avr/pr82931.c ++@@ -0,0 +1,29 @@ +++/* { dg-options "-Os" } */ +++/* { dg-final { scan-assembler-times "bst" 4 } } */ +++/* { dg-final { scan-assembler-times "bld" 4 } } */ +++ +++typedef __UINT8_TYPE__ uint8_t; +++typedef __UINT16_TYPE__ uint16_t; +++ +++#define BitMask (1u << 14) +++#define Bit8Mask ((uint8_t) (1u << 4)) +++ +++void merge1_8 (uint8_t *dst, const uint8_t *src) +++{ +++ *dst = (*src & Bit8Mask) | (*dst & ~ Bit8Mask); +++} +++ +++void merge2_8 (uint8_t *dst, const uint8_t *src) +++{ +++ *dst ^= (*dst ^ *src) & Bit8Mask; +++} +++ +++void merge1_16 (uint16_t *dst, const uint16_t *src) +++{ +++ *dst = (*src & BitMask) | (*dst & ~ BitMask); +++} +++ +++void merge2_16 (uint16_t *dst, const uint16_t *src) +++{ +++ *dst ^= (*dst ^ *src) & BitMask; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/avr/torture/pr105753.c ++@@ -0,0 +1,13 @@ +++int digit_sum (unsigned long n) +++{ +++ int sum = 0; +++ +++ do +++ { +++ int x = n % 10; +++ n /= 10; +++ sum += x; +++ } while(n); +++ +++ return sum; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/avr/torture/pr109650-1.c ++@@ -0,0 +1,63 @@ +++/* { dg-do run } */ +++/* { dg-options { -std=c99 } } */ +++ +++typedef _Bool bool; +++typedef __UINT8_TYPE__ uint8_t; +++ +++static inline __attribute__((__always_inline__)) +++bool func1a (bool p1, uint8_t p2) +++{ +++ if (p1) +++ return p2 <= 8; +++ return p2 <= 2; +++} +++ +++__attribute__((__noinline__, __noclone__)) +++bool func1b (bool p1, uint8_t p2) +++{ +++ return func1a (p1, p2); +++} +++ +++static inline __attribute__((__always_inline__)) +++bool func2a (bool p1, unsigned p2) +++{ +++ if (p1) +++ return p2 <= 8; +++ return p2 <= 2; +++} +++ +++__attribute__((__noinline__, __noclone__)) +++bool func2b (bool p1, unsigned p2) +++{ +++ return func2a (p1, p2); +++} +++ +++void test1 (void) +++{ +++ if (func1a (0, 1) != func1b (0, 1)) __builtin_abort(); +++ if (func1a (0, 2) != func1b (0, 2)) __builtin_abort(); +++ if (func1a (0, 3) != func1b (0, 3)) __builtin_abort(); +++ +++ if (func1a (1, 7) != func1b (1, 7)) __builtin_abort(); +++ if (func1a (1, 8) != func1b (1, 8)) __builtin_abort(); +++ if (func1a (1, 9) != func1b (1, 9)) __builtin_abort(); +++} +++ +++void test2 (void) +++{ +++ if (func2a (0, 1) != func2b (0, 1)) __builtin_abort(); +++ if (func2a (0, 2) != func2b (0, 2)) __builtin_abort(); +++ if (func2a (0, 3) != func2b (0, 3)) __builtin_abort(); +++ +++ if (func2a (1, 7) != func2b (1, 7)) __builtin_abort(); +++ if (func2a (1, 8) != func2b (1, 8)) __builtin_abort(); +++ if (func2a (1, 9) != func2b (1, 9)) __builtin_abort(); +++} +++ +++int main (void) +++{ +++ test1(); +++ test2(); +++ +++ __builtin_exit (0); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/avr/torture/pr109650-2.c ++@@ -0,0 +1,79 @@ +++/* { dg-do run } */ +++ +++typedef __UINT8_TYPE__ uint8_t; +++ +++#define AI static __inline__ __attribute__((__always_inline__)) +++#define NI __attribute__((__noinline__,__noclone__)) +++ +++AI uint8_t func1_eq (uint8_t c, unsigned x) +++{ +++ if (x == c) +++ return 1; +++ return 0; +++} +++ +++AI uint8_t func1_ne (uint8_t c, unsigned x) +++{ +++ if (x != c) +++ return 1; +++ return 0; +++} +++ +++AI uint8_t func1_ltu (uint8_t c, unsigned x) +++{ +++ if (x < c) +++ return 1; +++ return 0; +++} +++ +++AI uint8_t func1_leu (uint8_t c, unsigned x) +++{ +++ if (x <= c) +++ return 1; +++ return 0; +++} +++ +++AI uint8_t func1_gtu (uint8_t c, unsigned x) +++{ +++ if (x > c) +++ return 1; +++ return 0; +++} +++ +++AI uint8_t func1_geu (uint8_t c, unsigned x) +++{ +++ if (x >= c) +++ return 1; +++ return 0; +++} +++ +++NI uint8_t func2_eq (uint8_t c, unsigned x) { return func1_eq (c, x); } +++NI uint8_t func2_ne (uint8_t c, unsigned x) { return func1_ne (c, x); } +++NI uint8_t func2_ltu (uint8_t c, unsigned x) { return func1_ltu (c, x); } +++NI uint8_t func2_leu (uint8_t c, unsigned x) { return func1_leu (c, x); } +++NI uint8_t func2_gtu (uint8_t c, unsigned x) { return func1_gtu (c, x); } +++NI uint8_t func2_geu (uint8_t c, unsigned x) { return func1_geu (c, x); } +++ +++AI void test4 (uint8_t c, unsigned x) +++{ +++ if (func2_eq (c, x) != func1_eq (c, x)) __builtin_abort(); +++ if (func2_ne (c, x) != func1_ne (c, x)) __builtin_abort(); +++ if (func2_ltu (c, x) != func1_ltu (c, x)) __builtin_abort(); +++ if (func2_leu (c, x) != func1_leu (c, x)) __builtin_abort(); +++ if (func2_gtu (c, x) != func1_gtu (c, x)) __builtin_abort(); +++ if (func2_geu (c, x) != func1_geu (c, x)) __builtin_abort(); +++} +++ +++int main (void) +++{ +++ test4 (127, 127); +++ test4 (127, 128); +++ test4 (128, 127); +++ +++ test4 (0x42, 0x142); +++ test4 (0x0, 0x100); +++ test4 (0x0, 0x0); +++ test4 (0x0, 0x1); +++ +++ __builtin_exit (0); +++} ++--- a/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-12.c ++@@ -16,5 +16,6 @@ foo () ++ _mm256_zeroupper (); ++ } ++ ++-/* { dg-final { scan-assembler-times "avx_vzeroupper" 4 } } */ +++/* { dg-final { scan-assembler-times "avx_vzeroupper" 4 { target ia32 } } } */ +++/* { dg-final { scan-assembler-times "avx_vzeroupper" 5 { target { ! ia32 } } } } */ ++ /* { dg-final { scan-assembler-times "\\*avx_vzeroall" 1 } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-29.c ++@@ -0,0 +1,14 @@ +++/* { dg-do compile } */ +++/* { dg-options "-O0 -mavx -mtune=generic -mvzeroupper -dp" } */ +++ +++#include +++ +++extern __m256 x, y; +++ +++void +++foo () +++{ +++ x = y; +++} +++ +++/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */ ++--- a/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-7.c ++@@ -12,4 +12,5 @@ foo () ++ _mm256_zeroupper (); ++ } ++ ++-/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */ +++/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 { target ia32 } } } */ +++/* { dg-final { scan-assembler-times "avx_vzeroupper" 2 { target { ! ia32 } } } } */ ++--- a/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx-vzeroupper-9.c ++@@ -15,4 +15,5 @@ foo () ++ _mm256_zeroupper (); ++ } ++ ++-/* { dg-final { scan-assembler-times "avx_vzeroupper" 4 } } */ +++/* { dg-final { scan-assembler-times "avx_vzeroupper" 4 { target ia32 } } } */ +++/* { dg-final { scan-assembler-times "avx_vzeroupper" 5 { target { ! ia32 } } } } */ ++--- a/src/gcc/testsuite/gcc.target/i386/avx2-gather-2.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx2-gather-2.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -fdump-tree-vect-details -march=skylake" } */ +++/* { dg-options "-O3 -fdump-tree-vect-details -march=skylake -mtune=haswell" } */ ++ ++ #include "avx2-gather-1.c" ++ ++--- a/src/gcc/testsuite/gcc.target/i386/avx2-gather-6.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx2-gather-6.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -mavx2 -fno-common -fdump-tree-vect-details -mtune=skylake" } */ +++/* { dg-options "-O3 -mavx2 -fno-common -fdump-tree-vect-details -mtune=haswell" } */ ++ ++ #include "avx2-gather-5.c" ++ ++--- a/src/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx512f-pr88464-1.c ++@@ -1,6 +1,6 @@ ++ /* PR tree-optimization/88464 */ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=skylake-avx512 -fdump-tree-vect-details" } */ +++/* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=haswell -fdump-tree-vect-details" } */ ++ /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */ ++ /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */ ++ ++--- a/src/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx512f-pr88464-5.c ++@@ -1,6 +1,6 @@ ++ /* PR tree-optimization/88464 */ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=skylake-avx512 -fdump-tree-vect-details" } */ +++/* { dg-options "-O3 -mavx512f -mprefer-vector-width=512 -mtune=haswell -fdump-tree-vect-details" } */ ++ /* { dg-final { scan-tree-dump-times "loop vectorized using 64 byte vectors" 4 "vect" } } */ ++ /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */ ++ ++--- a/src/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-1.c ++@@ -1,6 +1,6 @@ ++ /* PR tree-optimization/88464 */ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=skylake-avx512 -fdump-tree-vect-details" } */ +++/* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=haswell -fdump-tree-vect-details" } */ ++ /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */ ++ /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */ ++ ++--- a/src/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-11.c ++@@ -1,6 +1,6 @@ ++ /* PR tree-optimization/88464 */ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=skylake-avx512 -fdump-tree-vect-details" } */ +++/* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=haswell -fdump-tree-vect-details" } */ ++ /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */ ++ /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */ ++ ++--- a/src/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-3.c ++@@ -1,6 +1,6 @@ ++ /* PR tree-optimization/88464 */ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=skylake-avx512 -fdump-tree-vect-details" } */ +++/* { dg-options "-O3 -mavx512vl -mprefer-vector-width=128 -mtune=haswell -fdump-tree-vect-details" } */ ++ /* { dg-final { scan-tree-dump-times "loop vectorized using 16 byte vectors" 4 "vect" } } */ ++ /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */ ++ ++--- a/src/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c +++++ b/src/gcc/testsuite/gcc.target/i386/avx512vl-pr88464-9.c ++@@ -1,6 +1,6 @@ ++ /* PR tree-optimization/88464 */ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=skylake-avx512 -fdump-tree-vect-details" } */ +++/* { dg-options "-O3 -mavx512vl -mprefer-vector-width=256 -mtune=haswell -fdump-tree-vect-details" } */ ++ /* { dg-final { scan-tree-dump-times "loop vectorized using 32 byte vectors" 4 "vect" } } */ ++ /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 4 "vect" } } */ ++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/mvc17.c ++@@ -0,0 +1,11 @@ +++/* { dg-do compile } */ +++/* { dg-require-ifunc "" } */ +++/* { dg-options "-O2 -march=x86-64" } */ +++/* { dg-final { scan-assembler-times "rep mov" 1 } } */ +++ +++__attribute__((target_clones("default","arch=icelake-server"))) +++void +++foo (char *a, char *b, int size) +++{ +++ __builtin_memcpy (a, b, size & 0x7F); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/pr110108-2.c ++@@ -0,0 +1,14 @@ +++/* { dg-do compile } */ +++/* { dg-options "-mavx2 -O2 -funsigned-char" } */ +++/* { dg-final { scan-assembler-times "vpblendvb" 2 } } */ +++ +++#include +++__m128i do_stuff_128(__m128i X0, __m128i X1, __m128i X2) { +++ __m128i Result = _mm_blendv_epi8(X0, X1, X2); +++ return Result; +++} +++ +++__m256i do_stuff_256(__m256i X0, __m256i X1, __m256i X2) { +++ __m256i Result = _mm256_blendv_epi8(X0, X1, X2); +++ return Result; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/pr110170-3.c ++@@ -0,0 +1,11 @@ +++/* { dg-do compile { target { ! ia32 } } } */ +++/* { dg-options "-O2 -fno-if-conversion -fno-if-conversion2" } */ +++/* { dg-final { scan-assembler-not {(?n)movq.*r} } } */ +++ +++void __cond_swap(double* __x, double* __y) { +++ _Bool __r = (*__x < *__y); +++ double __tmp = __r ? *__x : *__y; +++ *__y = __r ? *__y : *__x; +++ *__x = __tmp; +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/pr110206.c ++@@ -0,0 +1,39 @@ +++/* PR target/110206 */ +++/* { dg-do run } */ +++/* { dg-options "-Os -mavx512bw -mavx512vl" } */ +++/* { dg-require-effective-target avx512bw } */ +++/* { dg-require-effective-target avx512vl } */ +++ +++#define AVX512BW +++#define AVX512VL +++ +++#include "avx512f-check.h" +++ +++typedef unsigned char __attribute__((__vector_size__ (4))) U; +++typedef unsigned char __attribute__((__vector_size__ (8))) V; +++typedef unsigned short u16; +++ +++V g; +++ +++void +++__attribute__((noinline)) +++foo (U u, u16 c, V *r) +++{ +++ if (!c) +++ abort (); +++ V x = __builtin_shufflevector (u, (204 >> u), 7, 0, 5, 1, 3, 5, 0, 2); +++ V y = __builtin_shufflevector (g, (V) { }, 7, 6, 6, 7, 2, 6, 3, 5); +++ V z = __builtin_shufflevector (y, 204 * x, 3, 9, 8, 1, 4, 6, 14, 5); +++ *r = z; +++} +++ +++static void test_256 (void) { }; +++ +++static void +++test_128 (void) +++{ +++ V r; +++ foo ((U){4}, 5, &r); +++ if (r[6] != 0x30) +++ abort(); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/pr110309.c ++@@ -0,0 +1,10 @@ +++/* { dg-do compile } */ +++/* { dg-options "-O3 --param vect-partial-vector-usage=1 -march=znver4 -mprefer-vector-width=256" } */ +++/* { dg-final { scan-assembler-not {(?n)vpblendd.*ymm} } } */ +++ +++ +++void foo (int * __restrict a, int *b) +++{ +++ for (int i = 0; i < 6; ++i) +++ a[i] = b[i] + 42; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/pr111306.c ++@@ -0,0 +1,36 @@ +++/* { dg-do run } */ +++/* { dg-options "-O2 -mavx512fp16 -mavx512vl" } */ +++/* { dg-require-effective-target avx512fp16 } */ +++ +++#define AVX512FP16 +++#include "avx512f-helper.h" +++ +++__attribute__((optimize("O2"),noipa)) +++void func1(_Float16 *a, _Float16 *b, int n, _Float16 *c) { +++ __m512h rA = _mm512_loadu_ph(a); +++ for (int i = 0; i < n; i += 32) { +++ __m512h rB = _mm512_loadu_ph(b + i); +++ _mm512_storeu_ph(c + i, _mm512_fcmul_pch(rB, rA)); +++ } +++} +++ +++void +++test_512 (void) +++{ +++ int n = 32; +++ _Float16 a[n], b[n], c[n]; +++ _Float16 exp[n]; +++ for (int i = 1; i <= n; i++) { +++ a[i - 1] = i & 1 ? -i : i; +++ b[i - 1] = i; +++ } +++ +++ func1(a, b, n, c); +++ for (int i = 0; i < n / 32; i += 2) { +++ if (c[i] != a[i] * b[i] + a[i+1] * b[i+1] +++ || c[i+1] != a[i] * b[i+1] - a[i+1]*b[i]) +++ __builtin_abort (); +++ } +++} +++ +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/pr111340.c ++@@ -0,0 +1,9 @@ +++/* PR target/111340 */ +++/* { dg-do compile { target { fpic && int128 } } } */ +++/* { dg-options "-O2 -fpic" } */ +++ +++void +++bar (void) +++{ +++ __asm ("# %0" : : "g" ((((unsigned __int128) 0x123456789abcdef0ULL) << 64) | 0x0fedcba987654321ULL)); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/pr112672.c ++@@ -0,0 +1,23 @@ +++/* PR target/112672 */ +++/* { dg-do run } */ +++/* { dg-options "-O2" } */ +++ +++typedef unsigned short u16; +++ +++u16 g = 254; +++ +++static inline u16 +++foo (u16 u) +++{ +++ u *= g; +++ return u + __builtin_parityl (u); +++} +++ +++int +++main (void) +++{ +++ u16 x = foo (4); +++ if (x != 4 * 254 + 1) +++ __builtin_abort (); +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/pr112891-2.c ++@@ -0,0 +1,30 @@ +++/* { dg-do compile } */ +++/* { dg-options "-mavx2 -O3" } */ +++/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */ +++ +++void +++__attribute__((noinline)) +++bar (double* a) +++{ +++ a[0] = 1.0; +++ a[1] = 2.0; +++} +++ +++double +++__attribute__((noinline)) +++foo (double* __restrict a, double* b) +++{ +++ a[0] += b[0]; +++ a[1] += b[1]; +++ a[2] += b[2]; +++ a[3] += b[3]; +++ bar (b); +++ return a[5] + b[5]; +++} +++ +++double +++foo1 (double* __restrict a, double* b) +++{ +++ double c = foo (a, b); +++ return __builtin_exp (c); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/pr112891.c ++@@ -0,0 +1,29 @@ +++/* { dg-do compile } */ +++/* { dg-options "-mavx2 -O3" } */ +++/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */ +++ +++void +++__attribute__((noinline)) +++bar (double* a) +++{ +++ a[0] = 1.0; +++ a[1] = 2.0; +++} +++ +++void +++__attribute__((noinline)) +++foo (double* __restrict a, double* b) +++{ +++ a[0] += b[0]; +++ a[1] += b[1]; +++ a[2] += b[2]; +++ a[3] += b[3]; +++ bar (b); +++} +++ +++double +++foo1 (double* __restrict a, double* b) +++{ +++ foo (a, b); +++ return __builtin_exp (b[1]); +++} ++--- a/src/gcc/testsuite/gcc.target/i386/pr88531-1b.c +++++ b/src/gcc/testsuite/gcc.target/i386/pr88531-1b.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -march=skylake -mfpmath=sse" } */ +++/* { dg-options "-O3 -march=skylake -mfpmath=sse -mtune=haswell" } */ ++ ++ #include "pr88531-1a.c" ++ ++--- a/src/gcc/testsuite/gcc.target/i386/pr88531-1c.c +++++ b/src/gcc/testsuite/gcc.target/i386/pr88531-1c.c ++@@ -1,5 +1,5 @@ ++ /* { dg-do compile } */ ++-/* { dg-options "-O3 -march=skylake-avx512 -mfpmath=sse" } */ +++/* { dg-options "-O3 -march=skylake-avx512 -mfpmath=sse -mtune=haswell" } */ ++ ++ #include "pr88531-1a.c" ++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/sse2-pr112816-2.c ++@@ -0,0 +1,16 @@ +++/* PR target/112816 */ +++/* { dg-do compile } */ +++/* { dg-options "-O2 -msse2" } */ +++ +++#define N 2 +++struct S { float x[N]; }; +++struct T { int x[N]; }; +++ +++struct T +++foo (struct S x) +++{ +++ struct T res; +++ for (int i = 0; i < N; ++i) +++ res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0; +++ return res; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/i386/sse2-pr112816.c ++@@ -0,0 +1,16 @@ +++/* PR target/112816 */ +++/* { dg-do compile } */ +++/* { dg-options "-O2 -msse2" } */ +++ +++#define N 4 +++struct S { float x[N]; }; +++struct T { int x[N]; }; +++ +++struct T +++foo (struct S x) +++{ +++ struct T res; +++ for (int i = 0; i < N; ++i) +++ res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0; +++ return res; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/loongarch/builtin_thread_pointer.c ++@@ -0,0 +1,10 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target tls_native } */ +++/* { dg-options "-O2" } */ +++/* { dg-final { scan-assembler "or\t\\\$r4,\\\$r2,\\\$r0" } } */ +++ +++void * +++get_tp () +++{ +++ return __builtin_thread_pointer (); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/loongarch/cas-acquire.c ++@@ -0,0 +1,82 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target c99_runtime } */ +++/* { dg-require-effective-target pthread } */ +++/* { dg-options "-std=c99 -pthread" } */ +++ +++/* https://github.com/llvm/llvm-project/pull/67391#issuecomment-1752403934 +++ reported that this had failed with GCC and 3A6000. */ +++ +++#include +++#include +++#include +++#include +++ +++static unsigned int tags[32]; +++static unsigned int vals[32]; +++ +++static void * +++writer_entry (void *data) +++{ +++ atomic_uint *pt = (atomic_uint *)tags; +++ atomic_uint *pv = (atomic_uint *)vals; +++ +++ for (unsigned int n = 1; n < 10000; n++) +++ { +++ atomic_store_explicit (&pv[n & 31], n, memory_order_release); +++ atomic_store_explicit (&pt[n & 31], n, memory_order_release); +++ } +++ +++ return NULL; +++} +++ +++static void * +++reader_entry (void *data) +++{ +++ atomic_uint *pt = (atomic_uint *)tags; +++ atomic_uint *pv = (atomic_uint *)vals; +++ int i; +++ +++ for (;;) +++ { +++ for (i = 0; i < 32; i++) +++ { +++ unsigned int tag = 0; +++ bool res; +++ +++ res = atomic_compare_exchange_weak_explicit ( +++ &pt[i], &tag, 0, memory_order_acquire, memory_order_acquire); +++ if (!res) +++ { +++ unsigned int val; +++ +++ val = atomic_load_explicit (&pv[i], memory_order_relaxed); +++ if (val < tag) +++ __builtin_trap (); +++ } +++ } +++ } +++ +++ return NULL; +++} +++ +++int +++main (int argc, char *argv[]) +++{ +++ pthread_t writer; +++ pthread_t reader; +++ int res; +++ +++ res = pthread_create (&writer, NULL, writer_entry, NULL); +++ if (res < 0) +++ __builtin_trap (); +++ +++ res = pthread_create (&reader, NULL, reader_entry, NULL); +++ if (res < 0) +++ __builtin_trap (); +++ +++ res = pthread_join (writer, NULL); +++ if (res < 0) +++ __builtin_trap (); +++ +++ return 0; +++} ++--- a/src/gcc/testsuite/gcc.target/powerpc/clone1.c +++++ b/src/gcc/testsuite/gcc.target/powerpc/clone1.c ++@@ -21,6 +21,7 @@ long mod_func_or (long a, long b, long c) ++ return mod_func (a, b) | c; ++ } ++ ++-/* { dg-final { scan-assembler-times {\mdivd\M} 1 } } */ ++-/* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */ ++-/* { dg-final { scan-assembler-times {\mmodsd\M} 1 } } */ +++/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +++/* { dg-final { scan-assembler-times {\mdivd\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {\mmulld\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {\mmodsd\M} 1 { xfail *-*-* } } } */ ++--- a/src/gcc/testsuite/gcc.target/powerpc/clone3.c +++++ b/src/gcc/testsuite/gcc.target/powerpc/clone3.c ++@@ -27,7 +27,8 @@ long mod_func_or (long a, long b, long c) ++ return mod_func (a, b) | c; ++ } ++ ++-/* { dg-final { scan-assembler-times {\mdivd\M} 1 } } */ ++-/* { dg-final { scan-assembler-times {\mmulld\M} 1 } } */ ++-/* { dg-final { scan-assembler-times {\mmodsd\M} 2 } } */ +++/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +++/* { dg-final { scan-assembler-times {\mdivd\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {\mmulld\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {\mmodsd\M} 2 { xfail *-*-* } } } */ ++ /* { dg-final { scan-assembler-times {\mpld\M} 1 } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c ++@@ -0,0 +1,23 @@ +++/* { dg-do compile { target powerpc*-*-darwin* } } */ +++/* { dg-require-effective-target ilp32 } */ +++/* { dg-options "-Wno-long-long" } */ +++ +++#include "darwin-structs-0.h" +++ +++int tcd[sizeof(cd) != 12 ? -1 : 1]; +++int acd[__alignof__(cd) != 4 ? -1 : 1]; +++ +++int sdc[sizeof(dc) != 16 ? -1 : 1]; +++int adc[__alignof__(dc) != 8 ? -1 : 1]; +++ +++int scL[sizeof(cL) != 12 ? -1 : 1]; +++int acL[__alignof__(cL) != 4 ? -1 : 1]; +++ +++int sLc[sizeof(Lc) != 16 ? -1 : 1]; +++int aLc[__alignof__(Lc) != 8 ? -1 : 1]; +++ +++int scD[sizeof(cD) != 32 ? -1 : 1]; +++int acD[__alignof__(cD) != 16 ? -1 : 1]; +++ +++int sDc[sizeof(Dc) != 32 ? -1 : 1]; +++int aDc[__alignof__(Dc) != 16 ? -1 : 1]; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c ++@@ -0,0 +1,27 @@ +++/* { dg-do compile { target powerpc*-*-darwin* } } */ +++/* { dg-require-effective-target ilp32 } */ +++/* { dg-options "-Wno-long-long" } */ +++ +++#pragma pack(push, 1) +++ +++#include "darwin-structs-0.h" +++ +++int tcd[sizeof(cd) != 9 ? -1 : 1]; +++int acd[__alignof__(cd) != 1 ? -1 : 1]; +++ +++int sdc[sizeof(dc) != 9 ? -1 : 1]; +++int adc[__alignof__(dc) != 1 ? -1 : 1]; +++ +++int scL[sizeof(cL) != 9 ? -1 : 1]; +++int acL[__alignof__(cL) != 1 ? -1 : 1]; +++ +++int sLc[sizeof(Lc) != 9 ? -1 : 1]; +++int aLc[__alignof__(Lc) != 1 ? -1 : 1]; +++ +++int scD[sizeof(cD) != 17 ? -1 : 1]; +++int acD[__alignof__(cD) != 1 ? -1 : 1]; +++ +++int sDc[sizeof(Dc) != 17 ? -1 : 1]; +++int aDc[__alignof__(Dc) != 1 ? -1 : 1]; +++ +++#pragma pack(pop) ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c ++@@ -0,0 +1,27 @@ +++/* { dg-do compile { target powerpc*-*-darwin* } } */ +++/* { dg-require-effective-target ilp32 } */ +++/* { dg-options "-Wno-long-long" } */ +++ +++#pragma pack(push, 2) +++ +++#include "darwin-structs-0.h" +++ +++int tcd[sizeof(cd) != 10 ? -1 : 1]; +++int acd[__alignof__(cd) != 2 ? -1 : 1]; +++ +++int sdc[sizeof(dc) != 10 ? -1 : 1]; +++int adc[__alignof__(dc) != 2 ? -1 : 1]; +++ +++int scL[sizeof(cL) != 10 ? -1 : 1]; +++int acL[__alignof__(cL) != 2 ? -1 : 1]; +++ +++int sLc[sizeof(Lc) != 10 ? -1 : 1]; +++int aLc[__alignof__(Lc) != 2 ? -1 : 1]; +++ +++int scD[sizeof(cD) != 18 ? -1 : 1]; +++int acD[__alignof__(cD) != 2 ? -1 : 1]; +++ +++int sDc[sizeof(Dc) != 18 ? -1 : 1]; +++int aDc[__alignof__(Dc) != 2 ? -1 : 1]; +++ +++#pragma pack(pop) ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/darwin-structs-0.h ++@@ -0,0 +1,29 @@ +++typedef struct _cd { +++ char c; +++ double d; +++} cd; +++ +++typedef struct _dc { +++ double d; +++ char c; +++} dc; +++ +++typedef struct _cL { +++ char c; +++ long long L; +++} cL; +++ +++typedef struct _Lc { +++ long long L; +++ char c; +++} Lc; +++ +++typedef struct _cD { +++ char c; +++ long double D; +++} cD; +++ +++typedef struct _Dc { +++ long double D; +++ char c; +++} Dc; ++--- a/src/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c +++++ b/src/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c ++@@ -54,15 +54,17 @@ TEST(uint8_t) ++ TEST(int8_t) ++ ++ /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 4 { target lp64 } } } */ ++-/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 4 { target lp64 } } } */ ++-/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 4 { target lp64 } } } */ ++-/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 1 { target lp64 } } } */ ++-/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 1 { target lp64 } } } */ +++/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_DI_CC_none" 24 { target lp64 } } } */ +++/* { dg-final { scan-assembler-times "ld_cmpdi_cr0_DI_clobber_CC_none" 8 { target lp64 } } } */ +++/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_DI_CCUNS_none" 2 { target lp64 } } } */ +++/* { dg-final { scan-assembler-times "ld_cmpldi_cr0_DI_clobber_CCUNS_none" 2 { target lp64 } } } */ ++ /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 16 { target lp64 } } } */ ++ /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 4 { target lp64 } } } */ ++ /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target lp64 } } } */ ++-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 4 { target lp64 } } } */ +++/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 8 { target lp64 } } } */ +++/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_SI_CC_none" 8 { target lp64 } } } */ ++ /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target lp64 } } } */ +++/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target lp64 } } } */ ++ /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 2 { target lp64 } } } */ ++ ++ /* { dg-final { scan-assembler-times "lbz_cmpldi_cr0_QI_clobber_CCUNS_zero" 2 { target ilp32 } } } */ ++@@ -73,6 +75,8 @@ TEST(int8_t) ++ /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign" 8 { target ilp32 } } } */ ++ /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero" 2 { target ilp32 } } } */ ++ /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign" 0 { target ilp32 } } } */ ++-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none" 9 { target ilp32 } } } */ +++/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_SI_CC_none" 36 { target ilp32 } } } */ +++/* { dg-final { scan-assembler-times "lwz_cmpwi_cr0_SI_clobber_CC_none" 16 { target ilp32 } } } */ ++ /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero" 0 { target ilp32 } } } */ ++ /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none" 6 { target ilp32 } } } */ +++/* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_SI_CCUNS_none" 2 { target ilp32 } } } */ ++--- a/src/gcc/testsuite/gcc.target/powerpc/mod-1.c +++++ b/src/gcc/testsuite/gcc.target/powerpc/mod-1.c ++@@ -7,13 +7,14 @@ long lsmod (long a, long b) { return a%b; } ++ unsigned int iumod (unsigned int a, unsigned int b) { return a%b; } ++ unsigned long lumod (unsigned long a, unsigned long b) { return a%b; } ++ ++-/* { dg-final { scan-assembler-times "modsw " 1 } } */ ++-/* { dg-final { scan-assembler-times "modsd " 1 } } */ ++-/* { dg-final { scan-assembler-times "moduw " 1 } } */ ++-/* { dg-final { scan-assembler-times "modud " 1 } } */ ++-/* { dg-final { scan-assembler-not "mullw " } } */ ++-/* { dg-final { scan-assembler-not "mulld " } } */ ++-/* { dg-final { scan-assembler-not "divw " } } */ ++-/* { dg-final { scan-assembler-not "divd " } } */ ++-/* { dg-final { scan-assembler-not "divwu " } } */ ++-/* { dg-final { scan-assembler-not "divdu " } } */ +++/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +++/* { dg-final { scan-assembler-times {\mmodsw\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {\mmodsd\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {\mmoduw\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {\mmodud\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-not {\mmullw\M} { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-not {\mmulld\M} { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-not {\mdivw\M} { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-not {\mdivd\M} { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-not {\mdivwu\M} { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-not {\mdivdu\M} { xfail *-*-* } } } */ ++--- a/src/gcc/testsuite/gcc.target/powerpc/mod-2.c +++++ b/src/gcc/testsuite/gcc.target/powerpc/mod-2.c ++@@ -5,8 +5,9 @@ ++ int ismod (int a, int b) { return a%b; } ++ unsigned int iumod (unsigned int a, unsigned int b) { return a%b; } ++ ++-/* { dg-final { scan-assembler-times "modsw " 1 } } */ ++-/* { dg-final { scan-assembler-times "moduw " 1 } } */ ++-/* { dg-final { scan-assembler-not "mullw " } } */ ++-/* { dg-final { scan-assembler-not "divw " } } */ ++-/* { dg-final { scan-assembler-not "divwu " } } */ +++/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +++/* { dg-final { scan-assembler-times {\mmodsw\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-times {\mmoduw\M} 1 { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-not {\mmullw\M} { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-not {\mdivw\M} { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler-not {\mdivwu\M} { xfail *-*-* } } } */ ++--- a/src/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c +++++ b/src/gcc/testsuite/gcc.target/powerpc/p10-vdivq-vmodq.c ++@@ -23,5 +23,6 @@ __int128 s_mod(__int128 a, __int128 b) ++ ++ /* { dg-final { scan-assembler {\mvdivsq\M} } } */ ++ /* { dg-final { scan-assembler {\mvdivuq\M} } } */ ++-/* { dg-final { scan-assembler {\mvmodsq\M} } } */ ++-/* { dg-final { scan-assembler {\mvmoduq\M} } } */ +++/* { Fail due to RS6000_DISABLE_SCALAR_MODULO. */ +++/* { dg-final { scan-assembler {\mvmodsq\M} { xfail *-*-* } } } */ +++/* { dg-final { scan-assembler {\mvmoduq\M} { xfail *-*-* } } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr109069-1.c ++@@ -0,0 +1,25 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target vmx_hw } */ +++/* { dg-options "-O2 -maltivec" } */ +++ +++/* Verify it run successfully. */ +++ +++#include +++ +++__attribute__ ((noipa)) +++vector signed int +++test () +++{ +++ vector signed int v = {-16, -16, -16, -16}; +++ vector signed int res = vec_sld (v, v, 3); +++ return res; +++} +++ +++int +++main () +++{ +++ vector signed int res = test (); +++ if (res[0] != 0xf0ffffff) +++ __builtin_abort (); +++ return 0; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c ++@@ -0,0 +1,50 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target vsx_hw } */ +++/* { dg-options "-O2 -mvsx" } */ +++ +++/* Verify it doesn't generate wrong code. */ +++ +++#include "pr109069-2.h" +++ +++int +++main () +++{ +++ vector unsigned char res1 = test1 (); +++ for (int i = 0; i < 16; i++) +++ if (res1[i] != 0xd) +++ __builtin_abort (); +++ +++ vector signed short res2 = test2 (); +++ for (int i = 0; i < 8; i++) +++ if (res2[i] != 0x7777) +++ __builtin_abort (); +++ +++ vector signed int res3 = test3 (); +++ vector unsigned int res4 = test4 (); +++ vector float res6 = test6 (); +++ for (int i = 0; i < 4; i++) +++ { +++ if (res3[i] != 0xbbbbbbbb) +++ __builtin_abort (); +++ if (res4[i] != 0x7070707) +++ __builtin_abort (); +++ U32b u; +++ u.f = res6[i]; +++ if (u.i != 0x17171717) +++ __builtin_abort (); +++ } +++ +++ vector unsigned long long res5 = test5 (); +++ vector double res7 = test7 (); +++ for (int i = 0; i < 2; i++) +++ { +++ if (res5[i] != 0x4545454545454545ll) +++ __builtin_abort (); +++ U64b u; +++ u.f = res7[i]; +++ if (u.i != 0x5454545454545454ll) +++ __builtin_abort (); +++ } +++ return 0; +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr109069-2.c ++@@ -0,0 +1,12 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target powerpc_vsx_ok } */ +++/* Disable rs6000 optimize_swaps as it drops some REG_EQUAL +++ notes on const vector and affects test point here. */ +++/* { dg-options "-O2 -mvsx -mno-optimize-swaps" } */ +++ +++/* Verify we can optimize away vector shifting if every byte +++ of vector is the same. */ +++ +++#include "pr109069-2.h" +++ +++/* { dg-final { scan-assembler-not {\mvsldoi\M} } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr109069-2.h ++@@ -0,0 +1,83 @@ +++#include +++ +++typedef union +++{ +++ unsigned int i; +++ float f; +++} U32b; +++ +++typedef union +++{ +++ unsigned long long i; +++ double f; +++} U64b; +++ +++__attribute__ ((noipa)) +++vector unsigned char +++test1 () +++{ +++ vector unsigned char v = {0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd, +++ 0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd, 0xd}; +++ vector unsigned char res = vec_sld (v, v, 3); +++ return res; +++} +++ +++__attribute__ ((noipa)) +++vector signed short +++test2 () +++{ +++ vector signed short v +++ = {0x7777, 0x7777, 0x7777, 0x7777, 0x7777, 0x7777, 0x7777, 0x7777}; +++ vector signed short res = vec_sld (v, v, 5); +++ return res; +++} +++ +++__attribute__ ((noipa)) +++vector signed int +++test3 () +++{ +++ vector signed int v = {0xbbbbbbbb, 0xbbbbbbbb, 0xbbbbbbbb, 0xbbbbbbbb}; +++ vector signed int res = vec_sld (v, v, 7); +++ return res; +++} +++ +++__attribute__ ((noipa)) +++vector unsigned int +++test4 () +++{ +++ vector unsigned int v = {0x07070707, 0x07070707, 0x07070707, 0x07070707}; +++ vector unsigned int res = vec_sld (v, v, 9); +++ return res; +++} +++ +++__attribute__ ((noipa)) +++vector unsigned long long +++test5 () +++{ +++ vector unsigned long long v = {0x4545454545454545ll, 0x4545454545454545ll}; +++ vector unsigned long long res = vec_sld (v, v, 10); +++ return res; +++} +++ +++__attribute__ ((noipa)) +++vector float +++test6 () +++{ +++ U32b u; +++ u.i = 0x17171717; +++ vector float vf = {u.f, u.f, u.f, u.f}; +++ vector float res = vec_sld (vf, vf, 11); +++ return res; +++} +++ +++__attribute__ ((noipa)) +++vector double +++test7 () +++{ +++ U64b u; +++ u.i = 0x5454545454545454ll; +++ vector double vf = {u.f, u.f}; +++ vector double res = vec_sld (vf, vf, 13); +++ return res; +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr109932-1.c ++@@ -0,0 +1,17 @@ +++/* { dg-require-effective-target int128 } */ +++/* { dg-require-effective-target powerpc_altivec_ok } */ +++/* { dg-options "-maltivec -mno-vsx" } */ +++ +++/* Verify there is no ICE but one expected error message instead. */ +++ +++#include +++ +++extern vector signed __int128 res_vslll; +++extern unsigned long long aull[2]; +++ +++void +++testVectorInt128Pack () +++{ +++ res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr109932-2.c ++@@ -0,0 +1,17 @@ +++/* { dg-require-effective-target int128 } */ +++/* { dg-require-effective-target powerpc_altivec_ok } */ +++/* { dg-options "-maltivec -mno-vsx" } */ +++ +++/* Verify there is no ICE but one expected error message instead. */ +++ +++#include +++ +++extern vector signed __int128 res_vslll; +++extern unsigned long long aull[2]; +++ +++void +++testVectorInt128Pack () +++{ +++ res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr110011.c ++@@ -0,0 +1,42 @@ +++/* { dg-do run } */ +++/* { dg-require-effective-target float128_runtime } */ +++/* Force long double to be with IBM format here, to verify +++ _Float128 constant still uses its own format (IEEE) for +++ encoding rather than IBM format. */ +++/* { dg-options "-mfp-in-toc -mabi=ibmlongdouble" } */ +++/* { dg-add-options float128 } */ +++ +++#define MPFR_FLOAT128_MAX 0x1.ffffffffffffffffffffffffffffp+16383f128 +++ +++__attribute__ ((noipa)) +++_Float128 f128_max () +++{ +++ return MPFR_FLOAT128_MAX; +++} +++ +++typedef union +++{ +++ int w[4]; +++ _Float128 f128; +++} U; +++ +++int main () +++{ +++ +++ U umax; +++ umax.f128 = f128_max (); +++ /* ieee float128 max: +++ 7ffeffff ffffffff ffffffff ffffffff. */ +++ if (umax.w[1] != 0xffffffff || umax.w[2] != 0xffffffff) +++ __builtin_abort (); +++#ifdef __LITTLE_ENDIAN__ +++ if (umax.w[0] != 0xffffffff || umax.w[3] != 0x7ffeffff) +++ __builtin_abort (); +++#else +++ if (umax.w[3] != 0xffffffff || umax.w[0] != 0x7ffeffff) +++ __builtin_abort (); +++#endif +++ +++ return 0; +++} +++ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr111380-1.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target vect_int } */ +++/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ +++ +++/* Verify it emits error message on inlining even without LTO. */ +++ +++vector int c, a, b; +++ +++static inline void __attribute__ ((__always_inline__)) +++foo () /* { dg-error "inlining failed in call to .* target specific option mismatch" } */ +++{ +++ c = a + b; +++} +++ +++__attribute__ ((target ("cpu=power8"))) +++int main () +++{ +++ foo (); /* { dg-message "called from here" } */ +++ c = a + b; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr111380-2.c ++@@ -0,0 +1,20 @@ +++/* { dg-do compile } */ +++/* { dg-require-effective-target vect_int } */ +++/* { dg-options "-O2 -mno-vsx" } */ +++ +++/* Verify it emits error message on inlining even without LTO. */ +++ +++vector int c, a, b; +++ +++static inline void __attribute__ ((__always_inline__)) +++foo () /* { dg-error "inlining failed in call to .* target specific option mismatch" } */ +++{ +++ c = a + b; +++} +++ +++__attribute__ ((target ("vsx"))) +++int main () +++{ +++ foo (); /* { dg-message "called from here" } */ +++ c = a + b; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr70243.c ++@@ -0,0 +1,41 @@ +++/* { dg-do compile */ +++/* { dg-require-effective-target powerpc_vsx_ok } */ +++/* { dg-options "-O2 -mvsx" } */ +++ +++/* PR 70423, Make sure we don't generate vmaddfp or vnmsubfp. These +++ instructions have different rounding modes than the VSX instructions +++ xvmaddsp and xvnmsubsp. These tests are written where the 3 inputs and +++ target are all separate registers. Because vmaddfp and vnmsubfp are no +++ longer generated the compiler will have to generate an xsmaddsp or xsnmsubsp +++ instruction followed by a move operation. */ +++ +++#include +++ +++vector float +++do_add1 (vector float dummy, vector float a, vector float b, vector float c) +++{ +++ return (a * b) + c; +++} +++ +++vector float +++do_nsub1 (vector float dummy, vector float a, vector float b, vector float c) +++{ +++ return -((a * b) - c); +++} +++ +++vector float +++do_add2 (vector float dummy, vector float a, vector float b, vector float c) +++{ +++ return vec_madd (a, b, c); +++} +++ +++vector float +++do_nsub2 (vector float dummy, vector float a, vector float b, vector float c) +++{ +++ return vec_nmsub (a, b, c); +++} +++ +++/* { dg-final { scan-assembler {\mxvmadd[am]sp\M} } } */ +++/* { dg-final { scan-assembler {\mxvnmsub[am]sp\M} } } */ +++/* { dg-final { scan-assembler-not {\mvmaddfp\M} } } */ +++/* { dg-final { scan-assembler-not {\mvnmsubfp\M} } } */ ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gcc.target/powerpc/pr96762.c ++@@ -0,0 +1,13 @@ +++/* { dg-do compile } */ +++/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ +++ +++/* Verify there is no ICE on ilp32 env. */ +++ +++extern void foo (char *); +++ +++void +++bar (void) +++{ +++ char zj[] = "XXXXXXXXXXXXXXXX"; +++ foo (zj); +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/pr108842.d ++@@ -0,0 +1,4 @@ +++// { dg-do compile } +++// { dg-options "-fno-rtti" } +++module object; +++enum int[] x = [0, 1, 2]; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/pr110359.d ++@@ -0,0 +1,22 @@ +++// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110359 +++// { dg-do compile } +++// { dg-options "-fdump-tree-original" } +++double pow(in double x, in ulong p) +++{ +++ import gcc.builtins : __builtin_expect; +++ if (__builtin_expect(p == 0, false)) +++ return 1; +++ if (__builtin_expect(p == 1, false)) +++ return x; +++ +++ double s = x; +++ double v = 1; +++ for (ulong i = p; i > 1; i >>= 1) +++ { +++ v = (i & 0x1) ? s * v : v; +++ s = s * s; +++ } +++ return v * s; +++} +++// { dg-final { scan-tree-dump "if \\(__builtin_expect \\(p == 0, 0\\) != 0\\)" "original" } } +++// { dg-final { scan-tree-dump "if \\(__builtin_expect \\(p == 1, 0\\) != 0\\)" "original" } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/pr110514a.d ++@@ -0,0 +1,9 @@ +++// { dg-do "compile" } +++// { dg-options "-O -fdump-tree-optimized" } +++immutable uint[] imm_arr = [1,2,3]; +++int test_imm(immutable uint[] ptr) +++{ +++ return imm_arr[2] == 3 ? 123 : 456; +++} +++// { dg-final { scan-assembler-not "_d_arraybounds_indexp" } } +++// { dg-final { scan-tree-dump "return 123;" optimized } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/pr110514b.d ++@@ -0,0 +1,8 @@ +++// { dg-do "compile" } +++// { dg-options "-O" } +++immutable uint[] imm_ctor_arr; +++int test_imm_ctor(immutable uint[] ptr) +++{ +++ return imm_ctor_arr[2] == 3; +++} +++// { dg-final { scan-assembler "_d_arraybounds_indexp" } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/pr110514c.d ++@@ -0,0 +1,8 @@ +++// { dg-do "compile" } +++// { dg-options "-O" } +++const uint[] cst_arr = [1,2,3]; +++int test_cst(const uint[] ptr) +++{ +++ return cst_arr[2] == 3; +++} +++// { dg-final { scan-assembler "_d_arraybounds_indexp" } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/pr110514d.d ++@@ -0,0 +1,8 @@ +++// { dg-do "compile" } +++// { dg-options "-O" } +++const uint[] cst_ctor_arr; +++int test_cst_ctor(const uint[] ptr) +++{ +++ return cst_ctor_arr[2] == 3; +++} +++// { dg-final { scan-assembler "_d_arraybounds_indexp" } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/pr110712.d ++@@ -0,0 +1,23 @@ +++// { dg-do compile { target { { i?86-*-* x86_64-*-* } && lp64 } } } +++import gcc.builtins : va_list = __builtin_va_list; +++ +++void argpass(va_list *ap); +++ +++void pr110712a(va_list ap) +++{ +++ argpass(&ap); // { dg-error "cannot convert parameter" } +++} +++ +++void pr110712b(va_list ap) +++{ +++ va_list ap2 = ap; // { dg-error "cannot convert parameter" } +++} +++ +++struct pr110712c +++{ +++ this(va_list ap) +++ { +++ this.ap = ap; // { dg-error "cannot convert parameter" } +++ } +++ va_list ap; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/pr110959.d ++@@ -0,0 +1,32 @@ +++// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110959 +++// { dg-do compile } +++class ArsdExceptionBase : object.Exception { +++ this(string operation, string file = __FILE__, size_t line = __LINE__, Throwable next = null) { +++ super(operation, file, line, next); +++ } +++} +++ +++template ArsdException(alias Type, DataTuple...) { +++ static if(DataTuple.length) +++ alias Parent = ArsdException!(Type, DataTuple[0 .. $-1]); +++ else +++ alias Parent = ArsdExceptionBase; +++ +++ class ArsdException : Parent { +++ DataTuple data; +++ +++ this(DataTuple data, string file = __FILE__, size_t line = __LINE__) { +++ this.data = data; +++ static if(is(Parent == ArsdExceptionBase)) +++ super(null, file, line); +++ else +++ super(data[0 .. $-1], file, line); +++ } +++ +++ static opCall(R...)(R r, string file = __FILE__, size_t line = __LINE__) { +++ return new ArsdException!(Type, DataTuple, R)(r, file, line); +++ } +++ } +++} +++ +++__gshared pr110959 = ArsdException!"Test"(4, "four"); ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/pr112270.d ++@@ -0,0 +1,7 @@ +++// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112270 +++// { dg-do compile } +++class CPPNamespaceDeclaration { } +++bool isNamespaceEqual (CPPNamespaceDeclaration a) +++{ +++ return a ? true : isNamespaceEqual(a); +++} ++--- a/src/gcc/testsuite/gdc.dg/pr98277.d +++++ b/src/gcc/testsuite/gdc.dg/pr98277.d ++@@ -11,3 +11,14 @@ ref int getSide(Side side, return ref int left, return ref int right) ++ { ++ return side == Side.left ? left : right; ++ } +++ +++enum SideA : int[] +++{ +++ left = [0], +++ right = [1], +++} +++ +++int getSideA(SideA side, ref int left, ref int right) +++{ +++ return side == SideA.left ? left : right; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/torture/pr110516a.d ++@@ -0,0 +1,12 @@ +++// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110516 +++// { dg-do compile } +++// { dg-options "-fno-moduleinfo -fdump-tree-optimized" } +++void fn110516(ubyte* ptr) +++{ +++ import core.volatile : volatileLoad; +++ volatileLoad(ptr); +++ volatileLoad(ptr); +++ volatileLoad(ptr); +++ volatileLoad(ptr); +++} +++// { dg-final { scan-tree-dump-times " ={v} " 4 "optimized" } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.dg/torture/pr110516b.d ++@@ -0,0 +1,12 @@ +++// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110516 +++// { dg-do compile } +++// { dg-options "-fno-moduleinfo -fdump-tree-optimized" } +++void fn110516(ubyte* ptr) +++{ +++ import core.volatile : volatileStore; +++ volatileStore(ptr, 0); +++ volatileStore(ptr, 0); +++ volatileStore(ptr, 0); +++ volatileStore(ptr, 0); +++} +++// { dg-final { scan-tree-dump-times " ={v} " 4 "optimized" } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.test/compilable/test23978.d ++@@ -0,0 +1,30 @@ +++// REQUIRED_ARGS: -preview=dip1021 -lowmem +++// https://issues.dlang.org/show_bug.cgi?id=23978 +++ +++// Note: this is a memory corruption bug. +++// Memory returned by `GC.realloc` retains references to old memory in it, +++// mostly because of the smallarray optimization for `Array(T)`. +++// If this fails again, it might not be consistent, so try running it multiple times. +++ +++class LUBench { } +++void lup(ulong , ulong , int , int = 1) +++{ +++ new LUBench; +++} +++void lup_3200(ulong iters, ulong flops) +++{ +++ lup(iters, flops, 3200); +++} +++void raytrace() +++{ +++ struct V +++ { +++ float x, y, z; +++ auto normalize() { } +++ struct Tid { } +++ auto spawnLinked() { } +++ string[] namesByTid; +++ class MessageBox { } +++ auto cross() { } +++ } +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gdc.test/runnable/test23010.d ++@@ -0,0 +1,43 @@ +++// https://issues.dlang.org/show_bug.cgi?id=23010 +++ +++alias AliasSeq(T...) = T; +++ +++mixin template faz() { +++ alias T = AliasSeq!(int); +++ T bar = 12345; +++ +++ void write1() { +++ assert(bar[0] == 12345); +++ } +++ +++ AliasSeq!(string, float) foo = AliasSeq!("qwerty", 1.25f); +++ +++ void write2() { +++ assert(foo == AliasSeq!("qwerty", 1.25f)); +++ foo = AliasSeq!("asdfg", 2.5f); // this even crashed before +++ assert(foo == AliasSeq!("asdfg", 2.5f)); +++ } +++} +++ +++void main() { +++ mixin faz!(); +++ write1; +++ write2; +++ fun; +++} +++ +++// Testing static symbol generation ('toobj.d' changes) +++ +++static AliasSeq!(int, string) tup; +++ +++void fun() +++{ +++ auto v = tup; +++ +++ struct S(T...) { +++ static T b; +++ } +++ +++ alias T = S!(int, float); +++ auto p = T.b; +++} ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gfortran.dg/deferred_character_37.f90 ++@@ -0,0 +1,88 @@ +++! { dg-do run } +++! PR fortran/95947 +++! PR fortran/110658 +++! +++! Test deferred-length character arguments to selected intrinsics +++! that may return a character result of same length as first argument: +++! CSHIFT, EOSHIFT, MAXVAL, MERGE, MINVAL, PACK, SPREAD, TRANSPOSE, UNPACK +++ +++program p +++ implicit none +++ call pr95947 () +++ call pr110658 () +++ call s () +++ +++contains +++ +++ subroutine pr95947 +++ character(len=:), allocatable :: m(:) +++ +++ m = [ character(len=10) :: 'ape','bat','cat','dog','eel','fly','gnu'] +++ m = pack (m, mask=(m(:)(2:2) == 'a')) +++ +++! print *, "m = '", m,"' ", "; expected is ['bat','cat']" +++ if (.not. all (m == ['bat','cat'])) stop 1 +++ +++! print *, "size(m) = ", size(m), "; expected is 2" +++ if (size (m) /= 2) stop 2 +++ +++! print *, "len(m) = ", len(m), "; expected is 10" +++ if (len (m) /= 10) stop 3 +++ +++! print *, "len_trim(m) = ", len_trim(m), "; expected is 3 3" +++ if (.not. all (len_trim(m) == [3,3])) stop 4 +++ end +++ +++ subroutine pr110658 +++ character(len=:), allocatable :: array(:), array2(:,:) +++ character(len=:), allocatable :: res, res1(:), res2(:) +++ +++ array = ["bb", "aa", "cc"] +++ +++ res = minval (array) +++ if (res /= "aa") stop 11 +++ +++ res = maxval (array, mask=[.true.,.true.,.false.]) +++ if (res /= "bb") stop 12 +++ +++ res1 = cshift (array, 1) +++ if (any (res1 /= ["aa","cc","bb"])) stop 13 +++ +++ res2 = eoshift (res1, -1) +++ if (any (res2 /= [" ", "aa", "cc"])) stop 14 +++ +++ res2 = pack (array, mask=[.true.,.false.,.true.]) +++ if (any (res2 /= ["bb","cc"])) stop 15 +++ +++ res2 = unpack (res2, mask=[.true.,.false.,.true.], field="aa") +++ if (any (res2 /= array)) stop 16 +++ +++ res2 = merge (res2, array, [.true.,.false.,.true.]) +++ if (any (res2 /= array)) stop 17 +++ +++ array2 = spread (array, dim=2, ncopies=2) +++ array2 = transpose (array2) +++ if (any (shape (array2) /= [2,3])) stop 18 +++ if (any (array2(2,:) /= array)) stop 19 +++ end +++ +++ subroutine s +++ character(:), allocatable :: array1(:), array2(:) +++ array1 = ["aa","cc","bb"] +++ array2 = copy (array1) +++ if (any (array1 /= array2)) stop 20 +++ end +++ +++ function copy (arg) result (res) +++ character(:), allocatable :: res(:) +++ character(*), intent(in) :: arg(:) +++ integer :: i, k, n +++ k = len (arg) +++ n = size (arg) +++ allocate (character(k) :: res(n)) +++ do i = 1, n +++ res(i) = arg(i) +++ end do +++ end +++ +++end ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gfortran.dg/findloc_10.f90 ++@@ -0,0 +1,13 @@ +++! { dg-do run } +++! { dg-options "-fdump-tree-original" } +++! PR fortran/110288 - FINDLOC and deferred-length character arguments +++ +++program test +++ character(len=:), allocatable :: array(:) +++ character(len=:), allocatable :: value +++ array = ["bb", "aa"] +++ value = "aa" +++ if (findloc (array, value, dim=1) /= 2) stop 1 +++end program test +++ +++! { dg-final { scan-tree-dump "_gfortran_findloc2_s1 \\(.*, \\.array, \\.value\\)" "original" } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gfortran.dg/findloc_9.f90 ++@@ -0,0 +1,19 @@ +++! { dg-do compile } +++! { dg-options "-fdump-tree-original" } +++! PR fortran/110585 - simplification of FINDLOC for constant complex arguments +++ +++program mvce +++ implicit none +++ integer, parameter :: a(*) = findloc([(1.,0.),(2.,1.)], (2.,0.)) +++ integer, parameter :: b(*) = findloc([(1.,0.),(2.,1.)], (2.,0.), back=.true.) +++ integer, parameter :: c(*) = findloc([(1.,0.),(2.,1.)], (2.,1.)) +++ integer, parameter :: d(*) = findloc([(1.,0.),(2.,1.)], (2.,1.), back=.true.) +++ integer, parameter :: e = findloc([(1.,0.),(2.,1.)], (2.,1.), dim=1) +++ if (a(1) /= 0) stop 1 +++ if (b(1) /= 0) stop 2 +++ if (c(1) /= 2) stop 3 +++ if (d(1) /= 2) stop 4 +++ if (e /= 2) stop 5 +++end +++ +++! { dg-final { scan-tree-dump-not "_gfortran_stop_numeric" "original" } } ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gfortran.dg/implied_do_io_8.f90 ++@@ -0,0 +1,18 @@ +++! { dg-do run } +++! { dg-additional-options "-fcheck=bounds" } +++! PR fortran/111837 - out of bounds access with front-end optimization +++ +++program implied_do_bug +++ implicit none +++ integer :: i,j,k +++ real :: arr(1,1,1) +++ integer :: ni(1) +++ ni(1) = 1 +++ arr = 1 +++ write(*,*) (((arr(i,j,k), i=1,ni(k)), k=1,1), j=1,1) +++ write(*,*) (((arr(i,j,k), i=1,ni(k)), j=1,1), k=1,1) +++ write(*,*) (((arr(k,i,j), i=1,ni(k)), k=1,1), j=1,1) +++ write(*,*) (((arr(k,i,j), i=1,ni(k)), j=1,1), k=1,1) +++ write(*,*) (((arr(j,k,i), i=1,ni(k)), k=1,1), j=1,1) +++ write(*,*) (((arr(j,k,i), i=1,ni(k)), j=1,1), k=1,1) +++end ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gfortran.dg/pr107397.f90 ++@@ -0,0 +1,9 @@ +++!{ dg-do compile } +++! +++program p +++ type t +++ real :: a = 1.0 +++ end type +++ type(t), parameter :: x = z'1' ! { dg-error "incompatible with a BOZ" } +++ x%a = x%a + 2 ! { dg-error "has no IMPLICIT type" } +++end ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gfortran.dg/pr111880.f90 ++@@ -0,0 +1,22 @@ +++! { dg-do compile } +++! { dg-options "-std=f2018" } +++! PR fortran/111880 - redundant warning of obsolescent COMMON with submodule +++ +++module third_party_module +++ integer :: some_param +++ common /not_my_code/ some_param ! { dg-warning "COMMON block" } +++end module third_party_module +++ +++module foo +++ use third_party_module +++ interface +++ module subroutine bar() +++ end subroutine bar +++ end interface +++end module foo +++ +++submodule (foo) foo_submod ! We do not need a warning here! +++contains +++ module procedure bar +++ end procedure bar +++end submodule foo_submod ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gfortran.dg/ptr-func-5.f90 ++@@ -0,0 +1,39 @@ +++! { dg-do compile } +++! PR fortran/109846 +++! CLASS pointer function result in variable definition context +++ +++module foo +++ implicit none +++ type :: parameter_list +++ contains +++ procedure :: sublist, sublist_nores +++ end type +++contains +++ function sublist (this) result (slist) +++ class(parameter_list), intent(inout) :: this +++ class(parameter_list), pointer :: slist +++ allocate (slist) +++ end function +++ function sublist_nores (this) +++ class(parameter_list), intent(inout) :: this +++ class(parameter_list), pointer :: sublist_nores +++ allocate (sublist_nores) +++ end function +++end module +++ +++program example +++ use foo +++ implicit none +++ type(parameter_list) :: plist +++ call sub1 (plist%sublist()) +++ call sub1 (plist%sublist_nores()) +++ call sub2 (plist%sublist()) +++ call sub2 (plist%sublist_nores()) +++contains +++ subroutine sub1 (plist) +++ type(parameter_list), intent(inout) :: plist +++ end subroutine +++ subroutine sub2 (plist) +++ type(parameter_list) :: plist +++ end subroutine +++end program ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gfortran.dg/select_rank_6.f90 ++@@ -0,0 +1,48 @@ +++! { dg-do compile } +++! PR fortran/100607 - fix diagnostics for SELECT RANK +++! Contributed by T.Burnus +++ +++program p +++ implicit none +++ integer, allocatable :: A(:,:,:) +++ +++ allocate(a(5:6,-2:2, 99:100)) +++ call foo(a) +++ call bar(a) +++ +++contains +++ +++ subroutine foo(x) +++ integer, allocatable :: x(..) +++ if (rank(x) /= 3) stop 1 +++ if (any (lbound(x) /= [5, -2, 99])) stop 2 +++ +++ select rank (x) +++ rank(3) +++ if (any (lbound(x) /= [5, -2, 99])) stop 3 +++ end select +++ +++ select rank (x) ! { dg-error "pointer or allocatable selector at .2." } +++ rank(*) ! { dg-error "pointer or allocatable selector at .2." } +++ if (rank(x) /= 1) stop 4 +++ if (lbound(x, 1) /= 1) stop 5 +++ end select +++ end +++ +++ subroutine bar(x) +++ integer :: x(..) +++ if (rank(x) /= 3) stop 6 +++ if (any (lbound(x) /= 1)) stop 7 +++ +++ select rank (x) +++ rank(3) +++ if (any (lbound(x) /= 1)) stop 8 +++ end select +++ +++ select rank (x) +++ rank(*) +++ if (rank(x) /= 1) stop 9 +++ if (lbound(x, 1) /= 1) stop 10 +++ end select +++ end +++end ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gnat.dg/opt102.adb ++@@ -0,0 +1,10 @@ +++-- { dg-do run } +++-- { dg-options "-O2 -gnata" } +++ +++with Opt102_Pkg; use Opt102_Pkg; +++ +++procedure Opt102 is +++ I, F : aliased Integer; +++begin +++ I := Get (Two, F'Access, null); +++end; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gnat.dg/opt102_pkg.adb ++@@ -0,0 +1,12 @@ +++package body Opt102_Pkg is +++ +++ function Get (E : Enum; F, M : access Integer) return Integer is +++ begin +++ case E is +++ when One => return 0; +++ when Two => return F.all; +++ when Three => return M.all; +++ end case; +++ end; +++ +++end Opt102_Pkg; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gnat.dg/opt102_pkg.ads ++@@ -0,0 +1,10 @@ +++package Opt102_Pkg is +++ +++ type Enum is (One, Two, Three); +++ +++ function Get (E : Enum; F, M : access Integer) return Integer +++ with Pre => (E = One) = (F = null and M = null) and +++ (E = Two) = (F /= null) and +++ (E = Three) = (M /= null); +++ +++end Opt102_Pkg; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gnat.dg/varsize4.adb ++@@ -0,0 +1,20 @@ +++-- { dg-do compile } +++ +++package body Varsize4 is +++ +++ function Func (Bytes_Read : out Natural) return Arr is +++ Ret : Arr := (others => False); +++ begin +++ Bytes_Read := 0; +++ return Ret; +++ end; +++ +++ function Get return Natural is +++ Data : Arr; +++ Bytes : Natural; +++ begin +++ Data := Func (Bytes); +++ return Bytes; +++ end; +++ +++end Varsize4; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gnat.dg/varsize4.ads ++@@ -0,0 +1,9 @@ +++with Varsize4_Pkg; +++ +++package Varsize4 is +++ +++ type Arr is array (1 .. Varsize4_Pkg.F) of Boolean; +++ +++ function Get return Natural; +++ +++end Varsize4; ++new file mode 100644 ++--- /dev/null +++++ b/src/gcc/testsuite/gnat.dg/varsize4_pkg.ads ++@@ -0,0 +1,5 @@ +++package Varsize4_Pkg is +++ +++ function F return Natural; +++ +++end Varsize4_Pkg; ++--- a/src/gcc/testsuite/lib/target-supports.exp +++++ b/src/gcc/testsuite/lib/target-supports.exp ++@@ -10597,7 +10597,7 @@ proc check_effective_target_aarch64_tiny { } { ++ # various architecture extensions via the .arch_extension pseudo-op. ++ ++ foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve" ++- "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" } { +++ "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" "ls64" } { ++ eval [string map [list FUNC $aarch64_ext] { ++ proc check_effective_target_aarch64_asm_FUNC_ok { } { ++ if { [istarget aarch64*-*-*] } { ++@@ -11819,6 +11819,46 @@ proc check_effective_target_o_flag_in_section { } { ++ }] ++ } ++ +++# Return 1 if the given assembler supports hardware transactional memory +++# instructions with machine type Power10, 0 otherwise. Cache the result. +++ +++proc check_effective_target_powerpc_as_p10_htm { } { +++ global tool +++ global GCC_UNDER_TEST +++ +++ # Need auto-host.h to check linker support. +++ if { ![file exists ../../auto-host.h ] } { +++ return 0 +++ } +++ +++ return [check_cached_effective_target powerpc_as_p10_htm { +++ +++ set src pie[pid].c +++ set obj pie[pid].o +++ +++ set f [open $src "w"] +++ puts $f "#include \"../../auto-host.h\"" +++ puts $f "#if HAVE_AS_POWER10_HTM == 0" +++ puts $f "# error Assembler does not support htm insns with power10." +++ puts $f "#endif" +++ close $f +++ +++ verbose "check_effective_target_powerpc_as_p10_htm compiling testfile $src" 2 +++ set lines [${tool}_target_compile $src $obj object ""] +++ +++ file delete $src +++ file delete $obj +++ +++ if [string match "" $lines] then { +++ verbose "check_effective_target_powerpc_as_p10_htm testfile compilation passed" 2 +++ return 1 +++ } else { +++ verbose "check_effective_target_powerpc_as_p10_htm testfile compilation failed" 2 +++ return 0 +++ } +++ }] +++} +++ ++ # return 1 if LRA is supported. ++ ++ proc check_effective_target_lra { } { ++--- a/src/gcc/tree-object-size.cc +++++ b/src/gcc/tree-object-size.cc ++@@ -771,21 +771,33 @@ alloc_object_size (const gcall *call, int object_size_type) ++ arg2 = TREE_INT_CST_LOW (TREE_VALUE (TREE_CHAIN (p)))-1; ++ } ++ else if (gimple_call_builtin_p (call, BUILT_IN_NORMAL) ++- && callfn && ALLOCA_FUNCTION_CODE_P (DECL_FUNCTION_CODE (callfn))) ++- arg1 = 0; +++ && callfn +++ && ALLOCA_FUNCTION_CODE_P (DECL_FUNCTION_CODE (callfn))) +++ arg1 = 0; ++ ++ /* Non-const arguments are OK here, let the caller handle constness. */ ++- if (arg1 < 0 || arg1 >= (int) gimple_call_num_args (call) ++- || arg2 >= (int) gimple_call_num_args (call)) +++ if (arg1 < 0 +++ || (unsigned) arg1 >= gimple_call_num_args (call) +++ || (arg2 >= 0 && (unsigned) arg2 >= gimple_call_num_args (call))) ++ return size_unknown (object_size_type); ++ +++ tree targ1 = gimple_call_arg (call, arg1); +++ if (!INTEGRAL_TYPE_P (TREE_TYPE (targ1)) +++ || TYPE_PRECISION (TREE_TYPE (targ1)) > TYPE_PRECISION (sizetype)) +++ return size_unknown (object_size_type); +++ targ1 = fold_convert (sizetype, targ1); ++ tree bytes = NULL_TREE; ++ if (arg2 >= 0) ++- bytes = size_binop (MULT_EXPR, ++- fold_convert (sizetype, gimple_call_arg (call, arg1)), ++- fold_convert (sizetype, gimple_call_arg (call, arg2))); ++- else if (arg1 >= 0) ++- bytes = fold_convert (sizetype, gimple_call_arg (call, arg1)); +++ { +++ tree targ2 = gimple_call_arg (call, arg2); +++ if (!INTEGRAL_TYPE_P (TREE_TYPE (targ2)) +++ || TYPE_PRECISION (TREE_TYPE (targ2)) > TYPE_PRECISION (sizetype)) +++ return size_unknown (object_size_type); +++ targ2 = fold_convert (sizetype, targ2); +++ bytes = size_binop (MULT_EXPR, targ1, targ2); +++ } +++ else +++ bytes = targ1; ++ ++ return bytes ? bytes : size_unknown (object_size_type); ++ } ++--- a/src/gcc/tree-scalar-evolution.cc +++++ b/src/gcc/tree-scalar-evolution.cc ++@@ -3282,7 +3282,8 @@ simple_iv_with_niters (class loop *wrto_loop, class loop *use_loop, ++ ++ type = TREE_TYPE (iv->base); ++ e = TREE_OPERAND (iv->base, 0); ++- if (TREE_CODE (e) != PLUS_EXPR +++ if (!tree_nop_conversion_p (type, TREE_TYPE (e)) +++ || TREE_CODE (e) != PLUS_EXPR ++ || TREE_CODE (TREE_OPERAND (e, 1)) != INTEGER_CST ++ || !tree_int_cst_equal (iv->step, ++ fold_convert (type, TREE_OPERAND (e, 1)))) ++--- a/src/gcc/tree-ssa-ccp.cc +++++ b/src/gcc/tree-ssa-ccp.cc ++@@ -1552,6 +1552,8 @@ bit_value_binop (enum tree_code code, signop sgn, int width, ++ *mask = wi::lrotate (r1mask, shift, width); ++ *val = wi::lrotate (r1val, shift, width); ++ } +++ *mask = wi::ext (*mask, width, sgn); +++ *val = wi::ext (*val, width, sgn); ++ } ++ } ++ else if (wi::ltu_p (r2val | r2mask, width) ++@@ -1593,8 +1595,8 @@ bit_value_binop (enum tree_code code, signop sgn, int width, ++ /* Accumulate the result. */ ++ res_mask |= tmp_mask | (res_val ^ tmp_val); ++ } ++- *val = wi::bit_and_not (res_val, res_mask); ++- *mask = res_mask; +++ *val = wi::ext (wi::bit_and_not (res_val, res_mask), width, sgn); +++ *mask = wi::ext (res_mask, width, sgn); ++ } ++ break; ++ ++--- a/src/gcc/tree-ssa-loop-im.cc +++++ b/src/gcc/tree-ssa-loop-im.cc ++@@ -1648,11 +1648,21 @@ gather_mem_refs_stmt (class loop *loop, gimple *stmt) ++ unshare_expr (mem_base)); ++ if (TYPE_ALIGN (ref_type) != ref_align) ++ ref_type = build_aligned_type (ref_type, ref_align); ++- (*slot)->mem.ref +++ tree new_ref ++ = fold_build2 (MEM_REF, ref_type, tmp, ++ build_int_cst (ref_alias_type, mem_off)); ++ if ((*slot)->mem.volatile_p) ++- TREE_THIS_VOLATILE ((*slot)->mem.ref) = 1; +++ TREE_THIS_VOLATILE (new_ref) = 1; +++ (*slot)->mem.ref = new_ref; +++ /* Make sure the recorded base and offset are consistent +++ with the newly built ref. */ +++ if (TREE_CODE (TREE_OPERAND (new_ref, 0)) == ADDR_EXPR) +++ ; +++ else +++ { +++ (*slot)->mem.base = new_ref; +++ (*slot)->mem.offset = 0; +++ } ++ gcc_checking_assert (TREE_CODE ((*slot)->mem.ref) == MEM_REF ++ && is_gimple_mem_ref_addr ++ (TREE_OPERAND ((*slot)->mem.ref, ++--- a/src/gcc/tree-ssa-loop-ivcanon.cc +++++ b/src/gcc/tree-ssa-loop-ivcanon.cc ++@@ -1487,15 +1487,16 @@ tree_unroll_loops_completely (bool may_increase_size, bool unroll_outer) ++ } ++ BITMAP_FREE (fathers); ++ +++ /* Clean up the information about numbers of iterations, since +++ complete unrolling might have invalidated it. */ +++ scev_reset (); +++ ++ /* This will take care of removing completely unrolled loops ++ from the loop structures so we can continue unrolling now ++ innermost loops. */ ++ if (cleanup_tree_cfg ()) ++ update_ssa (TODO_update_ssa_only_virtuals); ++ ++- /* Clean up the information about numbers of iterations, since ++- complete unrolling might have invalidated it. */ ++- scev_reset (); ++ if (flag_checking && loops_state_satisfies_p (LOOP_CLOSED_SSA)) ++ verify_loop_closed_ssa (true); ++ } ++--- a/src/gcc/tree-ssa-loop-ivopts.cc +++++ b/src/gcc/tree-ssa-loop-ivopts.cc ++@@ -7616,7 +7616,22 @@ rewrite_use_address (struct ivopts_data *data, ++ true, GSI_SAME_STMT); ++ } ++ else ++- copy_ref_info (ref, *use->op_p); +++ { +++ /* When we end up confused enough and have no suitable base but +++ stuffed everything to index2 use a LEA for the address and +++ create a plain MEM_REF to avoid basing a memory reference +++ on address zero which create_mem_ref_raw does as fallback. */ +++ if (TREE_CODE (ref) == TARGET_MEM_REF +++ && TMR_INDEX2 (ref) != NULL_TREE +++ && integer_zerop (TREE_OPERAND (ref, 0))) +++ { +++ ref = fold_build1 (ADDR_EXPR, TREE_TYPE (TREE_OPERAND (ref, 0)), ref); +++ ref = force_gimple_operand_gsi (&bsi, ref, true, NULL_TREE, +++ true, GSI_SAME_STMT); +++ ref = build2 (MEM_REF, type, ref, build_zero_cst (alias_ptr_type)); +++ } +++ copy_ref_info (ref, *use->op_p); +++ } ++ ++ *use->op_p = ref; ++ } ++--- a/src/gcc/tree-ssa-loop-unswitch.cc +++++ b/src/gcc/tree-ssa-loop-unswitch.cc ++@@ -839,10 +839,7 @@ hoist_guard (class loop *loop, edge guard) ++ cond_stmt = as_a (stmt); ++ extract_true_false_edges_from_block (guard_bb, &te, &fe); ++ /* Insert guard to PRE_HEADER. */ ++- if (!empty_block_p (pre_header)) ++- gsi = gsi_last_bb (pre_header); ++- else ++- gsi = gsi_start_bb (pre_header); +++ gsi = gsi_last_bb (pre_header); ++ /* Create copy of COND_STMT. */ ++ new_cond_stmt = gimple_build_cond (gimple_cond_code (cond_stmt), ++ gimple_cond_lhs (cond_stmt), ++--- a/src/gcc/tree-ssa-pre.cc +++++ b/src/gcc/tree-ssa-pre.cc ++@@ -4216,6 +4216,7 @@ compute_avail (function *fun) ++ else ++ { ++ ref->set = 0; +++ ref->base_set = 0; ++ if (ref1->opcode == MEM_REF) ++ ref1->op0 ++ = wide_int_to_tree (ptr_type_node, ++--- a/src/gcc/tree-ssa-reassoc.cc +++++ b/src/gcc/tree-ssa-reassoc.cc ++@@ -2101,12 +2101,24 @@ undistribute_bitref_for_vector (enum tree_code opcode, ++ { ++ sum = build_and_add_sum (vec_type, sum_vec, ++ valid_vecs[i + 1], opcode); +++ /* Update the operands only after build_and_add_sum, +++ so that we don't have to repeat the placement algorithm +++ of build_and_add_sum. */ +++ if (sum_vec == tvec +++ && !useless_type_conversion_p (vec_type, TREE_TYPE (sum_vec))) +++ { +++ gimple_stmt_iterator gsi = gsi_for_stmt (sum); +++ tree vce = build1 (VIEW_CONVERT_EXPR, vec_type, sum_vec); +++ tree lhs = make_ssa_name (vec_type); +++ gimple *g = gimple_build_assign (lhs, VIEW_CONVERT_EXPR, vce); +++ gimple_set_uid (g, gimple_uid (sum)); +++ gsi_insert_before (&gsi, g, GSI_NEW_STMT); +++ gimple_assign_set_rhs1 (sum, lhs); +++ update_stmt (sum); +++ } ++ if (!useless_type_conversion_p (vec_type, ++ TREE_TYPE (valid_vecs[i + 1]))) ++ { ++- /* Update the operands only after build_and_add_sum, ++- so that we don't have to repeat the placement algorithm ++- of build_and_add_sum. */ ++ gimple_stmt_iterator gsi = gsi_for_stmt (sum); ++ tree vce = build1 (VIEW_CONVERT_EXPR, vec_type, ++ valid_vecs[i + 1]); ++@@ -2115,15 +2127,6 @@ undistribute_bitref_for_vector (enum tree_code opcode, ++ gimple_set_uid (g, gimple_uid (sum)); ++ gsi_insert_before (&gsi, g, GSI_NEW_STMT); ++ gimple_assign_set_rhs2 (sum, lhs); ++- if (sum_vec == tvec) ++- { ++- vce = build1 (VIEW_CONVERT_EXPR, vec_type, sum_vec); ++- lhs = make_ssa_name (vec_type); ++- g = gimple_build_assign (lhs, VIEW_CONVERT_EXPR, vce); ++- gimple_set_uid (g, gimple_uid (sum)); ++- gsi_insert_before (&gsi, g, GSI_NEW_STMT); ++- gimple_assign_set_rhs1 (sum, lhs); ++- } ++ update_stmt (sum); ++ } ++ sum_vec = gimple_get_lhs (sum); ++--- a/src/gcc/tree-ssa-strlen.cc +++++ b/src/gcc/tree-ssa-strlen.cc ++@@ -3361,7 +3361,8 @@ strlen_pass::handle_builtin_memcpy (built_in_function bcode) ++ && !integer_zerop (len)) ++ { ++ maybe_warn_overflow (stmt, false, len, olddsi, false, true); ++- adjust_last_stmt (olddsi, stmt, false); +++ if (tree_fits_uhwi_p (len)) +++ adjust_last_stmt (olddsi, stmt, false); ++ } ++ ++ int idx = get_stridx (src, stmt); ++--- a/src/gcc/tree-ssa-structalias.cc +++++ b/src/gcc/tree-ssa-structalias.cc ++@@ -1581,64 +1581,6 @@ unify_nodes (constraint_graph_t graph, unsigned int to, unsigned int from, ++ bitmap_clear_bit (graph->succs[to], to); ++ } ++ ++-/* Information needed to compute the topological ordering of a graph. */ ++- ++-struct topo_info ++-{ ++- /* sbitmap of visited nodes. */ ++- sbitmap visited; ++- /* Array that stores the topological order of the graph, *in ++- reverse*. */ ++- vec topo_order; ++-}; ++- ++- ++-/* Initialize and return a topological info structure. */ ++- ++-static struct topo_info * ++-init_topo_info (void) ++-{ ++- size_t size = graph->size; ++- struct topo_info *ti = XNEW (struct topo_info); ++- ti->visited = sbitmap_alloc (size); ++- bitmap_clear (ti->visited); ++- ti->topo_order.create (1); ++- return ti; ++-} ++- ++- ++-/* Free the topological sort info pointed to by TI. */ ++- ++-static void ++-free_topo_info (struct topo_info *ti) ++-{ ++- sbitmap_free (ti->visited); ++- ti->topo_order.release (); ++- free (ti); ++-} ++- ++-/* Visit the graph in topological order, and store the order in the ++- topo_info structure. */ ++- ++-static void ++-topo_visit (constraint_graph_t graph, struct topo_info *ti, ++- unsigned int n) ++-{ ++- bitmap_iterator bi; ++- unsigned int j; ++- ++- bitmap_set_bit (ti->visited, n); ++- ++- if (graph->succs[n]) ++- EXECUTE_IF_SET_IN_BITMAP (graph->succs[n], 0, j, bi) ++- { ++- if (!bitmap_bit_p (ti->visited, j)) ++- topo_visit (graph, ti, j); ++- } ++- ++- ti->topo_order.safe_push (n); ++-} ++- ++ /* Process a constraint C that represents x = *(y + off), using DELTA as the ++ starting solution for y. */ ++ ++@@ -1913,19 +1855,56 @@ find_indirect_cycles (constraint_graph_t graph) ++ scc_visit (graph, &si, i); ++ } ++ ++-/* Compute a topological ordering for GRAPH, and store the result in the ++- topo_info structure TI. */ +++/* Visit the graph in topological order starting at node N, and store the +++ order in TOPO_ORDER using VISITED to indicate visited nodes. */ ++ ++ static void ++-compute_topo_order (constraint_graph_t graph, ++- struct topo_info *ti) +++topo_visit (constraint_graph_t graph, vec &topo_order, +++ sbitmap visited, unsigned int n) +++{ +++ bitmap_iterator bi; +++ unsigned int j; +++ +++ bitmap_set_bit (visited, n); +++ +++ if (graph->succs[n]) +++ EXECUTE_IF_SET_IN_BITMAP (graph->succs[n], 0, j, bi) +++ { +++ unsigned k = find (j); +++ if (!bitmap_bit_p (visited, k)) +++ topo_visit (graph, topo_order, visited, k); +++ } +++ +++ topo_order.quick_push (n); +++} +++ +++/* Compute a topological ordering for GRAPH, and return the result. */ +++ +++static auto_vec +++compute_topo_order (constraint_graph_t graph) ++ { ++ unsigned int i; ++ unsigned int size = graph->size; ++ +++ auto_sbitmap visited (size); +++ bitmap_clear (visited); +++ +++ /* For the heuristic in add_graph_edge to work optimally make sure to +++ first visit the connected component of the graph containing +++ ESCAPED. Do this by extracting the connected component +++ with ESCAPED and append that to all other components as solve_graph +++ pops from the order. */ +++ auto_vec tail (size); +++ topo_visit (graph, tail, visited, find (escaped_id)); +++ +++ auto_vec topo_order (size); +++ ++ for (i = 0; i != size; ++i) ++- if (!bitmap_bit_p (ti->visited, i) && find (i) == i) ++- topo_visit (graph, ti, i); +++ if (!bitmap_bit_p (visited, i) && find (i) == i) +++ topo_visit (graph, topo_order, visited, i); +++ +++ topo_order.splice (tail); +++ return topo_order; ++ } ++ ++ /* Structure used to for hash value numbering of pointer equivalence ++@@ -2753,17 +2732,14 @@ solve_graph (constraint_graph_t graph) ++ while (!bitmap_empty_p (changed)) ++ { ++ unsigned int i; ++- struct topo_info *ti = init_topo_info (); ++ stats.iterations++; ++ ++ bitmap_obstack_initialize (&iteration_obstack); ++ ++- compute_topo_order (graph, ti); ++- ++- while (ti->topo_order.length () != 0) +++ auto_vec topo_order = compute_topo_order (graph); +++ while (topo_order.length () != 0) ++ { ++- ++- i = ti->topo_order.pop (); +++ i = topo_order.pop (); ++ ++ /* If this variable is not a representative, skip it. */ ++ if (find (i) != i) ++@@ -2888,7 +2864,6 @@ solve_graph (constraint_graph_t graph) ++ } ++ } ++ } ++- free_topo_info (ti); ++ bitmap_obstack_release (&iteration_obstack); ++ } ++ ++--- a/src/gcc/tree-ssa-tail-merge.cc +++++ b/src/gcc/tree-ssa-tail-merge.cc ++@@ -1165,6 +1165,9 @@ gimple_equal_p (same_succ *same_succ, gimple *s1, gimple *s2) ++ return operand_equal_p (lhs1, lhs2, 0); ++ ++ case GIMPLE_ASSIGN: +++ if (gimple_assign_rhs_code (s1) != gimple_assign_rhs_code (s2)) +++ return false; +++ ++ lhs1 = gimple_get_lhs (s1); ++ lhs2 = gimple_get_lhs (s2); ++ if (TREE_CODE (lhs1) != SSA_NAME ++@@ -1172,11 +1175,20 @@ gimple_equal_p (same_succ *same_succ, gimple *s1, gimple *s2) ++ return (operand_equal_p (lhs1, lhs2, 0) ++ && gimple_operand_equal_value_p (gimple_assign_rhs1 (s1), ++ gimple_assign_rhs1 (s2))); ++- else if (TREE_CODE (lhs1) == SSA_NAME ++- && TREE_CODE (lhs2) == SSA_NAME) ++- return operand_equal_p (gimple_assign_rhs1 (s1), ++- gimple_assign_rhs1 (s2), 0); ++- return false; +++ +++ if (TREE_CODE (lhs1) != SSA_NAME +++ || TREE_CODE (lhs2) != SSA_NAME) +++ return false; +++ +++ gcc_checking_assert (gimple_num_args (s1) == gimple_num_args (s2)); +++ for (i = 0; i < gimple_num_args (s1); ++i) +++ { +++ t1 = gimple_arg (s1, i); +++ t2 = gimple_arg (s2, i); +++ if (!gimple_operand_equal_value_p (t1, t2)) +++ return false; +++ } +++ return true; ++ ++ case GIMPLE_COND: ++ t1 = gimple_cond_lhs (s1); ++--- a/src/gcc/tree-ssa.cc +++++ b/src/gcc/tree-ssa.cc ++@@ -1790,15 +1790,20 @@ maybe_optimize_var (tree var, bitmap addresses_taken, bitmap not_reg_needs, ++ maybe_reg = true; ++ DECL_NOT_GIMPLE_REG_P (var) = 0; ++ } ++- if (maybe_reg && is_gimple_reg (var)) +++ if (maybe_reg) ++ { ++- if (dump_file) +++ if (is_gimple_reg (var)) ++ { ++- fprintf (dump_file, "Now a gimple register: "); ++- print_generic_expr (dump_file, var); ++- fprintf (dump_file, "\n"); +++ if (dump_file) +++ { +++ fprintf (dump_file, "Now a gimple register: "); +++ print_generic_expr (dump_file, var); +++ fprintf (dump_file, "\n"); +++ } +++ bitmap_set_bit (suitable_for_renaming, DECL_UID (var)); ++ } ++- bitmap_set_bit (suitable_for_renaming, DECL_UID (var)); +++ else +++ DECL_NOT_GIMPLE_REG_P (var) = 1; ++ } ++ } ++ } ++--- a/src/gcc/tree-vect-data-refs.cc +++++ b/src/gcc/tree-vect-data-refs.cc ++@@ -672,158 +672,166 @@ vect_slp_analyze_data_ref_dependence (vec_info *vinfo, ++ } ++ ++ ++-/* Analyze dependences involved in the transform of SLP NODE. STORES ++- contain the vector of scalar stores of this instance if we are ++- disambiguating the loads. */ +++/* Analyze dependences involved in the transform of a store SLP NODE. */ ++ ++ static bool ++-vect_slp_analyze_node_dependences (vec_info *vinfo, slp_tree node, ++- vec stores, ++- stmt_vec_info last_store_info) +++vect_slp_analyze_store_dependences (vec_info *vinfo, slp_tree node) ++ { ++- /* This walks over all stmts involved in the SLP load/store done +++ /* This walks over all stmts involved in the SLP store done ++ in NODE verifying we can sink them up to the last stmt in the ++ group. */ ++- if (DR_IS_WRITE (STMT_VINFO_DATA_REF (SLP_TREE_REPRESENTATIVE (node)))) +++ stmt_vec_info last_access_info = vect_find_last_scalar_stmt_in_slp (node); +++ gcc_assert (DR_IS_WRITE (STMT_VINFO_DATA_REF (last_access_info))); +++ +++ for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k) ++ { ++- stmt_vec_info last_access_info = vect_find_last_scalar_stmt_in_slp (node); ++- for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k) +++ stmt_vec_info access_info +++ = vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]); +++ if (access_info == last_access_info) +++ continue; +++ data_reference *dr_a = STMT_VINFO_DATA_REF (access_info); +++ ao_ref ref; +++ bool ref_initialized_p = false; +++ for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt); +++ gsi_stmt (gsi) != last_access_info->stmt; gsi_next (&gsi)) ++ { ++- stmt_vec_info access_info ++- = vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]); ++- if (access_info == last_access_info) +++ gimple *stmt = gsi_stmt (gsi); +++ if (! gimple_vuse (stmt)) ++ continue; ++- data_reference *dr_a = STMT_VINFO_DATA_REF (access_info); ++- ao_ref ref; ++- bool ref_initialized_p = false; ++- for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt); ++- gsi_stmt (gsi) != last_access_info->stmt; gsi_next (&gsi)) ++- { ++- gimple *stmt = gsi_stmt (gsi); ++- if (! gimple_vuse (stmt)) ++- continue; ++ ++- /* If we couldn't record a (single) data reference for this ++- stmt we have to resort to the alias oracle. */ ++- stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt); ++- data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info); ++- if (!dr_b) ++- { ++- /* We are moving a store - this means ++- we cannot use TBAA for disambiguation. */ ++- if (!ref_initialized_p) ++- ao_ref_init (&ref, DR_REF (dr_a)); ++- if (stmt_may_clobber_ref_p_1 (stmt, &ref, false) ++- || ref_maybe_used_by_stmt_p (stmt, &ref, false)) ++- return false; ++- continue; ++- } ++- ++- bool dependent = false; ++- /* If we run into a store of this same instance (we've just ++- marked those) then delay dependence checking until we run ++- into the last store because this is where it will have ++- been sunk to (and we verify if we can do that as well). */ ++- if (gimple_visited_p (stmt)) ++- { ++- if (stmt_info != last_store_info) ++- continue; ++- ++- for (stmt_vec_info &store_info : stores) ++- { ++- data_reference *store_dr ++- = STMT_VINFO_DATA_REF (store_info); ++- ddr_p ddr = initialize_data_dependence_relation ++- (dr_a, store_dr, vNULL); ++- dependent ++- = vect_slp_analyze_data_ref_dependence (vinfo, ddr); ++- free_dependence_relation (ddr); ++- if (dependent) ++- break; ++- } ++- } ++- else ++- { ++- ddr_p ddr = initialize_data_dependence_relation (dr_a, ++- dr_b, vNULL); ++- dependent = vect_slp_analyze_data_ref_dependence (vinfo, ddr); ++- free_dependence_relation (ddr); ++- } ++- if (dependent) +++ /* If we couldn't record a (single) data reference for this +++ stmt we have to resort to the alias oracle. */ +++ stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt); +++ data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info); +++ if (!dr_b) +++ { +++ /* We are moving a store - this means +++ we cannot use TBAA for disambiguation. */ +++ if (!ref_initialized_p) +++ ao_ref_init (&ref, DR_REF (dr_a)); +++ if (stmt_may_clobber_ref_p_1 (stmt, &ref, false) +++ || ref_maybe_used_by_stmt_p (stmt, &ref, false)) ++ return false; +++ continue; ++ } +++ +++ gcc_assert (!gimple_visited_p (stmt)); +++ +++ ddr_p ddr = initialize_data_dependence_relation (dr_a, +++ dr_b, vNULL); +++ bool dependent = vect_slp_analyze_data_ref_dependence (vinfo, ddr); +++ free_dependence_relation (ddr); +++ if (dependent) +++ return false; ++ } ++ } ++- else /* DR_IS_READ */ +++ return true; +++} +++ +++/* Analyze dependences involved in the transform of a load SLP NODE. STORES +++ contain the vector of scalar stores of this instance if we are +++ disambiguating the loads. */ +++ +++static bool +++vect_slp_analyze_load_dependences (vec_info *vinfo, slp_tree node, +++ vec stores, +++ stmt_vec_info last_store_info) +++{ +++ /* This walks over all stmts involved in the SLP load done +++ in NODE verifying we can hoist them up to the first stmt in the +++ group. */ +++ stmt_vec_info first_access_info = vect_find_first_scalar_stmt_in_slp (node); +++ gcc_assert (DR_IS_READ (STMT_VINFO_DATA_REF (first_access_info))); +++ +++ for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k) ++ { ++- stmt_vec_info first_access_info ++- = vect_find_first_scalar_stmt_in_slp (node); ++- for (unsigned k = 0; k < SLP_TREE_SCALAR_STMTS (node).length (); ++k) +++ stmt_vec_info access_info +++ = vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]); +++ if (access_info == first_access_info) +++ continue; +++ data_reference *dr_a = STMT_VINFO_DATA_REF (access_info); +++ ao_ref ref; +++ bool ref_initialized_p = false; +++ hash_set grp_visited; +++ for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt); +++ gsi_stmt (gsi) != first_access_info->stmt; gsi_prev (&gsi)) ++ { ++- stmt_vec_info access_info ++- = vect_orig_stmt (SLP_TREE_SCALAR_STMTS (node)[k]); ++- if (access_info == first_access_info) +++ gimple *stmt = gsi_stmt (gsi); +++ if (! gimple_vdef (stmt)) ++ continue; ++- data_reference *dr_a = STMT_VINFO_DATA_REF (access_info); ++- ao_ref ref; ++- bool ref_initialized_p = false; ++- for (gimple_stmt_iterator gsi = gsi_for_stmt (access_info->stmt); ++- gsi_stmt (gsi) != first_access_info->stmt; gsi_prev (&gsi)) +++ +++ stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt); +++ +++ /* If we run into a store of this same instance (we've just +++ marked those) then delay dependence checking until we run +++ into the last store because this is where it will have +++ been sunk to (and we verified that we can do that already). */ +++ if (gimple_visited_p (stmt)) ++ { ++- gimple *stmt = gsi_stmt (gsi); ++- if (! gimple_vdef (stmt)) +++ if (stmt_info != last_store_info) ++ continue; ++ ++- /* If we couldn't record a (single) data reference for this ++- stmt we have to resort to the alias oracle. */ ++- stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt); ++- data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info); +++ for (stmt_vec_info &store_info : stores) +++ { +++ data_reference *store_dr = STMT_VINFO_DATA_REF (store_info); +++ ddr_p ddr = initialize_data_dependence_relation +++ (dr_a, store_dr, vNULL); +++ bool dependent +++ = vect_slp_analyze_data_ref_dependence (vinfo, ddr); +++ free_dependence_relation (ddr); +++ if (dependent) +++ return false; +++ } +++ continue; +++ } ++ ++- /* We are hoisting a load - this means we can use ++- TBAA for disambiguation. */ +++ auto check_hoist = [&] (stmt_vec_info stmt_info) -> bool +++ { +++ /* We are hoisting a load - this means we can use TBAA for +++ disambiguation. */ ++ if (!ref_initialized_p) ++ ao_ref_init (&ref, DR_REF (dr_a)); ++- if (stmt_may_clobber_ref_p_1 (stmt, &ref, true)) +++ if (stmt_may_clobber_ref_p_1 (stmt_info->stmt, &ref, true)) ++ { +++ /* If we couldn't record a (single) data reference for this +++ stmt we have to give up now. */ +++ data_reference *dr_b = STMT_VINFO_DATA_REF (stmt_info); ++ if (!dr_b) ++ return false; ++- /* Resort to dependence checking below. */ ++- } ++- else ++- /* No dependence. */ ++- continue; ++- ++- bool dependent = false; ++- /* If we run into a store of this same instance (we've just ++- marked those) then delay dependence checking until we run ++- into the last store because this is where it will have ++- been sunk to (and we verify if we can do that as well). */ ++- if (gimple_visited_p (stmt)) ++- { ++- if (stmt_info != last_store_info) ++- continue; ++- ++- for (stmt_vec_info &store_info : stores) ++- { ++- data_reference *store_dr ++- = STMT_VINFO_DATA_REF (store_info); ++- ddr_p ddr = initialize_data_dependence_relation ++- (dr_a, store_dr, vNULL); ++- dependent ++- = vect_slp_analyze_data_ref_dependence (vinfo, ddr); ++- free_dependence_relation (ddr); ++- if (dependent) ++- break; ++- } ++- } ++- else ++- { ++ ddr_p ddr = initialize_data_dependence_relation (dr_a, ++ dr_b, vNULL); ++- dependent = vect_slp_analyze_data_ref_dependence (vinfo, ddr); +++ bool dependent +++ = vect_slp_analyze_data_ref_dependence (vinfo, ddr); ++ free_dependence_relation (ddr); +++ if (dependent) +++ return false; ++ } ++- if (dependent) +++ /* No dependence. */ +++ return true; +++ }; +++ if (STMT_VINFO_GROUPED_ACCESS (stmt_info)) +++ { +++ /* When we run into a store group we have to honor +++ that earlier stores might be moved here. We don't +++ know exactly which and where to since we lack a +++ back-mapping from DR to SLP node, so assume all +++ earlier stores are sunk here. It's enough to +++ consider the last stmt of a group for this. +++ ??? Both this and the fact that we disregard that +++ the conflicting instance might be removed later +++ is overly conservative. */ +++ if (!grp_visited.add (DR_GROUP_FIRST_ELEMENT (stmt_info))) +++ for (auto store_info = DR_GROUP_FIRST_ELEMENT (stmt_info); +++ store_info != NULL; +++ store_info = DR_GROUP_NEXT_ELEMENT (store_info)) +++ if ((store_info == stmt_info +++ || get_later_stmt (store_info, stmt_info) == stmt_info) +++ && !check_hoist (store_info)) +++ return false; +++ } +++ else +++ { +++ if (!check_hoist (stmt_info)) ++ return false; ++ } ++ } ++@@ -852,7 +860,7 @@ vect_slp_analyze_instance_dependence (vec_info *vinfo, slp_instance instance) ++ stmt_vec_info last_store_info = NULL; ++ if (store) ++ { ++- if (! vect_slp_analyze_node_dependences (vinfo, store, vNULL, NULL)) +++ if (! vect_slp_analyze_store_dependences (vinfo, store)) ++ return false; ++ ++ /* Mark stores in this instance and remember the last one. */ ++@@ -866,7 +874,7 @@ vect_slp_analyze_instance_dependence (vec_info *vinfo, slp_instance instance) ++ /* Verify we can sink loads to the vectorized stmt insert location, ++ special-casing stores of this instance. */ ++ for (slp_tree &load : SLP_INSTANCE_LOADS (instance)) ++- if (! vect_slp_analyze_node_dependences (vinfo, load, +++ if (! vect_slp_analyze_load_dependences (vinfo, load, ++ store ++ ? SLP_TREE_SCALAR_STMTS (store) ++ : vNULL, last_store_info)) ++--- a/src/gcc/tree-vect-loop.cc +++++ b/src/gcc/tree-vect-loop.cc ++@@ -2874,7 +2874,7 @@ vect_analyze_loop_1 (class loop *loop, vec_info_shared *shared, ++ res ? "succeeded" : " failed", ++ GET_MODE_NAME (loop_vinfo->vector_mode)); ++ ++- if (!main_loop_vinfo && suggested_unroll_factor > 1) +++ if (res && !main_loop_vinfo && suggested_unroll_factor > 1) ++ { ++ if (dump_enabled_p ()) ++ dump_printf_loc (MSG_NOTE, vect_location, ++@@ -3513,24 +3513,15 @@ pop: ++ ??? We could relax this and handle arbitrary live stmts by ++ forcing a scalar epilogue for example. */ ++ imm_use_iterator imm_iter; +++ use_operand_p use_p; ++ gimple *op_use_stmt; ++ unsigned cnt = 0; ++ FOR_EACH_IMM_USE_STMT (op_use_stmt, imm_iter, op.ops[opi]) ++ if (!is_gimple_debug (op_use_stmt) ++ && (*code != ERROR_MARK ++ || flow_bb_inside_loop_p (loop, gimple_bb (op_use_stmt)))) ++- { ++- /* We want to allow x + x but not x < 1 ? x : 2. */ ++- if (is_gimple_assign (op_use_stmt) ++- && gimple_assign_rhs_code (op_use_stmt) == COND_EXPR) ++- { ++- use_operand_p use_p; ++- FOR_EACH_IMM_USE_ON_STMT (use_p, imm_iter) ++- cnt++; ++- } ++- else ++- cnt++; ++- } +++ FOR_EACH_IMM_USE_ON_STMT (use_p, imm_iter) +++ cnt++; ++ if (cnt != 1) ++ { ++ fail = true; ++--- a/src/gcc/wide-int.cc +++++ b/src/gcc/wide-int.cc ++@@ -1888,9 +1888,9 @@ wi::divmod_internal (HOST_WIDE_INT *quotient, unsigned int *remainder_len, ++ } ++ ++ wi_unpack (b_dividend, dividend.get_val (), dividend.get_len (), ++- dividend_blocks_needed, dividend_prec, sgn); +++ dividend_blocks_needed, dividend_prec, UNSIGNED); ++ wi_unpack (b_divisor, divisor.get_val (), divisor.get_len (), ++- divisor_blocks_needed, divisor_prec, sgn); +++ divisor_blocks_needed, divisor_prec, UNSIGNED); ++ ++ m = dividend_blocks_needed; ++ b_dividend[m] = 0; ++--- a/src/gcc/wide-int.h +++++ b/src/gcc/wide-int.h ++@@ -3169,9 +3169,11 @@ wi::lrotate (const T1 &x, const T2 &y, unsigned int width) ++ width = precision; ++ WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width); ++ WI_UNARY_RESULT (T1) left = wi::lshift (x, ymod); ++- WI_UNARY_RESULT (T1) right = wi::lrshift (x, wi::sub (width, ymod)); +++ WI_UNARY_RESULT (T1) right +++ = wi::lrshift (width != precision ? wi::zext (x, width) : x, +++ wi::sub (width, ymod)); ++ if (width != precision) ++- return wi::zext (left, width) | wi::zext (right, width); +++ return wi::zext (left, width) | right; ++ return left | right; ++ } ++ ++@@ -3186,10 +3188,11 @@ wi::rrotate (const T1 &x, const T2 &y, unsigned int width) ++ if (width == 0) ++ width = precision; ++ WI_UNARY_RESULT (T2) ymod = umod_trunc (y, width); ++- WI_UNARY_RESULT (T1) right = wi::lrshift (x, ymod); +++ WI_UNARY_RESULT (T1) right +++ = wi::lrshift (width != precision ? wi::zext (x, width) : x, ymod); ++ WI_UNARY_RESULT (T1) left = wi::lshift (x, wi::sub (width, ymod)); ++ if (width != precision) ++- return wi::zext (left, width) | wi::zext (right, width); +++ return wi::zext (left, width) | right; ++ return left | right; ++ } ++ ++--- a/src/libffi/ChangeLog +++++ b/src/libffi/ChangeLog ++@@ -1,3 +1,11 @@ +++2023-05-09 Dan Horák +++ +++ Backported from master: +++ 2023-05-06 Dan Horák +++ +++ PR libffi/109447 +++ * src/powerpc/ffi_linux64.c (ffi_prep_args64): Update arg.f128 pointer. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/libffi/src/powerpc/ffi_linux64.c +++++ b/src/libffi/src/powerpc/ffi_linux64.c ++@@ -680,7 +680,7 @@ ffi_prep_args64 (extended_cif *ecif, unsigned long *const stack) ++ { ++ if (vecarg_count < NUM_VEC_ARG_REGISTERS64 ++ && i < nfixedargs) ++- memcpy (vec_base.f128++, arg.f128, sizeof (float128)); +++ memcpy (vec_base.f128++, arg.f128++, sizeof (float128)); ++ else ++ memcpy (next_arg.f128, arg.f128++, sizeof (float128)); ++ if (++next_arg.f128 == gpr_end.f128) ++--- a/src/libgcc/ChangeLog +++++ b/src/libgcc/ChangeLog ++@@ -1,3 +1,27 @@ +++2024-01-13 Sandra Loosemore +++ +++ Backported from master: +++ 2024-01-12 Sandra Loosemore +++ +++ * unwind-dw2-fde-dip.c (_Unwind_Find_FDE): Do not try to use +++ _dl_find_object on nios2; it doesn't work. +++ +++2023-05-21 Iain Sandoe +++ +++ Backported from master: +++ 2023-05-19 Iain Sandoe +++ +++ * config.host: Arrange to set min Darwin OS versions from +++ the configured host version. +++ * config/darwin10-unwind-find-enc-func.c: Do not use current +++ headers, but declare the nexessary structures locally to the +++ versions in use for Mac OSX 10.6. +++ * config/t-darwin: Amend to handle configured min OS +++ versions. +++ * config/t-darwin-min-1: New. +++ * config/t-darwin-min-5: New. +++ * config/t-darwin-min-8: New. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/libgcc/config.host +++++ b/src/libgcc/config.host ++@@ -241,6 +241,24 @@ case ${host} in ++ ;; ++ esac ++ tmake_file="$tmake_file t-slibgcc-darwin" +++ # newer toolsets produce warnings when building for unsupported versions. +++ case ${host} in +++ *-*-darwin1[89]* | *-*-darwin2* ) +++ tmake_file="t-darwin-min-8 $tmake_file" +++ ;; +++ *-*-darwin9* | *-*-darwin1[0-7]*) +++ tmake_file="t-darwin-min-5 $tmake_file" +++ ;; +++ *-*-darwin[4-8]*) +++ tmake_file="t-darwin-min-1 $tmake_file" +++ ;; +++ *) +++ # Fall back to configuring for the oldest system known to work with +++ # all archs and the current sources. +++ tmake_file="t-darwin-min-5 $tmake_file" +++ echo "Warning: libgcc configured to support macOS 10.5" 1>&2 +++ ;; +++ esac ++ extra_parts="crt3.o libd10-uwfef.a crttms.o crttme.o libemutls_w.a" ++ ;; ++ *-*-dragonfly*) ++--- a/src/libgcc/config/darwin10-unwind-find-enc-func.c +++++ b/src/libgcc/config/darwin10-unwind-find-enc-func.c ++@@ -1,8 +1,34 @@ ++-#include "tconfig.h" ++-#include "tsystem.h" ++-#include "unwind-dw2-fde.h" ++ #include "libgcc_tm.h" ++ +++/* This shim is special, it needs to be built for Mac OSX 10.6 +++ regardless of the current system version. +++ We must also build it to use the unwinder layout that was +++ present for 10.6 (and not update that). +++ So we copy the referenced structures from unwind-dw2-fde.h +++ to avoid pulling in newer system headers and/or changed +++ layouts. */ +++struct dwarf_eh_bases +++{ +++ void *tbase; +++ void *dbase; +++ void *func; +++}; +++ +++typedef int sword __attribute__ ((mode (SI))); +++typedef unsigned int uword __attribute__ ((mode (SI))); +++ +++/* The first few fields of an FDE. */ +++struct dwarf_fde +++{ +++ uword length; +++ sword CIE_delta; +++ unsigned char pc_begin[]; +++} __attribute__ ((packed, aligned (__alignof__ (void *)))); +++ +++typedef struct dwarf_fde fde; +++ +++extern const fde * _Unwind_Find_FDE (void *, struct dwarf_eh_bases *); +++ ++ void * ++ _darwin10_Unwind_FindEnclosingFunction (void *pc) ++ { ++@@ -10,5 +36,5 @@ _darwin10_Unwind_FindEnclosingFunction (void *pc) ++ const struct dwarf_fde *fde = _Unwind_Find_FDE (pc-1, &bases); ++ if (fde) ++ return bases.func; ++- return NULL; +++ return (void *) 0; ++ } ++--- a/src/libgcc/config/t-darwin +++++ b/src/libgcc/config/t-darwin ++@@ -1,15 +1,15 @@ ++ # Set this as a minimum (unless overriden by arch t-files) since it's a ++ # reasonable lowest common denominator that works for all our archs. ++-HOST_LIBGCC2_CFLAGS += -mmacosx-version-min=10.4 +++HOST_LIBGCC2_CFLAGS += $(DARWIN_MIN_LIB_VERSION) ++ ++ crt3.o: $(srcdir)/config/darwin-crt3.c ++- $(crt_compile) -mmacosx-version-min=10.4 -c $< +++ $(crt_compile) $(DARWIN_MIN_CRT_VERSION) -c $< ++ ++ crttms.o: $(srcdir)/config/darwin-crt-tm.c ++- $(crt_compile) -mmacosx-version-min=10.4 -DSTART -c $< +++ $(crt_compile) $(DARWIN_MIN_CRT_VERSION) -DSTART -c $< ++ ++ crttme.o: $(srcdir)/config/darwin-crt-tm.c ++- $(crt_compile) -mmacosx-version-min=10.4 -DEND -c $< +++ $(crt_compile) $(DARWIN_MIN_CRT_VERSION) -DEND -c $< ++ ++ # Make emutls weak so that we can deal with -static-libgcc, override the ++ # hidden visibility when this is present in libgcc_eh. ++@@ -25,6 +25,8 @@ libemutls_w.a: emutls_s.o ++ $(RANLIB_FOR_TARGET) $@ ++ ++ # Patch to __Unwind_Find_Enclosing_Function for Darwin10. +++# This needs to be built for darwin10, regardless of the current platform +++# version. ++ d10-uwfef.o: $(srcdir)/config/darwin10-unwind-find-enc-func.c libgcc_tm.h ++ $(crt_compile) -mmacosx-version-min=10.6 -c $< ++ ++new file mode 100644 ++--- /dev/null +++++ b/src/libgcc/config/t-darwin-min-1 ++@@ -0,0 +1,3 @@ +++# Support building with -mmacosx-version-min back to 10.1. +++DARWIN_MIN_LIB_VERSION = -mmacosx-version-min=10.4 +++DARWIN_MIN_CRT_VERSION = -mmacosx-version-min=10.1 ++new file mode 100644 ++--- /dev/null +++++ b/src/libgcc/config/t-darwin-min-5 ++@@ -0,0 +1,3 @@ +++# Support building with -mmacosx-version-min back to 10.5. +++DARWIN_MIN_LIB_VERSION = -mmacosx-version-min=10.5 +++DARWIN_MIN_CRT_VERSION = -mmacosx-version-min=10.5 ++new file mode 100644 ++--- /dev/null +++++ b/src/libgcc/config/t-darwin-min-8 ++@@ -0,0 +1,3 @@ +++# Support building with -mmacosx-version-min back to 10.8. +++DARWIN_MIN_LIB_VERSION = -mmacosx-version-min=10.8 +++DARWIN_MIN_CRT_VERSION = -mmacosx-version-min=10.8 ++--- a/src/libgcc/unwind-dw2-fde-dip.c +++++ b/src/libgcc/unwind-dw2-fde-dip.c ++@@ -505,8 +505,9 @@ _Unwind_Find_FDE (void *pc, struct dwarf_eh_bases *bases) ++ return ret; ++ ++ /* Use DLFO_STRUCT_HAS_EH_DBASE as a proxy for the existence of a glibc-style ++- _dl_find_object function. */ ++-#ifdef DLFO_STRUCT_HAS_EH_DBASE +++ _dl_find_object function. However, do not use _dl_find_object on nios2, +++ which uses the GOT address as the base for DW_EH_PE_datarel instead. */ +++#if defined(DLFO_STRUCT_HAS_EH_DBASE) && !defined(__nios2__) ++ { ++ struct dl_find_object dlfo; ++ if (_dl_find_object (pc, &dlfo) == 0 && dlfo.dlfo_eh_frame != NULL) ++--- a/src/libgo/Makefile.am +++++ b/src/libgo/Makefile.am ++@@ -417,6 +417,7 @@ toolexeclibgounicode_DATA = \ ++ # Some internal packages are needed to bootstrap the gc toolchain. ++ toolexeclibgointernaldir = $(toolexeclibgodir)/internal ++ toolexeclibgointernal_DATA = \ +++ internal/lazyregexp.gox \ ++ internal/reflectlite.gox \ ++ internal/unsafeheader.gox ++ ++--- a/src/libgo/Makefile.in +++++ b/src/libgo/Makefile.in ++@@ -885,6 +885,7 @@ toolexeclibgounicode_DATA = \ ++ # Some internal packages are needed to bootstrap the gc toolchain. ++ toolexeclibgointernaldir = $(toolexeclibgodir)/internal ++ toolexeclibgointernal_DATA = \ +++ internal/lazyregexp.gox \ ++ internal/reflectlite.gox \ ++ internal/unsafeheader.gox ++ ++--- a/src/libgo/go/internal/abi/abi.go +++++ b/src/libgo/go/internal/abi/abi.go ++@@ -17,10 +17,7 @@ package abi ++ // compile-time error. ++ // ++ // Implemented as a compile intrinsic. ++-func FuncPCABI0(f any) uintptr { ++- // The compiler should remove all calls. ++- panic("FuncPCABI0") ++-} +++func FuncPCABI0(f any) uintptr ++ ++ // FuncPCABIInternal returns the entry PC of the function f. If f is a ++ // direct reference of a function, it must be defined as ABIInternal. ++@@ -29,7 +26,4 @@ func FuncPCABI0(f any) uintptr { ++ // the behavior is undefined. ++ // ++ // Implemented as a compile intrinsic. ++-func FuncPCABIInternal(f any) uintptr { ++- // The compiler should remove all calls. ++- panic("FuncPCABIInternal") ++-} +++func FuncPCABIInternal(f any) uintptr ++--- a/src/libgo/go/syscall/libcall_linux.go +++++ b/src/libgo/go/syscall/libcall_linux.go ++@@ -188,6 +188,14 @@ func Gettid() (tid int) { ++ //sys PivotRoot(newroot string, putold string) (err error) ++ //pivot_root(newroot *byte, putold *byte) _C_int ++ +++// Used by golang.org/x/sys/unix. +++//sys prlimit(pid int, resource int, newlimit *Rlimit, oldlimit *Rlimit) (err error) +++//prlimit(pid Pid_t, resource _C_int, newlimit *Rlimit, oldlimit *Rlimit) _C_int +++ +++func Prlimit(pid int, resource int, newlimit *Rlimit, oldlimit *Rlimit) error { +++ return prlimit(pid, resource, newlimit, oldlimit) +++} +++ ++ //sys Removexattr(path string, attr string) (err error) ++ //removexattr(path *byte, name *byte) _C_int ++ ++--- a/src/libgomp/ChangeLog +++++ b/src/libgomp/ChangeLog ++@@ -1,3 +1,69 @@ +++2023-09-01 Tobias Burnus +++ +++ Backported from master: +++ 2023-08-19 Tobias Burnus +++ +++ PR middle-end/111017 +++ * testsuite/libgomp.c-c++-common/non-rect-loop-1.c: New test. +++ +++2023-06-28 Thomas Schwinge +++ +++ Backported from master: +++ 2023-06-02 Thomas Schwinge +++ +++ PR testsuite/66005 +++ * testsuite/lib/libgomp.exp: 'flock' through stdout. +++ * testsuite/flock: New. +++ * configure.ac (FLOCK): Point to that if no 'flock' available, but +++ 'perl' is. +++ * configure: Regenerate. +++ +++2023-06-28 Thomas Schwinge +++ +++ Backported from master: +++ 2023-05-15 Thomas Schwinge +++ +++ PR testsuite/66005 +++ * configure.ac: Look for 'flock'. +++ * testsuite/Makefile.am (gcc_test_parallel_slots): Enable parallel testing. +++ * testsuite/config/default.exp: Don't 'load_lib "standard.exp"' here... +++ * testsuite/lib/libgomp.exp: ... but here, instead. +++ (libgomp_load): Override for parallel testing. +++ * testsuite/libgomp-site-extra.exp.in (FLOCK): Set. +++ * configure: Regenerate. +++ * Makefile.in: Regenerate. +++ * testsuite/Makefile.in: Regenerate. +++ +++2023-06-28 Rainer Orth +++ +++ Backported from master: +++ 2023-05-15 Rainer Orth +++ Thomas Schwinge +++ +++ PR testsuite/66005 +++ * testsuite/Makefile.am (PWD_COMMAND): New variable. +++ (%/site.exp): New target. +++ (check_p_numbers0, check_p_numbers1, check_p_numbers2) +++ (check_p_numbers3, check_p_numbers4, check_p_numbers5) +++ (check_p_numbers6, check_p_numbers, gcc_test_parallel_slots) +++ (check_p_subdirs) +++ (check_DEJAGNU_libgomp_targets): New variables. +++ ($(check_DEJAGNU_libgomp_targets)): New target. +++ ($(check_DEJAGNU_libgomp_targets)): New dependency. +++ (check-DEJAGNU $(check_DEJAGNU_libgomp_targets)): New targets. +++ * testsuite/Makefile.in: Regenerate. +++ * testsuite/lib/libgomp.exp: For parallel testing, +++ 'load_file ../libgomp-test-support.exp'. +++ +++2023-06-28 Thomas Schwinge +++ +++ Backported from master: +++ 2023-05-08 Thomas Schwinge +++ +++ * testsuite/libgomp.c++/c++.exp: Use 'lang_include_flags' instead +++ of 'libstdcxx_includes'. +++ * testsuite/libgomp.oacc-c++/c++.exp: Likewise. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/libgomp/Makefile.in +++++ b/src/libgomp/Makefile.in ++@@ -384,6 +384,7 @@ EXEEXT = @EXEEXT@ ++ FC = @FC@ ++ FCFLAGS = @FCFLAGS@ ++ FGREP = @FGREP@ +++FLOCK = @FLOCK@ ++ GREP = @GREP@ ++ HSA_RUNTIME_INCLUDE = @HSA_RUNTIME_INCLUDE@ ++ HSA_RUNTIME_LIB = @HSA_RUNTIME_LIB@ ++--- a/src/libgomp/configure +++++ b/src/libgomp/configure ++@@ -656,6 +656,7 @@ tmake_file ++ XLDFLAGS ++ XCFLAGS ++ config_path +++FLOCK ++ CPU_COUNT ++ LIBGOMP_BUILD_VERSIONED_SHLIB_SUN_FALSE ++ LIBGOMP_BUILD_VERSIONED_SHLIB_SUN_TRUE ++@@ -11431,7 +11432,7 @@ else ++ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 ++ lt_status=$lt_dlunknown ++ cat > conftest.$ac_ext <<_LT_EOF ++-#line 11434 "configure" +++#line 11435 "configure" ++ #include "confdefs.h" ++ ++ #if HAVE_DLFCN_H ++@@ -11537,7 +11538,7 @@ else ++ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 ++ lt_status=$lt_dlunknown ++ cat > conftest.$ac_ext <<_LT_EOF ++-#line 11540 "configure" +++#line 11541 "configure" ++ #include "confdefs.h" ++ ++ #if HAVE_DLFCN_H ++@@ -16663,6 +16664,91 @@ $as_echo "unable to detect (assuming 1)" >&6; } ++ fi ++ ++ +++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for flock implementation" >&5 +++$as_echo "$as_me: checking for flock implementation" >&6;} +++for ac_prog in flock +++do +++ # Extract the first word of "$ac_prog", so it can be a program name with args. +++set dummy $ac_prog; ac_word=$2 +++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +++$as_echo_n "checking for $ac_word... " >&6; } +++if ${ac_cv_prog_FLOCK+:} false; then : +++ $as_echo_n "(cached) " >&6 +++else +++ if test -n "$FLOCK"; then +++ ac_cv_prog_FLOCK="$FLOCK" # Let the user override the test. +++else +++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +++for as_dir in $PATH +++do +++ IFS=$as_save_IFS +++ test -z "$as_dir" && as_dir=. +++ for ac_exec_ext in '' $ac_executable_extensions; do +++ if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then +++ ac_cv_prog_FLOCK="$ac_prog" +++ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 +++ break 2 +++ fi +++done +++ done +++IFS=$as_save_IFS +++ +++fi +++fi +++FLOCK=$ac_cv_prog_FLOCK +++if test -n "$FLOCK"; then +++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $FLOCK" >&5 +++$as_echo "$FLOCK" >&6; } +++else +++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +++$as_echo "no" >&6; } +++fi +++ +++ +++ test -n "$FLOCK" && break +++done +++ +++# Fallback if 'perl' is available. +++if test -z "$FLOCK"; then +++ # Extract the first word of "perl", so it can be a program name with args. +++set dummy perl; ac_word=$2 +++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +++$as_echo_n "checking for $ac_word... " >&6; } +++if ${ac_cv_prog_FLOCK+:} false; then : +++ $as_echo_n "(cached) " >&6 +++else +++ if test -n "$FLOCK"; then +++ ac_cv_prog_FLOCK="$FLOCK" # Let the user override the test. +++else +++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +++for as_dir in $PATH +++do +++ IFS=$as_save_IFS +++ test -z "$as_dir" && as_dir=. +++ for ac_exec_ext in '' $ac_executable_extensions; do +++ if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then +++ ac_cv_prog_FLOCK="$srcdir/testsuite/flock" +++ $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 +++ break 2 +++ fi +++done +++ done +++IFS=$as_save_IFS +++ +++fi +++fi +++FLOCK=$ac_cv_prog_FLOCK +++if test -n "$FLOCK"; then +++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $FLOCK" >&5 +++$as_echo "$FLOCK" >&6; } +++else +++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +++$as_echo "no" >&6; } +++fi +++ +++ +++fi +++ ++ # Get target configury. ++ . ${srcdir}/configure.tgt ++ CFLAGS="$save_CFLAGS $XCFLAGS" ++--- a/src/libgomp/configure.ac +++++ b/src/libgomp/configure.ac ++@@ -339,6 +339,13 @@ fi ++ AX_COUNT_CPUS ++ AC_SUBST(CPU_COUNT) ++ +++AC_MSG_NOTICE([checking for flock implementation]) +++AC_CHECK_PROGS(FLOCK, flock) +++# Fallback if 'perl' is available. +++if test -z "$FLOCK"; then +++ AC_CHECK_PROG(FLOCK, perl, $srcdir/testsuite/flock) +++fi +++ ++ # Get target configury. ++ . ${srcdir}/configure.tgt ++ CFLAGS="$save_CFLAGS $XCFLAGS" ++--- a/src/libgomp/testsuite/Makefile.am +++++ b/src/libgomp/testsuite/Makefile.am ++@@ -12,6 +12,8 @@ _RUNTEST = $(shell if test -f $(top_srcdir)/../dejagnu/runtest; then \ ++ echo $(top_srcdir)/../dejagnu/runtest; else echo runtest; fi) ++ RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir ++ +++PWD_COMMAND = $${PWDCMD-pwd} +++ ++ EXTRA_DEJAGNU_SITE_CONFIG = libgomp-site-extra.exp ++ ++ # Instead of directly in ../testsuite/libgomp-test-support.exp.in, the ++@@ -25,17 +27,6 @@ libgomp-test-support.exp: libgomp-test-support.pt.exp Makefile ++ 'set offload_additional_lib_paths "$(offload_additional_lib_paths)"' ++ mv $@.tmp $@ ++ ++-check-DEJAGNU: site.exp ++- srcdir='$(srcdir)'; export srcdir; \ ++- EXPECT=$(EXPECT); export EXPECT; \ ++- if $(SHELL) -c "$(_RUNTEST) --version" > /dev/null 2>&1; then \ ++- exit_status=0; l='$(PACKAGE)'; for tool in $$l; do \ ++- if $(_RUNTEST) $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \ ++- then :; else exit_status=1; fi; \ ++- done; \ ++- else echo "WARNING: could not find '$(_RUNTEST)'" 1>&2; :;\ ++- fi; \ ++- exit $$exit_status ++ site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG) ++ @echo 'Making a new site.exp file ...' ++ @echo '## these variables are automatically generated by make ##' >site.tmp ++@@ -63,6 +54,72 @@ site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG) ++ @test ! -f site.exp || mv site.exp site.bak ++ @mv site.tmp site.exp ++ +++%/site.exp: site.exp +++ -@test -d $* || mkdir $* +++ @srcdir=`cd $(srcdir); ${PWD_COMMAND}`; +++ @objdir=`${PWD_COMMAND}`/$*; \ +++ sed -e "s|^set srcdir .*$$|set srcdir $$srcdir|" \ +++ -e "s|^set objdir .*$$|set objdir $$objdir|" \ +++ site.exp > $*/site.exp.tmp +++ @-rm -f $*/site.bak +++ @test ! -f $*/site.exp || mv $*/site.exp $*/site.bak +++ @mv $*/site.exp.tmp $*/site.exp +++ +++check_p_numbers0:=1 2 3 4 5 6 7 8 9 +++check_p_numbers1:=0 $(check_p_numbers0) +++check_p_numbers2:=$(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers1))) +++check_p_numbers3:=$(addprefix 0,$(check_p_numbers1)) $(check_p_numbers2) +++check_p_numbers4:=$(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers3))) +++check_p_numbers5:=$(addprefix 0,$(check_p_numbers3)) $(check_p_numbers4) +++check_p_numbers6:=$(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers5))) +++check_p_numbers:=$(check_p_numbers0) $(check_p_numbers2) $(check_p_numbers4) $(check_p_numbers6) +++# If unable to serialize execution testing, use just one parallel slot. +++gcc_test_parallel_slots:=$(if $(FLOCK),$(if $(GCC_TEST_PARALLEL_SLOTS),$(GCC_TEST_PARALLEL_SLOTS),19),1) +++check_p_subdirs=$(wordlist 1,$(gcc_test_parallel_slots),$(check_p_numbers)) +++check_DEJAGNU_libgomp_targets = $(addprefix check-DEJAGNUlibgomp,$(check_p_subdirs)) +++$(check_DEJAGNU_libgomp_targets): check-DEJAGNUlibgomp%: libgomp%/site.exp +++ +++check-DEJAGNU $(check_DEJAGNU_libgomp_targets): check-DEJAGNU%: site.exp +++ $(if $*,@)AR="$(AR)"; export AR; \ +++ RANLIB="$(RANLIB)"; export RANLIB; \ +++ if [ -z "$*" ] && [ -n "$(filter -j%, $(MFLAGS))" ]; then \ +++ rm -rf libgomp-parallel || true; \ +++ mkdir libgomp-parallel; \ +++ $(MAKE) $(AM_MAKEFLAGS) $(check_DEJAGNU_libgomp_targets); \ +++ rm -rf libgomp-parallel || true; \ +++ for idx in $(check_p_subdirs); do \ +++ if [ -d libgomp$$idx ]; then \ +++ mv -f libgomp$$idx/libgomp.sum libgomp$$idx/libgomp.sum.sep; \ +++ mv -f libgomp$$idx/libgomp.log libgomp$$idx/libgomp.log.sep; \ +++ fi; \ +++ done; \ +++ $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh \ +++ libgomp[0-9]*/libgomp.sum.sep > libgomp.sum; \ +++ $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh -L \ +++ libgomp[0-9]*/libgomp.log.sep > libgomp.log; \ +++ exit 0; \ +++ fi; \ +++ srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \ +++ EXPECT=$(EXPECT); export EXPECT; \ +++ runtest=$(_RUNTEST); \ +++ if [ -z "$$runtest" ]; then runtest=runtest; fi; \ +++ tool=libgomp; \ +++ if [ -n "$*" ]; then \ +++ if [ -f libgomp-parallel/finished ]; then rm -rf "$*"; exit 0; fi; \ +++ GCC_RUNTEST_PARALLELIZE_DIR=`${PWD_COMMAND}`/libgomp-parallel; \ +++ export GCC_RUNTEST_PARALLELIZE_DIR; \ +++ cd "$*"; \ +++ fi; \ +++ if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ +++ $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) \ +++ $(RUNTESTFLAGS); \ +++ if [ -n "$*" ]; then \ +++ touch $$GCC_RUNTEST_PARALLELIZE_DIR/finished; \ +++ fi; \ +++ else \ +++ echo "WARNING: could not find \`runtest'" 1>&2; :;\ +++ fi +++ ++ distclean-DEJAGNU: ++ -rm -f site.exp site.bak ++ -l='$(PACKAGE)'; for tool in $$l; do \ ++--- a/src/libgomp/testsuite/Makefile.in +++++ b/src/libgomp/testsuite/Makefile.in ++@@ -162,6 +162,7 @@ EXEEXT = @EXEEXT@ ++ FC = @FC@ ++ FCFLAGS = @FCFLAGS@ ++ FGREP = @FGREP@ +++FLOCK = @FLOCK@ ++ GREP = @GREP@ ++ HSA_RUNTIME_INCLUDE = @HSA_RUNTIME_INCLUDE@ ++ HSA_RUNTIME_LIB = @HSA_RUNTIME_LIB@ ++@@ -310,7 +311,20 @@ _RUNTEST = $(shell if test -f $(top_srcdir)/../dejagnu/runtest; then \ ++ echo $(top_srcdir)/../dejagnu/runtest; else echo runtest; fi) ++ ++ RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir +++PWD_COMMAND = $${PWDCMD-pwd} ++ EXTRA_DEJAGNU_SITE_CONFIG = libgomp-site-extra.exp +++check_p_numbers0 := 1 2 3 4 5 6 7 8 9 +++check_p_numbers1 := 0 $(check_p_numbers0) +++check_p_numbers2 := $(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers1))) +++check_p_numbers3 := $(addprefix 0,$(check_p_numbers1)) $(check_p_numbers2) +++check_p_numbers4 := $(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers3))) +++check_p_numbers5 := $(addprefix 0,$(check_p_numbers3)) $(check_p_numbers4) +++check_p_numbers6 := $(foreach i,$(check_p_numbers0),$(addprefix $(i),$(check_p_numbers5))) +++check_p_numbers := $(check_p_numbers0) $(check_p_numbers2) $(check_p_numbers4) $(check_p_numbers6) +++# If unable to serialize execution testing, use just one parallel slot. +++gcc_test_parallel_slots := $(if $(FLOCK),$(if $(GCC_TEST_PARALLEL_SLOTS),$(GCC_TEST_PARALLEL_SLOTS),19),1) +++check_p_subdirs = $(wordlist 1,$(gcc_test_parallel_slots),$(check_p_numbers)) +++check_DEJAGNU_libgomp_targets = $(addprefix check-DEJAGNUlibgomp,$(check_p_subdirs)) ++ all: all-am ++ ++ .SUFFIXES: ++@@ -485,17 +499,6 @@ libgomp-test-support.exp: libgomp-test-support.pt.exp Makefile ++ 'set offload_additional_lib_paths "$(offload_additional_lib_paths)"' ++ mv $@.tmp $@ ++ ++-check-DEJAGNU: site.exp ++- srcdir='$(srcdir)'; export srcdir; \ ++- EXPECT=$(EXPECT); export EXPECT; \ ++- if $(SHELL) -c "$(_RUNTEST) --version" > /dev/null 2>&1; then \ ++- exit_status=0; l='$(PACKAGE)'; for tool in $$l; do \ ++- if $(_RUNTEST) $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \ ++- then :; else exit_status=1; fi; \ ++- done; \ ++- else echo "WARNING: could not find '$(_RUNTEST)'" 1>&2; :;\ ++- fi; \ ++- exit $$exit_status ++ site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG) ++ @echo 'Making a new site.exp file ...' ++ @echo '## these variables are automatically generated by make ##' >site.tmp ++@@ -523,6 +526,59 @@ site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG) ++ @test ! -f site.exp || mv site.exp site.bak ++ @mv site.tmp site.exp ++ +++%/site.exp: site.exp +++ -@test -d $* || mkdir $* +++ @srcdir=`cd $(srcdir); ${PWD_COMMAND}`; +++ @objdir=`${PWD_COMMAND}`/$*; \ +++ sed -e "s|^set srcdir .*$$|set srcdir $$srcdir|" \ +++ -e "s|^set objdir .*$$|set objdir $$objdir|" \ +++ site.exp > $*/site.exp.tmp +++ @-rm -f $*/site.bak +++ @test ! -f $*/site.exp || mv $*/site.exp $*/site.bak +++ @mv $*/site.exp.tmp $*/site.exp +++$(check_DEJAGNU_libgomp_targets): check-DEJAGNUlibgomp%: libgomp%/site.exp +++ +++check-DEJAGNU $(check_DEJAGNU_libgomp_targets): check-DEJAGNU%: site.exp +++ $(if $*,@)AR="$(AR)"; export AR; \ +++ RANLIB="$(RANLIB)"; export RANLIB; \ +++ if [ -z "$*" ] && [ -n "$(filter -j%, $(MFLAGS))" ]; then \ +++ rm -rf libgomp-parallel || true; \ +++ mkdir libgomp-parallel; \ +++ $(MAKE) $(AM_MAKEFLAGS) $(check_DEJAGNU_libgomp_targets); \ +++ rm -rf libgomp-parallel || true; \ +++ for idx in $(check_p_subdirs); do \ +++ if [ -d libgomp$$idx ]; then \ +++ mv -f libgomp$$idx/libgomp.sum libgomp$$idx/libgomp.sum.sep; \ +++ mv -f libgomp$$idx/libgomp.log libgomp$$idx/libgomp.log.sep; \ +++ fi; \ +++ done; \ +++ $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh \ +++ libgomp[0-9]*/libgomp.sum.sep > libgomp.sum; \ +++ $(SHELL) $(srcdir)/../../contrib/dg-extract-results.sh -L \ +++ libgomp[0-9]*/libgomp.log.sep > libgomp.log; \ +++ exit 0; \ +++ fi; \ +++ srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \ +++ EXPECT=$(EXPECT); export EXPECT; \ +++ runtest=$(_RUNTEST); \ +++ if [ -z "$$runtest" ]; then runtest=runtest; fi; \ +++ tool=libgomp; \ +++ if [ -n "$*" ]; then \ +++ if [ -f libgomp-parallel/finished ]; then rm -rf "$*"; exit 0; fi; \ +++ GCC_RUNTEST_PARALLELIZE_DIR=`${PWD_COMMAND}`/libgomp-parallel; \ +++ export GCC_RUNTEST_PARALLELIZE_DIR; \ +++ cd "$*"; \ +++ fi; \ +++ if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ +++ $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) \ +++ $(RUNTESTFLAGS); \ +++ if [ -n "$*" ]; then \ +++ touch $$GCC_RUNTEST_PARALLELIZE_DIR/finished; \ +++ fi; \ +++ else \ +++ echo "WARNING: could not find \`runtest'" 1>&2; :;\ +++ fi +++ ++ distclean-DEJAGNU: ++ -rm -f site.exp site.bak ++ -l='$(PACKAGE)'; for tool in $$l; do \ ++--- a/src/libgomp/testsuite/config/default.exp +++++ b/src/libgomp/testsuite/config/default.exp ++@@ -13,5 +13,3 @@ ++ # You should have received a copy of the GNU General Public License ++ # along with this program; see the file COPYING3. If not see ++ # . ++- ++-load_lib "standard.exp" ++new file mode 100755 ++--- /dev/null +++++ b/src/libgomp/testsuite/flock ++@@ -0,0 +1,17 @@ +++#!/usr/bin/env perl +++ +++use strict; +++use warnings; +++ +++# Only arguments '--exclusive 1' exactly are supported. +++(@ARGV == 2) or die; +++my $mode = shift; +++($mode eq "--exclusive") or die; +++my $fd = shift; +++($fd eq "1") or die; +++ +++use Fcntl ':flock'; +++ +++open(my $fh, '>&=', 1) or die "open: $!"; +++ +++flock($fh, LOCK_EX) or die "flock: $!"; ++--- a/src/libgomp/testsuite/lib/libgomp.exp +++++ b/src/libgomp/testsuite/lib/libgomp.exp ++@@ -9,6 +9,7 @@ proc load_gcc_lib { filename } { ++ } ++ ++ load_lib dg.exp +++load_lib standard.exp ++ ++ # Required to use gcc-dg.exp - however, the latter should NOT be ++ # loaded until ${tool}_target_compile is defined since it uses that ++@@ -40,7 +41,12 @@ load_gcc_lib torture-options.exp ++ load_gcc_lib fortran-modules.exp ++ ++ # Try to load a test support file, built during libgomp configuration. ++-load_file libgomp-test-support.exp +++# Search in '..' vs. '.' to support parallel vs. sequential testing. +++if [info exists ::env(GCC_RUNTEST_PARALLELIZE_DIR)] { +++ load_file ../libgomp-test-support.exp +++} else { +++ load_file libgomp-test-support.exp +++} ++ ++ set dg-do-what-default run ++ ++@@ -319,6 +325,36 @@ proc libgomp_option_proc { option } { ++ } ++ } ++ +++if ![info exists ::env(GCC_RUNTEST_PARALLELIZE_DIR)] { +++ # No parallel testing. +++} elseif { $FLOCK == "" } { +++ # Using just one parallel slot. +++} else { +++ # Using several parallel slots. Override DejaGnu +++ # 'standard.exp:${tool}_load'... +++ rename libgomp_load standard_libgomp_load +++ proc libgomp_load { program args } { +++ # ... in order to serialize execution testing via an exclusive lock. +++ # We use stdout, as per +++ # "[...] FILEHANDLE [...] be open with write intent to use LOCK_EX". +++ set lock_file ../lock +++ set lock_kind --exclusive +++ set lock_fd [open $lock_file a+] +++ set lock_clock_begin [clock seconds] +++ global FLOCK +++ exec $FLOCK $lock_kind 1 >@ $lock_fd +++ set lock_clock_end [clock seconds] +++ verbose -log "Got ${FLOCK}('$lock_file', '$lock_kind') at [clock format $lock_clock_end] after [expr $lock_clock_end - $lock_clock_begin] s" 2 +++ +++ set result [standard_libgomp_load $program $args] +++ +++ # Unlock (implicit with 'close'). +++ close $lock_fd +++ +++ return $result +++ } +++} +++ ++ # Translate offload target to OpenACC device type. Return the empty string if ++ # not supported, and 'host' for offload target 'disable'. ++ proc offload_target_to_openacc_device_type { offload_target } { ++--- a/src/libgomp/testsuite/libgomp-site-extra.exp.in +++++ b/src/libgomp/testsuite/libgomp-site-extra.exp.in ++@@ -1 +1,2 @@ +++set FLOCK {@FLOCK@} ++ set GCC_UNDER_TEST {@CC@} ++--- a/src/libgomp/testsuite/libgomp.c++/c++.exp +++++ b/src/libgomp/testsuite/libgomp.c++/c++.exp ++@@ -66,13 +66,12 @@ if { $lang_test_file_found } { ++ ++ set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags" ++ if { [file exists $flags_file] } { ++- set libstdcxx_includes [exec sh $flags_file --build-includes] ++- } else { ++- set libstdcxx_includes "" +++ set lang_source_re {^.*\.[cC]$} +++ set lang_include_flags [exec sh $flags_file --build-includes] ++ } ++ ++ # Main loop. ++- dg-runtest $tests "" "$libstdcxx_includes $DEFAULT_CFLAGS" +++ dg-runtest $tests "" $DEFAULT_CFLAGS ++ } ++ ++ # See above. ++new file mode 100644 ++--- /dev/null +++++ b/src/libgomp/testsuite/libgomp.c-c++-common/non-rect-loop-1.c ++@@ -0,0 +1,72 @@ +++/* PR middle-end/111017 */ +++ +++#include +++ +++#define DIM 32 +++#define N (DIM*DIM) +++ +++int +++main () +++{ +++ int a[N], b[N], c[N]; +++ int dim = DIM; +++ +++ for (int i = 0; i < N; i++) +++ { +++ a[i] = 3*i; +++ b[i] = 7*i; +++ c[i] = 42; +++ } +++ +++ #pragma omp parallel for collapse(2) +++ for (int i = 0; i < DIM; i++) +++ for (int j = (i*DIM); j < (i*DIM + DIM); j++) +++ c[j] = a[j] + b[j]; +++ +++ for (int i = 0; i < DIM; i++) +++ for (int j = (i*DIM); j < (i*DIM + DIM); j++) +++ if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j) +++ __builtin_abort (); +++ for (int i = 0; i < N; i++) +++ c[i] = 42; +++ +++ #pragma omp parallel for collapse(2) +++ for (int i = 0; i < dim; i++) +++ for (int j = (i*dim); j < (i*dim + dim); j++) +++ c[j] = a[j] + b[j]; +++ +++ for (int i = 0; i < DIM; i++) +++ for (int j = (i*DIM); j < (i*DIM + DIM); j++) +++ if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j) +++ __builtin_abort (); +++ for (int i = 0; i < N; i++) +++ c[i] = 42; +++ +++ for (int dev = 0; dev <= omp_get_num_devices(); dev++) +++ { +++ #pragma omp target teams loop device(dev) map(to:a,b) map(from:c) +++ for (int i = 0; i < DIM; i++) +++ for (int j = (i*DIM); j < (i*DIM + DIM); j++) +++ c[j] = a[j] + b[j]; +++ +++ for (int i = 0; i < DIM; i++) +++ for (int j = (i*DIM); j < (i*DIM + DIM); j++) +++ if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j) +++ __builtin_abort (); +++ for (int i = 0; i < N; i++) +++ c[i] = 42; +++ +++ #pragma omp target teams loop device(dev) map(to:a,b) map(from:c) +++ for (int i = 0; i < dim; i++) +++ for (int j = (i*dim); j < (i*dim + dim); j++) +++ c[j] = a[j] + b[j]; +++ +++ for (int i = 0; i < DIM; i++) +++ for (int j = (i*DIM); j < (i*DIM + DIM); j++) +++ if (c[j] != a[j] + b[j] || c[j] != 3*j +7*j) +++ __builtin_abort (); +++ for (int i = 0; i < N; i++) +++ c[i] = 42; +++ } +++ return 0; +++} ++--- a/src/libgomp/testsuite/libgomp.oacc-c++/c++.exp +++++ b/src/libgomp/testsuite/libgomp.oacc-c++/c++.exp ++@@ -72,9 +72,8 @@ if { $lang_test_file_found } { ++ ++ set flags_file "${blddir}/../libstdc++-v3/scripts/testsuite_flags" ++ if { [file exists $flags_file] } { ++- set libstdcxx_includes [exec sh $flags_file --build-includes] ++- } else { ++- set libstdcxx_includes "" +++ set lang_source_re {^.*\.[cC]$} +++ set lang_include_flags [exec sh $flags_file --build-includes] ++ } ++ ++ # Test with all available offload targets, and with offloading disabled. ++@@ -147,7 +146,7 @@ if { $lang_test_file_found } { ++ } ++ } ++ ++- gcc-dg-runtest $tests "$tagopt" "$libstdcxx_includes" +++ gcc-dg-runtest $tests "$tagopt" "" ++ } ++ unset offload_target ++ } else { ++--- a/src/libphobos/ChangeLog +++++ b/src/libphobos/ChangeLog ++@@ -1,3 +1,15 @@ +++2023-11-07 Iain Buclaw +++ +++ Backported from master: +++ 2023-11-07 Iain Buclaw +++ +++ * libdruntime/core/cpuid.d (getCpuInfo0B): Limit number of times loop +++ runs. +++ +++2023-06-06 Iain Buclaw +++ +++ * src/MERGE: Merge upstream phobos 8e8aaae50. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/libphobos/libdruntime/core/cpuid.d +++++ b/src/libphobos/libdruntime/core/cpuid.d ++@@ -651,10 +651,12 @@ void getAMDcacheinfo() ++ // to determine number of processors. ++ void getCpuInfo0B() ++ { ++- int level=0; ++ int threadsPerCore; ++ uint a, b, c, d; ++- do { +++ // I'm not sure about this. The docs state that there +++ // are 2 hyperthreads per core if HT is factory enabled. +++ for (int level = 0; level < 2; level++) +++ { ++ version (GNU_OR_LDC) asm pure nothrow @nogc { ++ "cpuid" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "a" (0x0B), "c" (level); ++ } else asm pure nothrow @nogc { ++@@ -666,19 +668,20 @@ void getCpuInfo0B() ++ mov c, ECX; ++ mov d, EDX; ++ } ++- if (b!=0) { ++- // I'm not sure about this. The docs state that there ++- // are 2 hyperthreads per core if HT is factory enabled. ++- if (level==0) +++ if (b != 0) +++ { +++ if (level == 0) ++ threadsPerCore = b & 0xFFFF; ++- else if (level==1) { +++ else if (level == 1) +++ { ++ cpuFeatures.maxThreads = b & 0xFFFF; ++ cpuFeatures.maxCores = cpuFeatures.maxThreads / threadsPerCore; ++ } ++- ++ } ++- ++level; ++- } while (a!=0 || b!=0); +++ // Got "invalid domain" returned from cpuid +++ if (a == 0 && b == 0) +++ break; +++ } ++ } ++ ++ void cpuidX86() ++--- a/src/libphobos/src/MERGE +++++ b/src/libphobos/src/MERGE ++@@ -1,4 +1,4 @@ ++-5fef0d28fc873fb5a0dbfb9149759d76a7b9f1b7 +++8e8aaae5080ccc2e0a2202cbe9778dca96496a95 ++ ++ The first line of this file holds the git revision number of the last ++ merge done from the dlang/phobos repository. ++--- a/src/libphobos/src/std/container/array.d +++++ b/src/libphobos/src/std/container/array.d ++@@ -412,9 +412,9 @@ if (!is(immutable T == immutable bool)) ++ .destroy(e); ++ ++ static if (hasIndirections!T) ++- GC.removeRange(_payload.ptr); +++ GC.removeRange(cast(void*) _payload.ptr); ++ ++- free(_payload.ptr); +++ free(cast(void*) _payload.ptr); ++ } ++ ++ this(this) @disable; ++@@ -489,14 +489,14 @@ if (!is(immutable T == immutable bool)) ++ auto newPayload = newPayloadPtr[0 .. oldLength]; ++ ++ // copy old data over to new array ++- memcpy(newPayload.ptr, _payload.ptr, T.sizeof * oldLength); +++ memcpy(cast(void*) newPayload.ptr, cast(void*) _payload.ptr, T.sizeof * oldLength); ++ // Zero out unused capacity to prevent gc from seeing false pointers ++- memset(newPayload.ptr + oldLength, +++ memset( cast(void*) (newPayload.ptr + oldLength), ++ 0, ++ (elements - oldLength) * T.sizeof); ++- GC.addRange(newPayload.ptr, sz); ++- GC.removeRange(_payload.ptr); ++- free(_payload.ptr); +++ GC.addRange(cast(void*) newPayload.ptr, sz); +++ GC.removeRange(cast(void*) _payload.ptr); +++ free(cast(void*) _payload.ptr); ++ _payload = newPayload; ++ } ++ else ++@@ -611,12 +611,17 @@ if (!is(immutable T == immutable bool)) ++ return opEquals(rhs); ++ } ++ +++ // fix https://issues.dlang.org/show_bug.cgi?23140 +++ private alias Unshared(T) = T; +++ private alias Unshared(T: shared U, U) = U; +++ ++ /// ditto ++ bool opEquals(ref const Array rhs) const ++ { ++ if (empty) return rhs.empty; ++ if (rhs.empty) return false; ++- return _data._payload == rhs._data._payload; +++ +++ return cast(Unshared!(T)[]) _data._payload == cast(Unshared!(T)[]) rhs._data._payload; ++ } ++ ++ /** ++@@ -1740,6 +1745,16 @@ if (!is(immutable T == immutable bool)) ++ assertThrown!AssertError(array.length = 5); ++ } ++ +++// https://issues.dlang.org/show_bug.cgi?id=23140 +++@system unittest +++{ +++ shared class C +++ { +++ } +++ +++ Array!C ac; +++ ac = Array!C([new C]); +++} ++ //////////////////////////////////////////////////////////////////////////////// ++ // Array!bool ++ //////////////////////////////////////////////////////////////////////////////// ++--- a/src/libphobos/src/std/typecons.d +++++ b/src/libphobos/src/std/typecons.d ++@@ -3793,8 +3793,28 @@ Params: ++ sink.formatValue(_value, fmt); ++ } ++ } +++ +++ void toString()(scope void delegate(const(char)[]) sink, scope const ref FormatSpec!char fmt) const +++ { +++ if (isNull) +++ { +++ sink.formatValue("Nullable.null", fmt); +++ } +++ else +++ { +++ sink.formatValue(_value, fmt); +++ } +++ } ++ } ++ +++@system unittest +++{ +++ import std.conv : to; +++ +++ const Nullable!(ulong, 0) x = 1; +++ assert(x.to!string == "1"); +++} +++ ++ /** ++ Check if `this` is in the null state. ++ ++@@ -4320,8 +4340,28 @@ Params: ++ sink.formatValue(*_value, fmt); ++ } ++ } +++ +++ void toString()(scope void delegate(const(char)[]) sink, scope const ref FormatSpec!char fmt) const +++ { +++ if (isNull) +++ { +++ sink.formatValue("Nullable.null", fmt); +++ } +++ else +++ { +++ sink.formatValue(*_value, fmt); +++ } +++ } ++ } ++ +++@system unittest +++{ +++ import std.conv : to; +++ +++ const NullableRef!(ulong) x = new ulong(1); +++ assert(x.to!string == "1"); +++} +++ ++ /** ++ Binds the internal state to `value`. ++ ++--- a/src/libsanitizer/ChangeLog +++++ b/src/libsanitizer/ChangeLog ++@@ -1,3 +1,11 @@ +++2023-05-21 Iain Sandoe +++ +++ Backported from master: +++ 2023-04-18 Iain Sandoe +++ +++ * configure.tgt: Unsupport Darwin22+ until a mechanism can be found +++ to locate dyld in the shared cache. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/libsanitizer/configure.tgt +++++ b/src/libsanitizer/configure.tgt ++@@ -64,7 +64,7 @@ case "${target}" in ++ HWASAN_SUPPORTED=yes ++ fi ++ ;; ++- x86_64-*-darwin2* | x86_64-*-darwin1[2-9]* | i?86-*-darwin1[2-9]*) +++ x86_64-*-darwin2[01]* | x86_64-*-darwin1[2-9]* | i?86-*-darwin1[2-9]*) ++ TSAN_SUPPORTED=no ++ EXTRA_CXXFLAGS="${EXTRA_CXXFLAGS} -Wl,-undefined,dynamic_lookup" ++ ;; ++--- a/src/libstdc++-v3/ChangeLog +++++ b/src/libstdc++-v3/ChangeLog ++@@ -1,3 +1,671 @@ +++2024-01-11 Jonathan Wakely +++ +++ Backported from master: +++ 2024-01-05 Jonathan Wakely +++ +++ PR libstdc++/113200 +++ * include/bits/char_traits.h (__gnu_cxx::char_traits::move): Use +++ __builtin_constant_p to check for unrelated pointers that cannot +++ be compared during constant evaluation. +++ * testsuite/21_strings/char_traits/requirements/113200.cc: New +++ test. +++ +++2024-01-11 Ken Matsui +++ +++ Backported from master: +++ 2024-01-11 Ken Matsui +++ +++ PR libstdc++/113250 +++ * src/c++17/fs_ops.cc (fs::equivalent): Use || instead of &&. +++ * src/filesystem/ops.cc (fs::equivalent): Likewise. +++ * testsuite/27_io/filesystem/operations/equivalent.cc: Handle +++ error codes. +++ * testsuite/experimental/filesystem/operations/equivalent.cc: +++ Likewise. +++ +++2024-01-03 Patrick Palka +++ +++ Backported from master: +++ 2024-01-03 Patrick Palka +++ +++ PR testsuite/113175 +++ * testsuite/std/ranges/iota/max_size_type.cc (test02): Reduce +++ 'limit' to 100 from 1000 and adjust 'log2_limit' accordingly. +++ (test03): Likewise. +++ +++2023-12-16 Jakub Jelinek +++ +++ Backported from master: +++ 2023-10-13 Jakub Jelinek +++ +++ * testsuite/tr1/8_c_compatibility/cstdio/functions.cc (test01): +++ Initialize stream to va_arg(ap, FILE*) rather than 0. +++ * testsuite/tr1/8_c_compatibility/cwchar/functions.cc (test01): +++ Likewise. +++ +++2023-12-06 Jonathan Wakely +++ +++ Backported from master: +++ 2023-11-02 Jonathan Wakely +++ +++ PR libstdc++/112314 +++ * include/std/string_view (string_view::remove_suffix): Add +++ debug assertion. +++ * testsuite/21_strings/basic_string_view/modifiers/remove_prefix/debug.cc: +++ New test. +++ * testsuite/21_strings/basic_string_view/modifiers/remove_suffix/debug.cc: +++ New test. +++ +++2023-12-06 Jonathan Wakely +++ +++ Backported from master: +++ 2023-11-17 Jonathan Wakely +++ +++ * include/std/utility (in_range): Rename _Up parameter to _Res. +++ +++2023-11-15 Jonathan Wakely +++ +++ Backported from master: +++ 2023-11-15 Jonathan Wakely +++ +++ PR libstdc++/112491 +++ * python/libstdcxx/v6/xmethods.py (DequeWorkerBase.index): +++ Correctly handle unused capacity at the start of the first node. +++ * testsuite/libstdc++-xmethods/deque.cc: Check index operator +++ when elements have been removed from the front. +++ +++2023-11-15 Jonathan Wakely +++ +++ Backported from master: +++ 2023-11-15 Jonathan Wakely +++ +++ * include/std/stacktrace (basic_stacktrace::at): Fix class name +++ in exception message. +++ * testsuite/19_diagnostics/stacktrace/hash.cc: Do not fail if +++ current() returns a non-empty stacktrace. +++ +++2023-11-14 Jonathan Wakely +++ +++ Backported from master: +++ 2023-11-14 Jonathan Wakely +++ +++ PR libstdc++/112348 +++ * include/std/stacktrace (hash>): Fix +++ type of hash function for entries. +++ * testsuite/19_diagnostics/stacktrace/hash.cc: New test. +++ +++2023-11-14 Jonathan Wakely +++ +++ Backported from master: +++ 2023-11-14 Jonathan Wakely +++ +++ PR libstdc++/112491 +++ * python/libstdcxx/v6/xmethods.py (DequeWorkerBase.size): Fix +++ calculation to use _M_start._M_cur. +++ * testsuite/libstdc++-xmethods/deque.cc: Check failing cases. +++ +++2023-11-13 Tom Tromey +++ +++ Backported from master: +++ 2023-10-04 Tom Tromey +++ +++ * python/libstdcxx/v6/printers.py +++ (StdExpAnyPrinter.__init__): Qualify call to +++ _string_types. +++ +++2023-11-13 Tom Tromey +++ +++ Backported from master: +++ 2023-10-04 Tom Tromey +++ +++ * python/libstdcxx/v6/printers.py: Assume that +++ _versioned_namespace is non-None. +++ * python/libstdcxx/v6/xmethods.py (is_specialization_of): +++ Assume that _versioned_namespace is non-None. +++ +++2023-11-13 Tom Tromey +++ +++ Backported from master: +++ 2023-09-28 Tom Tromey +++ +++ * python/libstdcxx/v6/printers.py (Printer.add_version) +++ (add_one_template_type_printer) +++ (FilteringTypePrinter.add_one_type_printer): Use Python +++ "not in" operator. +++ +++2023-11-13 Tom Tromey +++ +++ Backported from master: +++ 2023-10-04 Tom Tromey +++ +++ * python/libstdcxx/v6/xmethods.py (_versioned_namespace): +++ Define. +++ +++2023-11-13 Jonathan Wakely +++ +++ Backported from master: +++ 2023-09-28 Jonathan Wakely +++ +++ * python/libstdcxx/v6/xmethods.py (is_specialization_of): Define +++ new function. +++ (ArrayMethodsMatcher, DequeMethodsMatcher) +++ (ForwardListMethodsMatcher, ListMethodsMatcher) +++ (VectorMethodsMatcher, AssociativeContainerMethodsMatcher) +++ (UniquePtrGetWorker, UniquePtrMethodsMatcher) +++ (SharedPtrSubscriptWorker, SharedPtrMethodsMatcher): Use +++ is_specialization_of instead of re.match. +++ +++2023-11-13 Jonathan Wakely +++ +++ Backported from master: +++ 2023-09-28 Jonathan Wakely +++ +++ * python/libstdcxx/v6/printers.py: Break long lines. Use raw +++ strings for regular expressions. Add whitespace around +++ operators. +++ (is_member_of_namespace): Use isinstance to check type. +++ (is_specialization_of): Likewise. Adjust template_name +++ for versioned namespace instead of duplicating the re.match +++ call. +++ (StdExpAnyPrinter._string_types): New static method. +++ (StdExpAnyPrinter.to_string): Use _string_types. +++ +++2023-11-13 Jonathan Wakely +++ +++ Backported from master: +++ 2023-09-28 Jonathan Wakely +++ +++ * python/libstdcxx/v6/printers.py: Format docstrings according +++ to PEP 257. +++ * python/libstdcxx/v6/xmethods.py: Likewise. +++ +++2023-11-13 Jonathan Wakely +++ +++ Backported from master: +++ 2023-09-12 Jonathan Wakely +++ +++ * python/libstdcxx/v6/printers.py: Reformat. +++ * python/libstdcxx/v6/xmethods.py: Likewise. +++ +++2023-11-06 Ian Lance Taylor +++ +++ PR libbacktrace/111315 +++ PR libbacktrace/112263 +++ * acinclude.m4: Set -D_GNU_SOURCE in BACKTRACE_CPPFLAGS and when +++ grepping link.h for dl_iterate_phdr. +++ * configure: Regenerate. +++ +++2023-10-25 Jonathan Wakely +++ +++ Backported from master: +++ 2023-10-25 Jonathan Wakely +++ +++ PR libstdc++/111936 +++ * src/libbacktrace/Makefile.am: Add -prefer-pic to libtool +++ compile commands. +++ * src/libbacktrace/Makefile.in: Regenerate. +++ +++2023-10-23 François Dumont +++ +++ * include/bits/hashtable_policy.h +++ (_Hash_code_base::_M_hash_code(const _Hash&, const _Hash_node_value<>&)): Remove. +++ (_Hash_code_base::_M_hash_code<_H2>(const _H2&, const _Hash_node_value<>&)): Remove. +++ * include/bits/hashtable.h +++ (_M_src_hash_code<_H2>(const _H2&, const key_type&, const __node_value_type&)): New. +++ (_M_merge_unique<>, _M_merge_multi<>): Use latter. +++ * testsuite/23_containers/unordered_map/modifiers/merge.cc +++ (test04, test05, test06): New test cases. +++ +++2023-10-03 Jonathan Wakely +++ +++ * include/bits/fs_dir.h (directory_iterator::operator==): +++ Define without using a non-exported shared_ptr symbol. +++ (recursive_directory_iterator::operator==): Likewise. +++ +++2023-10-03 Jonathan Wakely +++ +++ Backported from master: +++ 2023-09-01 Jonathan Wakely +++ +++ * testsuite/27_io/filesystem/path/108636.cc: Add dg-require for +++ filesystem support. +++ +++2023-10-03 Jonathan Wakely +++ +++ Backported from master: +++ 2023-06-06 Jonathan Wakely +++ +++ PR libstdc++/108178 +++ * src/filesystem/ops-common.h (do_copy_file): Check for empty +++ files by trying to read a character. +++ * testsuite/27_io/filesystem/operations/copy_file_108178.cc: +++ New test. +++ +++2023-10-03 Jonathan Wakely +++ +++ Backported from master: +++ 2023-06-06 Jonathan Wakely +++ +++ * src/filesystem/ops-common.h (do_copy_file) [O_CLOEXEC]: Set +++ close-on-exec flag on file descriptors. +++ +++2023-10-03 Jonathan Wakely +++ +++ Backported from master: +++ 2023-03-20 Jonathan Wakely +++ +++ * src/filesystem/ops-common.h (get_temp_directory_from_env): Fix +++ formatting. +++ +++2023-10-03 Jonathan Wakely +++ +++ Backported from master: +++ 2023-02-02 Jonathan Wakely +++ +++ * src/filesystem/ops-common.h [AVR] (__unsupported): Always use +++ errc::function_not_supported instead of errc::not_supported. +++ +++2023-10-02 Tim Song +++ +++ Backported from master: +++ 2023-09-28 Tim Song +++ +++ PR libstdc++/111050 +++ * include/bits/hashtable_policy.h +++ (_Hash_node_value_base<>::_M_valptr(), _Hash_node_value_base<>::_M_v()) +++ Add [[__gnu__::__always_inline__]]. +++ +++2023-09-27 Jonathan Wakely +++ +++ Backported from master: +++ 2023-08-09 Jonathan Wakely +++ +++ * include/experimental/bits/fs_path.h (path::string): Use +++ _GLIBCXX17_CONSTEXPR not _GLIBCXX_CONSTEXPR for 'if constexpr'. +++ * include/std/charconv (__to_chars_8): Initialize variable for +++ C++17 constexpr rules. +++ +++2023-09-26 Jonathan Wakely +++ +++ Backported from master: +++ 2023-09-25 Jonathan Wakely +++ +++ PR libstdc++/111511 +++ PR c++/111512 +++ * include/std/array (to_array): Qualify calls to __to_array. +++ * testsuite/23_containers/array/creation/111512.cc: New test. +++ +++2023-09-18 Jonathan Wakely +++ +++ Backported from master: +++ 2023-09-18 Jonathan Wakely +++ +++ * doc/xml/manual/configure.xml: Use conventional option name. +++ * doc/xml/manual/status_cxx2020.xml: Update. +++ * doc/html/*: Regenerate. +++ +++2023-09-14 Jonathan Wakely +++ +++ Backported from master: +++ 2023-09-14 Jonathan Wakely +++ +++ PR c++/111357 +++ * include/bits/utility.h (make_integer_sequence): Add cast. +++ * testsuite/20_util/integer_sequence/pr111357.cc: New test. +++ +++2023-07-12 Jonathan Wakely +++ +++ Backported from master: +++ 2023-07-12 Jonathan Wakely +++ +++ PR libstdc++/95048 +++ * testsuite/27_io/filesystem/path/construct/95048.cc: Check +++ conversions to wide strings. +++ * testsuite/experimental/filesystem/path/construct/95048.cc: +++ Likewise. +++ +++2023-07-06 Jonathan Wakely +++ +++ Backported from master: +++ 2023-07-06 Jonathan Wakely +++ +++ PR libstdc++/104299 +++ * doc/xml/manual/configure.xml: Describe stdio_pure argument to +++ --enable-cstdio. +++ * doc/html/manual/configure.html: Regenerate. +++ +++2023-06-23 Jonathan Wakely +++ +++ Backported from master: +++ 2023-06-01 Jonathan Wakely +++ +++ * doc/xml/manual/evolution.xml: Document removal of implicit +++ allocator rebinding extensions in strict mode and for C++20. +++ * doc/html/*: Regenerate. +++ +++2023-06-21 Jason Merrill +++ +++ PR tree-optimization/105651 +++ * include/bits/basic_string.tcc (_M_replace): Add an assert +++ to avoid -Wrestrict false positive. +++ +++2023-05-30 Alexandre Oliva +++ +++ Backported from master: +++ 2023-05-30 Alexandre Oliva +++ +++ * testsuite/20_util/from_chars/4.cc: Skip long double test06 +++ on x86_64-vxworks. +++ * testsuite/20_util/to_chars/long_double.cc: Xfail run on +++ x86_64-vxworks. +++ +++2023-05-30 Alexandre Oliva +++ +++ Backported from master: +++ 2023-05-25 Alexandre Oliva +++ +++ * testsuite/20_util/to_chars/long_double.cc: Expect execution +++ fail on x86-vxworks. +++ +++2023-05-30 Alexandre Oliva +++ +++ Backported from master: +++ 2023-05-05 Alexandre Oliva +++ +++ * testsuite/20_util/from_chars/4.cc: Skip long double test06 +++ on aarch64-vxworks. +++ * testsuite/20_util/to_chars/long_double.cc: Xfail run on +++ aarch64-vxworks. +++ +++2023-05-30 Matthias Kretz +++ +++ Backported from master: +++ 2023-05-30 Matthias Kretz +++ +++ PR libstdc++/109822 +++ * include/experimental/bits/simd.h (to_native): Use int NTTP +++ as specified in PTS2. +++ (to_compatible): Likewise. Add missing tag to call mask +++ generator ctor. +++ * testsuite/experimental/simd/pr109822_cast_functions.cc: New +++ test. +++ +++2023-05-30 Matthias Kretz +++ +++ Backported from master: +++ 2023-05-30 Matthias Kretz +++ +++ * testsuite/experimental/simd/tests/integer_operators.cc: +++ Compute expected value differently to avoid getting turned into +++ a vector shift. +++ +++2023-05-30 Matthias Kretz +++ +++ Backported from master: +++ 2023-05-30 Matthias Kretz +++ +++ * testsuite/experimental/simd/tests/operator_cvt.cc: Make long +++ double <-> (u)long conversion tests conditional on sizeof(long +++ double) and sizeof(long). +++ +++2023-05-30 Matthias Kretz +++ +++ Backported from master: +++ 2023-05-26 Matthias Kretz +++ +++ * include/experimental/bits/simd_ppc.h (_S_bit_shift_left): +++ Negative __y is UB, so prefer signed compare. +++ +++2023-05-24 Matthias Kretz +++ +++ Backported from master: +++ 2023-05-24 Matthias Kretz +++ +++ PR libstdc++/109949 +++ * include/experimental/bits/simd.h (__intrinsic_type): If +++ __ALTIVEC__ is defined, map gnu::vector_size types to their +++ corresponding __vector T types without losing unsignedness of +++ integer types. Also prefer long long over long. +++ * include/experimental/bits/simd_ppc.h (_S_popcount): Cast mask +++ object to the expected unsigned vector type. +++ +++2023-05-24 Matthias Kretz +++ +++ Backported from master: +++ 2023-05-24 Matthias Kretz +++ +++ PR libstdc++/109261 +++ * include/experimental/bits/simd.h (__intrinsic_type): +++ Specialize __intrinsic_type and +++ __intrinsic_type in any case, but provide the member +++ type only with __aarch64__. +++ +++2023-05-24 Matthias Kretz +++ +++ Backported from master: +++ 2023-05-24 Matthias Kretz +++ +++ PR libstdc++/109261 +++ * include/experimental/bits/simd_neon.h (_S_reduce): Add +++ constexpr and make NEON implementation conditional on +++ not __builtin_is_constant_evaluated. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-05-23 Matthias Kretz +++ +++ PR libstdc++/109261 +++ * include/experimental/bits/simd.h (_SimdWrapper::_M_set): +++ Avoid vector builtin subscripting in constant expressions. +++ (resizing_simd_cast): Avoid memcpy if constant_evaluated. +++ (const_where_expression, where_expression, where) +++ (__extract_part, simd_mask, _SimdIntOperators, simd): Add either +++ _GLIBCXX_SIMD_CONSTEXPR (on public APIs), or constexpr (on +++ internal APIs). +++ * include/experimental/bits/simd_builtin.h (__vector_permute) +++ (__vector_shuffle, __extract_part, _GnuTraits::_SimdCastType1) +++ (_GnuTraits::_SimdCastType2, _SimdImplBuiltin) +++ (_MaskImplBuiltin::_S_store): Add constexpr. +++ (_CommonImplBuiltin::_S_store_bool_array) +++ (_SimdImplBuiltin::_S_load, _SimdImplBuiltin::_S_store) +++ (_SimdImplBuiltin::_S_reduce, _MaskImplBuiltin::_S_load): Add +++ constant_evaluated case. +++ * include/experimental/bits/simd_fixed_size.h +++ (_S_masked_load): Reword comment. +++ (__tuple_element_meta, __make_meta, _SimdTuple::_M_apply_r) +++ (_SimdTuple::_M_subscript_read, _SimdTuple::_M_subscript_write) +++ (__make_simd_tuple, __optimize_simd_tuple, __extract_part) +++ (__autocvt_to_simd, _Fixed::__traits::_SimdBase) +++ (_Fixed::__traits::_SimdCastType, _SimdImplFixedSize): Add +++ constexpr. +++ (_SimdTuple::operator[], _M_set): Add constexpr and add +++ constant_evaluated case. +++ (_MaskImplFixedSize::_S_load): Add constant_evaluated case. +++ * include/experimental/bits/simd_scalar.h: Add constexpr. +++ * include/experimental/bits/simd_x86.h (_CommonImplX86): Add +++ constexpr and add constant_evaluated case. +++ (_SimdImplX86::_S_equal_to, _S_not_equal_to, _S_less) +++ (_S_less_equal): Value-initialize to satisfy constexpr +++ evaluation. +++ (_MaskImplX86::_S_load): Add constant_evaluated case. +++ (_MaskImplX86::_S_store): Add constexpr and constant_evaluated +++ case. Value-initialize local variables. +++ (_MaskImplX86::_S_logical_and, _S_logical_or, _S_bit_not) +++ (_S_bit_and, _S_bit_or, _S_bit_xor): Add constant_evaluated +++ case. +++ * testsuite/experimental/simd/pr109261_constexpr_simd.cc: New +++ test. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-05-22 Matthias Kretz +++ +++ * include/experimental/bits/simd_builtin.h (_S_fpclassify): Move +++ __infn into #ifdef'ed block. +++ * testsuite/experimental/simd/tests/fpclassify.cc: Declare +++ constants only when used. +++ * testsuite/experimental/simd/tests/frexp.cc: Likewise. +++ * testsuite/experimental/simd/tests/logarithm.cc: Likewise. +++ * testsuite/experimental/simd/tests/trunc_ceil_floor.cc: +++ Likewise. +++ * testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc: +++ Move totest and expect1 into #ifdef'ed block. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-03-28 Matthias Kretz +++ +++ * include/experimental/bits/simd.h (is_simd_flag_type): New. +++ (_IsSimdFlagType): New. +++ (copy_from, copy_to, load ctors): Constrain _Flags using +++ _IsSimdFlagType. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-03-28 Matthias Kretz +++ +++ * include/experimental/bits/simd_x86.h (_SimdImplX86): Use +++ _Base::_S_divides if the optimized _S_divides function is hidden +++ via the preprocessor. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-03-21 Matthias Kretz +++ +++ * include/experimental/bits/simd_detail.h: Don't declare the +++ simd API as constexpr with Clang. +++ * include/experimental/bits/simd_x86.h (__movm): New. +++ (_S_blend_avx512): Resolve FIXME. Implement blend using __movm +++ and ?:. +++ (_SimdImplX86::_S_masked_unary): Clang does not implement the +++ same builtins. Implement the function using __movm, ?:, and - +++ operators on vector_size types instead. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-02-24 Matthias Kretz +++ +++ * include/experimental/bits/simd.h: Line breaks and indenting +++ fixed to follow the libstdc++ standard. +++ * include/experimental/bits/simd_builtin.h: Likewise. +++ * include/experimental/bits/simd_fixed_size.h: Likewise. +++ * include/experimental/bits/simd_neon.h: Likewise. +++ * include/experimental/bits/simd_ppc.h: Likewise. +++ * include/experimental/bits/simd_scalar.h: Likewise. +++ * include/experimental/bits/simd_x86.h: Likewise. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-02-24 Matthias Kretz +++ +++ PR libstdc++/108030 +++ * include/experimental/bits/simd_fixed_size.h +++ (_SimdImplFixedSize::_S_broadcast): Replace inline with +++ _GLIBCXX_SIMD_INTRINSIC. +++ (_SimdImplFixedSize::_S_generate): Likewise. +++ (_SimdImplFixedSize::_S_load): Likewise. +++ (_SimdImplFixedSize::_S_masked_load): Likewise. +++ (_SimdImplFixedSize::_S_store): Likewise. +++ (_SimdImplFixedSize::_S_masked_store): Likewise. +++ (_SimdImplFixedSize::_S_min): Likewise. +++ (_SimdImplFixedSize::_S_max): Likewise. +++ (_SimdImplFixedSize::_S_complement): Likewise. +++ (_SimdImplFixedSize::_S_unary_minus): Likewise. +++ (_SimdImplFixedSize::_S_plus): Likewise. +++ (_SimdImplFixedSize::_S_minus): Likewise. +++ (_SimdImplFixedSize::_S_multiplies): Likewise. +++ (_SimdImplFixedSize::_S_divides): Likewise. +++ (_SimdImplFixedSize::_S_modulus): Likewise. +++ (_SimdImplFixedSize::_S_bit_and): Likewise. +++ (_SimdImplFixedSize::_S_bit_or): Likewise. +++ (_SimdImplFixedSize::_S_bit_xor): Likewise. +++ (_SimdImplFixedSize::_S_bit_shift_left): Likewise. +++ (_SimdImplFixedSize::_S_bit_shift_right): Likewise. +++ (_SimdImplFixedSize::_S_remquo): Add inline keyword (to be +++ explicit about not always-inline, yet). +++ (_SimdImplFixedSize::_S_isinf): Likewise. +++ (_SimdImplFixedSize::_S_isfinite): Likewise. +++ (_SimdImplFixedSize::_S_isnan): Likewise. +++ (_SimdImplFixedSize::_S_isnormal): Likewise. +++ (_SimdImplFixedSize::_S_signbit): Likewise. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-02-24 Matthias Kretz +++ +++ PR libstdc++/108856 +++ * include/experimental/bits/simd_builtin.h +++ (_SimdImplBuiltin::_S_masked_unary): More efficient +++ implementation of masked inc-/decrement for integers and floats +++ without AVX2. +++ * include/experimental/bits/simd_x86.h +++ (_SimdImplX86::_S_masked_unary): New. Use AVX512 masked subtract +++ builtins for masked inc-/decrement. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-02-23 Matthias Kretz +++ +++ * testsuite/experimental/simd/tests/reductions.cc: Introduce +++ max_distance as the type-dependent max error. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-02-23 Matthias Kretz +++ +++ PR libstdc++/108030 +++ * include/experimental/bits/simd_detail.h +++ (_GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA): Define as empty for +++ __clang__. +++ +++2023-05-23 Matthias Kretz +++ +++ Backported from master: +++ 2023-02-16 Matthias Kretz +++ +++ PR libstdc++/108030 +++ * include/experimental/bits/simd_detail.h: Define +++ _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA. +++ * include/experimental/bits/simd.h: Annotate lambdas with +++ _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA. +++ * include/experimental/bits/simd_builtin.h: Ditto. +++ * include/experimental/bits/simd_converter.h: Ditto. +++ * include/experimental/bits/simd_fixed_size.h: Ditto. +++ * include/experimental/bits/simd_math.h: Ditto. +++ * include/experimental/bits/simd_neon.h: Ditto. +++ * include/experimental/bits/simd_x86.h: Ditto. +++ +++2023-05-16 Jonathan Wakely +++ +++ Backported from master: +++ 2022-11-28 Jonathan Wakely +++ +++ PR libstdc++/107801 +++ * src/c++17/memory_resource.cc (chunk::_M_bytes): Change type +++ from uint32_t to bitset::size_type. Adjust static assertion. +++ (__pool_resource::_Pool::replenish): Cast to size_t after +++ multiplication instead of before. +++ (__pool_resource::_M_alloc_pools): Ensure both arguments to +++ std::max have type size_t. +++ +++2023-05-11 Jonathan Wakely +++ +++ Backported from master: +++ 2022-11-16 Jonathan Wakely +++ +++ * python/libstdcxx/v6/printers.py (StdExpAnyPrinter): Make +++ expansion of std::string in manager name more robust. +++ ++ 2023-05-08 Release Manager ++ ++ * GCC 12.3.0 released. ++--- a/src/libstdc++-v3/acinclude.m4 +++++ b/src/libstdc++-v3/acinclude.m4 ++@@ -4924,7 +4924,7 @@ AC_DEFUN([GLIBCXX_ENABLE_BACKTRACE], [ ++ ++ # Most of this is adapted from libsanitizer/configure.ac ++ ++- BACKTRACE_CPPFLAGS= +++ BACKTRACE_CPPFLAGS="-D_GNU_SOURCE" ++ ++ # libbacktrace only needs atomics for int, which we've already tested ++ if test "$glibcxx_cv_atomic_int" = "yes"; then ++@@ -4952,8 +4952,11 @@ AC_DEFUN([GLIBCXX_ENABLE_BACKTRACE], [ ++ have_dl_iterate_phdr=no ++ else ++ # When built as a GCC target library, we can't do a link test. +++ ac_save_CPPFLAGS="$CPPFLAGS" +++ CPPFLAGS="$CPPFLAGS -D_GNU_SOURCE" ++ AC_EGREP_HEADER([dl_iterate_phdr], [link.h], [have_dl_iterate_phdr=yes], ++ [have_dl_iterate_phdr=no]) +++ CPPFLAGS="$ac_save_CPPFLAGS" ++ fi ++ if test "$have_dl_iterate_phdr" = "yes"; then ++ BACKTRACE_CPPFLAGS="$BACKTRACE_CPPFLAGS -DHAVE_DL_ITERATE_PHDR=1" ++--- a/src/libstdc++-v3/configure +++++ b/src/libstdc++-v3/configure ++@@ -77316,7 +77316,7 @@ fi ++ ++ # Most of this is adapted from libsanitizer/configure.ac ++ ++- BACKTRACE_CPPFLAGS= +++ BACKTRACE_CPPFLAGS="-D_GNU_SOURCE" ++ ++ # libbacktrace only needs atomics for int, which we've already tested ++ if test "$glibcxx_cv_atomic_int" = "yes"; then ++@@ -77399,6 +77399,8 @@ done ++ have_dl_iterate_phdr=no ++ else ++ # When built as a GCC target library, we can't do a link test. +++ ac_save_CPPFLAGS="$CPPFLAGS" +++ CPPFLAGS="$CPPFLAGS -D_GNU_SOURCE" ++ cat confdefs.h - <<_ACEOF >conftest.$ac_ext ++ /* end confdefs.h. */ ++ #include ++@@ -77412,6 +77414,7 @@ else ++ fi ++ rm -f conftest* ++ +++ CPPFLAGS="$ac_save_CPPFLAGS" ++ fi ++ if test "$have_dl_iterate_phdr" = "yes"; then ++ BACKTRACE_CPPFLAGS="$BACKTRACE_CPPFLAGS -DHAVE_DL_ITERATE_PHDR=1" ++--- a/src/libstdc++-v3/doc/html/manual/api.html +++++ b/src/libstdc++-v3/doc/html/manual/api.html ++@@ -370,6 +370,11 @@ Calling a std::bind result as volatile was deprecated ++ For the non-default --enable-symvers=gnu-versioned-namespace ++ configuration, the shared library SONAME has been changed to ++ libstdc++.so.8. +++

+++ The extension allowing containers to be instantiated with an allocator +++ that doesn't match the container's value type is no longer allowed in +++ strict (-std=c++NN) modes, only in +++ -std=gnu++NN modes. ++

9

++ C++17 header ++ <memory_resource> ++@@ -425,6 +430,10 @@ Calling a std::bind result as volatile was deprecated ++ and ++ <stop_token> ++ added. +++

+++ The extension allowing containers to be instantiated with an allocator +++ that doesn't match the container's value type is no longer allowed in +++ C++20 mode, even in non-strict -std=gnu++20 mode. ++

11

++ The --enable-cheaders=c_std configuration ++ was deprecated. ++--- a/src/libstdc++-v3/doc/html/manual/configure.html +++++ b/src/libstdc++-v3/doc/html/manual/configure.html ++@@ -38,9 +38,14 @@ ++ 

++    --with-gxx-include-dir=/foo/H-x86-gcc-3-c-gxx-inc/include/4.4-20090404
--enable-cstdio

This is an abbreviated form of '--enable-cstdio=stdio' ++ (described next). ++-

--enable-cstdio=OPTION

Select a target-specific I/O package. At the moment, the only ++- choice is to use 'stdio', a generic "C" abstraction. ++- The default is 'stdio'. This option can change the library ABI. +++

--enable-cstdio=OPTION

Select a target-specific I/O package. The choices are 'stdio' +++ which is a generic abstraction using POSIX file I/O APIs +++ (read, write, +++ lseek, etc.), and 'stdio_pure' which is similar +++ but only uses standard C file I/O APIs (fread, +++ fwrite, fseek, etc.). +++ The 'stdio_posix' choice is a synonym for 'stdio'. +++ The default is 'stdio'. This option can change the library ABI. ++

--enable-clocale

This is an abbreviated form of '--enable-clocale=generic' ++ (described next). ++

--enable-clocale=OPTION

Select a target-specific underlying locale package. The ++@@ -203,8 +208,8 @@ ++ C++ includes. If enabled (as by default), and the compiler ++ seems capable of passing the simple sanity checks thrown at ++ it, try to build stdc++.h.gch as part of the make process. ++- In addition, this generated file is used later on (by appending ++- --include bits/stdc++.h to CXXFLAGS) when running the +++ In addition, this generated file is used later on (by appending +++ -include bits/stdc++.h to CXXFLAGS) when running the ++ testsuite. ++

--enable-extern-template[default]

Use extern template to pre-instantiate all required ++ specializations for certain types defined in the standard libraries. ++--- a/src/libstdc++-v3/doc/html/manual/status.html +++++ b/src/libstdc++-v3/doc/html/manual/status.html ++@@ -1325,10 +1325,10 @@ or any notes about the implementation. ++

9.1 __cpp_lib_type_identity >= 201806L (since 9.4, see Note 1)
unwrap_ref_decay and unwrap_reference ++ ++ P0318R1 ++- 9.1 __cpp_lib_unwrap_ref >= 201811L (since 9.4, see Note 1)
Improving Completeness Requirements for Type Traits +++ 9.1 __cpp_lib_unwrap_ref >= 201811L (since 9.4, see Note 1)
Improving Completeness Requirements for Type Traits ++ ++ P1285R0 ++- Partial  
Missing feature test macros +++ — Most misuses are diagnosed, but not all.
Missing feature test macros ++ ++ P1353R0 ++ 9.1  
Making std::underlying_type SFINAE-friendly ++@@ -1411,18 +1411,18 @@ or any notes about the implementation. ++ 10.1  
Ranges Design Cleanup ++ ++ P1252R2 ++- 10.1  
Avoid template bloat for safe_ranges in combination with ‘subrange-y’ view adaptors. +++ 10.1  
Avoid template bloat for safe_ranges in combination with ‘subrange-y’ view adaptors. ++ ++ P1739R4 ++-  
+++ 12.1  
++ Time, dates, calendars, time zones ++-
Extending chrono to Calendars and Time Zones +++
Extending chrono to Calendars and Time Zones ++ ++ P0355R7 ++-   __cpp_lib_chrono >= 201803L
Miscellaneous minor fixes for chrono +++ (see Note 2) __cpp_lib_chrono >= 201803L
Miscellaneous minor fixes for chrono ++ ++ P1466R3 ++-   __cpp_lib_chrono >= 201907L
<chrono> zero(), min(), and max() should be noexcept +++ (see Note 2) __cpp_lib_chrono >= 201907L
<chrono> zero(), min(), and max() should be noexcept ++ ++ P0972R0 ++ 9.1  
++@@ -1467,10 +1467,10 @@ or any notes about the implementation. ++
String Prefix and Suffix Checking ++ ++ P0457R2 ++- 9.1 __cpp_lib_starts_ends_with >= 201711L (since 9.4, see Note 1)
Update The Reference To The Unicode Standard +++ 9.1 __cpp_lib_starts_ends_with >= 201711L (since 9.4, see Note 1)
Update The Reference To The Unicode Standard ++ ++ P1025R1 ++-  
+++ — 
++ Containers ++
span: bounds-safe views for sequences of objects ++ ++@@ -1492,10 +1492,10 @@ or any notes about the implementation. ++ 10.1 __cpp_lib_to_array >= 201907L
Checking for Existence of an Element in Associative Containers ++ ++ P0458R2 ++- 9.1  
Comparing Unordered Containers +++ 9.1  
Comparing Unordered Containers ++ ++ P0809R0 ++-  
Heterogeneous lookup for unordered containers +++ —  
Heterogeneous lookup for unordered containers ++ ++ P0919R3 ++ 11.1 __cpp_lib_generic_unordered_lookup >= 201811
Refinement Proposal for P0919 ++@@ -1567,7 +1567,7 @@ or any notes about the implementation. ++ 9.1  
Thou Shalt Not Specialize std Function Templates! ++ ++ P0551R3 ++-  
Bit-casting object representations +++ These changes will not be implemented.
Bit-casting object representations ++ ++ P0476R2 ++ 11.1 __cpp_lib_bit_cast >= 201806L
Integral power-of-2 operations ++@@ -1588,10 +1588,10 @@ or any notes about the implementation. ++ —  
Add shift to <algorithm> ++ ++ P0769R2 ++- 10.1 __cpp_lib_shift >= 201806L
Standard Library Specification in a Concepts and Contracts World +++ 10.1 __cpp_lib_shift >= 201806L
Standard Library Specification in a Concepts and Contracts World ++ ++ P0788R3 ++-  
explicit(bool) +++ —  
explicit(bool) ++ ++ P0892R2 ++ —  
Eradicating unnecessarily explicit default constructors from the standard library ++@@ -1627,10 +1627,10 @@ or any notes about the implementation. ++ 7.1  
Editorial Guidance for merging P0019r8 and P0528r3 ++ ++ P1123R0 ++- —  
Cleaning up Clause 20 +++ —  
Cleaning up Clause 20 ++ ++ P1148R0 ++-  
Completing the Rebase of Library Fundamentals, Version 3, Working Draft +++ —  
Completing the Rebase of Library Fundamentals, Version 3, Working Draft ++ ++ P1210R0 ++  
Alternative Wording for P0907R4 Signed Integers are Two's Complement ++@@ -1666,13 +1666,13 @@ or any notes about the implementation. ++ ++ ++ P1463R1 ++- 10.1  
+++ 10.1  
++ Mandating the Standard Library: ++ Clause 22 - Iterators library ++ ++ ++ P1464R1 ++-  
Make create_directory() Intuitive +++ —  
Make create_directory() Intuitive ++ ++ P1164R1 ++ ++@@ -1708,6 +1708,9 @@ or any notes about the implementation. ++ Note 1: This feature is supported in older releases but the ++ __cpp_lib macro is not defined to the right value ++ (or not defined at all) until the version shown in parentheses. +++

+++Note 2: The C++20 calendar types are supported since 11.1, +++time zones, UTC, formatting and parsing are not supported. ++

C++ 2023

++ In this implementation the -std=gnu++23 or ++ -std=c++23 flag must be used to enable language ++--- a/src/libstdc++-v3/doc/xml/manual/configure.xml +++++ b/src/libstdc++-v3/doc/xml/manual/configure.xml ++@@ -74,9 +74,14 @@ ++ ++ ++ --enable-cstdio=OPTION ++- Select a target-specific I/O package. At the moment, the only ++- choice is to use 'stdio', a generic "C" abstraction. ++- The default is 'stdio'. This option can change the library ABI. +++ Select a target-specific I/O package. The choices are 'stdio' +++ which is a generic abstraction using POSIX file I/O APIs +++ (read, write, +++ lseek, etc.), and 'stdio_pure' which is similar +++ but only uses standard C file I/O APIs (fread, +++ fwrite, fseek, etc.). +++ The 'stdio_posix' choice is a synonym for 'stdio'. +++ The default is 'stdio'. This option can change the library ABI. ++ ++ ++ ++@@ -336,8 +341,8 @@ ++ C++ includes. If enabled (as by default), and the compiler ++ seems capable of passing the simple sanity checks thrown at ++ it, try to build stdc++.h.gch as part of the make process. ++- In addition, this generated file is used later on (by appending ++- --include bits/stdc++.h to CXXFLAGS) when running the +++ In addition, this generated file is used later on (by appending +++ -include bits/stdc++.h to CXXFLAGS) when running the ++ testsuite. ++ ++ ++--- a/src/libstdc++-v3/doc/xml/manual/evolution.xml +++++ b/src/libstdc++-v3/doc/xml/manual/evolution.xml ++@@ -915,6 +915,13 @@ Calling a std::bind result as volatile was deprecated for C++17. ++ libstdc++.so.8. ++ ++ +++ +++ The extension allowing containers to be instantiated with an allocator +++ that doesn't match the container's value type is no longer allowed in +++ strict () modes, only in +++ modes. +++ +++ ++ ++ ++

<constant>9</constant> ++@@ -998,6 +1005,12 @@ Calling a std::bind result as volatile was deprecated for C++17. ++ added. ++ ++ +++ +++ The extension allowing containers to be instantiated with an allocator +++ that doesn't match the container's value type is no longer allowed in +++ C++20 mode, even in non-strict mode. +++ +++ ++
++ ++
<constant>11</constant> ++--- a/src/libstdc++-v3/doc/xml/manual/status_cxx2020.xml +++++ b/src/libstdc++-v3/doc/xml/manual/status_cxx2020.xml ++@@ -251,14 +251,13 @@ or any notes about the implementation. ++ ++ ++ ++- ++ Improving Completeness Requirements for Type Traits ++ ++ ++ P1285R0 ++ ++- Partial ++- +++ — +++ Most misuses are diagnosed, but not all. ++ ++ ++ ++@@ -542,13 +541,12 @@ or any notes about the implementation. ++ ++ ++ ++- ++ Avoid template bloat for safe_ranges in combination with ‘subrange-y’ view adaptors. ++ ++ ++ P1739R4 ++ ++- +++ 12.1 ++ ++ ++ ++@@ -560,24 +558,23 @@ or any notes about the implementation. ++ ++ ++ ++- +++ ++ Extending chrono to Calendars and Time Zones ++ ++ ++ P0355R7 ++ ++- +++ (see Note 2) ++ __cpp_lib_chrono >= 201803L ++ ++ ++ ++- ++ Miscellaneous minor fixes for chrono ++ ++ ++ P1466R3 ++ ++- +++ (see Note 2) ++ __cpp_lib_chrono >= 201907L ++ ++ ++@@ -717,13 +714,12 @@ or any notes about the implementation. ++ ++ ++ ++- ++ Update The Reference To The Unicode Standard ++ ++ ++ P1025R1 ++ ++- +++ — ++ ++ ++ ++@@ -797,13 +793,12 @@ or any notes about the implementation. ++ ++ ++ ++- ++ Comparing Unordered Containers ++ ++ ++ P0809R0 ++ ++- +++ — ++ ++ ++ ++@@ -1030,7 +1025,7 @@ or any notes about the implementation. ++ P0551R3 ++ ++ ++- +++ These changes will not be implemented. ++ ++ ++ ++@@ -1104,13 +1099,12 @@ or any notes about the implementation. ++ ++ ++ ++- ++ Standard Library Specification in a Concepts and Contracts World ++ ++ ++ P0788R3 ++ ++- +++ — ++ ++ ++ ++@@ -1235,13 +1229,12 @@ or any notes about the implementation. ++ ++ ++ ++- ++ Cleaning up Clause 20 ++ ++ ++ P1148R0 ++ ++- +++ — ++ ++ ++ ++@@ -1332,7 +1325,6 @@ or any notes about the implementation. ++ ++ ++ ++- ++ ++ Mandating the Standard Library: ++ Clause 22 - Iterators library ++@@ -1341,7 +1333,7 @@ or any notes about the implementation. ++ ++ P1464R1 ++ ++- +++ — ++ ++ ++ ++@@ -1450,4 +1442,9 @@ Note 1: This feature is supported in older releases but the ++ (or not defined at all) until the version shown in parentheses. ++ ++ +++ +++Note 2: The C++20 calendar types are supported since 11.1, +++time zones, UTC, formatting and parsing are not supported. +++ +++ ++
++--- a/src/libstdc++-v3/include/bits/basic_string.tcc +++++ b/src/libstdc++-v3/include/bits/basic_string.tcc ++@@ -529,6 +529,10 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION ++ { ++ const size_type __nleft = (__p + __len1) - __s; ++ this->_S_move(__p, __s, __nleft); +++ // Tell the middle-end that the copy can't overlap +++ // (PR105651). +++ if (__len2 < __nleft) +++ __builtin_unreachable(); ++ this->_S_copy(__p + __nleft, __p + __len2, ++ __len2 - __nleft); ++ } ++--- a/src/libstdc++-v3/include/bits/char_traits.h +++++ b/src/libstdc++-v3/include/bits/char_traits.h ++@@ -210,8 +210,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION ++ #if __cplusplus >= 202002L ++ if (std::__is_constant_evaluated()) ++ { ++- if (__s1 == __s2) // unlikely, but saves a lot of work ++- return __s1; ++ #if __cpp_constexpr_dynamic_alloc ++ // The overlap detection below fails due to PR c++/89074, ++ // so use a temporary buffer instead. ++@@ -220,17 +218,9 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION ++ copy(__s1, __tmp, __n); ++ delete[] __tmp; ++ #else ++- const auto __end = __s2 + __n - 1; ++- bool __overlap = false; ++- for (std::size_t __i = 0; __i < __n - 1; ++__i) ++- { ++- if (__s1 + __i == __end) ++- { ++- __overlap = true; ++- break; ++- } ++- } ++- if (__overlap) +++ // Use __builtin_constant_p to avoid comparing unrelated pointers. +++ if (__builtin_constant_p(__s2 < __s1) +++ && __s1 > __s2 && __s1 < (__s2 + __n)) ++ { ++ do ++ { ++--- a/src/libstdc++-v3/include/bits/fs_dir.h +++++ b/src/libstdc++-v3/include/bits/fs_dir.h ++@@ -433,7 +433,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CXX11 ++ // _GLIBCXX_RESOLVE_LIB_DEFECTS ++ // 3719. Directory iterators should be usable with default sentinel ++ bool operator==(default_sentinel_t) const noexcept ++- { return !_M_dir; } +++ { return *this == directory_iterator(); } ++ #endif ++ ++ #if __cpp_impl_three_way_comparison < 201907L ++@@ -541,7 +541,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CXX11 ++ // _GLIBCXX_RESOLVE_LIB_DEFECTS ++ // 3719. Directory iterators should be usable with default sentinel ++ bool operator==(default_sentinel_t) const noexcept ++- { return !_M_dirs; } +++ { return *this == recursive_directory_iterator(); } ++ #endif ++ ++ #if __cpp_impl_three_way_comparison < 201907L ++--- a/src/libstdc++-v3/include/bits/hashtable.h +++++ b/src/libstdc++-v3/include/bits/hashtable.h ++@@ -1055,6 +1055,20 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION ++ return { __n, this->_M_node_allocator() }; ++ } ++ +++ // Only use the possibly cached node's hash code if its hash function +++ // _H2 matches _Hash and is stateless. Otherwise recompute it using _Hash. +++ template +++ __hash_code +++ _M_src_hash_code(const _H2&, const key_type& __k, +++ const __node_value_type& __src_n) const +++ { +++ if constexpr (std::is_same_v<_H2, _Hash>) +++ if constexpr (std::is_empty_v<_Hash>) +++ return this->_M_hash_code(__src_n); +++ +++ return this->_M_hash_code(__k); +++ } +++ ++ public: ++ // Extract a node. ++ node_type ++@@ -1092,7 +1106,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION ++ auto __pos = __i++; ++ const key_type& __k = _ExtractKey{}(*__pos); ++ __hash_code __code ++- = this->_M_hash_code(__src.hash_function(), *__pos._M_cur); +++ = _M_src_hash_code(__src.hash_function(), __k, *__pos._M_cur); ++ size_type __bkt = _M_bucket_index(__code); ++ if (_M_find_node(__bkt, __k, __code) == nullptr) ++ { ++@@ -1120,8 +1134,9 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION ++ for (auto __i = __src.cbegin(), __end = __src.cend(); __i != __end;) ++ { ++ auto __pos = __i++; +++ const key_type& __k = _ExtractKey{}(*__pos); ++ __hash_code __code ++- = this->_M_hash_code(__src.hash_function(), *__pos._M_cur); +++ = _M_src_hash_code(__src.hash_function(), __k, *__pos._M_cur); ++ auto __nh = __src.extract(__pos); ++ __hint = _M_insert_multi_node(__hint, __code, __nh._M_ptr)._M_cur; ++ __nh._M_ptr = nullptr; ++--- a/src/libstdc++-v3/include/bits/hashtable_policy.h +++++ b/src/libstdc++-v3/include/bits/hashtable_policy.h ++@@ -291,18 +291,22 @@ namespace __detail ++ ++ __gnu_cxx::__aligned_buffer<_Value> _M_storage; ++ +++ [[__gnu__::__always_inline__]] ++ _Value* ++ _M_valptr() noexcept ++ { return _M_storage._M_ptr(); } ++ +++ [[__gnu__::__always_inline__]] ++ const _Value* ++ _M_valptr() const noexcept ++ { return _M_storage._M_ptr(); } ++ +++ [[__gnu__::__always_inline__]] ++ _Value& ++ _M_v() noexcept ++ { return *_M_valptr(); } ++ +++ [[__gnu__::__always_inline__]] ++ const _Value& ++ _M_v() const noexcept ++ { return *_M_valptr(); } ++@@ -1279,19 +1283,6 @@ namespace __detail ++ return _M_hash()(__k); ++ } ++ ++- __hash_code ++- _M_hash_code(const _Hash&, ++- const _Hash_node_value<_Value, true>& __n) const ++- { return __n._M_hash_code; } ++- ++- // Compute hash code using _Hash as __n _M_hash_code, if present, was ++- // computed using _H2. ++- template ++- __hash_code ++- _M_hash_code(const _H2&, ++- const _Hash_node_value<_Value, __cache_hash_code>& __n) const ++- { return _M_hash_code(_ExtractKey{}(__n._M_v())); } ++- ++ __hash_code ++ _M_hash_code(const _Hash_node_value<_Value, false>& __n) const ++ { return _M_hash_code(_ExtractKey{}(__n._M_v())); } ++--- a/src/libstdc++-v3/include/bits/utility.h +++++ b/src/libstdc++-v3/include/bits/utility.h ++@@ -173,7 +173,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION ++ #if __has_builtin(__make_integer_seq) ++ = __make_integer_seq; ++ #else ++- = integer_sequence<_Tp, __integer_pack(_Num)...>; +++ = integer_sequence<_Tp, __integer_pack(_Tp(_Num))...>; ++ #endif ++ ++ /// Alias template index_sequence ++--- a/src/libstdc++-v3/include/experimental/bits/fs_path.h +++++ b/src/libstdc++-v3/include/experimental/bits/fs_path.h ++@@ -1049,7 +1049,7 @@ namespace __detail ++ inline std::basic_string<_CharT, _Traits, _Allocator> ++ path::string(const _Allocator& __a) const ++ { ++- if _GLIBCXX_CONSTEXPR (is_same<_CharT, value_type>::value) +++ if _GLIBCXX17_CONSTEXPR (is_same<_CharT, value_type>::value) ++ return { _M_pathname.begin(), _M_pathname.end(), __a }; ++ ++ using _WString = basic_string<_CharT, _Traits, _Allocator>; ++--- a/src/libstdc++-v3/include/experimental/bits/simd.h +++++ b/src/libstdc++-v3/include/experimental/bits/simd.h ++@@ -180,10 +180,7 @@ struct vector_aligned_tag ++ template ++ _GLIBCXX_SIMD_INTRINSIC static constexpr _Up* ++ _S_apply(_Up* __ptr) ++- { ++- return static_cast<_Up*>( ++- __builtin_assume_aligned(__ptr, _S_alignment<_Tp, _Up>)); ++- } +++ { return static_cast<_Up*>(__builtin_assume_aligned(__ptr, _S_alignment<_Tp, _Up>)); } ++ }; ++ ++ template struct overaligned_tag ++@@ -288,13 +285,15 @@ namespace __detail ++ // expression. math_errhandling may expand to an extern symbol, in which case a constexpr value ++ // must be guessed. ++ template ++- constexpr bool __handle_fpexcept_impl(int) +++ constexpr bool +++ __handle_fpexcept_impl(int) ++ { return math_errhandling & MATH_ERREXCEPT; } ++ #endif ++ ++ // Fallback if math_errhandling doesn't work: with fast-math assume floating-point exceptions are ++ // ignored, otherwise implement correct exception behavior. ++- constexpr bool __handle_fpexcept_impl(float) +++ constexpr bool +++ __handle_fpexcept_impl(float) ++ { ++ #if defined __FAST_MATH__ ++ return false; ++@@ -609,28 +608,34 @@ template ++ operator&(_Ip __rhs) const ++ { ++ return __generate_from_n_evaluations<_Np, _Ip>( ++- [&](auto __i) { return __rhs._M_data[__i] & _M_data[__i]; }); +++ [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ return __rhs._M_data[__i] & _M_data[__i]; +++ }); ++ } ++ ++ _GLIBCXX_SIMD_INTRINSIC constexpr _Ip ++ operator|(_Ip __rhs) const ++ { ++ return __generate_from_n_evaluations<_Np, _Ip>( ++- [&](auto __i) { return __rhs._M_data[__i] | _M_data[__i]; }); +++ [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ return __rhs._M_data[__i] | _M_data[__i]; +++ }); ++ } ++ ++ _GLIBCXX_SIMD_INTRINSIC constexpr _Ip ++ operator^(_Ip __rhs) const ++ { ++ return __generate_from_n_evaluations<_Np, _Ip>( ++- [&](auto __i) { return __rhs._M_data[__i] ^ _M_data[__i]; }); +++ [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ return __rhs._M_data[__i] ^ _M_data[__i]; +++ }); ++ } ++ ++ _GLIBCXX_SIMD_INTRINSIC constexpr _Ip ++ operator~() const ++ { ++ return __generate_from_n_evaluations<_Np, _Ip>( ++- [&](auto __i) { return ~_M_data[__i]; }); +++ [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return ~_M_data[__i]; }); ++ } ++ }; ++ return _Ip{}; ++@@ -743,8 +748,7 @@ template ++ // __invoke_ub{{{ ++ template ++ [[noreturn]] _GLIBCXX_SIMD_ALWAYS_INLINE void ++- __invoke_ub([[maybe_unused]] const char* __msg, ++- [[maybe_unused]] const _Args&... __args) +++ __invoke_ub([[maybe_unused]] const char* __msg, [[maybe_unused]] const _Args&... __args) ++ { ++ #ifdef _GLIBCXX_DEBUG_UB ++ __builtin_fprintf(stderr, __msg, __args...); ++@@ -789,11 +793,14 @@ class _ExactBool ++ const bool _M_data; ++ ++ public: ++- _GLIBCXX_SIMD_INTRINSIC constexpr _ExactBool(bool __b) : _M_data(__b) {} +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _ExactBool(bool __b) : _M_data(__b) {} ++ ++ _ExactBool(int) = delete; ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr operator bool() const { return _M_data; } +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ operator bool() const +++ { return _M_data; } ++ }; ++ ++ // }}} ++@@ -1391,7 +1398,7 @@ template ++ operator^=(const _BitMask& __b) & noexcept ++ { ++ __execute_n_times<_S_array_size>( ++- [&](auto __i) { _M_bits[__i] ^= __b._M_bits[__i]; }); +++ [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { _M_bits[__i] ^= __b._M_bits[__i]; }); ++ return *this; ++ } ++ ++@@ -1399,7 +1406,7 @@ template ++ operator|=(const _BitMask& __b) & noexcept ++ { ++ __execute_n_times<_S_array_size>( ++- [&](auto __i) { _M_bits[__i] |= __b._M_bits[__i]; }); +++ [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { _M_bits[__i] |= __b._M_bits[__i]; }); ++ return *this; ++ } ++ ++@@ -1407,7 +1414,7 @@ template ++ operator&=(const _BitMask& __b) & noexcept ++ { ++ __execute_n_times<_S_array_size>( ++- [&](auto __i) { _M_bits[__i] &= __b._M_bits[__i]; }); +++ [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { _M_bits[__i] &= __b._M_bits[__i]; }); ++ return *this; ++ } ++ ++@@ -1482,8 +1489,7 @@ template ++ ++ // else, use GNU-style builtin vector types ++ template ++- struct __vector_type_n<_Tp, _Np, ++- enable_if_t<__is_vectorizable_v<_Tp> && _Np >= 2>> +++ struct __vector_type_n<_Tp, _Np, enable_if_t<__is_vectorizable_v<_Tp> && _Np >= 2>> ++ { ++ static constexpr size_t _S_Np2 = std::__bit_ceil(_Np * sizeof(_Tp)); ++ ++@@ -1764,8 +1770,7 @@ template ++ // }}} ++ // __to_intrin {{{ ++ template , ++- typename _R ++- = __intrinsic_type_t> +++ typename _R = __intrinsic_type_t> ++ _GLIBCXX_SIMD_INTRINSIC constexpr _R ++ __to_intrin(_Tp __x) ++ { ++@@ -1786,9 +1791,7 @@ template , ++ template ++ _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, sizeof...(_Args)> ++ __make_vector(const _Args&... __args) ++- { ++- return __vector_type_t<_Tp, sizeof...(_Args)>{static_cast<_Tp>(__args)...}; ++- } +++ { return __vector_type_t<_Tp, sizeof...(_Args)>{static_cast<_Tp>(__args)...}; } ++ ++ // }}} ++ // __vector_broadcast{{{ ++@@ -1807,10 +1810,7 @@ template ++ template ++ _GLIBCXX_SIMD_INTRINSIC constexpr __vector_type_t<_Tp, _Np> ++ __generate_vector_impl(_Gp&& __gen, index_sequence<_I...>) ++- { ++- return __vector_type_t<_Tp, _Np>{ ++- static_cast<_Tp>(__gen(_SizeConstant<_I>()))...}; ++- } +++ { return __vector_type_t<_Tp, _Np>{ static_cast<_Tp>(__gen(_SizeConstant<_I>()))...}; } ++ ++ template , typename _Gp> ++ _GLIBCXX_SIMD_INTRINSIC constexpr _V ++@@ -2023,8 +2023,7 @@ template > ++ // }}} ++ // __concat{{{ ++ template , ++- typename _R = __vector_type_t> +++ typename _R = __vector_type_t> ++ constexpr _R ++ __concat(_Tp a_, _Tp b_) ++ { ++@@ -2168,8 +2167,7 @@ template , ++- typename _R = __vector_type_t> +++ typename _R = __vector_type_t> ++ _GLIBCXX_SIMD_INTRINSIC constexpr _R ++ __extract(_Tp __in) ++ { ++@@ -2206,7 +2204,7 @@ template ( ++- __x, [](auto... __entries) { +++ __x, [](auto... __entries) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { ++ return reinterpret_cast<_R>(_Up{__entries...}); ++ }); ++ } ++@@ -2215,8 +2213,7 @@ template ::value_type>> +++ typename _R = __vector_type8_t::value_type>> ++ _GLIBCXX_SIMD_INTRINSIC constexpr _R ++ __lo64(_Tp __x) ++ { ++@@ -2226,8 +2223,7 @@ template ::value_type>> +++ typename _R = __vector_type8_t::value_type>> ++ _GLIBCXX_SIMD_INTRINSIC constexpr _R ++ __hi64(_Tp __x) ++ { ++@@ -2238,8 +2234,7 @@ template ::value_type>> +++ typename _R = __vector_type8_t::value_type>> ++ _GLIBCXX_SIMD_INTRINSIC constexpr _R ++ __hi64z([[maybe_unused]] _Tp __x) ++ { ++@@ -2350,18 +2345,15 @@ template <> ++ // the following excludes bool via __is_vectorizable ++ #if _GLIBCXX_SIMD_HAVE_SSE ++ template ++- struct __intrinsic_type<_Tp, _Bytes, ++- enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 64>> +++ struct __intrinsic_type<_Tp, _Bytes, enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 64>> ++ { ++ static_assert(!is_same_v<_Tp, long double>, ++ "no __intrinsic_type support for long double on x86"); ++ ++- static constexpr size_t _S_VBytes = _Bytes <= 16 ? 16 ++- : _Bytes <= 32 ? 32 ++- : 64; +++ static constexpr size_t _S_VBytes = _Bytes <= 16 ? 16 : _Bytes <= 32 ? 32 : 64; ++ ++ using type [[__gnu__::__vector_size__(_S_VBytes)]] ++- = conditional_t, long long int, _Tp>; +++ = conditional_t, long long int, _Tp>; ++ }; ++ #endif // _GLIBCXX_SIMD_HAVE_SSE ++ ++@@ -2377,15 +2369,21 @@ template <> ++ struct __intrinsic_type ++ { using type = float32x4_t; }; ++ ++-#if _GLIBCXX_SIMD_HAVE_NEON_A64 ++ template <> ++ struct __intrinsic_type ++- { using type = float64x1_t; }; +++ { +++#if _GLIBCXX_SIMD_HAVE_NEON_A64 +++ using type = float64x1_t; +++#endif +++ }; ++ ++ template <> ++ struct __intrinsic_type ++- { using type = float64x2_t; }; +++ { +++#if _GLIBCXX_SIMD_HAVE_NEON_A64 +++ using type = float64x2_t; ++ #endif +++ }; ++ ++ #define _GLIBCXX_SIMD_ARM_INTRIN(_Bits, _Np) \ ++ template <> \ ++@@ -2407,16 +2405,19 @@ _GLIBCXX_SIMD_ARM_INTRIN(64, 2); ++ #undef _GLIBCXX_SIMD_ARM_INTRIN ++ ++ template ++- struct __intrinsic_type<_Tp, _Bytes, ++- enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>> +++ struct __intrinsic_type<_Tp, _Bytes, enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>> ++ { ++ static constexpr int _SVecBytes = _Bytes <= 8 ? 8 : 16; +++ ++ using _Ip = __int_for_sizeof_t<_Tp>; +++ ++ using _Up = conditional_t< ++ is_floating_point_v<_Tp>, _Tp, ++ conditional_t, make_unsigned_t<_Ip>, _Ip>>; +++ ++ static_assert(!is_same_v<_Tp, _Up> || _SVecBytes != _Bytes, ++ "should use explicit specialization above"); +++ ++ using type = typename __intrinsic_type<_Up, _SVecBytes>::type; ++ }; ++ #endif // _GLIBCXX_SIMD_HAVE_NEON ++@@ -2451,23 +2452,54 @@ _GLIBCXX_SIMD_PPC_INTRIN(unsigned long long); ++ #undef _GLIBCXX_SIMD_PPC_INTRIN ++ ++ template ++- struct __intrinsic_type<_Tp, _Bytes, ++- enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>> +++ struct __intrinsic_type<_Tp, _Bytes, enable_if_t<__is_vectorizable_v<_Tp> && _Bytes <= 16>> ++ { ++ static constexpr bool _S_is_ldouble = is_same_v<_Tp, long double>; +++ ++ // allow _Tp == long double with -mlong-double-64 ++ static_assert(!(_S_is_ldouble && sizeof(long double) > sizeof(double)), ++ "no __intrinsic_type support for 128-bit floating point on PowerPC"); +++ ++ #ifndef __VSX__ ++ static_assert(!(is_same_v<_Tp, double> ++ || (_S_is_ldouble && sizeof(long double) == sizeof(double))), ++ "no __intrinsic_type support for 64-bit floating point on PowerPC w/o VSX"); ++ #endif ++- using type = ++- typename __intrinsic_type_impl< ++- conditional_t, ++- conditional_t<_S_is_ldouble, double, _Tp>, ++- __int_for_sizeof_t<_Tp>>>::type; +++ +++ static constexpr auto __element_type() +++ { +++ if constexpr (is_floating_point_v<_Tp>) +++ { +++ if constexpr (_S_is_ldouble) +++ return double {}; +++ else +++ return _Tp {}; +++ } +++ else if constexpr (is_signed_v<_Tp>) +++ { +++ if constexpr (sizeof(_Tp) == sizeof(_SChar)) +++ return _SChar {}; +++ else if constexpr (sizeof(_Tp) == sizeof(short)) +++ return short {}; +++ else if constexpr (sizeof(_Tp) == sizeof(int)) +++ return int {}; +++ else if constexpr (sizeof(_Tp) == sizeof(_LLong)) +++ return _LLong {}; +++ } +++ else +++ { +++ if constexpr (sizeof(_Tp) == sizeof(_UChar)) +++ return _UChar {}; +++ else if constexpr (sizeof(_Tp) == sizeof(_UShort)) +++ return _UShort {}; +++ else if constexpr (sizeof(_Tp) == sizeof(_UInt)) +++ return _UInt {}; +++ else if constexpr (sizeof(_Tp) == sizeof(_ULLong)) +++ return _ULLong {}; +++ } +++ } +++ +++ using type = typename __intrinsic_type_impl::type; ++ }; ++ #endif // __ALTIVEC__ ++ ++@@ -2483,22 +2515,29 @@ template ++ static constexpr size_t _S_full_size = sizeof(_BuiltinType) * __CHAR_BIT__; ++ ++ _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper ++- __as_full_vector() const { return _M_data; } +++ __as_full_vector() const +++ { return _M_data; } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper() = default; ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(_BuiltinType __k) ++- : _M_data(__k) {}; +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapper() = default; +++ +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapper(_BuiltinType __k) : _M_data(__k) {}; ++ ++- _GLIBCXX_SIMD_INTRINSIC operator const _BuiltinType&() const +++ _GLIBCXX_SIMD_INTRINSIC +++ operator const _BuiltinType&() const ++ { return _M_data; } ++ ++- _GLIBCXX_SIMD_INTRINSIC operator _BuiltinType&() +++ _GLIBCXX_SIMD_INTRINSIC +++ operator _BuiltinType&() ++ { return _M_data; } ++ ++- _GLIBCXX_SIMD_INTRINSIC _BuiltinType __intrin() const +++ _GLIBCXX_SIMD_INTRINSIC _BuiltinType +++ __intrin() const ++ { return _M_data; } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr value_type operator[](size_t __i) const +++ _GLIBCXX_SIMD_INTRINSIC constexpr value_type +++ operator[](size_t __i) const ++ { return _M_data & (_BuiltinType(1) << __i); } ++ ++ template ++@@ -2506,7 +2545,8 @@ template ++ operator[](_SizeConstant<__i>) const ++ { return _M_data & (_BuiltinType(1) << __i); } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr void _M_set(size_t __i, value_type __x) +++ _GLIBCXX_SIMD_INTRINSIC constexpr void +++ _M_set(size_t __i, value_type __x) ++ { ++ if (__x) ++ _M_data |= (_BuiltinType(1) << __i); ++@@ -2514,11 +2554,12 @@ template ++ _M_data &= ~(_BuiltinType(1) << __i); ++ } ++ ++- _GLIBCXX_SIMD_INTRINSIC ++- constexpr bool _M_is_constprop() const +++ _GLIBCXX_SIMD_INTRINSIC constexpr bool +++ _M_is_constprop() const ++ { return __builtin_constant_p(_M_data); } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_none_of() const +++ _GLIBCXX_SIMD_INTRINSIC constexpr bool +++ _M_is_constprop_none_of() const ++ { ++ if (__builtin_constant_p(_M_data)) ++ { ++@@ -2530,7 +2571,8 @@ template ++ return false; ++ } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_all_of() const +++ _GLIBCXX_SIMD_INTRINSIC constexpr bool +++ _M_is_constprop_all_of() const ++ { ++ if (__builtin_constant_p(_M_data)) ++ { ++@@ -2552,10 +2594,11 @@ template ++ template ++ struct _SimdWrapperBase // no padding or no SNaNs ++ { ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase() = default; ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase(_BuiltinType __init) ++- : _M_data(__init) ++- {} +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapperBase() = default; +++ +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapperBase(_BuiltinType __init) : _M_data(__init) {} ++ ++ _BuiltinType _M_data; ++ }; ++@@ -2564,10 +2607,11 @@ template ++ struct _SimdWrapperBase // with padding that needs to ++ // never become SNaN ++ { ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase() : _M_data() {} ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapperBase(_BuiltinType __init) ++- : _M_data(__init) ++- {} +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapperBase() : _M_data() {} +++ +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapperBase(_BuiltinType __init) : _M_data(__init) {} ++ ++ _BuiltinType _M_data; ++ }; ++@@ -2606,24 +2650,33 @@ template ++ __as_full_vector() const ++ { return _M_data; } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(initializer_list<_Tp> __init) ++- : _Base(__generate_from_n_evaluations<_Width, _BuiltinType>( ++- [&](auto __i) { return __init.begin()[__i.value]; })) {} +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapper(initializer_list<_Tp> __init) +++ : _Base(__generate_from_n_evaluations<_Width, _BuiltinType>( +++ [&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ return __init.begin()[__i.value]; +++ })) {} ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper() = default; ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(const _SimdWrapper&) ++- = default; ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(_SimdWrapper&&) = default; +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapper() = default; +++ +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapper(const _SimdWrapper&) = default; +++ +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapper(_SimdWrapper&&) = default; ++ ++ _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper& ++ operator=(const _SimdWrapper&) = default; +++ ++ _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper& ++ operator=(_SimdWrapper&&) = default; ++ ++ template >, ++ is_same<_V, __intrinsic_type_t<_Tp, _Width>>>>> ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SimdWrapper(_V __x) +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ _SimdWrapper(_V __x) ++ // __vector_bitcast can convert e.g. __m128 to __vector(2) float ++ : _Base(__vector_bitcast<_Tp, _Width>(__x)) {} ++ ++@@ -2633,33 +2686,46 @@ template ++ _GLIBCXX_SIMD_INTRINSIC constexpr ++ operator _SimdTuple<_Tp, _As...>() const ++ { ++- const auto& dd = _M_data; // workaround for GCC7 ICE ++- return __generate_from_n_evaluations>([&]( ++- auto __i) constexpr { return dd[int(__i)]; }); +++ return __generate_from_n_evaluations>( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA +++ { return _M_data[int(__i)]; }); ++ } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr operator const _BuiltinType&() const +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ operator const _BuiltinType&() const ++ { return _M_data; } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr operator _BuiltinType&() +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ operator _BuiltinType&() ++ { return _M_data; } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr _Tp operator[](size_t __i) const +++ _GLIBCXX_SIMD_INTRINSIC constexpr _Tp +++ operator[](size_t __i) const ++ { return _M_data[__i]; } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC constexpr _Tp operator[](_SizeConstant<__i>) const +++ _GLIBCXX_SIMD_INTRINSIC constexpr _Tp +++ operator[](_SizeConstant<__i>) const ++ { return _M_data[__i]; } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr void _M_set(size_t __i, _Tp __x) ++- { _M_data[__i] = __x; } +++ _GLIBCXX_SIMD_INTRINSIC constexpr void +++ _M_set(size_t __i, _Tp __x) +++ { +++ if (__builtin_is_constant_evaluated()) +++ _M_data = __generate_from_n_evaluations<_Width, _BuiltinType>([&](auto __j) { +++ return __j == __i ? __x : _M_data[__j()]; +++ }); +++ else +++ _M_data[__i] = __x; +++ } ++ ++ _GLIBCXX_SIMD_INTRINSIC ++- constexpr bool _M_is_constprop() const +++ constexpr bool +++ _M_is_constprop() const ++ { return __builtin_constant_p(_M_data); } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_none_of() const +++ _GLIBCXX_SIMD_INTRINSIC constexpr bool +++ _M_is_constprop_none_of() const ++ { ++ if (__builtin_constant_p(_M_data)) ++ { ++@@ -2680,7 +2746,8 @@ template ++ return false; ++ } ++ ++- _GLIBCXX_SIMD_INTRINSIC constexpr bool _M_is_constprop_all_of() const +++ _GLIBCXX_SIMD_INTRINSIC constexpr bool +++ _M_is_constprop_all_of() const ++ { ++ if (__builtin_constant_p(_M_data)) ++ { ++@@ -2812,6 +2879,32 @@ template ++ } // namespace simd_abi ++ ++ // traits {{{1 +++template +++ struct is_simd_flag_type +++ : false_type +++ {}; +++ +++template <> +++ struct is_simd_flag_type +++ : true_type +++ {}; +++ +++template <> +++ struct is_simd_flag_type +++ : true_type +++ {}; +++ +++template +++ struct is_simd_flag_type> +++ : __bool_constant<(_Np > 0) and __has_single_bit(_Np)> +++ {}; +++ +++template +++ inline constexpr bool is_simd_flag_type_v = is_simd_flag_type<_Tp>::value; +++ +++template >> +++ using _IsSimdFlagType = _Tp; +++ ++ // is_abi_tag {{{2 ++ template > ++ struct is_abi_tag : false_type {}; ++@@ -2878,22 +2971,14 @@ template ++ struct rebind_simd; ++ ++ template ++- struct rebind_simd< ++- _Tp, simd<_Up, _Abi>, ++- void_t, _Abi>>> ++- { ++- using type ++- = simd<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>; ++- }; +++ struct rebind_simd<_Tp, simd<_Up, _Abi>, +++ void_t, _Abi>>> +++ { using type = simd<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>; }; ++ ++ template ++- struct rebind_simd< ++- _Tp, simd_mask<_Up, _Abi>, ++- void_t, _Abi>>> ++- { ++- using type ++- = simd_mask<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>; ++- }; +++ struct rebind_simd<_Tp, simd_mask<_Up, _Abi>, +++ void_t, _Abi>>> +++ { using type = simd_mask<_Tp, simd_abi::deduce_t<_Tp, simd_size_v<_Up, _Abi>, _Abi>>; }; ++ ++ template ++ using rebind_simd_t = typename rebind_simd<_Tp, _V>::type; ++@@ -2903,13 +2988,11 @@ template ++ struct resize_simd; ++ ++ template ++- struct resize_simd<_Np, simd<_Tp, _Abi>, ++- void_t>> +++ struct resize_simd<_Np, simd<_Tp, _Abi>, void_t>> ++ { using type = simd<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; }; ++ ++ template ++- struct resize_simd<_Np, simd_mask<_Tp, _Abi>, ++- void_t>> +++ struct resize_simd<_Np, simd_mask<_Tp, _Abi>, void_t>> ++ { using type = simd_mask<_Tp, simd_abi::deduce_t<_Tp, _Np, _Abi>>; }; ++ ++ template ++@@ -2958,13 +3041,11 @@ template ++ ++ // casts [simd.casts] {{{1 ++ // static_simd_cast {{{2 ++-template , ++- typename = void> +++template , typename = void> ++ struct __static_simd_cast_return_type; ++ ++ template ++- struct __static_simd_cast_return_type, _Up, _Ap, false, ++- void> +++ struct __static_simd_cast_return_type, _Up, _Ap, false, void> ++ : __static_simd_cast_return_type, _Up, _Ap> {}; ++ ++ template ++@@ -3147,6 +3228,10 @@ template ++ { ++ if constexpr (is_same_v) ++ return __x; +++ else if (__builtin_is_constant_evaluated()) +++ return _Tp([&](auto __i) constexpr { +++ return __i < simd_size_v<_Up, _Ap> ? __x[__i] : _Up(); +++ }); ++ else if constexpr (simd_size_v<_Up, _Ap> == 1) ++ { ++ _Tp __r{}; ++@@ -3193,21 +3278,19 @@ template ++ { return __x; } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC auto +++ _GLIBCXX_SIMD_INTRINSIC fixed_size_simd<_Tp, simd_size_v<_Tp, _Ap>> ++ to_fixed_size(const simd<_Tp, _Ap>& __x) ++ { ++- return simd<_Tp, simd_abi::fixed_size>>([&__x]( ++- auto __i) constexpr { return __x[__i]; }); +++ using _Rp = fixed_size_simd<_Tp, simd_size_v<_Tp, _Ap>>; +++ return _Rp([&__x](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; }); ++ } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC auto +++ _GLIBCXX_SIMD_INTRINSIC fixed_size_simd_mask<_Tp, simd_size_v<_Tp, _Ap>> ++ to_fixed_size(const simd_mask<_Tp, _Ap>& __x) ++ { ++- constexpr int _Np = simd_mask<_Tp, _Ap>::size(); ++- fixed_size_simd_mask<_Tp, _Np> __r; ++- __execute_n_times<_Np>([&](auto __i) constexpr { __r[__i] = __x[__i]; }); ++- return __r; +++ return {__private_init, +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; }}; ++ } ++ ++ // to_native {{{2 ++@@ -3221,16 +3304,18 @@ template ++ return {__mem, vector_aligned}; ++ } ++ ++-template +++template ++ _GLIBCXX_SIMD_INTRINSIC ++ enable_if_t<(_Np == native_simd_mask<_Tp>::size()), native_simd_mask<_Tp>> ++ to_native(const fixed_size_simd_mask<_Tp, _Np>& __x) ++ { ++- return native_simd_mask<_Tp>([&](auto __i) constexpr { return __x[__i]; }); +++ return native_simd_mask<_Tp>( +++ __private_init, +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; }); ++ } ++ ++ // to_compatible {{{2 ++-template +++template ++ _GLIBCXX_SIMD_INTRINSIC enable_if_t<(_Np == simd<_Tp>::size()), simd<_Tp>> ++ to_compatible(const simd<_Tp, simd_abi::fixed_size<_Np>>& __x) ++ { ++@@ -3239,11 +3324,15 @@ template ++ return {__mem, vector_aligned}; ++ } ++ ++-template +++template ++ _GLIBCXX_SIMD_INTRINSIC ++ enable_if_t<(_Np == simd_mask<_Tp>::size()), simd_mask<_Tp>> ++ to_compatible(const simd_mask<_Tp, simd_abi::fixed_size<_Np>>& __x) ++- { return simd_mask<_Tp>([&](auto __i) constexpr { return __x[__i]; }); } +++ { +++ return simd_mask<_Tp>( +++ __private_init, +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; }); +++ } ++ ++ // masked assignment [simd_mask.where] {{{1 ++ ++@@ -3276,12 +3365,14 @@ template ++ ++ public: ++ const_where_expression(const const_where_expression&) = delete; +++ ++ const_where_expression& operator=(const const_where_expression&) = delete; ++ ++- _GLIBCXX_SIMD_INTRINSIC const_where_expression(const _M& __kk, const _Tp& dd) ++- : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {} +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ const_where_expression(const _M& __kk, const _Tp& dd) +++ : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {} ++ ++- _GLIBCXX_SIMD_INTRINSIC _V +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V ++ operator-() const&& ++ { ++ return {__private_init, ++@@ -3290,8 +3381,8 @@ template ++ } ++ ++ template ++- [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _V ++- copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) const&& +++ [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V +++ copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&& ++ { ++ return {__private_init, ++ _Impl::_S_masked_load(__data(_M_value), __data(_M_k), ++@@ -3299,8 +3390,8 @@ template ++ } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC void ++- copy_to(_LoadStorePtr<_Up, value_type>* __mem, _Flags) const&& +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ copy_to(_LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&& ++ { ++ _Impl::_S_masked_store(__data(_M_value), ++ _Flags::template _S_apply<_V>(__mem), ++@@ -3320,8 +3411,8 @@ template ++ struct _Wrapper { using value_type = _V; }; ++ ++ protected: ++- using value_type = ++- typename conditional_t, _Wrapper, _V>::value_type; +++ using value_type +++ = typename conditional_t, _Wrapper, _V>::value_type; ++ ++ _GLIBCXX_SIMD_INTRINSIC friend const _M& ++ __get_mask(const const_where_expression& __x) ++@@ -3338,20 +3429,22 @@ template ++ const_where_expression(const const_where_expression&) = delete; ++ const_where_expression& operator=(const const_where_expression&) = delete; ++ ++- _GLIBCXX_SIMD_INTRINSIC const_where_expression(const bool __kk, const _Tp& dd) ++- : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {} +++ _GLIBCXX_SIMD_INTRINSIC constexpr +++ const_where_expression(const bool __kk, const _Tp& dd) +++ : _M_k(__kk), _M_value(const_cast<_Tp&>(dd)) {} ++ ++- _GLIBCXX_SIMD_INTRINSIC _V operator-() const&& +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V +++ operator-() const&& ++ { return _M_k ? -_M_value : _M_value; } ++ ++ template ++- [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _V ++- copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) const&& +++ [[nodiscard]] _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _V +++ copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&& ++ { return _M_k ? static_cast<_V>(__mem[0]) : _M_value; } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC void ++- copy_to(_LoadStorePtr<_Up, value_type>* __mem, _Flags) const&& +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ copy_to(_LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) const&& ++ { ++ if (_M_k) ++ __mem[0] = _M_value; ++@@ -3376,18 +3469,21 @@ template ++ is_same::value, ""); ++ static_assert(_M::size() == _Tp::size(), ""); ++ ++- _GLIBCXX_SIMD_INTRINSIC friend _Tp& __get_lvalue(where_expression& __x) +++ _GLIBCXX_SIMD_INTRINSIC friend constexpr _Tp& +++ __get_lvalue(where_expression& __x) ++ { return __x._M_value; } ++ ++ public: ++ where_expression(const where_expression&) = delete; ++ where_expression& operator=(const where_expression&) = delete; ++ ++- _GLIBCXX_SIMD_INTRINSIC where_expression(const _M& __kk, _Tp& dd) ++- : const_where_expression<_M, _Tp>(__kk, dd) {} +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR +++ where_expression(const _M& __kk, _Tp& dd) +++ : const_where_expression<_M, _Tp>(__kk, dd) {} ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC void operator=(_Up&& __x) && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ operator=(_Up&& __x) && ++ { ++ _Impl::_S_masked_assign(__data(_M_k), __data(_M_value), ++ __to_value_type_or_member_type<_Tp>( ++@@ -3396,14 +3492,15 @@ template ++ ++ #define _GLIBCXX_SIMD_OP_(__op, __name) \ ++ template \ ++- _GLIBCXX_SIMD_INTRINSIC void operator __op##=(_Up&& __x)&& \ +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void \ +++ operator __op##=(_Up&& __x)&& \ ++ { \ ++ _Impl::template _S_masked_cassign( \ ++ __data(_M_k), __data(_M_value), \ ++ __to_value_type_or_member_type<_Tp>(static_cast<_Up&&>(__x)), \ ++- [](auto __impl, auto __lhs, auto __rhs) constexpr { \ ++- return __impl.__name(__lhs, __rhs); \ ++- }); \ +++ [](auto __impl, auto __lhs, auto __rhs) \ +++ constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA \ +++ { return __impl.__name(__lhs, __rhs); }); \ ++ } \ ++ static_assert(true) ++ _GLIBCXX_SIMD_OP_(+, _S_plus); ++@@ -3418,48 +3515,48 @@ template ++ _GLIBCXX_SIMD_OP_(>>, _S_shift_right); ++ #undef _GLIBCXX_SIMD_OP_ ++ ++- _GLIBCXX_SIMD_INTRINSIC void operator++() && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ operator++() && ++ { ++ __data(_M_value) ++- = _Impl::template _S_masked_unary<__increment>(__data(_M_k), ++- __data(_M_value)); +++ = _Impl::template _S_masked_unary<__increment>(__data(_M_k), __data(_M_value)); ++ } ++ ++- _GLIBCXX_SIMD_INTRINSIC void operator++(int) && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ operator++(int) && ++ { ++ __data(_M_value) ++- = _Impl::template _S_masked_unary<__increment>(__data(_M_k), ++- __data(_M_value)); +++ = _Impl::template _S_masked_unary<__increment>(__data(_M_k), __data(_M_value)); ++ } ++ ++- _GLIBCXX_SIMD_INTRINSIC void operator--() && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ operator--() && ++ { ++ __data(_M_value) ++- = _Impl::template _S_masked_unary<__decrement>(__data(_M_k), ++- __data(_M_value)); +++ = _Impl::template _S_masked_unary<__decrement>(__data(_M_k), __data(_M_value)); ++ } ++ ++- _GLIBCXX_SIMD_INTRINSIC void operator--(int) && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ operator--(int) && ++ { ++ __data(_M_value) ++- = _Impl::template _S_masked_unary<__decrement>(__data(_M_k), ++- __data(_M_value)); +++ = _Impl::template _S_masked_unary<__decrement>(__data(_M_k), __data(_M_value)); ++ } ++ ++ // intentionally hides const_where_expression::copy_from ++ template ++- _GLIBCXX_SIMD_INTRINSIC void ++- copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) && ++ { ++- __data(_M_value) ++- = _Impl::_S_masked_load(__data(_M_value), __data(_M_k), ++- _Flags::template _S_apply<_Tp>(__mem)); +++ __data(_M_value) = _Impl::_S_masked_load(__data(_M_value), __data(_M_k), +++ _Flags::template _S_apply<_Tp>(__mem)); ++ } ++ }; ++ ++ // where_expression {{{2 ++ template ++- class where_expression : public const_where_expression +++ class where_expression +++ : public const_where_expression ++ { ++ using _M = bool; ++ using typename const_where_expression<_M, _Tp>::value_type; ++@@ -3470,12 +3567,14 @@ template ++ where_expression(const where_expression&) = delete; ++ where_expression& operator=(const where_expression&) = delete; ++ ++- _GLIBCXX_SIMD_INTRINSIC where_expression(const _M& __kk, _Tp& dd) ++- : const_where_expression<_M, _Tp>(__kk, dd) {} +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR +++ where_expression(const _M& __kk, _Tp& dd) +++ : const_where_expression<_M, _Tp>(__kk, dd) {} ++ ++ #define _GLIBCXX_SIMD_OP_(__op) \ ++ template \ ++- _GLIBCXX_SIMD_INTRINSIC void operator __op(_Up&& __x)&& \ +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void \ +++ operator __op(_Up&& __x)&& \ ++ { if (_M_k) _M_value __op static_cast<_Up&&>(__x); } ++ ++ _GLIBCXX_SIMD_OP_(=) ++@@ -3491,67 +3590,71 @@ template ++ _GLIBCXX_SIMD_OP_(>>=) ++ #undef _GLIBCXX_SIMD_OP_ ++ ++- _GLIBCXX_SIMD_INTRINSIC void operator++() && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ operator++() && ++ { if (_M_k) ++_M_value; } ++ ++- _GLIBCXX_SIMD_INTRINSIC void operator++(int) && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ operator++(int) && ++ { if (_M_k) ++_M_value; } ++ ++- _GLIBCXX_SIMD_INTRINSIC void operator--() && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ operator--() && ++ { if (_M_k) --_M_value; } ++ ++- _GLIBCXX_SIMD_INTRINSIC void operator--(int) && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ operator--(int) && ++ { if (_M_k) --_M_value; } ++ ++ // intentionally hides const_where_expression::copy_from ++ template ++- _GLIBCXX_SIMD_INTRINSIC void ++- copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _Flags) && +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR void +++ copy_from(const _LoadStorePtr<_Up, value_type>* __mem, _IsSimdFlagType<_Flags>) && ++ { if (_M_k) _M_value = __mem[0]; } ++ }; ++ ++ // where {{{1 ++ template ++- _GLIBCXX_SIMD_INTRINSIC where_expression, simd<_Tp, _Ap>> +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR +++ where_expression, simd<_Tp, _Ap>> ++ where(const typename simd<_Tp, _Ap>::mask_type& __k, simd<_Tp, _Ap>& __value) ++ { return {__k, __value}; } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC ++- const_where_expression, simd<_Tp, _Ap>> ++- where(const typename simd<_Tp, _Ap>::mask_type& __k, ++- const simd<_Tp, _Ap>& __value) +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR +++ const_where_expression, simd<_Tp, _Ap>> +++ where(const typename simd<_Tp, _Ap>::mask_type& __k, const simd<_Tp, _Ap>& __value) ++ { return {__k, __value}; } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC ++- where_expression, simd_mask<_Tp, _Ap>> ++- where(const remove_const_t>& __k, ++- simd_mask<_Tp, _Ap>& __value) +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR +++ where_expression, simd_mask<_Tp, _Ap>> +++ where(const remove_const_t>& __k, simd_mask<_Tp, _Ap>& __value) ++ { return {__k, __value}; } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC ++- const_where_expression, simd_mask<_Tp, _Ap>> ++- where(const remove_const_t>& __k, ++- const simd_mask<_Tp, _Ap>& __value) +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR +++ const_where_expression, simd_mask<_Tp, _Ap>> +++ where(const remove_const_t>& __k, const simd_mask<_Tp, _Ap>& __value) ++ { return {__k, __value}; } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC where_expression +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR where_expression ++ where(_ExactBool __k, _Tp& __value) ++ { return {__k, __value}; } ++ ++ template ++- _GLIBCXX_SIMD_INTRINSIC const_where_expression +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR const_where_expression ++ where(_ExactBool __k, const _Tp& __value) ++ { return {__k, __value}; } ++ ++- template ++- void where(bool __k, simd<_Tp, _Ap>& __value) = delete; +++template +++ _GLIBCXX_SIMD_CONSTEXPR void +++ where(bool __k, simd<_Tp, _Ap>& __value) = delete; ++ ++- template ++- void where(bool __k, const simd<_Tp, _Ap>& __value) = delete; +++template +++ _GLIBCXX_SIMD_CONSTEXPR void +++ where(bool __k, const simd<_Tp, _Ap>& __value) = delete; ++ ++ // proposed mask iterations {{{1 ++ namespace __proposed { ++@@ -3568,10 +3671,12 @@ template ++ size_t __mask; ++ size_t __bit; ++ ++- _GLIBCXX_SIMD_INTRINSIC void __next_bit() +++ _GLIBCXX_SIMD_INTRINSIC void +++ __next_bit() ++ { __bit = __builtin_ctzl(__mask); } ++ ++- _GLIBCXX_SIMD_INTRINSIC void __reset_lsb() +++ _GLIBCXX_SIMD_INTRINSIC void +++ __reset_lsb() ++ { ++ // 01100100 - 1 = 01100011 ++ __mask &= (__mask - 1); ++@@ -3583,20 +3688,24 @@ template ++ iterator(const iterator&) = default; ++ iterator(iterator&&) = default; ++ ++- _GLIBCXX_SIMD_ALWAYS_INLINE size_t operator->() const +++ _GLIBCXX_SIMD_ALWAYS_INLINE size_t +++ operator->() const ++ { return __bit; } ++ ++- _GLIBCXX_SIMD_ALWAYS_INLINE size_t operator*() const +++ _GLIBCXX_SIMD_ALWAYS_INLINE size_t +++ operator*() const ++ { return __bit; } ++ ++- _GLIBCXX_SIMD_ALWAYS_INLINE iterator& operator++() +++ _GLIBCXX_SIMD_ALWAYS_INLINE iterator& +++ operator++() ++ { ++ __reset_lsb(); ++ __next_bit(); ++ return *this; ++ } ++ ++- _GLIBCXX_SIMD_ALWAYS_INLINE iterator operator++(int) +++ _GLIBCXX_SIMD_ALWAYS_INLINE iterator +++ operator++(int) ++ { ++ iterator __tmp = *this; ++ __reset_lsb(); ++@@ -3604,17 +3713,21 @@ template ++ return __tmp; ++ } ++ ++- _GLIBCXX_SIMD_ALWAYS_INLINE bool operator==(const iterator& __rhs) const +++ _GLIBCXX_SIMD_ALWAYS_INLINE bool +++ operator==(const iterator& __rhs) const ++ { return __mask == __rhs.__mask; } ++ ++- _GLIBCXX_SIMD_ALWAYS_INLINE bool operator!=(const iterator& __rhs) const +++ _GLIBCXX_SIMD_ALWAYS_INLINE bool +++ operator!=(const iterator& __rhs) const ++ { return __mask != __rhs.__mask; } ++ }; ++ ++- iterator begin() const +++ iterator +++ begin() const ++ { return __bits.to_ullong(); } ++ ++- iterator end() const +++ iterator +++ end() const ++ { return 0; } ++ }; ++ ++@@ -3629,15 +3742,13 @@ template ++ // reductions [simd.reductions] {{{1 ++ template > ++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp ++- reduce(const simd<_Tp, _Abi>& __v, ++- _BinaryOperation __binary_op = _BinaryOperation()) +++ reduce(const simd<_Tp, _Abi>& __v, _BinaryOperation __binary_op = _BinaryOperation()) ++ { return _Abi::_SimdImpl::_S_reduce(__v, __binary_op); } ++ ++ template > ++ _GLIBCXX_SIMD_INTRINSIC typename _V::value_type ++ reduce(const const_where_expression<_M, _V>& __x, ++- typename _V::value_type __identity_element, ++- _BinaryOperation __binary_op) +++ typename _V::value_type __identity_element, _BinaryOperation __binary_op) ++ { ++ if (__builtin_expect(none_of(__get_mask(__x)), false)) ++ return __identity_element; ++@@ -3676,16 +3787,12 @@ template ++ template ++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp ++ hmin(const simd<_Tp, _Abi>& __v) noexcept ++- { ++- return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Minimum()); ++- } +++ { return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Minimum()); } ++ ++ template ++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR _Tp ++ hmax(const simd<_Tp, _Abi>& __v) noexcept ++- { ++- return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Maximum()); ++- } +++ { return _Abi::_SimdImpl::_S_reduce(__v, __detail::_Maximum()); } ++ ++ template ++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR ++@@ -3753,8 +3860,7 @@ template ++ ++ template ++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_SIMD_CONSTEXPR simd<_Tp, _Ap> ++- clamp(const simd<_Tp, _Ap>& __v, const simd<_Tp, _Ap>& __lo, ++- const simd<_Tp, _Ap>& __hi) +++ clamp(const simd<_Tp, _Ap>& __v, const simd<_Tp, _Ap>& __lo, const simd<_Tp, _Ap>& __hi) ++ { ++ using _Impl = typename _Ap::_SimdImpl; ++ return {__private_init, ++@@ -3771,13 +3877,12 @@ template ++- _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_CONST +++ _GLIBCXX_SIMD_INTRINSIC _GLIBCXX_CONST constexpr ++ _SimdWrapper<_Tp, _Np / _Total * _Combine> ++ __extract_part(const _SimdWrapper<_Tp, _Np> __x); ++ ++-template ++- _GLIBCXX_SIMD_INTRINSIC auto +++template +++ _GLIBCXX_SIMD_INTRINSIC constexpr auto ++ __extract_part(const _SimdTuple<_Tp, _A0, _As...>& __x); ++ ++ // }}} ++@@ -3786,7 +3891,8 @@ template ++ struct _SizeList ++ { ++ template ++- static constexpr size_t _S_at(_SizeConstant<_I> = {}) +++ static constexpr size_t +++ _S_at(_SizeConstant<_I> = {}) ++ { ++ if constexpr (_I == 0) ++ return _V0; ++@@ -3795,7 +3901,8 @@ template ++ } ++ ++ template ++- static constexpr auto _S_before(_SizeConstant<_I> = {}) +++ static constexpr auto +++ _S_before(_SizeConstant<_I> = {}) ++ { ++ if constexpr (_I == 0) ++ return _SizeConstant<0>(); ++@@ -3805,7 +3912,8 @@ template ++ } ++ ++ template ++- static constexpr auto _S_pop_front(_SizeConstant<_Np> = {}) +++ static constexpr auto +++ _S_pop_front(_SizeConstant<_Np> = {}) ++ { ++ if constexpr (_Np == 0) ++ return _SizeList(); ++@@ -3900,12 +4008,11 @@ template >([&]( ++- auto __i) constexpr { ++- return _V([&](auto __j) constexpr { ++- return __x[__i * _V::size() + __j]; ++- }); ++- }); +++ return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ return _V([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA +++ { return __x[__i * _V::size() + __j]; }); +++ }); ++ } ++ else if constexpr ( ++ __is_fixed_size_abi_v<_Ap> ++@@ -3918,49 +4025,47 @@ template * const __element_ptr ++ = reinterpret_cast*>(&__data(__x)); ++- return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&]( ++- auto __i) constexpr { ++- return _V(__element_ptr + __i * _V::size(), vector_aligned); ++- }); +++ return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA +++ { return _V(__element_ptr + __i * _V::size(), vector_aligned); }); ++ #else ++ const auto& __xx = __data(__x); ++- return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&]( ++- auto __i) constexpr { ++- [[maybe_unused]] constexpr size_t __offset ++- = decltype(__i)::value * _V::size(); ++- return _V([&](auto __j) constexpr { ++- constexpr _SizeConstant<__j + __offset> __k; ++- return __xx[__k]; ++- }); ++- }); +++ return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ [[maybe_unused]] constexpr size_t __offset +++ = decltype(__i)::value * _V::size(); +++ return _V([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ constexpr _SizeConstant<__j + __offset> __k; +++ return __xx[__k]; +++ }); +++ }); ++ #endif ++ } ++ else if constexpr (is_same_v) ++ { ++ // normally memcpy should work here as well ++- return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&]( ++- auto __i) constexpr { return __x[__i]; }); +++ return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; }); ++ } ++ else ++ { ++- return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&]( ++- auto __i) constexpr { ++- if constexpr (__is_fixed_size_abi_v) ++- return _V([&](auto __j) constexpr { ++- return __x[__i * _V::size() + __j]; ++- }); ++- else ++- return _V(__private_init, ++- __extract_part(__data(__x))); ++- }); +++ return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ if constexpr (__is_fixed_size_abi_v) +++ return _V([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ return __x[__i * _V::size() + __j]; +++ }); +++ else +++ return _V(__private_init, +++ __extract_part(__data(__x))); +++ }); ++ } ++ } ++ ++ // }}} ++ // split(simd_mask) {{{ ++ template / _V::size()> +++ size_t _Parts = simd_size_v / _V::size()> ++ enable_if_t && simd_size_v == _Parts * _V::size(), array<_V, _Parts>> ++ split(const simd_mask& __x) ++@@ -3976,22 +4081,22 @@ template >([&]( ++- auto __i) constexpr { ++- constexpr size_t __offset = __i * _V::size(); ++- return _V(__bitset_init, (__bits >> __offset).to_ullong()); ++- }); +++ return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ constexpr size_t __offset = __i * _V::size(); +++ return _V(__bitset_init, (__bits >> __offset).to_ullong()); +++ }); ++ } ++ else ++ { ++- return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>([&]( ++- auto __i) constexpr { ++- constexpr size_t __offset = __i * _V::size(); ++- return _V( ++- __private_init, [&](auto __j) constexpr { ++- return __x[__j + __offset]; ++- }); ++- }); +++ return __generate_from_n_evaluations<_Parts, array<_V, _Parts>>( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ constexpr size_t __offset = __i * _V::size(); +++ return _V(__private_init, +++ [&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ return __x[__j + __offset]; +++ }); +++ }); ++ } ++ } ++ ++@@ -4009,12 +4114,14 @@ template ++ using _V = __deduced_simd<_Tp, _N0>; ++ ++ if (__x._M_is_constprop()) ++- return __generate_from_n_evaluations([&]( ++- auto __i) constexpr { ++- using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>; ++- constexpr size_t __offset = _SL::_S_before(__i); ++- return _Vi([&](auto __j) constexpr { return __x[__offset + __j]; }); ++- }); +++ return __generate_from_n_evaluations( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>; +++ constexpr size_t __offset = _SL::_S_before(__i); +++ return _Vi([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ return __x[__offset + __j]; +++ }); +++ }); ++ else if constexpr (_Np == _N0) ++ { ++ static_assert(sizeof...(_Sizes) == 1); ++@@ -4081,28 +4188,28 @@ template ++ #ifdef _GLIBCXX_SIMD_USE_ALIASING_LOADS ++ const __may_alias<_Tp>* const __element_ptr ++ = reinterpret_cast*>(&__x); ++- return __generate_from_n_evaluations([&]( ++- auto __i) constexpr { ++- using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>; ++- constexpr size_t __offset = _SL::_S_before(__i); ++- constexpr size_t __base_align = alignof(simd<_Tp, _Ap>); ++- constexpr size_t __a ++- = __base_align - ((__offset * sizeof(_Tp)) % __base_align); ++- constexpr size_t __b = ((__a - 1) & __a) ^ __a; ++- constexpr size_t __alignment = __b == 0 ? __a : __b; ++- return _Vi(__element_ptr + __offset, overaligned<__alignment>); ++- }); +++ return __generate_from_n_evaluations( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>; +++ constexpr size_t __offset = _SL::_S_before(__i); +++ constexpr size_t __base_align = alignof(simd<_Tp, _Ap>); +++ constexpr size_t __a +++ = __base_align - ((__offset * sizeof(_Tp)) % __base_align); +++ constexpr size_t __b = ((__a - 1) & __a) ^ __a; +++ constexpr size_t __alignment = __b == 0 ? __a : __b; +++ return _Vi(__element_ptr + __offset, overaligned<__alignment>); +++ }); ++ #else ++- return __generate_from_n_evaluations([&]( ++- auto __i) constexpr { ++- using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>; ++- const auto& __xx = __data(__x); ++- using _Offset = decltype(_SL::_S_before(__i)); ++- return _Vi([&](auto __j) constexpr { ++- constexpr _SizeConstant<_Offset::value + __j> __k; ++- return __xx[__k]; ++- }); ++- }); +++ return __generate_from_n_evaluations( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ using _Vi = __deduced_simd<_Tp, _SL::_S_at(__i)>; +++ const auto& __xx = __data(__x); +++ using _Offset = decltype(_SL::_S_before(__i)); +++ return _Vi([&](auto __j) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ constexpr _SizeConstant<_Offset::value + __j> __k; +++ return __xx[__k]; +++ }); +++ }); ++ #endif ++ } ++ ++@@ -4123,8 +4230,7 @@ template ++ // __store_pack_of_simd {{{ ++ template ++ _GLIBCXX_SIMD_INTRINSIC void ++- __store_pack_of_simd(char* __mem, const simd<_Tp, _A0>& __x0, ++- const simd<_Tp, _As>&... __xs) +++ __store_pack_of_simd(char* __mem, const simd<_Tp, _A0>& __x0, const simd<_Tp, _As>&... __xs) ++ { ++ constexpr size_t __n_bytes = sizeof(_Tp) * simd_size_v<_Tp, _A0>; ++ __builtin_memcpy(__mem, &__data(__x0), __n_bytes); ++@@ -4144,8 +4250,9 @@ template ++ return simd_cast<_Rp>(__xs...); ++ else if ((... && __xs._M_is_constprop())) ++ return simd<_Tp, ++- simd_abi::deduce_t<_Tp, (simd_size_v<_Tp, _As> + ...)>>([&]( ++- auto __i) constexpr { return __subscript_in_pack<__i>(__xs...); }); +++ simd_abi::deduce_t<_Tp, (simd_size_v<_Tp, _As> + ...)>>( +++ [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA +++ { return __subscript_in_pack<__i>(__xs...); }); ++ else ++ { ++ _Rp __r{}; ++@@ -4161,9 +4268,10 @@ template ++ _GLIBCXX_SIMD_CONSTEXPR __deduced_simd<_Tp, simd_size_v<_Tp, _Abi> * _Np> ++ concat(const array, _Np>& __x) ++ { ++- return __call_with_subscripts<_Np>(__x, [](const auto&... __xs) { ++- return concat(__xs...); ++- }); +++ return __call_with_subscripts<_Np>( +++ __x, [](const auto&... __xs) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { +++ return concat(__xs...); +++ }); ++ } ++ ++ // }}} ++@@ -4178,7 +4286,8 @@ template ) ++ return _M_obj; ++@@ -4187,7 +4296,8 @@ template ++- _GLIBCXX_SIMD_INTRINSIC constexpr void _M_write(_Tp&& __x) const +++ _GLIBCXX_SIMD_INTRINSIC constexpr void +++ _M_write(_Tp&& __x) const ++ { _Accessor::_S_set(_M_obj, _M_index, static_cast<_Tp&&>(__x)); } ++ ++ public: ++@@ -4197,32 +4307,32 @@ template , value_type>> ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference operator=(_Tp&& __x) && +++ template , value_type>> +++ _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference +++ operator=(_Tp&& __x) && ++ { ++ _M_write(static_cast<_Tp&&>(__x)); ++ return {_M_obj, _M_index}; ++ } ++ ++-#define _GLIBCXX_SIMD_OP_(__op) \ ++- template () __op declval<_Tp>()), \ ++- typename = _ValuePreservingOrInt<__remove_cvref_t<_Tp>, _TT>, \ ++- typename = _ValuePreservingOrInt<_TT, value_type>> \ ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference \ ++- operator __op##=(_Tp&& __x) && \ ++- { \ ++- const value_type& __lhs = _M_read(); \ ++- _M_write(__lhs __op __x); \ ++- return {_M_obj, _M_index}; \ +++#define _GLIBCXX_SIMD_OP_(__op) \ +++ template () __op declval<_Tp>()), \ +++ typename = _ValuePreservingOrInt<__remove_cvref_t<_Tp>, _TT>, \ +++ typename = _ValuePreservingOrInt<_TT, value_type>> \ +++ _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference \ +++ operator __op##=(_Tp&& __x) && \ +++ { \ +++ const value_type& __lhs = _M_read(); \ +++ _M_write(__lhs __op __x); \ +++ return {_M_obj, _M_index}; \ ++ } ++ _GLIBCXX_SIMD_ALL_ARITHMETICS(_GLIBCXX_SIMD_OP_); ++ _GLIBCXX_SIMD_ALL_SHIFTS(_GLIBCXX_SIMD_OP_); ++@@ -4230,9 +4340,9 @@ template &>())> ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference operator++() && +++ typename = decltype(++declval&>())> +++ _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference +++ operator++() && ++ { ++ value_type __x = _M_read(); ++ _M_write(++__x); ++@@ -4240,9 +4350,9 @@ template &>()++)> ++- _GLIBCXX_SIMD_INTRINSIC constexpr value_type operator++(int) && +++ typename = decltype(declval&>()++)> +++ _GLIBCXX_SIMD_INTRINSIC constexpr value_type +++ operator++(int) && ++ { ++ const value_type __r = _M_read(); ++ value_type __x = __r; ++@@ -4251,9 +4361,9 @@ template &>())> ++- _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference operator--() && +++ typename = decltype(--declval&>())> +++ _GLIBCXX_SIMD_INTRINSIC constexpr _SmartReference +++ operator--() && ++ { ++ value_type __x = _M_read(); ++ _M_write(--__x); ++@@ -4261,9 +4371,9 @@ template &>()--)> ++- _GLIBCXX_SIMD_INTRINSIC constexpr value_type operator--(int) && +++ typename = decltype(declval&>()--)> +++ _GLIBCXX_SIMD_INTRINSIC constexpr value_type +++ operator--(int) && ++ { ++ const value_type __r = _M_read(); ++ value_type __x = __r; ++@@ -4339,7 +4449,8 @@ template ++ template